85 lines
3.4 KiB
C
85 lines
3.4 KiB
C
//*----------------------------------------------------------------------------
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//* ATMEL Microcontroller Software Support - ROUSSET -
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//*----------------------------------------------------------------------------
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//* The software is delivered "AS IS" without warranty or condition of any
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//* kind, either express, implied or statutory. This includes without
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//* limitation any warranty or condition with respect to merchantability or
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//* fitness for any particular purpose, or against the infringements of
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//* intellectual property rights of others.
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//*----------------------------------------------------------------------------
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//* File Name : Cstartup_SAM7.c
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//* Object : Low level initializations written in C for Tools
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//* Creation : 12/Jun/04
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//* 1.2 28/Feb/05 JPP : LIB change AT91C_WDTC_WDDIS & PLL
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//* 1.3 21/Mar/05 JPP : Change PLL Wait time
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//* 1.4 21/Aug/05 JPP : Change MC_FMR Setting
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//* 1.5 29/Aug/05 JPP : Change PLL error
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//*----------------------------------------------------------------------------
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// Include the board file description
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#include "Board.h"
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// The following functions must be write in ARM mode this function called directly
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// by exception vector
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extern void AT91F_Spurious_handler(void);
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extern void AT91F_Default_IRQ_handler(void);
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extern void AT91F_Default_FIQ_handler(void);
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//*----------------------------------------------------------------------------
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//* \fn AT91F_LowLevelInit
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//* \brief This function performs very low level HW initialization
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//* this function can be use a Stack, depending the compilation
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//* optimization mode
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//*----------------------------------------------------------------------------
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void AT91F_LowLevelInit(void)
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{
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int i;
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AT91PS_PMC pPMC = AT91C_BASE_PMC;
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//* Set Flash Waite sate
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// Single Cycle Access at Up to 30 MHz, or 40
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AT91C_BASE_MC->MC_FMR = AT91C_MC_FWS_1FWS;
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//* Watchdog Disable
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AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
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//* Set MCK at 47 923 200
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// 1 Enabling the Main Oscillator:
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// SCK = 1/32768 = 30.51 uSecond
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// Start up time = 8 * 6 / SCK = 56 * 30.51 = 1,46484375 ms
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//// mt pPMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x06 <<8) | AT91C_CKGR_MOSCEN ));
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pPMC->PMC_MOR =
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((AT91C_CKGR_OSCOUNT & (0x06 << 8)) | AT91C_CKGR_MOSCEN);
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// Wait the startup time
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while (!(pPMC->PMC_SR & AT91C_PMC_MOSCS)) ;
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// 2 Checking the Main Oscillator Frequency (Optional)
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// 3 Setting PLL and divider:
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// - div by 14 Fin = 1.3165 =(18,432 / 14)
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// - Mul 72+1: Fout = 96.1097 =(3,6864 *73)
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// for 96 MHz the erroe is 0.11%
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// Field out NOT USED = 0
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// PLLCOUNT pll startup time estimate at : 0.844 ms
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// PLLCOUNT 28 = 0.000844 /(1/32768)
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pPMC->PMC_PLLR = ((AT91C_CKGR_DIV & 14) |
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(AT91C_CKGR_PLLCOUNT & (28 << 8)) |
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(AT91C_CKGR_MUL & (72 << 16)));
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// Wait the startup time
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while (!(pPMC->PMC_SR & AT91C_PMC_LOCK)) ;
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while (!(pPMC->PMC_SR & AT91C_PMC_MCKRDY)) ;
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// 4. Selection of Master Clock and Processor Clock
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// select the PLL clock divided by 2
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pPMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2;
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while (!(pPMC->PMC_SR & AT91C_PMC_MCKRDY)) ;
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pPMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK;
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while (!(pPMC->PMC_SR & AT91C_PMC_MCKRDY)) ;
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// Set up the default interrupts handler vectors
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AT91C_BASE_AIC->AIC_SVR[0] = (int)AT91F_Default_FIQ_handler;
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for (i = 1; i < 31; i++) {
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AT91C_BASE_AIC->AIC_SVR[i] = (int)AT91F_Default_IRQ_handler;
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}
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AT91C_BASE_AIC->AIC_SPU = (int)AT91F_Spurious_handler;
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}
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