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Add (#ifdef'ed out) code to measure critical section timing with an LED 

git-svn-id: https://svn.openpcd.org:2342/trunk@370 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
This commit is contained in:
henryk 2007-12-04 18:00:34 +00:00
parent 6e248045ac
commit bc63ec765e
2 changed files with 9 additions and 1 deletions
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3
openpicc/config/FreeRTOSConfig.h
View File

@ -63,6 +63,9 @@
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
//#define configDEBUG_CRITICAL_TIMING AT91C_PIO_PA12
#define configDEBUG_CRITICAL_TIMING 0
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )

7
openpicc/os/core/ARM7_AT91SAM7S/portISR.c
View File

@ -209,7 +209,9 @@ vPortEnterCritical (void)
"ORR R0, R0, #0x80 \n\t" /* Disable IRQ, don't disable FIQ. */
"MSR CPSR, R0 \n\t" /* Write back modified value. */
"LDMIA SP!, {R0}"); /* Pop R0. */
#ifdef configDEBUG_CRITICAL_TIMING
*AT91C_PIOA_CODR = configDEBUG_CRITICAL_TIMING;
#endif
/* Now interrupts are disabled ulCriticalNesting can be accessed
directly. Increment ulCriticalNesting to keep a count of how many times
portENTER_CRITICAL() has been called. */
@ -228,6 +230,9 @@ vPortExitCritical (void)
re-enabled. */
if (ulCriticalNesting == portNO_CRITICAL_NESTING)
{
#ifdef configDEBUG_CRITICAL_TIMING
*AT91C_PIOA_SODR = configDEBUG_CRITICAL_TIMING;
#endif
/* Enable interrupts as per portEXIT_CRITICAL(). */
asm volatile ("STMDB SP!, {R0} \n\t" /* Push R0. */
"MRS R0, CPSR \n\t" /* Get CPSR. */