New hardware version
git-svn-id: https://svn.openpcd.org:2342/trunk@398 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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@ -44,7 +44,12 @@ void __ramfunc tc_cdiv_set_divider(u_int16_t div)
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* In order to not lose phase information when doing that we'll busy wait till CV is
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* zero modulo the new RC.*/
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/*tc_cdiv_phase_add(tcb->TCB_TC0.TC_RC-(tcb->TCB_TC0.TC_CV%tcb->TCB_TC0.TC_RC));*/
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if(tcb->TCB_TC0.TC_CV > div) {
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if(tcb->TCB_TC0.TC_CV > div
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#ifdef OPENPICC_MODIFIED_BOARD
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/* Don't spin if FRAME_BURST is clear, the clock is stopped in this case */
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&& !(!AT91F_PIO_IsInputSet(AT91C_BASE_PIOA, OPENPICC_PIO_FRAME_BURST))
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#endif
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) {
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while(tcb->TCB_TC0.TC_CV % div != 0);
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tcb->TCB_TC0.TC_CCR = AT91C_TC_SWTRG;
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}
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@ -62,6 +67,12 @@ void __ramfunc tc_cdiv_phase_add(int16_t inc)
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}
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}
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void tc_cdiv_reset(void)
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{
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/* Reset to start timers */
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tcb->TCB_BCR = 1;
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}
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void tc_cdiv_init(void)
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{
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/* Cfg PA28(TCLK1), PA0(TIOA0), PA1(TIOB0), PA20(TCLK2) as Periph B */
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@ -69,7 +80,11 @@ void tc_cdiv_init(void)
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OPENPICC_PIO_CARRIER_IN |
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OPENPICC_PIO_CARRIER_DIV_OUT |
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OPENPICC_PIO_CDIV_HELP_OUT |
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OPENPICC_PIO_CDIV_HELP_IN);
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OPENPICC_PIO_CDIV_HELP_IN
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#ifdef OPENPICC_MODIFIED_BOARD
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| OPENPICC_PIO_FRAME_BURST
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#endif
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);
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AT91F_PMC_EnablePeriphClock(AT91C_BASE_PMC,
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((unsigned int) 1 << AT91C_ID_TC0));
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@ -80,22 +95,31 @@ void tc_cdiv_init(void)
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/* Connect TCLK1 to XC1, TCLK2 to XC2 */
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tcb->TCB_BMR &= ~(AT91C_TCB_TC1XC1S | AT91C_TCB_TC2XC2S);
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tcb->TCB_BMR |= (AT91C_TCB_TC1XC1S_TCLK1 | AT91C_TCB_TC2XC2S_TCLK2);
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#ifdef OPENPICC_MODIFIED_BOARD
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/* Connect TCLK0 to XC0 */
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tcb->TCB_BMR &= ~(AT91C_TCB_TC0XC0S);
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tcb->TCB_BMR |= (AT91C_TCB_TC0XC0S_TCLK0);
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#endif
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/* Clock XC1, Wave mode, Reset on RC comp
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* TIOA0 on RA comp = set, * TIOA0 on RC comp = clear,
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* TIOB0 on EEVT = set, TIOB0 on RB comp = clear,
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* EEVT = XC2 (TIOA0) */
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* EEVT = XC2 (TIOA0)
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* if OPENPICC_MODIFIED_BOARD: BURST on XC0 */
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tcb->TCB_TC0.TC_CMR = AT91C_TC_CLKS_XC1 | AT91C_TC_WAVE |
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AT91C_TC_WAVESEL_UP_AUTO |
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AT91C_TC_ACPA_SET | AT91C_TC_ACPC_CLEAR |
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AT91C_TC_BEEVT_SET | AT91C_TC_BCPB_CLEAR |
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AT91C_TC_EEVT_XC2 | AT91C_TC_ETRGEDG_RISING |
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AT91C_TC_BSWTRG_CLEAR | AT91C_TC_ASWTRG_CLEAR;
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AT91C_TC_BSWTRG_CLEAR | AT91C_TC_ASWTRG_CLEAR
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#ifdef OPENPICC_MODIFIED_BOARD
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| AT91C_TC_BURST_XC0
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#endif
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;
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tc_cdiv_set_divider(128);
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/* Reset to start timers */
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tcb->TCB_BCR = 1;
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tc_cdiv_reset();
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}
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void tc_cdiv_print(void)
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@ -23,5 +23,5 @@ static inline void tc_cdiv_phase_dec(void)
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extern void tc_cdiv_print(void);
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extern void tc_cdiv_init(void);
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extern void tc_cdiv_fini(void);
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extern void tc_cdiv_reset(void);
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#endif
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@ -6,6 +6,7 @@
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#include "pio_irq.h"
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#include "openpicc.h"
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#include "led.h"
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#include "tc_cdiv.h"
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#define USE_IRQ
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@ -39,12 +40,16 @@ void tc_cdiv_sync_reset(void)
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DEBUGPCRF("CDIV_SYNC_FLOP");
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//vLedSetGreen(1);
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/* reset the hardware flipflop */
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/* reset the hardware flipflop, this clears FRAME */
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AT91F_PIO_ClearOutput(AT91C_BASE_PIOA,
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OPENPICC_PIO_SSC_DATA_CONTROL);
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for (i = 0; i < 0xff; i++) ;
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AT91F_PIO_SetOutput(AT91C_BASE_PIOA,
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OPENPICC_PIO_SSC_DATA_CONTROL);
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#ifdef OPENPICC_MODIFIED_BOARD
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/* reset tc_cdiv counter, the cleared frame signal stopped the tc_cdiv clock */
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tc_cdiv_reset();
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#endif
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}
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}
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@ -49,6 +49,13 @@
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#define MCK 47923200 // MCK (PLLRC div by 2)
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#define MCKKHz (MCK/1000) //
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/*-----------------*/
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/* Board version */
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/*-----------------*/
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/* Modified board, routing PLL_LOCK to PA5 and a copy of FRAME to PA4, enabling the use of the T/C BURST feature. */
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#define OPENPICC_MODIFIED_BOARD
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/*-----------------*/
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/* Pins */
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/*-----------------*/
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@ -59,15 +66,25 @@
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#define OPENPICC_PIO_SS2_DT_THRESH AT91C_PIO_PA8
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#define OPENPICC_PIO_PLL_INHIBIT AT91C_PIO_PA24
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#ifdef OPENPICC_MODIFIED_BOARD
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#define OPENPICC_PIO_PLL_LOCK AT91C_PIO_PA5
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#else
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#define OPENPICC_PIO_PLL_LOCK AT91C_PIO_PA4
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#endif
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#define OPENPICC_MOD_PWM AT91C_PA23_PWM0
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#define OPENPICC_MOD_SSC AT91C_PA17_TD
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#define OPENPICC_SSC_DATA AT91C_PA18_RD
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#define OPENPICC_SSC_CLOCK AT91C_PA19_RK
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#define OPENPICC_SSC_TF AT91C_PIO_PA15
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#ifdef OPENPICC_MODIFIED_BOARD
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#define OPENPICC_SSC_DATA_GATE AT91C_PA30
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#endif
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#define OPENPICC_PIO_FRAME AT91C_PIO_PA20
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#ifdef OPENPICC_MODIFIED_BOARD
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#define OPENPICC_PIO_FRAME_BURST AT91C_PIO_PA4
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#endif
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#define OPENPICC_PIO_SSC_DATA_CONTROL AT91C_PIO_PA21
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#define OPENPICC_PIO_AB_DETECT AT91C_PIO_PA22
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#define OPENPICC_PIO_PLL_INHIBIT AT91C_PIO_PA24
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@ -217,7 +217,7 @@ my_fiq_handler:
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tst r8, #PIO_DATA /* check for PIO_DATA change */
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ldrne r11, [r10, #PIOA_PDSR]
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tstne r11, #PIO_DATA /* check for PIO_DATA == 1 */
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strne r9, [r12, #TC_CCR] /* software trigger */
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/*strne r9, [r12, #TC_CCR] /* software trigger */
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movne r11, #PIO_DATA
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strne r11, [r10, #PIOA_IDR] /* disable further PIO_DATA FIQ */
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