remaining changes after half-failing commit
git-svn-id: https://svn.openpcd.org:2342/trunk@36 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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@ -65,6 +65,22 @@ EP3 interrupt
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3.1 dumb interface
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struct usb_pcd_out_hdr {
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u_int8_t cmd; /* command */
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u_int8_t flags;
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u_int8_t reg; /* register */
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u_int8_t res;
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u_int16_t len;
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u_int8_t data[0];
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} __attribute__ ((packed));
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#define USB_PCD_CMD_WRITE_REG 0x01
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#define USB_PCD_CMD_WRITE_FIFO 0x02
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#define USB_PCD_CMD_WRITE_VFIFO 0x03
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#define USB_PCD_CMD_READ_REG 0x11
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#define USB_PCD_CMD_READ_FIFO 0x12
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#define USB_PCD_CMD_WRITE_VFIFO 0x13
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TBD
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3.2 Intelligent interface
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@ -102,7 +118,7 @@ is used to search for a free buffer using which the UDC RX DMA can be refilled.
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4.1.1 Performing SPI Register Read
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[ UDC has configured RX dma for reception of usb packets ]
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[ UDC has configured RX FIFO for reception of usb packets ]
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- UDC issues interrupt that USB endpoint receive has completed (FIFO)
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- UDC driver defragments multiple packets into one transfer [optional]
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- UDC driver submits another buffer for DMA reception
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@ -0,0 +1,27 @@
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SPI:
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- use PDC DMA for SPI transfers
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- use real SPI clock divisor (4.8MHz) rather than current 320kHz clock
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RC632:
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- Fix locking between 'atomic' ops like set/clear bit and RC632 IRQ
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- Implement VFIFO handling
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USB:
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- don't busy-wait for EP2/EP3 transfers but rather use TX completion IRQ
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- Implement VFIFO handling
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- Add DFU descriptor to host
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DFU:
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- implement DFU protocol for memory and flash
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- add capability to copy and execute DFU from RAM
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Generic:
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-
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Later, for PICCsim:
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- Implement SSC code for sampling subcarrier
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- Implement SSC code for generating subcarrier
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- Implement Manchester coding
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Way Later, for librfid:
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- Implement parts (or all of) 14443 in firmware as alternative configuration
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@ -1,14 +0,0 @@
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#ifndef _TYPES_H
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#define _TYPES_H
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typedef unsigned char u_int8_t;
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typedef unsigned short u_int16_t;
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typedef unsigned int u_int32_t;
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typedef unsigned long long u_int64_t;
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typedef signed char int8_t;
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typedef signed short int16_t;
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typedef signed int int32_t;
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typedef signed long long int64_t;
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#endif
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@ -0,0 +1,11 @@
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#define EFCS_CMD_WRITE_PAGE 0x01
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#define EFCS_CMD_SET_LOCK_BIT 0x02
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#define EFCS_CMD_WRITE_PAGE_LOCK 0x03
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#define EFCS_CMD_CLEAR_LOCK 0x04
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#define EFCS_CMD_ERASE_ALL 0x08
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#define EFCS_CMD_SET_NVM_BIT 0x0b
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#define EFCS_CMD_CLEAR_NVM_BIT 0x0d
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#define EFCS_CMD_SET_SECURITY_BIT 0x0f
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@ -285,5 +285,7 @@ int main(int argc, char **argv)
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}
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}
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sleep(1);
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exit(0);
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}
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