- introduce FIQ stack of 1k (way too large, but we might have debug...)
- move FIQ processing out of DFU Flash and into application/RAM git-svn-id: https://svn.openpcd.org:2342/trunk@239 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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laforge
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2e6ea1d6ac
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0a3534e799
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@ -43,13 +43,14 @@
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//#define DEBUG_LL
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#ifdef DEBUG_LL
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/* Debugging macros for switching on/off LED1 (green) */
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#define PIOA_PER 0xFFFFF400
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#define PIOA_OER 0xFFFFF410
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#define PIOA_SODR 0xFFFFF430
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#define PIOA_CODR 0xFFFFF434
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#define LED1 25 /* this only works on OpenPICC, not Olimex */
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#ifdef DEBUG_LL
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/* Debugging macros for switching on/off LED1 (green) */
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.macro led1on
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ldr r2, =PIOA_CODR
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mov r1, #(1 << LED1)
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@ -78,6 +79,7 @@
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#endif
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.equ IRQ_Stack_Size, 0x00000400
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.equ FIQ_Stack_Size, 0x00000400
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.equ AIC_IVR, (256)
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.equ AIC_FVR, (260)
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@ -167,10 +169,13 @@ rsvdvec:
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irqvec:
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b IRQ_Handler_Entry /* 0x18 IRQ */
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fiqvec:
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b FIQ_Handler_Entry
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/* 0x1c FIQ */
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ldr pc, [pc, #-0xF20] /* 0x1c FIQ */
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dfu_state_dummy:
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.word 0
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.global IRQ_Handler_Entry
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.func IRQ_Handler_Entry
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FIQ_Handler_Entry:
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@ -201,9 +206,6 @@ FIQ_Handler_Entry:
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/*- Restore the Program Counter using the LR_fiq directly in the PC */
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subs pc, lr, #4
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.global IRQ_Handler_Entry
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.func IRQ_Handler_Entry
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IRQ_Handler_Entry:
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/*- Manage Exception Entry */
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@ -277,17 +279,6 @@ InitReset:
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mov lr, pc
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bx r0
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ledinit
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/*------------------------------------------------------------------------------
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//*- Stack Sizes Definition
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//*------------------------
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//*- Interrupt Stack requires 2 words x 8 priority level x 4 bytes when using
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//*- the vectoring. This assume that the IRQ management.
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//*- The Interrupt Stack must be adjusted depending on the interrupt handlers.
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//*- Fast Interrupt not requires stack If in your application it required you must
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//*- be definehere.
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//*- The System stack size is not defined and is limited by the free internal
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//*- SRAM.
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//*------------------------------------------------------------------------------*/
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/*------------------------------------------------------------------------------
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//*- Top of Stack Definition
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@ -297,7 +288,6 @@ InitReset:
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//*- ARM_MODE_SVC (Application, C) Stack is located at the top of the external memory.
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//*------------------------------------------------------------------------------*/
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.EQU IRQ_STACK_SIZE, (3*8*4)
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.EQU ARM_MODE_FIQ, 0x11
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.EQU ARM_MODE_IRQ, 0x12
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.EQU ARM_MODE_SVC, 0x13
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@ -318,6 +308,9 @@ InitReset:
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/*- Set up Fast Interrupt Mode and set FIQ Mode Stack*/
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msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
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mov r13, r0
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sub r0, r0, #FIQ_Stack_Size
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/*- Init the FIQ register*/
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ldr r8, =AT91C_BASE_AIC
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@ -325,10 +318,14 @@ InitReset:
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msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT
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mov r13, r0 /* Init stack IRQ */
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sub r0, r0, #IRQ_Stack_Size
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/*- Set up Supervisor Mode and set Supervisor Mode Stack*/
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msr CPSR_c, #ARM_MODE_SVC
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msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT
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mov r13, r0 /* Init stack Sup */
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/* - Enable Interrupts and FIQ */
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msr CPSR_c, #ARM_MODE_SVC
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#ifdef CONFIG_DFU_MAGIC
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ldr r1, =AT91C_RSTC_RSR
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ldr r2, [r1]
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@ -20,26 +20,48 @@
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//#define DEBUG_LL
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.equ AIC_FVR, (260)
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.equ AIC_EOICR, (304)
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.equ AT91C_BASE_AIC, (0xFFFFF000)
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.equ ARM_MODE_FIQ, 0x11
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.equ ARM_MODE_IRQ, 0x12
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.equ ARM_MODE_SVC, 0x13
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.equ I_BIT, 0x80
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.equ F_BIT, 0x40
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#define AT91C_BASE_PIOA 0xFFFFF400
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#define AT91C_BASE_TC0 0xFFFA0000
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#define AT91C_TC_SWTRG (1 << 2)
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#define PIOA_SODR 0x30
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#define PIOA_CODR 0x34
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#define PIOA_PDSR 0x3c
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#define PIOA_ISR 0x4c
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#define PIOA_IDR 0x44
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#define PIO_DATA (1 << 27)
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#define TC_CCR 0x00
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#define PIO_LED1 (1 << 25) /* this only works on OpenPICC, not Olimex */
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#ifdef DEBUG_LL
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/* Debugging macros for switching on/off LED1 (green) */
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#define PIOA_PER 0xFFFFF400
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#define PIOA_OER 0xFFFFF410
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#define PIOA_SODR 0xFFFFF430
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#define PIOA_CODR 0xFFFFF434
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#define LED1 25 /* this only works on OpenPICC, not Olimex */
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.macro led1on
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ldr r2, =PIOA_CODR
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mov r1, #(1 << LED1)
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str r1, [r2]
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ldr r2, =AT91C_BASE_PIOA
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mov r1, #PIO_LED1
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str r1, [r2, #PIOA_CODR]
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.endm
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.macro led1off
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ldr r2, =PIOA_SODR
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mov r1, #(1 << LED1)
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str r1, [r2]
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ldr r2, =AT91C_BASE_PIOA
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mov r1, #PIO_LED1
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str r1, [r2, #PIOA_SODR]
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.endm
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.macro ledinit
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ldr r2, =PIOA_PER
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mov r1, #(1 << LED1)
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mov r1, #PIO_LED1
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str r1, [r2]
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ldr r2, =PIOA_OER
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str r1, [r2]
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@ -74,6 +96,13 @@ loop_z: cmp r1, r2
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strlo r0, [r1], #4
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blo loop_z
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/* initialize FIQ mode registers */
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msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
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ldr r10, =AT91C_BASE_PIOA
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ldr r12, =AT91C_BASE_TC0
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mov r9, #AT91C_TC_SWTRG
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msr CPSR_c, #ARM_MODE_SVC
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led1on
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/* prepare C function call to main */
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@ -91,8 +120,99 @@ loop_z: cmp r1, r2
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.func exit
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exit:
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b .
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.size exit, . - exit
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.size exit, . - exit
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.endfunc
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.text
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.arm
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.section .fastrun, "ax"
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.global fiq_handler
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.func fiq_handler
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fiq_handler:
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/* code that uses pre-initialized FIQ reg */
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/* r8 AT91C_BASE_AIC (dfu init)
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r9 AT91C_TC_SWTRG
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r10 AT91C_BASE_PIOA
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r11 tmp
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r12 AT91C_BASE_TC0
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r13 stack
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r14 lr
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*/
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#if 0
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mov r11, #PIO_LED1
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str r11, [r10, #PIOA_CODR] /* enable LED */
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str r11, [r10, #PIOA_SODR] /* disable LED */
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#endif
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ldr r8, [r10, #PIOA_ISR]
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tst r8, #PIO_DATA /* check for PIO_DATA change */
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ldrne r11, [r10, #PIOA_PDSR]
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tstne r11, #PIO_DATA /* check for PIO_DATA == 1 */
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strne r9, [r12, #TC_CCR] /* software trigger */
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movne r11, #PIO_DATA
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strne r11, [r10, #PIOA_IDR] /* disable further PIO_DATA FIQ */
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/*- Mark the End of Interrupt on the AIC */
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ldr r11, =AT91C_BASE_AIC
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str r11, [r11, #AIC_EOICR]
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/* push r0, r1-r3, r12, r14 onto FIQ stack */
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stmfd sp!, { r0-r3, r12, lr}
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mov r0, r8
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/* enable interrupts while handling demux */
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/* msr CPSR_c, #F_BIT | ARM_MODE_SVC */
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/* Call C function, give PIOA_ISR as argument */
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ldr r11, =__pio_irq_demux
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mov r14, pc
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bx r11
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/* msr CPSR_c, #I_BIT | F_BIT | ARM_MODE_FIQ */
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ldmia sp!, { r0-r3, r12, lr }
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#if 0
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/*- Save and r0 in FIQ_Register */
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mov r9, r0
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ldr r0, [r11, #AIC_FVR]
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str r8, [r11, #AIC_FVR]
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/* msr CPSR_c, #I_BIT | F_BIT | ARM_MODE_SVC */
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/*- Save scratch/used registers and LR in User Stack */
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stmfd sp!, { r1-r3, r12, lr}
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led1on
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/*- Branch to the routine pointed by the AIC_FVR */
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mov r14, pc
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bx r0
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/*- Restore scratch/used registers and LR from User Stack */
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ldmia sp!, { r1-r3, r12, lr}
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/*- Leave Interrupts disabled and switch back in FIQ mode */
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/* msr CPSR_c, #I_BIT | F_BIT | ARM_MODE_FIQ */
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/*- Mark the End of Interrupt on the AIC */
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ldr r0, =AT91C_BASE_AIC
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str r0, [r0, #AIC_EOICR]
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/*- Restore the R0 ARM_MODE_SVC register */
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mov r0,r9
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ldr r10, =PIOA_SODR
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mov r11, #(1 << LED1)
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str r11, [r10]
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#endif
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/*- Restore the Program Counter using the LR_fiq directly in the PC */
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subs pc, lr, #4
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.size fiq_handler, . - fiq_handler
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.endfunc
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.end
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