From fc736ae67faa07a0d665a4aea8b44c24bda1bda5 Mon Sep 17 00:00:00 2001 From: Steve Markgraf Date: Fri, 22 Jun 2012 15:52:35 +0200 Subject: [PATCH] init: disable 4 MHz clock output The pin where this clock is outputted is quite close to the ADC inputs, so better disable it. Signed-off-by: Steve Markgraf --- src/librtlsdr.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/librtlsdr.c b/src/librtlsdr.c index 94687f3..ec5a70d 100644 --- a/src/librtlsdr.c +++ b/src/librtlsdr.c @@ -496,6 +496,9 @@ void rtlsdr_init_baseband(rtlsdr_dev_t *dev) /* Enable Zero-IF mode (en_bbin bit), DC cancellation (en_dc_est), * IQ estimation/compensation (en_iq_comp, en_iq_est) */ rtlsdr_demod_write_reg(dev, 1, 0xb1, 0x1b, 1); + + /* disable 4.096 MHz clock output on pin TP_CK0 */ + rtlsdr_demod_write_reg(dev, 0, 0x0d, 0x83, 1); } int rtlsdr_deinit_baseband(rtlsdr_dev_t *dev)