Commit Graph

98 Commits

Author SHA1 Message Date
Dimitri Stolnikov edbcf3352d change si570.h permissions to 644 2012-07-14 19:35:41 +02:00
Harald Welte dc23dc5a81 include auto-generated GIT_REVISION into the DFU and firmware builds
At the moment it is only shown on the serial console, though.
2012-06-25 15:09:55 +02:00
Christian Daniel 323af344fa set TWI/I2C speed to 400kHz - all devices on the OsmoSDR support this 2012-06-05 21:28:58 +02:00
Christian Daniel 2dd491881e e4k: fix return value of debug function 2012-06-05 21:28:34 +02:00
Christian Daniel 1982ab41fe USB: fix statemachine to prevent bulk ep hang 2012-06-05 20:51:00 +02:00
Christian Daniel bf8d829201 req queue: resize buffers and fix irq enable/disable 2012-06-05 20:50:38 +02:00
Christian Daniel 26bea49a7e remove generic USB debugging printf 2012-06-05 20:50:05 +02:00
Christian Daniel d62195b046 proper e4k init 2012-06-05 20:48:22 +02:00
Christian Daniel b93708ed1d add lots of debugging stuff 2012-06-05 20:48:09 +02:00
Christian Daniel d8d2cfc785 fix typo 2012-06-01 00:31:12 +02:00
Christian Daniel 35355c704c expand USB API 2012-06-01 00:17:15 +02:00
Christian Daniel a5d9d2de81 swap I/Q by default (OsmoSDR is q first) 2012-06-01 00:16:28 +02:00
Christian Daniel 399d41474f added accessor functions for specific FPGA registers 2012-06-01 00:15:55 +02:00
Christian Daniel dda6e9c4cb add workaround for E4K gap between 325-350 MHz 2012-05-30 21:59:36 +02:00
Christian Daniel 83ebd2b310 add a few debug strings 2012-05-30 21:59:07 +02:00
Steve Markgraf e69305dedd fix build of usb-dfu-project
Signed-off-by: Steve Markgraf <steve@steve-m.de>
2012-05-29 15:27:50 +02:00
Christian Daniel f3f7a28cf8 add bulk mode and initial USB API 2012-05-26 22:19:49 +02:00
Christian Daniel 65f6e41c56 export subsystem structs and add support for bulk mode 2012-05-26 22:19:08 +02:00
Christian Daniel e28725c0dc remove a few debug messages to clean the output 2012-05-26 22:17:43 +02:00
Christian Daniel 3ee2b7e52d add bulk EP descriptors (switchable by #define) 2012-05-26 22:17:08 +02:00
Christian Daniel 6023743202 add an API function to directly write to an SI570 register 2012-05-26 22:14:33 +02:00
Christian Daniel 180193cecf import modified E4000 driver from rtl-sdr 2012-05-26 22:13:59 +02:00
Christian Daniel 5dcfd6a156 added DFU functionality for the FPGA - crudely removed stuff from the loader to make it fit into the 16k 2012-05-17 22:47:51 +02:00
Harald Welte ad240d9de9 update the readme 2012-05-08 21:17:22 +02:00
Harald Welte aa3c92f0ff rename sdr-test-project to osmosr-project 2012-05-08 21:12:47 +02:00
Sylvain Munaut ca53c22150 fw/tuner_e4k: Add some more magic init
It comes from the kernel driver. No idea what it does really ...

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-04-02 09:06:20 +02:00
Sylvain Munaut 088d53127b fw/tuner_e4k: Add function to enable/disable the IF channel filter
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-04-02 09:06:12 +02:00
Sylvain Munaut 6593b2be38 fw/tuner_e4k: Disable auto gain adjustement during DC table gen
We need them to be fixed during that time, so disable all auto
stuff

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-04-02 09:06:06 +02:00
Sylvain Munaut f1939647b4 fw/tuner_e4k: Avoid dual read of DC4 when generating DC table
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-04-02 09:06:00 +02:00
Sylvain Munaut 20487e8cb3 fw/tuner_e4k: DC offset table gen doc fixes
No we don't need to wait. I checked if the value ever changed after
the first read and it doesn't. Other e4k drivers don't wait either.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-04-02 09:05:55 +02:00
Sylvain Munaut a99f1b530e fw/tuner_e4k: Use signed int for if1_gain in the gain combination array
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-04-02 09:05:50 +02:00
Sylvain Munaut 0bcf409c54 fw/tuner_e4k: Mixer gain is 4 or 12 dB, not 0/12
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-04-02 09:05:46 +02:00
Sylvain Munaut 1d28c3065b fw/tuner_e4k: Fix the array_size of the filter fw settings.
This was causing the array length to be '1' and so we always
took the first possible setting (the widest) ...

Certainly not good when you only have a 500 kHz sample rate.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-04-02 09:05:40 +02:00
Sylvain Munaut 975c9813e9 tuner_e4k: Properly set the band
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-03-29 23:37:00 +02:00
Sylvain Munaut bdb4f8e5ca tuner_e4k: Fix band setting method mask & calls
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-03-29 23:36:09 +02:00
Sylvain Munaut 60d88b6ed2 tuner_e4k: Fix closest_arr_idx
The previous method tried to do clever stuff assuming the sequence is
sorted. Unfortunately:

1) this didn't really find the 'closest' match
2) this didn't work for the first or last interval
3) this didn't work for freq slightly above or below the last/first freq

All in all, it's easier to try them all.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-03-29 23:35:36 +02:00
Sylvain Munaut a95b61f397 sdr-test: Add a 'dfu' serial command to enter DFU mode
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-03-29 10:39:28 +02:00
Sylvain Munaut 311885441c tuner_e4k: Fix reference to 65535 vs 65536
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-03-29 08:47:51 +02:00
Sylvain Munaut 585c6d378a tuner_e4k: Max VCO frequency is 3.9GHz not 3.6GHz
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-03-29 08:46:48 +02:00
Christian Daniel 4683c1c21a tuner_e4k: add manual i/q correction 2012-03-06 15:29:33 +01:00
Christian Daniel 463a3f9c28 tuner_e4k: add setting for common mode 2012-03-06 14:43:03 +01:00
Harald Welte 6d95768e9c fast_source: Add FPGA_TEST_STATS #define for FPGA/SSC verification
Using fpga.test_mode=1 this code can compute statistics on the
incrementing-counter-with-every-sample behaviour.
2012-03-06 12:26:33 +01:00
Harald Welte 66235f593e SSC: use rising edge of RF (Rx Frame), not falling 2012-03-06 12:15:55 +01:00
Harald Welte 3745d083f6 SSC: Inclode Overrun in statistics 2012-03-06 10:48:33 +01:00
Harald Welte 31d11c2bf8 tuner_e4k: fix the Y value to b e 65536, not 65535 2012-03-05 23:31:33 +01:00
Harald Welte bab0eb62ce tuner_e4k: Introduce #define for OUT_OF_SPEC operation
The device can be used from 50..1900 MHz and not only 64..1700
2012-03-05 23:29:48 +01:00
Harald Welte ef60309e63 osdr_fpga: Add support for enabling test (counter) mode 2012-03-05 23:20:18 +01:00
Harald Welte bd2b9a9697 main: add dc offset calibration commands 2012-03-05 18:37:44 +01:00
Harald Welte 9ce29d79e8 e4k: fix unresolved symbols in dc offset calibration 2012-03-05 18:37:18 +01:00
Harald Welte c4c7c6add5 e4k: add dc offset calibration code 2012-03-05 18:25:11 +01:00