added DFU functionality for the FPGA - crudely removed stuff from the loader to make it fit into the 16k
This commit is contained in:
parent
c46bad77e5
commit
5dcfd6a156
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@ -0,0 +1,226 @@
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/**************************************************************
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*
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* Lattice Semiconductor Corp. Copyright 2008
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*
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*
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***************************************************************/
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/**************************************************************
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*
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* Revision History of hardware.c
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*
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*
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* 09/11/07 NN type cast all the mismatch variables
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***************************************************************/
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#include <stdio.h>
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#include <unistd.h>
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#include "opcode.h"
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#include "hardware.h"
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/*************************************************************
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* *
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* EXTERNAL FUNCTION *
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* *
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*************************************************************/
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extern void ispVMStateMachine( char a_cNextState );
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/*************************************************************
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* *
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* READPORT *
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* *
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* INPUT: *
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* None. *
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* *
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* RETURN: *
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* Returns the bit read back from the device. *
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* *
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* DESCRIPTION: *
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* This function is used to read the TDO pin from the *
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* input port. *
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* *
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* NOTE: This function should be modified in an embedded *
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* system! *
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* *
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*************************************************************/
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int readPort()
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{
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uint32_t value;
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value = *((volatile uint32_t*)(0x400e0e00 + 0x3c));
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if(value & (1 << 6))
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return 1;
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else return 0;
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}
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/*************************************************************
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* *
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* WRITEPORT *
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* *
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* INPUT: *
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* a_ucPins: a byte to indicate which pin will be *
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* depending on the value. *
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* *
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* a_ucValue: the value to determine of the pin above *
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* will be written out or not. *
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* *
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* RETURN: *
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* None. *
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* *
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* DESCRIPTION: *
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* To apply the specified value to the pins indicated. *
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* This routine will likely be modified for specific *
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* systems. As an example, this code is for the PC, as *
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* described below. *
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* *
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* This routine uses the IBM-PC standard Parallel port, *
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* along with the schematic shown in Lattice *
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* documentation, to apply the signals to the programming *
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* loop. *
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* *
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* NOTE: This function should be modified in an embedded *
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* system! *
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* *
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*************************************************************/
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void writePort( unsigned int a_ucPins, unsigned int a_ucValue )
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{
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uint32_t value = 0;
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if(a_ucPins & pinTDI)
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value |= (1 << 8);
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if(a_ucPins & pinTCK)
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value |= (1 << 7);
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if(a_ucPins & pinTMS)
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value |= (1 << 5);
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if(a_ucValue)
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*((volatile uint32_t*)(0x400e0e00 + 0x30)) = value;
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else *((volatile uint32_t*)(0x400e0e00 + 0x34)) = value;
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}
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/*************************************************************
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* *
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* ISPVMDELAY *
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* *
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* INPUT: *
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* a_uiDelay: delay in milliseconds *
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* *
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* RETURN: *
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* None. *
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* *
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* DESCRIPTION: *
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* The user must implement a delay to observe a_uiDelay, *
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* where a_uiDelay is the number of milliseconds that must *
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* pass before data is read from in_port. Since platforms and*
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* processor speeds vary greatly, this task is left to the *
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* user. This subroutine is called upon to provide a delay *
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* from 1 millisecond to a few hundreds milliseconds each time*
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* That is the reason behind using unsigned long integer in *
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* this subroutine. It is OK to provide longer delay than *
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* required. It is not acceptable if the delay is shorter than*
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* required. *
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* *
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* Note: user must re - implement to target specific hardware.*
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* *
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* Example: Use the for loop to create the microsecond delay. *
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* Loop 1K times to produce the milliseconds delay. *
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* *
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* Let the CPU clock (system clock) be F Mhz. *
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* *
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* Let the for loop represented by the 2 lines of *
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* machine code: *
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* LOOP: DEC RA; *
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* JNZ LOOP; *
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* Let the for loop number for one microsecond be L. *
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* Lets assume 4 system clocks for each line of *
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* machine code. *
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* Then 1 us = 1/F (microseconds per clock) *
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* x (2 lines) x (4 clocks per line) x L*
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* = 8L/F *
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* Or L = F/8; *
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* *
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* Convert the unit in microseconds to *
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* milliseconds. *
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* L = F/8 x 1000; *
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* Lets assume the CPU clock is set to 48MHZ. The C *
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* code then is: *
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* *
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* unsigned int F = 48; //MHZ. *
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* unsigned int L = F/8; //microseconds. *
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* unsigned int index, m; *
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* *
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* *
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* if (L < 1) L = 1; //minimum is i microsecond. *
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* for (index=0; index < a_uiDelay * L; index++) *
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* { *
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* //loop 1K times to produce milliseconds delay *
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* for (m=0; m<1000; m++); //milliseconds *
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* } *
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* return 0; *
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* *
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* *
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*************************************************************/
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/* the unit of a_uiDelay is milliseconds */
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void ispVMDelay( unsigned int a_uiDelay )
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{
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// yes, this is more or less calibrated - cd
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volatile int i, j;
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for(i = 0; i < a_uiDelay; i++) {
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for(j = 0; j < 5000; j++)
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asm("nop");
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}
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}
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/*************************************************************
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* *
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* ENABLEHARDWARE *
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* *
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* INPUT: *
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* None. *
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* *
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* RETURN: *
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* None. *
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* *
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* DESCRIPTION: *
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* This function is called to enable the hardware. *
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* *
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* NOTE: This function should be modified in an embedded *
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* system! *
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* *
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*************************************************************/
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void EnableHardware()
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{
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ispVMStateMachine(RESET);
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}
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/*************************************************************
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* *
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* DISABLEHARDWARE *
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* *
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* INPUT: *
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* None. *
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* *
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* RETURN: *
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* None. *
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* *
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* DESCRIPTION: *
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* This function is called to disable the hardware. *
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* *
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* NOTE: This function should be modified in an embedded *
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* system! *
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* *
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*************************************************************/
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void DisableHardware()
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{
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ispVMStateMachine(RESET);
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}
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@ -0,0 +1,11 @@
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#ifndef INCLUDE_HARDWARE_H
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#define INCLUDE_HARDWARE_H
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#include <stdint.h>
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const uint8_t* g_ispAlgo;
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size_t g_ispAlgoSize;
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const uint8_t* g_ispData;
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size_t g_ispDataSize;
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#endif // INCLUDE_HARDWARE_H
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@ -62,6 +62,8 @@
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#include "dfu_desc.h"
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#include "opcode.h"
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#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
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/*----------------------------------------------------------------------------
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/* Check current level on VBus */
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if (PIO_Get(&pinVbus))
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{
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TRACE_INFO("VBUS conn\n\r");
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//TRACE_INFO("VBUS conn\n\r");
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USBD_Connect();
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}
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else
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{
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TRACE_INFO("VBUS discon\n\r");
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//TRACE_INFO("VBUS discon\n\r");
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USBD_Disconnect();
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}
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}
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}
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else
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{
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TRACE_INFO("discon\n\r");
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//TRACE_INFO("discon\n\r");
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USBD_Disconnect();
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}
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}
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@ -209,7 +211,7 @@ void USBDCallbacks_RequestReceived(const USBGenericRequest *request)
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void USBDDriverCallbacks_InterfaceSettingChanged(unsigned char interface,
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unsigned char setting)
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{
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TRACE_INFO("DFU: IfSettingChgd(if=%u, alt=%u)\n\r", interface, setting);
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//TRACE_INFO("DFU: IfSettingChgd(if=%u, alt=%u)\n\r", interface, setting);
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}
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#define BOOT_FLASH_SIZE (16 * 1024)
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.size = AT91C_IRAM_SIZE,
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},
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[ALTIF_FPGA] = {
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.base_addr = AT91C_IFLASH1,
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.size = AT91C_IFLASH1_SIZE,
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.base_addr = 0,
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.size = 16*1024*1024, // really no limit
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},
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};
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@ -242,11 +244,13 @@ static const struct flash_part flash_parts[] = {
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int USBDFU_handle_upload(uint8_t altif, unsigned int offset,
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uint8_t *buf, unsigned int req_len)
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{
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return -EINVAL;
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#if 0
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struct flash_part *part;
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void *end, *addr;
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uint32_t real_len;
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TRACE_INFO("DFU: handle_upload(%u, %u, %u)\n\r", altif, offset, req_len);
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//TRACE_INFO("DFU: handle_upload(%u, %u, %u)\n\r", altif, offset, req_len);
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if (altif > ARRAY_SIZE(flash_parts))
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return -EINVAL;
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LED_Clear(USBD_LEDOTHER);
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return real_len;
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#endif
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}
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extern unsigned short g_usDataType;
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static uint8_t fpgaBuf[1024];
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static uint fpgaBufStart; // file offset of first byte in buffer
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static uint fpgaBufEnd;
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static uint fpgaBufFill;
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static uint fpgaBufRPtr;
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static uint fpgaPushedAddr;
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short int ispProcessVME();
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void EnableHardware();
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void fpgaPushAddr()
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{
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fpgaPushedAddr = fpgaBufRPtr;
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}
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void fpgaPopAddr()
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{
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printf("*");
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fpgaBufRPtr = fpgaPushedAddr;
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}
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uint8_t fpgaGetByte()
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{
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uint8_t res = fpgaBuf[fpgaBufRPtr - fpgaBufStart];
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fpgaBufRPtr++;
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return res;
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}
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static int fpgaFlash(unsigned int offset, const uint8_t* buf, unsigned int len)
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{
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int i;
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if(offset == 0) {
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for(i = 0; i < len; i++)
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fpgaBuf[i] = buf[i];
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fpgaBufStart = 0;
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fpgaBufEnd = len;
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fpgaBufFill = len;
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fpgaBufRPtr = 0;
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*((uint32_t*)(0x400e0410)) = (1 << 11);
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*((uint32_t*)(0x400e0e00 + 0x44)) = (1 << 5) | (1 << 6) | (1 << 7) | (1 << 8);
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*((uint32_t*)(0x400e0e00 + 0x60)) = (1 << 5) | (1 << 6) | (1 << 7) | (1 << 8);
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*((uint32_t*)(0x400e0e00 + 0x54)) = (1 << 5) | (1 << 6) | (1 << 7) | (1 << 8);
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*((uint32_t*)(0x400e0e00 + 0x10)) = (1 << 5) | (1 << 7) | (1 << 8);
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*((uint32_t*)(0x400e0e00 + 0x00)) = (1 << 5) | (1 << 6) | (1 << 7) | (1 << 8);
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if(fpgaGetByte())
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g_usDataType = COMPRESS;
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else g_usDataType = 0;
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EnableHardware();
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} else {
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for(i = 0; i < len; i++)
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fpgaBuf[fpgaBufFill + i] = buf[i];
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fpgaBufEnd += len;
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fpgaBufFill += len;
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}
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/*
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printf("\n\rs:%d,e:%d,f:%d,r:%d,p:%d\n",
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fpgaBufStart, fpgaBufEnd, fpgaBufFill, fpgaBufRPtr, fpgaPushedAddr);
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*/
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while(fpgaBufEnd - fpgaBufRPtr > 192) {
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if((i = ispProcessVME()) < 0)
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return -1;
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}
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if(fpgaBufFill > 384) {
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uint moveby = fpgaBufFill - 384;
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uint movelen = fpgaBufFill - movelen;
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for(i = 0; i < movelen; i++)
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fpgaBuf[i] = fpgaBuf[i + moveby];
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fpgaBufStart += moveby;
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fpgaBufFill -= moveby;
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/*
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printf("\n\rs:%d,e:%d,f:%d,r:%d,p:%d\n",
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fpgaBufStart, fpgaBufEnd, fpgaBufFill, fpgaBufRPtr, fpgaPushedAddr);
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*/
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}
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return 0;
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}
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/* DFU callback */
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@ -286,14 +378,13 @@ int USBDFU_handle_dnload(uint8_t altif, unsigned int offset,
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end = part->base_addr + part->size;
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if (addr + len > end) {
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TRACE_ERROR("Cannot write beyond end of DFU partition %u\n\r", altif);
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TRACE_ERROR("Write beyond end (%u)\n\r", altif);
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g_dfu.status = DFU_STATUS_errADDRESS;
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return DFU_RET_STALL;
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}
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switch (altif) {
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case ALTIF_APP:
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case ALTIF_FPGA:
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/* SAM3U Errata 46.2.1.3 */
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SetFlashWaitState(6);
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LED_Set(USBD_LEDOTHER);
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|
@ -302,13 +393,26 @@ int USBDFU_handle_dnload(uint8_t altif, unsigned int offset,
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/* SAM3U Errata 46.2.1.3 */
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SetFlashWaitState(2);
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if (rc != 0) {
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TRACE_ERROR("Error during write of DFU partition %u\n\r", altif);
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TRACE_ERROR("Write error (%u)\n\r", altif);
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g_dfu.status = DFU_STATUS_errPROG;
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return DFU_RET_STALL;
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}
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break;
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case ALTIF_FPGA:
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LED_Set(USBD_LEDOTHER);
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rc = fpgaFlash(offset, buf, len);
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LED_Clear(USBD_LEDOTHER);
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/* SAM3U Errata 46.2.1.3 */
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if (rc != 0) {
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TRACE_ERROR("FPGA error (ofs %d)\n\r", fpgaBufRPtr);
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g_dfu.status = DFU_STATUS_errPROG;
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return DFU_RET_STALL;
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}
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break;
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default:
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TRACE_WARNING("Write to DFU partition %u not implemented\n\r", altif);
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TRACE_WARNING("Not implemented (%u)\n\r", altif);
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g_dfu.status = DFU_STATUS_errTARGET;
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break;
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}
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|
@ -330,11 +434,11 @@ void dfu_drv_updstatus(void)
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*----------------------------------------------------------------------------*/
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extern void USBD_IrqHandler(void);
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|
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/*
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static const char *rst_type_strs[8] = {
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"General", "Backup", "Watchdog", "Softare", "User", "5", "6", "7"
|
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};
|
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|
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*/
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int main(void)
|
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{
|
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volatile uint8_t usbConn = 0;
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|
@ -342,12 +446,12 @@ int main(void)
|
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|
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TRACE_CONFIGURE(DBGU_STANDARD, 115200, BOARD_MCK);
|
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|
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printf("-- USB DFU Test %s --\n\r", SOFTPACK_VERSION);
|
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// printf("-- USB DFU Test %s --\n\r", SOFTPACK_VERSION);
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printf("-- %s\n\r", BOARD_NAME);
|
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printf("-- Compiled: %s %s --\n\r", __DATE__, __TIME__);
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// printf("-- Compiled: %s %s --\n\r", __DATE__, __TIME__);
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|
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rst_type = (RSTC_GetStatus() >> 8) & 0x7;
|
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printf("-- Reset type: %s --\n\r", rst_type_strs[rst_type]);
|
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//printf("-- Reset type: %s --\n\r", rst_type_strs[rst_type]);
|
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|
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chipid_to_usbserial();
|
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|
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|
|
|
@ -0,0 +1,135 @@
|
|||
|
||||
/**************************************************************
|
||||
*
|
||||
* Revision History of opcode.h
|
||||
*
|
||||
*
|
||||
* 09/11/07 NN Updated to support version 1.3
|
||||
* This version supported new POLING STATUS LOOP opcodes
|
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* for Flash programming of the Lattice FPGA devices
|
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* #define LOOP = 0x58
|
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* #define ENDLOOP = 0x59
|
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***************************************************************/
|
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|
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|
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/*************************************************************
|
||||
* *
|
||||
* LATTICE CABLE DEFINTIONS. *
|
||||
* *
|
||||
* Define these only if the lattice cable is being used. *
|
||||
* *
|
||||
*************************************************************/
|
||||
|
||||
#define pinTDI 1
|
||||
#define pinTCK 2
|
||||
#define pinTMS 4
|
||||
#define pinENABLE 8
|
||||
#define pinTRST 16
|
||||
#define pinCE 32
|
||||
#define pinTDO 64
|
||||
|
||||
/*************************************************************
|
||||
* *
|
||||
* ERROR DEFINITIONS *
|
||||
* *
|
||||
*************************************************************/
|
||||
|
||||
#define ERR_VERIFY_FAIL -1
|
||||
#define ERR_FIND_ALGO_FILE -2
|
||||
#define ERR_FIND_DATA_FILE -3
|
||||
#define ERR_WRONG_VERSION -4
|
||||
#define ERR_ALGO_FILE_ERROR -5
|
||||
#define ERR_DATA_FILE_ERROR -6
|
||||
#define ERR_OUT_OF_MEMORY -7
|
||||
|
||||
/*************************************************************
|
||||
* *
|
||||
* DATA TYPE REGISTER BIT DEFINITIONS *
|
||||
* *
|
||||
*************************************************************/
|
||||
|
||||
#define SIR_DATA 0x0001 /*** Current command is SIR ***/
|
||||
#define SDR_DATA 0x0002 /*** Current command is SDR ***/
|
||||
#define TDI_DATA 0x0004 /*** Command contains TDI ***/
|
||||
#define TDO_DATA 0x0008 /*** Command contains TDO ***/
|
||||
#define MASK_DATA 0x0010 /*** Command contains MASK ***/
|
||||
#define DTDI_DATA 0x0020 /*** Verification flow ***/
|
||||
#define DTDO_DATA 0x0040 /*** Verification flow ***/
|
||||
#define COMPRESS 0x0080 /*** Compressed data file ***/
|
||||
#define COMPRESS_FRAME 0x0100 /*** Compressed data frame ***/
|
||||
|
||||
/*************************************************************
|
||||
* *
|
||||
* USED JTAG STATE *
|
||||
* *
|
||||
*************************************************************/
|
||||
|
||||
#define RESET 0x00
|
||||
#define IDLE 0x01
|
||||
#define IRPAUSE 0x02
|
||||
#define DRPAUSE 0x03
|
||||
#define SHIFTIR 0x04
|
||||
#define SHIFTDR 0x05
|
||||
#define DRCAPTURE 0x06
|
||||
|
||||
/*************************************************************
|
||||
* *
|
||||
* VME OPCODE DEFINITIONS *
|
||||
* *
|
||||
* These are the opcodes found in the VME file. Although *
|
||||
* most of them are similar to SVF commands, a few opcodes *
|
||||
* are available only in VME format. *
|
||||
* *
|
||||
*************************************************************/
|
||||
|
||||
#define STATE 0x10
|
||||
#define SIR 0x11
|
||||
#define SDR 0x12
|
||||
#define TCK 0x1B
|
||||
#define WAIT 0x1A
|
||||
#define ENDDR 0x02
|
||||
#define ENDIR 0x03
|
||||
#define HIR 0x06
|
||||
#define TIR 0x07
|
||||
#define HDR 0x08
|
||||
#define TDR 0x09
|
||||
#define TDI 0x13
|
||||
#define CONTINUE 0x70
|
||||
#define TDO 0x14
|
||||
#define MASK 0x15
|
||||
#define LOOP 0x58
|
||||
#define ENDLOOP 0x59
|
||||
#define LCOUNT 0x66
|
||||
#define LDELAY 0x67
|
||||
#define LSDR 0x68
|
||||
#define ENDSTATE 0x69
|
||||
#define ENDVME 0x7F
|
||||
|
||||
/*************************************************************
|
||||
* *
|
||||
* Begin future opcodes at 0xA0 to avoid conflict with Full *
|
||||
* VME opcodes. *
|
||||
* *
|
||||
*************************************************************/
|
||||
|
||||
#define BEGIN_REPEAT 0xA0
|
||||
#define END_REPEAT 0xA1
|
||||
#define END_FRAME 0xA2
|
||||
#define DATA 0xA3
|
||||
#define PROGRAM 0xA4
|
||||
#define VERIFY 0xA5
|
||||
#define DTDI 0xA6
|
||||
#define DTDO 0xA7
|
||||
|
||||
/*************************************************************
|
||||
* *
|
||||
* Opcode for discrete pins toggling *
|
||||
* *
|
||||
*************************************************************/
|
||||
#define signalENABLE 0x1C /*assert the ispEN pin*/
|
||||
#define signalTMS 0x1D /*assert the MODE or TMS pin*/
|
||||
#define signalTCK 0x1E /*assert the SCLK or TCK pin*/
|
||||
#define signalTDI 0x1F /*assert the SDI or TDI pin*/
|
||||
#define signalTRST 0x20 /*assert the RESET or TRST pin*/
|
||||
#define signalTDO 0x21 /*assert the RESET or TDO pin*/
|
||||
#define signalCableEN 0x22 /*assert the RESET or CableEN pin*/
|
File diff suppressed because it is too large
Load Diff
Reference in New Issue