added DFU functionality for the FPGA - crudely removed stuff from the loader to make it fit into the 16k

This commit is contained in:
Christian Daniel 2012-05-17 22:47:51 +02:00
parent c46bad77e5
commit 5dcfd6a156
5 changed files with 1747 additions and 16 deletions

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@ -0,0 +1,226 @@
/**************************************************************
*
* Lattice Semiconductor Corp. Copyright 2008
*
*
***************************************************************/
/**************************************************************
*
* Revision History of hardware.c
*
*
* 09/11/07 NN type cast all the mismatch variables
***************************************************************/
#include <stdio.h>
#include <unistd.h>
#include "opcode.h"
#include "hardware.h"
/*************************************************************
* *
* EXTERNAL FUNCTION *
* *
*************************************************************/
extern void ispVMStateMachine( char a_cNextState );
/*************************************************************
* *
* READPORT *
* *
* INPUT: *
* None. *
* *
* RETURN: *
* Returns the bit read back from the device. *
* *
* DESCRIPTION: *
* This function is used to read the TDO pin from the *
* input port. *
* *
* NOTE: This function should be modified in an embedded *
* system! *
* *
*************************************************************/
int readPort()
{
uint32_t value;
value = *((volatile uint32_t*)(0x400e0e00 + 0x3c));
if(value & (1 << 6))
return 1;
else return 0;
}
/*************************************************************
* *
* WRITEPORT *
* *
* INPUT: *
* a_ucPins: a byte to indicate which pin will be *
* depending on the value. *
* *
* a_ucValue: the value to determine of the pin above *
* will be written out or not. *
* *
* RETURN: *
* None. *
* *
* DESCRIPTION: *
* To apply the specified value to the pins indicated. *
* This routine will likely be modified for specific *
* systems. As an example, this code is for the PC, as *
* described below. *
* *
* This routine uses the IBM-PC standard Parallel port, *
* along with the schematic shown in Lattice *
* documentation, to apply the signals to the programming *
* loop. *
* *
* NOTE: This function should be modified in an embedded *
* system! *
* *
*************************************************************/
void writePort( unsigned int a_ucPins, unsigned int a_ucValue )
{
uint32_t value = 0;
if(a_ucPins & pinTDI)
value |= (1 << 8);
if(a_ucPins & pinTCK)
value |= (1 << 7);
if(a_ucPins & pinTMS)
value |= (1 << 5);
if(a_ucValue)
*((volatile uint32_t*)(0x400e0e00 + 0x30)) = value;
else *((volatile uint32_t*)(0x400e0e00 + 0x34)) = value;
}
/*************************************************************
* *
* ISPVMDELAY *
* *
* INPUT: *
* a_uiDelay: delay in milliseconds *
* *
* RETURN: *
* None. *
* *
* DESCRIPTION: *
* The user must implement a delay to observe a_uiDelay, *
* where a_uiDelay is the number of milliseconds that must *
* pass before data is read from in_port. Since platforms and*
* processor speeds vary greatly, this task is left to the *
* user. This subroutine is called upon to provide a delay *
* from 1 millisecond to a few hundreds milliseconds each time*
* That is the reason behind using unsigned long integer in *
* this subroutine. It is OK to provide longer delay than *
* required. It is not acceptable if the delay is shorter than*
* required. *
* *
* Note: user must re - implement to target specific hardware.*
* *
* Example: Use the for loop to create the microsecond delay. *
* Loop 1K times to produce the milliseconds delay. *
* *
* Let the CPU clock (system clock) be F Mhz. *
* *
* Let the for loop represented by the 2 lines of *
* machine code: *
* LOOP: DEC RA; *
* JNZ LOOP; *
* Let the for loop number for one microsecond be L. *
* Lets assume 4 system clocks for each line of *
* machine code. *
* Then 1 us = 1/F (microseconds per clock) *
* x (2 lines) x (4 clocks per line) x L*
* = 8L/F *
* Or L = F/8; *
* *
* Convert the unit in microseconds to *
* milliseconds. *
* L = F/8 x 1000; *
* Lets assume the CPU clock is set to 48MHZ. The C *
* code then is: *
* *
* unsigned int F = 48; //MHZ. *
* unsigned int L = F/8; //microseconds. *
* unsigned int index, m; *
* *
* *
* if (L < 1) L = 1; //minimum is i microsecond. *
* for (index=0; index < a_uiDelay * L; index++) *
* { *
* //loop 1K times to produce milliseconds delay *
* for (m=0; m<1000; m++); //milliseconds *
* } *
* return 0; *
* *
* *
*************************************************************/
/* the unit of a_uiDelay is milliseconds */
void ispVMDelay( unsigned int a_uiDelay )
{
// yes, this is more or less calibrated - cd
volatile int i, j;
for(i = 0; i < a_uiDelay; i++) {
for(j = 0; j < 5000; j++)
asm("nop");
}
}
/*************************************************************
* *
* ENABLEHARDWARE *
* *
* INPUT: *
* None. *
* *
* RETURN: *
* None. *
* *
* DESCRIPTION: *
* This function is called to enable the hardware. *
* *
* NOTE: This function should be modified in an embedded *
* system! *
* *
*************************************************************/
void EnableHardware()
{
ispVMStateMachine(RESET);
}
/*************************************************************
* *
* DISABLEHARDWARE *
* *
* INPUT: *
* None. *
* *
* RETURN: *
* None. *
* *
* DESCRIPTION: *
* This function is called to disable the hardware. *
* *
* NOTE: This function should be modified in an embedded *
* system! *
* *
*************************************************************/
void DisableHardware()
{
ispVMStateMachine(RESET);
}

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@ -0,0 +1,11 @@
#ifndef INCLUDE_HARDWARE_H
#define INCLUDE_HARDWARE_H
#include <stdint.h>
const uint8_t* g_ispAlgo;
size_t g_ispAlgoSize;
const uint8_t* g_ispData;
size_t g_ispDataSize;
#endif // INCLUDE_HARDWARE_H

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@ -62,6 +62,8 @@
#include "dfu_desc.h"
#include "opcode.h"
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
/*----------------------------------------------------------------------------
@ -104,12 +106,12 @@ static void ISR_Vbus(const Pin *pPin)
/* Check current level on VBus */
if (PIO_Get(&pinVbus))
{
TRACE_INFO("VBUS conn\n\r");
//TRACE_INFO("VBUS conn\n\r");
USBD_Connect();
}
else
{
TRACE_INFO("VBUS discon\n\r");
//TRACE_INFO("VBUS discon\n\r");
USBD_Disconnect();
}
}
@ -133,7 +135,7 @@ static void VBus_Configure( void )
}
else
{
TRACE_INFO("discon\n\r");
//TRACE_INFO("discon\n\r");
USBD_Disconnect();
}
}
@ -209,7 +211,7 @@ void USBDCallbacks_RequestReceived(const USBGenericRequest *request)
void USBDDriverCallbacks_InterfaceSettingChanged(unsigned char interface,
unsigned char setting)
{
TRACE_INFO("DFU: IfSettingChgd(if=%u, alt=%u)\n\r", interface, setting);
//TRACE_INFO("DFU: IfSettingChgd(if=%u, alt=%u)\n\r", interface, setting);
}
#define BOOT_FLASH_SIZE (16 * 1024)
@ -233,8 +235,8 @@ static const struct flash_part flash_parts[] = {
.size = AT91C_IRAM_SIZE,
},
[ALTIF_FPGA] = {
.base_addr = AT91C_IFLASH1,
.size = AT91C_IFLASH1_SIZE,
.base_addr = 0,
.size = 16*1024*1024, // really no limit
},
};
@ -242,11 +244,13 @@ static const struct flash_part flash_parts[] = {
int USBDFU_handle_upload(uint8_t altif, unsigned int offset,
uint8_t *buf, unsigned int req_len)
{
return -EINVAL;
#if 0
struct flash_part *part;
void *end, *addr;
uint32_t real_len;
TRACE_INFO("DFU: handle_upload(%u, %u, %u)\n\r", altif, offset, req_len);
//TRACE_INFO("DFU: handle_upload(%u, %u, %u)\n\r", altif, offset, req_len);
if (altif > ARRAY_SIZE(flash_parts))
return -EINVAL;
@ -265,6 +269,94 @@ int USBDFU_handle_upload(uint8_t altif, unsigned int offset,
LED_Clear(USBD_LEDOTHER);
return real_len;
#endif
}
extern unsigned short g_usDataType;
static uint8_t fpgaBuf[1024];
static uint fpgaBufStart; // file offset of first byte in buffer
static uint fpgaBufEnd;
static uint fpgaBufFill;
static uint fpgaBufRPtr;
static uint fpgaPushedAddr;
short int ispProcessVME();
void EnableHardware();
void fpgaPushAddr()
{
fpgaPushedAddr = fpgaBufRPtr;
}
void fpgaPopAddr()
{
printf("*");
fpgaBufRPtr = fpgaPushedAddr;
}
uint8_t fpgaGetByte()
{
uint8_t res = fpgaBuf[fpgaBufRPtr - fpgaBufStart];
fpgaBufRPtr++;
return res;
}
static int fpgaFlash(unsigned int offset, const uint8_t* buf, unsigned int len)
{
int i;
if(offset == 0) {
for(i = 0; i < len; i++)
fpgaBuf[i] = buf[i];
fpgaBufStart = 0;
fpgaBufEnd = len;
fpgaBufFill = len;
fpgaBufRPtr = 0;
*((uint32_t*)(0x400e0410)) = (1 << 11);
*((uint32_t*)(0x400e0e00 + 0x44)) = (1 << 5) | (1 << 6) | (1 << 7) | (1 << 8);
*((uint32_t*)(0x400e0e00 + 0x60)) = (1 << 5) | (1 << 6) | (1 << 7) | (1 << 8);
*((uint32_t*)(0x400e0e00 + 0x54)) = (1 << 5) | (1 << 6) | (1 << 7) | (1 << 8);
*((uint32_t*)(0x400e0e00 + 0x10)) = (1 << 5) | (1 << 7) | (1 << 8);
*((uint32_t*)(0x400e0e00 + 0x00)) = (1 << 5) | (1 << 6) | (1 << 7) | (1 << 8);
if(fpgaGetByte())
g_usDataType = COMPRESS;
else g_usDataType = 0;
EnableHardware();
} else {
for(i = 0; i < len; i++)
fpgaBuf[fpgaBufFill + i] = buf[i];
fpgaBufEnd += len;
fpgaBufFill += len;
}
/*
printf("\n\rs:%d,e:%d,f:%d,r:%d,p:%d\n",
fpgaBufStart, fpgaBufEnd, fpgaBufFill, fpgaBufRPtr, fpgaPushedAddr);
*/
while(fpgaBufEnd - fpgaBufRPtr > 192) {
if((i = ispProcessVME()) < 0)
return -1;
}
if(fpgaBufFill > 384) {
uint moveby = fpgaBufFill - 384;
uint movelen = fpgaBufFill - movelen;
for(i = 0; i < movelen; i++)
fpgaBuf[i] = fpgaBuf[i + moveby];
fpgaBufStart += moveby;
fpgaBufFill -= moveby;
/*
printf("\n\rs:%d,e:%d,f:%d,r:%d,p:%d\n",
fpgaBufStart, fpgaBufEnd, fpgaBufFill, fpgaBufRPtr, fpgaPushedAddr);
*/
}
return 0;
}
/* DFU callback */
@ -286,14 +378,13 @@ int USBDFU_handle_dnload(uint8_t altif, unsigned int offset,
end = part->base_addr + part->size;
if (addr + len > end) {
TRACE_ERROR("Cannot write beyond end of DFU partition %u\n\r", altif);
TRACE_ERROR("Write beyond end (%u)\n\r", altif);
g_dfu.status = DFU_STATUS_errADDRESS;
return DFU_RET_STALL;
}
switch (altif) {
case ALTIF_APP:
case ALTIF_FPGA:
/* SAM3U Errata 46.2.1.3 */
SetFlashWaitState(6);
LED_Set(USBD_LEDOTHER);
@ -302,13 +393,26 @@ int USBDFU_handle_dnload(uint8_t altif, unsigned int offset,
/* SAM3U Errata 46.2.1.3 */
SetFlashWaitState(2);
if (rc != 0) {
TRACE_ERROR("Error during write of DFU partition %u\n\r", altif);
TRACE_ERROR("Write error (%u)\n\r", altif);
g_dfu.status = DFU_STATUS_errPROG;
return DFU_RET_STALL;
}
break;
case ALTIF_FPGA:
LED_Set(USBD_LEDOTHER);
rc = fpgaFlash(offset, buf, len);
LED_Clear(USBD_LEDOTHER);
/* SAM3U Errata 46.2.1.3 */
if (rc != 0) {
TRACE_ERROR("FPGA error (ofs %d)\n\r", fpgaBufRPtr);
g_dfu.status = DFU_STATUS_errPROG;
return DFU_RET_STALL;
}
break;
default:
TRACE_WARNING("Write to DFU partition %u not implemented\n\r", altif);
TRACE_WARNING("Not implemented (%u)\n\r", altif);
g_dfu.status = DFU_STATUS_errTARGET;
break;
}
@ -330,11 +434,11 @@ void dfu_drv_updstatus(void)
*----------------------------------------------------------------------------*/
extern void USBD_IrqHandler(void);
/*
static const char *rst_type_strs[8] = {
"General", "Backup", "Watchdog", "Softare", "User", "5", "6", "7"
};
*/
int main(void)
{
volatile uint8_t usbConn = 0;
@ -342,12 +446,12 @@ int main(void)
TRACE_CONFIGURE(DBGU_STANDARD, 115200, BOARD_MCK);
printf("-- USB DFU Test %s --\n\r", SOFTPACK_VERSION);
// printf("-- USB DFU Test %s --\n\r", SOFTPACK_VERSION);
printf("-- %s\n\r", BOARD_NAME);
printf("-- Compiled: %s %s --\n\r", __DATE__, __TIME__);
// printf("-- Compiled: %s %s --\n\r", __DATE__, __TIME__);
rst_type = (RSTC_GetStatus() >> 8) & 0x7;
printf("-- Reset type: %s --\n\r", rst_type_strs[rst_type]);
//printf("-- Reset type: %s --\n\r", rst_type_strs[rst_type]);
chipid_to_usbserial();

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@ -0,0 +1,135 @@
/**************************************************************
*
* Revision History of opcode.h
*
*
* 09/11/07 NN Updated to support version 1.3
* This version supported new POLING STATUS LOOP opcodes
* for Flash programming of the Lattice FPGA devices
* #define LOOP = 0x58
* #define ENDLOOP = 0x59
***************************************************************/
/*************************************************************
* *
* LATTICE CABLE DEFINTIONS. *
* *
* Define these only if the lattice cable is being used. *
* *
*************************************************************/
#define pinTDI 1
#define pinTCK 2
#define pinTMS 4
#define pinENABLE 8
#define pinTRST 16
#define pinCE 32
#define pinTDO 64
/*************************************************************
* *
* ERROR DEFINITIONS *
* *
*************************************************************/
#define ERR_VERIFY_FAIL -1
#define ERR_FIND_ALGO_FILE -2
#define ERR_FIND_DATA_FILE -3
#define ERR_WRONG_VERSION -4
#define ERR_ALGO_FILE_ERROR -5
#define ERR_DATA_FILE_ERROR -6
#define ERR_OUT_OF_MEMORY -7
/*************************************************************
* *
* DATA TYPE REGISTER BIT DEFINITIONS *
* *
*************************************************************/
#define SIR_DATA 0x0001 /*** Current command is SIR ***/
#define SDR_DATA 0x0002 /*** Current command is SDR ***/
#define TDI_DATA 0x0004 /*** Command contains TDI ***/
#define TDO_DATA 0x0008 /*** Command contains TDO ***/
#define MASK_DATA 0x0010 /*** Command contains MASK ***/
#define DTDI_DATA 0x0020 /*** Verification flow ***/
#define DTDO_DATA 0x0040 /*** Verification flow ***/
#define COMPRESS 0x0080 /*** Compressed data file ***/
#define COMPRESS_FRAME 0x0100 /*** Compressed data frame ***/
/*************************************************************
* *
* USED JTAG STATE *
* *
*************************************************************/
#define RESET 0x00
#define IDLE 0x01
#define IRPAUSE 0x02
#define DRPAUSE 0x03
#define SHIFTIR 0x04
#define SHIFTDR 0x05
#define DRCAPTURE 0x06
/*************************************************************
* *
* VME OPCODE DEFINITIONS *
* *
* These are the opcodes found in the VME file. Although *
* most of them are similar to SVF commands, a few opcodes *
* are available only in VME format. *
* *
*************************************************************/
#define STATE 0x10
#define SIR 0x11
#define SDR 0x12
#define TCK 0x1B
#define WAIT 0x1A
#define ENDDR 0x02
#define ENDIR 0x03
#define HIR 0x06
#define TIR 0x07
#define HDR 0x08
#define TDR 0x09
#define TDI 0x13
#define CONTINUE 0x70
#define TDO 0x14
#define MASK 0x15
#define LOOP 0x58
#define ENDLOOP 0x59
#define LCOUNT 0x66
#define LDELAY 0x67
#define LSDR 0x68
#define ENDSTATE 0x69
#define ENDVME 0x7F
/*************************************************************
* *
* Begin future opcodes at 0xA0 to avoid conflict with Full *
* VME opcodes. *
* *
*************************************************************/
#define BEGIN_REPEAT 0xA0
#define END_REPEAT 0xA1
#define END_FRAME 0xA2
#define DATA 0xA3
#define PROGRAM 0xA4
#define VERIFY 0xA5
#define DTDI 0xA6
#define DTDO 0xA7
/*************************************************************
* *
* Opcode for discrete pins toggling *
* *
*************************************************************/
#define signalENABLE 0x1C /*assert the ispEN pin*/
#define signalTMS 0x1D /*assert the MODE or TMS pin*/
#define signalTCK 0x1E /*assert the SCLK or TCK pin*/
#define signalTDI 0x1F /*assert the SDI or TDI pin*/
#define signalTRST 0x20 /*assert the RESET or TRST pin*/
#define signalTDO 0x21 /*assert the RESET or TDO pin*/
#define signalCableEN 0x22 /*assert the RESET or CableEN pin*/

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