patches: Import the actual patches to build the image
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
This commit is contained in:
parent
92c58e659e
commit
c551d5f1d6
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@ -0,0 +1,12 @@
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diff --git a/board/pluto/post-build.sh b/board/pluto/post-build.sh
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index 8c3386e..6a7e5dd 100755
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--- a/board/pluto/post-build.sh
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+++ b/board/pluto/post-build.sh
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@@ -69,3 +69,7 @@ ln -sf ../../wpa_supplicant/ifupdown.sh ${TARGET_DIR}/etc/network/if-pre-up.d/wp
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ln -sf ../../wpa_supplicant/ifupdown.sh ${TARGET_DIR}/etc/network/if-post-down.d/wpasupplicant
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ln -sf device_reboot ${TARGET_DIR}/usr/sbin/pluto_reboot
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+
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+# Install SSH key
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+mkdir -p ${TARGET_DIR}/root/.ssh
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+echo "ssh-rsa PUT_YOUR_KEY_HERE user@machine.com" > ${TARGET_DIR}/root/.ssh/authorized_keys
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@ -0,0 +1,51 @@
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diff --git a/board/pluto/S23udc b/board/pluto/S23udc
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index 19e97fa..3ba9173 100644
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--- a/board/pluto/S23udc
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+++ b/board/pluto/S23udc
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@@ -66,7 +66,7 @@ case "$1" in
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mkdir -p $GADGET/functions/ffs.iio_ffs
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mkdir -p $GADGET/functions/acm.usb0
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- mkdir -p $GADGET/functions/rndis.0
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+ mkdir -p $GADGET/functions/ecm.0
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mkdir -p $GADGET/functions/mass_storage.0
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# echo /opt/vfat.img > $GADGET/functions/mass_storage.0/lun.0/file
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@@ -75,15 +75,15 @@ case "$1" in
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host_addr=`echo -n 00:E0:22; echo $sha1 | dd bs=1 count=6 2>/dev/null | hexdump -v -e '/1 ":%01c""%c"'`
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dev_addr=`echo -n 00:05:F7; echo $sha1 | dd bs=1 count=6 skip=6 2>/dev/null | hexdump -v -e '/1 ":%01c""%c"'`
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- echo $host_addr > $GADGET/functions/rndis.0/host_addr
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- echo $dev_addr > $GADGET/functions/rndis.0/dev_addr
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+ echo $host_addr > $GADGET/functions/ecm.0/host_addr
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+ echo $dev_addr > $GADGET/functions/ecms.0/dev_addr
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mkdir -p $GADGET/configs/c.1
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mkdir -p $GADGET/configs/c.1/strings/0x409
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- echo "RNDIS/MSD/ACM/IIOUSBD" > $GADGET/configs/c.1/strings/0x409/configuration
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+ echo "ECM/MSD/ACM/IIOUSBD" > $GADGET/configs/c.1/strings/0x409/configuration
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echo 500 > $GADGET/configs/c.1/MaxPower
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- ln -s $GADGET/functions/rndis.0 $GADGET/configs/c.1
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+ ln -s $GADGET/functions/ecm.0 $GADGET/configs/c.1
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ln -s $GADGET/functions/mass_storage.0 $GADGET/configs/c.1
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ln -s $GADGET/functions/acm.usb0 $GADGET/configs/c.1
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ln -s $GADGET/functions/ffs.iio_ffs $GADGET/configs/c.1/ffs.iio_ffs
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@@ -113,7 +113,7 @@ case "$1" in
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echo "" > $GADGET/UDC
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start-stop-daemon -K -q -p /var/run/iiod.pid 2>/dev/null
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- rm $GADGET/configs/c.1/rndis.0
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+ rm $GADGET/configs/c.1/ecm.0
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rm $GADGET/configs/c.1/mass_storage.0
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rm $GADGET/configs/c.1/acm.usb0
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rm $GADGET/configs/c.1/ffs.iio_ffs
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@@ -124,7 +124,7 @@ case "$1" in
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rmdir $GADGET/functions/ffs.iio_ffs
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#rmdir $GADGET/functions/acm.usb0
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- rmdir $GADGET/functions/rndis.0
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+ rmdir $GADGET/functions/ecm.0
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rmdir $GADGET/functions/mass_storage.0
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rmdir $GADGET 2> /dev/null
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@ -0,0 +1,22 @@
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diff --git a/configs/zynq_pluto_defconfig b/configs/zynq_pluto_defconfig
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index 483ddbe..21cd959 100644
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--- a/configs/zynq_pluto_defconfig
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+++ b/configs/zynq_pluto_defconfig
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@@ -1,13 +1,13 @@
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BR2_arm=y
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BR2_cortex_a9=y
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BR2_ARM_ENABLE_NEON=y
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+BR2_ARM_ENABLE_VFP=y
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BR2_ARM_FPU_NEON=y
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BR2_TOOLCHAIN_EXTERNAL=y
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BR2_TOOLCHAIN_EXTERNAL_CUSTOM=y
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-BR2_TOOLCHAIN_EXTERNAL_PATH=""
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-BR2_TOOLCHAIN_EXTERNAL_CUSTOM_PREFIX="arm-xilinx-linux-gnueabi"
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-BR2_TOOLCHAIN_EXTERNAL_GCC_4_9=y
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-BR2_TOOLCHAIN_EXTERNAL_HEADERS_3_19=y
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+BR2_TOOLCHAIN_EXTERNAL_CUSTOM_PREFIX="arm-linux-gnueabihf"
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+BR2_TOOLCHAIN_EXTERNAL_GCC_6=y
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+BR2_TOOLCHAIN_EXTERNAL_HEADERS_4_9=y
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BR2_TOOLCHAIN_EXTERNAL_CUSTOM_GLIBC=y
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BR2_TOOLCHAIN_EXTERNAL_CXX=y
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BR2_TARGET_GENERIC_HOSTNAME="pluto"
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@ -0,0 +1,270 @@
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diff --git a/library/axi_ad9361/Makefile b/library/axi_ad9361/Makefile
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index 5f239f2..70395b8 100644
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--- a/library/axi_ad9361/Makefile
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+++ b/library/axi_ad9361/Makefile
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@@ -28,6 +28,8 @@ GENERIC_DEPS += ../common/up_delay_cntrl.v
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GENERIC_DEPS += ../common/up_tdd_cntrl.v
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GENERIC_DEPS += ../common/up_xfer_cntrl.v
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GENERIC_DEPS += ../common/up_xfer_status.v
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+GENERIC_DEPS += ../common/sig_combine.v
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+GENERIC_DEPS += ../common/sig_delay.v
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GENERIC_DEPS += axi_ad9361.v
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GENERIC_DEPS += axi_ad9361_rx.v
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GENERIC_DEPS += axi_ad9361_rx_channel.v
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diff --git a/library/axi_ad9361/axi_ad9361.v b/library/axi_ad9361/axi_ad9361.v
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index fac7dab..7b6931c 100644
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--- a/library/axi_ad9361/axi_ad9361.v
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+++ b/library/axi_ad9361/axi_ad9361.v
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@@ -671,6 +671,14 @@ module axi_ad9361 #(
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.dac_valid_q1 (dac_valid_q1_s),
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.dac_data_q1 (dac_data_q1),
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.dac_dunf(dac_dunf),
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+ .adc_valid_i0(adc_valid_i0_int),
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+ .adc_data_i0(adc_data_i0_int),
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+ .adc_valid_q0(adc_valid_q0_int),
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+ .adc_data_q0(adc_data_q0_int),
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+ .adc_valid_i1(adc_valid_i1_int),
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+ .adc_data_i1(adc_data_i1_int),
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+ .adc_valid_q1(adc_valid_q1_int),
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+ .adc_data_q1(adc_data_q1_int),
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.up_pps_rcounter (up_pps_rcounter_s),
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.up_pps_status (up_pps_status_s),
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.up_pps_irq_mask (dac_up_pps_irq_mask_s),
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diff --git a/library/axi_ad9361/axi_ad9361_hw.tcl b/library/axi_ad9361/axi_ad9361_hw.tcl
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index d493bd4..8cd6d93 100644
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--- a/library/axi_ad9361/axi_ad9361_hw.tcl
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+++ b/library/axi_ad9361/axi_ad9361_hw.tcl
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@@ -30,6 +30,8 @@ ad_ip_files axi_ad9361 [list\
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$ad_hdl_dir/library/common/up_dac_common.v \
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$ad_hdl_dir/library/common/up_dac_channel.v \
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$ad_hdl_dir/library/common/up_tdd_cntrl.v \
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+ $ad_hdl_dir/library/common/sig_combine.v \
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+ $ad_hdl_dir/library/common/sig_delay.v \
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altera/axi_ad9361_lvds_if_10.v \
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altera/axi_ad9361_lvds_if_c5.v \
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altera/axi_ad9361_lvds_if.v \
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diff --git a/library/axi_ad9361/axi_ad9361_ip.tcl b/library/axi_ad9361/axi_ad9361_ip.tcl
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index 35ceed1..262bff7 100644
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--- a/library/axi_ad9361/axi_ad9361_ip.tcl
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+++ b/library/axi_ad9361/axi_ad9361_ip.tcl
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@@ -33,6 +33,8 @@ adi_ip_files axi_ad9361 [list \
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"$ad_hdl_dir/library/common/up_dac_common.v" \
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"$ad_hdl_dir/library/common/up_dac_channel.v" \
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"$ad_hdl_dir/library/common/up_tdd_cntrl.v" \
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+ "$ad_hdl_dir/library/common/sig_combine.v" \
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+ "$ad_hdl_dir/library/common/sig_delay.v" \
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"$ad_hdl_dir/library/xilinx/common/up_xfer_cntrl_constr.xdc" \
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"$ad_hdl_dir/library/common/ad_pps_receiver_constr.ttcl" \
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"$ad_hdl_dir/library/xilinx/common/ad_rst_constr.xdc" \
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diff --git a/library/axi_ad9361/axi_ad9361_tx.v b/library/axi_ad9361/axi_ad9361_tx.v
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index 83959c2..7e11e03 100644
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--- a/library/axi_ad9361/axi_ad9361_tx.v
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+++ b/library/axi_ad9361/axi_ad9361_tx.v
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@@ -92,6 +92,16 @@ module axi_ad9361_tx #(
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input [15:0] dac_data_q1,
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input dac_dunf,
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+ // loopback
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+ input adc_valid_i0,
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+ input [15:0] adc_data_i0,
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+ input adc_valid_q0,
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+ input [15:0] adc_data_q0,
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+ input adc_valid_i1,
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+ input [15:0] adc_data_i1,
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+ input adc_valid_q1,
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+ input [15:0] adc_data_q1,
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+
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// gpio
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input [31:0] up_dac_gpio_in,
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@@ -227,6 +237,7 @@ module axi_ad9361_tx #(
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.dac_rst (dac_rst),
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.dac_valid (dac_valid_int),
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.dma_data (dac_data_i0),
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+ .dma_rx_data (adc_data_i0),
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.adc_data (adc_data[11:0]),
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.dac_data (dac_data[11:0]),
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.dac_data_out (dac_data_int_s[11:0]),
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@@ -262,6 +273,7 @@ module axi_ad9361_tx #(
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.dac_rst (dac_rst),
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.dac_valid (dac_valid_int),
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.dma_data (dac_data_q0),
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+ .dma_rx_data (adc_data_q0),
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.adc_data (adc_data[23:12]),
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.dac_data (dac_data[23:12]),
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.dac_data_out (dac_data_int_s[23:12]),
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@@ -297,6 +309,7 @@ module axi_ad9361_tx #(
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.dac_rst (dac_rst),
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.dac_valid (dac_valid_int),
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.dma_data (dac_data_i1),
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+ .dma_rx_data (adc_data_i1),
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.adc_data (adc_data[35:24]),
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.dac_data (dac_data[35:24]),
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.dac_data_out (dac_data_int_s[35:24]),
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@@ -332,6 +345,7 @@ module axi_ad9361_tx #(
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.dac_rst (dac_rst),
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.dac_valid (dac_valid_int),
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.dma_data (dac_data_q1),
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+ .dma_rx_data (adc_data_q1),
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.adc_data (adc_data[47:36]),
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.dac_data (dac_data[47:36]),
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.dac_data_out (dac_data_int_s[47:36]),
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diff --git a/library/axi_ad9361/axi_ad9361_tx_channel.v b/library/axi_ad9361/axi_ad9361_tx_channel.v
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index f85d758..96f3c71 100644
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--- a/library/axi_ad9361/axi_ad9361_tx_channel.v
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+++ b/library/axi_ad9361/axi_ad9361_tx_channel.v
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@@ -55,6 +55,7 @@ module axi_ad9361_tx_channel #(
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input dac_rst,
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input dac_valid,
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input [15:0] dma_data,
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+ input [15:0] dma_rx_data,
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input [11:0] adc_data,
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output [11:0] dac_data,
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output [11:0] dac_data_out,
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@@ -114,10 +115,16 @@ module axi_ad9361_tx_channel #(
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wire dac_iqcor_enb_s;
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wire [15:0] dac_iqcor_coeff_1_s;
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wire [15:0] dac_iqcor_coeff_2_s;
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+ wire [15:0] dac_rfloop_delay_s;
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+ wire [15:0] dac_rfloop_scale_s;
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wire up_wack_s;
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wire up_rack_s;
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wire [31:0] up_rdata_s;
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+ wire [11:0] delayed_rx_data;
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+ wire [11:0] rflb_data;
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+
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+
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// standard prbs functions
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function [23:0] pn1fn;
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@@ -250,7 +257,7 @@ module axi_ad9361_tx_channel #(
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assign dac_data = (DISABLE == 1) ? 12'd0 : dac_data_int;
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always @(posedge dac_clk) begin
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- dac_enable_int <= (dac_data_sel_s == 4'h2) ? 1'b1 : 1'b0;
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+ dac_enable_int <= ((dac_data_sel_s == 4'h2) || (dac_data_sel_s[3] == 1'b1)) ? 1'b1 : 1'b0;
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if (dac_iqcor_valid_s == 1'b1) begin
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dac_data_int <= dac_iqcor_data_s[15:4];
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end
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@@ -276,6 +283,10 @@ module axi_ad9361_tx_channel #(
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|
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always @(posedge dac_clk) begin
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case (dac_data_sel_s)
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+ 4'hd: dac_data_out_int <= dma_data[15:4];
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+ 4'hc: dac_data_out_int <= dma_rx_data[11:0];
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+ 4'hb: dac_data_out_int <= delayed_rx_data;
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+ 4'ha: dac_data_out_int <= rflb_data;
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4'h9: dac_data_out_int <= dac_pn_data;
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4'h8: dac_data_out_int <= adc_data;
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4'h3: dac_data_out_int <= 12'd0;
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@@ -337,6 +348,33 @@ module axi_ad9361_tx_channel #(
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.tone_2_freq_word (dac_dds_incr_2_s),
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.dac_dds_data (dac_dds_data_s));
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+ // RF Loopback chain
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+ // Delay
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+ sig_delay #(
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+ .WIDTH(12)
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|
+ ) rflb_delay_I (
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+ .data_valid(dac_valid),
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+ .data_in(dma_rx_data[11:0]),
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+ .data_out(delayed_rx_data),
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+ .delay(dac_rfloop_delay_s[14:0]),
|
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+ .clk(dac_clk),
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|
+ .rst(dac_rst)
|
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|
+ );
|
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+
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+ // Combining
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|
+ sig_combine #(
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|
+ .D_WIDTH(12),
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|
+ .S_WIDTH(16),
|
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|
+ .S_FRAC(14)
|
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|
+ ) rflb_combine_I (
|
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|
+ .in_data_0(delayed_rx_data),
|
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|
+ .in_scale_0(dac_rfloop_scale_s),
|
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|
+ .in_chain_0(dma_data[15:4]),
|
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|
+ .out_3(rflb_data),
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|
+ .clk(dac_clk),
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+ .rst(dac_rst)
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|
+ );
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+
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// single channel processor
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assign up_wack = (DISABLE == 1) ? 1'd0 : up_wack_s;
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@@ -365,6 +403,8 @@ module axi_ad9361_tx_channel #(
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|
.dac_iqcor_enb (dac_iqcor_enb_s),
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.dac_iqcor_coeff_1 (dac_iqcor_coeff_1_s),
|
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.dac_iqcor_coeff_2 (dac_iqcor_coeff_2_s),
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|
+ .dac_rfloop_delay (dac_rfloop_delay_s),
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||||||
|
+ .dac_rfloop_scale (dac_rfloop_scale_s),
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.up_usr_datatype_be (),
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|
.up_usr_datatype_signed (),
|
||||||
|
.up_usr_datatype_shift (),
|
||||||
|
diff --git a/library/common/up_dac_channel.v b/library/common/up_dac_channel.v
|
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|
index 8c20ad7..9d0f779 100644
|
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|
--- a/library/common/up_dac_channel.v
|
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|
+++ b/library/common/up_dac_channel.v
|
||||||
|
@@ -62,6 +62,8 @@ module up_dac_channel #(
|
||||||
|
output dac_iqcor_enb,
|
||||||
|
output [15:0] dac_iqcor_coeff_1,
|
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|
output [15:0] dac_iqcor_coeff_2,
|
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|
+ output [15:0] dac_rfloop_delay,
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|
+ output [15:0] dac_rfloop_scale,
|
||||||
|
|
||||||
|
// user controls
|
||||||
|
|
||||||
|
@@ -110,6 +112,8 @@ module up_dac_channel #(
|
||||||
|
reg [ 3:0] up_dac_data_sel = 'd0;
|
||||||
|
reg [15:0] up_dac_iqcor_coeff_1 = 'd0;
|
||||||
|
reg [15:0] up_dac_iqcor_coeff_2 = 'd0;
|
||||||
|
+ reg [15:0] up_dac_rfloop_delay = 'd0;
|
||||||
|
+ reg [15:0] up_dac_rfloop_scale = 'd0;
|
||||||
|
reg up_usr_datatype_be_int = 'd0;
|
||||||
|
reg up_usr_datatype_signed_int = 'd0;
|
||||||
|
reg [ 7:0] up_usr_datatype_shift_int = 'd0;
|
||||||
|
@@ -325,6 +329,18 @@ module up_dac_channel #(
|
||||||
|
end
|
||||||
|
end
|
||||||
|
|
||||||
|
+ always @(negedge up_rstn or posedge up_clk) begin
|
||||||
|
+ if (up_rstn == 0) begin
|
||||||
|
+ up_dac_rfloop_delay <= 'd0;
|
||||||
|
+ up_dac_rfloop_scale <= 'd0;
|
||||||
|
+ end else begin
|
||||||
|
+ if ((up_wreq_s == 1'b1) && (up_waddr[3:0] == 4'hf)) begin
|
||||||
|
+ up_dac_rfloop_delay <= up_wdata[31:16];
|
||||||
|
+ up_dac_rfloop_scale <= up_wdata[15:0];
|
||||||
|
+ end
|
||||||
|
+ end
|
||||||
|
+ end
|
||||||
|
+
|
||||||
|
// processor read interface
|
||||||
|
|
||||||
|
assign up_rack = up_rack_int;
|
||||||
|
@@ -351,6 +367,7 @@ module up_dac_channel #(
|
||||||
|
dac_usr_datatype_bits};
|
||||||
|
4'h9: up_rdata_int <= { dac_usr_interpolation_m, dac_usr_interpolation_n};
|
||||||
|
4'ha: up_rdata_int <= { 30'd0, up_dac_iq_mode};
|
||||||
|
+ 4'hf: up_rdata_int <= { up_dac_rfloop_delay, up_dac_rfloop_scale};
|
||||||
|
default: up_rdata_int <= 0;
|
||||||
|
endcase
|
||||||
|
end else begin
|
||||||
|
@@ -398,6 +415,8 @@ module up_dac_channel #(
|
||||||
|
up_dac_iqcor_enb,
|
||||||
|
up_dac_iqcor_coeff_tc_1,
|
||||||
|
up_dac_iqcor_coeff_tc_2,
|
||||||
|
+ up_dac_rfloop_delay,
|
||||||
|
+ up_dac_rfloop_scale,
|
||||||
|
up_dac_dds_scale_tc_1,
|
||||||
|
up_dac_dds_init_1,
|
||||||
|
up_dac_dds_incr_1,
|
||||||
|
@@ -414,6 +433,8 @@ module up_dac_channel #(
|
||||||
|
dac_iqcor_enb,
|
||||||
|
dac_iqcor_coeff_1,
|
||||||
|
dac_iqcor_coeff_2,
|
||||||
|
+ dac_rfloop_delay,
|
||||||
|
+ dac_rfloop_scale,
|
||||||
|
dac_dds_scale_1,
|
||||||
|
dac_dds_init_1,
|
||||||
|
dac_dds_incr_1,
|
Loading…
Reference in New Issue