mirror of https://gerrit.osmocom.org/libusrp
Oliver Smith
2d98f87ade
Generate the soname from LIBVERSION (initially 1:0:0), instead of VERSION. This means, we have binary compatibility between each major release (which we should increase if we ever have a breaking change), instead of forcing a binary incompatibility for each packaged version (also nightly packages). This is how we do it in other Osmocom projects, too. Fix nightly RPM packaging, as we now don't need to add the git commit to the package name: [ 135s] libusrp.i586: E: shlib-policy-name-error (Badness: 10000) libusrp-3_4_4_4_c46f0 [ 135s] Your package contains a single shared library but is not named after its [ 135s] SONAME. The debian package is already using libusrp1 as package name. Related: https://osmocom.org/projects/cellular-infrastructure/wiki/Make_a_new_release Change-Id: I73b222ea7e2fd0117827f9d6f28b23671068533b |
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contrib | ||
debian | ||
doc | ||
firmware | ||
fpga | ||
host | ||
m4 | ||
.gitignore | ||
.gitreview | ||
Makefile.am | ||
Makefile.common | ||
Makefile.par.gen | ||
Makefile.swig | ||
Makefile.swig.gen.t | ||
README | ||
TODO-RELEASE | ||
configure.ac | ||
git-version-gen | ||
usrp.inf | ||
usrp.iss.in | ||
usrp.pc.in |
README
# # README -- the short version # The top level makefile handles the host code and FX2 firmware. Besides the normal gcc suite and all the auto tools, you'll need the SDCC free C compiler to build the firmware. You MUST USE VERSION 2.4.0 or VERSION 2.5.0 due to some problems with variable initialization. http://sdcc.sourceforge.net The high level interface to the USRP using our standard FPGA bitstram is contained in usrp/host/lib/usrp_standard.h If you've got doxygen installed, there are html docs in usrp/doc/html/index.html # Compiling the verilog (not required unless you're modifying it) If you want to build the FPGA .rbf file from source (not required; we provide pre-compiled .rbf files in usrp/fpga/rbf directory), you'll need Altera's no cost Quartus II development tools. We're currently building with Quartus II 5.1sp1 Web Edition. The project file is usrp/fpga/toplevel/usrp_std/usrp_std.qpf. The toplevel verilog file is usrp/fpga/toplevel/usrp_std/usrp_std.v. The bulk of the verilog modules are contained in usrp/fpga/sdr_lib