mirror of https://gerrit.osmocom.org/libusrp
130 lines
4.5 KiB
Python
130 lines
4.5 KiB
Python
#!/usr/bin/env python
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#
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# This is mrfm_fft_sos.py
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# Modification of Matt's mrfm_fft.py that reads filter coefs from file
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#
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# Copyright 2004,2005 Free Software Foundation, Inc.
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#
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# This file is part of GNU Radio
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#
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# GNU Radio is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3, or (at your option)
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# any later version.
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#
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# GNU Radio is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with GNU Radio; see the file COPYING. If not, write to
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# the Free Software Foundation, Inc., 51 Franklin Street,
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# Boston, MA 02110-1301, USA.
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#
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from gnuradio import gr, gru
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from gnuradio import usrp
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class source_c(usrp.source_c):
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def __init__(self,fpga_filename):
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usrp.source_c.__init__(self,which=0, decim_rate=64, nchan=2, mux=0x32103210, mode=0,
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fpga_filename=fpga_filename)
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self._write_9862(0,2,0x80) # Bypass ADC buffer, minimum gain
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self._write_9862(0,3,0x80) # Bypass ADC buffer, minimum gain
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self._write_9862(0,8,0) # TX PWR Down
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self._write_9862(0,10,0) # DAC offset
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self._write_9862(0,11,0) # DAC offset
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self._write_9862(0,14,0x80) # gain
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self._write_9862(0,16,0xff) # pga
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self._write_9862(0,18,0x0c) # TX IF
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self._write_9862(0,19,0x01) # TX Digital
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self._write_9862(0,20,0x00) # TX Mod
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# max/min values are +/-2, so scale is set to make 2 = 32767
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self._write_fpga_reg(69,0x0e) # debug mux
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self._write_fpga_reg(5,-1)
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self._write_fpga_reg(7,-1)
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self._write_oe(0,0xffff, 0xffff)
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self._write_oe(1,0xffff, 0xffff)
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self._write_fpga_reg(14,0xf)
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self.decim = None
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def set_coeffs(self,frac_bits,b20,b10,b00,a20,a10,b21,b11,b01,a21,a11):
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def make_val(address,value):
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return (address << 16) | (value & 0xffff)
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# gain, scale already included in a's and b's from file
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self._write_fpga_reg(67,make_val(1,b20))
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self._write_fpga_reg(67,make_val(2,b10))
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self._write_fpga_reg(67,make_val(3,b00))
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self._write_fpga_reg(67,make_val(4,a20))
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self._write_fpga_reg(67,make_val(5,a10))
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self._write_fpga_reg(67,make_val(7,b21))
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self._write_fpga_reg(67,make_val(8,b11))
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self._write_fpga_reg(67,make_val(9,b01))
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self._write_fpga_reg(67,make_val(10,a21))
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self._write_fpga_reg(67,make_val(11,a11))
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self._write_fpga_reg(68,frac_bits) # Shift
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print "Biquad 0 : b2=%d b1=%d b0=%d a2=%d a1=%d" % (b20,b10,b00,a20,a10)
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print "Biquad 1 : b2=%d b1=%d b0=%d a2=%d a1=%d" % (b21,b11,b01,a21,a11)
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def set_decim_rate(self,rate=None):
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i=2
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turn=1
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a=1
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b=1
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while (rate>1) and (i<257):
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if (rate/i) * i == rate:
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if turn == 1:
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if a*i<257:
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a = a * i
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turn = 0
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elif b*i<257:
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b = b * i
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turn = 0
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else:
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print "Failed to set DECIMATOR"
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return self.decim
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elif b*i<257:
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b = b * i
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turn = 1
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elif a*i<257:
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a = a * i
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turn = 1
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else:
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print "Failed to set DECIMATOR"
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return self.decim
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rate=rate/i
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continue
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i = i + 1
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if rate > 1:
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print "Failed to set DECIMATOR"
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return self.decim
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else:
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self.decim = a*b
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print "a = %d b = %d" % (a,b)
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self._write_fpga_reg(64,(a-1)*256+(b-1)) # Set actual decimation
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def decim_rate(self):
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return self.decim
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def set_center_freq(self,freq):
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self._write_fpga_reg(65,int(-freq/64e6*65536*65536)) # set center freq
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def set_compensator(self,a11,a12,a21,a22,shift):
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self._write_fpga_reg(70,a11)
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self._write_fpga_reg(71,a12)
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self._write_fpga_reg(72,a21)
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self._write_fpga_reg(73,a22)
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self._write_fpga_reg(74,shift) # comp shift
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