mirror of https://gerrit.osmocom.org/libusrp
117 lines
3.0 KiB
C
117 lines
3.0 KiB
C
/* -*- c++ -*- */
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/*
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* Copyright 2004 Free Software Foundation, Inc.
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*
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* This file is part of GNU Radio
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*
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* GNU Radio is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3, or (at your option)
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* any later version.
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*
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* GNU Radio is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with GNU Radio; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#include "usrp_common.h"
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#include "usrp_commands.h"
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#include "spi.h"
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/*
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* the host side fpga loader code pushes an MD5 hash of the bitstream
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* into hash1.
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*/
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#define USRP_HASH_SIZE 16
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xdata at USRP_HASH_SLOT_0_ADDR unsigned char hash0[USRP_HASH_SIZE];
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#define enable_codecs() USRP_PA &= ~(bmPA_SEN_CODEC_A | bmPA_SEN_CODEC_B)
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#define disable_all() USRP_PA |= (bmPA_SEN_CODEC_A | bmPA_SEN_CODEC_B)
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static void
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write_byte_msb (unsigned char v);
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void
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write_both_9862s (unsigned char header_lo, unsigned char v)
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{
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enable_codecs ();
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write_byte_msb (header_lo);
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write_byte_msb (v);
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disable_all ();
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}
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// ----------------------------------------------------------------
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static void
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write_byte_msb (unsigned char v)
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{
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unsigned char n = 8;
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do {
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v = (v << 1) | (v >> 7); // rotate left (MSB into bottom bit)
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bitS_OUT = v & 0x1;
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bitS_CLK = 1;
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bitS_CLK = 0;
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} while (--n != 0);
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}
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// ----------------------------------------------------------------
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#define REG_RX_PWR_DN 1
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#define REG_TX_PWR_DN 8
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#define REG_TX_MODULATOR 20
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void eeprom_init (void)
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{
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unsigned short counter;
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unsigned char i;
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// configure IO ports (B and D are used by GPIF)
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IOA = bmPORT_A_INITIAL; // Port A initial state
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OEA = bmPORT_A_OUTPUTS; // Port A direction register
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IOC = bmPORT_C_INITIAL; // Port C initial state
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OEC = bmPORT_C_OUTPUTS; // Port C direction register
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IOE = bmPORT_E_INITIAL; // Port E initial state
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OEE = bmPORT_E_OUTPUTS; // Port E direction register
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EP0BCH = 0; SYNCDELAY;
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// USBCS &= ~bmRENUM; // chip firmware handles commands
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USBCS = 0; // chip firmware handles commands
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USRP_PC &= ~bmPC_nRESET; // active low reset
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USRP_PC |= bmPC_nRESET;
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// init_spi ();
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bitS_OUT = 0; /* idle state has CLK = 0 */
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write_both_9862s (REG_RX_PWR_DN, 0x01);
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write_both_9862s (REG_TX_PWR_DN, 0x0f); // pwr dn digital and analog_both
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write_both_9862s (REG_TX_MODULATOR, 0x00); // coarse & fine modulators disabled
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// zero firmware hash slot
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i = 0;
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do {
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hash0[i] = 0;
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i++;
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} while (i != USRP_HASH_SIZE);
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counter = 0;
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while (1){
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counter++;
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if (counter & 0x8000)
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IOC ^= bmPC_LED0;
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}
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}
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