From 99a9de4013f624dbf6f321368294f72e776400b6 Mon Sep 17 00:00:00 2001 From: jcorgan Date: Thu, 3 Aug 2006 04:51:51 +0000 Subject: [PATCH] Houston, we have a trunk. git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@3122 221aa14e-8319-0410-a670-987f0aec2ac5 --- AUTHORS | 4 + ChangeLog | 1055 +++++ Makefile.am | 25 + README | 37 + doc/Doxyfile.in | 1167 ++++++ doc/Makefile.am | 79 + doc/ddc.eps | 3105 +++++++++++++++ doc/ddc.png | Bin 0 -> 42199 bytes doc/other/Makefile.am | 25 + doc/other/mainpage.dox | 9 + doc/usrp-block-diagram.eps | 2785 +++++++++++++ doc/usrp-block-diagram.png | Bin 0 -> 35729 bytes doc/usrp.jpg | Bin 0 -> 114386 bytes doc/usrp_guide.xml | 399 ++ firmware/Makefile.am | 22 + firmware/include/Makefile.am | 59 + firmware/include/delay.h | 38 + firmware/include/fpga_regs0.h | 42 + firmware/include/fpga_regs_common.h | 147 + firmware/include/fpga_regs_common.v | 114 + firmware/include/fpga_regs_standard.h | 284 ++ firmware/include/fpga_regs_standard.v | 240 ++ firmware/include/fx2regs.h | 716 ++++ firmware/include/fx2utils.h | 31 + firmware/include/generate_regs.py | 57 + firmware/include/i2c.h | 32 + firmware/include/isr.h | 172 + firmware/include/syncdelay.h | 65 + firmware/include/timer.h | 35 + firmware/include/usb_common.h | 37 + firmware/include/usb_descriptors.h | 40 + firmware/include/usb_requests.h | 88 + firmware/include/usrp_commands.h | 99 + firmware/include/usrp_config.h | 44 + firmware/include/usrp_i2c_addr.h | 78 + firmware/include/usrp_ids.h | 53 + firmware/include/usrp_interfaces.h | 47 + firmware/include/usrp_spi_defs.h | 86 + firmware/lib/Makefile.am | 83 + firmware/lib/delay.c | 76 + firmware/lib/fx2utils.c | 54 + firmware/lib/i2c-compiler-bug.c | 129 + firmware/lib/i2c.c | 123 + firmware/lib/isr.c | 167 + firmware/lib/timer.c | 49 + firmware/lib/usb_common.c | 385 ++ firmware/src/Makefile.am | 22 + firmware/src/common/Makefile.am | 50 + firmware/src/common/_startup.a51 | 80 + firmware/src/common/_startup.a51.brittle | 78 + firmware/src/common/blink_leds.c | 36 + firmware/src/common/build_eeprom.py | 182 + firmware/src/common/check_mdelay.c | 37 + firmware/src/common/check_udelay.c | 37 + firmware/src/common/edit-gpif | 114 + firmware/src/common/fpga.h | 31 + firmware/src/common/fpga_load.c | 193 + firmware/src/common/fpga_load.h | 28 + firmware/src/common/gpif.c | 292 ++ firmware/src/common/gpif.gpf | Bin 0 -> 5281 bytes firmware/src/common/init_gpif.c | 59 + firmware/src/common/usrp_common.c | 109 + firmware/src/common/usrp_globals.h | 32 + firmware/src/common/vectors.a51 | 180 + firmware/src/usrp2/Makefile.am | 168 + firmware/src/usrp2/_startup.a51 | 1 + firmware/src/usrp2/blink_leds.c | 1 + firmware/src/usrp2/board_specific.c | 113 + firmware/src/usrp2/check_mdelay.c | 1 + firmware/src/usrp2/check_udelay.c | 1 + firmware/src/usrp2/edit-gpif | 114 + firmware/src/usrp2/eeprom_boot.a51 | 573 +++ firmware/src/usrp2/eeprom_init.c | 116 + firmware/src/usrp2/eeprom_io.c | 65 + firmware/src/usrp2/eeprom_io.h | 38 + firmware/src/usrp2/fpga_load.c | 1 + firmware/src/usrp2/fpga_rev2.c | 122 + firmware/src/usrp2/fpga_rev2.h | 58 + firmware/src/usrp2/gpif.c | 292 ++ firmware/src/usrp2/gpif.gpf | Bin 0 -> 5341 bytes firmware/src/usrp2/init_gpif.c | 1 + firmware/src/usrp2/spi.c | 381 ++ firmware/src/usrp2/spi.h | 43 + firmware/src/usrp2/usb_descriptors.a51 | 404 ++ firmware/src/usrp2/usrp_common.c | 1 + firmware/src/usrp2/usrp_common.h | 77 + firmware/src/usrp2/usrp_main.c | 380 ++ firmware/src/usrp2/usrp_rev2_regs.h | 163 + firmware/src/usrp2/vectors.a51 | 1 + fpga/Makefile.am | 24 + fpga/Makefile.extra | 150 + fpga/TODO | 23 + fpga/gen_makefile_extra.py | 67 + fpga/megacells/accum32.bsf | 86 + fpga/megacells/accum32.cmp | 31 + fpga/megacells/accum32.inc | 32 + fpga/megacells/accum32.v | 765 ++++ fpga/megacells/accum32_bb.v | 35 + fpga/megacells/accum32_inst.v | 7 + fpga/megacells/add32.bsf | 62 + fpga/megacells/add32.cmp | 29 + fpga/megacells/add32.inc | 30 + fpga/megacells/add32.v | 221 ++ fpga/megacells/add32_bb.v | 31 + fpga/megacells/add32_inst.v | 5 + fpga/megacells/addsub16.bsf | 96 + fpga/megacells/addsub16.cmp | 33 + fpga/megacells/addsub16.inc | 34 + fpga/megacells/addsub16.v | 438 +++ fpga/megacells/addsub16_bb.v | 39 + fpga/megacells/addsub16_inst.v | 9 + fpga/megacells/bustri.bsf | 62 + fpga/megacells/bustri.cmp | 29 + fpga/megacells/bustri.inc | 30 + fpga/megacells/bustri.v | 71 + fpga/megacells/bustri_bb.v | 31 + fpga/megacells/bustri_inst.v | 5 + fpga/megacells/clk_doubler.v | 198 + fpga/megacells/clk_doubler_bb.v | 143 + fpga/megacells/dspclkpll.v | 237 ++ fpga/megacells/dspclkpll_bb.v | 31 + fpga/megacells/fifo_2k.v | 3343 ++++++++++++++++ fpga/megacells/fifo_2k_bb.v | 131 + fpga/megacells/fifo_4k.v | 3495 +++++++++++++++++ fpga/megacells/fifo_4k_bb.v | 131 + fpga/megacells/mylpm_addsub.bsf | 80 + fpga/megacells/mylpm_addsub.cmp | 31 + fpga/megacells/mylpm_addsub.inc | 32 + fpga/megacells/mylpm_addsub.v | 102 + fpga/megacells/mylpm_addsub_bb.v | 35 + fpga/megacells/mylpm_addsub_inst.v | 7 + fpga/megacells/pll.v | 207 + fpga/megacells/pll_bb.v | 29 + fpga/megacells/pll_inst.v | 4 + fpga/megacells/sub32.bsf | 87 + fpga/megacells/sub32.cmp | 32 + fpga/megacells/sub32.inc | 33 + fpga/megacells/sub32.v | 675 ++++ fpga/megacells/sub32_bb.v | 37 + fpga/megacells/sub32_inst.v | 8 + fpga/models/bustri.v | 17 + fpga/models/fifo.v | 81 + fpga/models/fifo_1c_1k.v | 81 + fpga/models/fifo_1c_2k.v | 81 + fpga/models/fifo_1c_4k.v | 76 + fpga/models/fifo_1k.v | 24 + fpga/models/fifo_2k.v | 24 + fpga/models/fifo_4k.v | 24 + fpga/models/pll.v | 33 + fpga/models/ssram.v | 38 + fpga/rbf/Makefile.am | 49 + fpga/rbf/rev2/multi_2rxhb_2tx.rbf | Bin 0 -> 180809 bytes fpga/rbf/rev2/multi_4rx_0tx.rbf | Bin 0 -> 180537 bytes fpga/rbf/rev2/std_2rxhb_2tx.rbf | Bin 0 -> 175896 bytes fpga/rbf/rev2/std_4rx_0tx.rbf | Bin 0 -> 171213 bytes fpga/rbf/rev4/multi_2rxhb_2tx.rbf | Bin 0 -> 180809 bytes fpga/rbf/rev4/multi_4rx_0tx.rbf | Bin 0 -> 180537 bytes fpga/rbf/rev4/std_2rxhb_2tx.rbf | Bin 0 -> 175896 bytes fpga/rbf/rev4/std_4rx_0tx.rbf | Bin 0 -> 171213 bytes fpga/sdr_lib/adc_interface.v | 71 + fpga/sdr_lib/bidir_reg.v | 29 + fpga/sdr_lib/bus_interface.v | 213 + fpga/sdr_lib/cic_decim.v | 106 + fpga/sdr_lib/cic_int_shifter.v | 98 + fpga/sdr_lib/cic_interp.v | 88 + fpga/sdr_lib/clk_divider.v | 43 + fpga/sdr_lib/cordic.v | 109 + fpga/sdr_lib/cordic_stage.v | 60 + fpga/sdr_lib/ddc.v | 97 + fpga/sdr_lib/dpram.v | 47 + fpga/sdr_lib/duc.v | 95 + fpga/sdr_lib/ext_fifo.v | 126 + fpga/sdr_lib/gen_cordic_consts.py | 10 + fpga/sdr_lib/gen_sync.v | 43 + fpga/sdr_lib/hb/acc.v | 22 + fpga/sdr_lib/hb/coeff_ram.v | 26 + fpga/sdr_lib/hb/coeff_rom.v | 19 + fpga/sdr_lib/hb/halfband_decim.v | 163 + fpga/sdr_lib/hb/halfband_interp.v | 121 + fpga/sdr_lib/hb/hbd_tb/HBD | 80 + fpga/sdr_lib/hb/hbd_tb/really_golden | 142 + fpga/sdr_lib/hb/hbd_tb/regression | 95 + fpga/sdr_lib/hb/hbd_tb/run_hbd | 4 + fpga/sdr_lib/hb/hbd_tb/test_hbd.v | 75 + fpga/sdr_lib/hb/mac.v | 58 + fpga/sdr_lib/hb/mult.v | 16 + fpga/sdr_lib/hb/ram16_2port.v | 22 + fpga/sdr_lib/hb/ram16_2sum.v | 27 + fpga/sdr_lib/hb/ram32_2sum.v | 22 + fpga/sdr_lib/io_pins.v | 52 + fpga/sdr_lib/master_control.v | 155 + fpga/sdr_lib/master_control_multi.v | 73 + fpga/sdr_lib/phase_acc.v | 52 + fpga/sdr_lib/ram.v | 16 + fpga/sdr_lib/ram16.v | 17 + fpga/sdr_lib/ram32.v | 17 + fpga/sdr_lib/ram64.v | 16 + fpga/sdr_lib/rssi.v | 30 + fpga/sdr_lib/rx_buffer.v | 182 + fpga/sdr_lib/rx_chain.v | 105 + fpga/sdr_lib/rx_chain_dual.v | 103 + fpga/sdr_lib/rx_dcoffset.v | 22 + fpga/sdr_lib/serial_io.v | 118 + fpga/sdr_lib/setting_reg.v | 23 + fpga/sdr_lib/setting_reg_masked.v | 26 + fpga/sdr_lib/sign_extend.v | 35 + fpga/sdr_lib/strobe_gen.v | 44 + fpga/sdr_lib/tx_buffer.v | 138 + fpga/sdr_lib/tx_chain.v | 65 + fpga/sdr_lib/tx_chain_hb.v | 76 + fpga/tb/cbus_tb.v | 71 + fpga/tb/cordic_tb.v | 61 + fpga/tb/decim_tb.v | 108 + fpga/tb/fullchip_tb.v | 174 + fpga/tb/interp_tb.v | 108 + fpga/tb/justinterp_tb.v | 73 + fpga/tb/makesine.pl | 14 + fpga/tb/run_cordic | 4 + fpga/tb/run_fullchip | 4 + fpga/tb/usrp_tasks.v | 145 + fpga/toplevel/mrfm/biquad_2stage.v | 131 + fpga/toplevel/mrfm/biquad_6stage.v | 137 + fpga/toplevel/mrfm/mrfm.csf | 444 +++ fpga/toplevel/mrfm/mrfm.esf | 14 + fpga/toplevel/mrfm/mrfm.psf | 312 ++ fpga/toplevel/mrfm/mrfm.py | 129 + fpga/toplevel/mrfm/mrfm.qpf | 29 + fpga/toplevel/mrfm/mrfm.qsf | 411 ++ fpga/toplevel/mrfm/mrfm.v | 199 + fpga/toplevel/mrfm/mrfm.vh | 21 + fpga/toplevel/mrfm/mrfm_compensator.v | 80 + fpga/toplevel/mrfm/mrfm_fft.py | 319 ++ fpga/toplevel/mrfm/mrfm_proc.v | 96 + fpga/toplevel/mrfm/shifter.v | 106 + fpga/toplevel/sizetest/sizetest.csf | 160 + fpga/toplevel/sizetest/sizetest.psf | 228 ++ fpga/toplevel/sizetest/sizetest.quartus | 19 + fpga/toplevel/sizetest/sizetest.ssf | 14 + fpga/toplevel/sizetest/sizetest.v | 39 + fpga/toplevel/usrp_multi/usrp_multi.csf | 444 +++ fpga/toplevel/usrp_multi/usrp_multi.esf | 14 + fpga/toplevel/usrp_multi/usrp_multi.psf | 312 ++ fpga/toplevel/usrp_multi/usrp_multi.qpf | 29 + fpga/toplevel/usrp_multi/usrp_multi.qsf | 408 ++ fpga/toplevel/usrp_multi/usrp_multi.v | 379 ++ fpga/toplevel/usrp_multi/usrp_multi.vh | 141 + .../usrp_multi/usrp_multi_config_2rx_0tx.vh | 62 + .../usrp_multi/usrp_multi_config_2rxhb_0tx.vh | 62 + .../usrp_multi/usrp_multi_config_2rxhb_2tx.vh | 62 + .../usrp_multi/usrp_multi_config_4rx_0tx.vh | 62 + fpga/toplevel/usrp_multi/usrp_std.vh | 29 + fpga/toplevel/usrp_std/usrp_std.csf | 444 +++ fpga/toplevel/usrp_std/usrp_std.esf | 14 + fpga/toplevel/usrp_std/usrp_std.psf | 312 ++ fpga/toplevel/usrp_std/usrp_std.qpf | 29 + fpga/toplevel/usrp_std/usrp_std.qsf | 406 ++ fpga/toplevel/usrp_std/usrp_std.v | 324 ++ fpga/toplevel/usrp_std/usrp_std.vh | 119 + .../usrp_std/usrp_std_config_2rxhb_2tx.vh | 61 + .../usrp_std/usrp_std_config_4rx_0tx.vh | 61 + host/Makefile.am | 23 + host/apps/Makefile.am | 53 + host/apps/burn-db-eeprom | 164 + host/apps/burn-serial-number | 80 + host/apps/check_order | 39 + host/apps/check_order_quickly.cc | 62 + host/apps/dump_12bit_shorts | 23 + host/apps/dump_shorts | 23 + host/apps/print-db | 19 + host/apps/run | 6 + host/apps/run2 | 4 + host/apps/run_input | 5 + host/apps/test_usrp_standard_rx.cc | 276 ++ host/apps/test_usrp_standard_tx.cc | 319 ++ host/apps/time_stuff.c | 68 + host/apps/time_stuff.h | 48 + host/apps/usrp_cal_dc_offset.cc | 242 ++ host/apps/usrper.cc | 352 ++ host/lib/Makefile.am | 137 + host/lib/README_OSX | 63 + host/lib/ad9862.h | 221 ++ host/lib/check_data.py | 50 + host/lib/circular_buffer.h | 325 ++ host/lib/circular_linked_list.h | 267 ++ host/lib/darwin_libusb.h | 190 + host/lib/dump_data.py | 40 + host/lib/dxc-io-assignments.gnumeric | Bin 0 -> 3251 bytes host/lib/fusb.cc | 60 + host/lib/fusb.h | 128 + host/lib/fusb_darwin.cc | 499 +++ host/lib/fusb_darwin.h | 215 + host/lib/fusb_generic.cc | 108 + host/lib/fusb_generic.h | 83 + host/lib/fusb_linux.cc | 684 ++++ host/lib/fusb_linux.h | 116 + host/lib/fusb_sysconfig_darwin.cc | 37 + host/lib/fusb_sysconfig_generic.cc | 37 + host/lib/fusb_sysconfig_linux.cc | 37 + host/lib/fusb_sysconfig_win32.cc | 37 + host/lib/fusb_win32.cc | 265 ++ host/lib/fusb_win32.h | 90 + host/lib/gen-ratios | 48 + host/lib/gen_usrp_dbid.py | 137 + host/lib/md5.c | 452 +++ host/lib/md5.h | 129 + host/lib/mld_threads.h | 257 ++ host/lib/rate_to_regval.h | 97 + host/lib/std_paths.h.in | 27 + host/lib/usrp_basic.cc | 1239 ++++++ host/lib/usrp_basic.h | 776 ++++ host/lib/usrp_bytesex.h | 74 + host/lib/usrp_config.cc | 35 + host/lib/usrp_config.h | 67 + host/lib/usrp_dbid.dat | 75 + host/lib/usrp_local_sighandler.cc | 190 + host/lib/usrp_local_sighandler.h | 61 + host/lib/usrp_prims.cc | 1355 +++++++ host/lib/usrp_prims.h | 294 ++ host/lib/usrp_slots.h | 33 + host/lib/usrp_standard.cc | 831 ++++ host/lib/usrp_standard.h | 366 ++ host/misc/Makefile.am | 31 + host/misc/bug_work_around_8.cc | 2 + host/misc/getopt.c | 733 ++++ host/misc/getopt.h | 129 + host/misc/gettimeofday.c | 50 + host/misc/mkstemp.c | 42 + host/misc/tempname.c | 352 ++ host/misc/usleep.c | 67 + host/swig/Makefile.am | 84 + host/swig/__init__.py | 1 + host/swig/prims.i | 266 ++ host/swig/usrp_fpga_regs.py | 30 + host/swig/util.py | 95 + usrp.inf | 91 + usrp.iss.in | 69 + usrp.pc.in | 11 + 337 files changed, 54175 insertions(+) create mode 100644 AUTHORS create mode 100644 ChangeLog create mode 100644 Makefile.am create mode 100644 README create mode 100644 doc/Doxyfile.in create mode 100644 doc/Makefile.am create mode 100644 doc/ddc.eps create mode 100644 doc/ddc.png create mode 100644 doc/other/Makefile.am create mode 100644 doc/other/mainpage.dox create mode 100644 doc/usrp-block-diagram.eps create mode 100644 doc/usrp-block-diagram.png create mode 100644 doc/usrp.jpg create mode 100644 doc/usrp_guide.xml create mode 100644 firmware/Makefile.am create mode 100644 firmware/include/Makefile.am create mode 100644 firmware/include/delay.h create mode 100644 firmware/include/fpga_regs0.h create mode 100644 firmware/include/fpga_regs_common.h create mode 100644 firmware/include/fpga_regs_common.v create mode 100644 firmware/include/fpga_regs_standard.h create mode 100644 firmware/include/fpga_regs_standard.v create mode 100644 firmware/include/fx2regs.h create mode 100644 firmware/include/fx2utils.h create mode 100755 firmware/include/generate_regs.py create mode 100644 firmware/include/i2c.h create mode 100644 firmware/include/isr.h create mode 100644 firmware/include/syncdelay.h create mode 100644 firmware/include/timer.h create mode 100644 firmware/include/usb_common.h create mode 100644 firmware/include/usb_descriptors.h create mode 100644 firmware/include/usb_requests.h create mode 100644 firmware/include/usrp_commands.h create mode 100644 firmware/include/usrp_config.h create mode 100644 firmware/include/usrp_i2c_addr.h create mode 100644 firmware/include/usrp_ids.h create mode 100644 firmware/include/usrp_interfaces.h create mode 100644 firmware/include/usrp_spi_defs.h create mode 100644 firmware/lib/Makefile.am create mode 100644 firmware/lib/delay.c create mode 100644 firmware/lib/fx2utils.c create mode 100644 firmware/lib/i2c-compiler-bug.c create mode 100644 firmware/lib/i2c.c create mode 100644 firmware/lib/isr.c create mode 100644 firmware/lib/timer.c create mode 100644 firmware/lib/usb_common.c create mode 100644 firmware/src/Makefile.am create mode 100644 firmware/src/common/Makefile.am create mode 100644 firmware/src/common/_startup.a51 create mode 100644 firmware/src/common/_startup.a51.brittle create mode 100644 firmware/src/common/blink_leds.c create mode 100755 firmware/src/common/build_eeprom.py create mode 100644 firmware/src/common/check_mdelay.c create mode 100644 firmware/src/common/check_udelay.c create mode 100755 firmware/src/common/edit-gpif create mode 100644 firmware/src/common/fpga.h create mode 100644 firmware/src/common/fpga_load.c create mode 100644 firmware/src/common/fpga_load.h create mode 100755 firmware/src/common/gpif.c create mode 100755 firmware/src/common/gpif.gpf create mode 100644 firmware/src/common/init_gpif.c create mode 100644 firmware/src/common/usrp_common.c create mode 100644 firmware/src/common/usrp_globals.h create mode 100644 firmware/src/common/vectors.a51 create mode 100644 firmware/src/usrp2/Makefile.am create mode 100644 firmware/src/usrp2/_startup.a51 create mode 100644 firmware/src/usrp2/blink_leds.c create mode 100644 firmware/src/usrp2/board_specific.c create mode 100644 firmware/src/usrp2/check_mdelay.c create mode 100644 firmware/src/usrp2/check_udelay.c create mode 100755 firmware/src/usrp2/edit-gpif create mode 100644 firmware/src/usrp2/eeprom_boot.a51 create mode 100644 firmware/src/usrp2/eeprom_init.c create mode 100644 firmware/src/usrp2/eeprom_io.c create mode 100644 firmware/src/usrp2/eeprom_io.h create mode 100644 firmware/src/usrp2/fpga_load.c create mode 100644 firmware/src/usrp2/fpga_rev2.c create mode 100644 firmware/src/usrp2/fpga_rev2.h create mode 100644 firmware/src/usrp2/gpif.c create mode 100755 firmware/src/usrp2/gpif.gpf create mode 100644 firmware/src/usrp2/init_gpif.c create mode 100644 firmware/src/usrp2/spi.c create mode 100644 firmware/src/usrp2/spi.h create mode 100644 firmware/src/usrp2/usb_descriptors.a51 create mode 100644 firmware/src/usrp2/usrp_common.c create mode 100644 firmware/src/usrp2/usrp_common.h create mode 100644 firmware/src/usrp2/usrp_main.c create mode 100644 firmware/src/usrp2/usrp_rev2_regs.h create mode 100644 firmware/src/usrp2/vectors.a51 create mode 100644 fpga/Makefile.am create mode 100644 fpga/Makefile.extra create mode 100644 fpga/TODO create mode 100755 fpga/gen_makefile_extra.py create mode 100755 fpga/megacells/accum32.bsf create mode 100755 fpga/megacells/accum32.cmp create mode 100755 fpga/megacells/accum32.inc create mode 100755 fpga/megacells/accum32.v create mode 100755 fpga/megacells/accum32_bb.v create mode 100755 fpga/megacells/accum32_inst.v create mode 100755 fpga/megacells/add32.bsf create mode 100755 fpga/megacells/add32.cmp create mode 100755 fpga/megacells/add32.inc create mode 100755 fpga/megacells/add32.v create mode 100755 fpga/megacells/add32_bb.v create mode 100755 fpga/megacells/add32_inst.v create mode 100755 fpga/megacells/addsub16.bsf create mode 100755 fpga/megacells/addsub16.cmp create mode 100755 fpga/megacells/addsub16.inc create mode 100755 fpga/megacells/addsub16.v create mode 100755 fpga/megacells/addsub16_bb.v create mode 100755 fpga/megacells/addsub16_inst.v create mode 100755 fpga/megacells/bustri.bsf create mode 100755 fpga/megacells/bustri.cmp create mode 100755 fpga/megacells/bustri.inc create mode 100755 fpga/megacells/bustri.v create mode 100755 fpga/megacells/bustri_bb.v create mode 100755 fpga/megacells/bustri_inst.v create mode 100644 fpga/megacells/clk_doubler.v create mode 100644 fpga/megacells/clk_doubler_bb.v create mode 100644 fpga/megacells/dspclkpll.v create mode 100644 fpga/megacells/dspclkpll_bb.v create mode 100644 fpga/megacells/fifo_2k.v create mode 100644 fpga/megacells/fifo_2k_bb.v create mode 100644 fpga/megacells/fifo_4k.v create mode 100644 fpga/megacells/fifo_4k_bb.v create mode 100755 fpga/megacells/mylpm_addsub.bsf create mode 100755 fpga/megacells/mylpm_addsub.cmp create mode 100755 fpga/megacells/mylpm_addsub.inc create mode 100755 fpga/megacells/mylpm_addsub.v create mode 100755 fpga/megacells/mylpm_addsub_bb.v create mode 100755 fpga/megacells/mylpm_addsub_inst.v create mode 100644 fpga/megacells/pll.v create mode 100644 fpga/megacells/pll_bb.v create mode 100644 fpga/megacells/pll_inst.v create mode 100755 fpga/megacells/sub32.bsf create mode 100755 fpga/megacells/sub32.cmp create mode 100755 fpga/megacells/sub32.inc create mode 100755 fpga/megacells/sub32.v create mode 100755 fpga/megacells/sub32_bb.v create mode 100755 fpga/megacells/sub32_inst.v create mode 100644 fpga/models/bustri.v create mode 100644 fpga/models/fifo.v create mode 100644 fpga/models/fifo_1c_1k.v create mode 100644 fpga/models/fifo_1c_2k.v create mode 100644 fpga/models/fifo_1c_4k.v create mode 100644 fpga/models/fifo_1k.v create mode 100644 fpga/models/fifo_2k.v create mode 100644 fpga/models/fifo_4k.v create mode 100644 fpga/models/pll.v create mode 100644 fpga/models/ssram.v create mode 100644 fpga/rbf/Makefile.am create mode 100755 fpga/rbf/rev2/multi_2rxhb_2tx.rbf create mode 100755 fpga/rbf/rev2/multi_4rx_0tx.rbf create mode 100755 fpga/rbf/rev2/std_2rxhb_2tx.rbf create mode 100755 fpga/rbf/rev2/std_4rx_0tx.rbf create mode 100755 fpga/rbf/rev4/multi_2rxhb_2tx.rbf create mode 100755 fpga/rbf/rev4/multi_4rx_0tx.rbf create mode 100755 fpga/rbf/rev4/std_2rxhb_2tx.rbf create mode 100755 fpga/rbf/rev4/std_4rx_0tx.rbf create mode 100644 fpga/sdr_lib/adc_interface.v create mode 100644 fpga/sdr_lib/bidir_reg.v create mode 100755 fpga/sdr_lib/bus_interface.v create mode 100755 fpga/sdr_lib/cic_decim.v create mode 100644 fpga/sdr_lib/cic_int_shifter.v create mode 100755 fpga/sdr_lib/cic_interp.v create mode 100755 fpga/sdr_lib/clk_divider.v create mode 100755 fpga/sdr_lib/cordic.v create mode 100755 fpga/sdr_lib/cordic_stage.v create mode 100755 fpga/sdr_lib/ddc.v create mode 100644 fpga/sdr_lib/dpram.v create mode 100755 fpga/sdr_lib/duc.v create mode 100644 fpga/sdr_lib/ext_fifo.v create mode 100755 fpga/sdr_lib/gen_cordic_consts.py create mode 100644 fpga/sdr_lib/gen_sync.v create mode 100644 fpga/sdr_lib/hb/acc.v create mode 100644 fpga/sdr_lib/hb/coeff_ram.v create mode 100644 fpga/sdr_lib/hb/coeff_rom.v create mode 100644 fpga/sdr_lib/hb/halfband_decim.v create mode 100644 fpga/sdr_lib/hb/halfband_interp.v create mode 100644 fpga/sdr_lib/hb/hbd_tb/HBD create mode 100644 fpga/sdr_lib/hb/hbd_tb/really_golden create mode 100644 fpga/sdr_lib/hb/hbd_tb/regression create mode 100755 fpga/sdr_lib/hb/hbd_tb/run_hbd create mode 100644 fpga/sdr_lib/hb/hbd_tb/test_hbd.v create mode 100644 fpga/sdr_lib/hb/mac.v create mode 100644 fpga/sdr_lib/hb/mult.v create mode 100644 fpga/sdr_lib/hb/ram16_2port.v create mode 100644 fpga/sdr_lib/hb/ram16_2sum.v create mode 100644 fpga/sdr_lib/hb/ram32_2sum.v create mode 100644 fpga/sdr_lib/io_pins.v create mode 100644 fpga/sdr_lib/master_control.v create mode 100644 fpga/sdr_lib/master_control_multi.v create mode 100755 fpga/sdr_lib/phase_acc.v create mode 100644 fpga/sdr_lib/ram.v create mode 100644 fpga/sdr_lib/ram16.v create mode 100644 fpga/sdr_lib/ram32.v create mode 100644 fpga/sdr_lib/ram64.v create mode 100644 fpga/sdr_lib/rssi.v create mode 100644 fpga/sdr_lib/rx_buffer.v create mode 100644 fpga/sdr_lib/rx_chain.v create mode 100644 fpga/sdr_lib/rx_chain_dual.v create mode 100644 fpga/sdr_lib/rx_dcoffset.v create mode 100644 fpga/sdr_lib/serial_io.v create mode 100644 fpga/sdr_lib/setting_reg.v create mode 100644 fpga/sdr_lib/setting_reg_masked.v create mode 100644 fpga/sdr_lib/sign_extend.v create mode 100644 fpga/sdr_lib/strobe_gen.v create mode 100644 fpga/sdr_lib/tx_buffer.v create mode 100644 fpga/sdr_lib/tx_chain.v create mode 100644 fpga/sdr_lib/tx_chain_hb.v create mode 100644 fpga/tb/cbus_tb.v create mode 100644 fpga/tb/cordic_tb.v create mode 100644 fpga/tb/decim_tb.v create mode 100755 fpga/tb/fullchip_tb.v create mode 100755 fpga/tb/interp_tb.v create mode 100644 fpga/tb/justinterp_tb.v create mode 100755 fpga/tb/makesine.pl create mode 100755 fpga/tb/run_cordic create mode 100755 fpga/tb/run_fullchip create mode 100755 fpga/tb/usrp_tasks.v create mode 100644 fpga/toplevel/mrfm/biquad_2stage.v create mode 100644 fpga/toplevel/mrfm/biquad_6stage.v create mode 100644 fpga/toplevel/mrfm/mrfm.csf create mode 100644 fpga/toplevel/mrfm/mrfm.esf create mode 100644 fpga/toplevel/mrfm/mrfm.psf create mode 100644 fpga/toplevel/mrfm/mrfm.py create mode 100644 fpga/toplevel/mrfm/mrfm.qpf create mode 100644 fpga/toplevel/mrfm/mrfm.qsf create mode 100644 fpga/toplevel/mrfm/mrfm.v create mode 100644 fpga/toplevel/mrfm/mrfm.vh create mode 100644 fpga/toplevel/mrfm/mrfm_compensator.v create mode 100755 fpga/toplevel/mrfm/mrfm_fft.py create mode 100644 fpga/toplevel/mrfm/mrfm_proc.v create mode 100644 fpga/toplevel/mrfm/shifter.v create mode 100644 fpga/toplevel/sizetest/sizetest.csf create mode 100644 fpga/toplevel/sizetest/sizetest.psf create mode 100644 fpga/toplevel/sizetest/sizetest.quartus create mode 100644 fpga/toplevel/sizetest/sizetest.ssf create mode 100644 fpga/toplevel/sizetest/sizetest.v create mode 100644 fpga/toplevel/usrp_multi/usrp_multi.csf create mode 100644 fpga/toplevel/usrp_multi/usrp_multi.esf create mode 100644 fpga/toplevel/usrp_multi/usrp_multi.psf create mode 100644 fpga/toplevel/usrp_multi/usrp_multi.qpf create mode 100644 fpga/toplevel/usrp_multi/usrp_multi.qsf create mode 100644 fpga/toplevel/usrp_multi/usrp_multi.v create mode 100644 fpga/toplevel/usrp_multi/usrp_multi.vh create mode 100644 fpga/toplevel/usrp_multi/usrp_multi_config_2rx_0tx.vh create mode 100644 fpga/toplevel/usrp_multi/usrp_multi_config_2rxhb_0tx.vh create mode 100644 fpga/toplevel/usrp_multi/usrp_multi_config_2rxhb_2tx.vh create mode 100644 fpga/toplevel/usrp_multi/usrp_multi_config_4rx_0tx.vh create mode 100644 fpga/toplevel/usrp_multi/usrp_std.vh create mode 100644 fpga/toplevel/usrp_std/usrp_std.csf create mode 100644 fpga/toplevel/usrp_std/usrp_std.esf create mode 100644 fpga/toplevel/usrp_std/usrp_std.psf create mode 100644 fpga/toplevel/usrp_std/usrp_std.qpf create mode 100644 fpga/toplevel/usrp_std/usrp_std.qsf create mode 100644 fpga/toplevel/usrp_std/usrp_std.v create mode 100644 fpga/toplevel/usrp_std/usrp_std.vh create mode 100644 fpga/toplevel/usrp_std/usrp_std_config_2rxhb_2tx.vh create mode 100644 fpga/toplevel/usrp_std/usrp_std_config_4rx_0tx.vh create mode 100644 host/Makefile.am create mode 100644 host/apps/Makefile.am create mode 100755 host/apps/burn-db-eeprom create mode 100755 host/apps/burn-serial-number create mode 100755 host/apps/check_order create mode 100644 host/apps/check_order_quickly.cc create mode 100755 host/apps/dump_12bit_shorts create mode 100755 host/apps/dump_shorts create mode 100755 host/apps/print-db create mode 100755 host/apps/run create mode 100755 host/apps/run2 create mode 100755 host/apps/run_input create mode 100644 host/apps/test_usrp_standard_rx.cc create mode 100644 host/apps/test_usrp_standard_tx.cc create mode 100644 host/apps/time_stuff.c create mode 100644 host/apps/time_stuff.h create mode 100644 host/apps/usrp_cal_dc_offset.cc create mode 100644 host/apps/usrper.cc create mode 100644 host/lib/Makefile.am create mode 100644 host/lib/README_OSX create mode 100644 host/lib/ad9862.h create mode 100755 host/lib/check_data.py create mode 100644 host/lib/circular_buffer.h create mode 100644 host/lib/circular_linked_list.h create mode 100644 host/lib/darwin_libusb.h create mode 100755 host/lib/dump_data.py create mode 100644 host/lib/dxc-io-assignments.gnumeric create mode 100644 host/lib/fusb.cc create mode 100644 host/lib/fusb.h create mode 100644 host/lib/fusb_darwin.cc create mode 100644 host/lib/fusb_darwin.h create mode 100644 host/lib/fusb_generic.cc create mode 100644 host/lib/fusb_generic.h create mode 100644 host/lib/fusb_linux.cc create mode 100644 host/lib/fusb_linux.h create mode 100644 host/lib/fusb_sysconfig_darwin.cc create mode 100644 host/lib/fusb_sysconfig_generic.cc create mode 100644 host/lib/fusb_sysconfig_linux.cc create mode 100644 host/lib/fusb_sysconfig_win32.cc create mode 100644 host/lib/fusb_win32.cc create mode 100644 host/lib/fusb_win32.h create mode 100755 host/lib/gen-ratios create mode 100755 host/lib/gen_usrp_dbid.py create mode 100644 host/lib/md5.c create mode 100644 host/lib/md5.h create mode 100644 host/lib/mld_threads.h create mode 100644 host/lib/rate_to_regval.h create mode 100644 host/lib/std_paths.h.in create mode 100644 host/lib/usrp_basic.cc create mode 100644 host/lib/usrp_basic.h create mode 100644 host/lib/usrp_bytesex.h create mode 100644 host/lib/usrp_config.cc create mode 100644 host/lib/usrp_config.h create mode 100644 host/lib/usrp_dbid.dat create mode 100644 host/lib/usrp_local_sighandler.cc create mode 100644 host/lib/usrp_local_sighandler.h create mode 100644 host/lib/usrp_prims.cc create mode 100644 host/lib/usrp_prims.h create mode 100644 host/lib/usrp_slots.h create mode 100644 host/lib/usrp_standard.cc create mode 100644 host/lib/usrp_standard.h create mode 100644 host/misc/Makefile.am create mode 100644 host/misc/bug_work_around_8.cc create mode 100644 host/misc/getopt.c create mode 100644 host/misc/getopt.h create mode 100644 host/misc/gettimeofday.c create mode 100644 host/misc/mkstemp.c create mode 100644 host/misc/tempname.c create mode 100644 host/misc/usleep.c create mode 100644 host/swig/Makefile.am create mode 100644 host/swig/__init__.py create mode 100644 host/swig/prims.i create mode 100644 host/swig/usrp_fpga_regs.py create mode 100644 host/swig/util.py create mode 100644 usrp.inf create mode 100644 usrp.iss.in create mode 100644 usrp.pc.in diff --git a/AUTHORS b/AUTHORS new file mode 100644 index 0000000..bdfe42d --- /dev/null +++ b/AUTHORS @@ -0,0 +1,4 @@ +Matt Ettus +Eric Blossom +Michael Dickens Fast USB support for OS/X +Martin Dudok van Heel Multi usrp synchronisation, 8 bit support diff --git a/ChangeLog b/ChangeLog new file mode 100644 index 0000000..e5acb6a --- /dev/null +++ b/ChangeLog @@ -0,0 +1,1055 @@ +2006-06-25 Eric Blossom + + * firmware/include/fpga_regs_standard.h: doc fix to reflect current reality. + +2006-06-10 Eric Blossom + + * host/apps/usrper.cc: removed dead (#if 0'd) code, that's no longer applicable. + +2006-05-11 Martin Dudok van Heel + Added synchronised multi_usrp support using a new fpga firmware build in a new toplevel usrp_multi. + A few changes were needed in the mainline code, but they shouldn't affect anyone + (No functionality changes in the existing code, just a few API additions) + + * firmware/include/fpga_regs_standard.v: added Master/slave control register FR_RX_MASTER_SLAVE + * firmware/include/fpga_regs_common.h: added 32 bit counter support bmFR_MODE_RX_COUNTING_32BIT + * firmware/include/generate_regs.py: added support for bitno and bm defines + * firmware/include/fpga_regs_standard.h: added Master/slave control register FR_RX_MASTER_SLAVE + * host/lib/usrp_basic.h: added _write_fpga_reg_masked + * host/lib/usrp_basic.cc: added _write_fpga_reg_masked + * host/lib/usrp_standard.h: added FPGA_MODE_COUNTING_32BIT + * fpga/Makefile.extra: regenerated to add new usrp_multi files + * fpga/rbf/rev4/multi_2rxhb_2tx.rbf: new (fpga firmware for synchronised multi_usrp support) + * fpga/rbf/rev4/multi_4rx_0tx.rbf: new (fpga firmware for synchronised multi_usrp support) + * fpga/rbf/Makefile.am: added commented out rev2/multi_2rxhb_2tx.rbf and rev4/multi_2rxhb_2tx.rbf + * fpga/rbf/rev2/multi_2rxhb_2tx.rbf: new (fpga firmware for synchronised multi_usrp support) + * fpga/rbf/rev2/multi_4rx_0tx.rbf: new (fpga firmware for synchronised multi_usrp support) + * fpga/toplevel/usrp_std/usrp_std.v: split rx_buffer reset into dsp reset and reset_regs + * fpga/toplevel/usrp_multi: new fpga toplevel for synchronised multi_usrp support + * fpga/toplevel/usrp_multi/usrp_multi.esf: new + * fpga/toplevel/usrp_multi/usrp_multi.vh: new toplevel verilog include, + to turn on/off multi usrp support and number of rx/tx channels and halfband + * fpga/toplevel/usrp_multi/usrp_std.vh: new wrapper for usrp_multi.vh + * fpga/toplevel/usrp_multi/usrp_multi_config_2rxhb_0tx.vh: new + * fpga/toplevel/usrp_multi/usrp_multi_config_2rxhb_2tx.vh: new + * fpga/toplevel/usrp_multi/usrp_multi.v: new toplevel verilog file for multi_usrp support. + The multi_usrp support can be turned on and off in usrp_multi.vh. + If it is turned off this file will generate exactly the same as usrp_std.v + (just do a diff between usrp_std.v and usrp_multi.v to see how this is done) + * fpga/toplevel/usrp_multi/usrp_multi.qpf: new + * fpga/toplevel/usrp_multi/usrp_multi.psf: new + * fpga/toplevel/usrp_multi/usrp_multi_config_2rx_0tx.vh: new + * fpga/toplevel/usrp_multi/usrp_multi.qsf: new + * fpga/toplevel/usrp_multi/usrp_multi_config_4rx_0tx.vh: new + * fpga/toplevel/usrp_multi/usrp_multi.csf: new + * fpga/toplevel/usrp_multi/.cvsignore: new + * fpga/sdr_lib/rx_buffer.v: split reset into dsp reset and reset registers + * fpga/sdr_lib/master_control_multi.v: new wrapper for master_control.v which adds multi_usrp support + * fpga/sdr_lib/phase_acc.v: set reset of FREQADDR register to 1'b0 + This way reset can be used to reset phase_acc without resetting the frequency + (this reset was not used untill now) + * fpga/sdr_lib/setting_reg_masked.v: new masked 16 bit register + +2006-05-01 Michael Dickens + + * host/lib/Makefile.am, host/lib/fusb_darwin.{h,cc}: mods for + higher speed OS/X support. + * host/lib/darwin_libusb.h, host/lib/mld_threads.h, + host/lib/circular_buffer.h, host/lib/circular_linked_list.h, + README_OSX: new files for higher speed OS/X support. + + +2006-03-29 Eric Blossom + + * fpga/Makefile.am: regenerated Makefile.extra so that make distcheck + passes. + * fpga/rbf/Makefile.am: simplified installation of FPGA rbf + files. It actually works again ;) + +2006-03-09 Eric Blossom + + * fpga/gen_makefile_extra.py, fpga/Makefile.am, + fpga/Makefile.extra: based on an idea by Martin, we now machine + generate the list of FPGA related files that should go into the + tarball distribution. After adding or removing fpga files from + CVS, you must run gen_makefile_extra.py to regenerate the Makefile + fragment. + +2006-03-09 Martin Dudok van Heel + + * firmware/src/usrp2/Makefile.am, usrp/rbf/Makefile.am: fixed + make distcheck failures. + +2006-03-06 Eric Blossom + + * host/lib/usrp_standard.cc (compute_freq_control_word_fpga): + Removed host-side truncation of frequency control word. + Tuning resolution is now approximately 0.03 Hz. + +2006-02-18 Eric Blossom + + * host/lib/usrp_prims.{h,cc}, host/lib/usrp_basic.{h,cc}, + host/lib/usrp_standard.{h,cc}: added support for specifying the + firmware and fpga files that is to be loaded. Also provided + default override via USRP_FPGA and USRP_FIRMWARE environment + variables. + +2006-02-17 Eric Blossom + + * host/lib/usrp_basic.{h,cc}, host/lib/usrp_prims.{h,cc}: added + methods to retrieve serial number from usrp motherboard. + * host/apps/burn-serial-number: burn a serial number into usrp motherboard. + * firmware/src/usrp2/eeprom_io.{h,c}: routines to read and write eeprom. + * firmware/src/usrp2/usrp_main.c (patch_usb_descriptors): read h/w + rev and serial number out of boot eeprom and patch into returned + usb descriptors. + + * host/apps/test_usrp0.cc, host/lib/usrp0.{h,cc}: removed usrp0 + host code. + * firmware/src/Makefile.am: removed all rev0 and rev1 usrp firmware. + +2006-02-09 Eric Blossom + + * fpga/toplevel/usrp_std/usrp_std.vh: refactored condition compilation. + * fpga/toplevel/usrp_std/usrp_std_config_2rxhb_2tx.vh: new + * fpga/toplevel/usrp_std/usrp_std_config_4rx_0tx.vh: new + + * firmware/include/fpga_regs_common.{h,v}, host/lib/usrp_basic.cc: + removed reference to FR_ATR_CTL. + * fpga/sdr_lib/rx_chain_hb.v: deleted. Capability was folded into rx_chain.v + +2006-02-01 Eric Blossom + + * host/lib/usrp_prims.cc (usrp_open_interface): reenabled + usb_set_configuration for WIN32 platform. Thanks Martin! + +2006-01-30 Eric Blossom + + * fpga/sdr_lib/master_control.v: modified code so that it appears + that atr_ctl is always asserted. This allows us to simplify the + daughterboard and applications code. They can control everything + via the other three ATR_* regs. + * fpga/rbf/usrp_fpga_rev2.rbf: updated with new binary. + + * host/lib/usrp_prims.cc (_usrp_load_fpga): manually reset fpga + regs by writing zero to them. + +2006-01-25 Eric Blossom + + * host/lib/usrp_standard.{h,cc}: new methods for reporting on FPGA + capabilities. + * firmware/include/fpga_regs_standard.h (FR_RB_CAPS): new reg that + describes FPGA capabilities. + +2005-12-15 Eric Blossom + + * fpga/Makefile.am: Added missing files to EXTRA_DIST. + +2005-12-08 Martin Dudok van Heel + + tagged RBF_2005_12_08 + + * fpga/rbf/usrp_fpga_rev2.rbf: updated. + * fpga/toplevel/usrp_std/usrp_std.v: fixed counter mode bug + related to half-band filter. + +2005-12-07 Eric Blossom + + Tagged all files: RBF_2005_12_07 + + * fpga/rbf/usrp_fpga_rev2.rbf: updated with new Auto T/R switching code. + +2005-12-06 Eric Blossom + + * host/swig/Makefile.am (prims.cc usrp_prims.py): added new dependencies. + * host/lib/usrp_basic.cc: disabled printing of daughterboard types. + +2005-12-05 Eric Blossom + + * firmware/include/fpga_regs_standard.h: renumbed + FR_TX_FORMAT and FR_RX_FORMAT to remove gap. + * firmware/include/fpga_regs_common.h: moved FR_ATR regs here from + fpga_regs_standard.h. + * host/lib/usrp_basic.cc: zero Auto T/R regs at init time. + +2005-12-01 Eric Blossom + + * host/swig/usrp_fpga_regs.py: define all fpga register names and + bit masks. This is effectively a python binding for the contents + of firmware/include/fpga_regs_{common,standard}.h + * host/swig/prims.i: swigged fpga_regs_{common,standard}.h + +2005-11-30 Eric Blossom + + * firmware/include/fpga_regs_standard.h: fixed typo in FR_ATR_* + series. Renumbered to start after the 16 registers reserved for + custom user definition. + * firmware/include/generate_regs.py (generate_fpga_regs): changed + generated register const width to 7 bits. + +2005-11-19 Martin Dudok van Heel + + * host/apps/Makefile.am: make make-dist work again by + added new burn-db-eeprom and removing burn-dbs-eeprom + and burn-tvrx-eeprom from noinst_PYTHON. + * fpga/Makefile.am: make make-dist work again by making + EXTRA_DIST consistant with latest cleanup of old files. + +2005-11-18 Eric Blossom + + * firmware/include/fpga_regs_standard.h: redefined auto + transmit/receive control registers. + +2005-11-17 Eric Blossom + + * host/lib/fusb_linux.cc (write): added code to minimize transmit + buffering. This allows the higher level code to control buffering + of USB transfers. + +2005-11-15 Eric Blossom + + * host/lib/usrp_basic.cc: zero the daughterboard i/o registers on open. + * fpga/rbf/usrp_fgpa_rev2.rbf: new RBF_2005_11_15 + +2005-11-15 Matt Ettus + + * fpga/sdr_lib/master_control.v, fpga/sdr_lib/io_pins.v: + Refactored resets to fix problem where starting Rx side was + killing Tx side. + +2005-11-13 Eric Blossom + + * host/lib/usrp_prims.cc (usrp_open_interface): removed call to usb_set_configuration. + +2005-11-02 Eric Blossom + + * host/lib/usrp_basic.h (class usrp_basic_tx): fixed pga_db_per_step. + +2005-10-31 Eric Blossom + + * host/lib/usrp_prims.cc (usrp_open_interface): ignore error on + usb_set_configuration. + +2005-10-28 Eric Blossom + + * fpga/rbf/Makefile.am (install-data-local): conditionally install + fpga .rbf files. If a file named DONT_INSTALL_RBF exists in the + install directory, the install will not be done. + +2005-10-24 Eric Blossom + + * host/lib/usrp_standard.{h,cc}: mods to use halfband decimator + in FPGA. + + * fpga/sdr_lib/hb/halfband_decim.v: added documentation. + +2005-10-20 Eric Blossom + + * host/lib/usrp_standard.{h,cc} (class usrp_standard_rx): support + setting and getting rx format (8-bit values, etc). + * host/lib/usrp_basic.cc (usrp_basic): disable FPGA DEBUG_EN in ctor. + * host/lib/gen_usrp_dbid.py, host/lib/usrp_prims.h: handle and + cases. + * host/apps/test_usrp_standard_rx.cc (main): added support for 8-bit samples. + + * fpga/sdr_lib/rx_buffer.v: fixed misspelled netname. + * fpga/toplevel/usrp_std/usrp_std.v: added additional ../ to includes. + * fpga/sdr_lib/master_control.v: put FR_DEBUG_EN back to single reg. + +2005-10-17 Eric Blossom + + * firmware/include/fpga_regs_standard.h: redefined RX_FORMAT register. + * firmware/include/fpga_regs_common.h: split FR_DEBUG_EN into a TX + and an RX register. + +2005-10-13 Eric Blossom + + * host/lib/usrp_standard.cc: initialize nchannels before interp/decim + rate. Fixed problem computing polling iterval. + * host/apps/test_usrp_standard_tx.cc (main): added -M megabytes option. + +2005-09-21 Eric Blossom + + * host/lib/usrp_basic.h: adc_freq() -> adc_rate(); dac_freq() -> + dac_rate(). Also added converter_rate() which is defined on both + Tx and Rx sides. + +2005-09-20 Eric Blossom + + * host/apps/burn-db-eeprom: new. Burns eeproms on all kinds of + daughterboards. + +2005-09-17 Eric Blossom + + * host/swig/prims.i: added interface for usrp_dbid_to_string. + +2005-09-09 Larry Doolittle + + * host/apps/test_usrp_standard_rx.cc: Added -M option to specify + how many megabytes to transfer. + +2005-09-06 Martin Dudok van Heel + + * host/lib/fusb_win32.cc: Solved missing samples bug in usb code. + (Which you could see by running test_counting.py example) + +2005-08-26 Eric Blossom + + * firmware/include/fpga_regs_standard.{h,v}: Added defs for new + FR_TX_FORMAT and FR_RX_FORMAT registers. + +2005-08-19 Eric Blossom + + * doc/Makefile.am: clean-local now uses $(RM) -fr + +2005-07-29 Martin Dvh , Stephane Fillod + + * host/lib/fusb_win32.{cc,h}: WTH made win32 fast usb buffer work + * host/lib/usrp_prims.cc: Get usrp basepath for firmware from + environment variable USRP_PATH. Needed for win32 binary installer + +2005-07-24 Stephane Fillod + + * config/usrp_fusb_tech.m4: select win32 fusb for Cygwin + +2005-07-19 Eric Blossom + + * host/apps/usrp_cal_dc_offset.cc: new. control system for + determining ADC DC offset correction. Works, but really ought to + be reimplemented in FPGA and run constantly. Part of the problem + is that the offset correction varies with temperature, pga gain, + and daughterboard. + + * firmware/src/common/build_eeprom.py (build_shell_script): added + sleep 1 after each command. + + * host/lib/usrp_standard.h (class usrp_standard_rx): new method: + set_ddc_phase. + + * host/lib/usrp_basic.{h,cc}, host/lib/usrp_standard.{h,cc}: added + fusb_block_size and fusb_nblocks args to constructors so that + application code can control "fast usb" buffer. + +2005-07-11 Eric Blossom + + * host/lib/gen_usrp_dbid.py: new. Generate usrp_dbid.h, + usrp_dbid.py and usrp_dbid.cc using usrp_dbid.dat as the input file. + * host/apps/burn-basic-eeprom, host/apps/burn-dbs-eeprom, + host/apps/burn-tvrx-eeprom: import usrp_dbid + +2005-07-02 Eric Blossom + + * config/gr_no_undefined.m4, config/gr_x86_64.m4: new, x86_64 support. + * config/gr_python.m4: backed out search for libpython, making + x86_64 work and breaking Cygwin/MinGW. + * configure.ac, host/lib/Makefile.am, host/swig/Makefile.am: mods + for x86_64, $(NO_UNDEFINED) + +2005-05-18 Eric Blossom + + * host/lib/usrp_standard.{h,cc}, host/lib/usrp_basic.{h,cc}: new + start and stop methods to kick off data xfer. (Useful for + minimizing latency). + * host/apps/test_usrp_standard_{tx,rx}.cc: modified to use new + start method. + +2005-05-09 Stephane Fillod + + * config/gr_sysv_shm.m4: SysV shared memory not mandatory + * config/gr_pwin32.m4, config/gr_python.m4, config/lf_cxx.m4: + fixes for Cygwin, MinGW + * usrp.inf, usrp.iss.in: new for windows installer + +2005-05-01 Stephane Fillod + + * config/usrp_fusb_tech.m4,host/lib/Makefile.am: added win32 + fusb support. + * host/lib/fusb_sysconfig_win32.cc, host/lib/fusb_win32.{h,cc}: + new files + * host/apps/test_usrp0.cc, host/apps/test_usrp_standard_rx.cc, + host/apps/test_usrp_standard_tx.cc, host/lib/fusb.h, + host/lib/fusb_linux.cc, host/lib/fusb_sysconfig_darwin.cc, + host/lib/fusb_sysconfig_generic.cc, host/lib/fusb_sysconfig_linux.cc, + host/lib/usrp0.cc, host/lib/usrp0.h, host/lib/usrp_basic.cc, + host/lib/usrp_basic.h: do not hardcode the usb driver block_size. + * host/lib/fusb_darwin.cc, host/lib/fusb_generic.cc: typo and read + endpoint fix. + +2005-03-31 Eric Blossom + + * firmware/include/usrp_spi_defs.h,firmware/include/Makefile.am: + renamed from spi_defs.h to usrp_spi_defs.h. It's now installed. + +2005-03-26 Eric Blossom + + * host/lib/fusb_linux.cc (read): fix for x86_64 compile. + +2005-03-15 Eric Blossom + + * host/lib/usrp_basic.{h,cc}: hoisted write_aux_dac and read_aux_dac + methods out of usrp_basic and into usrp_basic_rx and usrp_basic_tx. + +2005-03-11 Eric Blossom + + * host/lib/usrp_basic.{h,cc}: new methods: set_adc_offset, + set_dac_offset, set_adc_buffer_bypass. + +2005-03-03 Eric Blossom + + * host/lib/usrp_standard.cc (set_decim_rate): added warning about rates > 128. + +2005-02-22 Eric Blossom + + * firmware/src/usrp1/spi.c (read_byte_msb): rewritten to work + around SDCC 2.4.0 bug. + +2005-02-20 Eric Blossom + + * firmware/include/usrp_ids.h (USB_PID_FSF_SSRP_reserved): added + PID for SSRP. + +2005-02-18 Eric Blossom + + * host/lib/usrp_standard.cc (set_interp_rate,set_decim_rate): added range check. + * host/lib/usrp_standard.h: doc fix. + +2005-02-16 Eric Blossom + + * host/lib/usrp_dbid.cc: new ID. + * host/lib/usrp_daughterboards.h (USRP_DBID_DBS_RX): new ID. + * host/lib/usrp_basic.{h,cc}: added read_i2c and write_i2c methods. + * host/apps/burn-dbs-eeprom: init eeprom on DBS Rx daughterboard. + +2005-02-11 Eric Blossom + + * doc/Makefile.am: fixes for distcheck. + * src/host/apps/Makefile.am: add burn-basic-eeprom to tarball. + +2005-02-10 Eric Blossom + + * configure.ac, doc/Makefile.am: build html from DocBook if + they've got xmlto installed. + +2005-02-09 Eric Blossom + + * host/lib/std_paths.h.in (std_paths): new. Use prefix to locate + fpga and firmware binaries. + + * host/lib/usrp_prims.cc (compute_hash): rewritten to use embedded + md5 code instead of calling out to program. + * host/lib/md5.{h,c}: new. imported from core-utils. + +2005-02-08 Eric Blossom + + * host/apps/usrper.cc (usage): added missing parameter. + +2005-02-06 Eric Blossom + + * configure.ac: upped rev to 0.7 for release. + * host/swig/Makefile.am: backed out dependency on libpython + * host/apps/Makefile.am, host/apps/test_fusb.cc: removed test_fusb.cc + * doc/Makefile.am: new. Generate doxygen docs. + +2005-02-05 Eric Blossom + + * fpga/Makefile.am: new. distribute verilog with tarball. + * fpga/rbf/Makefile.am: new. distribute rbf's with tarball + * host/apps/test_usrp_standard_rx.cc (main): fixed calling sequence. + +2005-02-02 Eric Blossom + + * fpga/toplevel/usrp_basic/usrp_basic.v: Removed + ch?tx_freq from list of signals passed to serial_io in order to + get it to compile. + +2005-01-28 Stephane Fillod + + * src/Makefile.am: fixes for MinGW. + +2005-01-10 Eric Blossom + + * host/lib/usrp_standard.{h,cc}: changed default strategy on mux values. + + * host/lib/usrp_basic.{h,cc}: probe d'boards and initialize + fpga adc_offset and oe regs. Add methods to control all knobs. + Includes d'board i/o pins, PGA's, query daugherboard ids. + + * host/lib/usrp_prims.{h,cc},host/lib/usrp_dbid.cc: new code to + read, parse and write d'board EEPROMs. + +2005-01-08 Eric Blossom + + * firmware/include/usrp_i2c_addr.h: doc fix on d'board EEPROM contents + +2005-01-05 Eric Blossom + + * host/lib/usrp_basic.cc (set_pga): fixed incorrect upper limit. + +2005-01-04 Eric Blossom + + * host/lib/usrp_basic.{h,cc} (class usrp_basic_rx): new methods + for controlling Rx PGA. + +2004-12-20 Eric Blossom + + * firmware/src/common/build_eeprom.py: new. builds shell script + to burn low-power code into usrp motherboard EEPROM. + +2004-12-19 Eric Blossom + + * firmware/src/usrp1/{eeprom_boot.a51,eeprom_init.c}: new. Mimimum + code that will put board in low-power state at boot time. + + * firmware/src/usrp2/Makefile.am: reorg to remove duplicate code + between rev1 and rev2. + * firmware/src/usrp2/{fpga.h,fpga_load.h,fpga_rev2.c,fpga_rev2,usrp_common.h, + usrp_globals.h,usrp_rev2_regs.h}: removed. + * firmware/src/usrp2/fpga_rev1.c: new + +2004-12-08 Eric Blossom + + * host/lib/usrp_prims.{h,cc}, host/lib/usrp_basic.cc: minor tweaks for rev2 h/w. + + * firmware/src/usrp2/.cvsignore,Makefile.am,_startup.a51,blink_leds.c, + board_specific.c,check_mdelay.c,check_udelay.c,edit-gpif,fpga.h, + fpga_load.c,fpga_load.h,fpga_rev2.c,fpga_rev2.h,gpif.c,gpif.gpf,init_gpif.c, + spi.c,spi.h,usb_descriptors.a51,usrp_common.c,usrp_common.h,usrp_globals.h, + usrp_main.c,usrp_rev2_regs.h,vectors.a51: new. copied from usrp1. + Should remerge this after we're sorted out. + +2004-11-29 Berndt Josef Wulf + + * configure.ac, config/usrp_sdcc.m4: new. check for proper version + of SDCC 8051 compiler and assembler. + * config/usrp_libusb.m4: fixed check for usb.h + +2004-11-14 Eric Blossom + + * firmware/src/usrp1/usrp_rev1_regs.h (bmMISC_OUTPUTS): removed + unused define. + (bmPORT_E_OUTPUTS): made bmPE_FPGA_CLR_STATUS an output (as it + should have been all along). + +2004-10-20 Stephane Fillod + + * configure.ac, config/Makefile.am, config/gr_pwin32.m4, + host/Makefile.am, host/apps/Makefile.am, + host/apps/time_stuff.c, host/lib/Makefile.am, + host/swig/Makefile.am: detect missing functions under Win32. + + * config/mkstemp.m4, config/onceonly.m4, + host/misc/bug_work_around_8.cc, host/misc/getopt.c, + host/misc/getopt.h, host/misc/gettimeofday.c, + host/misc/Makefile.am, host/misc/mkstemp.c, + host/misc/tempname.c, host/misc/usleep.c, + host/misc/.cvsignore: new files, replacements for win32 support + + * host/lib/usrp_prims.cc: fix libusb init on systems not as + clever as Linux (no easy shared global variable, and no + auto set_configuration). + +2004-10-20 Eric Blossom + + * firmware/src/common/Makefile.am, firmware/lib/Makefile.am, + firmware/src/common/Makefile.am, firmware/src/usrp0/Makefile.am, + firmware/src/usrp1/Makefile.am: make distcheck now works! + +2004-10-20 Stephane Fillod + + * firmware/src/common/Makefile.am, + firmware/src/common/edit-gpif, firmware/src/usrp0/Makefile.am, + firmware/src/usrp1/Makefile.am, firmware/src/usrp1/edit-gpif: + allow VPATH building. + +2004-10-18 Eric Blossom + + * fpga/sdr_lib/serial_io.v: removed dac_offset stuff. + * fpga/toplevel/usrp_basic/usrp_basic.v: removed dac_offset stuff. + Conditionalized debug output. + * host/swig/util.py: fixed import + + * fpga/toplevel/usrp_basic/usrp_basic.v,fpga/sdr_lib/serial_io.v: + modified to use 0-based naming on frequencies. + + * firmware/include/generate_all.py (generate_fpga_regs): new. + Generate fpga_regs.v from fpga_regs.h + * fpga/sdr_lib/serial_io.v: now use symbolic defines for register numbers. + +2004-10-13 Eric Blossom + + * configure.ac: upped rev to 0.5cvs + +2004-10-11 Eric Blossom + + * configure.ac: bumped rev to 0.5, made release + * Makefile.am (EXTRA_DIST): added config.h.in + +2004-09-30 Eric Blossom + + * firmware/include/usrp_i2c_addr.h: renamed from i2c_addr.h. + Now installed. + + * host/lib/usrp_basic.{h,cc}: added methods for writing/reading + aux dac/adc and eeproms. + +2004-09-29 Eric Blossom + + * host/lib/usrp_prims.{h,cc} (usrp_read_aux_adc, usrp_write_aux_dac): + Redefined the interface such that aux i/o values are 12-bit. + This buys us a bit of independence from the AD9862. + +2004-09-24 Eric Blossom + + * fpga/toplevel/usrp_basic/usrp_basic.v: subtract adc offset from + buffered input values. + +2004-09-23 Eric Blossom + + * config/usrp_fusb_tech.m4, config/bnv_have_qt.m4, config/cppunit.m4, + config/gr_check_mc4020.m4, config/gr_check_usrp.m4, config/gr_doxygen.m4, + config/gr_gprof.m4, config/gr_scripting.m4, config/gr_set_md_cpu.m4, + config/pkg.m4, config/usrp_fusb_tech.m4: added additional quoting + to first arg of AC_DEFUN to silence automake warning. + +2004-08-19 Eric Blossom + + * host/lib/usrp_basic.{h,cc}, host/lib/usrp_standard.cc: make + verbose output conditional. + +2004-08-14 Matt Ettus + + Rx timing problem fixed! + + * fpga/sdr_lib/rx_buffer.v: revised to use extended RD assertion + timing. + +2004-08-14 Eric Blossom + + * firmware/src/usrp1/{edit-gpif,gpif.gpf}: copied for common and + modified. For the time being we've got a different gpif program + for the usrp0 and usrp1, though the usrp0 should get updated to + use the new organization. + * firmware/src/usrp1/{usrp_gpif.c,usrp_gpif_inline.h}: removed + links to common. Now generated in usrp1 from usrp1 specific gpif.c + +2004-08-06 Eric Blossom + + * host/lib/fusb_linux.cc (write): failure of submit_urb is now + propagated upward as an error. + +2004-08-04 Eric Blossom + + Rx counting and Rx/Tx digital loopback are now working, modulo the + problem at the beginning of the packet. The good news is that it + is completely reproducible, and there's no PLL being used in the FPGA. + + * host/lib/usrp_basic.{h,cc} (set_usb_data_rate,usb_data_rate): new methods. + * host/lib/usrp_standard.{h,cc}: polling rate is now + f(usb_data_rate). Moved fpga_mode into rx only, and changed + constructor to take optional mode. + * host/apps/test_usrp_standard_rx.cc (main): changes to match new + constructor. + * host/apps/test_usrp_standard_tx.cc (main): -c generates counting + sequence. + * fpga/toplevel/usrp_basic/usrp_basic.v: Fixed race. Changed + strobe_decim to strobe_interp in loopback setup. + * fpga/sdr_lib/tx_buffer.v: Removed unnecessary zero assignment. + +2004-07-31 Eric Blossom + + * host/apps/test_usrp_standard_tx.cc (main): added -l (loopback) option + * host/apps/test_usrp_standard_tx.cc (main): added -l (loopback) option + + * firmware/include/fpga_regs.h (FR_MODE): added new mode register. + * host/lib/usrp_basic.cc (usrp_basic): init to non-loopback mode + + * host/apps/test_usrp_standard_tx.cc (main): changed default + interp rate to 16 (=> 32MB/sec). + + * host/lib/usrp_bytesex.h (host_to_usrp_short): New. Conditional + byte swapping between host and usrp. + * host/app/test_usrp0.cc: added conditional byte swapping. + * host/app/test_usrp_standard_{rx,tx}.cc: added conditional byte swapping. + +2004-07-30 Eric Blossom + + * host/swig/Makefile.am: now installs usrp_prims.* directly in site-packages. + One could argue that this isn't particularly pretty, but it does + get it into the namespace where we want it. + +2004-07-29 Eric Blossom + + * host/apps/test_usrp0.cc (main): added code to set tx frequency. + +2004-07-12 Eric Blossom + + * configure.ac: upped rev to 0.4cvs + +2004-07-11 Eric Blossom + + * host/lib/usrp_basic.cc: invert TX_SYNC + + * host/lib/usrp_basic.{h,cc},usrp_standard.cc: now temporarily + disable tx and rx paths when changing interpolation or decimation + rate. Didn't fix the problem, but shouldn't hurt either. + +2004-07-07 Eric Blossom + + * firmware/src/common/_startup.a51 (__sdcc_external_startup): + Rewritten to avoid fragile kludge. Now requires that all firmware + be compiled with --no-xinit-opt. + + * firmware/src/usrp{0,1}/Makefile.am: pass in linker option to + place usb descriptors at 0xE000 absolute. This works around the + fact that the assembler and linker don't really implement the + .even directive. + * firmware/src/usrp{0,1}/usb_descriptors.a51: now place + descriptors in USBDESCSEG, which we force to 0xE000. + + * firmware/src/usrp1/board_specific.c (power_down_9862s): + Power down the 9862's when the firmware is loaded to keep from + burning up the board. Note to Analog Devices: put a power pad + on these or some other way to get the heat out of them. + + * host/lib/usrp_prims.cc (_usrp_load_fpga): Since loading the FPGA + wiggles the shared reset line with the 9862s, we now once again + power down the 9862's. + +2004-07-06 Eric Blossom + + * firmware/src/common/_startup.a51 (__sdcc_external_startup): + picked up bug fixes from 2.4.0 release, and added a fragile kludge + that ensures that our variables are all initialized properly. + + * firmware/src/usrp0/usrp_main.c, firmware/src/usrp1/usrp_main.c, + firmware/src/common/usb_common.c: removed deprecated use of + pragma NOIV. + +2004-07-05 Eric Blossom + + * host/lib/fusb_linux.cc (alloc_urb): removed + USBDEVFS_URB_QUEUE_BULK flag. + +2004-07-02 Eric Blossom + + * host/lib/usrp_basic.h: added adc_freq and dac_freq + to disambiguate the interpretation of interpolation and decimation + ratios. + +2004-07-01 Eric Blossom + + * host/swig/prims.i: renamed from usrp_prims.i Module is now + installed as usrp.prims + * host/lib/usrp_basic.cc (usrp_basic_tx, usrp_basic_rx): power + down 9862 tx or rx path in destructor. + * host/lib/usrp_standard.cc: now control coarse and fine + modulators transparently, based on user provided center freq. + * fpga/sdr_lib/gen_cordic_consts.py: new. generate magic constants for cordic. + * fpga/sdr_lib/cordic.v: `define constants. integer c00 = + wasn't being synthesized correctly by Quartus II 4.0 + +2004-05-28 Eric Blossom + + * host/lib/usrp_standard.{h,cc}: Now uses 4x interpolator and + 9862 cordic. Tx path looks great up to +/- 44 MHz! + This code still twiddles the coarse modulator manually. + +2004-05-27 Eric Blossom + + * Tagged everything with BEFORE_CLOCK_REVAMP_2004_05_27. + We're about to rework the boards, host code and the verilog to + directly feed the 64 MHz oscillator to the 9862's and the FPGA. + With any luck, life will drastically improve... + + +2004-05-25 Eric Blossom + + * host/lib/usrp_standard.{h,cc} (class usrp_standard_tx_use_nco): + new. Class that utilizes the AD9862's built-in NCO for up conversion. + There's still something slightly flaky going on. + + * host/lib/usrp_basic.cc: initialize 9862 Tx FTW + +2004-05-21 Eric Blossom + + * firmware/src/usrp1/usrp_main.c (main): work around compiler + data initialization bug. + + * firmware/src/usrp1/fpga_rev1.{h,c}: added support for {TX,RX}_RESET + +2004-05-10 Eric Blossom + + * host/lib/usrp_basic.cc (~usrp_basic_rx): turn off rx_enable. + + * firmware/src/usrp1/usrp_main.c: removed unneeded global + g_fpga_reset. + +2004-05-08 Eric Blossom + + * firmware/src/usrp1/usrp_main.c (main): enabled GSTATE output. + +2004-05-07 Eric Blossom + + * host/lib/usrp_standard.cc (make): changed constructors and make + to pass the interp/decim rate. This ensures that the rate is set + to something the user wants when the rx and tx paths are first + enabled. + + * host/lib/usrp_basic.cc (initialize): enabled xrun status polling. + (set_fpga_rx_sample_rate_divisor,set_fpga_rx_sample_rate_divisor): + set FPGA register to N-1. + + * host/lib/usrp_standard.cc (set_interp_rate, set_decim_rate): now + set FPGA register to N-1. + +2004-04-18 Eric Blossom + + * firmware/src/usrp1/spi.c (spi_read, spi_write): removed extra + clocks. FPGA is now doing the right thing. + + * host/lib/ad9862.h: new. register defs for AD962 codec. + + * firmware/src/usrp1/spi.c (spi_write,spi_read): clock once w/o + enables for the FPGA's benefit. We're also clocking one extra + cycle at the end with enables again for the FPGA. I think we + should remove the extra clocking at the end. + +2004-04-17 Eric Blossom + + * host/lib/usrp_prims.{h,cc} (usrp_read_aux_adc,usrp_write_aux_dac): new. + * host/lib/usrp_prims.{h,cc} (usrp_eeprom_write,usrp_eeprom_read): new. + +2004-04-16 Eric Blossom + + * firmware/include/i2c_addr.h: new. I2C addresses. + +2004-04-12 Eric Blossom + + * host/apps/test_usrp0.cc: renamed from test_usrp.cc + * firmware/include/fpga_regs.h: corrected to match latest control_bus.v + +2004-04-11 Eric Blossom + + * host/lib/usrp0.{h,cc}: new. copies of original usrp.{h,cc} + * host/lib/usrp_basic.{h,cc}: new. reflect rev1 hardware. + +2004-04-10 Eric Blossom + + * host/swig/usrp_prims.i: new. SWIG'd usrp_prims. + * host/lib/usrp_prims.cc: added usrp_rescan; dispatch on hardware revision + when appropriate; added usrp_read_fpga_reg + * firmware/src/usrp1/fpga_rev1.h: added declarations + * firmware/src/usrp1/fpga_rev.c: added implementations for + fpga_write_reg, fpga_set_reset, fpga_set_tx_enable, fpga_set_rx_enable. + * firmware/include/fpga_regs0.h: renamed prev fpga_regs.h to fpga_regs0.h + * firmware/include/fpga_regs.h: new for usrp rev1. Needs checking + against verilog. + + +2004-03-01 Eric Blossom + + * host/lib/rate_to_regval.h: new. mapping table. + * host/lib/usrp.cc (map_rate_to_regval): now support all 97 legal + values. + +2004-01-11 Eric Blossom + + * configure.ac: configure fast usb technique as f(os) + * config/usrp_fusb_tech.m4: new autoconf macro + * host/lib/fusb.{h,cc}: refactored in to abstract class + * host/lib/fusb_{darwin,generic,linux}.{h,cc}: new concrete classes + * host/lib/fusb_sysconfig_{darwin,generic,linux}.cc: new + + * config/usrp_libusb.m4: new. check for libusb. + * configure.ac: check for libusb + + * firmware/src/Makefile.am: fixed dependencies + * firmware/src/fpga.{h,c}, firmware/src/usrp_main.c: cleanup to + make board with no FPGA usable again. + * firmware/include/usrp_config.h: doc fix. + +2003-12-30 Eric Blossom + + * host/lib/fusb.cc (alloc_urb): fixes for linux 2.5/2.6 + +2003-12-12 Eric Blossom + + * firmware/lib/i2c.c (i2c_read): worked around sdcc compiler bug. + +2003-12-07 Eric Blossom + + * configure.ac: autoconfiscated the firmware directory. It now + builds from the top along with the host code. + + * I've touched just about every file in the tree, both + firmware and host side. The combo is now working well. It is + capable of half duplex reading or writing at 31.25 MB/sec and + (pseudo) full duplex reading and writing at 15.625 MS/sec in each + direction. + + In addition, the receive side is decoupled from the transmit side + so that separate processes can open each side. + + +2003-11-27 Eric Blossom + + * firmware/src/fpga.c (clock_out_config_byte): assembly speedup + for loading fpga. + + basic support for interrupts is now working. + + * firmware/lib/{isr.c,timer.c}: new + * firmware/include/{isr.h,timer.h}: new + * firmware/src/command_loop.c (isr_tick): blink led + +2003-11-21 Eric Blossom + + * firmware/src/edit-gpif (edit_gpif): now leave xdata alone + * firmware/src/init_gpif.c: added xdata storage qualifer + * firmware/Makefile: added linker opts to get xdata located properly + + Rearranged the firmware directory. + firmware/basic_fw/include --> firmware/include + firmware/basic_fw/src --> firmware/src + All older firmware stuff was removed + +2003-11-15 Eric Blossom + + * host/lib/fusb.cc (fusb_devhandle, _cancel_pending_rqsts): now + use reverse_iterator to cancel pending requests from the back to + the front. This removes the mystery of more than one cancelled + urb having a non-zero transfer count. + + * host/lib/test_fusb.cc (test_output): fixed defective test case + that was having me think the tx code wasn't working. + +2003-11-13 Eric Blossom + + * host/lib/fusb.{h,cc}: work in progress on the Rx path. + +2003-11-11 Eric Blossom + + * host/lib/fusb.{h,cc}: halved net Tx memory requirement by using + a single user mode buffer. + +2003-11-10 Eric Blossom + + System is now sustaining 31MB/sec on the TX path, no underruns ;-) + + * firmware/basic_fw/src/edit-gpif: now machine generate inline + definitions for setup_flowstate_common, setup_flowstate_read and + setup_flowstate_write. + + * firmware/basic_fw/src/usrp_common.c: clear_usrp_error now clears + over and underrun flags from status word. + * firmware/basic_fw/src/usrp_comands.c: added bit defs for overrun + and underrun status indicators. + * firmware/basic_fw/src/command_loop.c (poll_gpif): now checks for + over and underruns and clears fpga status. + + * firmware/basic_fw/include/usrp_regs.h (bmFCB_CLR_STATUS): moved + FPGA clear_status line to the previous location of SDO. This + means that firmware from here out will only work with the latest + FPGA bitstreams that have this pin configurd as an input. + + * host/lib/fusb.{h,cc}: fast streaming usb library built on top of libusb. + This version uses linux specific magic. + + * host/lib/test_fusb.cc: test and benchmarking code for fusb. + +2003-11-08 Eric Blossom + + * firmware/basic_fw/src/gpif.gpf: moved BOGUS ctl line to CTL5. + Added clear_status as CTL3. + * firmware/basic_fw/src/usrp_common.c (init_usrp): removed + obsolete ENABLE_FIFO ifdef. Disabled RX pump priming. + * firmware/basic_fw/src/command_loop.c (main): enable both RX and TX. + +2003-10-22 Eric Blossom + + * host/lib/Usrp.{h,cc}: added accessors for get_rx_freq, get_tx_freq + +2003-10-17 Eric Blossom + + * host/usrper/test_input.cc (main): new program to exercise USRP + input path. + + * host/lib/Usrp.{h,cc} (read): changed return value from bool to int + +2003-09-30 Eric Blossom + + * host/lib/Usrp.{h,cc}: handle new format interp and decim regs. + * firmware/basic_fw/src/command_loop.c (g_enable_read): disabled + read for the time being. + +2003-09-17 Eric Blossom + + * host/lib/Usrp.cc (find_file): changed load path for firmware and + fpga bits to to /usr/local/share/usrp. + (Usrp): now set gstate, sleep, fpga_reset and tx_enable per Matt's + script. + +2003-09-16 Eric Blossom + + * AUTHORS, NEWS, README: new & empty + * bootstrap, configure.ac, Makefile.am: new for autoconfiscation + * host/Makefile.am, host/lib/Makefile.am, host/usrper/Makefile.am: new + * host/lib/{Makefile.am,Usrp.{h,cc}}: new class to interface to USRP. + * host/usrper/usrper2.cc: new code to exercise Usrp.{h,cc} + + * host/usrper/usrper.cc: removed uneeded includes + +2003-09-04 Eric Blossom + + * firmware/basic_fw/src/usrp_commands.h, + firmware/basic_fw/src/command_loop.c (do_set_sleep_bits), + host/usrper/usrper.cc (usrp_set_sleep_bits): added command to slam + the A/D and D/A sleep control lines. + + +2003-08-30 Eric Blossom + + * firmware/basic_fw/src/usrp_commands.h: removed obsolete + foo_CLR_bar commands. Added UCMD_SET_GSTATE_OUTPUT_ENABLE to + enable the output of the GPIF state on the low 3 bits of Port E. + + * host/usrper/usrper.cc (usrper_load_firmware): now implements + "load_firmware" command. + +2003-08-17 Eric Blossom + + * host/usrper/usrper.cc (usrper_load_fpga), + firmware/basic_fw/src/fpga.c: changed load_fpga to expect a byte + count, not a bit count in the xfer packet. + + * firmware/basic_fw/src/fpga.c (do_fpga_config_start): cleanup, + add appropriate delay. + + * firmware/basic_fw/src/usrp_common.c (udelay1, udelay): new delay functions + +2003-07-30 Eric Blossom + + * firmware/basic_fw/include/fx2regs.h: changed sfr and sbit syntax + to match what SDCC expects. Now the SFR's are really allocated + where they are supposed to be ;-) + +# +# Copyright 2003,2004,2005 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# diff --git a/Makefile.am b/Makefile.am new file mode 100644 index 0000000..cd908c8 --- /dev/null +++ b/Makefile.am @@ -0,0 +1,25 @@ +# +# Copyright 2003 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +EXTRA_DIST = usrp.pc.in usrp.iss.in usrp.inf + +SUBDIRS = host firmware fpga doc + diff --git a/README b/README new file mode 100644 index 0000000..63ff4a2 --- /dev/null +++ b/README @@ -0,0 +1,37 @@ +# +# README -- the short version +# + +The top level makefile handles the host code and FX2 firmware. + +Besides the normal gcc suite and all the auto tools, you'll need +the SDCC free C compiler to build the firmware. You MUST +USE VERSION 2.4.0 or VERSION 2.5.0 due to some problems with variable +initialization. http://sdcc.sourceforge.net + + +# To get started... + +./bootstrap # if you're building from CVS + +./configure +make && make check && make install + + +The high level interface to the USRP using our standard FPGA bitstram +is contained in usrp/host/lib/usrp_standard.h + +If you've got doxygen installed, there are html docs in +usrp/doc/html/index.html + + +# Compiling the verilog (not required unless you're modifying it) + +If you want to build the FPGA .rbf file from source (not required; we +provide pre-compiled .rbf files in usrp/fpga/rbf directory), you'll +need Altera's no cost Quartus II development tools. We're currently +building with Quartus II 5.1sp1 Web Edition. The project file is +usrp/fpga/toplevel/usrp_std/usrp_std.qpf. The toplevel verilog file +is usrp/fpga/toplevel/usrp_std/usrp_std.v. The bulk of the verilog +modules are contained in usrp/fpga/sdr_lib + diff --git a/doc/Doxyfile.in b/doc/Doxyfile.in new file mode 100644 index 0000000..e0533e5 --- /dev/null +++ b/doc/Doxyfile.in @@ -0,0 +1,1167 @@ +# +# Copyright 2001,2004,2005 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +# Doxyfile 1.3.7 + +# This file describes the settings to be used by the documentation system +# doxygen (www.doxygen.org) for a project +# +# All text after a hash (#) is considered a comment and will be ignored +# The format is: +# TAG = value [value, ...] +# For lists items can also be appended using: +# TAG += value [value, ...] +# Values that contain spaces should be placed between quotes (" ") + +#--------------------------------------------------------------------------- +# Project related configuration options +#--------------------------------------------------------------------------- + +# The PROJECT_NAME tag is a single word (or a sequence of words surrounded +# by quotes) that should identify the project. + +PROJECT_NAME = "Universal Software Radio Peripheral" + +# The PROJECT_NUMBER tag can be used to enter a project or revision number. +# This could be handy for archiving the generated documentation or +# if some version control system is used. + +PROJECT_NUMBER = + +# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) +# base path where the generated documentation will be put. +# If a relative path is entered, it will be relative to the location +# where doxygen was started. If left blank the current directory will be used. + +OUTPUT_DIRECTORY = + +# If the CREATE_SUBDIRS tag is set to YES, then doxygen will create +# 2 levels of 10 sub-directories under the output directory of each output +# format and will distribute the generated files over these directories. +# Enabling this option can be useful when feeding doxygen a huge amount of source +# files, where putting all generated files in the same directory would otherwise +# cause performance problems for the file system. + +CREATE_SUBDIRS = NO + +# The OUTPUT_LANGUAGE tag is used to specify the language in which all +# documentation generated by doxygen is written. Doxygen will use this +# information to generate all constant output in the proper language. +# The default language is English, other supported languages are: +# Brazilian, Catalan, Chinese, Chinese-Traditional, Croatian, Czech, Danish, Dutch, +# Finnish, French, German, Greek, Hungarian, Italian, Japanese, Japanese-en +# (Japanese with English messages), Korean, Korean-en, Norwegian, Polish, Portuguese, +# Romanian, Russian, Serbian, Slovak, Slovene, Spanish, Swedish, and Ukrainian. + +OUTPUT_LANGUAGE = English + +# This tag can be used to specify the encoding used in the generated output. +# The encoding is not always determined by the language that is chosen, +# but also whether or not the output is meant for Windows or non-Windows users. +# In case there is a difference, setting the USE_WINDOWS_ENCODING tag to YES +# forces the Windows encoding (this is the default for the Windows binary), +# whereas setting the tag to NO uses a Unix-style encoding (the default for +# all platforms other than Windows). + +USE_WINDOWS_ENCODING = NO + +# If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will +# include brief member descriptions after the members that are listed in +# the file and class documentation (similar to JavaDoc). +# Set to NO to disable this. + +BRIEF_MEMBER_DESC = YES + +# If the REPEAT_BRIEF tag is set to YES (the default) Doxygen will prepend +# the brief description of a member or function before the detailed description. +# Note: if both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the +# brief descriptions will be completely suppressed. + +REPEAT_BRIEF = YES + +# This tag implements a quasi-intelligent brief description abbreviator +# that is used to form the text in various listings. Each string +# in this list, if found as the leading text of the brief description, will be +# stripped from the text and the result after processing the whole list, is used +# as the annotated text. Otherwise, the brief description is used as-is. If left +# blank, the following values are used ("$name" is automatically replaced with the +# name of the entity): "The $name class" "The $name widget" "The $name file" +# "is" "provides" "specifies" "contains" "represents" "a" "an" "the" + +ABBREVIATE_BRIEF = + +# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then +# Doxygen will generate a detailed section even if there is only a brief +# description. + +ALWAYS_DETAILED_SEC = NO + +# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all inherited +# members of a class in the documentation of that class as if those members were +# ordinary class members. Constructors, destructors and assignment operators of +# the base classes will not be shown. + +INLINE_INHERITED_MEMB = NO + +# If the FULL_PATH_NAMES tag is set to YES then Doxygen will prepend the full +# path before files name in the file list and in the header files. If set +# to NO the shortest path that makes the file name unique will be used. + +FULL_PATH_NAMES = NO + +# If the FULL_PATH_NAMES tag is set to YES then the STRIP_FROM_PATH tag +# can be used to strip a user-defined part of the path. Stripping is +# only done if one of the specified strings matches the left-hand part of +# the path. The tag can be used to show relative paths in the file list. +# If left blank the directory from which doxygen is run is used as the +# path to strip. + +STRIP_FROM_PATH = + +# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of +# the path mentioned in the documentation of a class, which tells +# the reader which header file to include in order to use a class. +# If left blank only the name of the header file containing the class +# definition is used. Otherwise one should specify the include paths that +# are normally passed to the compiler using the -I flag. + +STRIP_FROM_INC_PATH = + +# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter +# (but less readable) file names. This can be useful is your file systems +# doesn't support long names like on DOS, Mac, or CD-ROM. + +SHORT_NAMES = NO + +# If the JAVADOC_AUTOBRIEF tag is set to YES then Doxygen +# will interpret the first line (until the first dot) of a JavaDoc-style +# comment as the brief description. If set to NO, the JavaDoc +# comments will behave just like the Qt-style comments (thus requiring an +# explicit @brief command for a brief description. + +JAVADOC_AUTOBRIEF = NO + +# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make Doxygen +# treat a multi-line C++ special comment block (i.e. a block of //! or /// +# comments) as a brief description. This used to be the default behaviour. +# The new default is to treat a multi-line C++ comment block as a detailed +# description. Set this tag to YES if you prefer the old behaviour instead. + +MULTILINE_CPP_IS_BRIEF = NO + +# If the DETAILS_AT_TOP tag is set to YES then Doxygen +# will output the detailed description near the top, like JavaDoc. +# If set to NO, the detailed description appears after the member +# documentation. + +DETAILS_AT_TOP = YES + +# If the INHERIT_DOCS tag is set to YES (the default) then an undocumented +# member inherits the documentation from any documented member that it +# re-implements. + +INHERIT_DOCS = YES + +# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC +# tag is set to YES, then doxygen will reuse the documentation of the first +# member in the group (if any) for the other members of the group. By default +# all members of a group must be documented explicitly. + +DISTRIBUTE_GROUP_DOC = NO + +# The TAB_SIZE tag can be used to set the number of spaces in a tab. +# Doxygen uses this value to replace tabs by spaces in code fragments. + +TAB_SIZE = 8 + +# This tag can be used to specify a number of aliases that acts +# as commands in the documentation. An alias has the form "name=value". +# For example adding "sideeffect=\par Side Effects:\n" will allow you to +# put the command \sideeffect (or @sideeffect) in the documentation, which +# will result in a user-defined paragraph with heading "Side Effects:". +# You can put \n's in the value part of an alias to insert newlines. + +ALIASES = + +# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C sources +# only. Doxygen will then generate output that is more tailored for C. +# For instance, some of the names that are used will be different. The list +# of all members will be omitted, etc. + +OPTIMIZE_OUTPUT_FOR_C = NO + +# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java sources +# only. Doxygen will then generate output that is more tailored for Java. +# For instance, namespaces will be presented as packages, qualified scopes +# will look different, etc. + +OPTIMIZE_OUTPUT_JAVA = NO + +# Set the SUBGROUPING tag to YES (the default) to allow class member groups of +# the same type (for instance a group of public functions) to be put as a +# subgroup of that type (e.g. under the Public Functions section). Set it to +# NO to prevent subgrouping. Alternatively, this can be done per class using +# the \nosubgrouping command. + +SUBGROUPING = YES + +#--------------------------------------------------------------------------- +# Build related configuration options +#--------------------------------------------------------------------------- + +# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in +# documentation are documented, even if no documentation was available. +# Private class members and static file members will be hidden unless +# the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES + +EXTRACT_ALL = YES + +# If the EXTRACT_PRIVATE tag is set to YES all private members of a class +# will be included in the documentation. + +EXTRACT_PRIVATE = NO + +# If the EXTRACT_STATIC tag is set to YES all static members of a file +# will be included in the documentation. + +EXTRACT_STATIC = NO + +# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs) +# defined locally in source files will be included in the documentation. +# If set to NO only classes defined in header files are included. + +EXTRACT_LOCAL_CLASSES = YES + +# This flag is only useful for Objective-C code. When set to YES local +# methods, which are defined in the implementation section but not in +# the interface are included in the documentation. +# If set to NO (the default) only methods in the interface are included. + +EXTRACT_LOCAL_METHODS = NO + +# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all +# undocumented members of documented classes, files or namespaces. +# If set to NO (the default) these members will be included in the +# various overviews, but no documentation section is generated. +# This option has no effect if EXTRACT_ALL is enabled. + +HIDE_UNDOC_MEMBERS = NO + +# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all +# undocumented classes that are normally visible in the class hierarchy. +# If set to NO (the default) these classes will be included in the various +# overviews. This option has no effect if EXTRACT_ALL is enabled. + +HIDE_UNDOC_CLASSES = NO + +# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all +# friend (class|struct|union) declarations. +# If set to NO (the default) these declarations will be included in the +# documentation. + +HIDE_FRIEND_COMPOUNDS = NO + +# If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any +# documentation blocks found inside the body of a function. +# If set to NO (the default) these blocks will be appended to the +# function's detailed documentation block. + +HIDE_IN_BODY_DOCS = NO + +# The INTERNAL_DOCS tag determines if documentation +# that is typed after a \internal command is included. If the tag is set +# to NO (the default) then the documentation will be excluded. +# Set it to YES to include the internal documentation. + +INTERNAL_DOCS = NO + +# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate +# file names in lower-case letters. If set to YES upper-case letters are also +# allowed. This is useful if you have classes or files whose names only differ +# in case and if your file system supports case sensitive file names. Windows +# users are advised to set this option to NO. + +CASE_SENSE_NAMES = YES + +# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen +# will show members with their full class and namespace scopes in the +# documentation. If set to YES the scope will be hidden. + +HIDE_SCOPE_NAMES = NO + +# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen +# will put a list of the files that are included by a file in the documentation +# of that file. + +SHOW_INCLUDE_FILES = YES + +# If the INLINE_INFO tag is set to YES (the default) then a tag [inline] +# is inserted in the documentation for inline members. + +INLINE_INFO = YES + +# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen +# will sort the (detailed) documentation of file and class members +# alphabetically by member name. If set to NO the members will appear in +# declaration order. + +SORT_MEMBER_DOCS = YES + +# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the +# brief documentation of file, namespace and class members alphabetically +# by member name. If set to NO (the default) the members will appear in +# declaration order. + +SORT_BRIEF_DOCS = NO + +# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be +# sorted by fully-qualified names, including namespaces. If set to +# NO (the default), the class list will be sorted only by class name, +# not including the namespace part. +# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES. +# Note: This option applies only to the class list, not to the +# alphabetical list. + +SORT_BY_SCOPE_NAME = NO + +# The GENERATE_TODOLIST tag can be used to enable (YES) or +# disable (NO) the todo list. This list is created by putting \todo +# commands in the documentation. + +GENERATE_TODOLIST = YES + +# The GENERATE_TESTLIST tag can be used to enable (YES) or +# disable (NO) the test list. This list is created by putting \test +# commands in the documentation. + +GENERATE_TESTLIST = YES + +# The GENERATE_BUGLIST tag can be used to enable (YES) or +# disable (NO) the bug list. This list is created by putting \bug +# commands in the documentation. + +GENERATE_BUGLIST = YES + +# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or +# disable (NO) the deprecated list. This list is created by putting +# \deprecated commands in the documentation. + +GENERATE_DEPRECATEDLIST= YES + +# The ENABLED_SECTIONS tag can be used to enable conditional +# documentation sections, marked by \if sectionname ... \endif. + +ENABLED_SECTIONS = + +# The MAX_INITIALIZER_LINES tag determines the maximum number of lines +# the initial value of a variable or define consists of for it to appear in +# the documentation. If the initializer consists of more lines than specified +# here it will be hidden. Use a value of 0 to hide initializers completely. +# The appearance of the initializer of individual variables and defines in the +# documentation can be controlled using \showinitializer or \hideinitializer +# command in the documentation regardless of this setting. + +MAX_INITIALIZER_LINES = 30 + +# Set the SHOW_USED_FILES tag to NO to disable the list of files generated +# at the bottom of the documentation of classes and structs. If set to YES the +# list will mention the files that were used to generate the documentation. + +SHOW_USED_FILES = YES + +#--------------------------------------------------------------------------- +# configuration options related to warning and progress messages +#--------------------------------------------------------------------------- + +# The QUIET tag can be used to turn on/off the messages that are generated +# by doxygen. Possible values are YES and NO. If left blank NO is used. + +QUIET = NO + +# The WARNINGS tag can be used to turn on/off the warning messages that are +# generated by doxygen. Possible values are YES and NO. If left blank +# NO is used. + +WARNINGS = YES + +# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings +# for undocumented members. If EXTRACT_ALL is set to YES then this flag will +# automatically be disabled. + +WARN_IF_UNDOCUMENTED = YES + +# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for +# potential errors in the documentation, such as not documenting some +# parameters in a documented function, or documenting parameters that +# don't exist or using markup commands wrongly. + +WARN_IF_DOC_ERROR = YES + +# The WARN_FORMAT tag determines the format of the warning messages that +# doxygen can produce. The string should contain the $file, $line, and $text +# tags, which will be replaced by the file and line number from which the +# warning originated and the warning text. + +WARN_FORMAT = "$file:$line: $text" + +# The WARN_LOGFILE tag can be used to specify a file to which warning +# and error messages should be written. If left blank the output is written +# to stderr. + +WARN_LOGFILE = + +#--------------------------------------------------------------------------- +# configuration options related to the input files +#--------------------------------------------------------------------------- + +# The INPUT tag can be used to specify the files and/or directories that contain +# documented source files. You may enter file names like "myfile.cpp" or +# directories like "/usr/src/myproject". Separate the files or directories +# with spaces. + +INPUT = @top_srcdir@/host \ + @top_srcdir@/doc/other + +# If the value of the INPUT tag contains directories, you can use the +# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp +# and *.h) to filter out the source-files in the directories. If left +# blank the following patterns are tested: +# *.c *.cc *.cxx *.cpp *.c++ *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh *.hxx *.hpp +# *.h++ *.idl *.odl *.cs *.php *.php3 *.inc *.m *.mm + +FILE_PATTERNS = *.h \ + *.cc \ + *.dox + +# The RECURSIVE tag can be used to turn specify whether or not subdirectories +# should be searched for input files as well. Possible values are YES and NO. +# If left blank NO is used. + +RECURSIVE = YES + +# The EXCLUDE tag can be used to specify files and/or directories that should +# excluded from the INPUT source files. This way you can easily exclude a +# subdirectory from a directory tree whose root is specified with the INPUT tag. + +EXCLUDE = CVS \ + @top_srcdir@/host/swig + +# The EXCLUDE_SYMLINKS tag can be used select whether or not files or directories +# that are symbolic links (a Unix filesystem feature) are excluded from the input. + +EXCLUDE_SYMLINKS = NO + +# If the value of the INPUT tag contains directories, you can use the +# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude +# certain files from those directories. + +EXCLUDE_PATTERNS = moc_*.cc + +# The EXAMPLE_PATH tag can be used to specify one or more files or +# directories that contain example code fragments that are included (see +# the \include command). + +EXAMPLE_PATH = + +# If the value of the EXAMPLE_PATH tag contains directories, you can use the +# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp +# and *.h) to filter out the source-files in the directories. If left +# blank all files are included. + +EXAMPLE_PATTERNS = + +# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be +# searched for input files to be used with the \include or \dontinclude +# commands irrespective of the value of the RECURSIVE tag. +# Possible values are YES and NO. If left blank NO is used. + +EXAMPLE_RECURSIVE = NO + +# The IMAGE_PATH tag can be used to specify one or more files or +# directories that contain image that are included in the documentation (see +# the \image command). + +IMAGE_PATH = + +# The INPUT_FILTER tag can be used to specify a program that doxygen should +# invoke to filter for each input file. Doxygen will invoke the filter program +# by executing (via popen()) the command , where +# is the value of the INPUT_FILTER tag, and is the name of an +# input file. Doxygen will then use the output that the filter program writes +# to standard output. + +INPUT_FILTER = + +# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using +# INPUT_FILTER) will be used to filter the input files when producing source +# files to browse (i.e. when SOURCE_BROWSER is set to YES). + +FILTER_SOURCE_FILES = NO + +#--------------------------------------------------------------------------- +# configuration options related to source browsing +#--------------------------------------------------------------------------- + +# If the SOURCE_BROWSER tag is set to YES then a list of source files will +# be generated. Documented entities will be cross-referenced with these sources. +# Note: To get rid of all source code in the generated output, make sure also +# VERBATIM_HEADERS is set to NO. + +SOURCE_BROWSER = NO + +# Setting the INLINE_SOURCES tag to YES will include the body +# of functions and classes directly in the documentation. + +INLINE_SOURCES = NO + +# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct +# doxygen to hide any special comment blocks from generated source code +# fragments. Normal C and C++ comments will always remain visible. + +STRIP_CODE_COMMENTS = YES + +# If the REFERENCED_BY_RELATION tag is set to YES (the default) +# then for each documented function all documented +# functions referencing it will be listed. + +REFERENCED_BY_RELATION = YES + +# If the REFERENCES_RELATION tag is set to YES (the default) +# then for each documented function all documented entities +# called/used by that function will be listed. + +REFERENCES_RELATION = YES + +# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen +# will generate a verbatim copy of the header file for each class for +# which an include is specified. Set to NO to disable this. + +VERBATIM_HEADERS = YES + +#--------------------------------------------------------------------------- +# configuration options related to the alphabetical class index +#--------------------------------------------------------------------------- + +# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index +# of all compounds will be generated. Enable this if the project +# contains a lot of classes, structs, unions or interfaces. + +ALPHABETICAL_INDEX = NO + +# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then +# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns +# in which this list will be split (can be a number in the range [1..20]) + +COLS_IN_ALPHA_INDEX = 5 + +# In case all classes in a project start with a common prefix, all +# classes will be put under the same header in the alphabetical index. +# The IGNORE_PREFIX tag can be used to specify one or more prefixes that +# should be ignored while generating the index headers. + +IGNORE_PREFIX = + +#--------------------------------------------------------------------------- +# configuration options related to the HTML output +#--------------------------------------------------------------------------- + +# If the GENERATE_HTML tag is set to YES (the default) Doxygen will +# generate HTML output. + +GENERATE_HTML = YES + +# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `html' will be used as the default path. + +HTML_OUTPUT = html + +# The HTML_FILE_EXTENSION tag can be used to specify the file extension for +# each generated HTML page (for example: .htm,.php,.asp). If it is left blank +# doxygen will generate files with .html extension. + +HTML_FILE_EXTENSION = .html + +# The HTML_HEADER tag can be used to specify a personal HTML header for +# each generated HTML page. If it is left blank doxygen will generate a +# standard header. + +HTML_HEADER = + +# The HTML_FOOTER tag can be used to specify a personal HTML footer for +# each generated HTML page. If it is left blank doxygen will generate a +# standard footer. + +HTML_FOOTER = + +# The HTML_STYLESHEET tag can be used to specify a user-defined cascading +# style sheet that is used by each HTML page. It can be used to +# fine-tune the look of the HTML output. If the tag is left blank doxygen +# will generate a default style sheet. Note that doxygen will try to copy +# the style sheet file to the HTML output directory, so don't put your own +# stylesheet in the HTML output directory as well, or it will be erased! + +HTML_STYLESHEET = + +# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes, +# files or namespaces will be aligned in HTML using tables. If set to +# NO a bullet list will be used. + +HTML_ALIGN_MEMBERS = YES + +# If the GENERATE_HTMLHELP tag is set to YES, additional index files +# will be generated that can be used as input for tools like the +# Microsoft HTML help workshop to generate a compressed HTML help file (.chm) +# of the generated HTML documentation. + +GENERATE_HTMLHELP = NO + +# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can +# be used to specify the file name of the resulting .chm file. You +# can add a path in front of the file if the result should not be +# written to the html output directory. + +CHM_FILE = + +# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can +# be used to specify the location (absolute path including file name) of +# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run +# the HTML help compiler on the generated index.hhp. + +HHC_LOCATION = + +# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag +# controls if a separate .chi index file is generated (YES) or that +# it should be included in the master .chm file (NO). + +GENERATE_CHI = NO + +# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag +# controls whether a binary table of contents is generated (YES) or a +# normal table of contents (NO) in the .chm file. + +BINARY_TOC = NO + +# The TOC_EXPAND flag can be set to YES to add extra items for group members +# to the contents of the HTML help documentation and to the tree view. + +TOC_EXPAND = NO + +# The DISABLE_INDEX tag can be used to turn on/off the condensed index at +# top of each HTML page. The value NO (the default) enables the index and +# the value YES disables it. + +DISABLE_INDEX = NO + +# This tag can be used to set the number of enum values (range [1..20]) +# that doxygen will group on one line in the generated HTML documentation. + +ENUM_VALUES_PER_LINE = 4 + +# If the GENERATE_TREEVIEW tag is set to YES, a side panel will be +# generated containing a tree-like index structure (just like the one that +# is generated for HTML Help). For this to work a browser that supports +# JavaScript, DHTML, CSS and frames is required (for instance Mozilla 1.0+, +# Netscape 6.0+, Internet explorer 5.0+, or Konqueror). Windows users are +# probably better off using the HTML help feature. + +GENERATE_TREEVIEW = NO + +# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be +# used to set the initial width (in pixels) of the frame in which the tree +# is shown. + +TREEVIEW_WIDTH = 250 + +#--------------------------------------------------------------------------- +# configuration options related to the LaTeX output +#--------------------------------------------------------------------------- + +# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will +# generate Latex output. + +GENERATE_LATEX = NO + +# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `latex' will be used as the default path. + +LATEX_OUTPUT = latex + +# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be +# invoked. If left blank `latex' will be used as the default command name. + +LATEX_CMD_NAME = latex + +# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to +# generate index for LaTeX. If left blank `makeindex' will be used as the +# default command name. + +MAKEINDEX_CMD_NAME = makeindex + +# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact +# LaTeX documents. This may be useful for small projects and may help to +# save some trees in general. + +COMPACT_LATEX = NO + +# The PAPER_TYPE tag can be used to set the paper type that is used +# by the printer. Possible values are: a4, a4wide, letter, legal and +# executive. If left blank a4wide will be used. + +PAPER_TYPE = letter + +# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX +# packages that should be included in the LaTeX output. + +EXTRA_PACKAGES = + +# The LATEX_HEADER tag can be used to specify a personal LaTeX header for +# the generated latex document. The header should contain everything until +# the first chapter. If it is left blank doxygen will generate a +# standard header. Notice: only use this tag if you know what you are doing! + +LATEX_HEADER = + +# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated +# is prepared for conversion to pdf (using ps2pdf). The pdf file will +# contain links (just like the HTML output) instead of page references +# This makes the output suitable for online browsing using a pdf viewer. + +PDF_HYPERLINKS = YES + +# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of +# plain latex in the generated Makefile. Set this option to YES to get a +# higher quality PDF documentation. + +USE_PDFLATEX = NO + +# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode. +# command to the generated LaTeX files. This will instruct LaTeX to keep +# running if errors occur, instead of asking the user for help. +# This option is also used when generating formulas in HTML. + +LATEX_BATCHMODE = NO + +# If LATEX_HIDE_INDICES is set to YES then doxygen will not +# include the index chapters (such as File Index, Compound Index, etc.) +# in the output. + +LATEX_HIDE_INDICES = NO + +#--------------------------------------------------------------------------- +# configuration options related to the RTF output +#--------------------------------------------------------------------------- + +# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output +# The RTF output is optimized for Word 97 and may not look very pretty with +# other RTF readers or editors. + +GENERATE_RTF = NO + +# The RTF_OUTPUT tag is used to specify where the RTF docs will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `rtf' will be used as the default path. + +RTF_OUTPUT = rtf + +# If the COMPACT_RTF tag is set to YES Doxygen generates more compact +# RTF documents. This may be useful for small projects and may help to +# save some trees in general. + +COMPACT_RTF = NO + +# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated +# will contain hyperlink fields. The RTF file will +# contain links (just like the HTML output) instead of page references. +# This makes the output suitable for online browsing using WORD or other +# programs which support those fields. +# Note: wordpad (write) and others do not support links. + +RTF_HYPERLINKS = NO + +# Load stylesheet definitions from file. Syntax is similar to doxygen's +# config file, i.e. a series of assignments. You only have to provide +# replacements, missing definitions are set to their default value. + +RTF_STYLESHEET_FILE = + +# Set optional variables used in the generation of an rtf document. +# Syntax is similar to doxygen's config file. + +RTF_EXTENSIONS_FILE = + +#--------------------------------------------------------------------------- +# configuration options related to the man page output +#--------------------------------------------------------------------------- + +# If the GENERATE_MAN tag is set to YES (the default) Doxygen will +# generate man pages + +GENERATE_MAN = NO + +# The MAN_OUTPUT tag is used to specify where the man pages will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `man' will be used as the default path. + +MAN_OUTPUT = man + +# The MAN_EXTENSION tag determines the extension that is added to +# the generated man pages (default is the subroutine's section .3) + +MAN_EXTENSION = .3 + +# If the MAN_LINKS tag is set to YES and Doxygen generates man output, +# then it will generate one additional man file for each entity +# documented in the real man page(s). These additional files +# only source the real man page, but without them the man command +# would be unable to find the correct page. The default is NO. + +MAN_LINKS = NO + +#--------------------------------------------------------------------------- +# configuration options related to the XML output +#--------------------------------------------------------------------------- + +# If the GENERATE_XML tag is set to YES Doxygen will +# generate an XML file that captures the structure of +# the code including all documentation. + +GENERATE_XML = YES + +# The XML_OUTPUT tag is used to specify where the XML pages will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `xml' will be used as the default path. + +XML_OUTPUT = xml + +# The XML_SCHEMA tag can be used to specify an XML schema, +# which can be used by a validating XML parser to check the +# syntax of the XML files. + +XML_SCHEMA = + +# The XML_DTD tag can be used to specify an XML DTD, +# which can be used by a validating XML parser to check the +# syntax of the XML files. + +XML_DTD = + +# If the XML_PROGRAMLISTING tag is set to YES Doxygen will +# dump the program listings (including syntax highlighting +# and cross-referencing information) to the XML output. Note that +# enabling this will significantly increase the size of the XML output. + +XML_PROGRAMLISTING = YES + +#--------------------------------------------------------------------------- +# configuration options for the AutoGen Definitions output +#--------------------------------------------------------------------------- + +# If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will +# generate an AutoGen Definitions (see autogen.sf.net) file +# that captures the structure of the code including all +# documentation. Note that this feature is still experimental +# and incomplete at the moment. + +GENERATE_AUTOGEN_DEF = NO + +#--------------------------------------------------------------------------- +# configuration options related to the Perl module output +#--------------------------------------------------------------------------- + +# If the GENERATE_PERLMOD tag is set to YES Doxygen will +# generate a Perl module file that captures the structure of +# the code including all documentation. Note that this +# feature is still experimental and incomplete at the +# moment. + +GENERATE_PERLMOD = NO + +# If the PERLMOD_LATEX tag is set to YES Doxygen will generate +# the necessary Makefile rules, Perl scripts and LaTeX code to be able +# to generate PDF and DVI output from the Perl module output. + +PERLMOD_LATEX = NO + +# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be +# nicely formatted so it can be parsed by a human reader. This is useful +# if you want to understand what is going on. On the other hand, if this +# tag is set to NO the size of the Perl module output will be much smaller +# and Perl will parse it just the same. + +PERLMOD_PRETTY = YES + +# The names of the make variables in the generated doxyrules.make file +# are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX. +# This is useful so different doxyrules.make files included by the same +# Makefile don't overwrite each other's variables. + +PERLMOD_MAKEVAR_PREFIX = + +#--------------------------------------------------------------------------- +# Configuration options related to the preprocessor +#--------------------------------------------------------------------------- + +# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will +# evaluate all C-preprocessor directives found in the sources and include +# files. + +ENABLE_PREPROCESSING = YES + +# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro +# names in the source code. If set to NO (the default) only conditional +# compilation will be performed. Macro expansion can be done in a controlled +# way by setting EXPAND_ONLY_PREDEF to YES. + +MACRO_EXPANSION = NO + +# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES +# then the macro expansion is limited to the macros specified with the +# PREDEFINED and EXPAND_AS_PREDEFINED tags. + +EXPAND_ONLY_PREDEF = NO + +# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files +# in the INCLUDE_PATH (see below) will be search if a #include is found. + +SEARCH_INCLUDES = YES + +# The INCLUDE_PATH tag can be used to specify one or more directories that +# contain include files that are not input files but should be processed by +# the preprocessor. + +INCLUDE_PATH = + +# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard +# patterns (like *.h and *.hpp) to filter out the header-files in the +# directories. If left blank, the patterns specified with FILE_PATTERNS will +# be used. + +INCLUDE_FILE_PATTERNS = + +# The PREDEFINED tag can be used to specify one or more macro names that +# are defined before the preprocessor is started (similar to the -D option of +# gcc). The argument of the tag is a list of macros of the form: name +# or name=definition (no spaces). If the definition and the = are +# omitted =1 is assumed. + +PREDEFINED = + +# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then +# this tag can be used to specify a list of macro names that should be expanded. +# The macro definition that is found in the sources will be used. +# Use the PREDEFINED tag if you want to use a different macro definition. + +EXPAND_AS_DEFINED = + +# If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then +# doxygen's preprocessor will remove all function-like macros that are alone +# on a line, have an all uppercase name, and do not end with a semicolon. Such +# function macros are typically used for boiler-plate code, and will confuse the +# parser if not removed. + +SKIP_FUNCTION_MACROS = YES + +#--------------------------------------------------------------------------- +# Configuration::additions related to external references +#--------------------------------------------------------------------------- + +# The TAGFILES option can be used to specify one or more tagfiles. +# Optionally an initial location of the external documentation +# can be added for each tagfile. The format of a tag file without +# this location is as follows: +# TAGFILES = file1 file2 ... +# Adding location for the tag files is done as follows: +# TAGFILES = file1=loc1 "file2 = loc2" ... +# where "loc1" and "loc2" can be relative or absolute paths or +# URLs. If a location is present for each tag, the installdox tool +# does not have to be run to correct the links. +# Note that each tag file must have a unique name +# (where the name does NOT include the path) +# If a tag file is not located in the directory in which doxygen +# is run, you must also specify the path to the tagfile here. + +TAGFILES = + +# When a file name is specified after GENERATE_TAGFILE, doxygen will create +# a tag file that is based on the input files it reads. + +GENERATE_TAGFILE = + +# If the ALLEXTERNALS tag is set to YES all external classes will be listed +# in the class index. If set to NO only the inherited external classes +# will be listed. + +ALLEXTERNALS = NO + +# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed +# in the modules index. If set to NO, only the current project's groups will +# be listed. + +EXTERNAL_GROUPS = YES + +# The PERL_PATH should be the absolute path and name of the perl script +# interpreter (i.e. the result of `which perl'). + +PERL_PATH = /usr/bin/perl + +#--------------------------------------------------------------------------- +# Configuration options related to the dot tool +#--------------------------------------------------------------------------- + +# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will +# generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base or +# super classes. Setting the tag to NO turns the diagrams off. Note that this +# option is superseded by the HAVE_DOT option below. This is only a fallback. It is +# recommended to install and use dot, since it yields more powerful graphs. + +CLASS_DIAGRAMS = YES + +# If set to YES, the inheritance and collaboration graphs will hide +# inheritance and usage relations if the target is undocumented +# or is not a class. + +HIDE_UNDOC_RELATIONS = YES + +# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is +# available from the path. This tool is part of Graphviz, a graph visualization +# toolkit from AT&T and Lucent Bell Labs. The other options in this section +# have no effect if this option is set to NO (the default) + +HAVE_DOT = @HAVE_DOT@ + +# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen +# will generate a graph for each documented class showing the direct and +# indirect inheritance relations. Setting this tag to YES will force the +# the CLASS_DIAGRAMS tag to NO. + +CLASS_GRAPH = YES + +# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen +# will generate a graph for each documented class showing the direct and +# indirect implementation dependencies (inheritance, containment, and +# class references variables) of the class with other documented classes. + +COLLABORATION_GRAPH = YES + +# If the UML_LOOK tag is set to YES doxygen will generate inheritance and +# collaboration diagrams in a style similar to the OMG's Unified Modeling +# Language. + +UML_LOOK = NO + +# If set to YES, the inheritance and collaboration graphs will show the +# relations between templates and their instances. + +TEMPLATE_RELATIONS = NO + +# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT +# tags are set to YES then doxygen will generate a graph for each documented +# file showing the direct and indirect include dependencies of the file with +# other documented files. + +INCLUDE_GRAPH = YES + +# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and +# HAVE_DOT tags are set to YES then doxygen will generate a graph for each +# documented header file showing the documented files that directly or +# indirectly include this file. + +INCLUDED_BY_GRAPH = YES + +# If the CALL_GRAPH and HAVE_DOT tags are set to YES then doxygen will +# generate a call dependency graph for every global function or class method. +# Note that enabling this option will significantly increase the time of a run. +# So in most cases it will be better to enable call graphs for selected +# functions only using the \callgraph command. + +CALL_GRAPH = NO + +# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen +# will graphical hierarchy of all classes instead of a textual one. + +GRAPHICAL_HIERARCHY = YES + +# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images +# generated by dot. Possible values are png, jpg, or gif +# If left blank png will be used. + +DOT_IMAGE_FORMAT = png + +# The tag DOT_PATH can be used to specify the path where the dot tool can be +# found. If left blank, it is assumed the dot tool can be found on the path. + +DOT_PATH = + +# The DOTFILE_DIRS tag can be used to specify one or more directories that +# contain dot files that are included in the documentation (see the +# \dotfile command). + +DOTFILE_DIRS = + +# The MAX_DOT_GRAPH_WIDTH tag can be used to set the maximum allowed width +# (in pixels) of the graphs generated by dot. If a graph becomes larger than +# this value, doxygen will try to truncate the graph, so that it fits within +# the specified constraint. Beware that most browsers cannot cope with very +# large images. + +MAX_DOT_GRAPH_WIDTH = 1024 + +# The MAX_DOT_GRAPH_HEIGHT tag can be used to set the maximum allows height +# (in pixels) of the graphs generated by dot. If a graph becomes larger than +# this value, doxygen will try to truncate the graph, so that it fits within +# the specified constraint. Beware that most browsers cannot cope with very +# large images. + +MAX_DOT_GRAPH_HEIGHT = 1024 + +# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the +# graphs generated by dot. A depth value of 3 means that only nodes reachable +# from the root by following a path via at most 3 edges will be shown. Nodes that +# lay further from the root node will be omitted. Note that setting this option to +# 1 or 2 may greatly reduce the computation time needed for large code bases. Also +# note that a graph may be further truncated if the graph's image dimensions are +# not sufficient to fit the graph (see MAX_DOT_GRAPH_WIDTH and MAX_DOT_GRAPH_HEIGHT). +# If 0 is used for the depth value (the default), the graph is not depth-constrained. + +MAX_DOT_GRAPH_DEPTH = 0 + +# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will +# generate a legend page explaining the meaning of the various boxes and +# arrows in the dot generated graphs. + +GENERATE_LEGEND = YES + +# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will +# remove the intermediate dot files that are used to generate +# the various graphs. + +DOT_CLEANUP = YES + +#--------------------------------------------------------------------------- +# Configuration::additions related to the search engine +#--------------------------------------------------------------------------- + +# The SEARCHENGINE tag specifies whether or not a search engine should be +# used. If set to NO the values of all tags below this one will be ignored. + +SEARCHENGINE = NO diff --git a/doc/Makefile.am b/doc/Makefile.am new file mode 100644 index 0000000..563fa92 --- /dev/null +++ b/doc/Makefile.am @@ -0,0 +1,79 @@ +# +# Copyright 2001,2005 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +include $(top_srcdir)/Makefile.common + + +SUBDIRS = other + +man3dir = $(mandir)/man3 +docdir = $(prefix)/share/doc/@PACKAGE@-@VERSION@ + +EXTRA_DIST = \ + Doxyfile.in \ + ddc.eps \ + ddc.png \ + usrp-block-diagram.eps \ + usrp-block-diagram.png \ + usrp.jpg \ + usrp_guide.xml + +if HAS_XMLTO +DOCBOOK_HTML_FILES=usrp_guide.html +all-local: dox docbook-html +else +DOCBOOK_HTML_FILES= +all-local: dox +endif + +dox: html/index.html +html/index.html: + mkdir -p html + @DOXYGEN@ + +docbook-html: usrp_guide.html + +usrp_guide.html: usrp_guide.xml + xmlto html-nochunks $< + +install-data-local: + $(mkinstalldirs) $(DESTDIR)$(docdir) + @for i in $(top_srcdir)/usrp/README $(top_srcdir)/usrp/ChangeLog; do \ + echo "$(INSTALL_DATA) $$i $(DESTDIR)$(docdir)"; \ + $(INSTALL_DATA) $$i $(DESTDIR)$(docdir); \ + done + + mkdir -p $(DESTDIR)$(docdir)/html + @for i in $(DOCBOOK_HTML_FILES); do \ + echo "$(INSTALL_DATA) $$i $(DESTDIR)$(docdir)/html"; \ + $(INSTALL_DATA) $$i $(DESTDIR)$(docdir)/html; \ + done + cp -r html $(DESTDIR)$(docdir) + +uninstall-local: + @for i in README ChangeLog; do \ + echo "$(RM) $(DESTDIR)$(docdir)/$$i;"; \ + $(RM) $(DESTDIR)$(docdir)/$$i; \ + done + $(RM) -fr $(DESTDIR)$(docdir)/html + +clean-local: + $(RM) -fr latex html man xml $(DOCBOOK_HTML_FILES) diff --git a/doc/ddc.eps b/doc/ddc.eps new file mode 100644 index 0000000..8931a16 --- /dev/null +++ b/doc/ddc.eps @@ -0,0 +1,3105 @@ +%!PS-Adobe-3.0 EPSF-3.0 +%%BoundingBox: 0 0 755 575 +%%Pages: 0 +%%Creator: Sun Microsystems, Inc. +%%Title: none +%%CreationDate: none +%%LanguageLevel: 2 +%%EndComments +%%BeginPreview: 760 575 1 1725 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000010008000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000300FE001800C100000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000701CF001800C300000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000F03830018000300000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000003F03000018000300000000000 +%00000000000000001F800000000000031800000000000000000000000000780000000000000000 +%000000000000000000000000000000000000000000F00019C03000000000000000000000000000 +%0000000007303000019E0CFC0000000000 +%00000000000000007FE00000000000031800000000000000C00000000000F80000000000000000 +%000000000000000000000000000000000000000001E00019C03000000000000000000000000000 +%000000000030638001FF0C7C0000000000 +%000000000000000060700000000000030000000000000000C00000000000C00000000000000000 +%000000000000000000000000000000000000000003000019E03000000000000000000000000000 +%0000000000307FE001C38C300000000000 +%0000000000000000E0380000000000030000000000000000C00000000000C00000000000000000 +%000000000000000000000000000000000000000003000031F03000000000000000000000000000 +%000000000030787001C18C300000000000 +%0000000000000000E0000C04202002030842002100110181F01000000001F02000000000000000 +%000000000000000000000000000000000000000007C08031B03000000000000000000000000000 +%000000000030703001818C300000000000 +%0000000000000000E0007F86FDF87FC3187FC0FF803F8FF1F8FE001FFC03F9FC00000000000000 +%00000000000000000000000000000000000000000FE7F031B83000000000000000000000000000 +%0000000000307033F181CC300000000000 +%00000000000000007C00E3879FBC78C31879C1CF803F9C70E1C7001FFC00C38E00000000000000 +%0000000000000000000000000000000000000000030E38219C3000000000000000000000000000 +%0000000000307033F981CC300000000000 +%00000000000000003FC0C1C70E0C70631860E30780381838C38300000000C30600000000000000 +%0000000000000000000000000000000000000000030C18618C3000000000000000000000000000 +%00000000003070300181CC300000000000 +%000000000000000007E000C60E0C60631860630380380038C30180000000C30000000000000000 +%0000000000000000000000000000000000000000030C00618E3000000000000000000000000000 +%000000000030303001818C300000000000 +%000000000000000000F001C60E0C60731860670380380038C30380000000C3C000000000000000 +%0000000000000000000000000000000000000000030F804187300001B6DBFFFB6DB00000000000 +%000000000030303001C18C300000000000 +%000000000000000000383FC60E0C60331860670380380FF8C3FF801FFC00C1FC00000000000000 +%00000000000000000000000000000000000000000307F041833000000000000000000000000000 +%0000000000301C6001E30C300000000000 +%0000000000000001C018F8C60E0C60731860670380381E38C300001FFC00C03E00000000000000 +%00000000000000000000000000000000000000000300F8C183B000000000000000000000000000 +%0000000000300FC001FF0C3C0000000000 +%0000000000000001C019C0C60E0C60731860670380383838C30000000000C00700000000000000 +%000000000000000000000000000000000000000003001CC181F000000000000000000000000000 +%0000000000300780019C0C1C0000000000 +%0000000000000000E039C1C60E0C70631860630380383038C30180000000C30700000000000000 +%0000000000000000000000000000000000000000030C0C8180F000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000F071C1C60E0C70E31860638780383078E38380000000C30600000000000000 +%0000000000000000000000000000000000000000030C1D8180F000000000000000080000000000 +%0000000000000000000000000000000000 +%00000000000000007FE0E7C60E0C7FC3186061FF80381CF8F9FF00000000C3DE00000000000000 +%00000000000000000000000000000000000000000307F981807000000000000000040000000000 +%0000000000000000000000000000000000 +%00000000000000001FC07CC60E0C7F83186060FB80380F98787C00000000C0FC00000000000000 +%00000000000000000000000000000000000000000303F181803000000000000000020000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000060000000000300000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000060000000030300000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000060000000038700000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000006000000001FE00000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000060000000007800000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000008000000000 +%0008000000000000000018000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000004000000000 +%000C000180000060000018000000001000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000C000380000060000018000000003000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000004000000000 +%000C000380000060000018000000003000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000C000380000060000018000000003000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%03DC1F87E1F001F87E0019E01F00F87E00 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000001000000000 +%0FFC7FC7C7FC00F0FF001FF83FC3FC7C00 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%1C3C60C38E0C0061C3801C1870E30E3000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000001000000000 +%181C60E38C0C006181801C1CE063043000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000800000000 +%181C00E3800C006300C0181CC033803000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%381C0FE381FC006300C0181CC033F03000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000400000000 +%380C7FE387FC006300C0181CC030FC3000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%181C60E38E0C006300C0181CC0300E3000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%181CC0E38C0C006381C0181CC072063000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%1C1CC0E38C1C00618180181C6067063800 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0E3CE1E38E3C0071C380181C70E38E3800 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000100000000 +%07FC7F61E7EC0078FF00181C3FC1FC1E00 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000100000000 +%01881C60E3C600383C0018080F00F00E00 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000080000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000080000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000040000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000040000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000020000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000020000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000003000000C01803C03FC00000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000003000000C0180FF03FF00000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000003000000C0181E7C38F80000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000C018301C301C0000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000008000000 +%000000000000000C018300C301C0000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000004000000 +%00000603307E000C0183000301C0000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000070330FF800C0183C0030180000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000002000000 +%0000030631C1800C0181FC030380000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000002000000 +%000003063181800C01807F03FF00000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000001863001800C018007C3FF80000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000001000000 +%0000018C303F800C018001C301C0000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000018C30FD800C018000E300C0000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000800000 +%000000DC31C1800C018600E300E0000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000800000 +%000000D83181800E038700E300E0000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000F83183800E038380C300C0000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000400000 +%0000007031C78007FF03FF83FFC0000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000007030FD8003FE00FF03FF80000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000203070800070003C03FC00000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000200000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000100000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000040000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000020000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000010000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000010000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000004000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000004000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000002600 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000003E00 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000000000000000000000003FE00 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000003FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF0000001FE00 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%00000000000000000000020000000000000000000000000000000000000000000010000000FE00 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000007E00 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000003E00 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000001E00 +%0000000000000000000000000000000000 +%000007000000000004003C00000000000000000000000000000000000F00000000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000001E00 +%0000000000000000000000000000000000 +%00000700000000000C007C00000000000000000000000000000000007FE0000000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000E00 +%0000000000000000000000000000000000 +%00000700000000000C00600000000000000000000000000000000007FFFE000000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000600 +%0000000000000000000000000000000000 +%00000700000000000C0060000000000000000000000000000000001F801F800000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000200 +%0000000000000000000000000000000000 +%00000719E06F03033F01FCDC1E06787800000000000000000000007C0003E00000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%0000071FF87FC3031F01F8FC7F87FDFC0000000000000000000000F80001F00000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%0000071E1870E3030C0060E0E1C78F0C0000000000000000000001C00000380000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%0000071C1C6063030C0060C0C0E7060E00000000000000000000038000001C0000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%0000071C0C6063030C0060C18067060E00000000000000000000078000000E0000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000007180C6063030C0060C18067060E000000000000000000000CC000001B0000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000007180C6063030C0060C18067060E0000000000000000000018600000318000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000007180C6063030C0060C18067060E0000000000000000000018300000618000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000007180C6063070C0060C1C067060E0000000000000000000030180000C0C000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000001800000000000000000 +%000007180C60E3070C0060C0C0C7060E00000000000000000000300C000180C000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000001800000000000000000 +%000007180C71C38F0C0060C0E1C7060E0000000000000000000060060003006000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000001800000000000000000 +%000007180C7F81FB0F0060C07F87060E0000000000000000000040030006002000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000001800000000000000000 +%000006180C6700F3070060C01E07060600000000000000000000C001800C003000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000001800000000000000000 +%0000000000600000000000000000000000000000000000000000C000C01C003000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000001800000000000000000 +%0000000000600000000000000000000000000000000000000001C0006038003800000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000001800000000000000000 +%0000000000600000000000000000000000000000000000000601C0003070003800000000000000 +%000000000000000000700200000000000000000000000000000000000000000000100000000000 +%0000000060000001800000000000000000 +%00000000006000000000000000000000000000000000000007E1800018E0001800000000000000 +%0000000000000000007F0200000000000000000000000000000000000000000000100000000000 +%000000007E000001800000000000000000 +%00000000000000000000000000000000000000000000000007FD80000DC0001800000000000000 +%0000000000000000007FC200000000000000000000000000000000000000000000100000000000 +%000000007FC00001800000000000000000 +%00000000000000000000000000000000000000000000000007FF80000780001800000000000000 +%0000000000000000007FFA00000003FF0000000060000000000300000000000000100000000000 +%000000007FF00001800000000000000000 +%0000000000000000000000000000000000000000000000000FFF80000700001C00000000000000 +%0000000000000000007FFA00000003FF800000006000000000C300000000000000100000000000 +%00000000FFF00001800000000000000000 +%00000000000000000000000000000000000000000000000007FD80000780001800000000000000 +%0000000000000000007FC20000000301C00000000000000000C000000000000000100000000000 +%000000007FC00001800000000000000000 +%00000000000000000000000000000000000000000000000007F180000DC0001800000000000000 +%0000000000000000007F020000000300E00000000000000000C000000000000000100000000000 +%000000007E000001800000000000000000 +%00000000000001007F0000200000000000000000000000000601800018E0001800000000000000 +%00000000000000000070020000000300601800404210100301E200400420000000100000000000 +%0000000060000001800000000000000000 +%00000000000003807FF003FC0000000000000000000000000001C0003070003800000000000000 +%00000000000000000000020000000300707F03F8637EFC1FE3F31BF03F60000000100000000000 +%0000000000000001800000000000000000 +%00000000000007807FF807FF0000000000000000000000000001C0006038003800000000000000 +%0000000000000000000002000000030030E7871C63CFDE1CF0C31F3879E0000000100000000000 +%0000000000000001800000000000000000 +%00000000000006C0601C0E070000000000000000000000000000C000C018003000000000000000 +%000000000000000000000200000003003181860C6387063030C31C1C60E0000000100000000000 +%0000000000000000000000000000000000 +%00000000000006C0600C1C038000000000000000000000000000C001800C003000000000000000 +%000000000000000000000200000003003181CC006307060030C31C1CE060000000100000000000 +%0000000000000000000000000000000000 +%0000000000000C60600E18018000000000000000000000000000C0030006003000000000000000 +%000000000000000000000200000003003381CC006303060070C3181CC060000000100000000000 +%0000000000000000000000000000000000 +%0000000000000C6060063800000000000000000000000000000040060003002000000000000000 +%0000000000000000000002000000030033FFCC006303060FF0C3181CC060000000100000000000 +%0000000000000000000000000000000000 +%0000000000001C70600638000000000000000000000000000000600C0001806000000000000000 +%0000000000000000000002000000030073800C006303063E30C3181CC060000000100000000000 +%0000000000000000000000000000000000 +%000000000000183060063800000000000000000000000000000020180000C04000000000000000 +%0000000000000000000002000000030063800C006303063030C3181CC060000000100000000000 +%0000000000000000000000000000000000 +%00000000000018306006380000000000000000000000000000003070000060C000000000000000 +%00000000000000000000020000000300E1818E0E6303063030C3181C60E0000000100000000000 +%0000000000000000000000000000000000 +%000000000000383860063800000000000000000000000000000038E0000031C000000000000000 +%00000000000000000000020000000301C1C1860C6303063070C3181C60E0000000100000000000 +%0000000000000000000000000000000000 +%0000000000003FF86006180000000000000000000000000000001CC000001B8000000000000000 +%000000000000000000000200000003FFC0FF87BC63030639F0F3181C3FE0000000100000000000 +%0000000000000000000000000000000000 +%000000000000301C600E180180000000000000000000000000000F8000000F0000000000000000 +%000000000000000000000200000003FF007E01F06303061FB873181C1F60000000100000000000 +%0000000000000000000000000000000000 +%000000000000600C600C1C038000000000000000000000000000070000000E0000000000000000 +%000000000000000000000200000000000000000000000000000000000060000000100000000000 +%0000000000000000000000000000000000 +%000000000000600C601C0E038000000000000000000000000000038000001C0000000000000000 +%000000000000000000000200000000000000000000000000000000004060000000100000000000 +%0000000000000000000000000000000000 +%000000000000E00E6078078F000000000000000000000000000001E00000780000000000000000 +%0000000000000000000002000000000000000000000000000000000061C0000000100000000000 +%0000000000000000000000000000000000 +%000000000000C0067FF003FE000000000000000000000000000000F80001F00000000000000000 +%000000000000000000000200000000000000000000000000000000003F80000000100000000000 +%0000000000000000000000000000000000 +%000000000000C0067FC000F00000000000000000000000000000003E0007C00000000000000000 +%000000000000000000000200000000000000000000000000000000000F00000000100000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000007F07E000000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000003FFFC000000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000007FE0000000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000600000000000000000000 +%00000000000000000000020000000000C000000000007FE0000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000600000000000000000000 +%00000000000000000000020000000000C000000000007FF8000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000600000000000000000000 +%00000000000000000000020000000000C00000000000701C000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000F00000000000000000000 +%00000000000000000000020000000000C00000000000701C000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000F00000000000000000000 +%00000000000000000000020000000000C000E040C080700C0700E00C0000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000F00000000000000000000 +%00000000000000000000020000000000C003F860C180700C3FC3F83F8000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000001F00000000000000000000 +%00000000000000000000020000000000C0071C61E180700C71E31C738000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000001F80000000000000000000 +%00000000000000000000020000000000C00E0E61E180701C60660C61C000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000003F80000000000000000000 +%00000000000000000000020000000000C00C0631E3007FF8006700600000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000003FC0000000000000000000 +%00000000000000000000020000000000C00C0731B3007FF000E3C0780000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%00000000000000000000020000000000C00C0733330070003FE1F83F8000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%00000000000000000000020000000000C00C071B360070007C607C07C000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%00000000000000000000020000000000C00C061B3600700060600E01C000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%00000000000000000000020000000000C00C061E1E007000E0E606C0C000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%00000000000000000000020000000000C00E0E1E1E007000E0E70E60C000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%00000000000000000000020000000000FFC7FC0E1C00700077E3FC7F8000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%00000000000000000000020000000000FFC1F00E1C0070003E61F83F0000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000003 +%C00000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000007000000000000003C0000000000000000000000000000000000040000000000000000001F +%FC0000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%00000700000000000C007C000000000000000000000000000000000004000000000000000001FC +%7FC000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%00000700000000000C0060000000000000000000000000000000000004000000000000000007E0 +%07E000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%00000700000000000C006000000000000000000000000000000000000400000000000000001F00 +%00F80000000000000000020000000000000000FFE3180000000000000000000000100000000000 +%0000000000000000000000000000000000 +%00000718E04703021F01F89C1E0238700000000000000000000000000400000000000000007800 +%001C0000000000000000020000000000000000FFE3186000000000000000000000100000000000 +%0000000000000000000000000000000000 +%0000071BF07F83033F01FCFC7F87FCFC000000000000000000000000040000000000000000E000 +%000E0000000000000000020000000000000000C000186000000000000000000000100000000000 +%0000000000000000000000000000000000 +%0000071F3879C3030C0060FCF1C7CF9C000000000000000000000000040000000000000000E000 +%00070000000000000000020000000000000000C000186000000000000000000000100000000000 +%0000000000000000000000000000000000 +%0000071C1C70E3030C0060C0C0C7070E000000000000000000000000040000000000000001E000 +%00038000000000000000020000000000000000C00318F81C046000000000000000100000000000 +%0000000000000000000000000000000000 +%0000071C0C6063030C0060C1C067060E0000000000000000000000000400000000000000033000 +%0007C000000000000000020000000000000000C00318FC7F07F000000000000000100000000000 +%0000000000000000000000000000000000 +%000007180C6063030C0060C18067060E0000000000000000000000000400000000000000061800 +%000CE000000000000000020000000000000000C0031870E387E000000000000000100000000000 +%0000000000000000000000000000000000 +%000007180C6063030C0060C18067060E0000000000000000000000000400000000000000061C00 +%00187000000000000000020000000000000000FFC3186181870000000000000000100000000000 +%0000000000000000000000000000000000 +%000007180C6063030C0060C18067060E0000000000000000000000000400000000000000040E00 +%00307000000000000000020000000000000000FFC3186180C60000000000000000100000000000 +%0000000000000007C00000000000000000 +%000007180C6063030C0060C18067060E00000000000000000000000004000000000000000C0700 +%00603800000000000000020000000000000000C0031861FFC60000000000000000100000000000 +%000000000000001FF00000000000000000 +%000007180C6063070C0060C0C0E7060E0000000000000000000000000400000000000000180380 +%00C03800000000000000020000000000000000C0031861FFC60000000000000000100000000000 +%00000000000000383C0000000000000000 +%000007180C70C3070C0060C0E1C7060E00000000000000000000000004000000000000001801C0 +%01801800000000000000020000000000000000C003186180060000000000000000100000000000 +%00000000000000701C0000000000000000 +%000007180C7FC3FF0F0060C07F87060E00000000000000000000000004000000000000003000E0 +%03001C00000000000000020000000000000000C003186180060000000000000000100000000000 +%00000000000000E00E0000000000000000 +%000007180C6F00F3070060C03F07060E0000000000000000000000000400000000000000300060 +%06000C00000000000000020000000000000000C003186180C60000000000000000100000000000 +%00000000000000C0060000000000000000 +%000000000060000000000000000000000000000000000000000000000400000000000000300030 +%0C000C00000000000000020000000000000000C0031871C1860000000000000000100000000000 +%00000000000001C0070000000000000000 +%000000000060000000000000000000000000000000000000000000000400000000000C00300018 +%18000400000000000070020000000000000000C003187CFF860000000000000000100000000000 +%00000000600001C0070000000000000000 +%000000000060000000000000000000000000000000000000000000000400000000000FE060000E +%3000060000000000007F020000000000000000C003183C3E060000000000000000100000000000 +%000000007E0001C0070000000000000000 +%000000000060000000000000000000000000000000000000000000000400000000000FF8600006 +%6000060000000000007FC200000000000000000000000000000000000000000000100000000000 +%000000007FC001C0070000000000000000 +%000000000060000000000000000000000000000000000000000000000400000000000FFF600003 +%C000060000000000007FFA00000000000000000000000000000000000000000000100000000000 +%00000000FFF001C0070000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000FFE600001 +%C000060000000000007FFA00000000000000000000000000000000000000000000100000000000 +%00000000FFF000C0060000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000FF8600003 +%C000060000000000007FC200000000000000000000000000000000000000000000100000000000 +%000000007FC000C0060000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000FE0600006 +%6000060000000000007F0200000000000000000000000000000000000000000000100000000000 +%000000007E000060EC0000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000C0060000C +%380006000000000000700200000000000000000000000000000000000000000000100000000000 +%00000000600000707C0000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000700018 +%180006000000000000000200000000000000000000000000000000000000000000100000000000 +%000000000000003FFC0000000000000000 +%00000000000003807FE001FC000000000000000000000000000000000400000000000000300030 +%0C000C000000000000000200000000000000000000000000000000000000000000100000000000 +%000000000000000FEE0000000000000000 +%00000000000003807FF807FE000000000000000000000000000000000400000000000000300070 +%07000C000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000030000000000000000 +%00000000000006C0603C0E070000000000000000000000000000000004000000000000003000E0 +%03000C000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%00000000000006C0600C0C038000000000000000000000000000000004000000000000003001C0 +%01801C000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%0000000000000EE0600E1801800000000000000000000000000000000400000000000000180380 +%00E018000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%0000000000000C60600E1800000000000000000000000000000000000400000000000000180700 +%007038000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%0000000000000C60600638000000000000000000000000000000000004000000000000000C0E00 +%003838000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%0000000000001C70600638000000000000000000000000000000000004000000000000000C1C00 +%001C70000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000183060063800000000000000000000000000000000000400000000000000061800 +%000E70000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000183860063800000000000000000000000000000000000400000000000000033000 +%0007E0000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%0000000000003FF86006380000000000000000000000000000000000040000000000000001A000 +%000380000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%0000000000003FF8600E180180000000000000000000000000000000040000000000000000C000 +%000300000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000701C600E1C0180000000000000000000000000000000040000000000000000E000 +%000700000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000600C601C0C03800000000000000000000000000000000400000000000000007C00 +%003E00000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000E00E603C0F07000000000000000000000000000000000400000000000000003E00 +%00FC00000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000E00E7FF807FE000000000000000000000000000000000400000000000000000F80 +%01F000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000C0067FE001F80000000000000000000000000000000004000000000000000003FC +%3F8000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000000000000000004000000000000000000FF +%FF0000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000000040000000000000000001F +%F80000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000001 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000200000000000000000000000000000000000000000000100000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000003 +%0000000000000000000003FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE00000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000003 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000007 +%00000000000000000000000000000000000000000000C000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000007 +%80000000000000000000000000000000000000000000C000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000000040000000000000000000F +%80000000000000000000000000000000000000000001E000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000000040000000000000000000F +%80000000000000000000000000000000000000000001E000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000000040000000000000000000F +%C0000000000000000000000000000000000000000001E000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000000040000000000000000000F +%C0000000000000000000000000000000000000000003F000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000000040000000000000000000F +%C0000000000000000000000000000000000000000003F000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000000040000000000000000001F +%C0000000000000000000000000000000000000000003F000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%00000000000000000000000000000000000000000003F000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%00000000000000000000000000000000000000000007F800000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%00000000000000000000000000000000000000000000C000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000C00000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000C00000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000800000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000000007E0C6FC00400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000E70C7FE00400000000000000000000 +%0007807807C0000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000C38C70600400000000000000000000 +%001FC1FE0FE0000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000C00C60600400000000000000000000 +%003863871870000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000F00C60600400000000000000000000 +%003033039830000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000000007E0C60600400000000000000000000 +%007007019800000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000000001F8C60600400000000000000000000 +%006007019F80000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000038C60600400000000000000000000 +%0060060187E0000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000818C60600400000000000000000000 +%0060070180F0000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000C18C60600400000000000000000000 +%007037018038000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000E38C60600400000000000000000000 +%003033039838000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000000007F0C60600400000000000000000000 +%003863871830000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%001FE1FE0FF0000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%0007807C07C0000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000400000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF +%FFFFFFFFFFFFFFFFC0000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000800000000000000000001803003E000F800000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000800000000000000000001C0300FF803FE00000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000800000000000000000001E0303C1C070780000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000800000000000000000001E030300C0E0380000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000800000000000000000001F030700E1C01C0000 +%00000000000000004000000000000001FF00000000006000018006086000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000800000000000000000001B83060001800C0000 +%00000000000000004000000000000001FFC0000000006000018006186000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000008000000000000000000019C30E0003800E0000 +%0000000000000000400000000000000180C0000000006000000006186000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000008000000000000000000019C30E0003800E0000 +%0000000000000000400000000000000180E0000000006000000006186000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000008000000000000000000018E30C0003800E0000 +%0000000000000000400000000000000180603C08E00E66060D80C67E6700000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000008000000000000000000018630E0003800E0000 +%000000000000000040000000000000018060FF1FF83FE30E0D83F67E6FC0000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000008000000000000000000018330E0003800E0000 +%0000000000000000400000000000000180C1C71F3871E30E0D871E1878E0000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000183B060061800C0000 +%00000000000000004000000000000001FF83831C1C60E30F198E0E187060000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000181B060061800C0000 +%00000000000000004000000000000001FF80031C0CE0630B198C0E186060000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000181F0700E0C01C0000 +%0000000000000000400000000000000181E0071C0CE0619B198C06186060000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000180F0381C0E0380000 +%000000000000000040000000000000018060FF1C0CC0619B318C06186060000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000180701FF807FF00000 +%000000000000000040000000000000018071E31C0CC06199B18C06186060000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000180700FF001FC00000 +%000000000000000040000000000000018073831C0CE060F1B18C06186060000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000018073031C0C6060F1E18E0E186060000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%0000000000000000400000000000000180E3071C0C70E0F0E1861E186060000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%00000000000000004000000000000001FFC1FF9C0C3FE070E187FE1E6060000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%00000000000000004000000000000001FF80F99C0C0F6060E181E60E6060000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000003E0300000000006000FC00000003 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000008000000000FF830000000000C003FF00000003 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000008000000001C1C00000000000C0070780000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000800000000380E00000000000C00E0180000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000800000000380400000000000800C01C0000000 +%000000000000000040000000000000000C000000180000000010C0000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000800000000380031BF81F8001801C0001FC1FC3 +%1BF03F800000000040000000000000000C000000180000000030C0000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000008000000001F0031F3839C001801800039E38E3 +%1F3879C00000000040000000000000000C00000000000000003000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000008000000000FE031C1C60600100180007073063 +%1C1860E00000000040000000000000000C00000000000000003000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000001FC31C0C60700300180006033003 +%1C1CC060000000004000000000000001CC07001C18CF0E01F07CC07819E0000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000800000000003C31C0CE070030018000E033C03 +%181CE060000000004000000000000007EC1FC07F18FFBF83FC7CC0FE1BF0000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000800000000000E31C0CFFF0030018000E031FC3 +%181CFFE000000000400000000000000E3C38E0E398F1F3861C30C1C71E38000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000800000000300631C0CE00006001C00CE0303E3 +%181CC00000000000400000000000000C1C6070C198E0C18E0C30C3839C18000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000800000000300631C0CE00006000C01CE030073 +%181CC0000000000040000000000000180C60318018E0C1800C30C3019818000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000800000000380631C0C606006000E0186073073 +%181CE0600000000040000000000000180C7FF18018C0C1803C30C301981C000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000008000000003C0C31C0C70600400070387063073 +%181C70E00000000040000000000000180C7FF18018C0C183FC30C701981C000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000008000000001FFC31C0C3DE00C0003FF03DE3DE3 +%181C3BC00000000040000000000000180C60018018C0C1878C30C701981C000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000007F031C0C1F800C0001FC01F80FC3 +%181C1F800000000040000000000000180C60018098C0C18C0C30C301981C000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%0000000000000000400000000000000C1C7031C1D8C0C18C0C30C301981C000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%0000000000000000400000000000000E1C7060C198C0C18C1C30C383981C000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%00000000000000004000000000000007FC3FE07F18C0C187FE3EC1FF181C000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%00000000000000004000000000000003CC0F803E18C0C183E61EC07C181C000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000008000000000000007E000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000800000000000001FF800000000000000006000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000381C00000000000000006000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000700E00000000000000006000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000008000000000000060060300860030110180F818 +%088000000000000040000000000000001E00000010000000000000380700000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000E0001FC0DF81FC3F8FF0F8FE +%0FE000000000000040000000000000003E000000300000000000003C0700000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000C0003CE0F9C38E3F9C7061C7 +%0FC0000000000000400000000000000030000000300000000000003C0700000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000C0003030E0C3073818386383 +%8E00000000000000400000000000000030000000300000000000003E0700000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000C0FE6030C0E6033800386301 +%8C000000000000004000000000000000FE1F00F07E1F037007FF00360700000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000C0FF7030C0E7033800386301 +%CC000000000000004000000000000000FE7FC1FC7C3F83F007FF00330700000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000C0077FF0C0E7FF380FF86301 +%CC0000000000000040000000000000003061C38E3071C3D0000000338700000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000E0076000C0E600381E386301 +%CC00000000000000400000000000000030E0C70630C0E38000000031C700000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000E0076000C0E6003838386301 +%CC0000000000000040000000000000003000C60030C0630000000030C700000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000008000000000000070077030C0E7033830386301 +%8C0000000000000040000000000000003007C60030C0630000000030E700000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000381E3870C0E3073830786383 +%8C000000000000004000000000000000303FC60031C0730007FF00307700000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000800000000000001FFC1FE0C0E3FE381CF879FF +%0C0000000000000040000000000000003070C60030C0630007FF00303700000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000008000000000000007F00FC0C0E0FC380F983C7C +%0C00000000000000400000000000000030C0C60230C06300000000303F00000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%0000000000000000400000000000000030C0C60630C06300000000301F00000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%0000000000000000400000000000000030E1C30E38E0E300000000300F00000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%00000000000000004000000000000000307FE3FC3E7FC300000000300F00000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%00000000000000004000000000000000303C60F01E1F0300000000300700000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000080000000000000000000000000000000000000 +%000000000000000040000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF +%FFFFFFFFFFFFFFFFC0000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000018000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000018000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000000000000000003C000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000000000000000003C000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000000000000000003C000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000000000000000007C000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000000000000000007C000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000000000000000000000000000FE000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000000000000000000000000000FE000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000000000000000000000000000FF000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000000000000000000000000000FF000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000010000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000001F800000000000000000F000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000007FE00000000C00000001F000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000E0F00000000C000000018000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000001C0300000000C000000018000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000180380000000E000000038000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000380003F837E3F0FC0FC07F7F1FC07EC606 +%0FE0DF81FC60700000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000003800073C3CF0C1CE0FC0187F3CE0E7C606 +%1C70FBC38E70600000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000030000C0C3870C3030E0018703071C1C606 +%3830E0C30630600000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000030000C0E3030C3038C001870603181C606 +%3018C0C60030E00000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000030001C0E3030C7038C001870703181C606 +%3038C0C60038C00000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000030001FFE3030C7FF8C0018707FF180C606 +%3FF8C0C60018C00000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000038019C003030C7000C001870600180C606 +%3000C0C60019800000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000018019C003030C7000C001870600181C606 +%3000C0C6000D800000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000001C030C0C3030C3030C001870703181C606 +%3018C0C6060D000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000E070E0C3030C3830C0018703871C3C70E +%3838C0C3060F000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000007FE07BC3030F1EF0C0018703FE0F7C3FE +%1EF0C0C3DE07000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000003F803F0303070FC0C0018700FC07DC1F6 +%07E0C0C0F806000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000000000000000000000001C000 +%000000000006000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000000000000000000000001C000 +%000000000006000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000000000000000000000001C000 +%00000000001C000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000000000000000000000001C000 +%000000000038000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000008000 +%000000000030000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000001E000187C00000000000003C0 +%0060F8000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000003E00011FF000C0000000007C0 +%0063FC000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000300003183001C000000000E00 +%00670E000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000300003303801C000000380C00 +%004606000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000FC1802301803E030000381F03 +%00C607000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000FC7F06001803F1FC000381F9F +%C0C006000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000000000000070E706003801C38E000380C18 +%E08006000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000000000000031C386007001C707003FF8C30 +%60800E000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000000000000031C00C00E001C603003FF8C38 +%01801C000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000000000000030F00C01C001C603800380C1E +%018038000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000FE307E0C038001C603800380C0F +%C10070000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000FE300F88070001C603800380C03 +%E300E0000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000003003980E0001C603800380C00 +%7303C0000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000003181981C0001C703000380C30 +%330300000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000000000000031C190380001C307000000C38 +%760600000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%0000000000000000000000000000000000000000000000000000030FF103FF800F3FE000000C1F +%E60FFE000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%00000000000000000000000000000000000000000000000000000307E303FF800F0FC000000C0F +%C60FFF000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%%EndPreview +%%BeginProlog +%%BeginResource: SDRes +/b4_inc_state save def +/dict_count countdictstack def +/op_count count 1 sub def +userdict begin +0 setgray 0 setlinecap 1 setlinewidth 0 setlinejoin 10 setmiterlimit[] 0 setdash newpath +/languagelevel where {pop languagelevel 1 ne {false setstrokeadjust false setoverprint} if} if +/bdef {bind def} bind def +/c {setgray} bdef +/l {neg lineto} bdef +/rl {neg rlineto} bdef +/lc {setlinecap} bdef +/lj {setlinejoin} bdef +/lw {setlinewidth} bdef +/ml {setmiterlimit} bdef +/ld {setdash} bdef +/m {neg moveto} bdef +/ct {6 2 roll neg 6 2 roll neg 6 2 roll neg curveto} bdef +/r {rotate} bdef +/t {neg translate} bdef +/s {scale} bdef +/sw {show} bdef +/gs {gsave} bdef +/gr {grestore} bdef +/f {findfont dup length dict begin +{1 index /FID ne {def} {pop pop} ifelse} forall /Encoding ISOLatin1Encoding def +currentdict end /NFont exch definefont pop /NFont findfont} bdef +/p {closepath} bdef +/sf {scalefont setfont} bdef +/ef {eofill}bdef +/pc {closepath stroke}bdef +/ps {stroke}bdef +/pum {matrix currentmatrix}bdef +/pom {setmatrix}bdef +/bs {/aString exch def /nXOfs exch def /nWidth exch def currentpoint nXOfs 0 rmoveto pum nWidth aString stringwidth pop div 1 scale aString show pom moveto} bdef +%%EndResource +%%EndProlog +%%BeginSetup +%%EndSetup +%%Page: 1 1 +%%BeginPageSetup +%%EndPageSetup +pum +0.02834 0.02833 s +0 -20290 t +/tm matrix currentmatrix def +gs +tm setmatrix +-635 -635 t +1 1 s +635 635 m 27274 635 l 27274 20924 l 635 20924 l 635 635 l eoclip newpath +0 lw 1 lj 0.000 c 17781 10461 m 14606 10461 l 14606 6016 l 20956 6016 l +20956 10461 l 17781 10461 l pc +gs +pum +15663 7567 t +65 0 m 65 -606 l 274 -606 l 321 -606 357 -603 382 -597 ct 416 -589 446 -575 471 -554 ct +503 -527 526 -492 542 -450 ct 558 -408 566 -360 566 -306 ct 566 -260 561 -219 550 -184 ct +539 -148 525 -119 509 -95 ct 492 -72 473 -54 453 -40 ct 433 -27 409 -17 381 -10 ct +353 -3 320 0 284 0 ct p +145 -71 m 275 -71 l 315 -71 346 -75 369 -82 ct 391 -90 409 -100 423 -114 ct +442 -133 457 -158 467 -190 ct 478 -222 483 -261 483 -307 ct 483 -371 473 -419 452 -453 ct +431 -487 406 -510 376 -522 ct 355 -530 320 -534 272 -534 ct 145 -534 l p ef +965 -141 m 1042 -131 l 1030 -86 1007 -52 975 -27 ct 942 -2 900 9 849 9 ct +785 9 734 -9 696 -49 ct 658 -88 640 -144 640 -215 ct 640 -289 659 -347 697 -387 ct +735 -428 784 -449 845 -449 ct 903 -449 951 -429 989 -389 ct 1026 -349 1044 -292 1044 -220 ct +1044 -216 1044 -209 1044 -200 ct 716 -200 l 719 -152 733 -115 757 -89 ct 782 -64 813 -51 849 -51 ct +877 -51 900 -58 919 -72 ct 938 -87 l 954 -110 l p +721 -261 m 966 -261 l 963 -298 953 -326 938 -344 ct 914 -373 883 -387 845 -387 ct +811 -387 783 -376 759 -353 ct 736 -330 l 723 -300 l p ef +1427 -160 m 1500 -151 l 1492 -100 1472 -61 1439 -32 ct 1406 -4 1365 9 1317 9 ct +1257 9 1209 -9 1172 -49 ct 1136 -88 1118 -144 1118 -217 ct 1118 -265 1125 -306 1141 -342 ct +1157 -378 1181 -404 1213 -422 ct 1245 -440 1280 -449 1318 -449 ct 1365 -449 1404 -437 1435 -412 ct +1465 -388 1485 -354 1493 -310 ct 1421 -299 l 1414 -328 1402 -350 1384 -365 ct +1367 -380 1345 -387 1321 -387 ct 1283 -387 1253 -374 1229 -347 ct 1206 -320 1194 -278 1194 -220 ct +1194 -161 1205 -118 1228 -91 ct 1251 -64 1280 -51 1317 -51 ct 1346 -51 1370 -60 1390 -78 ct +1409 -96 l 1422 -123 l p ef +1564 -520 m 1564 -606 l 1638 -606 l 1638 -520 l p +1564 0 m 1564 -439 l 1638 -439 l 1638 0 l p ef +1748 0 m 1748 -439 l 1815 -439 l 1815 -377 l 1829 -399 1847 -416 1870 -429 ct +1893 -442 1919 -449 1948 -449 ct 1981 -449 2007 -442 2028 -428 ct 2049 -415 2064 -396 2072 -372 ct +2107 -423 2152 -449 2208 -449 ct 2251 -449 2285 -437 2308 -412 ct 2332 -388 2343 -351 2343 -301 ct +2343 0 l 2269 0 l 2269 -276 l 2269 -306 2267 -327 2262 -340 ct 2257 -354 2249 -364 2236 -372 ct +2223 -380 2208 -384 2191 -384 ct 2160 -384 2135 -374 2114 -353 ct 2094 -333 2084 -300 2084 -255 ct +2084 0 l 2009 0 l 2009 -285 l 2009 -318 2003 -343 1991 -359 ct 1979 -376 1959 -384 1932 -384 ct +1911 -384 1891 -379 1873 -368 ct 1856 -357 1843 -340 1835 -319 ct 1827 -298 1823 -267 1823 -227 ct +1823 0 l p ef +2750 -54 m 2722 -30 2696 -14 2670 -4 ct 2645 5 2617 9 2588 9 ct 2540 9 2503 -1 2477 -25 ct +2451 -49 2438 -79 2438 -115 ct 2438 -137 2443 -156 2453 -174 ct 2463 -192 2475 -206 2491 -217 ct +2507 -228 2525 -236 2545 -241 ct 2559 -245 2581 -249 2611 -253 ct 2671 -260 2715 -268 2744 -278 ct +2744 -288 2744 -295 2744 -298 ct 2744 -328 2737 -349 2723 -362 ct 2704 -379 2676 -387 2638 -387 ct +2603 -387 2577 -381 2561 -369 ct 2544 -356 2532 -335 2524 -303 ct 2451 -313 l +2458 -345 2468 -370 2484 -389 ct 2499 -408 2521 -423 2549 -433 ct 2578 -443 2611 -449 2649 -449 ct +2687 -449 2717 -444 2740 -435 ct 2764 -427 2781 -415 2792 -402 ct 2803 -389 2811 -372 2815 -351 ct +2818 -339 2819 -316 2819 -283 ct 2819 -184 l 2819 -114 2821 -71 2824 -52 ct +2827 -34 2833 -16 2843 0 ct 2765 0 l 2757 -15 l 2752 -33 l p +2744 -220 m 2717 -209 2676 -200 2622 -192 ct 2592 -187 2570 -182 2557 -177 ct +2545 -171 2535 -163 2528 -153 ct 2521 -142 2518 -130 2518 -117 ct 2518 -98 2525 -81 2540 -68 ct +2555 -55 2577 -48 2606 -48 ct 2635 -48 2660 -54 2683 -67 ct 2705 -79 2721 -96 2732 -118 ct +2740 -135 2744 -160 2744 -193 ct p ef +3076 -66 m 3087 0 l 3066 3 3047 5 3030 5 ct 3003 5 2982 1 2968 -7 ct 2953 -15 2942 -26 2936 -40 ct +2930 -54 2927 -83 2927 -128 ct 2927 -381 l 2872 -381 l 2872 -439 l 2927 -439 l +2927 -547 l 3001 -592 l 3001 -439 l 3076 -439 l 3076 -381 l 3001 -381 l +3001 -124 l 3001 -103 3002 -89 3005 -83 ct 3008 -77 3012 -72 3018 -69 ct 3024 -65 3032 -63 3043 -63 ct +3051 -63 l 3062 -64 l p ef +3152 -520 m 3152 -606 l 3226 -606 l 3226 -520 l p +3152 0 m 3152 -439 l 3226 -439 l 3226 0 l p ef +3336 0 m 3336 -439 l 3403 -439 l 3403 -376 l 3436 -425 3482 -449 3543 -449 ct +3570 -449 3594 -444 3616 -434 ct 3638 -425 3655 -412 3666 -397 ct 3677 -382 3685 -363 3689 -342 ct +3692 -328 3693 -304 3693 -270 ct 3693 0 l 3619 0 l 3619 -267 l 3619 -297 3616 -320 3610 -335 ct +3604 -350 3594 -362 3579 -371 ct 3565 -380 3547 -384 3527 -384 ct 3496 -384 3468 -374 3445 -354 ct +3422 -334 3411 -296 3411 -239 ct 3411 0 l p ef +3799 36 m 3871 47 l 3874 69 3883 85 3896 95 ct 3915 109 3940 116 3972 116 ct +4006 116 4033 109 4052 95 ct 4071 82 4083 62 4090 38 ct 4094 22 4095 -8 4095 -57 ct +4063 -19 4022 0 3974 0 ct 3913 0 3867 -21 3833 -65 ct 3800 -108 3784 -161 3784 -222 ct +3784 -264 3791 -302 3807 -338 ct 3822 -373 3844 -400 3873 -420 ct 3901 -439 3935 -449 3974 -449 ct +4026 -449 4069 -428 4102 -386 ct 4102 -439 l 4171 -439 l 4171 -59 l 4171 8 4164 57 4150 85 ct +4136 114 4114 136 4084 153 ct 4054 169 4017 178 3972 178 ct 3920 178 3878 166 3845 142 ct +3813 119 l 3798 83 l p +3860 -227 m 3860 -169 3872 -127 3895 -101 ct 3918 -74 3946 -61 3981 -61 ct +4015 -61 4044 -74 4067 -101 ct 4090 -127 4101 -168 4101 -224 ct 4101 -278 4090 -319 4066 -346 ct +4042 -373 4013 -387 3979 -387 ct 3946 -387 3918 -374 3895 -347 ct 3872 -320 l +3860 -280 l p ef +pom +pum +16007 8520 t +62 0 m 62 -606 l 142 -606 l 142 -71 l 440 -71 l 440 0 l p ef +478 -219 m 478 -300 500 -361 545 -400 ct 583 -432 629 -449 684 -449 ct 744 -449 793 -429 832 -389 ct +870 -350 889 -295 889 -225 ct 889 -169 881 -124 864 -92 ct 847 -60 822 -34 790 -16 ct +757 0 722 9 684 9 ct 622 9 572 -9 534 -49 ct 497 -88 l 478 -145 l p +554 -219 m 554 -163 566 -121 591 -93 ct 615 -65 646 -51 684 -51 ct 721 -51 751 -65 776 -93 ct +800 -121 813 -164 813 -222 ct 813 -276 800 -317 776 -345 ct 751 -373 720 -387 684 -387 ct +646 -387 615 -373 591 -345 ct 566 -317 l 554 -275 l p ef +1062 0 m 928 -439 l 1005 -439 l 1075 -185 l 1101 -91 l 1102 -96 1110 -126 1124 -181 ct +1194 -439 l 1270 -439 l 1336 -184 l 1358 -100 l 1383 -185 l 1458 -439 l +1531 -439 l 1393 0 l 1316 0 l 1246 -263 l 1229 -337 l 1140 0 l p ef +1811 0 m 1811 -606 l 2040 -606 l 2080 -606 2111 -604 2132 -600 ct 2162 -595 2187 -586 2207 -572 ct +2227 -558 2243 -538 2255 -513 ct 2268 -488 2274 -461 2274 -430 ct 2274 -379 2257 -335 2224 -300 ct +2192 -264 2132 -246 2047 -246 ct 1891 -246 l 1891 0 l p +1891 -318 m 2048 -318 l 2100 -318 2136 -327 2158 -346 ct 2180 -366 2191 -393 2191 -428 ct +2191 -453 2185 -475 2172 -493 ct 2159 -511 2142 -523 2121 -529 ct 2108 -532 2083 -534 2046 -534 ct +1891 -534 l p ef +2644 -54 m 2616 -30 2590 -14 2564 -4 ct 2539 5 2511 9 2482 9 ct 2434 9 2397 -1 2371 -25 ct +2345 -49 2332 -79 2332 -115 ct 2332 -137 2337 -156 2347 -174 ct 2357 -192 2369 -206 2385 -217 ct +2401 -228 2419 -236 2439 -241 ct 2453 -245 2475 -249 2505 -253 ct 2565 -260 2609 -268 2638 -278 ct +2638 -288 2638 -295 2638 -298 ct 2638 -328 2631 -349 2617 -362 ct 2598 -379 2570 -387 2532 -387 ct +2497 -387 2471 -381 2455 -369 ct 2438 -356 2426 -335 2418 -303 ct 2345 -313 l +2352 -345 2362 -370 2378 -389 ct 2393 -408 2415 -423 2443 -433 ct 2472 -443 2505 -449 2543 -449 ct +2581 -449 2611 -444 2634 -435 ct 2658 -427 2675 -415 2686 -402 ct 2697 -389 2705 -372 2709 -351 ct +2712 -339 2713 -316 2713 -283 ct 2713 -184 l 2713 -114 2715 -71 2718 -52 ct +2721 -34 2727 -16 2737 0 ct 2659 0 l 2651 -15 l 2646 -33 l p +2638 -220 m 2611 -209 2570 -200 2516 -192 ct 2486 -187 2464 -182 2451 -177 ct +2439 -171 2429 -163 2422 -153 ct 2415 -142 2412 -130 2412 -117 ct 2412 -98 2419 -81 2434 -68 ct +2449 -55 2471 -48 2500 -48 ct 2529 -48 2554 -54 2577 -67 ct 2599 -79 2615 -96 2626 -118 ct +2634 -135 2638 -160 2638 -193 ct p ef +2778 -131 m 2851 -142 l 2855 -113 2867 -90 2886 -74 ct 2905 -59 2931 -51 2965 -51 ct +2999 -51 3024 -58 3041 -72 ct 3058 -86 3066 -102 3066 -121 ct 3066 -138 3059 -151 3044 -160 ct +3034 -167 3008 -175 2968 -186 ct 2913 -199 2875 -211 2854 -221 ct 2833 -231 2817 -245 2806 -263 ct +2795 -281 2790 -301 2790 -322 ct 2790 -342 2794 -360 2803 -376 ct 2812 -393 2825 -407 2840 -418 ct +2852 -427 2867 -434 2887 -440 ct 2907 -446 2929 -449 2952 -449 ct 2986 -449 3016 -444 3042 -434 ct +3069 -424 3088 -410 3100 -393 ct 3113 -376 3121 -354 3126 -325 ct 3053 -315 l +3050 -338 3040 -356 3024 -368 ct 3008 -381 2986 -387 2957 -387 ct 2923 -387 2898 -382 2884 -370 ct +2869 -359 2862 -346 2862 -331 ct 2862 -321 2865 -312 2871 -305 ct 2877 -297 2887 -290 2900 -285 ct +2907 -282 2929 -276 2965 -266 ct 3018 -252 3055 -240 3076 -231 ct 3096 -222 3113 -209 3125 -192 ct +3136 -175 3142 -154 3142 -129 ct 3142 -104 3135 -80 3121 -58 ct 3106 -37 3085 -20 3058 -8 ct +3031 3 3000 9 2965 9 ct 2908 9 2865 -1 2835 -25 ct 2805 -49 l 2786 -84 l p ef +3175 -131 m 3248 -142 l 3252 -113 3264 -90 3283 -74 ct 3302 -59 3328 -51 3362 -51 ct +3396 -51 3421 -58 3438 -72 ct 3455 -86 3463 -102 3463 -121 ct 3463 -138 3456 -151 3441 -160 ct +3431 -167 3405 -175 3365 -186 ct 3310 -199 3272 -211 3251 -221 ct 3230 -231 3214 -245 3203 -263 ct +3192 -281 3187 -301 3187 -322 ct 3187 -342 3191 -360 3200 -376 ct 3209 -393 3222 -407 3237 -418 ct +3249 -427 3264 -434 3284 -440 ct 3304 -446 3326 -449 3349 -449 ct 3383 -449 3413 -444 3439 -434 ct +3466 -424 3485 -410 3497 -393 ct 3510 -376 3518 -354 3523 -325 ct 3450 -315 l +3447 -338 3437 -356 3421 -368 ct 3405 -381 3383 -387 3354 -387 ct 3320 -387 3295 -382 3281 -370 ct +3266 -359 3259 -346 3259 -331 ct 3259 -321 3262 -312 3268 -305 ct 3274 -297 3284 -290 3297 -285 ct +3304 -282 3326 -276 3362 -266 ct 3415 -252 3452 -240 3473 -231 ct 3493 -222 3510 -209 3522 -192 ct +3533 -175 3539 -154 3539 -129 ct 3539 -104 3532 -80 3518 -58 ct 3503 -37 3482 -20 3455 -8 ct +3428 3 3397 9 3362 9 ct 3305 9 3262 -1 3232 -25 ct 3202 -49 l 3183 -84 l p ef +pom +pum +16827 9473 t +69 0 m 69 -606 l 478 -606 l 478 -534 l 149 -534 l 149 -346 l 434 -346 l +434 -275 l 149 -275 l 149 0 l p ef +585 -520 m 585 -606 l 659 -606 l 659 -520 l p +585 0 m 585 -439 l 659 -439 l 659 0 l p ef +768 0 m 768 -606 l 842 -606 l 842 0 l p ef +1118 -66 m 1129 0 l 1108 3 1089 5 1072 5 ct 1045 5 1024 1 1010 -7 ct 995 -15 984 -26 978 -40 ct +972 -54 969 -83 969 -128 ct 969 -381 l 914 -381 l 914 -439 l 969 -439 l +969 -547 l 1043 -592 l 1043 -439 l 1118 -439 l 1118 -381 l 1043 -381 l +1043 -124 l 1043 -103 1044 -89 1047 -83 ct 1050 -77 1054 -72 1060 -69 ct 1066 -65 1074 -63 1085 -63 ct +1093 -63 l 1104 -64 l p ef +1494 -141 m 1571 -131 l 1559 -86 1536 -52 1504 -27 ct 1471 -2 1429 9 1378 9 ct +1314 9 1263 -9 1225 -49 ct 1187 -88 1169 -144 1169 -215 ct 1169 -289 1188 -347 1226 -387 ct +1264 -428 1313 -449 1374 -449 ct 1432 -449 1480 -429 1518 -389 ct 1555 -349 1573 -292 1573 -220 ct +1573 -216 1573 -209 1573 -200 ct 1245 -200 l 1248 -152 1262 -115 1286 -89 ct +1311 -64 1342 -51 1378 -51 ct 1406 -51 1429 -58 1448 -72 ct 1467 -87 l 1483 -110 l +p +1250 -261 m 1495 -261 l 1492 -298 1482 -326 1467 -344 ct 1443 -373 1412 -387 1374 -387 ct +1340 -387 1312 -376 1288 -353 ct 1265 -330 l 1252 -300 l p ef +1669 0 m 1669 -439 l 1736 -439 l 1736 -372 l 1753 -403 1768 -424 1783 -434 ct +1797 -444 1813 -449 1831 -449 ct 1856 -449 1881 -441 1907 -425 ct 1882 -356 l +1863 -366 1845 -372 1827 -372 ct 1811 -372 1796 -367 1783 -357 ct 1770 -347 1761 -334 1755 -316 ct +1747 -290 1743 -261 1743 -229 ct 1743 0 l p ef +pom +gr +11317 10321 m 11312 10318 l 11099 10206 l 11093 10203 l 10924 10032 l +10921 10026 l 10811 9811 l 10808 9805 l 10769 9556 l 10769 9549 l +10808 9299 l 10811 9293 l 10921 9078 l 10924 9072 l 11093 8901 l 11099 8898 l +11312 8786 l 11317 8784 l 11564 8744 l 11571 8744 l 11817 8784 l 11823 8786 l +12036 8898 l 12041 8901 l 12210 9072 l 12213 9078 l 12324 9293 l 12326 9299 l +12366 9549 l 12366 9556 l 12326 9805 l 12324 9811 l 12213 10026 l +12210 10032 l 12041 10203 l 12036 10206 l 11823 10318 l 11817 10321 l +11571 10361 l 11564 10361 l 11317 10321 l p +11567 10319 m 11806 10279 l 12013 10171 l 12178 10004 l 12285 9794 l +12324 9552 l 12285 9310 l 12178 9100 l 12013 8933 l 11806 8825 l 11567 8786 l +11328 8825 l 11121 8933 l 10956 9100 l 10849 9310 l 10811 9552 l 10849 9794 l +10956 10004 l 11121 10171 l 11328 10279 l 11567 10319 l p +11049 9029 m 11079 8998 l 11286 9208 l 11493 9417 l 11700 9627 l 11907 9837 l +12115 10048 l 12085 10078 l 11877 9868 l 11670 9658 l 11463 9448 l +11255 9238 l 11049 9029 l p +11079 10078 m 11049 10049 l 11255 9838 l 11463 9628 l 11670 9418 l +11878 9208 l 12086 8998 l 12115 9029 l 11907 9239 l 11700 9449 l 11493 9659 l +11286 9869 l 11079 10078 l p ef +1 lw 0 lj 11317 10321 m 11312 10318 l 11099 10206 l 11093 10203 l 10924 10032 l +10921 10026 l 10811 9811 l 10808 9805 l 10769 9556 l 10769 9549 l +10808 9299 l 10811 9293 l 10921 9078 l 10924 9072 l 11093 8901 l 11099 8898 l +11312 8786 l 11317 8784 l 11564 8744 l 11571 8744 l 11817 8784 l 11823 8786 l +12036 8898 l 12041 8901 l 12210 9072 l 12213 9078 l 12324 9293 l 12326 9299 l +12366 9549 l 12366 9556 l 12326 9805 l 12324 9811 l 12213 10026 l +12210 10032 l 12041 10203 l 12036 10206 l 11823 10318 l 11817 10321 l +11571 10361 l 11564 10361 l 11317 10321 l pc +11567 10319 m 11806 10279 l 12013 10171 l 12178 10004 l 12285 9794 l +12324 9552 l 12285 9310 l 12178 9100 l 12013 8933 l 11806 8825 l 11567 8786 l +11328 8825 l 11121 8933 l 10956 9100 l 10849 9310 l 10811 9552 l 10849 9794 l +10956 10004 l 11121 10171 l 11328 10279 l 11567 10319 l pc +11049 9029 m 11079 8998 l 11286 9208 l 11493 9417 l 11700 9627 l 11907 9837 l +12115 10048 l 12085 10078 l 11877 9868 l 11670 9658 l 11463 9448 l +11255 9238 l 11049 9029 l pc +11079 10078 m 11049 10049 l 11255 9838 l 11463 9628 l 11670 9418 l +11878 9208 l 12086 8998 l 12115 9029 l 11907 9239 l 11700 9449 l 11493 9659 l +11286 9869 l 11079 10078 l pc +7989 6986 m 7538 6836 l 7539 7136 l 7989 6986 l p ef +5716 6986 m 7629 6986 l ps +14606 6986 m 14155 6836 l 14156 7136 l 14606 6986 l p ef +9526 6986 m 14246 6986 l ps +10769 9526 m 10318 9376 l 10319 9676 l 10769 9526 l p ef +5716 9526 m 10409 9526 l ps +14606 9526 m 14155 9376 l 14156 9676 l 14606 9526 l p ef +12426 9526 m 14246 9526 l ps +0 lw 1 lj 10061 16546 m 6251 16546 l 6251 12736 l 13871 12736 l 13871 16546 l +10061 16546 l pc +gs +pum +9102 13970 t +64 0 m 64 -606 l 146 -606 l 465 -130 l 465 -606 l 542 -606 l 542 0 l +459 0 l 141 -476 l 141 0 l p ef +1106 -212 m 1187 -192 l 1170 -126 1140 -76 1096 -41 ct 1052 -6 999 10 936 10 ct +870 10 817 -2 776 -29 ct 735 -56 704 -94 683 -145 ct 661 -195 651 -249 651 -307 ct +651 -370 663 -425 687 -472 ct 711 -519 745 -555 790 -580 ct 834 -604 883 -616 937 -616 ct +998 -616 1049 -601 1090 -570 ct 1131 -539 1160 -496 1176 -440 ct 1097 -421 l +1083 -465 1063 -497 1036 -517 ct 1009 -537 976 -547 935 -547 ct 889 -547 850 -536 818 -514 ct +787 -492 765 -462 752 -424 ct 740 -386 733 -348 733 -308 ct 733 -256 741 -211 756 -173 ct +771 -134 794 -105 826 -86 ct 858 -67 892 -58 929 -58 ct 974 -58 1012 -71 1043 -97 ct +1074 -123 l 1095 -161 l p ef +1284 -295 m 1284 -395 1311 -474 1366 -531 ct 1420 -588 1489 -617 1575 -617 ct +1631 -617 1681 -603 1726 -576 ct 1771 -550 1805 -512 1829 -465 ct 1852 -417 1864 -362 1864 -302 ct +1864 -240 1852 -185 1827 -137 ct 1802 -88 1767 -52 1722 -27 ct 1676 -2 1627 10 1574 10 ct +1517 10 1466 -3 1421 -31 ct 1376 -58 1342 -96 1319 -143 ct 1296 -191 l 1284 -242 l +p +1367 -294 m 1367 -220 1387 -163 1426 -121 ct 1465 -79 1515 -58 1574 -58 ct +1634 -58 1684 -79 1723 -122 ct 1762 -164 1782 -224 1782 -302 ct 1782 -352 1773 -395 1757 -431 ct +1740 -468 1715 -497 1683 -517 ct 1651 -537 1615 -547 1575 -547 ct 1518 -547 1470 -528 1429 -489 ct +1388 -450 l 1367 -385 l p ef +pom +pum +7514 14923 t +38 -194 m 113 -201 l 117 -171 125 -146 138 -126 ct 151 -107 172 -91 199 -79 ct +227 -67 258 -61 292 -61 ct 323 -61 350 -66 373 -75 ct 397 -84 414 -96 426 -112 ct +437 -128 443 -145 443 -164 ct 443 -183 437 -200 426 -214 ct 415 -228 397 -240 372 -250 ct +355 -256 319 -266 264 -279 ct 208 -293 169 -305 147 -317 ct 118 -332 96 -351 82 -374 ct +68 -396 61 -421 61 -449 ct 61 -480 69 -508 87 -535 ct 104 -561 130 -582 163 -595 ct +196 -609 233 -616 274 -616 ct 319 -616 359 -609 393 -594 ct 427 -580 454 -559 472 -531 ct +491 -502 501 -471 502 -435 ct 425 -429 l 421 -468 407 -496 383 -516 ct 359 -536 324 -545 277 -545 ct +229 -545 194 -537 171 -519 ct 149 -501 138 -480 138 -454 ct 138 -433 146 -415 162 -401 ct +177 -387 217 -372 283 -357 ct 348 -343 393 -330 417 -319 ct 452 -303 478 -282 495 -257 ct +512 -232 520 -203 520 -171 ct 520 -138 511 -108 492 -80 ct 474 -51 447 -29 413 -13 ct +378 2 339 10 296 10 ct 241 10 195 2 158 -13 ct 121 -29 92 -53 71 -85 ct 50 -117 l +39 -154 l p ef +638 -520 m 638 -606 l 712 -606 l 712 -520 l p +638 0 m 638 -439 l 712 -439 l 712 0 l p ef +822 0 m 822 -439 l 889 -439 l 889 -376 l 922 -425 968 -449 1029 -449 ct +1056 -449 1080 -444 1102 -434 ct 1124 -425 1141 -412 1152 -397 ct 1163 -382 1171 -363 1175 -342 ct +1178 -328 1179 -304 1179 -270 ct 1179 0 l 1105 0 l 1105 -267 l 1105 -297 1102 -320 1096 -335 ct +1090 -350 1080 -362 1065 -371 ct 1051 -380 1033 -384 1013 -384 ct 982 -384 954 -374 931 -354 ct +908 -334 897 -296 897 -239 ct 897 0 l p ef +1600 -141 m 1677 -131 l 1665 -86 1642 -52 1610 -27 ct 1577 -2 1535 9 1484 9 ct +1420 9 1369 -9 1331 -49 ct 1293 -88 1275 -144 1275 -215 ct 1275 -289 1294 -347 1332 -387 ct +1370 -428 1419 -449 1480 -449 ct 1538 -449 1586 -429 1624 -389 ct 1661 -349 1679 -292 1679 -220 ct +1679 -216 1679 -209 1679 -200 ct 1351 -200 l 1354 -152 1368 -115 1392 -89 ct +1417 -64 1448 -51 1484 -51 ct 1512 -51 1535 -58 1554 -72 ct 1573 -87 l 1589 -110 l +p +1356 -261 m 1601 -261 l 1598 -298 1588 -326 1573 -344 ct 1549 -373 1518 -387 1480 -387 ct +1446 -387 1418 -376 1394 -353 ct 1371 -330 l 1358 -300 l p ef +1958 10 m 2133 -616 l 2193 -616 l 2017 10 l p ef +2931 -212 m 3012 -192 l 2995 -126 2965 -76 2921 -41 ct 2877 -6 2824 10 2761 10 ct +2695 10 2642 -2 2601 -29 ct 2560 -56 2529 -94 2508 -145 ct 2486 -195 2476 -249 2476 -307 ct +2476 -370 2488 -425 2512 -472 ct 2536 -519 2570 -555 2615 -580 ct 2659 -604 2708 -616 2762 -616 ct +2823 -616 2874 -601 2915 -570 ct 2956 -539 2985 -496 3001 -440 ct 2922 -421 l +2908 -465 2888 -497 2861 -517 ct 2834 -537 2801 -547 2760 -547 ct 2714 -547 2675 -536 2643 -514 ct +2612 -492 2590 -462 2577 -424 ct 2565 -386 2558 -348 2558 -308 ct 2558 -256 2566 -211 2581 -173 ct +2596 -134 2619 -105 2651 -86 ct 2683 -67 2717 -58 2754 -58 ct 2799 -58 2837 -71 2868 -97 ct +2899 -123 l 2920 -161 l p ef +3097 -219 m 3097 -300 3119 -361 3164 -400 ct 3202 -432 3248 -449 3303 -449 ct +3363 -449 3412 -429 3451 -389 ct 3489 -350 3508 -295 3508 -225 ct 3508 -169 3500 -124 3483 -92 ct +3466 -60 3441 -34 3409 -16 ct 3376 0 3341 9 3303 9 ct 3241 9 3191 -9 3153 -49 ct +3116 -88 l 3097 -145 l p +3173 -219 m 3173 -163 3185 -121 3210 -93 ct 3234 -65 3265 -51 3303 -51 ct 3340 -51 3370 -65 3395 -93 ct +3419 -121 3432 -164 3432 -222 ct 3432 -276 3419 -317 3395 -345 ct 3370 -373 3339 -387 3303 -387 ct +3265 -387 3234 -373 3210 -345 ct 3185 -317 l 3173 -275 l p ef +3571 -131 m 3644 -142 l 3648 -113 3660 -90 3679 -74 ct 3698 -59 3724 -51 3758 -51 ct +3792 -51 3817 -58 3834 -72 ct 3851 -86 3859 -102 3859 -121 ct 3859 -138 3852 -151 3837 -160 ct +3827 -167 3801 -175 3761 -186 ct 3706 -199 3668 -211 3647 -221 ct 3626 -231 3610 -245 3599 -263 ct +3588 -281 3583 -301 3583 -322 ct 3583 -342 3587 -360 3596 -376 ct 3605 -393 3618 -407 3633 -418 ct +3645 -427 3660 -434 3680 -440 ct 3700 -446 3722 -449 3745 -449 ct 3779 -449 3809 -444 3835 -434 ct +3862 -424 3881 -410 3893 -393 ct 3906 -376 3914 -354 3919 -325 ct 3846 -315 l +3843 -338 3833 -356 3817 -368 ct 3801 -381 3779 -387 3750 -387 ct 3716 -387 3691 -382 3677 -370 ct +3662 -359 3655 -346 3655 -331 ct 3655 -321 3658 -312 3664 -305 ct 3670 -297 3680 -290 3693 -285 ct +3700 -282 3722 -276 3758 -266 ct 3811 -252 3848 -240 3869 -231 ct 3889 -222 3906 -209 3918 -192 ct +3929 -175 3935 -154 3935 -129 ct 3935 -104 3928 -80 3914 -58 ct 3899 -37 3878 -20 3851 -8 ct +3824 3 3793 9 3758 9 ct 3701 9 3658 -1 3628 -25 ct 3598 -49 l 3579 -84 l p ef +3998 -520 m 3998 -606 l 4072 -606 l 4072 -520 l p +3998 0 m 3998 -439 l 4072 -439 l 4072 0 l p ef +4183 0 m 4183 -439 l 4250 -439 l 4250 -376 l 4283 -425 4329 -449 4390 -449 ct +4417 -449 4441 -444 4463 -434 ct 4485 -425 4502 -412 4513 -397 ct 4524 -382 4532 -363 4536 -342 ct +4539 -328 4540 -304 4540 -270 ct 4540 0 l 4466 0 l 4466 -267 l 4466 -297 4463 -320 4457 -335 ct +4451 -350 4441 -362 4426 -371 ct 4412 -380 4394 -384 4374 -384 ct 4343 -384 4315 -374 4292 -354 ct +4269 -334 4258 -296 4258 -239 ct 4258 0 l p ef +4960 -141 m 5037 -131 l 5025 -86 5002 -52 4970 -27 ct 4937 -2 4895 9 4844 9 ct +4780 9 4729 -9 4691 -49 ct 4653 -88 4635 -144 4635 -215 ct 4635 -289 4654 -347 4692 -387 ct +4730 -428 4779 -449 4840 -449 ct 4898 -449 4946 -429 4984 -389 ct 5021 -349 5039 -292 5039 -220 ct +5039 -216 5039 -209 5039 -200 ct 4711 -200 l 4714 -152 4728 -115 4752 -89 ct +4777 -64 4808 -51 4844 -51 ct 4872 -51 4895 -58 4914 -72 ct 4933 -87 l 4949 -110 l +p +4716 -261 m 4961 -261 l 4958 -298 4948 -326 4933 -344 ct 4909 -373 4878 -387 4840 -387 ct +4806 -387 4778 -376 4754 -353 ct 4731 -330 l 4718 -300 l p ef +pom +pum +8136 15876 t +349 -237 m 349 -308 l 605 -309 l 605 -84 l 566 -52 525 -29 483 -13 ct +441 2 398 10 354 10 ct 295 10 241 -2 192 -27 ct 143 -53 107 -90 82 -138 ct 57 -186 45 -240 45 -300 ct +45 -359 57 -414 82 -465 ct 106 -516 142 -554 188 -579 ct 234 -604 288 -616 348 -616 ct +392 -616 432 -609 467 -595 ct 502 -581 530 -561 550 -535 ct 571 -510 586 -477 596 -436 ct +524 -416 l 515 -447 504 -472 490 -489 ct 476 -507 457 -521 432 -532 ct 407 -542 379 -547 349 -547 ct +312 -547 280 -542 253 -531 ct 227 -520 205 -505 189 -487 ct 172 -468 160 -449 150 -427 ct +135 -389 127 -349 127 -305 ct 127 -251 137 -205 155 -169 ct 174 -133 201 -106 236 -88 ct +272 -70 310 -62 350 -62 ct 385 -62 418 -68 452 -82 ct 485 -95 510 -109 527 -124 ct +527 -237 l p ef +1017 -141 m 1094 -131 l 1082 -86 1059 -52 1027 -27 ct 994 -2 952 9 901 9 ct +837 9 786 -9 748 -49 ct 710 -88 692 -144 692 -215 ct 692 -289 711 -347 749 -387 ct +787 -428 836 -449 897 -449 ct 955 -449 1003 -429 1041 -389 ct 1078 -349 1096 -292 1096 -220 ct +1096 -216 1096 -209 1096 -200 ct 768 -200 l 771 -152 785 -115 809 -89 ct 834 -64 865 -51 901 -51 ct +929 -51 952 -58 971 -72 ct 990 -87 l 1006 -110 l p +773 -261 m 1018 -261 l 1015 -298 1005 -326 990 -344 ct 966 -373 935 -387 897 -387 ct +863 -387 835 -376 811 -353 ct 788 -330 l 775 -300 l p ef +1193 0 m 1193 -439 l 1260 -439 l 1260 -376 l 1293 -425 1339 -449 1400 -449 ct +1427 -449 1451 -444 1473 -434 ct 1495 -425 1512 -412 1523 -397 ct 1534 -382 1542 -363 1546 -342 ct +1549 -328 1550 -304 1550 -270 ct 1550 0 l 1476 0 l 1476 -267 l 1476 -297 1473 -320 1467 -335 ct +1461 -350 1451 -362 1436 -371 ct 1422 -380 1404 -384 1384 -384 ct 1353 -384 1325 -374 1302 -354 ct +1279 -334 1268 -296 1268 -239 ct 1268 0 l p ef +1970 -141 m 2047 -131 l 2035 -86 2012 -52 1980 -27 ct 1947 -2 1905 9 1854 9 ct +1790 9 1739 -9 1701 -49 ct 1663 -88 1645 -144 1645 -215 ct 1645 -289 1664 -347 1702 -387 ct +1740 -428 1789 -449 1850 -449 ct 1908 -449 1956 -429 1994 -389 ct 2031 -349 2049 -292 2049 -220 ct +2049 -216 2049 -209 2049 -200 ct 1721 -200 l 1724 -152 1738 -115 1762 -89 ct +1787 -64 1818 -51 1854 -51 ct 1882 -51 1905 -58 1924 -72 ct 1943 -87 l 1959 -110 l +p +1726 -261 m 1971 -261 l 1968 -298 1958 -326 1943 -344 ct 1919 -373 1888 -387 1850 -387 ct +1816 -387 1788 -376 1764 -353 ct 1741 -330 l 1728 -300 l p ef +2145 0 m 2145 -439 l 2212 -439 l 2212 -372 l 2229 -403 2244 -424 2259 -434 ct +2273 -444 2289 -449 2307 -449 ct 2332 -449 2357 -441 2383 -425 ct 2358 -356 l +2339 -366 2321 -372 2303 -372 ct 2287 -372 2272 -367 2259 -357 ct 2246 -347 2237 -334 2231 -316 ct +2223 -290 2219 -261 2219 -229 ct 2219 0 l p ef +2723 -54 m 2695 -30 2669 -14 2643 -4 ct 2618 5 2590 9 2561 9 ct 2513 9 2476 -1 2450 -25 ct +2424 -49 2411 -79 2411 -115 ct 2411 -137 2416 -156 2426 -174 ct 2436 -192 2448 -206 2464 -217 ct +2480 -228 2498 -236 2518 -241 ct 2532 -245 2554 -249 2584 -253 ct 2644 -260 2688 -268 2717 -278 ct +2717 -288 2717 -295 2717 -298 ct 2717 -328 2710 -349 2696 -362 ct 2677 -379 2649 -387 2611 -387 ct +2576 -387 2550 -381 2534 -369 ct 2517 -356 2505 -335 2497 -303 ct 2424 -313 l +2431 -345 2441 -370 2457 -389 ct 2472 -408 2494 -423 2522 -433 ct 2551 -443 2584 -449 2622 -449 ct +2660 -449 2690 -444 2713 -435 ct 2737 -427 2754 -415 2765 -402 ct 2776 -389 2784 -372 2788 -351 ct +2791 -339 2792 -316 2792 -283 ct 2792 -184 l 2792 -114 2794 -71 2797 -52 ct +2800 -34 2806 -16 2816 0 ct 2738 0 l 2730 -15 l 2725 -33 l p +2717 -220 m 2690 -209 2649 -200 2595 -192 ct 2565 -187 2543 -182 2530 -177 ct +2518 -171 2508 -163 2501 -153 ct 2494 -142 2491 -130 2491 -117 ct 2491 -98 2498 -81 2513 -68 ct +2528 -55 2550 -48 2579 -48 ct 2608 -48 2633 -54 2656 -67 ct 2678 -79 2694 -96 2705 -118 ct +2713 -135 2717 -160 2717 -193 ct p ef +3049 -66 m 3060 0 l 3039 3 3020 5 3003 5 ct 2976 5 2955 1 2941 -7 ct 2926 -15 2915 -26 2909 -40 ct +2903 -54 2900 -83 2900 -128 ct 2900 -381 l 2845 -381 l 2845 -439 l 2900 -439 l +2900 -547 l 2974 -592 l 2974 -439 l 3049 -439 l 3049 -381 l 2974 -381 l +2974 -124 l 2974 -103 2975 -89 2978 -83 ct 2981 -77 2985 -72 2991 -69 ct 2997 -65 3005 -63 3016 -63 ct +3024 -63 l 3035 -64 l p ef +3097 -219 m 3097 -300 3119 -361 3164 -400 ct 3202 -432 3248 -449 3303 -449 ct +3363 -449 3412 -429 3451 -389 ct 3489 -350 3508 -295 3508 -225 ct 3508 -169 3500 -124 3483 -92 ct +3466 -60 3441 -34 3409 -16 ct 3376 0 3341 9 3303 9 ct 3241 9 3191 -9 3153 -49 ct +3116 -88 l 3097 -145 l p +3173 -219 m 3173 -163 3185 -121 3210 -93 ct 3234 -65 3265 -51 3303 -51 ct 3340 -51 3370 -65 3395 -93 ct +3419 -121 3432 -164 3432 -222 ct 3432 -276 3419 -317 3395 -345 ct 3370 -373 3339 -387 3303 -387 ct +3265 -387 3234 -373 3210 -345 ct 3185 -317 l 3173 -275 l p ef +3600 0 m 3600 -439 l 3667 -439 l 3667 -372 l 3684 -403 3699 -424 3714 -434 ct +3728 -444 3744 -449 3762 -449 ct 3787 -449 3812 -441 3838 -425 ct 3813 -356 l +3794 -366 3776 -372 3758 -372 ct 3742 -372 3727 -367 3714 -357 ct 3701 -347 3692 -334 3686 -316 ct +3678 -290 3674 -261 3674 -229 ct 3674 0 l p ef +pom +gr +gs +pum +1284 9366 t +79 0 m 79 -606 l 159 -606 l 159 0 l p ef +293 0 m 293 -439 l 360 -439 l 360 -376 l 393 -425 439 -449 500 -449 ct +527 -449 551 -444 573 -434 ct 595 -425 612 -412 623 -397 ct 634 -382 642 -363 646 -342 ct +649 -328 650 -304 650 -270 ct 650 0 l 576 0 l 576 -267 l 576 -297 573 -320 567 -335 ct +561 -350 551 -362 536 -371 ct 522 -380 504 -384 484 -384 ct 453 -384 425 -374 402 -354 ct +379 -334 368 -296 368 -239 ct 368 0 l p ef +769 168 m 769 -439 l 837 -439 l 837 -382 l 853 -404 871 -421 891 -432 ct +911 -443 936 -449 965 -449 ct 1002 -449 1035 -439 1064 -420 ct 1092 -400 1114 -373 1129 -338 ct +1143 -303 1151 -264 1151 -222 ct 1151 -177 1143 -137 1126 -101 ct 1110 -65 1087 -37 1056 -18 ct +1025 0 993 9 959 9 ct 934 9 912 4 892 -5 ct 873 -16 856 -29 844 -45 ct 844 168 l +p +837 -217 m 837 -160 848 -118 871 -91 ct 894 -64 922 -51 954 -51 ct 987 -51 1016 -65 1039 -93 ct +1063 -121 1075 -164 1075 -223 ct 1075 -279 1063 -321 1040 -349 ct 1017 -376 990 -390 958 -390 ct +926 -390 898 -376 873 -346 ct 849 -316 l 837 -273 l p ef +1507 0 m 1507 -64 l 1473 -14 1427 9 1368 9 ct 1342 9 1318 4 1295 -4 ct 1273 -14 1256 -27 1245 -42 ct +1234 -57 1227 -75 1222 -97 ct 1219 -112 1218 -135 1218 -167 ct 1218 -439 l 1292 -439 l +1292 -195 l 1292 -156 1294 -130 1297 -117 ct 1301 -97 1311 -82 1326 -70 ct +1342 -59 1360 -54 1383 -54 ct 1405 -54 1426 -59 1446 -71 ct 1465 -82 1479 -98 1487 -118 ct +1495 -137 1499 -166 1499 -203 ct 1499 -439 l 1574 -439 l 1574 0 l p ef +1858 -66 m 1869 0 l 1848 3 1829 5 1812 5 ct 1785 5 1764 1 1750 -7 ct 1735 -15 1724 -26 1718 -40 ct +1712 -54 1709 -83 1709 -128 ct 1709 -381 l 1654 -381 l 1654 -439 l 1709 -439 l +1709 -547 l 1783 -592 l 1783 -439 l 1858 -439 l 1858 -381 l 1783 -381 l +1783 -124 l 1783 -103 1784 -89 1787 -83 ct 1790 -77 1794 -72 1800 -69 ct 1806 -65 1814 -63 1825 -63 ct +1833 -63 l 1844 -64 l p ef +2190 0 m 2190 -381 l 2124 -381 l 2124 -439 l 2190 -439 l 2190 -485 l +2190 -515 2193 -537 2198 -551 ct 2205 -571 2218 -586 2236 -598 ct 2254 -610 2279 -616 2312 -616 ct +2333 -616 2356 -614 2381 -609 ct 2370 -544 l 2355 -547 2340 -548 2326 -548 ct +2304 -548 2288 -543 2278 -533 ct 2269 -524 2264 -506 2264 -479 ct 2264 -439 l +2350 -439 l 2350 -381 l 2264 -381 l 2264 0 l p ef +2410 0 m 2410 -439 l 2477 -439 l 2477 -372 l 2494 -403 2509 -424 2524 -434 ct +2538 -444 2554 -449 2572 -449 ct 2597 -449 2622 -441 2648 -425 ct 2623 -356 l +2604 -366 2586 -372 2568 -372 ct 2552 -372 2537 -367 2524 -357 ct 2511 -347 2502 -334 2496 -316 ct +2488 -290 2484 -261 2484 -229 ct 2484 0 l p ef +2674 -219 m 2674 -300 2696 -361 2741 -400 ct 2779 -432 2825 -449 2880 -449 ct +2940 -449 2989 -429 3028 -389 ct 3066 -350 3085 -295 3085 -225 ct 3085 -169 3077 -124 3060 -92 ct +3043 -60 3018 -34 2986 -16 ct 2953 0 2918 9 2880 9 ct 2818 9 2768 -9 2730 -49 ct +2693 -88 l 2674 -145 l p +2750 -219 m 2750 -163 2762 -121 2787 -93 ct 2811 -65 2842 -51 2880 -51 ct 2917 -51 2947 -65 2972 -93 ct +2996 -121 3009 -164 3009 -222 ct 3009 -276 2996 -317 2972 -345 ct 2947 -373 2916 -387 2880 -387 ct +2842 -387 2811 -373 2787 -345 ct 2762 -317 l 2750 -275 l p ef +3177 0 m 3177 -439 l 3244 -439 l 3244 -377 l 3258 -399 3276 -416 3299 -429 ct +3322 -442 3348 -449 3377 -449 ct 3410 -449 3436 -442 3457 -428 ct 3478 -415 3493 -396 3501 -372 ct +3536 -423 3581 -449 3637 -449 ct 3680 -449 3714 -437 3737 -412 ct 3761 -388 3772 -351 3772 -301 ct +3772 0 l 3698 0 l 3698 -276 l 3698 -306 3696 -327 3691 -340 ct 3686 -354 3678 -364 3665 -372 ct +3652 -380 3637 -384 3620 -384 ct 3589 -384 3564 -374 3543 -353 ct 3523 -333 3513 -300 3513 -255 ct +3513 0 l 3438 0 l 3438 -285 l 3438 -318 3432 -343 3420 -359 ct 3408 -376 3388 -384 3361 -384 ct +3340 -384 3320 -379 3302 -368 ct 3285 -357 3272 -340 3264 -319 ct 3256 -298 3252 -267 3252 -227 ct +3252 0 l p ef +pom +pum +2302 10319 t +-1 0 m 231 -606 l 318 -606 l 566 0 l 474 0 l 404 -183 l 150 -183 l +83 0 l p +173 -248 m 379 -248 l 315 -416 l 296 -467 282 -509 272 -542 ct 265 -503 254 -465 240 -426 ct +p ef +621 0 m 621 -606 l 830 -606 l 877 -606 913 -603 938 -597 ct 972 -589 1002 -575 1027 -554 ct +1059 -527 1082 -492 1098 -450 ct 1114 -408 1122 -360 1122 -306 ct 1122 -260 1117 -219 1106 -184 ct +1095 -148 1081 -119 1065 -95 ct 1048 -72 1029 -54 1009 -40 ct 989 -27 965 -17 937 -10 ct +909 -3 876 0 840 0 ct p +701 -71 m 831 -71 l 871 -71 902 -75 925 -82 ct 947 -90 965 -100 979 -114 ct +998 -133 1013 -158 1023 -190 ct 1034 -222 1039 -261 1039 -307 ct 1039 -371 1029 -419 1008 -453 ct +987 -487 962 -510 932 -522 ct 911 -530 876 -534 828 -534 ct 701 -534 l p ef +1661 -212 m 1742 -192 l 1725 -126 1695 -76 1651 -41 ct 1607 -6 1554 10 1491 10 ct +1425 10 1372 -2 1331 -29 ct 1290 -56 1259 -94 1238 -145 ct 1216 -195 1206 -249 1206 -307 ct +1206 -370 1218 -425 1242 -472 ct 1266 -519 1300 -555 1345 -580 ct 1389 -604 1438 -616 1492 -616 ct +1553 -616 1604 -601 1645 -570 ct 1686 -539 1715 -496 1731 -440 ct 1652 -421 l +1638 -465 1618 -497 1591 -517 ct 1564 -537 1531 -547 1490 -547 ct 1444 -547 1405 -536 1373 -514 ct +1342 -492 1320 -462 1307 -424 ct 1295 -386 1288 -348 1288 -308 ct 1288 -256 1296 -211 1311 -173 ct +1326 -134 1349 -105 1381 -86 ct 1413 -67 1447 -58 1484 -58 ct 1529 -58 1567 -71 1598 -97 ct +1629 -123 l 1650 -161 l p ef +pom +gr +gs +pum +1284 6773 t +79 0 m 79 -606 l 159 -606 l 159 0 l p ef +293 0 m 293 -439 l 360 -439 l 360 -376 l 393 -425 439 -449 500 -449 ct +527 -449 551 -444 573 -434 ct 595 -425 612 -412 623 -397 ct 634 -382 642 -363 646 -342 ct +649 -328 650 -304 650 -270 ct 650 0 l 576 0 l 576 -267 l 576 -297 573 -320 567 -335 ct +561 -350 551 -362 536 -371 ct 522 -380 504 -384 484 -384 ct 453 -384 425 -374 402 -354 ct +379 -334 368 -296 368 -239 ct 368 0 l p ef +769 168 m 769 -439 l 837 -439 l 837 -382 l 853 -404 871 -421 891 -432 ct +911 -443 936 -449 965 -449 ct 1002 -449 1035 -439 1064 -420 ct 1092 -400 1114 -373 1129 -338 ct +1143 -303 1151 -264 1151 -222 ct 1151 -177 1143 -137 1126 -101 ct 1110 -65 1087 -37 1056 -18 ct +1025 0 993 9 959 9 ct 934 9 912 4 892 -5 ct 873 -16 856 -29 844 -45 ct 844 168 l +p +837 -217 m 837 -160 848 -118 871 -91 ct 894 -64 922 -51 954 -51 ct 987 -51 1016 -65 1039 -93 ct +1063 -121 1075 -164 1075 -223 ct 1075 -279 1063 -321 1040 -349 ct 1017 -376 990 -390 958 -390 ct +926 -390 898 -376 873 -346 ct 849 -316 l 837 -273 l p ef +1507 0 m 1507 -64 l 1473 -14 1427 9 1368 9 ct 1342 9 1318 4 1295 -4 ct 1273 -14 1256 -27 1245 -42 ct +1234 -57 1227 -75 1222 -97 ct 1219 -112 1218 -135 1218 -167 ct 1218 -439 l 1292 -439 l +1292 -195 l 1292 -156 1294 -130 1297 -117 ct 1301 -97 1311 -82 1326 -70 ct +1342 -59 1360 -54 1383 -54 ct 1405 -54 1426 -59 1446 -71 ct 1465 -82 1479 -98 1487 -118 ct +1495 -137 1499 -166 1499 -203 ct 1499 -439 l 1574 -439 l 1574 0 l p ef +1858 -66 m 1869 0 l 1848 3 1829 5 1812 5 ct 1785 5 1764 1 1750 -7 ct 1735 -15 1724 -26 1718 -40 ct +1712 -54 1709 -83 1709 -128 ct 1709 -381 l 1654 -381 l 1654 -439 l 1709 -439 l +1709 -547 l 1783 -592 l 1783 -439 l 1858 -439 l 1858 -381 l 1783 -381 l +1783 -124 l 1783 -103 1784 -89 1787 -83 ct 1790 -77 1794 -72 1800 -69 ct 1806 -65 1814 -63 1825 -63 ct +1833 -63 l 1844 -64 l p ef +2190 0 m 2190 -381 l 2124 -381 l 2124 -439 l 2190 -439 l 2190 -485 l +2190 -515 2193 -537 2198 -551 ct 2205 -571 2218 -586 2236 -598 ct 2254 -610 2279 -616 2312 -616 ct +2333 -616 2356 -614 2381 -609 ct 2370 -544 l 2355 -547 2340 -548 2326 -548 ct +2304 -548 2288 -543 2278 -533 ct 2269 -524 2264 -506 2264 -479 ct 2264 -439 l +2350 -439 l 2350 -381 l 2264 -381 l 2264 0 l p ef +2410 0 m 2410 -439 l 2477 -439 l 2477 -372 l 2494 -403 2509 -424 2524 -434 ct +2538 -444 2554 -449 2572 -449 ct 2597 -449 2622 -441 2648 -425 ct 2623 -356 l +2604 -366 2586 -372 2568 -372 ct 2552 -372 2537 -367 2524 -357 ct 2511 -347 2502 -334 2496 -316 ct +2488 -290 2484 -261 2484 -229 ct 2484 0 l p ef +2674 -219 m 2674 -300 2696 -361 2741 -400 ct 2779 -432 2825 -449 2880 -449 ct +2940 -449 2989 -429 3028 -389 ct 3066 -350 3085 -295 3085 -225 ct 3085 -169 3077 -124 3060 -92 ct +3043 -60 3018 -34 2986 -16 ct 2953 0 2918 9 2880 9 ct 2818 9 2768 -9 2730 -49 ct +2693 -88 l 2674 -145 l p +2750 -219 m 2750 -163 2762 -121 2787 -93 ct 2811 -65 2842 -51 2880 -51 ct 2917 -51 2947 -65 2972 -93 ct +2996 -121 3009 -164 3009 -222 ct 3009 -276 2996 -317 2972 -345 ct 2947 -373 2916 -387 2880 -387 ct +2842 -387 2811 -373 2787 -345 ct 2762 -317 l 2750 -275 l p ef +3177 0 m 3177 -439 l 3244 -439 l 3244 -377 l 3258 -399 3276 -416 3299 -429 ct +3322 -442 3348 -449 3377 -449 ct 3410 -449 3436 -442 3457 -428 ct 3478 -415 3493 -396 3501 -372 ct +3536 -423 3581 -449 3637 -449 ct 3680 -449 3714 -437 3737 -412 ct 3761 -388 3772 -351 3772 -301 ct +3772 0 l 3698 0 l 3698 -276 l 3698 -306 3696 -327 3691 -340 ct 3686 -354 3678 -364 3665 -372 ct +3652 -380 3637 -384 3620 -384 ct 3589 -384 3564 -374 3543 -353 ct 3523 -333 3513 -300 3513 -255 ct +3513 0 l 3438 0 l 3438 -285 l 3438 -318 3432 -343 3420 -359 ct 3408 -376 3388 -384 3361 -384 ct +3340 -384 3320 -379 3302 -368 ct 3285 -357 3272 -340 3264 -319 ct 3256 -298 3252 -267 3252 -227 ct +3252 0 l p ef +pom +pum +2302 7726 t +-1 0 m 231 -606 l 318 -606 l 566 0 l 474 0 l 404 -183 l 150 -183 l +83 0 l p +173 -248 m 379 -248 l 315 -416 l 296 -467 282 -509 272 -542 ct 265 -503 254 -465 240 -426 ct +p ef +621 0 m 621 -606 l 830 -606 l 877 -606 913 -603 938 -597 ct 972 -589 1002 -575 1027 -554 ct +1059 -527 1082 -492 1098 -450 ct 1114 -408 1122 -360 1122 -306 ct 1122 -260 1117 -219 1106 -184 ct +1095 -148 1081 -119 1065 -95 ct 1048 -72 1029 -54 1009 -40 ct 989 -27 965 -17 937 -10 ct +909 -3 876 0 840 0 ct p +701 -71 m 831 -71 l 871 -71 902 -75 925 -82 ct 947 -90 965 -100 979 -114 ct +998 -133 1013 -158 1023 -190 ct 1034 -222 1039 -261 1039 -307 ct 1039 -371 1029 -419 1008 -453 ct +987 -487 962 -510 932 -522 ct 911 -530 876 -534 828 -534 ct 701 -534 l p ef +1661 -212 m 1742 -192 l 1725 -126 1695 -76 1651 -41 ct 1607 -6 1554 10 1491 10 ct +1425 10 1372 -2 1331 -29 ct 1290 -56 1259 -94 1238 -145 ct 1216 -195 1206 -249 1206 -307 ct +1206 -370 1218 -425 1242 -472 ct 1266 -519 1300 -555 1345 -580 ct 1389 -604 1438 -616 1492 -616 ct +1553 -616 1604 -601 1645 -570 ct 1686 -539 1715 -496 1731 -440 ct 1652 -421 l +1638 -465 1618 -497 1591 -517 ct 1564 -537 1531 -547 1490 -547 ct 1444 -547 1405 -536 1373 -514 ct +1342 -492 1320 -462 1307 -424 ct 1295 -386 1288 -348 1288 -308 ct 1288 -256 1296 -211 1311 -173 ct +1326 -134 1349 -105 1381 -86 ct 1413 -67 1447 -58 1484 -58 ct 1529 -58 1567 -71 1598 -97 ct +1629 -123 l 1650 -161 l p ef +pom +gr +8442 7781 m 8437 7778 l 8224 7666 l 8218 7663 l 8049 7492 l 8046 7486 l +7936 7271 l 7933 7265 l 7894 7016 l 7894 7009 l 7933 6759 l 7936 6753 l +8046 6538 l 8049 6532 l 8218 6361 l 8224 6358 l 8437 6246 l 8442 6244 l +8689 6204 l 8696 6204 l 8942 6244 l 8948 6246 l 9161 6358 l 9166 6361 l +9335 6532 l 9338 6538 l 9449 6753 l 9451 6759 l 9491 7009 l 9491 7016 l +9451 7265 l 9449 7271 l 9338 7486 l 9335 7492 l 9166 7663 l 9161 7666 l +8948 7778 l 8942 7781 l 8696 7821 l 8689 7821 l 8442 7781 l p +8692 7779 m 8931 7739 l 9138 7631 l 9303 7464 l 9410 7254 l 9449 7012 l +9410 6770 l 9303 6560 l 9138 6393 l 8931 6285 l 8692 6246 l 8453 6285 l +8246 6393 l 8081 6560 l 7974 6770 l 7936 7012 l 7974 7254 l 8081 7464 l +8246 7631 l 8453 7739 l 8692 7779 l p +8174 6489 m 8204 6458 l 8411 6668 l 8618 6877 l 8825 7087 l 9032 7297 l +9240 7508 l 9210 7538 l 9002 7328 l 8795 7118 l 8588 6908 l 8380 6698 l +8174 6489 l p +8204 7538 m 8174 7509 l 8380 7298 l 8588 7088 l 8795 6878 l 9003 6668 l +9211 6458 l 9240 6489 l 9032 6699 l 8825 6909 l 8618 7119 l 8411 7329 l +8204 7538 l p ef +1 lw 0 lj 8442 7781 m 8437 7778 l 8224 7666 l 8218 7663 l 8049 7492 l +8046 7486 l 7936 7271 l 7933 7265 l 7894 7016 l 7894 7009 l 7933 6759 l +7936 6753 l 8046 6538 l 8049 6532 l 8218 6361 l 8224 6358 l 8437 6246 l +8442 6244 l 8689 6204 l 8696 6204 l 8942 6244 l 8948 6246 l 9161 6358 l +9166 6361 l 9335 6532 l 9338 6538 l 9449 6753 l 9451 6759 l 9491 7009 l +9491 7016 l 9451 7265 l 9449 7271 l 9338 7486 l 9335 7492 l 9166 7663 l +9161 7666 l 8948 7778 l 8942 7781 l 8696 7821 l 8689 7821 l 8442 7781 l +pc +8692 7779 m 8931 7739 l 9138 7631 l 9303 7464 l 9410 7254 l 9449 7012 l +9410 6770 l 9303 6560 l 9138 6393 l 8931 6285 l 8692 6246 l 8453 6285 l +8246 6393 l 8081 6560 l 7974 6770 l 7936 7012 l 7974 7254 l 8081 7464 l +8246 7631 l 8453 7739 l 8692 7779 l pc +8174 6489 m 8204 6458 l 8411 6668 l 8618 6877 l 8825 7087 l 9032 7297 l +9240 7508 l 9210 7538 l 9002 7328 l 8795 7118 l 8588 6908 l 8380 6698 l +8174 6489 l pc +8204 7538 m 8174 7509 l 8380 7298 l 8588 7088 l 8795 6878 l 9003 6668 l +9211 6458 l 9240 6489 l 9032 6699 l 8825 6909 l 8618 7119 l 8411 7329 l +8204 7538 l pc +8691 7821 m 8541 8271 l 8841 8270 l 8691 7821 l p ef +8691 8181 m 8691 12701 l ps +11531 10361 m 11381 10811 l 11681 10810 l 11531 10361 l p ef +11531 10721 m 11531 12701 l ps +gs +pum +7329 12171 t +26 -131 m 99 -142 l 103 -113 115 -90 134 -74 ct 153 -59 179 -51 213 -51 ct +247 -51 272 -58 289 -72 ct 306 -86 314 -102 314 -121 ct 314 -138 307 -151 292 -160 ct +282 -167 256 -175 216 -186 ct 161 -199 123 -211 102 -221 ct 81 -231 65 -245 54 -263 ct +43 -281 38 -301 38 -322 ct 38 -342 42 -360 51 -376 ct 60 -393 73 -407 88 -418 ct +100 -427 115 -434 135 -440 ct 155 -446 177 -449 200 -449 ct 234 -449 264 -444 290 -434 ct +317 -424 336 -410 348 -393 ct 361 -376 369 -354 374 -325 ct 301 -315 l 298 -338 288 -356 272 -368 ct +256 -381 234 -387 205 -387 ct 171 -387 146 -382 132 -370 ct 117 -359 110 -346 110 -331 ct +110 -321 113 -312 119 -305 ct 125 -297 135 -290 148 -285 ct 155 -282 177 -276 213 -266 ct +266 -252 303 -240 324 -231 ct 344 -222 361 -209 373 -192 ct 384 -175 390 -154 390 -129 ct +390 -104 383 -80 369 -58 ct 354 -37 333 -20 306 -8 ct 279 3 248 9 213 9 ct 156 9 113 -1 83 -25 ct +53 -49 l 34 -84 l p ef +453 -520 m 453 -606 l 527 -606 l 527 -520 l p +453 0 m 453 -439 l 527 -439 l 527 0 l p ef +637 0 m 637 -439 l 704 -439 l 704 -376 l 737 -425 783 -449 844 -449 ct +871 -449 895 -444 917 -434 ct 939 -425 956 -412 967 -397 ct 978 -382 986 -363 990 -342 ct +993 -328 994 -304 994 -270 ct 994 0 l 920 0 l 920 -267 l 920 -297 917 -320 911 -335 ct +905 -350 895 -362 880 -371 ct 866 -380 848 -384 828 -384 ct 797 -384 769 -374 746 -354 ct +723 -334 712 -296 712 -239 ct 712 0 l p ef +pom +gr +gs +pum +11880 12223 t +342 -160 m 415 -151 l 407 -100 387 -61 354 -32 ct 321 -4 280 9 232 9 ct 172 9 124 -9 87 -49 ct +51 -88 33 -144 33 -217 ct 33 -265 40 -306 56 -342 ct 72 -378 96 -404 128 -422 ct +160 -440 195 -449 233 -449 ct 280 -449 319 -437 350 -412 ct 380 -388 400 -354 408 -310 ct +336 -299 l 329 -328 317 -350 299 -365 ct 282 -380 260 -387 236 -387 ct 198 -387 168 -374 144 -347 ct +121 -320 109 -278 109 -220 ct 109 -161 120 -118 143 -91 ct 166 -64 195 -51 232 -51 ct +261 -51 285 -60 305 -78 ct 324 -96 l 337 -123 l p ef +451 -219 m 451 -300 473 -361 518 -400 ct 556 -432 602 -449 657 -449 ct 717 -449 766 -429 805 -389 ct +843 -350 862 -295 862 -225 ct 862 -169 854 -124 837 -92 ct 820 -60 795 -34 763 -16 ct +730 0 695 9 657 9 ct 595 9 545 -9 507 -49 ct 470 -88 l 451 -145 l p +527 -219 m 527 -163 539 -121 564 -93 ct 588 -65 619 -51 657 -51 ct 694 -51 724 -65 749 -93 ct +773 -121 786 -164 786 -222 ct 786 -276 773 -317 749 -345 ct 724 -373 693 -387 657 -387 ct +619 -387 588 -373 564 -345 ct 539 -317 l 527 -275 l p ef +926 -131 m 999 -142 l 1003 -113 1015 -90 1034 -74 ct 1053 -59 1079 -51 1113 -51 ct +1147 -51 1172 -58 1189 -72 ct 1206 -86 1214 -102 1214 -121 ct 1214 -138 1207 -151 1192 -160 ct +1182 -167 1156 -175 1116 -186 ct 1061 -199 1023 -211 1002 -221 ct 981 -231 965 -245 954 -263 ct +943 -281 938 -301 938 -322 ct 938 -342 942 -360 951 -376 ct 960 -393 973 -407 988 -418 ct +1000 -427 1015 -434 1035 -440 ct 1055 -446 1077 -449 1100 -449 ct 1134 -449 1164 -444 1190 -434 ct +1217 -424 1236 -410 1248 -393 ct 1261 -376 1269 -354 1274 -325 ct 1201 -315 l +1198 -338 1188 -356 1172 -368 ct 1156 -381 1134 -387 1105 -387 ct 1071 -387 1046 -382 1032 -370 ct +1017 -359 1010 -346 1010 -331 ct 1010 -321 1013 -312 1019 -305 ct 1025 -297 1035 -290 1048 -285 ct +1055 -282 1077 -276 1113 -266 ct 1166 -252 1203 -240 1224 -231 ct 1244 -222 1261 -209 1273 -192 ct +1284 -175 1290 -154 1290 -129 ct 1290 -104 1283 -80 1269 -58 ct 1254 -37 1233 -20 1206 -8 ct +1179 3 1148 9 1113 9 ct 1056 9 1013 -1 983 -25 ct 953 -49 l 934 -84 l p ef +pom +gr +24131 6986 m 23680 6836 l 23681 7136 l 24131 6986 l p ef +20956 6986 m 23771 6986 l ps +24131 9526 m 23680 9376 l 23681 9676 l 24131 9526 l p ef +20956 9526 m 23771 9526 l ps +gs +pum +24646 7223 t +79 0 m 79 -606 l 159 -606 l 159 0 l p ef +pom +gr +gs +pum +24435 9763 t +524 -64 m 562 -39 596 -20 627 -8 ct 604 47 l 560 31 517 6 473 -27 ct 429 -2 379 10 325 10 ct +270 10 220 -2 175 -29 ct 131 -55 96 -93 72 -141 ct 48 -189 36 -243 36 -303 ct 36 -362 48 -417 72 -466 ct +97 -515 131 -552 176 -578 ct 221 -604 271 -617 326 -617 ct 382 -617 433 -603 478 -577 ct +523 -550 557 -513 580 -465 ct 604 -417 616 -363 616 -303 ct 616 -253 608 -208 593 -168 ct +578 -129 l 555 -94 l p +348 -167 m 394 -154 432 -135 462 -109 ct 509 -152 533 -217 533 -303 ct 533 -352 525 -395 508 -432 ct +491 -468 467 -497 435 -517 ct 403 -537 367 -547 327 -547 ct 267 -547 217 -527 178 -486 ct +138 -445 119 -384 119 -303 ct 119 -224 138 -163 177 -121 ct 216 -79 266 -58 327 -58 ct +355 -58 382 -63 408 -74 ct 383 -90 356 -102 328 -109 ct p ef +pom +gr +gs +pum +23747 3307 t +315 0 m 241 0 l 241 -474 l 223 -457 199 -440 170 -423 ct 141 -405 115 -393 92 -384 ct +92 -456 l 133 -476 170 -499 201 -527 ct 232 -555 254 -582 267 -608 ct 315 -608 l +p ef +897 -457 m 823 -452 l 816 -481 807 -502 795 -515 ct 775 -536 750 -547 720 -547 ct +697 -547 676 -540 658 -527 ct 634 -510 616 -485 602 -452 ct 589 -420 582 -373 581 -312 ct +599 -339 621 -360 647 -373 ct 673 -386 700 -393 729 -393 ct 778 -393 820 -375 855 -338 ct +890 -301 908 -254 908 -196 ct 908 -158 899 -123 883 -90 ct 867 -58 844 -33 815 -15 ct +787 1 754 10 718 10 ct 656 10 605 -12 566 -58 ct 527 -103 507 -178 507 -283 ct +507 -400 529 -486 572 -539 ct 610 -585 661 -608 725 -608 ct 773 -608 812 -595 842 -568 ct +873 -541 l 891 -504 l p +593 -196 m 593 -170 598 -146 609 -122 ct 620 -99 635 -81 655 -69 ct 675 -57 695 -50 717 -50 ct +748 -50 775 -63 798 -88 ct 820 -114 832 -148 832 -192 ct 832 -234 820 -267 798 -291 ct +776 -315 748 -327 714 -327 ct 680 -327 652 -315 628 -291 ct 605 -267 l 593 -235 l +p ef +952 -181 m 952 -256 l 1181 -256 l 1181 -181 l p ef +1341 0 m 1272 0 l 1272 -606 l 1346 -606 l 1346 -390 l 1378 -429 1418 -449 1467 -449 ct +1494 -449 1519 -443 1543 -432 ct 1568 -421 1587 -406 1603 -386 ct 1619 -367 1631 -343 1640 -315 ct +1648 -287 1653 -257 1653 -226 ct 1653 -150 1634 -92 1597 -51 ct 1560 -10 1515 9 1463 9 ct +1411 9 1370 -11 1341 -55 ct p +1340 -222 m 1340 -170 1347 -132 1362 -108 ct 1385 -70 1417 -51 1457 -51 ct +1489 -51 1517 -65 1541 -93 ct 1565 -121 1577 -164 1577 -220 ct 1577 -277 1565 -319 1543 -346 ct +1520 -374 1492 -387 1460 -387 ct 1428 -387 1399 -373 1376 -345 ct 1352 -317 l +1340 -276 l p ef +1723 -520 m 1723 -606 l 1797 -606 l 1797 -520 l p +1723 0 m 1723 -439 l 1797 -439 l 1797 0 l p ef +2070 -66 m 2081 0 l 2060 3 2041 5 2024 5 ct 1997 5 1976 1 1962 -7 ct 1947 -15 1936 -26 1930 -40 ct +1924 -54 1921 -83 1921 -128 ct 1921 -381 l 1866 -381 l 1866 -439 l 1921 -439 l +1921 -547 l 1995 -592 l 1995 -439 l 2070 -439 l 2070 -381 l 1995 -381 l +1995 -124 l 1995 -103 1996 -89 1999 -83 ct 2002 -77 2006 -72 2012 -69 ct 2018 -65 2026 -63 2037 -63 ct +2045 -63 l 2056 -64 l p ef +pom +pum +22596 4260 t +340 0 m 340 -55 l 312 -11 272 9 217 9 ct 182 9 150 0 121 -19 ct 92 -38 69 -65 53 -99 ct +37 -134 28 -174 28 -219 ct 28 -263 36 -302 50 -338 ct 65 -374 87 -401 116 -420 ct +145 -439 178 -449 214 -449 ct 241 -449 264 -443 285 -432 ct 306 -421 322 -406 335 -388 ct +335 -606 l 409 -606 l 409 0 l p +105 -219 m 105 -162 117 -120 141 -93 ct 164 -65 192 -51 224 -51 ct 257 -51 285 -64 307 -91 ct +330 -117 342 -158 342 -212 ct 342 -273 330 -317 307 -345 ct 284 -373 255 -387 221 -387 ct +188 -387 160 -374 138 -346 ct 116 -319 l 105 -277 l p ef +818 -54 m 790 -30 764 -14 738 -4 ct 713 5 685 9 656 9 ct 608 9 571 -1 545 -25 ct +519 -49 506 -79 506 -115 ct 506 -137 511 -156 521 -174 ct 531 -192 543 -206 559 -217 ct +575 -228 593 -236 613 -241 ct 627 -245 649 -249 679 -253 ct 739 -260 783 -268 812 -278 ct +812 -288 812 -295 812 -298 ct 812 -328 805 -349 791 -362 ct 772 -379 744 -387 706 -387 ct +671 -387 645 -381 629 -369 ct 612 -356 600 -335 592 -303 ct 519 -313 l 526 -345 536 -370 552 -389 ct +567 -408 589 -423 617 -433 ct 646 -443 679 -449 717 -449 ct 755 -449 785 -444 808 -435 ct +832 -427 849 -415 860 -402 ct 871 -389 879 -372 883 -351 ct 886 -339 887 -316 887 -283 ct +887 -184 l 887 -114 889 -71 892 -52 ct 895 -34 901 -16 911 0 ct 833 0 l 825 -15 l +820 -33 l p +812 -220 m 785 -209 744 -200 690 -192 ct 660 -187 638 -182 625 -177 ct 613 -171 603 -163 596 -153 ct +589 -142 586 -130 586 -117 ct 586 -98 593 -81 608 -68 ct 623 -55 645 -48 674 -48 ct +703 -48 728 -54 751 -67 ct 773 -79 789 -96 800 -118 ct 808 -135 812 -160 812 -193 ct +p ef +1144 -66 m 1155 0 l 1134 3 1115 5 1098 5 ct 1071 5 1050 1 1036 -7 ct 1021 -15 1010 -26 1004 -40 ct +998 -54 995 -83 995 -128 ct 995 -381 l 940 -381 l 940 -439 l 995 -439 l +995 -547 l 1069 -592 l 1069 -439 l 1144 -439 l 1144 -381 l 1069 -381 l +1069 -124 l 1069 -103 1070 -89 1073 -83 ct 1076 -77 1080 -72 1086 -69 ct 1092 -65 1100 -63 1111 -63 ct +1119 -63 l 1130 -64 l p ef +1506 -54 m 1478 -30 1452 -14 1426 -4 ct 1401 5 1373 9 1344 9 ct 1296 9 1259 -1 1233 -25 ct +1207 -49 1194 -79 1194 -115 ct 1194 -137 1199 -156 1209 -174 ct 1219 -192 1231 -206 1247 -217 ct +1263 -228 1281 -236 1301 -241 ct 1315 -245 1337 -249 1367 -253 ct 1427 -260 1471 -268 1500 -278 ct +1500 -288 1500 -295 1500 -298 ct 1500 -328 1493 -349 1479 -362 ct 1460 -379 1432 -387 1394 -387 ct +1359 -387 1333 -381 1317 -369 ct 1300 -356 1288 -335 1280 -303 ct 1207 -313 l +1214 -345 1224 -370 1240 -389 ct 1255 -408 1277 -423 1305 -433 ct 1334 -443 1367 -449 1405 -449 ct +1443 -449 1473 -444 1496 -435 ct 1520 -427 1537 -415 1548 -402 ct 1559 -389 1567 -372 1571 -351 ct +1574 -339 1575 -316 1575 -283 ct 1575 -184 l 1575 -114 1577 -71 1580 -52 ct +1583 -34 1589 -16 1599 0 ct 1521 0 l 1513 -15 l 1508 -33 l p +1500 -220 m 1473 -209 1432 -200 1378 -192 ct 1348 -187 1326 -182 1313 -177 ct +1301 -171 1291 -163 1284 -153 ct 1277 -142 1274 -130 1274 -117 ct 1274 -98 1281 -81 1296 -68 ct +1311 -55 1333 -48 1362 -48 ct 1391 -48 1416 -54 1439 -67 ct 1461 -79 1477 -96 1488 -118 ct +1496 -135 1500 -160 1500 -193 ct p ef +2070 -66 m 2081 0 l 2060 3 2041 5 2024 5 ct 1997 5 1976 1 1962 -7 ct 1947 -15 1936 -26 1930 -40 ct +1924 -54 1921 -83 1921 -128 ct 1921 -381 l 1866 -381 l 1866 -439 l 1921 -439 l +1921 -547 l 1995 -592 l 1995 -439 l 2070 -439 l 2070 -381 l 1995 -381 l +1995 -124 l 1995 -103 1996 -89 1999 -83 ct 2002 -77 2006 -72 2012 -69 ct 2018 -65 2026 -63 2037 -63 ct +2045 -63 l 2056 -64 l p ef +2118 -219 m 2118 -300 2140 -361 2185 -400 ct 2223 -432 2269 -449 2324 -449 ct +2384 -449 2433 -429 2472 -389 ct 2510 -350 2529 -295 2529 -225 ct 2529 -169 2521 -124 2504 -92 ct +2487 -60 2462 -34 2430 -16 ct 2397 0 2362 9 2324 9 ct 2262 9 2212 -9 2174 -49 ct +2137 -88 l 2118 -145 l p +2194 -219 m 2194 -163 2206 -121 2231 -93 ct 2255 -65 2286 -51 2324 -51 ct 2361 -51 2391 -65 2416 -93 ct +2440 -121 2453 -164 2453 -222 ct 2453 -276 2440 -317 2416 -345 ct 2391 -373 2360 -387 2324 -387 ct +2286 -387 2255 -373 2231 -345 ct 2206 -317 l 2194 -275 l p ef +2860 0 m 2860 -606 l 2935 -606 l 2935 -388 l 2970 -429 3013 -449 3066 -449 ct +3099 -449 3127 -442 3151 -429 ct 3175 -417 3192 -399 3203 -376 ct 3213 -354 3218 -321 3218 -278 ct +3218 0 l 3144 0 l 3144 -278 l 3144 -315 3136 -342 3119 -359 ct 3103 -376 3081 -385 3051 -385 ct +3029 -385 3008 -379 2989 -367 ct 2969 -356 2955 -340 2947 -321 ct 2939 -301 2935 -274 2935 -240 ct +2935 0 l p ef +3309 -219 m 3309 -300 3331 -361 3376 -400 ct 3414 -432 3460 -449 3515 -449 ct +3575 -449 3624 -429 3663 -389 ct 3701 -350 3720 -295 3720 -225 ct 3720 -169 3712 -124 3695 -92 ct +3678 -60 3653 -34 3621 -16 ct 3588 0 3553 9 3515 9 ct 3453 9 3403 -9 3365 -49 ct +3328 -88 l 3309 -145 l p +3385 -219 m 3385 -163 3397 -121 3422 -93 ct 3446 -65 3477 -51 3515 -51 ct 3552 -51 3582 -65 3607 -93 ct +3631 -121 3644 -164 3644 -222 ct 3644 -276 3631 -317 3607 -345 ct 3582 -373 3551 -387 3515 -387 ct +3477 -387 3446 -373 3422 -345 ct 3397 -317 l 3385 -275 l p ef +3783 -131 m 3856 -142 l 3860 -113 3872 -90 3891 -74 ct 3910 -59 3936 -51 3970 -51 ct +4004 -51 4029 -58 4046 -72 ct 4063 -86 4071 -102 4071 -121 ct 4071 -138 4064 -151 4049 -160 ct +4039 -167 4013 -175 3973 -186 ct 3918 -199 3880 -211 3859 -221 ct 3838 -231 3822 -245 3811 -263 ct +3800 -281 3795 -301 3795 -322 ct 3795 -342 3799 -360 3808 -376 ct 3817 -393 3830 -407 3845 -418 ct +3857 -427 3872 -434 3892 -440 ct 3912 -446 3934 -449 3957 -449 ct 3991 -449 4021 -444 4047 -434 ct +4074 -424 4093 -410 4105 -393 ct 4118 -376 4126 -354 4131 -325 ct 4058 -315 l +4055 -338 4045 -356 4029 -368 ct 4013 -381 3991 -387 3962 -387 ct 3928 -387 3903 -382 3889 -370 ct +3874 -359 3867 -346 3867 -331 ct 3867 -321 3870 -312 3876 -305 ct 3882 -297 3892 -290 3905 -285 ct +3912 -282 3934 -276 3970 -266 ct 4023 -252 4060 -240 4081 -231 ct 4101 -222 4118 -209 4130 -192 ct +4141 -175 4147 -154 4147 -129 ct 4147 -104 4140 -80 4126 -58 ct 4111 -37 4090 -20 4063 -8 ct +4036 3 4005 9 3970 9 ct 3913 9 3870 -1 3840 -25 ct 3810 -49 l 3791 -84 l p ef +4372 -66 m 4383 0 l 4362 3 4343 5 4326 5 ct 4299 5 4278 1 4264 -7 ct 4249 -15 4238 -26 4232 -40 ct +4226 -54 4223 -83 4223 -128 ct 4223 -381 l 4168 -381 l 4168 -439 l 4223 -439 l +4223 -547 l 4297 -592 l 4297 -439 l 4372 -439 l 4372 -381 l 4297 -381 l +4297 -124 l 4297 -103 4298 -89 4301 -83 ct 4304 -77 4308 -72 4314 -69 ct 4320 -65 4328 -63 4339 -63 ct +4347 -63 l 4358 -64 l p ef +pom +pum +23257 5213 t +177 0 m 10 -439 l 89 -439 l 183 -176 l 193 -147 203 -118 211 -87 ct 218 -110 227 -138 239 -171 ct +337 -439 l 413 -439 l 247 0 l p ef +479 -520 m 479 -606 l 553 -606 l 553 -520 l p +479 0 m 479 -439 l 553 -439 l 553 0 l p ef +951 -54 m 923 -30 897 -14 871 -4 ct 846 5 818 9 789 9 ct 741 9 704 -1 678 -25 ct +652 -49 639 -79 639 -115 ct 639 -137 644 -156 654 -174 ct 664 -192 676 -206 692 -217 ct +708 -228 726 -236 746 -241 ct 760 -245 782 -249 812 -253 ct 872 -260 916 -268 945 -278 ct +945 -288 945 -295 945 -298 ct 945 -328 938 -349 924 -362 ct 905 -379 877 -387 839 -387 ct +804 -387 778 -381 762 -369 ct 745 -356 733 -335 725 -303 ct 652 -313 l 659 -345 669 -370 685 -389 ct +700 -408 722 -423 750 -433 ct 779 -443 812 -449 850 -449 ct 888 -449 918 -444 941 -435 ct +965 -427 982 -415 993 -402 ct 1004 -389 1012 -372 1016 -351 ct 1019 -339 1020 -316 1020 -283 ct +1020 -184 l 1020 -114 1022 -71 1025 -52 ct 1028 -34 1034 -16 1044 0 ct 966 0 l +958 -15 l 953 -33 l p +945 -220 m 918 -209 877 -200 823 -192 ct 793 -187 771 -182 758 -177 ct 746 -171 736 -163 729 -153 ct +722 -142 719 -130 719 -117 ct 719 -98 726 -81 741 -68 ct 756 -55 778 -48 807 -48 ct +836 -48 861 -54 884 -67 ct 906 -79 922 -96 933 -118 ct 941 -135 945 -160 945 -193 ct +p ef +1759 -606 m 1839 -606 l 1839 -256 l 1839 -195 1832 -146 1818 -110 ct 1804 -75 1780 -45 1744 -23 ct +1708 0 1660 10 1602 10 ct 1545 10 1499 0 1463 -19 ct 1426 -38 1401 -66 1385 -104 ct +1370 -141 1362 -191 1362 -256 ct 1362 -606 l 1442 -606 l 1442 -256 l 1442 -203 1447 -164 1457 -139 ct +1467 -115 1484 -95 1507 -82 ct 1531 -68 1560 -62 1595 -62 ct 1654 -62 1696 -75 1721 -102 ct +1746 -128 1759 -180 1759 -256 ct p ef +1969 -194 m 2044 -201 l 2048 -171 2056 -146 2069 -126 ct 2082 -107 2103 -91 2130 -79 ct +2158 -67 2189 -61 2223 -61 ct 2254 -61 2281 -66 2304 -75 ct 2328 -84 2345 -96 2357 -112 ct +2368 -128 2374 -145 2374 -164 ct 2374 -183 2368 -200 2357 -214 ct 2346 -228 2328 -240 2303 -250 ct +2286 -256 2250 -266 2195 -279 ct 2139 -293 2100 -305 2078 -317 ct 2049 -332 2027 -351 2013 -374 ct +1999 -396 1992 -421 1992 -449 ct 1992 -480 2000 -508 2018 -535 ct 2035 -561 2061 -582 2094 -595 ct +2127 -609 2164 -616 2205 -616 ct 2250 -616 2290 -609 2324 -594 ct 2358 -580 2385 -559 2403 -531 ct +2422 -502 2432 -471 2433 -435 ct 2356 -429 l 2352 -468 2338 -496 2314 -516 ct +2290 -536 2255 -545 2208 -545 ct 2160 -545 2125 -537 2102 -519 ct 2080 -501 2069 -480 2069 -454 ct +2069 -433 2077 -415 2093 -401 ct 2108 -387 2148 -372 2214 -357 ct 2279 -343 2324 -330 2348 -319 ct +2383 -303 2409 -282 2426 -257 ct 2443 -232 2451 -203 2451 -171 ct 2451 -138 2442 -108 2423 -80 ct +2405 -51 2378 -29 2344 -13 ct 2309 2 2270 10 2227 10 ct 2172 10 2126 2 2089 -13 ct +2052 -29 2023 -53 2002 -85 ct 1981 -117 l 1970 -154 l p ef +2576 0 m 2576 -606 l 2803 -606 l 2849 -606 2886 -600 2914 -587 ct 2942 -575 2964 -556 2980 -531 ct +2996 -505 3004 -479 3004 -451 ct 3004 -425 2997 -400 2983 -378 ct 2969 -355 2948 -336 2919 -322 ct +2956 -311 2984 -293 3004 -267 ct 3024 -241 3033 -211 3033 -175 ct 3033 -147 3027 -120 3015 -96 ct +3003 -72 2989 -53 2971 -40 ct 2953 -26 2931 -16 2905 -10 ct 2878 -3 2845 0 2807 0 ct +p +2656 -351 m 2787 -351 l 2822 -351 2848 -353 2863 -358 ct 2884 -364 2899 -374 2909 -388 ct +2920 -402 2925 -420 2925 -441 ct 2925 -461 2920 -479 2911 -494 ct 2901 -510 2887 -520 2869 -526 ct +2851 -531 2821 -534 2777 -534 ct 2656 -534 l p +2656 -71 m 2807 -71 l 2833 -71 2851 -72 2861 -74 ct 2880 -77 2895 -83 2908 -90 ct +2920 -98 2930 -109 2938 -124 ct 2946 -139 2950 -156 2950 -175 ct 2950 -198 2944 -218 2933 -234 ct +2921 -251 2905 -263 2885 -269 ct 2864 -276 2835 -279 2796 -279 ct 2656 -279 l +p ef +pom +gr +gs +pum +6825 19235 t +497 -212 m 578 -192 l 561 -126 531 -76 487 -41 ct 443 -6 390 10 327 10 ct +261 10 208 -2 167 -29 ct 126 -56 95 -94 74 -145 ct 52 -195 42 -249 42 -307 ct 42 -370 54 -425 78 -472 ct +102 -519 136 -555 181 -580 ct 225 -604 274 -616 328 -616 ct 389 -616 440 -601 481 -570 ct +522 -539 551 -496 567 -440 ct 488 -421 l 474 -465 454 -497 427 -517 ct 400 -537 367 -547 326 -547 ct +280 -547 241 -536 209 -514 ct 178 -492 156 -462 143 -424 ct 131 -386 124 -348 124 -308 ct +124 -256 132 -211 147 -173 ct 162 -134 185 -105 217 -86 ct 249 -67 283 -58 320 -58 ct +365 -58 403 -71 434 -97 ct 465 -123 l 486 -161 l p ef +991 -141 m 1068 -131 l 1056 -86 1033 -52 1001 -27 ct 968 -2 926 9 875 9 ct +811 9 760 -9 722 -49 ct 684 -88 666 -144 666 -215 ct 666 -289 685 -347 723 -387 ct +761 -428 810 -449 871 -449 ct 929 -449 977 -429 1015 -389 ct 1052 -349 1070 -292 1070 -220 ct +1070 -216 1070 -209 1070 -200 ct 742 -200 l 745 -152 759 -115 783 -89 ct 808 -64 839 -51 875 -51 ct +903 -51 926 -58 945 -72 ct 964 -87 l 980 -110 l p +747 -261 m 992 -261 l 989 -298 979 -326 964 -344 ct 940 -373 909 -387 871 -387 ct +837 -387 809 -376 785 -353 ct 762 -330 l 749 -300 l p ef +1166 0 m 1166 -439 l 1233 -439 l 1233 -376 l 1266 -425 1312 -449 1373 -449 ct +1400 -449 1424 -444 1446 -434 ct 1468 -425 1485 -412 1496 -397 ct 1507 -382 1515 -363 1519 -342 ct +1522 -328 1523 -304 1523 -270 ct 1523 0 l 1449 0 l 1449 -267 l 1449 -297 1446 -320 1440 -335 ct +1434 -350 1424 -362 1409 -371 ct 1395 -380 1377 -384 1357 -384 ct 1326 -384 1298 -374 1275 -354 ct +1252 -334 1241 -296 1241 -239 ct 1241 0 l p ef +1806 -66 m 1817 0 l 1796 3 1777 5 1760 5 ct 1733 5 1712 1 1698 -7 ct 1683 -15 1672 -26 1666 -40 ct +1660 -54 1657 -83 1657 -128 ct 1657 -381 l 1602 -381 l 1602 -439 l 1657 -439 l +1657 -547 l 1731 -592 l 1731 -439 l 1806 -439 l 1806 -381 l 1731 -381 l +1731 -124 l 1731 -103 1732 -89 1735 -83 ct 1738 -77 1742 -72 1748 -69 ct 1754 -65 1762 -63 1773 -63 ct +1781 -63 l 1792 -64 l p ef +2182 -141 m 2259 -131 l 2247 -86 2224 -52 2192 -27 ct 2159 -2 2117 9 2066 9 ct +2002 9 1951 -9 1913 -49 ct 1875 -88 1857 -144 1857 -215 ct 1857 -289 1876 -347 1914 -387 ct +1952 -428 2001 -449 2062 -449 ct 2120 -449 2168 -429 2206 -389 ct 2243 -349 2261 -292 2261 -220 ct +2261 -216 2261 -209 2261 -200 ct 1933 -200 l 1936 -152 1950 -115 1974 -89 ct +1999 -64 2030 -51 2066 -51 ct 2094 -51 2117 -58 2136 -72 ct 2155 -87 l 2171 -110 l +p +1938 -261 m 2183 -261 l 2180 -298 2170 -326 2155 -344 ct 2131 -373 2100 -387 2062 -387 ct +2028 -387 2000 -376 1976 -353 ct 1953 -330 l 1940 -300 l p ef +2357 0 m 2357 -439 l 2424 -439 l 2424 -372 l 2441 -403 2456 -424 2471 -434 ct +2485 -444 2501 -449 2519 -449 ct 2544 -449 2569 -441 2595 -425 ct 2570 -356 l +2551 -366 2533 -372 2515 -372 ct 2499 -372 2484 -367 2471 -357 ct 2458 -347 2449 -334 2443 -316 ct +2435 -290 2431 -261 2431 -229 ct 2431 0 l p ef +2904 0 m 2904 -381 l 2838 -381 l 2838 -439 l 2904 -439 l 2904 -485 l +2904 -515 2907 -537 2912 -551 ct 2919 -571 2932 -586 2950 -598 ct 2968 -610 2993 -616 3026 -616 ct +3047 -616 3070 -614 3095 -609 ct 3084 -544 l 3069 -547 3054 -548 3040 -548 ct +3018 -548 3002 -543 2992 -533 ct 2983 -524 2978 -506 2978 -479 ct 2978 -439 l +3064 -439 l 3064 -381 l 2978 -381 l 2978 0 l p ef +3124 0 m 3124 -439 l 3191 -439 l 3191 -372 l 3208 -403 3223 -424 3238 -434 ct +3252 -444 3268 -449 3286 -449 ct 3311 -449 3336 -441 3362 -425 ct 3337 -356 l +3318 -366 3300 -372 3282 -372 ct 3266 -372 3251 -367 3238 -357 ct 3225 -347 3216 -334 3210 -316 ct +3202 -290 3198 -261 3198 -229 ct 3198 0 l p ef +3716 -141 m 3793 -131 l 3781 -86 3758 -52 3726 -27 ct 3693 -2 3651 9 3600 9 ct +3536 9 3485 -9 3447 -49 ct 3409 -88 3391 -144 3391 -215 ct 3391 -289 3410 -347 3448 -387 ct +3486 -428 3535 -449 3596 -449 ct 3654 -449 3702 -429 3740 -389 ct 3777 -349 3795 -292 3795 -220 ct +3795 -216 3795 -209 3795 -200 ct 3467 -200 l 3470 -152 3484 -115 3508 -89 ct +3533 -64 3564 -51 3600 -51 ct 3628 -51 3651 -58 3670 -72 ct 3689 -87 l 3705 -110 l +p +3472 -261 m 3717 -261 l 3714 -298 3704 -326 3689 -344 ct 3665 -373 3634 -387 3596 -387 ct +3562 -387 3534 -376 3510 -353 ct 3487 -330 l 3474 -300 l p ef +4171 168 m 4171 -46 l 4160 -30 4144 -16 4123 -6 ct 4102 4 4080 9 4056 9 ct +4004 9 3959 -10 3922 -52 ct 3884 -94 3865 -151 3865 -223 ct 3865 -267 3873 -307 3888 -342 ct +3904 -377 3926 -404 3955 -422 ct 3984 -440 4016 -449 4051 -449 ct 4105 -449 4148 -426 4179 -380 ct +4179 -439 l 4246 -439 l 4246 168 l p +3942 -220 m 3942 -164 3954 -121 3977 -93 ct 4001 -65 4029 -51 4063 -51 ct 4094 -51 4122 -64 4144 -91 ct +4167 -118 4179 -159 4179 -214 ct 4179 -272 4167 -316 4143 -346 ct 4118 -375 4090 -390 4058 -390 ct +4025 -390 3998 -376 3975 -349 ct 3953 -321 l 3942 -279 l p ef +4656 0 m 4656 -64 l 4622 -14 4576 9 4517 9 ct 4491 9 4467 4 4444 -4 ct 4422 -14 4405 -27 4394 -42 ct +4383 -57 4376 -75 4371 -97 ct 4368 -112 4367 -135 4367 -167 ct 4367 -439 l 4441 -439 l +4441 -195 l 4441 -156 4443 -130 4446 -117 ct 4450 -97 4460 -82 4475 -70 ct +4491 -59 4509 -54 4532 -54 ct 4554 -54 4575 -59 4595 -71 ct 4614 -82 4628 -98 4636 -118 ct +4644 -137 4648 -166 4648 -203 ct 4648 -439 l 4723 -439 l 4723 0 l p ef +5145 -141 m 5222 -131 l 5210 -86 5187 -52 5155 -27 ct 5122 -2 5080 9 5029 9 ct +4965 9 4914 -9 4876 -49 ct 4838 -88 4820 -144 4820 -215 ct 4820 -289 4839 -347 4877 -387 ct +4915 -428 4964 -449 5025 -449 ct 5083 -449 5131 -429 5169 -389 ct 5206 -349 5224 -292 5224 -220 ct +5224 -216 5224 -209 5224 -200 ct 4896 -200 l 4899 -152 4913 -115 4937 -89 ct +4962 -64 4993 -51 5029 -51 ct 5057 -51 5080 -58 5099 -72 ct 5118 -87 l 5134 -110 l +p +4901 -261 m 5146 -261 l 5143 -298 5133 -326 5118 -344 ct 5094 -373 5063 -387 5025 -387 ct +4991 -387 4963 -376 4939 -353 ct 4916 -330 l 4903 -300 l p ef +5320 0 m 5320 -439 l 5387 -439 l 5387 -376 l 5420 -425 5466 -449 5527 -449 ct +5554 -449 5578 -444 5600 -434 ct 5622 -425 5639 -412 5650 -397 ct 5661 -382 5669 -363 5673 -342 ct +5676 -328 5677 -304 5677 -270 ct 5677 0 l 5603 0 l 5603 -267 l 5603 -297 5600 -320 5594 -335 ct +5588 -350 5578 -362 5563 -371 ct 5549 -380 5531 -384 5511 -384 ct 5480 -384 5452 -374 5429 -354 ct +5406 -334 5395 -296 5395 -239 ct 5395 0 l p ef +6083 -160 m 6156 -151 l 6148 -100 6128 -61 6095 -32 ct 6062 -4 6021 9 5973 9 ct +5913 9 5865 -9 5828 -49 ct 5792 -88 5774 -144 5774 -217 ct 5774 -265 5781 -306 5797 -342 ct +5813 -378 5837 -404 5869 -422 ct 5901 -440 5936 -449 5974 -449 ct 6021 -449 6060 -437 6091 -412 ct +6121 -388 6141 -354 6149 -310 ct 6077 -299 l 6070 -328 6058 -350 6040 -365 ct +6023 -380 6001 -387 5977 -387 ct 5939 -387 5909 -374 5885 -347 ct 5862 -320 5850 -278 5850 -220 ct +5850 -161 5861 -118 5884 -91 ct 5907 -64 5936 -51 5973 -51 ct 6002 -51 6026 -60 6046 -78 ct +6065 -96 l 6078 -123 l p ef +6217 169 m 6209 99 l 6225 103 6239 105 6251 105 ct 6268 105 6281 103 6291 97 ct +6301 92 6309 84 6315 74 ct 6320 66 6328 48 6338 19 ct 6340 14 6342 8 6345 0 ct +6178 -439 l 6258 -439 l 6350 -184 l 6362 -152 6372 -118 6382 -83 ct 6390 -117 6400 -150 6412 -183 ct +6506 -439 l 6581 -439 l 6413 7 l 6396 55 6382 88 6372 107 ct 6358 131 6343 149 6326 161 ct +6309 172 6289 178 6265 178 ct 6251 178 l 6235 175 l p ef +pom +pum +7778 20188 t +26 -181 m 26 -256 l 255 -256 l 255 -181 l p ef +364 0 m 364 -381 l 298 -381 l 298 -439 l 364 -439 l 364 -485 l 364 -515 367 -537 372 -551 ct +379 -571 392 -586 410 -598 ct 428 -610 453 -616 486 -616 ct 507 -616 530 -614 555 -609 ct +544 -544 l 529 -547 514 -548 500 -548 ct 478 -548 462 -543 452 -533 ct 443 -524 438 -506 438 -479 ct +438 -439 l 524 -439 l 524 -381 l 438 -381 l 438 0 l p ef +555 -131 m 628 -142 l 632 -113 644 -90 663 -74 ct 682 -59 708 -51 742 -51 ct +776 -51 801 -58 818 -72 ct 835 -86 843 -102 843 -121 ct 843 -138 836 -151 821 -160 ct +811 -167 785 -175 745 -186 ct 690 -199 652 -211 631 -221 ct 610 -231 594 -245 583 -263 ct +572 -281 567 -301 567 -322 ct 567 -342 571 -360 580 -376 ct 589 -393 602 -407 617 -418 ct +629 -427 644 -434 664 -440 ct 684 -446 706 -449 729 -449 ct 763 -449 793 -444 819 -434 ct +846 -424 865 -410 877 -393 ct 890 -376 898 -354 903 -325 ct 830 -315 l 827 -338 817 -356 801 -368 ct +785 -381 763 -387 734 -387 ct 700 -387 675 -382 661 -370 ct 646 -359 639 -346 639 -331 ct +639 -321 642 -312 648 -305 ct 654 -297 664 -290 677 -285 ct 684 -282 706 -276 742 -266 ct +795 -252 832 -240 853 -231 ct 873 -222 890 -209 902 -192 ct 913 -175 919 -154 919 -129 ct +919 -104 912 -80 898 -58 ct 883 -37 862 -20 835 -8 ct 808 3 777 9 742 9 ct 685 9 642 -1 612 -25 ct +582 -49 l 563 -84 l p ef +926 10 m 1101 -616 l 1161 -616 l 985 10 l p ef +1590 -71 m 1590 0 l 1189 0 l 1189 -17 1191 -35 1198 -51 ct 1208 -79 1224 -105 1247 -132 ct +1269 -158 1302 -189 1344 -224 ct 1410 -278 1455 -321 1478 -352 ct 1501 -384 1513 -413 1513 -442 ct +1513 -471 1502 -496 1481 -516 ct 1460 -537 1432 -547 1398 -547 ct 1363 -547 1334 -536 1312 -514 ct +1291 -493 1280 -463 1280 -425 ct 1203 -433 l 1208 -490 1228 -533 1262 -563 ct +1297 -593 1342 -608 1400 -608 ct 1458 -608 1504 -592 1538 -560 ct 1572 -528 1589 -488 1589 -440 ct +1589 -416 1584 -392 1574 -368 ct 1564 -345 1548 -320 1525 -294 ct 1502 -268 1463 -233 1410 -188 ct +1365 -150 1337 -125 1324 -111 ct 1311 -98 1301 -85 1293 -71 ct p ef +2097 -66 m 2108 0 l 2087 3 2068 5 2051 5 ct 2024 5 2003 1 1989 -7 ct 1974 -15 1963 -26 1957 -40 ct +1951 -54 1948 -83 1948 -128 ct 1948 -381 l 1893 -381 l 1893 -439 l 1948 -439 l +1948 -547 l 2022 -592 l 2022 -439 l 2097 -439 l 2097 -381 l 2022 -381 l +2022 -124 l 2022 -103 2023 -89 2026 -83 ct 2029 -77 2033 -72 2039 -69 ct 2045 -65 2053 -63 2064 -63 ct +2072 -63 l 2083 -64 l p ef +2145 -219 m 2145 -300 2167 -361 2212 -400 ct 2250 -432 2296 -449 2351 -449 ct +2411 -449 2460 -429 2499 -389 ct 2537 -350 2556 -295 2556 -225 ct 2556 -169 2548 -124 2531 -92 ct +2514 -60 2489 -34 2457 -16 ct 2424 0 2389 9 2351 9 ct 2289 9 2239 -9 2201 -49 ct +2164 -88 l 2145 -145 l p +2221 -219 m 2221 -163 2233 -121 2258 -93 ct 2282 -65 2313 -51 2351 -51 ct 2388 -51 2418 -65 2443 -93 ct +2467 -121 2480 -164 2480 -222 ct 2480 -276 2467 -317 2443 -345 ct 2418 -373 2387 -387 2351 -387 ct +2313 -387 2282 -373 2258 -345 ct 2233 -317 l 2221 -275 l p ef +3043 -98 m 3043 -264 l 2878 -264 l 2878 -333 l 3043 -333 l 3043 -498 l +3113 -498 l 3113 -333 l 3278 -333 l 3278 -264 l 3113 -264 l 3113 -98 l +p ef +3407 0 m 3407 -381 l 3341 -381 l 3341 -439 l 3407 -439 l 3407 -485 l +3407 -515 3410 -537 3415 -551 ct 3422 -571 3435 -586 3453 -598 ct 3471 -610 3496 -616 3529 -616 ct +3550 -616 3573 -614 3598 -609 ct 3587 -544 l 3572 -547 3557 -548 3543 -548 ct +3521 -548 3505 -543 3495 -533 ct 3486 -524 3481 -506 3481 -479 ct 3481 -439 l +3567 -439 l 3567 -381 l 3481 -381 l 3481 0 l p ef +3598 -131 m 3671 -142 l 3675 -113 3687 -90 3706 -74 ct 3725 -59 3751 -51 3785 -51 ct +3819 -51 3844 -58 3861 -72 ct 3878 -86 3886 -102 3886 -121 ct 3886 -138 3879 -151 3864 -160 ct +3854 -167 3828 -175 3788 -186 ct 3733 -199 3695 -211 3674 -221 ct 3653 -231 3637 -245 3626 -263 ct +3615 -281 3610 -301 3610 -322 ct 3610 -342 3614 -360 3623 -376 ct 3632 -393 3645 -407 3660 -418 ct +3672 -427 3687 -434 3707 -440 ct 3727 -446 3749 -449 3772 -449 ct 3806 -449 3836 -444 3862 -434 ct +3889 -424 3908 -410 3920 -393 ct 3933 -376 3941 -354 3946 -325 ct 3873 -315 l +3870 -338 3860 -356 3844 -368 ct 3828 -381 3806 -387 3777 -387 ct 3743 -387 3718 -382 3704 -370 ct +3689 -359 3682 -346 3682 -331 ct 3682 -321 3685 -312 3691 -305 ct 3697 -297 3707 -290 3720 -285 ct +3727 -282 3749 -276 3785 -266 ct 3838 -252 3875 -240 3896 -231 ct 3916 -222 3933 -209 3945 -192 ct +3956 -175 3962 -154 3962 -129 ct 3962 -104 3955 -80 3941 -58 ct 3926 -37 3905 -20 3878 -8 ct +3851 3 3820 9 3785 9 ct 3728 9 3685 -1 3655 -25 ct 3625 -49 l 3606 -84 l p ef +3969 10 m 4144 -616 l 4204 -616 l 4028 10 l p ef +4633 -71 m 4633 0 l 4232 0 l 4232 -17 4234 -35 4241 -51 ct 4251 -79 4267 -105 4290 -132 ct +4312 -158 4345 -189 4387 -224 ct 4453 -278 4498 -321 4521 -352 ct 4544 -384 4556 -413 4556 -442 ct +4556 -471 4545 -496 4524 -516 ct 4503 -537 4475 -547 4441 -547 ct 4406 -547 4377 -536 4355 -514 ct +4334 -493 4323 -463 4323 -425 ct 4246 -433 l 4251 -490 4271 -533 4305 -563 ct +4340 -593 4385 -608 4443 -608 ct 4501 -608 4547 -592 4581 -560 ct 4615 -528 4632 -488 4632 -440 ct +4632 -416 4627 -392 4617 -368 ct 4607 -345 4591 -320 4568 -294 ct 4545 -268 4506 -233 4453 -188 ct +4408 -150 4380 -125 4367 -111 ct 4354 -98 4344 -85 4336 -71 ct p ef +pom +gr +10161 16546 m 10011 16996 l 10311 16995 l 10161 16546 l p ef +10161 18381 m 10161 16906 l ps +gs +pum +2805 3466 t +38 -194 m 113 -201 l 117 -171 125 -146 138 -126 ct 151 -107 172 -91 199 -79 ct +227 -67 258 -61 292 -61 ct 323 -61 350 -66 373 -75 ct 397 -84 414 -96 426 -112 ct +437 -128 443 -145 443 -164 ct 443 -183 437 -200 426 -214 ct 415 -228 397 -240 372 -250 ct +355 -256 319 -266 264 -279 ct 208 -293 169 -305 147 -317 ct 118 -332 96 -351 82 -374 ct +68 -396 61 -421 61 -449 ct 61 -480 69 -508 87 -535 ct 104 -561 130 -582 163 -595 ct +196 -609 233 -616 274 -616 ct 319 -616 359 -609 393 -594 ct 427 -580 454 -559 472 -531 ct +491 -502 501 -471 502 -435 ct 425 -429 l 421 -468 407 -496 383 -516 ct 359 -536 324 -545 277 -545 ct +229 -545 194 -537 171 -519 ct 149 -501 138 -480 138 -454 ct 138 -433 146 -415 162 -401 ct +177 -387 217 -372 283 -357 ct 348 -343 393 -330 417 -319 ct 452 -303 478 -282 495 -257 ct +512 -232 520 -203 520 -171 ct 520 -138 511 -108 492 -80 ct 474 -51 447 -29 413 -13 ct +378 2 339 10 296 10 ct 241 10 195 2 158 -13 ct 121 -29 92 -53 71 -85 ct 50 -117 l +39 -154 l p ef +924 -54 m 896 -30 870 -14 844 -4 ct 819 5 791 9 762 9 ct 714 9 677 -1 651 -25 ct +625 -49 612 -79 612 -115 ct 612 -137 617 -156 627 -174 ct 637 -192 649 -206 665 -217 ct +681 -228 699 -236 719 -241 ct 733 -245 755 -249 785 -253 ct 845 -260 889 -268 918 -278 ct +918 -288 918 -295 918 -298 ct 918 -328 911 -349 897 -362 ct 878 -379 850 -387 812 -387 ct +777 -387 751 -381 735 -369 ct 718 -356 706 -335 698 -303 ct 625 -313 l 632 -345 642 -370 658 -389 ct +673 -408 695 -423 723 -433 ct 752 -443 785 -449 823 -449 ct 861 -449 891 -444 914 -435 ct +938 -427 955 -415 966 -402 ct 977 -389 985 -372 989 -351 ct 992 -339 993 -316 993 -283 ct +993 -184 l 993 -114 995 -71 998 -52 ct 1001 -34 1007 -16 1017 0 ct 939 0 l +931 -15 l 926 -33 l p +918 -220 m 891 -209 850 -200 796 -192 ct 766 -187 744 -182 731 -177 ct 719 -171 709 -163 702 -153 ct +695 -142 692 -130 692 -117 ct 692 -98 699 -81 714 -68 ct 729 -55 751 -48 780 -48 ct +809 -48 834 -54 857 -67 ct 879 -79 895 -96 906 -118 ct 914 -135 918 -160 918 -193 ct +p ef +1087 0 m 1087 -439 l 1154 -439 l 1154 -377 l 1168 -399 1186 -416 1209 -429 ct +1232 -442 1258 -449 1287 -449 ct 1320 -449 1346 -442 1367 -428 ct 1388 -415 1403 -396 1411 -372 ct +1446 -423 1491 -449 1547 -449 ct 1590 -449 1624 -437 1647 -412 ct 1671 -388 1682 -351 1682 -301 ct +1682 0 l 1608 0 l 1608 -276 l 1608 -306 1606 -327 1601 -340 ct 1596 -354 1588 -364 1575 -372 ct +1562 -380 1547 -384 1530 -384 ct 1499 -384 1474 -374 1453 -353 ct 1433 -333 1423 -300 1423 -255 ct +1423 0 l 1348 0 l 1348 -285 l 1348 -318 1342 -343 1330 -359 ct 1318 -376 1298 -384 1271 -384 ct +1250 -384 1230 -379 1212 -368 ct 1195 -357 1182 -340 1174 -319 ct 1166 -298 1162 -267 1162 -227 ct +1162 0 l p ef +1801 168 m 1801 -439 l 1869 -439 l 1869 -382 l 1885 -404 1903 -421 1923 -432 ct +1943 -443 1968 -449 1997 -449 ct 2034 -449 2067 -439 2096 -420 ct 2124 -400 2146 -373 2161 -338 ct +2175 -303 2183 -264 2183 -222 ct 2183 -177 2175 -137 2158 -101 ct 2142 -65 2119 -37 2088 -18 ct +2057 0 2025 9 1991 9 ct 1966 9 1944 4 1924 -5 ct 1905 -16 1888 -29 1876 -45 ct +1876 168 l p +1869 -217 m 1869 -160 1880 -118 1903 -91 ct 1926 -64 1954 -51 1986 -51 ct 2019 -51 2048 -65 2071 -93 ct +2095 -121 2107 -164 2107 -223 ct 2107 -279 2095 -321 2072 -349 ct 2049 -376 2022 -390 1990 -390 ct +1958 -390 1930 -376 1905 -346 ct 1881 -316 l 1869 -273 l p ef +2250 0 m 2250 -606 l 2324 -606 l 2324 0 l p ef +2437 -520 m 2437 -606 l 2511 -606 l 2511 -520 l p +2437 0 m 2437 -439 l 2511 -439 l 2511 0 l p ef +2621 0 m 2621 -439 l 2688 -439 l 2688 -376 l 2721 -425 2767 -449 2828 -449 ct +2855 -449 2879 -444 2901 -434 ct 2923 -425 2940 -412 2951 -397 ct 2962 -382 2970 -363 2974 -342 ct +2977 -328 2978 -304 2978 -270 ct 2978 0 l 2904 0 l 2904 -267 l 2904 -297 2901 -320 2895 -335 ct +2889 -350 2879 -362 2864 -371 ct 2850 -380 2832 -384 2812 -384 ct 2781 -384 2753 -374 2730 -354 ct +2707 -334 2696 -296 2696 -239 ct 2696 0 l p ef +3085 36 m 3157 47 l 3160 69 3169 85 3182 95 ct 3201 109 3226 116 3258 116 ct +3292 116 3319 109 3338 95 ct 3357 82 3369 62 3376 38 ct 3380 22 3381 -8 3381 -57 ct +3349 -19 3308 0 3260 0 ct 3199 0 3153 -21 3119 -65 ct 3086 -108 3070 -161 3070 -222 ct +3070 -264 3077 -302 3093 -338 ct 3108 -373 3130 -400 3159 -420 ct 3187 -439 3221 -449 3260 -449 ct +3312 -449 3355 -428 3388 -386 ct 3388 -439 l 3457 -439 l 3457 -59 l 3457 8 3450 57 3436 85 ct +3422 114 3400 136 3370 153 ct 3340 169 3303 178 3258 178 ct 3206 178 3164 166 3131 142 ct +3099 119 l 3084 83 l p +3146 -227 m 3146 -169 3158 -127 3181 -101 ct 3204 -74 3232 -61 3267 -61 ct +3301 -61 3330 -74 3353 -101 ct 3376 -127 3387 -168 3387 -224 ct 3387 -278 3376 -319 3352 -346 ct +3328 -373 3299 -387 3265 -387 ct 3232 -387 3204 -374 3181 -347 ct 3158 -320 l +3146 -280 l p ef +3812 0 m 3812 -439 l 3879 -439 l 3879 -372 l 3896 -403 3911 -424 3926 -434 ct +3940 -444 3956 -449 3974 -449 ct 3999 -449 4024 -441 4050 -425 ct 4025 -356 l +4006 -366 3988 -372 3970 -372 ct 3954 -372 3939 -367 3926 -357 ct 3913 -347 3904 -334 3898 -316 ct +3890 -290 3886 -261 3886 -229 ct 3886 0 l p ef +4390 -54 m 4362 -30 4336 -14 4310 -4 ct 4285 5 4257 9 4228 9 ct 4180 9 4143 -1 4117 -25 ct +4091 -49 4078 -79 4078 -115 ct 4078 -137 4083 -156 4093 -174 ct 4103 -192 4115 -206 4131 -217 ct +4147 -228 4165 -236 4185 -241 ct 4199 -245 4221 -249 4251 -253 ct 4311 -260 4355 -268 4384 -278 ct +4384 -288 4384 -295 4384 -298 ct 4384 -328 4377 -349 4363 -362 ct 4344 -379 4316 -387 4278 -387 ct +4243 -387 4217 -381 4201 -369 ct 4184 -356 4172 -335 4164 -303 ct 4091 -313 l +4098 -345 4108 -370 4124 -389 ct 4139 -408 4161 -423 4189 -433 ct 4218 -443 4251 -449 4289 -449 ct +4327 -449 4357 -444 4380 -435 ct 4404 -427 4421 -415 4432 -402 ct 4443 -389 4451 -372 4455 -351 ct +4458 -339 4459 -316 4459 -283 ct 4459 -184 l 4459 -114 4461 -71 4464 -52 ct +4467 -34 4473 -16 4483 0 ct 4405 0 l 4397 -15 l 4392 -33 l p +4384 -220 m 4357 -209 4316 -200 4262 -192 ct 4232 -187 4210 -182 4197 -177 ct +4185 -171 4175 -163 4168 -153 ct 4161 -142 4158 -130 4158 -117 ct 4158 -98 4165 -81 4180 -68 ct +4195 -55 4217 -48 4246 -48 ct 4275 -48 4300 -54 4323 -67 ct 4345 -79 4361 -96 4372 -118 ct +4380 -135 4384 -160 4384 -193 ct p ef +4716 -66 m 4727 0 l 4706 3 4687 5 4670 5 ct 4643 5 4622 1 4608 -7 ct 4593 -15 4582 -26 4576 -40 ct +4570 -54 4567 -83 4567 -128 ct 4567 -381 l 4512 -381 l 4512 -439 l 4567 -439 l +4567 -547 l 4641 -592 l 4641 -439 l 4716 -439 l 4716 -381 l 4641 -381 l +4641 -124 l 4641 -103 4642 -89 4645 -83 ct 4648 -77 4652 -72 4658 -69 ct 4664 -65 4672 -63 4683 -63 ct +4691 -63 l 4702 -64 l p ef +5092 -141 m 5169 -131 l 5157 -86 5134 -52 5102 -27 ct 5069 -2 5027 9 4976 9 ct +4912 9 4861 -9 4823 -49 ct 4785 -88 4767 -144 4767 -215 ct 4767 -289 4786 -347 4824 -387 ct +4862 -428 4911 -449 4972 -449 ct 5030 -449 5078 -429 5116 -389 ct 5153 -349 5171 -292 5171 -220 ct +5171 -216 5171 -209 5171 -200 ct 4843 -200 l 4846 -152 4860 -115 4884 -89 ct +4909 -64 4940 -51 4976 -51 ct 5004 -51 5027 -58 5046 -72 ct 5065 -87 l 5081 -110 l +p +4848 -261 m 5093 -261 l 5090 -298 5080 -326 5065 -344 ct 5041 -373 5010 -387 4972 -387 ct +4938 -387 4910 -376 4886 -353 ct 4863 -330 l 4850 -300 l p ef +5897 -356 m 5497 -356 l 5497 -425 l 5897 -425 l p +5897 -172 m 5497 -172 l 5497 -241 l 5897 -241 l p ef +6264 0 m 6264 -381 l 6198 -381 l 6198 -439 l 6264 -439 l 6264 -485 l +6264 -515 6267 -537 6272 -551 ct 6279 -571 6292 -586 6310 -598 ct 6328 -610 6353 -616 6386 -616 ct +6407 -616 6430 -614 6455 -609 ct 6444 -544 l 6429 -547 6414 -548 6400 -548 ct +6378 -548 6362 -543 6352 -533 ct 6343 -524 6338 -506 6338 -479 ct 6338 -439 l +6424 -439 l 6424 -381 l 6338 -381 l 6338 0 l p ef +6455 -131 m 6528 -142 l 6532 -113 6544 -90 6563 -74 ct 6582 -59 6608 -51 6642 -51 ct +6676 -51 6701 -58 6718 -72 ct 6735 -86 6743 -102 6743 -121 ct 6743 -138 6736 -151 6721 -160 ct +6711 -167 6685 -175 6645 -186 ct 6590 -199 6552 -211 6531 -221 ct 6510 -231 6494 -245 6483 -263 ct +6472 -281 6467 -301 6467 -322 ct 6467 -342 6471 -360 6480 -376 ct 6489 -393 6502 -407 6517 -418 ct +6529 -427 6544 -434 6564 -440 ct 6584 -446 6606 -449 6629 -449 ct 6663 -449 6693 -444 6719 -434 ct +6746 -424 6765 -410 6777 -393 ct 6790 -376 6798 -354 6803 -325 ct 6730 -315 l +6727 -338 6717 -356 6701 -368 ct 6685 -381 6663 -387 6634 -387 ct 6600 -387 6575 -382 6561 -370 ct +6546 -359 6539 -346 6539 -331 ct 6539 -321 6542 -312 6548 -305 ct 6554 -297 6564 -290 6577 -285 ct +6584 -282 6606 -276 6642 -266 ct 6695 -252 6732 -240 6753 -231 ct 6773 -222 6790 -209 6802 -192 ct +6813 -175 6819 -154 6819 -129 ct 6819 -104 6812 -80 6798 -58 ct 6783 -37 6762 -20 6735 -8 ct +6708 3 6677 9 6642 9 ct 6585 9 6542 -1 6512 -25 ct 6482 -49 l 6463 -84 l p ef +pom +gr +gs +pum +15981 14102 t +62 0 m 62 -606 l 289 -606 l 335 -606 372 -600 400 -587 ct 428 -575 450 -556 466 -531 ct +482 -505 490 -479 490 -451 ct 490 -425 483 -400 469 -378 ct 455 -355 434 -336 405 -322 ct +442 -311 470 -293 490 -267 ct 510 -241 519 -211 519 -175 ct 519 -147 513 -120 501 -96 ct +489 -72 475 -53 457 -40 ct 439 -26 417 -16 391 -10 ct 364 -3 331 0 293 0 ct p +142 -351 m 273 -351 l 308 -351 334 -353 349 -358 ct 370 -364 385 -374 395 -388 ct +406 -402 411 -420 411 -441 ct 411 -461 406 -479 397 -494 ct 387 -510 373 -520 355 -526 ct +337 -531 307 -534 263 -534 ct 142 -534 l p +142 -71 m 293 -71 l 319 -71 337 -72 347 -74 ct 366 -77 381 -83 394 -90 ct +406 -98 416 -109 424 -124 ct 432 -139 436 -156 436 -175 ct 436 -198 430 -218 419 -234 ct +407 -251 391 -263 371 -269 ct 350 -276 321 -279 282 -279 ct 142 -279 l p ef +898 -54 m 870 -30 844 -14 818 -4 ct 793 5 765 9 736 9 ct 688 9 651 -1 625 -25 ct +599 -49 586 -79 586 -115 ct 586 -137 591 -156 601 -174 ct 611 -192 623 -206 639 -217 ct +655 -228 673 -236 693 -241 ct 707 -245 729 -249 759 -253 ct 819 -260 863 -268 892 -278 ct +892 -288 892 -295 892 -298 ct 892 -328 885 -349 871 -362 ct 852 -379 824 -387 786 -387 ct +751 -387 725 -381 709 -369 ct 692 -356 680 -335 672 -303 ct 599 -313 l 606 -345 616 -370 632 -389 ct +647 -408 669 -423 697 -433 ct 726 -443 759 -449 797 -449 ct 835 -449 865 -444 888 -435 ct +912 -427 929 -415 940 -402 ct 951 -389 959 -372 963 -351 ct 966 -339 967 -316 967 -283 ct +967 -184 l 967 -114 969 -71 972 -52 ct 975 -34 981 -16 991 0 ct 913 0 l 905 -15 l +900 -33 l p +892 -220 m 865 -209 824 -200 770 -192 ct 740 -187 718 -182 705 -177 ct 693 -171 683 -163 676 -153 ct +669 -142 666 -130 666 -117 ct 666 -98 673 -81 688 -68 ct 703 -55 725 -48 754 -48 ct +783 -48 808 -54 831 -67 ct 853 -79 869 -96 880 -118 ct 888 -135 892 -160 892 -193 ct +p ef +1060 0 m 1060 -439 l 1127 -439 l 1127 -376 l 1160 -425 1206 -449 1267 -449 ct +1294 -449 1318 -444 1340 -434 ct 1362 -425 1379 -412 1390 -397 ct 1401 -382 1409 -363 1413 -342 ct +1416 -328 1417 -304 1417 -270 ct 1417 0 l 1343 0 l 1343 -267 l 1343 -297 1340 -320 1334 -335 ct +1328 -350 1318 -362 1303 -371 ct 1289 -380 1271 -384 1251 -384 ct 1220 -384 1192 -374 1169 -354 ct +1146 -334 1135 -296 1135 -239 ct 1135 0 l p ef +1822 0 m 1822 -55 l 1794 -11 1754 9 1699 9 ct 1664 9 1632 0 1603 -19 ct 1574 -38 1551 -65 1535 -99 ct +1519 -134 1510 -174 1510 -219 ct 1510 -263 1518 -302 1532 -338 ct 1547 -374 1569 -401 1598 -420 ct +1627 -439 1660 -449 1696 -449 ct 1723 -449 1746 -443 1767 -432 ct 1788 -421 1804 -406 1817 -388 ct +1817 -606 l 1891 -606 l 1891 0 l p +1587 -219 m 1587 -162 1599 -120 1623 -93 ct 1646 -65 1674 -51 1706 -51 ct 1739 -51 1767 -64 1789 -91 ct +1812 -117 1824 -158 1824 -212 ct 1824 -273 1812 -317 1789 -345 ct 1766 -373 1737 -387 1703 -387 ct +1670 -387 1642 -374 1620 -346 ct 1598 -319 l 1587 -277 l p ef +2094 0 m 1960 -439 l 2037 -439 l 2107 -185 l 2133 -91 l 2134 -96 2142 -126 2156 -181 ct +2226 -439 l 2302 -439 l 2368 -184 l 2390 -100 l 2415 -185 l 2490 -439 l +2563 -439 l 2425 0 l 2348 0 l 2278 -263 l 2261 -337 l 2172 0 l p ef +2596 -520 m 2596 -606 l 2670 -606 l 2670 -520 l p +2596 0 m 2596 -439 l 2670 -439 l 2670 0 l p ef +3065 0 m 3065 -55 l 3037 -11 2997 9 2942 9 ct 2907 9 2875 0 2846 -19 ct 2817 -38 2794 -65 2778 -99 ct +2762 -134 2753 -174 2753 -219 ct 2753 -263 2761 -302 2775 -338 ct 2790 -374 2812 -401 2841 -420 ct +2870 -439 2903 -449 2939 -449 ct 2966 -449 2989 -443 3010 -432 ct 3031 -421 3047 -406 3060 -388 ct +3060 -606 l 3134 -606 l 3134 0 l p +2830 -219 m 2830 -162 2842 -120 2866 -93 ct 2889 -65 2917 -51 2949 -51 ct 2982 -51 3010 -64 3032 -91 ct +3055 -117 3067 -158 3067 -212 ct 3067 -273 3055 -317 3032 -345 ct 3009 -373 2980 -387 2946 -387 ct +2913 -387 2885 -374 2863 -346 ct 2841 -319 l 2830 -277 l p ef +3419 -66 m 3430 0 l 3409 3 3390 5 3373 5 ct 3346 5 3325 1 3311 -7 ct 3296 -15 3285 -26 3279 -40 ct +3273 -54 3270 -83 3270 -128 ct 3270 -381 l 3215 -381 l 3215 -439 l 3270 -439 l +3270 -547 l 3344 -592 l 3344 -439 l 3419 -439 l 3419 -381 l 3344 -381 l +3344 -124 l 3344 -103 3345 -89 3348 -83 ct 3351 -77 3355 -72 3361 -69 ct 3367 -65 3375 -63 3386 -63 ct +3394 -63 l 3405 -64 l p ef +3495 0 m 3495 -606 l 3570 -606 l 3570 -388 l 3605 -429 3648 -449 3701 -449 ct +3734 -449 3762 -442 3786 -429 ct 3810 -417 3827 -399 3838 -376 ct 3848 -354 3853 -321 3853 -278 ct +3853 0 l 3779 0 l 3779 -278 l 3779 -315 3771 -342 3754 -359 ct 3738 -376 3716 -385 3686 -385 ct +3664 -385 3643 -379 3624 -367 ct 3604 -356 3590 -340 3582 -321 ct 3574 -301 3570 -274 3570 -240 ct +3570 0 l p ef +pom +pum +15888 15055 t +340 0 m 340 -55 l 312 -11 272 9 217 9 ct 182 9 150 0 121 -19 ct 92 -38 69 -65 53 -99 ct +37 -134 28 -174 28 -219 ct 28 -263 36 -302 50 -338 ct 65 -374 87 -401 116 -420 ct +145 -439 178 -449 214 -449 ct 241 -449 264 -443 285 -432 ct 306 -421 322 -406 335 -388 ct +335 -606 l 409 -606 l 409 0 l p +105 -219 m 105 -162 117 -120 141 -93 ct 164 -65 192 -51 224 -51 ct 257 -51 285 -64 307 -91 ct +330 -117 342 -158 342 -212 ct 342 -273 330 -317 307 -345 ct 284 -373 255 -387 221 -387 ct +188 -387 160 -374 138 -346 ct 116 -319 l 105 -277 l p ef +832 -141 m 909 -131 l 897 -86 874 -52 842 -27 ct 809 -2 767 9 716 9 ct 652 9 601 -9 563 -49 ct +525 -88 507 -144 507 -215 ct 507 -289 526 -347 564 -387 ct 602 -428 651 -449 712 -449 ct +770 -449 818 -429 856 -389 ct 893 -349 911 -292 911 -220 ct 911 -216 911 -209 911 -200 ct +583 -200 l 586 -152 600 -115 624 -89 ct 649 -64 680 -51 716 -51 ct 744 -51 767 -58 786 -72 ct +805 -87 l 821 -110 l p +588 -261 m 833 -261 l 830 -298 820 -326 805 -344 ct 781 -373 750 -387 712 -387 ct +678 -387 650 -376 626 -353 ct 603 -330 l 590 -300 l p ef +1295 -160 m 1368 -151 l 1360 -100 1340 -61 1307 -32 ct 1274 -4 1233 9 1185 9 ct +1125 9 1077 -9 1040 -49 ct 1004 -88 986 -144 986 -217 ct 986 -265 993 -306 1009 -342 ct +1025 -378 1049 -404 1081 -422 ct 1113 -440 1148 -449 1186 -449 ct 1233 -449 1272 -437 1303 -412 ct +1333 -388 1353 -354 1361 -310 ct 1289 -299 l 1282 -328 1270 -350 1252 -365 ct +1235 -380 1213 -387 1189 -387 ct 1151 -387 1121 -374 1097 -347 ct 1074 -320 1062 -278 1062 -220 ct +1062 -161 1073 -118 1096 -91 ct 1119 -64 1148 -51 1185 -51 ct 1214 -51 1238 -60 1258 -78 ct +1277 -96 l 1290 -123 l p ef +1432 -520 m 1432 -606 l 1506 -606 l 1506 -520 l p +1432 0 m 1432 -439 l 1506 -439 l 1506 0 l p ef +1616 0 m 1616 -439 l 1683 -439 l 1683 -377 l 1697 -399 1715 -416 1738 -429 ct +1761 -442 1787 -449 1816 -449 ct 1849 -449 1875 -442 1896 -428 ct 1917 -415 1932 -396 1940 -372 ct +1975 -423 2020 -449 2076 -449 ct 2119 -449 2153 -437 2176 -412 ct 2200 -388 2211 -351 2211 -301 ct +2211 0 l 2137 0 l 2137 -276 l 2137 -306 2135 -327 2130 -340 ct 2125 -354 2117 -364 2104 -372 ct +2091 -380 2076 -384 2059 -384 ct 2028 -384 2003 -374 1982 -353 ct 1962 -333 1952 -300 1952 -255 ct +1952 0 l 1877 0 l 1877 -285 l 1877 -318 1871 -343 1859 -359 ct 1847 -376 1827 -384 1800 -384 ct +1779 -384 1759 -379 1741 -368 ct 1724 -357 1711 -340 1703 -319 ct 1695 -298 1691 -267 1691 -227 ct +1691 0 l p ef +2617 -54 m 2589 -30 2563 -14 2537 -4 ct 2512 5 2484 9 2455 9 ct 2407 9 2370 -1 2344 -25 ct +2318 -49 2305 -79 2305 -115 ct 2305 -137 2310 -156 2320 -174 ct 2330 -192 2342 -206 2358 -217 ct +2374 -228 2392 -236 2412 -241 ct 2426 -245 2448 -249 2478 -253 ct 2538 -260 2582 -268 2611 -278 ct +2611 -288 2611 -295 2611 -298 ct 2611 -328 2604 -349 2590 -362 ct 2571 -379 2543 -387 2505 -387 ct +2470 -387 2444 -381 2428 -369 ct 2411 -356 2399 -335 2391 -303 ct 2318 -313 l +2325 -345 2335 -370 2351 -389 ct 2366 -408 2388 -423 2416 -433 ct 2445 -443 2478 -449 2516 -449 ct +2554 -449 2584 -444 2607 -435 ct 2631 -427 2648 -415 2659 -402 ct 2670 -389 2678 -372 2682 -351 ct +2685 -339 2686 -316 2686 -283 ct 2686 -184 l 2686 -114 2688 -71 2691 -52 ct +2694 -34 2700 -16 2710 0 ct 2632 0 l 2624 -15 l 2619 -33 l p +2611 -220 m 2584 -209 2543 -200 2489 -192 ct 2459 -187 2437 -182 2424 -177 ct +2412 -171 2402 -163 2395 -153 ct 2388 -142 2385 -130 2385 -117 ct 2385 -98 2392 -81 2407 -68 ct +2422 -55 2444 -48 2473 -48 ct 2502 -48 2527 -54 2550 -67 ct 2572 -79 2588 -96 2599 -118 ct +2607 -135 2611 -160 2611 -193 ct p ef +2943 -66 m 2954 0 l 2933 3 2914 5 2897 5 ct 2870 5 2849 1 2835 -7 ct 2820 -15 2809 -26 2803 -40 ct +2797 -54 2794 -83 2794 -128 ct 2794 -381 l 2739 -381 l 2739 -439 l 2794 -439 l +2794 -547 l 2868 -592 l 2868 -439 l 2943 -439 l 2943 -381 l 2868 -381 l +2868 -124 l 2868 -103 2869 -89 2872 -83 ct 2875 -77 2879 -72 2885 -69 ct 2891 -65 2899 -63 2910 -63 ct +2918 -63 l 2929 -64 l p ef +3019 -520 m 3019 -606 l 3093 -606 l 3093 -520 l p +3019 0 m 3019 -439 l 3093 -439 l 3093 0 l p ef +3177 -219 m 3177 -300 3199 -361 3244 -400 ct 3282 -432 3328 -449 3383 -449 ct +3443 -449 3492 -429 3531 -389 ct 3569 -350 3588 -295 3588 -225 ct 3588 -169 3580 -124 3563 -92 ct +3546 -60 3521 -34 3489 -16 ct 3456 0 3421 9 3383 9 ct 3321 9 3271 -9 3233 -49 ct +3196 -88 l 3177 -145 l p +3253 -219 m 3253 -163 3265 -121 3290 -93 ct 3314 -65 3345 -51 3383 -51 ct 3420 -51 3450 -65 3475 -93 ct +3499 -121 3512 -164 3512 -222 ct 3512 -276 3499 -317 3475 -345 ct 3450 -373 3419 -387 3383 -387 ct +3345 -387 3314 -373 3290 -345 ct 3265 -317 l 3253 -275 l p ef +3680 0 m 3680 -439 l 3747 -439 l 3747 -376 l 3780 -425 3826 -449 3887 -449 ct +3914 -449 3938 -444 3960 -434 ct 3982 -425 3999 -412 4010 -397 ct 4021 -382 4029 -363 4033 -342 ct +4036 -328 4037 -304 4037 -270 ct 4037 0 l 3963 0 l 3963 -267 l 3963 -297 3960 -320 3954 -335 ct +3948 -350 3938 -362 3923 -371 ct 3909 -380 3891 -384 3871 -384 ct 3840 -384 3812 -374 3789 -354 ct +3766 -334 3755 -296 3755 -239 ct 3755 0 l p ef +pom +pum +16087 16008 t +73 0 m 73 -381 l 7 -381 l 7 -439 l 73 -439 l 73 -485 l 73 -515 76 -537 81 -551 ct +88 -571 101 -586 119 -598 ct 137 -610 162 -616 195 -616 ct 216 -616 239 -614 264 -609 ct +253 -544 l 238 -547 223 -548 209 -548 ct 187 -548 171 -543 161 -533 ct 152 -524 147 -506 147 -479 ct +147 -439 l 233 -439 l 233 -381 l 147 -381 l 147 0 l p ef +580 -54 m 552 -30 526 -14 500 -4 ct 475 5 447 9 418 9 ct 370 9 333 -1 307 -25 ct +281 -49 268 -79 268 -115 ct 268 -137 273 -156 283 -174 ct 293 -192 305 -206 321 -217 ct +337 -228 355 -236 375 -241 ct 389 -245 411 -249 441 -253 ct 501 -260 545 -268 574 -278 ct +574 -288 574 -295 574 -298 ct 574 -328 567 -349 553 -362 ct 534 -379 506 -387 468 -387 ct +433 -387 407 -381 391 -369 ct 374 -356 362 -335 354 -303 ct 281 -313 l 288 -345 298 -370 314 -389 ct +329 -408 351 -423 379 -433 ct 408 -443 441 -449 479 -449 ct 517 -449 547 -444 570 -435 ct +594 -427 611 -415 622 -402 ct 633 -389 641 -372 645 -351 ct 648 -339 649 -316 649 -283 ct +649 -184 l 649 -114 651 -71 654 -52 ct 657 -34 663 -16 673 0 ct 595 0 l 587 -15 l +582 -33 l p +574 -220 m 547 -209 506 -200 452 -192 ct 422 -187 400 -182 387 -177 ct 375 -171 365 -163 358 -153 ct +351 -142 348 -130 348 -117 ct 348 -98 355 -81 370 -68 ct 385 -55 407 -48 436 -48 ct +465 -48 490 -54 513 -67 ct 535 -79 551 -96 562 -118 ct 570 -135 574 -160 574 -193 ct +p ef +1030 -160 m 1103 -151 l 1095 -100 1075 -61 1042 -32 ct 1009 -4 968 9 920 9 ct +860 9 812 -9 775 -49 ct 739 -88 721 -144 721 -217 ct 721 -265 728 -306 744 -342 ct +760 -378 784 -404 816 -422 ct 848 -440 883 -449 921 -449 ct 968 -449 1007 -437 1038 -412 ct +1068 -388 1088 -354 1096 -310 ct 1024 -299 l 1017 -328 1005 -350 987 -365 ct +970 -380 948 -387 924 -387 ct 886 -387 856 -374 832 -347 ct 809 -320 797 -278 797 -220 ct +797 -161 808 -118 831 -91 ct 854 -64 883 -51 920 -51 ct 949 -51 973 -60 993 -78 ct +1012 -96 l 1025 -123 l p ef +1329 -66 m 1340 0 l 1319 3 1300 5 1283 5 ct 1256 5 1235 1 1221 -7 ct 1206 -15 1195 -26 1189 -40 ct +1183 -54 1180 -83 1180 -128 ct 1180 -381 l 1125 -381 l 1125 -439 l 1180 -439 l +1180 -547 l 1254 -592 l 1254 -439 l 1329 -439 l 1329 -381 l 1254 -381 l +1254 -124 l 1254 -103 1255 -89 1258 -83 ct 1261 -77 1265 -72 1271 -69 ct 1277 -65 1285 -63 1296 -63 ct +1304 -63 l 1315 -64 l p ef +1377 -219 m 1377 -300 1399 -361 1444 -400 ct 1482 -432 1528 -449 1583 -449 ct +1643 -449 1692 -429 1731 -389 ct 1769 -350 1788 -295 1788 -225 ct 1788 -169 1780 -124 1763 -92 ct +1746 -60 1721 -34 1689 -16 ct 1656 0 1621 9 1583 9 ct 1521 9 1471 -9 1433 -49 ct +1396 -88 l 1377 -145 l p +1453 -219 m 1453 -163 1465 -121 1490 -93 ct 1514 -65 1545 -51 1583 -51 ct 1620 -51 1650 -65 1675 -93 ct +1699 -121 1712 -164 1712 -222 ct 1712 -276 1699 -317 1675 -345 ct 1650 -373 1619 -387 1583 -387 ct +1545 -387 1514 -373 1490 -345 ct 1465 -317 l 1453 -275 l p ef +1881 0 m 1881 -439 l 1948 -439 l 1948 -372 l 1965 -403 1980 -424 1995 -434 ct +2009 -444 2025 -449 2043 -449 ct 2068 -449 2093 -441 2119 -425 ct 2094 -356 l +2075 -366 2057 -372 2039 -372 ct 2023 -372 2008 -367 1995 -357 ct 1982 -347 1973 -334 1967 -316 ct +1959 -290 1955 -261 1955 -229 ct 1955 0 l p ef +2802 -356 m 2402 -356 l 2402 -425 l 2802 -425 l p +2802 -172 m 2402 -172 l 2402 -241 l 2802 -241 l p ef +3160 0 m 3160 -606 l 3242 -606 l 3561 -130 l 3561 -606 l 3638 -606 l +3638 0 l 3555 0 l 3237 -476 l 3237 0 l p ef +pom +gr +17781 10461 m 17631 10911 l 17931 10910 l 17781 10461 l p ef +17781 13336 m 17781 10821 l ps +gs +pum +17357 3466 t +73 0 m 73 -381 l 7 -381 l 7 -439 l 73 -439 l 73 -485 l 73 -515 76 -537 81 -551 ct +88 -571 101 -586 119 -598 ct 137 -610 162 -616 195 -616 ct 216 -616 239 -614 264 -609 ct +253 -544 l 238 -547 223 -548 209 -548 ct 187 -548 171 -543 161 -533 ct 152 -524 147 -506 147 -479 ct +147 -439 l 233 -439 l 233 -381 l 147 -381 l 147 0 l p ef +264 -131 m 337 -142 l 341 -113 353 -90 372 -74 ct 391 -59 417 -51 451 -51 ct +485 -51 510 -58 527 -72 ct 544 -86 552 -102 552 -121 ct 552 -138 545 -151 530 -160 ct +520 -167 494 -175 454 -186 ct 399 -199 361 -211 340 -221 ct 319 -231 303 -245 292 -263 ct +281 -281 276 -301 276 -322 ct 276 -342 280 -360 289 -376 ct 298 -393 311 -407 326 -418 ct +338 -427 353 -434 373 -440 ct 393 -446 415 -449 438 -449 ct 472 -449 502 -444 528 -434 ct +555 -424 574 -410 586 -393 ct 599 -376 607 -354 612 -325 ct 539 -315 l 536 -338 526 -356 510 -368 ct +494 -381 472 -387 443 -387 ct 409 -387 384 -382 370 -370 ct 355 -359 348 -346 348 -331 ct +348 -321 351 -312 357 -305 ct 363 -297 373 -290 386 -285 ct 393 -282 415 -276 451 -266 ct +504 -252 541 -240 562 -231 ct 582 -222 599 -209 611 -192 ct 622 -175 628 -154 628 -129 ct +628 -104 621 -80 607 -58 ct 592 -37 571 -20 544 -8 ct 517 3 486 9 451 9 ct 394 9 351 -1 321 -25 ct +291 -49 l 272 -84 l p ef +635 10 m 810 -616 l 870 -616 l 694 10 l p ef +937 0 m 937 -606 l 1019 -606 l 1338 -130 l 1338 -606 l 1415 -606 l +1415 0 l 1332 0 l 1014 -476 l 1014 0 l p ef +pom +gr +22227 6350 m 22199 5876 l 21920 5987 l 22227 6350 l p ef +19422 3175 m 19475 3175 l ps +19528 3175 m 19581 3175 l ps +19634 3175 m 19687 3175 l ps +19740 3175 m 19793 3175 l ps +19846 3175 m 19899 3175 l ps +19952 3175 m 20006 3175 l ps +20059 3175 m 20112 3175 l ps +20165 3175 m 20218 3175 l ps +20271 3175 m 20324 3175 l ps +20377 3175 m 20430 3175 l ps +20483 3175 m 20536 3175 l ps +20590 3175 m 20643 3175 l ps +20696 3175 m 20749 3175 l ps +20802 3175 m 20855 3175 l ps +20908 3175 m 20956 3175 l ps +20956 3175 m 20958 3180 l ps +20977 3229 m 20997 3278 l ps +21017 3328 m 21037 3377 l ps +21056 3426 m 21076 3475 l ps +21096 3525 m 21115 3574 l ps +21135 3623 m 21155 3673 l ps +21175 3722 m 21194 3771 l ps +21214 3821 m 21234 3870 l ps +21254 3919 m 21273 3968 l ps +21293 4018 m 21313 4067 l ps +21332 4116 m 21352 4166 l ps +21372 4215 m 21392 4264 l ps +21411 4313 m 21431 4363 l ps +21451 4412 m 21471 4461 l ps +21490 4511 m 21510 4560 l ps +21530 4609 m 21550 4658 l ps +21569 4708 m 21589 4757 l ps +21609 4806 m 21628 4856 l ps +21648 4905 m 21668 4954 l ps +21688 5003 m 21707 5053 l ps +21727 5102 m 21747 5151 l ps +21767 5201 m 21786 5250 l ps +21806 5299 m 21826 5348 l ps +21845 5398 m 21865 5447 l ps +21885 5496 m 21905 5546 l ps +21924 5595 m 21944 5644 l ps +21964 5693 m 21984 5743 l ps +22003 5792 m 22023 5841 l ps +22043 5891 m 22063 5940 l ps +22082 5989 m 22093 6015 l ps +gr +0 20290 t +pom +count op_count sub {pop} repeat countdictstack dict_count sub {end} repeat b4_inc_state restore +%%PageTrailer +%%Trailer +%%EOF diff --git a/doc/ddc.png b/doc/ddc.png new file mode 100644 index 0000000000000000000000000000000000000000..ce35bc2a9ea89e42d75a3c46881fda8f73823a66 GIT binary patch literal 42199 zcmagGcR1E>A2%*Zx^f5!*+~+zv$H~0Rtk}wR6rkO@^g52 z`111IJfq(?N_2TP7ybVG@&3In&CTy_kF`F2Og9!58yoxDFgN+M=kjECzTsO_V^h=L zGkG=PtiL|pWR9tu{8;ws(_Q>qc6K&3S%~uUy$9IZJ32^-pXMI>IYq_FFM<2b%f0Gs z^N%r4OiXxtdy9&S`mPPfeg6FU%^QAs`3j$~t@-)+FJF}W6q-%ETI>jc{#64U6w==7 ziyb*8hbg})Jd7vR9i$`#ei?9Lr2Myck&lj0Z6z%7mDGbi8q2 z8vogzeSYJn1{dv|n=FOD5F;ghXds80rsl-v+5$d}RbJtX7rTQj({y=gL&`Tg=VETI zH8wWJ9M`#Y>5@JV9c@T@T3X)Ssh;Q0pR+eFt&u4_NW-{w4w1 zkokp$!NI}3Z$s15xvZ_NX+wqv2it!Cru6wx71Y&bbo1s-+K>;pRnybc5mQf|J}q{e z``gpgv$e7EtEZ>8$mQ(%pQlfs&JEU>m)s>h8mY<3&X&468UNyiwY~kD#Xlc1GKRbJ zuUdb5G&ehI=jiBo{W^h?(ng4pJ;seb^iKchU7DJjE-nkHsi~!<_?%44%mM!X@87?7 z_)~mm_`&0rR#z|bSQ;;Jox%Q5 z<%}Z#u!5g>_>dr%5>aWP#zkw@zN6Oj>sP_eUoSH=C9bum?;8KRIyb1yIfq^ILN!eP z;ze@#9?Pnh7iUkMI(78u(S{#CY;0`gKAC81hx_~cmzVqC>NZwpR;GSkwY0Rfvhpvj zA6d}U&{)4CLP9Ne>Qn@)jJWeq?bD}B*G$S^ym*n5)9~%vzpgy%18lO?6lB`k+7lf) z%)(a66;qF6V{aAx?(^9Qs~Xr`8%YTa3_Nk-L{d_cPO|Ji3X0~RKUsyX$YSa~eEQVU z(sKABuOJ-(_he~lX{NU<)ILG8?YQLamV`0ybasiKDtRdAJ6o|B}hc^=M1XlUrf$EZq+SvOhUSYAH9UlRi_ zN=g!yIqT}`wq8G|5_*%Gdau&Lg3&g=`$5C8YcWkD5@KSbV`EDmw3%&Vc4C(CiX5wyiCjuwOUn`35SuGkvJH4w2?s7q%g7wpekOTm+<-HRr>OJ@MRfW6 zVMSA`^R3b3f+Pu%mxY9ReFP>Ou(_7(duBvML?a^U= z`ib?W31eg9xw*Nm?e`x(d~o<(XzA#9K(YA&&Cw_P#IUUd7C_=H@UeHle)&nMZP=R(b2SNx)fFK5))0F zoZb}|uUCgMgg$(Tx0wE2R5dt9Ng!a$EaL)eBG^|J7ay@miEwf%ojLR3&6~;Qv@>__ z-o=7p#~AV7t@PisYu7G1f{HU$Mn(pz(=)Ma(G?Xtf%_ToSsX1aoJJa11>!U_^zoAa z#>XEjrQKH=$T2CfvbHWMDYV9mZ!ed;di4scy?giW11yrMZ{H@z#2h?)7)utS z`l9C1;Q+5zv!fRc4CojbI{DTKq1D>SvfV8$dh2ZY_TBIQ{{4#|zf%7s@c#X**RN-O z7v(>HuEbAY|NZ-0qdcqe_Us3~)I#@puuDqaU2fdCp``TX;UPYsjVTE_!qP~JZ%1b* zHq6_%Y%DCYxCLTN=Q7*&69}Ii`@&hW-oACXcI_|&1M$!q=iBnU%kJL)m@K(6FOX((?=ACGR8&k(PG0!ez{ktmgFY5lzce>Dwv;9HE6EZb5DJfeR~o2@rl6Y@u8vi-d-PE5Q^bMXRe8nk*xQ+!R5<;>gqz&xKO{El4Lr6{Fsb0 z_ffoC-_WqNF;n4rTI}}i+e5>{ckbL#clKE;ja0nWw9Q z0!c&-+K8r(PQ|UkppPF<#ngE%{5xl9d4zWPzEYZ(msdE8)bsRow6^nxhOWR8OB0>G zf4_eD@`YRb*#o6Clr9PTuIA=u93h{9FMF^Fv$A-Y!oCeVt8nUJmsA8-2~CcVd;I%x zSR~<*>@KY&={tSp-q=D`d5l2=Xi@LFC-2?6rx_<;Y+{0Kxv;i*^lW(i)2FIu&rXbu zg;ZPJxw8}*8Hp3!6fbDt1`!4PEzhPZd{-kAlH1d*Y}nS8RBa-UB}C%|DGpO|1~W;T3dL_*vsmr4S*RB3iFNl$picfL!(aP#XYy~2WNgi`r_TSwwFI& z8&SFEiA3b{|v5omcrx{A)f)Y8+}_vgUfSl!q-&c)?rzeP%>sLZJ+!g}4- z7Iz{_{S{hTYAOd)SkUC)#DwR@^3-+>UFes#d0$9v8I^MRhYgh^=k4+3{yw}~O85SlI-C4%IzmRLIhKn&AT29v^^Whv_&CmP z(DRSDTw$Nh)vm6t`}gnH#T*Y+e*X3A*Kglcb#!z9XG5xtdrofttqui{!atc5IQ;zi z^N4u)Vnbs6Fjcd3S4#GLPEHOEud1qQZ9evwHLeJ#PQtO*3%i+tfx%C~X>)ZBMa4yu zg@sDudOMHun~nL9$boXs@M^0Hv9}~eSJh0KZA8|rU!gy76>u^Jq0SxUMiWh{4_BXwtzyY*N3%$WdP9x+kT3C~*W>*$ym zbhLLjI^Q-;s_5y_6F^Gc&W3S9D%HvCMU*7k3*RaXhLpy zt?bFOId#S&Jqs48JUFQE5Fu2YS)wN~n)YsRy*?sVt`OD4C zJuon^pFu#@ZMOe_+VlB+pe=q1jLm_5ef#(92?R{h;FjW`X#M%K49F;!&rn2EwAyN} zF-d0RM?xFlhXa)j4Gq74dkxh_;fP!1t)i*6y*yWCAw(b$LKy^ADSaIsXZn11%07Ic z3yEct%-$*{sL9vKO z>R$shfVSYNsuVeIX_tRmr%ruD6$G%yJ_82u(K`y7fo_8(M(zKUmp9-fiOWeb3gi6a zi5~gJIR9HXYp7CMadB~UbaZ3^z;>ODNMghE__)5lzKFPZ z==A7Ik}T6Gt5}%f;bH7A_WcyXu!#261_m2CPi~ag*(>u2xZ0v;-Ovwf%uh*3!~4xOmZ4Bta={HdIU0~-vF3! zdIxc`P=XT0Z<6v#wdcKim#UwAN(BT2Oa%;a#2Ok1AzoKS61ZrueSdsH ztsZ9`%geo zetx@R>aeSpR#wjT49vM{akq7L8mg!SYGj17%bOV*7UbuERmw8oY~jChrU+**-^bUbtqi;Jb{ zLs=ypo_#p_x2CPDi-(#bJ?it zxFB=T)8AbjZRyN4UrEw|GLsUaz+oZ8$ji%nM(maI?CvLWKJ<9AlP6E2R@vRWc}hqq zD<=nc;*P89j;aYW)G=Ki`p}H5ED8f3Mh|-*l0Sd`0MkB@A4+rxGI|pcae%U_ySp2# zON-kDBn>^&!jgt$HY~Np4jUQG618mClo}6R>)35da#1ywSkTF8tAV*yzvLLke{9TY zx?Mkis&G)3*OvzC^4N$ZP?Dd)jx;ttY%@$wQof%vDyz8I166J}lfE&Q2|`ChqJ$>* z?0Na%Ao?}ZjbL&CzmH&<^N8O29MwG{Yb^GCN5?ZftBi#YqDMQ#6s(W9q2JsQ{_RR4uM zmEIboz@Z=)sK%xA&|Uq~_SeIl?s?62Vkkvo0%Ht;N=vUOf^Oe`!+nN|2FlpAqe;si zT%>KRBqaSK&`O{tRgElESSOPDahy0&*VotA-rinSH3+iNO1~bk_WF0QYyL-rc^_iuh}6Hw={sBPCT;urcw3hI}kYFBG(>$`VC_<_l; zyxCbN3V%k*Z)kl$T~TMK*km8Pi5^>_#3_-q{6co{V9c$-Z%L;;>2IZlR{urIzju!W zF9qBT4G?#0NZ@B{>wAD&VnxNfxVf>M_V|#KGxgbTH_j?B8Or6%h8h`Bf~6#giHVix znwR7KB_-o4EjWyA9sd*`D}qFp{^oKCs;e~^B{)&#;2eHc*U^F8dBM;S2NOCM=z^A} z=0@Mnc5t;-)t4`Kr+@FOnngDi6%k4IOw-R+<7E>S&DVROS}Ej(BQrZY3mS%QQs33J zih^)9oMo&tuC=|Lj+J$4Vq&9)-IpTp3#h~9rWb`jS|~WqH{fZsF!Y+jSFgYqF08FV zeXRNV^*4w*Xc7$#4XPi?Lb=OGcu|p5nCj7(Iw(I%LrihpGS`#nVp^bRS==Zg*tsC zfjTB8Cid~;$Zrt*ptmGGeHwWh`YqnpFz3?Gwl-1k_1k;*21BYD%DMUL)1SgyyMqRB zV?oYvB+3U#HX*KCyi3i@Tw%>;MFU`DX4WJXD=RJK>YV~q_Vn<0-#rQG&hWwoFxWTw z`T36f@wpe~=C0km>Ak(_e&NCe)TCTxzb!e1+PXS-clRS~cPYsSM@C#nn*k)Gj~~x8 zlR2MlaOTXJp?#|0^iYqov-kO@Zfa)&VFOFSC&vzT+#eMch3-1im?Vn*t*4j$`t?MjcqxNY+PnPx^Tqxu*49S}f$Ps> z%UG!P&XuWcjzj)uq*Udn-%m!$&Yn`_G6IDNB>iUBJ4>|JGLg<@(jVodB=;&wnZj&^ z7|R|Gd7T2@0-*ER-YfzSgRJAZ%&(sWeI6SB^=sF#u@5sbfrQ9=t-dQNGH%UHe`;cE zoB(m9pr9Z-`$Uvlsp|~ed$IR@)#+-o8HtIIT2A|J%f{5*=Xju7YAp;<++%a^C6Ro2(@K{Dc@3uiiY9S{NdF8cAJmmK@o`rWwL@Te%g z3l|Q>YHTfk5Z~V3#t)fQ_-x@O0kh*&N2+NM0{`~+JK-#$A4*C|0lbNyK7CnHahGrk z=&3_rc^Fq9x*3S^C?rjEL6lA?L(O)#FJETW|9hb|3i@%BnymAXn!38Wnp!RJ0ZK-J zMJ4I^^KIa9Ln9-O-S3A(zh^sky-Ul>6XxNmt*Sc1L&tsmIM(Cjr4MRn&R7GpsnIa* z-yiz&<;x#Geqd)QP>Wf8eE`RSoSYog$oEIQaBB`>K~@|`r#4}sR{Eu*`TMu&>0*#b zDg2>G0pPe!b{*m4lX3VhiE0Z)l8$h}+}zy6oW8=EoT8lg* zY!+zK0N010Gj?bx9k=Ct$Sbm*L^s3JUj(_3i;GlNH+DVw~;gU`xgm0ox~2NR799R)T6q7I2H}Z01M!8Oi@U#H@HX zoLTQF^Us~KY<@(OFMt5S%1_&j{6GKBhpBIL^nYGk04rydk)h${jdqt z3Ca|D%1t}FuC}%q5FA=sRLT#&J3eAe4OV%*<=!%IF#b~;(ab%_*Ntl8(jkhuVwELrb$VKYyvzO?bXID~rhB;LXI#`<8Qk>}J?yYrc!*bANS9 zOI}HdXMaybc(_@i(~)Qwa!U{{nY)va#((8s)iE_?dAQ0E2j9!+_Izw(nw+ zLTd%r@#8wMQ2bNzjq&mEkbP0suxLlxl2Ld0F22DVJ$mo}8y}SzNJCgiXm)vdyLH;s z)KoQ`#T{5`e%|@Ofe7@X?5wP=?rte*X^okS7cRs`NBfsTQknw>003G0>GF=~yngOi zK?i&Lc3S2M{a7GQ7)%5h5!^b-kE#Yx9(2-ly}Z3MN^V@g{=T4~!fAl?c|M>Td_}dQ z2*E%t?moQU*N}rv$)`*1Ogw>JBP^VN>I9;w`iSvJ_emfpXt?WKP^~JYy_x^pFj+Jq z$~ciWBJLbahUd?N-$0i!Q&$gx?E;|!hFj$Ah-h!<-h;!#Kik_MM@G&j9D2b;LFR9E ztUm0~BTi1vSFc|~&`5zM0|yfNHM%{F7PXgqKRNt)D9bbJRtnGuv1rfUy(yBnlyr0s z5S?*GhtcuzCvkBQU0AIZ4;^J-S4)_c#QqK1^GBjR$!BK{K z1-Swr1)oYWLtmceOOtJWhV`b5v^1BVgqPe7U<_weE!G8X1Ydo9DK&#ry=5D-16A--KC?W1BJxer{_0`GCl$chA#`!4p|Rs51?}X)h1M3P8n*7 z`=IpSzJBG{C$a%z`cRoOz4@mhiIqJG$!CkRii&=f7G58JY`vC}ckC_o-Ci4ko0xCg zFkaI25#A5PaY&ZmzI`Jj9YFipy7;KIxtS4X02UPO!Glp0&)~(lj5IC`iKbN5PLfeC#N$RJ-Pv80TXZ6>wPLeEe9LDzgukRe?fJ!1e z(b%wp%n}YCK7QOP*4aBxZ1hJI3=Iv@AQ&#_Y566aNs~wUESD*13VK*c4r?kT3TE0775o-#R+&_SSSfyG%qiz&IT~Yxyba~ zxpPcmsxMl8|Ni}>p~2Vc0xO9{YNdq`>S|L{ll<*bYR0gc7xTMc8ACf^uNO7Ebcy%) zaaV93cvQ1D6{*{Q{sadD)g+z>1Rrc|#XT175a6LCZ|m)Cv=Dk28VVJkg985BPaLre z1_qx~cLg0IBPC)D{19Xs3$gP2?**Se;SPDC<=~z6?Ae1YCMPEc90~^ymn|pP+u13B zb}ujA*VQG-!EsL`V|j5AnlyfcQ?O5O85JC5_>D<{08W&kpbifmEI~Vz8FU~uLFmq) z|B!!#DEo?Bf-5bEtA;v_x{9VuN4Nq>%SNQ=<;#DdesFt%Mo@S~#KgW@FASpo_u#R^dyk;Fqne$KVB1112k(Uif(t`6@jN_< z&kC-Lx4YW-jF=)o5(mgyfRAtg+dH3UAtw32148vCIWs5ta&g27rZR;;z(1kN$-zM& zP$@4z9}$d&g$1C0s54k4knJ*$LxD;O@$vXP9#9Wa#vvk{5D;*Ac2%e}gro2kQ8brQu-%E*|szR>0QUE-PxeG=RD(Z0ntOm>OXlx zG~gT@fPKT0lY3FRCMPG+*gzC1tAv89gmFPc(oX~yZ2!@~O=wIw92`{1Y7X!8-};Ug4J#jfe26rMeM*2AOt`SZV^IdW<9SXXSOqtp~y+{l|~y7v71 zdFb%rYqqvel9KRmNeK!26eBY;uYyjX2cnv9Zf!wVf~+5}W$W&~hED}N1~r!^78*^t{j{~ z=7uv0?j^R$Ey-t#CRjHz(p_Py=ZRUY`}Ui|apwGp7`%A{norojA6ERI-@ozASY@Jf zNFPeWKp<1Z%VB*0k$Zd1(24+!+uF{qh?jd#c6K*}rZR0P^#d3!y>G7A19p>5)^fnR(=;t3&PBjc*z#Po>Z+{MeCOi$au!1_nY2Kg_r{oA(3_09XRzz!T&26GMrGdenrV zg<)uUcJ{TYo{y*wD1x;Cq2L)oLEqpLDrA_GSoDJ2w-Qx3v9bM{_{1C8-OE(HQE^|LLio1DNTr*`y0F@+!s+9>>K#*4?{xmGsw)r zLF_K`EC655&7GMoG=;N^kQwkbj^=isrwG#&z{Tq909cyWm*=^!U+<@)dSWzJs|qFp zXz$Sd{uoN`_wR&Frd{{^(ED-tIf`b2{itgI~D3^)o97H|)C>$w9kL43uxfyOWEyW=DY3Pwm8 zy)$|P$(nv+Cs{O1^%ofX`}fZF_V%DHhK6xPMQe@~TdLeKMW%02vldUNryL;!!tiC@ zJk^iN2n`U{Z}W|ku&{>htqo)f+|gAC%;LDFG1sx%>o3nGO0qQK9(kOTmz0r7jF10a z;oH~RN*k!;$IeAEo6;|8eG925_`+TG;*?czf##X^*~3@6X>YI0c|w>`3sN4I5GNpa z^t3=61QcU4v&I1@BmRrmu4NCMqz}EIuMfJ~{@NVBy?i#&fyF=NkoWuhEuz%gXY`29WkEq7 z(p!u7pl>xkJ$0isU0tnrs$5xFd39~=QAi*LswwJOWzi{@6j zU@X`9BolGZ#3%(0#>0ozd%su+p+I;i{Ua(8>=d}R$WCIaiTA=heXK_8c0u11@)Pex zE;1cD6l->n6*)me!<8LRi%P3w+6TUVhmQ$Nh60Cw(ZysFcT#Z$mRfEp_+wgwO(i{-JiJ zjFgo3Bo9>QfB)#&*obfn_!%lD8fh8qVwBv2D?+$?2&xUveSUX_dJ%RxpW$2VT3F64 zXiPBFK0={1Fd#d++YL%K(9q8MgrJGZFN7;(B#B>YrR6)PyY%3fD{;K6yw2z3u85O{PdwUgGHtS z)E=WdUy8{{E8+1WtB0WA8zfEhURA|jd)3OS~E zcl!lzU#GiBd(I?#WbxCg0X4y|Ds=1-HNXZ;Vcc{C`MiF_mmgtuRbL1vXd#?MAcX1Y zyyo0aK};qxnt6RkaFRN-8vRQn10ufTk6X|Z+}Gx>Q20|zDZC6v%!T3PrA3H;J|A=W z<>ZnZY!NeB{BEv%9?ozha=PFuZ|P&w5j8kQFxJgiHU;47jU9gASJI)* zMN1Wo4}$#&lFJ6S8IF~YUy9jzG?Q}tji18oL~cd0^qq0!60r6=UtKcbXQk5Jf;FR!Mi*^25l}1F+Q^Sn+AXI^yxoURlC<1)Rm4U z6)swzJ5r!3#LvmFjYz_K)$8^XAd7LaTM%0mMH(A#QcC5_$LscmQo3kd-@1h-AF zIhxpj#`X5qEB|f5xqC280BMm}_Dql^!eX;hg>hRuJ3DwCP0ysxYiizLw1dKwBxLCy z99)yG9s}8z+L(b5h?fUJPLYh%&P1nb9a}`&3@KLqvuCd&ih|<~`of+_jHd$~m&nc^ z*o~MR{5mK#sFLM_gqvj0B**r6KqbTrA-8sbf^=uN(g_&Rg@s0XdM$tcT-H}q zL>0Vv5z0OGyw=&XHDCbWzLAGkqm$0Bd4c{NV3&h^j5HiQlngpL?8NJ+dtP$#h#aJ+ zf9>jWgYJj>rFH}S$qP){-CYWB8J%!>SykU1RTuS^hnE*|282uuxM<-ClmmdnpT&C= z6%|1XK@EhJ{qDmDgi-FE7U} z!Xd<~V3Ddgk||Hv|B|p0;o%ttPh9WP1L(!gCIWe0USu0bZkDfZ2CKZ!rcg&Jz`z@$yytxeRX|NxXmA~G-{bIQaC5>RJWw#TEb9Ur2QP@%;*MPP zJD=infh}lYb=3`5zI!hf@CgKONonbSBO@@3aWj#x8k?Aii;IJGg((G?F28@9G6wPS z@ge1h&sJ#q_QUssAz$&T=-^0qUU+>`k$Mr82T^cjhCw=^6(K5*ufn3DbI&Ac)^6e4 zoP)rFc7jibkc_eM8Vugr5cSuksQJjNfR{uK!wVSx&tQdr3xow=b%ui)S9mT_oZuL{ za~&I7+_85Pg3>^w`)Vi~1Na@Z0GOm#PzM+oR`OW*(b-K*JTWf;8Nc@XcZ@_FB2xrG zfdq!4f>{{z$UOz%><~Or2arXC_FMHcrGH`~5j+A~L#|*s(k{p^d7qC!Gsb|y2B0c} zer2t6`Q4N7(2-C$GH%8~&Jj9~+5(sXTOY|j5QHv!Vo)ApA1Go}1+wsJkxdBbYh$ON zyPKKO0A9gB!Wm_u3Vv*rEaM6;3?sbui>;qRYI-`|;lq%!_sO#L!4fhwJj)%Eky*K} za`EC_cyVCu)MQ{Rs5*Jw_7whXvTps8ld?EY{Pc*_gGNgJL(YRSXy#9e zp}D!d^*2i0rH#zymKFdb)Vj#7=vv~J+88UOs>m*0uo&fz7Q5RO>cJ0`pWFN;tcf3U zApt3@W!e4Ts0J}2{QWy(&zAY!YOf-6Qn*5tqgNL(`DC*LVF}#1t^ujyk&-4G67uWZ zYkP?o9+i}I`f4K!qT2$d=-nZYQ?|(rcw?10k3@vQ%TaxSov_pc$(7PNSy8LfV8MOS1Za= z+fD?W3J{2sriGEJFOZuZ(`^J$gO|lM_v*v3c0OM{bL?-4n>~vweZBy7(98vegfM`9BTaZM2{K-%q!=N|E`rT1hI&M@yCyM z072E5YN1G>(EKWJ+?ny+*|;BbmY@FUtv)wdbQ6THSKj|dU;#7_jWQ@tMUaoL1i=pI z-zZC<7$DcmDk=#H3Euw(AP}%n9p~hH4$mI#8W6_qYckb7{qyH(c7hZ*K*4mhwE?;C zR&husH8;oO%!9`*BVdkD6W#-%JqRXHJ@D0(C?O~!LK||Zv9`9*ZSFZtu)a6CJA~+_ zQ+#}{)6>cPQ*lCUZEPTwV-yW%nV)`RbIk?40{NPzYd6ul5d)z@ma@nh)Ti+Fm_Ga$ zr>$MkfGE&2*CC_~xfWbd8rZ60v zE0Jhr$Jz{RM2xYg{tAP5p~x8VchuI}fe2h}N=9Vy+kg}LAZ&z3At7+C@4C7oy}AyZ z3cze_Wd-LJU^Puwt)4c2UuZQpH|N_UU?E@-tVk|l)w4%+FJ6RkyGy^6u!~$;%Lk!H zT>Wk7%O2JkOnUy@N=Zp6S51RU^#-W1tHC>;m@#R-~k8*yybP-&^DIXOA4Zmsm;WGg%viU^qRoOX{QEc;qACa+-J0G@Te zF$Vmam*UI8dcz{UW?_M}xj+aR$-Q+iRs>hEgAfqO&B_8izg+HB;mi_LlGjQ4YN0~o3o=P|YAUQD@Mu`+BpRAj`*e3RQT>F9ZqbH@;KXhTEk2rSZufT{uJAch}N z15wosGzHv~y5Yf=i(+)uy<4Lg=|hXN$nSWZXYtJM`|eowdAJY%hK4v29_~``{w%pWeV3l@ z88)svijZINAptf%-=oyVJS(CF1@_(kkFPROK$t@4@ z-9=@qa(^GxzzO_f!gA9$95}lXWZcHc6J;G+_9n+oAa8=%J)&Z(hV}9 zuZ1X+k*0P2J`w%&Wv7O7VFj%t=BMwm?@eja(a=z86+{7KFZ>tG3GW0>0&XxQ11w%s z6HX79%o>bR6nH2x)MSu#j~zdb8+z1u96k&?GK*H#56#AW5hq2xvq>rn4{v;QSQI@- zC$kOK%q0^O_=gz5i`RM?5)uML3TDa_1{VtN?SW<)QNxTE!Ju)p?f|ek-W@jqpOKA? z4PuzWL@*}@p*oV`0W6`RJCNI5PZ$waEBpGp2ix{l5l~DU=lW&0U4JtidBtNqqob5zg#vZ~qN@38x8MlB|*mwx0Y`xOwP2 zoVmvQ9T@)D{msTM3W^fCEub?NP9F2!zl&VJMsaAcK@jUgz*d$GK>#>i9NltugU%uU zCkucf?YR1L8XC^7t}`Yz7^8)5$Bo;IL3Rvb1yix2nmoa+04GI>#1cbvS^+P|#16V^ z^VlMTpczhCbxqCQJ$sPz;z0=!6NBvaSUVGWJj`;Si=sghoqYt-u!hK&d0qKzy?Zqc zQX=Oawy##gOhn>|L$Y(}1gTI~xgsX+z*9K*_QKw&31cR%KYkDs$IHO+i1XQrt;6aB zlSeb27#&S*8^fdtWDK=v!)utNM%4O2`a>9C(9_|Q`EJf3O^;0nVhylx!_jeM&JBhK zYzp-y44S9Nx<5xI7D6wAGy?-r;1#)Jh(iR)vQn6oIePR3q(?=F*9D6h`W^SCW%l$4Mu!qyhkTnr;?CNL0Zwad8D`ePG(KyQY5?%;5B*$suV@ zoXW=NU|!xWUEOB5R+u_{nv}GayHNID7GURcyw*P$i0PSHfJmp25W%K?1Jr~eD-bE9 z9Dox0HXs>dn8EZ;ok${Ge2;8;P30zv5h^$P(|#Bqab2JvY? zVlY>W``z5E3wsL(8!1k>!VHHFU9Rv+(#U9x7sd=9@sR;I30qI@@A)r70KXFgp6||9 z!QwYe*G>K|T0ogZ%EPq4fi6~ zT2OO)`=sk-cx9&fw&x%&z=t4LjKqFH^@daG>RNz7H#fIcd=}`PT=b#W#CqU1(4V{n zgeAq&2o)ON3^fob5YWnX)g=;gc@C3qCz93S3c=k`Dz6b)bd<73tPVqpN@-B%jrgA+ zw-%*_;~;VvvreeVDx6V}U75n@34v(Dz!|lAWtVPXm|}XmqrH98sN*R_EeOTRi*SrU zH6m)xXzYT&{=VCuF$hEe(~gm&Nz>B~(n$hzgciFGsHZ4P{p?rqqz{BLhz)he~6m za=O{=P)RskbnjK_AY_6=hy&~5BAVEM2;tTIZYa6(=2spuaIe&fuk}jfy=mf+aE+Z45xSPbM{QF9%5kCZEM#`7D+ekS1Dcq|WjC#zJ za*>#Zta}w{25;q6RuQq$0I?mgxGrV*H=>R%b1nb;?w)+E=CS- zR5Ik+96_Q(L+d}@=v-V{LOJvF7F0@$th4|GCOQj%Ug-K}AMBzq2gInb52^ryh5Yod zJMUUs58|hwG4!Ep)kPlz5J5S?q&KRPpJhB|>D**>XBcK#4U)ApVGXoZR}(ilY(ab{ zXa^FTfgCu+7!f*)NwMDR(27hOa8w{bbFwT7B=AlU%4%*a6I8s-OUxXSGm>I1i5*!m||O^77^oi)NGa zavN_yA(xU88Oh<^i9tvKfoW9G0*62N9iF7ne*EcE&~C_(7!^eRC4-V3Ww;f z0jU92oyySF*T=mBaYKJaAnpBeC=HN=L#vVK2?-BJPMVr*OMdbX@!3ucLYwMG_bAPj zX&h4CL#CoaqiFwNk8$V2%k760FEcMc+|&Hgb&m>-GMS2^(VjiZ)RDa=qes#sx3`6x zV&e9;FBRNSJl!Y1`Bi-wP9LIuP1$eW$l?G&_CiFfZ^I5OvmGc9I~;^GJ~EPIYO`%) zMf3!6K_T3dtRglK&`oeMcHC9??_zQoA}NJGC7WzlL&Hg|yr#D)rc5R#Lb*p?Llk)R z3PZ@4v^e1*QUdXWGYXTHA#z>6f3xIRzRbFo0sG(38iH zSzx3g4>ey4X8HU%r$F4V=H|$hl%|md3^X*SM+0<0{0*f)S?seVed#LETf_LXlvDp_ zzy@a*m$W2H)9v%DgvB5{7$Q&!s4eREG2?w5xTVAD`-v?3P3OEa3di821F2JTg zS|futI4up9#dqNXH^Z= zeLJsRGN4k@XVXnp^&4`4K;+l$?I*{^)}TFuJ1D;9q=-&VF1M^AujAj1-j1gM3glDEeCCJLp(GqUXpP4TSP0?UBJj3SGBOAryzt(Eg@`9_D40DJ zd<|s|SB@hHCWQIhdtVcBqjMf1p+vrg?1BwBl{Ccz@+%)q<|>}+@2#{CUgSix-JXId;6!$Lqiuh485|J&7C;;x(fP1~54O zclITHw@ZVA_ZqxbpuS%}jDf~F%3}~h68e~!!j_>~K|Vv$7h*7(A~F@oa&2NBP3${y z?(?uHxk$CIBCs+x>^=fv*trNWH@FI^4LpSf$8Wl1=dsV)$6TvC$&)7ur&)?jr-57% zG(2+h1l3aNf#%N6;C;5{9XNAfo)Xx|;EQH>QVbq!5G3m9B zI8a9o)#kw4ds`gH+hTwnSsA#0n7Rc2!CT>H3yX`t2(L7(jDIDuyDNA=C1X5lm*Deql^!*1&74_IY6a|b4j}? zLaQ-uybb3cf)}a@QS^jwLqld<;ZqhG3N7L*$O_aA@tZwE{r&e;-TyZr5EvYsiJ?4q zbDWJMXM$2YNwN&a-&s~Q=iL!|jKba7)FgQFWCKQ_xVUU^d(baY>MO1C;HgEkgyHS6 zDo+;Y@Pv>{HwfX4O)L_tT?&eLY=autx`n2O$08UPYWsL!D9}_cu4KpmEM`M61@9Z( zn+xY~>v4$|dZW2{MRs-_W?Lbhc62W)s zy`4WKOK~g~Yb^HSc)EvQ)c_tI#1?V9C``K)Jz;8eRAHok(5VnT41E_i9-O$v;S#a@66nGaySq3EdqX%Xvh5P|)bz=bt}6 zLfPP_ZyQ@gdIp35ks(Yp9FWVvBgHUX2sqc5`o|VQQb<^^Tjgqgk|YRLp#CEjz0(V; z5`rMGXYax=Cf`A(WMyUXz^2jL>(Irq%g`Qiv3~~#iG|SGx~;jHgFX~=0&#V}#;&#M z&SPF*@E{OKB(MtstXozWgz?YVUm#W>{aZ7T0)KXP&K&$$p4Y^h2URy({nRMgNN;Aa z_xJsXJfhJq`O@GpL)7feJ>kCRwy@0(WN%ttHp^4!+;j1%>ZssNk|;0rU0#?x1R=DLn@)eDISOZBKBIc6dA%CA+ zI3|!>*&-mUD#*WsJXTPEXSNl%PW2pOXWzjrDs{-$Q9PI;i-$}x=m0w#9o_v#M?8(g zFZ9Y<+ zjT@L=#)x5B)uX=sDNT+Db^>c$yg1E1+HHRq912|lu4;=Nl3yw+dk7Lpjo_(1aAYEC zU|awDXM5YhAK-bYrtsxUP*ktk*or)&f77LaF$dnmA1Vi&u(2>M2xI__#=98KO9q5E zyhk`fiI0wJK4O-b2E+%1kujUz{$gkjxQ$s}->2Q9NNHPNYbU?-*b#@)_r5m``cT=` z($w8^5H#UOBAfIt#|N9zA5YW*;lfQrjPkgWtOw@09&OuT#K>6LOl)&o8#71E$>6HP@A`6kYcMbP zBsLc34}U*V@l+pUhFx8S03?7ZIy#{Zwzvboy1TvmZu~Kq{JtX9=yThMe>pflu5Q>F z&#p0C&jQjn;621Duz*b6?5vQ41ZeG(=x7KR>ouVU80+Wfp9BaQ_3*%*MB>cLiu+J# z_4lSGl%5&U@|9CKKM3h#!@#8=K6DLF?ZB6|_H>2L!k&}>jSQ-;83y`Ll^e5EXe3Ak zL7%hpUOqs68d48h2@GBgdLpk`3NQbEk}%E`&Mhph)!R+~_J+>)k3cE;h<}FYDkUko zxUU2!2ZtINRqN~>JW>)u2Kqf1xC9=$A|X+Lmjy2;I#kw~<67MLsi_v=LVf)@iNe-F z7z%^u3DH(yRfRYScv;5Q!eVyptd&qaxGGZWOL*)ZX1LHv!MkBbA^L$#8KdwQ7`hwF z!xfkB%s?$d`|YT#v;-ZE4ja{<#CV#zCoUYxF+t1rw9R3A%-*stV;x6ck%EANWIX+&>7NV__5g`4*|I% z*V|IE2g!R@hgW!o-na3XU*jxglZIfPY-Q7j``3nI7;&^Tlnl(OF z4~!sSLC@pXSO%OqJU3io)Z9BN+&_& z3Ror%EDj?Ij4_yl&HR^@xtrYf|AvPX5)+A!7lRrMED`;t0}3S;7jBUNM*Shx;hCH{ zIj3FzJ;GxQ0i;?^lz~x0{KuN%GO)eS6U)j@A336kM=&CZVmFm({(I%SU?0*wm?Os5 zcFG8T5D_vwNphp#bP)Xy&jLfNq69@{4Hym&(#pra1#7|cb~K}3GJ7M9G{q zNuta{$xsqyEF@`EDXb)wRzgCH%!v$1B}p<>ED}o@q7WrT^Yec0*52>2-{T$j>yN$m zZ!PjX_x=4|!+D+Oc|p!@o#oiBHWvXEii#o%6gZHSufU+fY$C<9mzppFJ#ixD$Ps;T zx1f@FAu2v5rr3f2@=C8zc$jK(a5Vf6NL7-KfCecgSWEmBNKANL-$}W9s&GKtxocN< znULGJ&C@SUN-Dxb?;@Or8=F2H+t8&c`h-7|TUg{A{cbXM80{djBhREHX;GYOMHj2e zgS(+akVx4Niv!}4w|B}h;JY#1N0Och4O0X@`x69*(G1@0%hs? zitIPs_R&e_l9RW9Cj^^cLV3!t1sw!rG>cfNy1`SMxmnakqY@s$dZw->dVm~J2H~mb z|9&x0g;<$HhE*zIJ>3gGvL=1U|A|{C;F2XhCq*XO9)CAedxHPSRFGRY@I?o!vpd=*s5U+wZz3 z^R|2I+0i~cpaXjI2~(|qHFI#!-MZzEDA+g_=d9k3FKZ__jdd>;lb*)ddor=4u$dOw z@44S)XRLs;vf7VXga)3HxnuT^-2+oxJZiBzV9o_^8478Tzdr+PN`P?1zDCT=PMy*{ z_)c!LUheNlCT&jP>u3}Pj~MaBuN5aLAzyGD3HpQNX+5^!6bf%Q@Fx+hrwo_a;_Ey{ zKXS6N8(&_^#p{Gpmm(uUm`$-5NV1o$xIRrFm4n=1bY`lhb*HGvUBRQZ65 z?v|$Mb1dxb`*hAMjcG<>VxEG719csC`xpgJJXbz3pqGAK;z?@_4R(Y;{=XdwY9>` zjRzcy?P=iF!a$bNsTlHN~n;@F;?;S!^U~TQFBsBxAu#VHVA}HK%o6ZIP9>O3)2e0jmV) zs7Mo+7G((j)@|PC+wqCvf+sYhA|vYD~}?JQ%+;S!wYxGaDsQ_C=~Q zChfAJ^k^`AL<;p|A?7oUB~gF*X+KP~yI$nq*UPw_>qo-n*;26;i=C#x#sIGd%63+i zF+U(z;YdfeW{sXNM2&tIOuA-^nI9cF@@VxHGGN)$r&0=1;s>D~XScZ)J$xAY_Y|k4 zFf|z4;EJ6%YqpKe4%sfsA9JrigSoe0!C%;I8yKXXKaZN6uH*RP?DDdC(28rH4-ttC z3uOHlLO}#I2N6Ac_QCDjA`4}>RqlTpd}XqQ#dcOZ|D-*mA$M03&DHep&Y;0vO~K(~ zQyjMhJtx1Nu8(wqx1(--=%4)MU7GstFRTQ$fw>Q#mLY?Th3l$Sd_dLmfB!S{D6YJW z1y$kk-9TBDm3Sw)D~Qm0mOYRiU~Bu3k45)pIbZl8l9$z9 zzR<3$tz{Eul|FkWpaWFFj73qb3dTQs)q65_eEAZbbTb4@h9E#9csEc=C+Vlcd&h>E zN&%Il#CyyJ-`a1y*p!rM+A82p=xOCt_%?Fx?vp^S;m8T@tMvPjudo*2o^PIT1i*j- z8a)E21CkjhvL5mhZ51>KICmgvI(PbX+ki+KN$hQDOF67lPtF7Hu73B?iC)Q7yQ4Z{C@|`O{1dkp2JkF@aw|w+Sl<7<^b9r05K?9Y=zXu_L=}2NCqbsZ+lI zPX6sSy-9nF8)T#gG1)HKG`D!(e{uoxh;`vTR?%hQQk?{FF~)5)x#0FYPlDF~aJtyS zrP=6V`H;e22n*{P!Z0l#eXWsEJvAbOU&0r|9DY8<08ofx_wJ01Lh`!phzjm`xVG@c z3qYM;TsF=HvwMWJ(g?5`wEb#& zI`cswQ=l-48T`nE2|R@xHH4>r7g0cS7XV+c_LfEjxQ;NV`1iYZP2(_uJf%L9;_6Ho zaPiEU>GL9QlC-e*Ep$a|2E(b)TP;EdHgshrx1G2K?2FL8B1ob^!v;e|tW3rXF38JO z6g7O5Qvslm4c)}&X4+x`y%%L5j2TSbTedoyQ`f?$xpWEr!(e$WW%(yZCr?`QRD0ZE zAZoH4W7QBb5a{5+K(?p{nK?kI7&3M&BiFx+ifZ8q@eKLQL=I0Y;Y$TiWgbc1VGaUv ziHMIsEfzbIL3L2d6oeq4wXHB4v%2MDixn59~TV6zQZli5KNKnTSJ-}SFK zL-|N`7V2pZiWllM05j?8@pn5pPtv&13OO4-weH2oy0p4MZ%>YQXeDm!K}fQDHUsW;mO`j3oF(uKZ55L6 zdYCkwx8%bQiDVR@1QjWoFo@f+v8~RN7kX{zdH6BrL>v_kU-5nEF6W;}D}M}{%k2^( zi%S}0odxic*F)3-WpKQ{F_EdPa71q~7$!(S{RKzitJUkk%eQL?mjd z&lzf(6hsh!Z-P722}u_BkaB;)oH_E{x^43IwpJ#8nlih=E1yUgRQI+^usJ8|C7$-U zUQu8Q!oDZ5adD9R(l@*w2Ms_d0;;0cczEE4z;cb45pW% zB2*-%=|2l9KYeOxZpMboJzp}G`%FVdO!y=Jy+OSiO*pbyBwo!&<( z^;cRJne`aidt+Ko}gQiEF=E$=c+x5s2|B8aK(Im3!Dv$UvoLt zce4xNI*@4iu3dCswk)71mI-=w=EI$aU4U`gdML^Q3GUOT$pxFg z{oxanw4q-lc$C(VA-g&(IhqtFl+;@CmMPDe%b!{B1>{D@{sSZx2G+Pp0aM_KIey&u z@o0=XwZD1^(}`g8WJRtk!Pol);s zwp)SJ(=oq0Dy1no8LknC-4~8?*adnuVf*PpMT0Jh$Bl_N40qDHaflc!6_Er5f_3T{ z93PCuVsoP!Z<<>I{)9=Bgk*}fFHc-P1Y6&hrlxuqrg|{<{3pj0z5+WjPNt+J_vaQPsm0zy;F$=<4cXb6 z-a1y>4R^N)#Un<16CmfM-R^$)LGC9odKqUGec&<`@9Q6IK4;-VoYZU0njjq^ zt!8FH>`SjpS>@*DbOW3ttUGlMD1p$O0`BwVXqchc@;2y&IJEQ?&^A=m)Lt-+`S61m z1xVIgQ*$|`AQ%!Zl6UV~$ymh1#E|A!xVdpUX(P4q;ziIR-rZT}plPap;@j4=iB#y~ za>7Pipy%4zkrK(j)#Wu`z6fPG4IYB(<;#yIB{|{T*RqD|HHrEOx(4`r!yyx28-U7d zmo9k%WbxPdb+k>aS+u*}SwwwJbftuyOe0F=5xJ2c%^h4nZW86=Y`33~Zs?fkKX6?_ z{o!RidF058MeAUTp1O7GpF4M?PAzXs2G%AP)2LG+5Le{X6~nExm=JJcKYgOw%|`OP z#@$^&Pw8v(@QNPLu!s42g7Ma~)NN5wQ3nnzKoV^(_NlMz7B}O~b&n*l>&VENo}Pxr zfguGSAhpwBE!JPeHG=>_9|43x0m?5-o-#8h0VFzQKr_?RTf<0}Zjn-sC?w3Y$qX?wB^)(2dG>gG zDODoLjKb<18uASrAgX|h{*{^<#0e8X*1SnbOCds1WUB44f=d9$C;U@;I*|nNA9Xma zzut&4G>u&EQv-K&w0fxQ8MEy>Y{)XG3 ze+u1pEiVF_7b_3IL9RdC1{NuO@SK305f0hXrAOl93tWwc%siyM{Ua}uQi<$VxaW<4 zcK;ZHl=j$o;)=YCrLAputL9*O!wyG7^+!xb0d=A0=$5&!TzLiN07yS%+#8vKI~pan z>GpanM@L_7tNYPV-m#!;fh5M^r=!C#^TN4vOmi<{9tW<|iSJ2-aR)ON-zA7}`F*I$ zZ0+pucQ2=hp#zv{XD6%B4_Fx&WT26ket}t)L;8m1LSKru*?G|_)-D3Ye~ji$jtE3? zB1@R%@gqn6fyL+zLPW+B<~RdQmm-X*4*_V?SNpyEW?Mq9z~YqKjq1DW-?maDQ27%S zvc|)-984>C`m~MFG%);WICyimIYrFpSrn6Cq+@7!>36TmCME)Vh}T8Vpz~T`cu-(p zgoOoop6uN;4Mks3)x*LvJy#4^;}( z=Enh|f4KraGY$&WZ#Ajlw_m;((*;0*WmDF^!e6!7gaHk+z$3ZN#h<-!+5j%?yWZ4^ z!UDh}M8F0q$B;K8>Vaa5WkJ3RM#e*i&{6kdNlUL@F!zSYPJ!OaFpdL>hd?S_E-vJB zs`&ld21?_?*SBX+@N5cve4-dn3isv22_wPCGk)OYlb+t**gi8IXV1sm;oaJ(2OZ`i=_i=7(ZVh0?Uaq@(QKjR+aKGggn!-heOpb7^VAwQWu zqJ(4T1yk=XzT7UJfUd4CAXiLL=<41I3iZE#V~P+H9}mlu86dENhCDVzFsv{|d zIuh~pCkcd1kU{XxPRVkA0&-2wdM*rHQcM+4T9MitqJc4a!JJeYMZ^j$@}Vx%Rw>NQ zrOBMhH;J)U)$s2>$y=WhH2xu3p56ZQJ_ej`HdF{4;+u z@;s6MQdtIO4?KzbA3tbDko#HLdZVV?%5oPtd8MU&G`8YVNs0m9c~n#c#0+nRET3hc zZc8bUwf*Nk0%Xi?1tc~*KV1>jV6OVuGr=<2%7EtbtQ5$5y1Ji0c%*`FGrWKVOziV9 zLD$LPieVL~0^}n$^7#1q0kZM_;B(V3V0dV4WrdMe3Mq8;YV>^gdNKZAQ++j<;*p06 z*oj3x)vM6Bu`I;x(CLDAo(!ibtF+7Bca+XQf!LY3ZYtESoFMgnk=}G4v>(XGI8w|| z^cnrpzSjlp?AgCgFhx|*G?@Umj?#oekN_Yb0{1#;;uhHpO}VSDP$niOB}IwvQ~hKC zSTU*Uw6Pb=GO0TuGRaurU&TrDg_R5-s}+5N`51XVc}+p`0U!+=Sc>gK(J%LsV_24m!lE|@GOj`yHX$iUplLBE{r%U4jAAsuDl zj2K(U@-}AEZNM^Yv0$RblWK2k!!m7WM+_jHnW3Sw04BF1CB$kEOs?Iv6(^LouV401 z%90SXB5t?!0q)~JL5Zs#j+-);uRXK(nhmUes3gy18&7wfm;iQ&m^Rv&8*lgZrMOwb z(l^O1)sgZ2RaA^q~WlHj;dRgq~2!oo5BVc4db#*KZY2(*3e1kv55ef+ZeEG^1 zJ=GbKxUYmn47`euStK>3Gvfn0wJaLJB!irbOq~XQ8-G6`FwFtynOXEeyne8r27@uV zRXkaV*rWS8fS7l7Rcts6kx^0IIUV%U{m!9CNvUI0AQgY&%`?b*dCz* zs4f%`_*O^fjvY6yURXcqIDdZV$j59}2!1LBCgWC8TAG8)7!)ODcJxdHEr=qV5f#?J z5!I@4$w+k7)kEbD^}PXythm^4@L+-3!Qz?6@nAV5Y-SU!R@)h3#KnzW`}gT`y_s{6 zc17d|y6m?SD`T^X#=f1cF4d(lUg3xQqz)x#APZ8I6>R+l`yfxxmux4gecn72B{-BJ zoTHE4#c?G$M}~6so=X~gl9;Q+jN6V?3E~7LjgM$a1)p6EgOSOvTJ_wo>v~vcXhZ;j zy2(gk4R5sS0oL%vji-6K6pgU_!{!YAYaXk&vMG?kFc`ZogVM`^K&z@ea3HE$pl!UU zR&CrUxF9hFAEK+vJ7j)CC6BTuIj)RzBs|7_3d~T4+Qx3i47~FoPtlBYQ&g-;Y!-$i z19zNi9%pE%jz3^*?0l$1iL-zfKJo21aa*YNmF~Say$<7qT^gaeaF1f9F);g;`7UodO~Y90=t3b5*o(Lgw`!J_be5--B@`!+ zn{{I+!lY#Z4&Ru*r+1$|sf(|Cg1SMnVE1A9)pY{Np7I?UGc))sI9?pw6IJ`5BM2e_ z*b+hq{q!=;5Tp!9Yz|aX^gConu05}29Zkr(bu_sN`}Z62;K5)OW$8Esr(IZd_u#8$ z=W{_)NE@u864(ZiI_N1uPYNs1Byo7vdiM_ao_+U&0O8F%BsewwDlZSZ=t^dXWiEKU66@bo&kXgq#olWqNSswF(+uM}FQE<+~LX66O%@+p_-^wGi*H z<}p{sCu%r3iK55Q(2x+v?h2&zaADb^Ny>y*6tq#6N>Gql^(jw0a)jA5)w8u%Q$7p3 zE?-u$P{yj9_kg)~?*OWdOiJJF+b1Gn!dN}3FSNnwF9a-!3w1Liqn#D2)g1~wdK`uF z#CKi4VM9-u=$IJG*!V&6!kFExqiIV0QbWVs=cQdNrcK*b=*rxg$=31bgXmJ2W-Vd* zADCz=x5w&oS{lCQ1ukhY9jMMQXoS<9b*=0*0~Ttel2Ngy#a-v1K_M^3EWO4=s7Lqi zD~%F(QEUcF-imPVdL)+!xfg!&Tq+XC38O)HMjAE_Gm{(mCIlAOQ*Nl3cceysIOG#S+V(IIR%0yC*!^6=wkx`PiLK>!oSli#_o-i|80 zL4PJ5DinDb?tK3F9<(#2nBgo!&d`n%bjXEeF$n${GV}AtZTyEJ-zdiIUSn!kGRRoD zG8v53wH`@0220!VFKuxmP8LQ_(Ta8+HM)U#%`T$fjg6COb>Qoso|_Cag0n(4;1N<6 znEjkeo{C49$>al#4)com6W#ik|)dxoZ?TE zZIndQzJYlOrh-qOx~yLhvqRu=p)*U5RNVcg-~ zBe%RuL#T8Gzro1!cbYrr0cmVJVgfQXR=HeOL8AO#x^wzi*7}_4NHZ$_{QXeH16}n zC0~JX1ic69()4L62;v4C7?=UzMFpq>#E|OHX0~IC3p_|CK=&{a|WinDMuBM-;<|I z;cRfEjq%$7Zo`8mI=YP8MF?tj%4rW~v<#^k$|=W9Q8v%j2!>Q~CItf}I>979zRyjB z*ep+TqKl`y(^g^iXPU!a)2}o#Xq9m+l6;k;eq0Uh1WSG13(7SJ-(qRfSzB*RH80{to|Bxn-OCm{$eMk5fo9QN+gi zLj)0@v7W!n<6)t>=58Mv%bu*h0$c_QT+(R#2q6lzzFy}8E}T7!tq=4%o&(OEoH>H1 zV0Y+C2Ofu}j4Hh3<9dp*^vjn|l(=&Xri3ddj9H^{^HC!c6{0U5OL`+l@O~y?R6_ZB zV-uHWF)oCzI#>4WnZ9KU%W~*JIlco%x$NXOum~?iOdOc{+m>lAb=UZf@K%__P~9>P zRE@MA&c;eS)qvdS@DTxVQyDhUZMeA&@trwgAt~v#gbV9=$N*EGg9os+ISV%F$sxG|V0fRK7 zcy*kWZ2;{8(dd{M_y$8!jBxP4m$ASZ1ytrv)lU>^6jIO|qO#9aE>o7VIHw+%YjWo8 zImP~#y`zH^&hBn=$hPm@^Y|PGN5?})k3RXhxuhRFpaLOcBM#TX)+RZ5%B)!sq*lbt zn9Ya{^(+aTIStkPVC$KWPfGri3a}S{7Thoe=`pAq?~fj2E>XJBYdD)DzC?RR=D}G;LdpUg`7IS$Ur5O9Yt$g##nnS>@@xmv_?{J`+T-ntb`?*5}k>*;@>fFuQVoJmQshcyTE3v&s0 zhq1rD!zFVd!H9faZEY6!00|*+U#Zd=1=7OJwirT*tn`c=9b$}=qI*?S8pyll=K1_#Ur8AHaz08;Y^ zQ3L(4dpA4nd2#|Fn2NXfzp6&Oxz0BY%TyPF9r~v4r#7R=eEyN`R zaNpzC8m8zG`NrG64{#h{z4__A)mQx73gwF9<(yXEICb-8KlGnQK@1sbGIeA3blB7E zqc6g9i^BC^03|*)mL)-;D#lEe@JuR>84L-Vq{*~*Ko2*<3LpcIx7Qvk$T(ZJZKFxL z4yP|7U!Z97(LlhpC%OU%Q{RxBMlQW^EIGLsEh!z7sse);+{odvkT(*kl^8IqsA#F| z;pYOSVJW_Wd_#~!K#jHx*dY1qFkA(|&`VU3%^n+-&ZZ0kdcu~(P8YrfH;U~893@ty zzVjrF0&FtJ@7IF0FrzHTK6QC(n`am_o;nc&D?je2-fAt@aiu&%6F-_N5@5bzF@FhQ z1$gWf3Fc#CRy{bNw0c_8Vvsk`B9^axCgVcOVd#vun*}Cr-rm<3mQlSUvBBYi8}ct_ zn!^oS!bUrW_=3GdN{X=RgtHC%r!@m)!E%<1g*xUMQt{_|hGGzA|n zRRt(?#otX5?0TS6K%S0mf#!=8!!?A9D6nhMYa<6kK1MqPnlbC-Jd8?EV$mQ5GN(l(D!?N^zgAkC zI0#%=p0(!a)pktfP$IoZbsDIlL4Q;J>eV3*yRxz~6^Y)*VWYskI`mrQ6#D(0W1{`w z_3O;^biwW%Gx>uQ2>yKsJqS(BC(<(~;2pw5;9vpGTzC^Iz7Hux$4pjRrQ5fbM$>Nl z5z#Ar!L&3$rfiEd+m|D27F-Ktt10Ty39G}{r0&M0q z@j`FM29y^laJX57c1CKP4mUSUNNC}4xM8IA?^-HWf?lP(XmHyM#R5o`95r1M-UoUg3hUcB+N88u;=zI0C{M`dl;vQDz<0u^F0Ix&D&Ru`DT)!~O?5FG5^Q z>}Y|+x*bL$R%*Arza0t=&Sf)J@%~&_BL=lFZ1*smI3C@mpc+fCo~%p5dayz!^S#O6wb%XhGr!XeZB07y>9%jyRVbamplXbV$w6BE;4qu0B*Tn4)UeF+N> z2SV-NIptc&m;|JT?Nq|1BrXl}7_73O#?u@!Z~&zOCI=BCSxoe8IPIW+l(v|$1MI|) zz%d&)mP;bu_!+Lia8U4I*ki@_B#k4w=ZvRayY{_TuAb^2xW`bkk^^1X9}ye71%F!* zrj%z`b;3%7pLZ7PR`wC2wB#7^(UYUwsb26sKXFS2h>Sc%)k62eKpYAXZS@rz?(}Hr zXRfol%Z7d)nA+)NH@EhWS?+I6cO<*De|wph42)NFk8F{7-;RACnTFx>wYAT&Ut_~J z(j1+s(@M&jX+!y$&}rWc6cOWgJgzGi*}L)xMAhw#R=fwvZ$^CrK;Z7~^X^Uy@LkTGi^zMoGd%o+*=vpsr;pkQzd{ zv>AVOG~0!D?yD_uL7IrXwWz#X8rQM);+-ekKsZQUrE+n4p<38N!%xEwO9X#SURFkC z=9UQqFp*#!PCFqqK{q^wz28(Cq&~=%#6J4v>aD5`@7oH#1O%BXgwfl)_ETwx%35+| zzth?gucLa<4y7Dlcv`Doy082~tD}?s1gR7&LHd!x`0hfIS!%W1(DU3HO_$4#7S1 z=FMWoTIaW|R^L~3QaWK`bBNZDYfWkUT5NU0-Qq^lCwsu09{ZNmoeQS@&7(sEcKM3v zDmF2&{ddhsQJaJFQcZtzX3gM5EL)8#Xgy;*R{4Eys+{%u+j77;Cz^XQFcItZ7ExcC z^#;f}bciY1V(Obr1$G{DgZt8@K}kxtdjKEcxP|Zy0*6r=fof0lNKW*1?PbGAuS5W05U z>Q(kIVk0K@lwrp(Y0*(u1RF5vz1zT0i-)sWDZ@Q;R~7|&8IFV}`+pZPbSfMEU#!~y zeBl4hkLVOf@Z$dKJKIs)b+B5*@!sY^0%Ig>)_;5sMd#wh{Jze=G|i2>aSep|?_`L{SaCb1H% zh{_sr;&`50*J1Hr!cqBYD#x|gBdU|KBUS;ixMq&hq|44K+tcwvSZjSx~ z^#gVlX&?Lt?pVWfCLV9F9?;Q2hzH&G_Q%as>e^Q(@(y{Ec*)GLwFO1vyF!nWywC4W zODfP%PO-xkCq#mZl~!(=+-=DqStl%XYT?u(zGzwBM_vY$02j9`jsE@DQ3R4eJUmiQ zo*WB}kEIrB5pGbnPPJ}^LJ zj0hZA{WW!I2GMURrP#uSTM;(L6!G~f<#{m5GJpxZ`DHYDno%$~K_1x~!H$SgsP=hM zaLNY^7(fTiIi*FzWYI>O?aeSH#`s3&-oEY3_A785zPL-;OS*GhDRP~Ud4RYM0+$1& zpvwchb1hWiG}2TchUHGPH?gkSpBb>{J4+HR=acRc6%bYU^h}mkQ2bH%Z$PO>U}h$< z9odPCi&mH={Qd)NQ!yN)4q%+LLt07HZFjwsy``m8h!`k1$%kdRu+kbqHL!(0fBu$# z^JUyap;&G=DF;c$V~Q_>X)!O1oo52`Z+#goO^S2~u~m-}elpucZh>zypPyQdCX8d} zO_RZ+ad(CkF)>6;(?7$`4(uSZGJu8^RL`-wf=K+%8BG7O@D=88F zD?bhMSFk4Ry_hZI=m~SA*eL|kH%XD=Qxf#;&GtF-?O%)P`pavZuD5WL>dES2$B6DW7pxL3mn~j!$xv$Ex=?c!8?mzM zT&Y2$%oA2uM}|M*^4JjTH88q9yyY^->)j;_tBq~1AwDo?PHuDBX`4cJuGNyupJ8VLwm2K|D$8 z4bDL_tg1>`bS}YeH7an91&sDho5=InVpdO&zaQ4Y7XpC~is%E^cL zY~K!KpT6A{!Xnrh?~TyOyTnG6@(Gu5eiz`%p@Ro$kg(0n@&5LT@(-!wnFVVx!lZ-_ z`u!TiG!U-kSahP8y_p+j+HyK8D+}!Y!rQ8<>yRrO5_R?Trk|Ww=xUVa;E&uLwjnF6 z7&tJp7ytp0mIq=0p8#5I<>n0IM7G;m<8aOH=nZ|OM90JhpBkA@$cNmz6_uWvI$JlE zb{Gfcbd(2c$Mnlsx=*~DVi!ML*-#7R|5!QVo-yd;JO=5*<7V)!8ifgDYN}HEGgNUE zKJA(AWBT1>$7j_Ic{gyZHRbrR$~(2%Gl&-EZ@1_6~M z(Sq}SS(=`EX{l~3{~W|#kt;=}&(>b$_tN-n_4F*ZzXW^P%L@*6>dTB1&)3q#E6yJz zSS8U9nfbd}c5EAZ7zK8~f~n1|t*EW}g3v_`*w|ZQ0OW){((|=R6*m^0Q@|gH)uizR zb~zat6DLLq>Iz?pU9h@5*KvSoKrlpM7)*ysEC(9k{}QXm*9?$_9uV|xw-tjptwUp6 z)VDB~17OkY*^}?i3aUa^h(@5#)hYDda2ESTe(L?(W$jvo-<6xU!xMGXikm?qmb_F- zZHRhA6ZZJsbhfi4yHR@2Hf#TD!7!d=m?Z*`maB^Kda4iJzCDI~lu6LJ=bSNjX1`d{ z@L^j%U_vv^JsYc^r(WZbxMo)wmWU%>R(wiALp3%eLfr$5YD zj)s5qXrP9Rm>M&%CUcT{=x9h_!ZPSI7xZ;R$ZcE~LT74fmFEN|#~+}!gB(449Y0E4 zQ8NkwP)_@={%R3;@j?(b#_9J^4C?;x&@CY3y+P| zLC$5$hbIGd4^=HaBR%icz^U{JE@|NMY;YAw(->(sJXx`BT_(gIk{M_kE}?1>aR~|A zL2lxIFA#vD6X_Z;0L%Y;0#n`JLFb1xw6V^x$m z3xfsLG_FBo^x*@GLrt+=MaDz&qHHlvBy|VDU*ZyedI`sarZTIp4$tR3VjE^-h_YT6 zP(i0kyhuCTeVo(bgFJi)UsBjMb74{P84F4P;4>W7;Ap8U2JBN{1CyaTsfWfJEQ!o_ z{MlzLm6r`4JXm`26RIJ&5x}kdN}f0lmT!y6eNcV)cVB-RVE)dG8Bw)oXq^nbh@dMt&4m$6{E zpmdhdE)~4PO6&N{Ux-oAtO2Gofk`h$5|jRu=XecX)$~3jjH_L-COW zilB_8vr?WpHEkBh&1m*F4bA0R&lwg+l~jE>Tk2*R41So+3}m1oc|4svEDmUp?ih|2 zl?B6oiU+v;#)-3r#bG>Us~y9rm`<5v1*PYh4+7!D0sA1|p*`r3UpQE~;ouiZ+2npvBjx%uM*AoB^`Mdq0%K3n$g+jsBoU8W$Y?AWEHkgY6wyIAv< zH5tE?KwH9V3o6nCpBC^kSy|3ZdwYB1o?k-S@Kzysc~(o{e+aajwgo#)Z6D1h1^RWk z`zPnYb8m|ocon-TwQOWO0TPWEVr%t%vO98W68p6M=AH4j@7!^r#35N5 zoXLR4Fx#{lg(YOkdwF>npZWUvy+*cDP>`G_RRo{==EgV1V-ng^fxl+4JI^>V8^@aV z`v(jLTpEoN3Ewy;$BYOJ%t-ypS9<*T8_zE^wufl%^kxJ2#URH)P4DE?A`r%OB%P(N zFipzAlOC@P?&zgUhNejsFJ5@FT6SbS4Y?TyU}YRtQcH_(+>A!KeJCnvO(~RDS#Jke zqSqzxGuR3GvUlOR=M>3+W($TjMi^w%hu!e`p>_E2ryo8QTofamF`zx zF-(96En|Up8*~a=zSKqMa7ffq*@JyFLu=z+*cEaVNf4B`gq&eXg_FtOMB5Ee@ zD$Me#BlJQ!w}B$}_@JL_uD%Km4kn%8`vD|@wa2d-2IM@3UAuM-H1SbJmCRxyuQ|a4 zWriMom(WK-)&j?;i>&^~FFfyW@Nk5_v}lSwdN6!f*>iv$7zn5-2KgjL3GgGo^OpL) z#wu%tQ39pJkKezQdh}of&OnvA4z+*2OLJ2b){c-E@C$8iZU(A6wqW?~?DewY1pTNl6v>XdMXJ*voudmx^vpfJKY1BUlERWMHw`12ymqL{pmfw*xn#@v5l|$b7_HCwa zEV{JaR__tEmkf%a`Q(~`YYV#~G1;?xB_D#jjS$cHpyWt`lA^41 z)?}pQ2L;jSUZ^o$hOD+0iDZUPx3X9Okx51)Cz}(jum7kncv%Wwx$N;$gb@7wpNZ}I zl_HUQ+V*EP7_KwpuHMWrihnAYMMgy_DJTdnDo*nV;lUvMYO}_}9dZh64zo_C{_G## zgotMx;RiCDfkExIEjrkAu_w17@AL{obvpE)RYkTZpY|OKiAjw5(+IE&yD5Q|6(Xj) zhb1ujyOuy5$H*GCec~)7MMYt&9hYs76<{#DjPNPf(#mQW=aPOkfS@sk@$4(yk4XF} z!MhtDjyB!O=#Hii0Xlp+a0|{Pmhj9wAZqnhQ~Oj|xpNUoLooBDgXZnoI|Vcj`&>sb z>lb;?bCK@Jc>tItX(JS{WEd=OWNHerl?%OU!tdBYllCc0f#gZ*w3|IUYVTgvhXe*N;sNVP5TQ*XEo@T;t>t+OQ^ zt(^Isj+U=9D^M>`RIpvT;fw{KJ9sN5K{$X~r1ampPRLJ^<>WBLedCObaPFIb?m0i2 ziKD(6aU#3%#S-^KP91QSP?NT{@>P$A5fgcT;~)KHrF<82G;C|xxkX?HXMv74eE3&3 z+<;QRmj}DzyOrh)eB``hMH(}uc*S0)<_zU8;;Az;01250chcDSk0*CEdiM^yI5gS@ zhAkV<0Cr{Q>BQ#BG7v@0(S(!}MU=%3jtYG&_}HJsS}VCEM*yQ zWF&c15LcR-YO1T-=*A{_9FR~KEu&%KWI^{$c}B>E-oD4m2+9@x4J`<`1AFMljCJ?- zZ{vW3Cw8G_He`QZpM$O4c95c>kr N^r^F~E?PQ={11aUo7(^Y literal 0 HcmV?d00001 diff --git a/doc/other/Makefile.am b/doc/other/Makefile.am new file mode 100644 index 0000000..c10311e --- /dev/null +++ b/doc/other/Makefile.am @@ -0,0 +1,25 @@ +# +# Copyright 2005 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +include $(top_srcdir)/Makefile.common + +EXTRA_DIST = \ + mainpage.dox diff --git a/doc/other/mainpage.dox b/doc/other/mainpage.dox new file mode 100644 index 0000000..56068cc --- /dev/null +++ b/doc/other/mainpage.dox @@ -0,0 +1,9 @@ +/*! \mainpage + +The top level interfaces to the USRP are usrp_standard_rx and +usrp_standard_tx. Also take a look at their base classes, +usrp_basic_rx, usrp_basic_tx and usrp_basic. + +See also USRP User's and Developer's Guide + +*/ diff --git a/doc/usrp-block-diagram.eps b/doc/usrp-block-diagram.eps new file mode 100644 index 0000000..190b9de --- /dev/null +++ b/doc/usrp-block-diagram.eps @@ -0,0 +1,2785 @@ +%!PS-Adobe-3.0 EPSF-3.0 +%%BoundingBox: 0 0 755 575 +%%Pages: 0 +%%Creator: Sun Microsystems, Inc. +%%Title: none +%%CreationDate: none +%%LanguageLevel: 2 +%%EndComments +%%BeginPreview: 760 575 1 1725 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000FFE300707800000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000FFE380E1FE00000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000C001C0C30700000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000C000E1830300000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000C000E3820300000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000C00077000300000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000C0003E000300000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000C0001C000700000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000FFC01C000E00000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000FFC03E001C00000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000C00037003800000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000C0006700F000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000C000E381C000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000C001C1C18000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000C00180C30000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000C00380E7FF00000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000C0070077FF00000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%08000000300701F80FF80007C00000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%08000000300707FE0FFE000FF00000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%08000000300706070C060018380000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0800000030070E038C030010180000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0800000030070C000C030030180000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0800000030070E000C030000180000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%08000000300707C00C070000380000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%08000000300703FC0FFE0000300000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000003007007E0FFC0000700000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000003007000F0FFF0000E00000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%08000000300700038C030003C00000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0800000030071C018C038007000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0800000038061C018C01800E000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0800000018060E038C03801C000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000001C0E0F070C070018000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000FFC07FE0FFF003FF80000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0800000007F001FC0FFC003FF80000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080007E00000000000000031800000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%08001FF80000000300000031800000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0800381C0000000300000031800000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0800700C0000000300000031800000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0800600E03808E07C8C0E03180E023000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0800E0000FE0FF8FCFE3F83183F83F800000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0800E0001C70F3C30FC71C31871C3F000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0800C0003038E0C30E0E0E318E0E38000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0800C0003018C0C30C0C06318C0630000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0800C0007018C0C30C0C06318FFE30000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0800C0007018C0C30C0C07318FFE30000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0800E0067018C0C30C0C07318C0030000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0800600E7018C0C30C0C06318C0030000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0800700C3038C0C30C0C06318C0630000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0800381C3830C0C30C0E0E318E0E30000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%08001FF81FF0C0C3CC07FC3187FC30000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080007E00FC0C0C1CC01F03181F030000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%080000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000018000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFC00000000000000000000000000000 +%007FFFFFFFFFFFFFFFFFFFFFFFFFFFFE00000000000000000000000000000000FFFFFFFFFFFFFF +%FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFC00 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000010000 +%004000000000000000000000000000020000040000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000020000000000000000000 +%004000000000000000000000000000020000000000000000000020000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000040000000000000000000 +%004000000000000000000000000000020000000000000000000010000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000100000000000000000000 +%004000000000000000000000000000020000000000000000000004000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000200000000000000000000 +%004000000000000000000000000000020000000000000000000002000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000400000000000000000000 +%004000000000000000000000000000020000000000000000000001000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000800000000000000000000 +%004000000000000000000000000000020000000000000000000000800000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000001000000000000000000000 +%004000000000000000000000000000020000000000000000000000400000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000002000000000000000000000 +%004000000000000000000000000000020000000000000000000000200000000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040000000C000000000000000000000 +%004000000000000000000000000000020000000000000000000000180000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000010000000000000000000000 +%004000000000000000000000000000020000000000000000000000040000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000020000000000000000000000 +%004000000000000000000000000000020000000000000000000000020000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000040000000000000000000000 +%004000000000000000000000000000020000000000000000000000010000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000080000000000000000000000 +%004000000000000000000000000000020000000000000000000000008000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000100000000000000000000000 +%004000000000000000000000000000020000000000000000000000004000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000200000000000000000000000 +%004000000000000000000000000000020000000000000000000000002000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000C00000000000000000000000 +%004000000000000000000000000000020000000000000000000000001800000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%0008000000000000000000000000000000000000000000004000020001C03FF800FE0000000000 +%00400000000000000000000000000002000000000003C03FF001FE000200000080000000000000 +%0000000000000000000000000000000400 +%0008000000000000000000000000000000000000000000004000040001E03FFC03FF8000000000 +%00400000000000000000000000000002000000000003C03FFC03FF000100000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000360300E07038000000000 +%00400000000000000000000000000002000000000003C0301C0703800000000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040001000036030060601C000000000 +%0040000000000000000000000000000200000000000760300E0E01800040000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040002000073030070C00C000000000 +%004000000000000000000000000000020000000000066030060C01C00020000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040004000063030030C000000000000 +%004000000000000000000000000000020000000000067030071C00000010000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040000000063830031C000000000000 +%0040000000000000000000000000000200000000000C3030071800000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000E1830031C00000000FFFF +%FFC0000000000000000000000000000200000000000C3030031800000001FFFF80000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400200000C1830031C00000000FFFF +%FFC0000000000000000000000000000200000000001C1830031800000003FFFF80000000000000 +%0000000000000000000000000000000400 +%0008000000000000000000000000000000000000000000007FF800000C1C30031C000000000000 +%00400000000000000000000000000003FFFFF800001C1830031800000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000001FFC30030C000000000000 +%0040000000000000000000000000000200000000001FFC30071800000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000001FFE30070C00C000000000 +%0040000000000000000000000000000200000000003FFC30061C00C00000000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040000000380630070E00C000000000 +%004000000000000000000000000000020000000000300E30060C01C00000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400020003006300E0701C000000000 +%004000000000000000000000000000020000000000300E300E0E03800020000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400010003007301E07838000000000 +%0040000000000000000000000000000200000000006006301C0707800040000080000000000000 +%0000000000000000000000000000000400 +%0008000000000000000000000000000000000000000000004000000070033FF801FF0000000000 +%00400000000000000000000000000002000000000060073FF803FE000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400004006003BFE0007C0000000000 +%004000000000000000000000000000020000000000E0033FE000FC000100000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400002000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000200000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000800000000000000000000000 +%004000000000000000000000000000020000000000000000000000000800000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000400000000000000000000000 +%004000000000000000000000000000020000000000000000000000001000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000200000000000000000000000 +%004000000000000000000000000000020000000000000000000000002000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000100000000000000000000000 +%004000000000000000000000000000020000000000000000000000004000000080000000000000 +%0000000000000000000000000000000400 +%0008000000000003FF800000000003000000000000000000400000080000000000000000000000 +%00400000000000000000000000000002000000000000000000000000800000008000000000003F +%F800000000003000000000000000000400 +%0008000000000003FFC00000000003000000000000000000400000040000000000000000000000 +%00400000000000000000000000000002000000000000000000000001000000008000000000003F +%FC00000000003000000000000000000400 +%000800000000000300E00000000002000000000000000000400000020000000000000000000000 +%004000000000000000000000000000020000000000000000000000020000000080000000000038 +%0E00000000002000000000000000000400 +%000800000000000300600000000000000000000000000000400000018000000000000000000000 +%0040000000000000000000000000000200000000000000000000000C0000000080000000000030 +%0700000000000000000000000000000400 +%000800000000000300700000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000100000000080000000000030 +%0700000000000000000000000000000400 +%00080000000000030070FE03F03F0330187E000000000000400000002000000000000000000000 +%004000000000000000000000000000020000000000000000000000200000000080000000000030 +%0707E03F03F8338187F000000000000400 +%00080000000000030061EF073873833838E7000000000000400000001000000000000000000000 +%004000000000000000000000000000020000000000000000000000400000000080000000000030 +%070E7073873C31818E7800000000000400 +%000800000000000301E1830E1CE0C3183181800000000000400000000800000000000000000000 +%004000000000000000000000000000020000000000000000000000800000000080000000000038 +%1E1838E0CE0C31831C1800000000000400 +%0008000000000003FF83018C0CC0E3183181C00000000000400000000400000000000000000000 +%00400000000000000000000000000002000000000000000000000100000000008000000000003F +%FC3018C0CC0631C3180C00000000000400 +%0008000000000003FE03019C01C0E30C6381C00000000000400000000200000000000000000000 +%00400000000000000000000000000002000000000000000000000200000000008000000000003F +%F03018C00C0630C3181C00000000000400 +%00080000000000030703FF9C01FFE30C63FFC00000000000400000000100000000000000000000 +%004000000000000000000000000000020000000000000000000004000000000080000000000030 +%383FF8C00FFE30C61FFC00000000000400 +%00080000000000030383001C01C0030C6380000000000000400000000040000000000000000000 +%004000000000000000000000000000020000000000000000000010000000000080000000000030 +%183000C00C003066180000000000000400 +%000800000000000301C3001C01C00306C380000000000000400000000020000000000000000000 +%004000000000000000000000000000020000000000000000000020000000000080000000000030 +%1C3000C00C003066180000000000000400 +%000800000000000300E3018C0CC04306C181800000000000400000000000000000000000010000 +%004000000000000000000000000000020000040000000000000000000000000080000000000030 +%0E3818C0CC06306C180C00000000000400 +%000800000000000300E1838E1CE0C307C1C1800000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000030 +%071838E0CE0E303C1C1C00000000000400 +%00080000000000030071E7073873C30380E7800000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000030 +%071E707387BC30380F7800000000000400 +%00080000000000030030FE03F03F8303807F000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000030 +%0387E03F03F8303807F000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800FFC0000000000030000000000C0000000000000C00400000000000000000000000000000 +%0040000000000000000000000000000200000000000000000000000000000000800FFC00000000 +%00030000000000C0000000000000C00400 +%000800FFF000000000003000C000000C0000000000000C00400000000000000000000000000000 +%0040000000000000000000000000000200000000000000000000000000000000800FFF00000000 +%0003000C000000C0000000000000C00400 +%000800E07800000000003000C000000C0000000000000C00400000000000000000000000000000 +%0040000000000000000000000000000200000000000000000000000000000000800E0780000000 +%0003000C000000C0000000000000C00400 +%000800E01800000000003000C000000C0000000000000C00400000000000000000000000000000 +%0040000000000000000000000000000200000000000000000000000000000000800E01C0000000 +%0003000C000000C0000000000000C00400 +%000800E01C00000000003000C000000C0000000000000C00400000000000000000000000000000 +%0040000000000000000000000000000200000000000000000000000000000000800E00C0000000 +%0003000E000000C0000000000000C00400 +%000800E00C1FC38183FC37E3F0FC1FCDF03F81FE1FC7FC00400000000000000000000000010000 +%0040000000000000000000000000000200000400000000000000000000000000800E00C1FE1818 +%3FE37E1F0FC0FCDF01FC0FE1FC7EC00400 +%000800E00C39E381873C3CE0C1CE1FCF3879C3CF1F8E7C00400000000020000000000000000000 +%0040000000000000000000000000000200000000000000000000200000000000800E00E38E1818 +%73E3EF0C1CF0FCFB879E1CF1F8E7C00400 +%000800E00E7063818C1C3870C3031C0E1C60E3031C1C3C00400000000040000000000000000000 +%0040000000000000000000000000000200000000000000000000100000000000800E00E3071818 +%E1E3830C3030E0E1C6063831C1C1C00400 +%000800E00E0063818C0C3030C7031C0C0CC0600318181C00400000000100000000000000000000 +%0040000000000000000000000000000200000000000000000000040000000000800E00E0071818 +%C0E3030C3038C0C0CE070031C181C00400 +%000800E00E006381980C3030C7039C0C0CC0700718181C00400000000200000000000000000000 +%0040000000000000000000000000000200000000000000000000020000000000800E00E0071818 +%C0E3030C7038C0C0CC0300718180C00400 +%000800E00C1FE381980C3030C7FF9C0C0CC030FF18381C00400000000400000000000000000000 +%0040000000000000000000000000000200000000000000000000010000000000800E00E0FF1819 +%C0E3030C7FF8C0C0EC030FF18180C00400 +%000800E00C3E6381980C3030C7001C0C0CC033E318381C00400000000800000000000000000000 +%0040000000000000000000000000000200000000000000000000008000000000800E00E3E71819 +%C0E3030C7000C0C0EC031E318180C00400 +%000800E00C7063839C0C3030C6001C0C0CC0730318181C00400000001000000000000000000000 +%0040000000000000000000000000000200000000000000000000004000000000800E00C7071818 +%C0E3030C7000C0C0CC0330318180C00400 +%000800E01C6063838C0C3030C7031C0C0CE0670318181C00400000002000000000000000000000 +%0040000000000000000000000000000200000000000000000000002000000000800E01C6071838 +%C0E3030C3030C0C0CE0730318181C00400 +%000800E03860E1878C1C3030C3871C0E1860E707181C3C00400000008000000000000000000000 +%0040000000000000000000000000000200000000000000000000001800000000800E0386071838 +%E1E3030C3830C0E1C706307180C1C00400 +%000800FFF071E1FF877C3030F1CE1C0F3879C39F180E7C00400000010000000000000000000000 +%0040000000000000000000000000000200000000000000000000000400000000800FFF039F1FF8 +%73E3030F1EF0C0FB839E39F180F7C00400 +%000800FFE03F30F983EC303070FC1C0DF01F81FB1807FC00400000020000000000000000000000 +%0040000000000000000000000000000200000000000000000000000200000000800FFE03F30FD8 +%3FE303078FE0C0DF01F81FB9807EC00400 +%0008000000000000000C0000000000000000000000000000400000040000000000000000000000 +%004000000000000000000000000000020000000000000000000000010000000080000000000000 +%00E0000000000000000000000000000400 +%0008000000000000080C0000000000000000000000000000400000080000000000000000000000 +%004000000000000000000000000000020000000000000000000000008000000080000000000000 +%C0C0000000000000000000000000000400 +%00080000000000000C1C0000000000000000000000000000400000100000000000000000000000 +%004000000000000000000000000000020000000000000000000000004000000080000000000000 +%E1C0000000000000000000000000000400 +%000800000000000007F80000000000000000000000000000400000200000000000000000000000 +%004000000000000000000000000000020000000000000000000000002000000080000000000000 +%7F80000000000000000000000000000400 +%000800000000000003E00000000000000000000000000000400000C00000000000000000000000 +%004000000000000000000000000000020000000000000000000000001800000080000000000000 +%1E00000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%0008000000000000000000000000000000000000000000004000020001C03FF801FE0000000000 +%00400000000000000000000000000002000000000003C03FF801FE000200000080000000000000 +%0000000000000000000000000000000400 +%0008000000000000000000000000000000000000000000004000040001E03FFC03FF8000000000 +%00400000000000000000000000000002000000000003C03FFC03FF000100000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000360300E07018000000000 +%00400000000000000000000000000002000000000003E0301C0703800000000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040001000036030070E01C000000000 +%0040000000000000000000000000000200000000000660300E0E01800040000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040002000073030070C00C000000000 +%004000000000000000000000000000020000000000066030060C00800020000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040004000063030030C000000000000 +%004000000000000000000000000000020000000000067030071C00000010000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040010000063830031C000000000000 +%0040000000000000000000000000000200000000000C3030031800000000000080000000000000 +%0000000000000000000000000000000400 +%0008000000000000000000000000000000000000000000007FF800000E1830031C00000000FFFF +%FFC0000000000000000000000000000200000000000C3830031800000001FFFF80000000000000 +%0000000000000000000000000000000400 +%0008000000000000000000000000000000000000000000007FF800000C1C30031C00000000FFFF +%FFC0000000000000000000000000000200000800001C1830031800000001FFFF80000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400200000C1C30031C000000000000 +%00400000000000000000000000000003FFFFF800001C1830031800000002000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000001FFC30030C000000000000 +%0040000000000000000000000000000200000000001FFC30071C00000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000001FFE30070C00C000000000 +%0040000000000000000000000000000200000000003FFC30060C00C00000000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040000000380630070E00C000000000 +%004000000000000000000000000000020000000000300E30060C01C00000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400020003007300E0701C000000000 +%004000000000000000000000000000020000000000300E300E0E03800020000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000003007383C03C78000000000 +%0040000000000000000000000000000200000000006006303C0787000000000080000000000000 +%0000000000000000000000000000000400 +%0008000000000000000000000000000000000000000000004000000070033FF801FF0000000000 +%00400000000000000000000000000002000000000060073FF803FE000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400004006003BFE0007C0000000000 +%004000000000000000000000000000020000000000E0033FE000F8000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000800000000000000000000000 +%004000000000000000000000000000020000000000000000000000000800000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000400000000000000000000000 +%004000000000000000000000000000020000000000000000000000001000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000100000000000000000000000 +%004000000000000000000000000000020000000000000000000000004000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000080000000000000000000000 +%004000000000000000000000000000020000000000000000000000008000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000020000000000000000000000 +%004000000000000000000000000000020000000000000000000000020000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000018000000000000000000000 +%0040000000000000000000000000000200000000000000000000000C0000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000004000000000000000000000 +%004000000000000000000000000000020000000000000000000000100000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000002000000000000000000000 +%004000000000000000000000000000020000000000000000000000200000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000001000000000000000000000 +%004000000000000000000000000000020000000000000000000000400000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000800000000000000000000 +%004000000000000000000000000000020000000000000000000000800000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000400000000000000000000 +%004000000000000000000000000000020000000000000000000001000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000200000000000000000000 +%004000000000000000000000000000020000000000000000000002000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000080000000000000000000 +%004000000000000000000000000000020000000000000000000008000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000040000000000000000000 +%004000000000000000000000000000020000000000000000000010000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000020000000000000000000 +%004000000000000000000000000000020000000000000000000020000000000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040000000001FFFFFFFFFFFFFFF0000 +%00400000000000000000000000000002000007FFFFFFFFFFFFFFC0000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFC00000000000000000000000000000 +%0040000000000000000000000000000200000000000000000000000000000000FFFFFFFFFFFFFF +%FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFC00 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0040000007FF9FF8007C001C000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0040000007FF9FFE01FF801C000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0040000007001C0F0383C03E000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0040000006001C070700C036000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0040000006001C030E00C036000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0040000006001C030C000063000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0040000006001C031C000063000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0040000007001C071C0000E3800000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0040000007FF1FFE1C0FE0C1800000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0040000007FE1FFC1C0FE0C1800000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0040000006001C001C00E1FFC00000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0040000006001C000C0061FFC00000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0040000006001C000C006380E00000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0040000006001C000E006300600000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0040000006001C000781E300700000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0040000006001C0003FFC700700000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0040000006001C0000FF0600300000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFC00000000000000000000000000000 +%00400000000000000000000000000002000000000000000000000000000000007FFFFFFFFFFFFF +%FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFC00 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040000000001FFFFFFFFFFFFFFF0000 +%00400000000000000000000000000002000007FFFFFFFFFFFFFFC0000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000080000000000000000000 +%004000000000000000000000000000020000000000000000000008000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000002000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000008000000000000000000000 +%004000000000000000000000000000020000000000000000000000080000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000010000000000000000000000 +%004000000000000000000000000000020000000000000000000000040000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000040000000000000000000000 +%004000000000000000000000000000020000000000000000000000010000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000080000000000000000000000 +%004000000000000000000000000000020000000000000000000000008000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000200000000000000000000000 +%004000000000000000000000000000020000000000000000000000002000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000C00000000000000000000000 +%004000000000000000000000000000020000000000000000000000001800000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400001003FE00060007C0000000000 +%0040000000000000000000000000000200000000003FE000E00078000400000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400002003FF800F001FF0000000000 +%0040000000000000000000000000000200000000003FF800E001FE000200000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040000400383E00F003C78000000000 +%004000000000000000000000000000020000000000303C01E00787000100000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040000800380E01F80701C000000000 +%004000000000000000000000000000020000000000300E01B00E03800080000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040001000380701980E00C000000000 +%004000000000000000000000000000020000000000300601B00C01C00040000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040002000380301980C008000000000 +%004000000000000000000000000000020000000000300703181C00800020000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400080003803039C0C000000000000 +%004000000000000000000000000000020000000000300303181C00000008000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400100003803830C1C000000000000 +%0040000000000000000000000000000200000000003003071C1800000004000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000003803830C1C000000008000 +%0040000000000000000000000000000200000800003003060C1800000000000080000000000000 +%0000000000000000000000000000000400 +%0008000000000000000000000000000000000000000000007FFC0000380386061C00000000FFFF +%FFC00000000000000000000000000003FFFFF800003003060C1800000001FFFF80000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040020000380387FE1C000000000000 +%00400000000000000000000000000002000000000030030FFE1800000002000080000000000000 +%0000000000000000000000000000000400 +%0008000000000000000000000000000000000000000000004000000038030FFF0C000000000000 +%00400000000000000000000000000002000000000030070FFE1C00000004000080000000000000 +%0000000000000000000000000000000400 +%0008000000000000000000000000000000000000000000004000C00038030C030C00C000000000 +%00400000000000000000000000000002000000000030061C070C00C00018000080000000000000 +%0000000000000000000000000000000400 +%0008000000000000000000000000000000000000000000004000000038070C030E01C000000000 +%004000000000000000000000000000020000000000300618030E01C00000000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040000000380E1C038701C000000000 +%004000000000000000000000000000020000000000300E18038703800000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400008003FFC180183FF8000000000 +%0040000000000000000000000000000200000000003FFC380387FF000080000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000003FF83801C1FE0000000000 +%0040000000000000000000000000000200000000003FF8300181FE000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400002000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000200000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400001000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000400000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000800000000000000000000000 +%004000000000000000000000000000020000000000000000000000000800000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000007FFE00000000000000000C100000000000400000000000000000000000000000 +%0040000000000000000000000000000200000000000000000000000000000000800000000003FF +%E00000000000000000C100000000000400 +%000800000000003FFE00000000000000000C300000000000400000004000000000000000000000 +%0040000000000000000000000000000200000000000000000000001000000000800000000003FF +%E00000000000000000C300000000000400 +%0008000000000001C0000000000000000000300000000000400000002000000000000000000000 +%00400000000000000000000000000002000000000000000000000020000000008000000000000C +%0000000000000000000300000000000400 +%0008000000000001C0000000000000000000300000000000400000000000000000000000000000 +%00400000000000000000000000000002000000000000000000000000000000008000000000000C +%0000000000000000000300000000000400 +%0008000000000001C0670F833C03C19E1C0CFC0000000000400000000800000000000000000000 +%00400000000000000000000000000002000000000000000000000000000000008000000000000C +%0270F811C03C09E1C0CFC0000000000400 +%0008000000000001C07F3FE3FF0FE1FF7F0CFC0000000000400000000400000000000000000000 +%00400000000000000000000000000002000000000000000000000100000000008000000000000C +%07F1FE1FF0FF1FF3F0CFC0000000000400 +%0008000000000001C07A30E3C31C31E3C70C300000000000400000000100000000000000000000 +%00400000000000000000000000000002000000000000000000000400000000008000000000000C +%0783061C38C31E3E30C300000000000400 +%0008000000000001C0707063839831C1830C300000000000400000000080000000000000000000 +%00400000000000000000000000000002000000000000000000000800000000008000000000000C +%0703071819C11C1C38C300000000000400 +%0008000000000001C0700063819C01C1830C300000000000400000000040000000000000000000 +%00400000000000000000000000000002000000000000000000001000000000008000000000000C +%0700071819C01C1818C300000000000400 +%0008000000000001C06003E3818F8181830C300000000000400000000000000000000000000000 +%00400000000000000000000000000002000000000000000000000000000000008000000000000C +%07001F1818F81C1818C300000000000400 +%0008000000000001C0603FE38187F181830C30000000000040000000001FFFFFFFFFFFFFFF0000 +%00400000000000000000000000000002000007FFFFFFFFFFFFFFC000000000008000000000000C +%0701FF18187F1C1818C300000000000400 +%0008000000000001C06078638180F181830C300000000000400000000000000000000000000000 +%00400000000000000000000000000002000000000000000000000000000000008000000000000C +%0703C718180F9C1818C300000000000400 +%0008000000000001C060606381803981830C300000000000400000000000000000000000000000 +%00400000000000000000000000000002000000000000000000000000000000008000000000000C +%0707071818019C1818C300000000000400 +%0008000000000001C060606381981981830C300000000000400000000000000000000000000000 +%00400000000000000000000000000002000000000000000000000000000000008000000000000C +%0706071819819C1818C300000000000400 +%0008000000000001C06060E3819C3981830C300000000000400000000000000000000000000000 +%00400000000000000000000000000002000000000000000000000000000000008000000000000C +%07070F1819C39C1818C300000000000400 +%0008000000000001C0607FE3818FF181830C3C0000000000400000000000000000000000000000 +%00400000000000000000000000000002000000000000000000000000000000008000000000000C +%0703FF1818FF1C1818C3C0000000000400 +%0008000000000001C0601E338187C181830C1C0000000000400000000000000000000000000000 +%00400000000000000000000000000002000000000000000000000000000000008000000000000C +%0701F318183E1C1818C1C0000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800FFE0000000000030004000000C0000000000000C00400000000000000000000000000000 +%0040000000000000000000000000000200000000000000000000000000000000800FFE00000000 +%00030004000000C0000000000000C00400 +%000800FFF000000000003000C000000C0000000000000C00400000000000000000000000000000 +%0040000000000000000000000000000200000000000000000000000000000000800FFF00000000 +%0003000C000000C0000000000000C00400 +%000800E03800000000003000C000000C0000000000000C00400000000000000000000000000000 +%0040000000000000000000000000000200000000000000000000000000000000800E0380000000 +%0003000C000000C0000000000000C00400 +%000800E01C00000000003000C000000C0000000000000C00400000000000000000000000000000 +%0040000000000000000000000000000200000000000000000000000000000000800E01C0000000 +%0003000C000000C0000000000000C00400 +%000800E00C0F838181EC33C3F07819CCE00F007C1B83CC0040000000001FFFFFFFFFFFFFFF0000 +%00400000000000000000000000000002000007FFFFFFFFFFFFFFC00000000000800E00C0F81818 +%1E633C1F0780DCCE00F007C1BC3CC00400 +%000800E00C3FE38187FC3FE3F1FE1FCFF83FC1FE1F8FFC00400000000000000000000000000000 +%0040000000000000000000000000000200000000000000000000000000000000800E00E1FE1818 +%7FE3FE1F1FE0FCFF83FC1FE1FC7FC00400 +%000800E00E30E3818E1C3870C3871E0E1870E3871E9C3C00400000000040000000000000000000 +%0040000000000000000000000000000200000000000000000000100000000000800E00E3061818 +%61E3870C3870E0F1C70E3871E0C3C00400 +%000800E00E7063818C0C3030C3031C0E1CE063031C181C00400000000080000000000000000000 +%0040000000000000000000000000000200000000000000000000080000000000800E00E3071818 +%C0E3030C3030C0E0C6063031C1C1C00400 +%000800E00E0063819C0C3030C6031C0C0CC0700318181C00400000000000000000000000000000 +%0040000000000000000000000000000200000000000000000000000000000000800E00E0071818 +%C0E3030C3038C0C0CC0300318181C00400 +%000800E00E03E381980C3030C7FF9C0C0CC0303F18381C00400000000400000000000000000000 +%0040000000000000000000000000000200000000000000000000010000000000800E00E03F1819 +%C0E3030C7FF8C0C0EC0301F18180C00400 +%000800E00C3FE381980C3030C7FF9C0C0CC031FF18381C00400000000000000000000000000000 +%0040000000000000000000000000000200000000000000000000000000000000800E00E1FF1819 +%C0E3030C7FF8C0C0EC031FF18180C00400 +%000800E00C786383980C3030C6001C0C0CC033C318381C00400000000000000000000000000000 +%0040000000000000000000000000000200000000000000000000000000000000800E00C3871819 +%C0E3030C7000C0C0EC033C318180C00400 +%000800E01C6063839C0C3030C7001C0C0CC0770318181C00400000002000000000000000000000 +%0040000000000000000000000000000200000000000000000000002000000000800E00C7071818 +%C0E3030C7000C0C0CC0330318180C00400 +%000800E0186063838C0C3030C3031C0C1CE0670718181C00400000004000000000000000000000 +%0040000000000000000000000000000200000000000000000000000000000000800E01C6071838 +%C0E3030C3038C0E0C606303181C1C00400 +%000800E07870E1878E1C3030C3871C0E1870E70F180C3C00400000008000000000000000000000 +%0040000000000000000000000000000200000000000000000000000800000000800E07870F1C78 +%E1E3030C3870C0E1C70E307180C3C00400 +%000800FFF03FF1FD87FC3030F1FE1C0FF03FC3FF180FFC00400000000000000000000000000000 +%0040000000000000000000000000000200000000000000000000000000000000800FFF03FF0FD8 +%7FE3030F1FE0C0FF83FC3FF1807FC00400 +%000800FFC01E307981EC303070781C0DE01F01F39803CC00400000000000000000000000000000 +%0040000000000000000000000000000200000000000000000000000000000000800FFC01F30798 +%1EE3030787C0C0CE00F00F19803CC00400 +%0008000000000000000C0000000000000000000000000000400000040000000000000000000000 +%004000000000000000000000000000020000000000000000000000010000000080000000000000 +%00C0000000000000000000000000000400 +%00080000000000000C0C0000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%C0C0000000000000000000000000000400 +%00080000000000000E380000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%F3C0000000000000000000000000000400 +%000800000000000007F00000000000000000000000000000400000200000000000000000000000 +%004000000000000000000000000000020000000000000000000000002000000080000000000000 +%7F80000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400001003FF00060007C0000000000 +%0040000000000000000000000000000200000000003FE000E000FC000400000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400002003FFC00F001FF0000000000 +%0040000000000000000000000000000200000000003FF800E003FE000200000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040000000381E00F003838000000000 +%004000000000000000000000000000020000000000301C01F00787800000000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040000800380601F80701C000000000 +%004000000000000000000000000000020000000000300E01B00E03800080000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040001000380701980E00C000000000 +%004000000000000000000000000000020000000000300603B00C01C00040000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040004000380301980C000000000000 +%004000000000000000000000000000020000000000300703181C00000010000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400080003803031C0C000000000000 +%004000000000000000000000000000020000000000300303181800000008000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400100003803830C1C000000000000 +%0040000000000000000000000000000200000000003003071C1800000004000080000000000000 +%0000000000000000000000000000000400 +%0008000000000000000000000000000000000000000000007FFA00003803870E1C00000000FFFF +%FFC00000000000000000000000000003FFFFF800003003060C1800000003FFFF80000000000000 +%0000000000000000000000000000000400 +%0008000000000000000000000000000000000000000000007FFC0000380386061C00000000FFFF +%FFC00000000000000000000000000003FFFFF800003003060C1800000001FFFF80000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040020000380307FE0C000000000000 +%00400000000000000000000000000002000000000030030FFE1800000002000080000000000000 +%0000000000000000000000000000000400 +%0008000000000000000000000000000000000000000000004001000038030FFF0C00C000000000 +%00400000000000000000000000000002000000000030070FFE1C00800004000080000000000000 +%0000000000000000000000000000000400 +%0008000000000000000000000000000000000000000000004000C00038030C030C00C000000000 +%00400000000000000000000000000002000000000030061C070C01C00018000080000000000000 +%0000000000000000000000000000000400 +%0008000000000000000000000000000000000000000000004000000038070C038601C000000000 +%004000000000000000000000000000020000000000300E18030E01800000000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040001000380E1C0387038000000000 +%004000000000000000000000000000020000000000301E18038703800040000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400008003FFC180183FF8000000000 +%0040000000000000000000000000000200000000003FFC380387FF000080000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000003FF83801C1FE0000000000 +%0040000000000000000000000000000200000000003FF0300181FE000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400002000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000200000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400001000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000400000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000800000000000000000000000 +%004000000000000000000000000000020000000000000000000000000800000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000200000000000000000000000 +%004000000000000000000000000000020000000000000000000000002000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000040000000000000000000000 +%004000000000000000000000000000020000000000000000000000010000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000100000000000000000000 +%004000000000000000000000000000020000000000000000000004000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000080000000000000000000 +%004000000000000000000000000000020000000000000000000008000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000040000000000000000000 +%004000000000000000000000000000020000000000000000000010000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%00080000000000000000000000000000000000000000000040000000001FFFFFFFFFFFFFFF0000 +%00400000000000000000000000000002000007FFFFFFFFFFFFFFC0000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000800000000000000000000000000000000000000000000400000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000080000000000000 +%0000000000000000000000000000000400 +%000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFC00000000000000000000000000000 +%00400000000000000000000000000002000000000000000000000000000000007FFFFFFFFFFFFF +%FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFC00 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%004000000000000000000000000000020000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%007FFFFFFFFFFFFFFFFFFFFFFFFFFFFE0000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%000000000000000000000000000000000000000000000000000000000000000000000000000000 +%0000000000000000000000000000000000 +%%EndPreview +%%BeginProlog +%%BeginResource: SDRes +/b4_inc_state save def +/dict_count countdictstack def +/op_count count 1 sub def +userdict begin +0 setgray 0 setlinecap 1 setlinewidth 0 setlinejoin 10 setmiterlimit[] 0 setdash newpath +/languagelevel where {pop languagelevel 1 ne {false setstrokeadjust false setoverprint} if} if +/bdef {bind def} bind def +/c {setgray} bdef +/l {neg lineto} bdef +/rl {neg rlineto} bdef +/lc {setlinecap} bdef +/lj {setlinejoin} bdef +/lw {setlinewidth} bdef +/ml {setmiterlimit} bdef +/ld {setdash} bdef +/m {neg moveto} bdef +/ct {6 2 roll neg 6 2 roll neg 6 2 roll neg curveto} bdef +/r {rotate} bdef +/t {neg translate} bdef +/s {scale} bdef +/sw {show} bdef +/gs {gsave} bdef +/gr {grestore} bdef +/f {findfont dup length dict begin +{1 index /FID ne {def} {pop pop} ifelse} forall /Encoding ISOLatin1Encoding def +currentdict end /NFont exch definefont pop /NFont findfont} bdef +/p {closepath} bdef +/sf {scalefont setfont} bdef +/ef {eofill}bdef +/pc {closepath stroke}bdef +/ps {stroke}bdef +/pum {matrix currentmatrix}bdef +/pom {setmatrix}bdef +/bs {/aString exch def /nXOfs exch def /nWidth exch def currentpoint nXOfs 0 rmoveto pum nWidth aString stringwidth pop div 1 scale aString show pom moveto} bdef +%%EndResource +%%EndProlog +%%BeginSetup +%%EndSetup +%%Page: 1 1 +%%BeginPageSetup +%%EndPageSetup +pum +0.02834 0.02833 s +0 -20290 t +/tm matrix currentmatrix def +gs +tm setmatrix +-635 -635 t +1 1 s +635 635 m 27274 635 l 27274 20924 l 635 20924 l 635 635 l eoclip newpath +0.996 c 7835 7938 m 8893 6985 l 11010 6985 l 11010 8890 l 8893 8890 l +7835 7938 l p ef +0 lw 1 lj 0.000 c 7835 7938 m 8893 6985 l 11010 6985 l 11010 8890 l 8893 8890 l +7835 7938 l pc +gs +pum +8520 8228 t +-1 0 m 231 -605 l 317 -605 l 565 0 l 474 0 l 403 -183 l 150 -183 l +83 0 l p +173 -248 m 378 -248 l 315 -416 l 296 -467 282 -509 272 -541 ct 264 -503 254 -464 240 -426 ct +p ef +621 0 m 621 -605 l 829 -605 l 876 -605 912 -602 937 -596 ct 972 -588 1001 -574 1026 -553 ct +1058 -526 1082 -492 1098 -450 ct 1114 -408 1121 -360 1121 -306 ct 1121 -260 1116 -219 1105 -183 ct +1095 -148 1081 -118 1064 -95 ct 1047 -72 1029 -54 1009 -40 ct 989 -27 965 -17 937 -10 ct +908 -3 876 0 839 0 ct p +701 -71 m 830 -71 l 870 -71 901 -75 924 -82 ct 947 -90 965 -100 979 -114 ct +998 -133 1012 -158 1023 -190 ct 1034 -222 1039 -261 1039 -307 ct 1039 -370 1028 -419 1008 -453 ct +987 -487 962 -510 932 -521 ct 910 -530 876 -534 828 -534 ct 701 -534 l p ef +1661 -212 m 1741 -192 l 1724 -126 1694 -76 1650 -41 ct 1607 -6 1553 10 1490 10 ct +1425 10 1372 -2 1331 -29 ct 1290 -56 1259 -94 1238 -145 ct 1216 -195 1206 -249 1206 -307 ct +1206 -370 1218 -425 1242 -472 ct 1266 -519 1300 -554 1345 -579 ct 1389 -603 1438 -615 1491 -615 ct +1552 -615 1603 -600 1644 -569 ct 1686 -538 1714 -495 1731 -439 ct 1652 -420 l +1638 -465 1617 -497 1591 -517 ct 1564 -537 1530 -547 1490 -547 ct 1443 -547 1404 -536 1373 -513 ct +1342 -491 1320 -461 1307 -424 ct 1295 -386 1288 -347 1288 -307 ct 1288 -256 1296 -211 1311 -172 ct +1326 -134 1349 -105 1381 -86 ct 1412 -67 1447 -58 1484 -58 ct 1529 -58 1567 -71 1598 -97 ct +1629 -122 l 1650 -161 l p ef +pom +gr +13955 5080 m 11733 5080 l 11733 1270 l 16178 1270 l 16178 5080 l 13955 5080 l +pc +gs +pum +13176 2513 t +69 0 m 69 -605 l 477 -605 l 477 -534 l 149 -534 l 149 -346 l 433 -346 l +433 -275 l 149 -275 l 149 0 l p ef +532 0 m 766 -315 l 560 -605 l 655 -605 l 765 -450 l 788 -418 804 -393 814 -375 ct +827 -397 843 -420 862 -444 ct 984 -605 l 1071 -605 l 858 -320 l 1087 0 l +988 0 l 836 -216 l 827 -228 818 -241 809 -256 ct 796 -234 786 -219 780 -211 ct +628 0 l p ef +1510 -71 m 1510 0 l 1110 0 l 1110 -17 1112 -35 1119 -51 ct 1129 -78 1145 -105 1168 -132 ct +1190 -158 1223 -189 1265 -223 ct 1331 -277 1375 -320 1398 -352 ct 1422 -383 1433 -413 1433 -441 ct +1433 -471 1423 -495 1402 -516 ct 1380 -536 1353 -546 1319 -546 ct 1283 -546 1255 -535 1233 -514 ct +1212 -492 1201 -463 1201 -425 ct 1124 -432 l 1129 -489 1149 -533 1183 -563 ct +1217 -593 1263 -608 1321 -608 ct 1379 -608 1425 -591 1459 -559 ct 1493 -527 1510 -487 1510 -439 ct +1510 -415 1505 -391 1495 -368 ct 1485 -345 1468 -320 1445 -294 ct 1422 -268 1384 -233 1331 -187 ct +1286 -150 1257 -125 1245 -111 ct 1232 -98 1222 -84 1213 -71 ct p ef +pom +pum +12713 3466 t +462 -605 m 542 -605 l 542 -255 l 542 -194 535 -146 522 -110 ct 508 -74 483 -45 447 -23 ct +411 0 364 10 306 10 ct 249 10 202 0 166 -19 ct 130 -38 105 -66 89 -103 ct 74 -140 66 -191 66 -255 ct +66 -605 l 146 -605 l 146 -256 l 146 -203 151 -164 161 -139 ct 171 -114 187 -95 211 -82 ct +235 -68 264 -61 299 -61 ct 358 -61 400 -75 425 -102 ct 450 -128 462 -180 462 -256 ct +p ef +673 -194 m 748 -201 l 752 -170 760 -146 773 -126 ct 786 -107 806 -91 834 -79 ct +862 -67 893 -61 927 -61 ct 958 -61 985 -66 1008 -75 ct 1031 -84 1049 -96 1060 -112 ct +1072 -128 1077 -145 1077 -164 ct 1077 -183 1072 -200 1061 -214 ct 1050 -228 1032 -240 1006 -249 ct +990 -256 954 -266 898 -279 ct 843 -292 804 -305 782 -317 ct 753 -332 731 -351 717 -373 ct +703 -396 696 -421 696 -449 ct 696 -479 704 -508 722 -534 ct 739 -561 764 -581 798 -595 ct +831 -609 868 -615 909 -615 ct 954 -615 993 -608 1028 -594 ct 1062 -579 1088 -558 1107 -530 ct +1125 -502 1135 -470 1136 -434 ct 1060 -429 l 1055 -467 1041 -496 1018 -515 ct +994 -535 959 -545 912 -545 ct 864 -545 828 -536 806 -518 ct 784 -500 773 -479 773 -454 ct +773 -432 781 -414 796 -400 ct 812 -386 852 -372 917 -357 ct 982 -342 1027 -329 1051 -318 ct +1087 -302 1113 -282 1129 -257 ct 1146 -232 1155 -203 1155 -171 ct 1155 -138 1145 -108 1127 -79 ct +1108 -51 1082 -29 1047 -13 ct 1013 2 974 10 931 10 ct 876 10 830 2 793 -13 ct 756 -29 727 -53 706 -85 ct +685 -117 l 674 -154 l p ef +1278 0 m 1278 -605 l 1506 -605 l 1552 -605 1589 -599 1617 -587 ct 1645 -574 1667 -556 1683 -530 ct +1699 -505 1706 -478 1706 -450 ct 1706 -424 1699 -400 1685 -377 ct 1671 -354 1650 -336 1622 -322 ct +1658 -311 1687 -293 1706 -267 ct 1726 -241 1736 -210 1736 -175 ct 1736 -147 1730 -120 1718 -96 ct +1706 -72 1691 -53 1673 -40 ct 1656 -26 1634 -16 1607 -10 ct 1580 -3 1548 0 1509 0 ct +p +1359 -351 m 1490 -351 l 1525 -351 1551 -353 1566 -358 ct 1586 -364 1602 -374 1612 -388 ct +1622 -402 1628 -419 1628 -441 ct 1628 -461 1623 -478 1613 -494 ct 1603 -509 1590 -520 1572 -525 ct +1554 -531 1523 -534 1480 -534 ct 1359 -534 l p +1359 -71 m 1509 -71 l 1535 -71 1553 -72 1564 -74 ct 1582 -77 1598 -83 1610 -90 ct +1623 -98 1633 -109 1641 -124 ct 1649 -139 1653 -156 1653 -175 ct 1653 -198 1647 -217 1635 -234 ct +1624 -251 1608 -262 1587 -269 ct 1567 -276 1537 -279 1499 -279 ct 1359 -279 l +p ef +2436 -71 m 2436 0 l 2036 0 l 2036 -17 2038 -35 2045 -51 ct 2055 -78 2071 -105 2094 -132 ct +2116 -158 2149 -189 2191 -223 ct 2257 -277 2301 -320 2324 -352 ct 2348 -383 2359 -413 2359 -441 ct +2359 -471 2349 -495 2328 -516 ct 2306 -536 2279 -546 2245 -546 ct 2209 -546 2181 -535 2159 -514 ct +2138 -492 2127 -463 2127 -425 ct 2050 -432 l 2055 -489 2075 -533 2109 -563 ct +2143 -593 2189 -608 2247 -608 ct 2305 -608 2351 -591 2385 -559 ct 2419 -527 2436 -487 2436 -439 ct +2436 -415 2431 -391 2421 -368 ct 2411 -345 2394 -320 2371 -294 ct 2348 -268 2310 -233 2257 -187 ct +2212 -150 2183 -125 2171 -111 ct 2158 -98 2148 -84 2139 -71 ct p ef +pom +pum +12091 4419 t +497 -212 m 577 -192 l 560 -126 530 -76 486 -41 ct 443 -6 389 10 326 10 ct +261 10 208 -2 167 -29 ct 126 -56 95 -94 74 -145 ct 52 -195 42 -249 42 -307 ct 42 -370 54 -425 78 -472 ct +102 -519 136 -554 181 -579 ct 225 -603 274 -615 327 -615 ct 388 -615 439 -600 480 -569 ct +522 -538 550 -495 567 -439 ct 488 -420 l 474 -465 453 -497 427 -517 ct 400 -537 366 -547 326 -547 ct +279 -547 240 -536 209 -513 ct 178 -491 156 -461 143 -424 ct 131 -386 124 -347 124 -307 ct +124 -256 132 -211 147 -172 ct 162 -134 185 -105 217 -86 ct 248 -67 283 -58 320 -58 ct +365 -58 403 -71 434 -97 ct 465 -122 l 486 -161 l p ef +663 -219 m 663 -300 685 -360 730 -399 ct 768 -432 814 -448 868 -448 ct 929 -448 978 -428 1016 -389 ct +1054 -349 1074 -295 1074 -225 ct 1074 -169 1065 -124 1048 -92 ct 1031 -59 1007 -34 974 -16 ct +942 0 907 9 868 9 ct 807 9 757 -9 719 -49 ct 682 -88 l 663 -145 l p +739 -219 m 739 -163 751 -121 776 -93 ct 800 -65 831 -51 868 -51 ct 905 -51 936 -65 960 -93 ct +985 -121 997 -164 997 -221 ct 997 -276 985 -317 960 -345 ct 936 -373 905 -387 868 -387 ct +831 -387 800 -373 776 -345 ct 751 -317 l 739 -275 l p ef +1166 0 m 1166 -438 l 1233 -438 l 1233 -376 l 1265 -424 1312 -448 1373 -448 ct +1399 -448 1424 -443 1446 -434 ct 1468 -424 1484 -412 1495 -396 ct 1507 -381 1514 -363 1519 -342 ct +1521 -328 1523 -304 1523 -269 ct 1523 0 l 1448 0 l 1448 -266 l 1448 -297 1446 -319 1440 -334 ct +1434 -349 1424 -361 1409 -370 ct 1394 -379 1377 -384 1357 -384 ct 1325 -384 1298 -374 1275 -354 ct +1252 -333 1241 -295 1241 -239 ct 1241 0 l p ef +1806 -66 m 1816 0 l 1795 3 1777 5 1760 5 ct 1733 5 1712 1 1697 -7 ct 1683 -15 1672 -26 1666 -40 ct +1660 -54 1657 -83 1657 -128 ct 1657 -380 l 1602 -380 l 1602 -438 l 1657 -438 l +1657 -547 l 1731 -591 l 1731 -438 l 1806 -438 l 1806 -380 l 1731 -380 l +1731 -124 l 1731 -103 1732 -89 1735 -83 ct 1737 -77 1742 -72 1748 -68 ct 1753 -65 1762 -63 1773 -63 ct +1781 -63 l 1792 -64 l p ef +1880 0 m 1880 -438 l 1947 -438 l 1947 -372 l 1964 -403 1980 -423 1995 -433 ct +2009 -443 2025 -448 2042 -448 ct 2067 -448 2093 -440 2119 -424 ct 2093 -355 l +2075 -366 2057 -371 2039 -371 ct 2022 -371 2008 -366 1995 -357 ct 1982 -347 1973 -333 1967 -316 ct +1959 -289 1955 -261 1955 -229 ct 1955 0 l p ef +2145 -219 m 2145 -300 2167 -360 2212 -399 ct 2250 -432 2296 -448 2350 -448 ct +2411 -448 2460 -428 2498 -389 ct 2536 -349 2556 -295 2556 -225 ct 2556 -169 2547 -124 2530 -92 ct +2513 -59 2489 -34 2456 -16 ct 2424 0 2389 9 2350 9 ct 2289 9 2239 -9 2201 -49 ct +2164 -88 l 2145 -145 l p +2221 -219 m 2221 -163 2233 -121 2258 -93 ct 2282 -65 2313 -51 2350 -51 ct 2387 -51 2418 -65 2442 -93 ct +2467 -121 2479 -164 2479 -221 ct 2479 -276 2467 -317 2442 -345 ct 2418 -373 2387 -387 2350 -387 ct +2313 -387 2282 -373 2258 -345 ct 2233 -317 l 2221 -275 l p ef +2647 0 m 2647 -605 l 2721 -605 l 2721 0 l p ef +2832 0 m 2832 -605 l 2906 -605 l 2906 0 l p ef +3319 -141 m 3395 -131 l 3383 -86 3361 -52 3328 -27 ct 3295 -2 3253 9 3203 9 ct +3138 9 3087 -9 3050 -49 ct 3012 -88 2993 -144 2993 -215 ct 2993 -289 3012 -346 3050 -387 ct +3089 -428 3138 -448 3198 -448 ct 3257 -448 3305 -428 3342 -388 ct 3379 -348 3398 -292 3398 -220 ct +3398 -215 3398 -209 3397 -200 ct 3070 -200 l 3073 -152 3087 -115 3111 -89 ct +3136 -64 3166 -51 3203 -51 ct 3230 -51 3253 -58 3273 -72 ct 3292 -87 l 3307 -109 l +p +3074 -261 m 3319 -261 l 3316 -298 3307 -326 3291 -344 ct 3268 -373 3237 -387 3199 -387 ct +3165 -387 3136 -376 3113 -353 ct 3090 -330 l 3077 -299 l p ef +3494 0 m 3494 -438 l 3561 -438 l 3561 -372 l 3578 -403 3594 -423 3609 -433 ct +3623 -443 3639 -448 3656 -448 ct 3681 -448 3707 -440 3733 -424 ct 3707 -355 l +3689 -366 3671 -371 3653 -371 ct 3636 -371 3622 -366 3609 -357 ct 3596 -347 3587 -333 3581 -316 ct +3573 -289 3569 -261 3569 -229 ct 3569 0 l p ef +pom +gr +13956 19115 m 11900 19115 l 11900 6350 l 16013 6350 l 16013 19115 l +13956 19115 l pc +gs +pum +12806 13017 t +69 0 m 69 -605 l 477 -605 l 477 -534 l 149 -534 l 149 -346 l 433 -346 l +433 -275 l 149 -275 l 149 0 l p ef +594 0 m 594 -605 l 822 -605 l 862 -605 893 -603 914 -599 ct 944 -594 969 -585 989 -571 ct +1009 -557 1025 -538 1038 -513 ct 1050 -488 1056 -460 1056 -430 ct 1056 -378 1040 -335 1007 -299 ct +974 -264 915 -246 829 -246 ct 674 -246 l 674 0 l p +674 -317 m 830 -317 l 882 -317 919 -327 941 -346 ct 963 -365 973 -392 973 -427 ct +973 -453 967 -474 954 -493 ct 941 -511 925 -522 904 -528 ct 890 -532 865 -534 829 -534 ct +674 -534 l p ef +1433 -237 m 1433 -308 l 1690 -308 l 1690 -84 l 1650 -52 1610 -29 1568 -13 ct +1526 2 1483 10 1439 10 ct 1379 10 1325 -2 1277 -27 ct 1228 -53 1191 -90 1167 -138 ct +1142 -186 1130 -240 1130 -299 ct 1130 -358 1142 -413 1167 -464 ct 1191 -516 1227 -553 1273 -578 ct +1319 -603 1372 -615 1433 -615 ct 1477 -615 1516 -608 1551 -594 ct 1587 -580 1615 -560 1635 -535 ct +1655 -510 1670 -476 1681 -436 ct 1608 -416 l 1599 -447 1588 -471 1574 -489 ct +1561 -506 1542 -520 1517 -531 ct 1492 -542 1464 -547 1433 -547 ct 1397 -547 1365 -541 1338 -530 ct +1311 -519 1290 -504 1273 -486 ct 1257 -468 1244 -448 1235 -426 ct 1220 -389 1212 -348 1212 -304 ct +1212 -250 1221 -205 1240 -169 ct 1259 -133 1286 -106 1321 -88 ct 1357 -70 1394 -61 1434 -61 ct +1469 -61 1503 -68 1536 -82 ct 1569 -95 1594 -109 1611 -124 ct 1611 -237 l p ef +1745 0 m 1977 -605 l 2063 -605 l 2311 0 l 2220 0 l 2149 -183 l 1896 -183 l +1829 0 l p +1919 -248 m 2124 -248 l 2061 -416 l 2042 -467 2028 -509 2018 -541 ct 2010 -503 2000 -464 1986 -426 ct +p ef +pom +gr +0.996 c 7835 17258 m 8893 16305 l 11010 16305 l 11010 18210 l 8893 18210 l +7835 17258 l p ef +0.000 c 7835 17258 m 8893 16305 l 11010 16305 l 11010 18210 l 8893 18210 l +7835 17258 l pc +gs +pum +8520 17542 t +65 0 m 65 -605 l 273 -605 l 320 -605 356 -602 381 -596 ct 416 -588 445 -574 470 -553 ct +502 -526 526 -492 542 -450 ct 558 -408 565 -360 565 -306 ct 565 -260 560 -219 549 -183 ct +539 -148 525 -118 508 -95 ct 491 -72 473 -54 453 -40 ct 433 -27 409 -17 381 -10 ct +352 -3 320 0 283 0 ct p +145 -71 m 274 -71 l 314 -71 345 -75 368 -82 ct 391 -90 409 -100 423 -114 ct +442 -133 456 -158 467 -190 ct 478 -222 483 -261 483 -307 ct 483 -370 472 -419 452 -453 ct +431 -487 406 -510 376 -521 ct 354 -530 320 -534 272 -534 ct 145 -534 l p ef +608 0 m 840 -605 l 926 -605 l 1174 0 l 1083 0 l 1012 -183 l 759 -183 l +692 0 l p +782 -248 m 987 -248 l 924 -416 l 905 -467 891 -509 881 -541 ct 873 -503 863 -464 849 -426 ct +p ef +1661 -212 m 1741 -192 l 1724 -126 1694 -76 1650 -41 ct 1607 -6 1553 10 1490 10 ct +1425 10 1372 -2 1331 -29 ct 1290 -56 1259 -94 1238 -145 ct 1216 -195 1206 -249 1206 -307 ct +1206 -370 1218 -425 1242 -472 ct 1266 -519 1300 -554 1345 -579 ct 1389 -603 1438 -615 1491 -615 ct +1552 -615 1603 -600 1644 -569 ct 1686 -538 1714 -495 1731 -439 ct 1652 -420 l +1638 -465 1617 -497 1591 -517 ct 1564 -537 1530 -547 1490 -547 ct 1443 -547 1404 -536 1373 -513 ct +1342 -491 1320 -461 1307 -424 ct 1295 -386 1288 -347 1288 -307 ct 1288 -256 1296 -211 1311 -172 ct +1326 -134 1349 -105 1381 -86 ct 1412 -67 1447 -58 1484 -58 ct 1529 -58 1567 -71 1598 -97 ct +1629 -122 l 1650 -161 l p ef +pom +gr +0.996 c 7835 10478 m 8893 9525 l 11010 9525 l 11010 11430 l 8893 11430 l +7835 10478 l p ef +0.000 c 7835 10478 m 8893 9525 l 11010 9525 l 11010 11430 l 8893 11430 l +7835 10478 l pc +gs +pum +8520 10768 t +-1 0 m 231 -605 l 317 -605 l 565 0 l 474 0 l 403 -183 l 150 -183 l +83 0 l p +173 -248 m 378 -248 l 315 -416 l 296 -467 282 -509 272 -541 ct 264 -503 254 -464 240 -426 ct +p ef +621 0 m 621 -605 l 829 -605 l 876 -605 912 -602 937 -596 ct 972 -588 1001 -574 1026 -553 ct +1058 -526 1082 -492 1098 -450 ct 1114 -408 1121 -360 1121 -306 ct 1121 -260 1116 -219 1105 -183 ct +1095 -148 1081 -118 1064 -95 ct 1047 -72 1029 -54 1009 -40 ct 989 -27 965 -17 937 -10 ct +908 -3 876 0 839 0 ct p +701 -71 m 830 -71 l 870 -71 901 -75 924 -82 ct 947 -90 965 -100 979 -114 ct +998 -133 1012 -158 1023 -190 ct 1034 -222 1039 -261 1039 -307 ct 1039 -370 1028 -419 1008 -453 ct +987 -487 962 -510 932 -521 ct 910 -530 876 -534 828 -534 ct 701 -534 l p ef +1661 -212 m 1741 -192 l 1724 -126 1694 -76 1650 -41 ct 1607 -6 1553 10 1490 10 ct +1425 10 1372 -2 1331 -29 ct 1290 -56 1259 -94 1238 -145 ct 1216 -195 1206 -249 1206 -307 ct +1206 -370 1218 -425 1242 -472 ct 1266 -519 1300 -554 1345 -579 ct 1389 -603 1438 -615 1491 -615 ct +1552 -615 1603 -600 1644 -569 ct 1686 -538 1714 -495 1731 -439 ct 1652 -420 l +1638 -465 1617 -497 1591 -517 ct 1564 -537 1530 -547 1490 -547 ct 1443 -547 1404 -536 1373 -513 ct +1342 -491 1320 -461 1307 -424 ct 1295 -386 1288 -347 1288 -307 ct 1288 -256 1296 -211 1311 -172 ct +1326 -134 1349 -105 1381 -86 ct 1412 -67 1447 -58 1484 -58 ct 1529 -58 1567 -71 1598 -97 ct +1629 -122 l 1650 -161 l p ef +pom +gr +0.996 c 7835 14618 m 8893 13665 l 11010 13665 l 11010 15570 l 8893 15570 l +7835 14618 l p ef +0.000 c 7835 14618 m 8893 13665 l 11010 13665 l 11010 15570 l 8893 15570 l +7835 14618 l pc +gs +pum +8520 14896 t +65 0 m 65 -605 l 273 -605 l 320 -605 356 -602 381 -596 ct 416 -588 445 -574 470 -553 ct +502 -526 526 -492 542 -450 ct 558 -408 565 -360 565 -306 ct 565 -260 560 -219 549 -183 ct +539 -148 525 -118 508 -95 ct 491 -72 473 -54 453 -40 ct 433 -27 409 -17 381 -10 ct +352 -3 320 0 283 0 ct p +145 -71 m 274 -71 l 314 -71 345 -75 368 -82 ct 391 -90 409 -100 423 -114 ct +442 -133 456 -158 467 -190 ct 478 -222 483 -261 483 -307 ct 483 -370 472 -419 452 -453 ct +431 -487 406 -510 376 -521 ct 354 -530 320 -534 272 -534 ct 145 -534 l p ef +608 0 m 840 -605 l 926 -605 l 1174 0 l 1083 0 l 1012 -183 l 759 -183 l +692 0 l p +782 -248 m 987 -248 l 924 -416 l 905 -467 891 -509 881 -541 ct 873 -503 863 -464 849 -426 ct +p ef +1661 -212 m 1741 -192 l 1724 -126 1694 -76 1650 -41 ct 1607 -6 1553 10 1490 10 ct +1425 10 1372 -2 1331 -29 ct 1290 -56 1259 -94 1238 -145 ct 1216 -195 1206 -249 1206 -307 ct +1206 -370 1218 -425 1242 -472 ct 1266 -519 1300 -554 1345 -579 ct 1389 -603 1438 -615 1491 -615 ct +1552 -615 1603 -600 1644 -569 ct 1686 -538 1714 -495 1731 -439 ct 1652 -420 l +1638 -465 1617 -497 1591 -517 ct 1564 -537 1530 -547 1490 -547 ct 1443 -547 1404 -536 1373 -513 ct +1342 -491 1320 -461 1307 -424 ct 1295 -386 1288 -347 1288 -307 ct 1288 -256 1296 -211 1311 -172 ct +1326 -134 1349 -105 1381 -86 ct 1412 -67 1447 -58 1484 -58 ct 1529 -58 1567 -71 1598 -97 ct +1629 -122 l 1650 -161 l p ef +pom +gr +0.996 c 19984 7938 m 18926 6985 l 16809 6985 l 16809 8890 l 18926 8890 l +19984 7938 l p ef +0.000 c 19984 7938 m 18926 6985 l 16809 6985 l 16809 8890 l 18926 8890 l +19984 7938 l pc +gs +pum +17489 8228 t +-1 0 m 231 -605 l 317 -605 l 565 0 l 474 0 l 403 -183 l 150 -183 l +83 0 l p +173 -248 m 378 -248 l 315 -416 l 296 -467 282 -509 272 -541 ct 264 -503 254 -464 240 -426 ct +p ef +621 0 m 621 -605 l 829 -605 l 876 -605 912 -602 937 -596 ct 972 -588 1001 -574 1026 -553 ct +1058 -526 1082 -492 1098 -450 ct 1114 -408 1121 -360 1121 -306 ct 1121 -260 1116 -219 1105 -183 ct +1095 -148 1081 -118 1064 -95 ct 1047 -72 1029 -54 1009 -40 ct 989 -27 965 -17 937 -10 ct +908 -3 876 0 839 0 ct p +701 -71 m 830 -71 l 870 -71 901 -75 924 -82 ct 947 -90 965 -100 979 -114 ct +998 -133 1012 -158 1023 -190 ct 1034 -222 1039 -261 1039 -307 ct 1039 -370 1028 -419 1008 -453 ct +987 -487 962 -510 932 -521 ct 910 -530 876 -534 828 -534 ct 701 -534 l p ef +1661 -212 m 1741 -192 l 1724 -126 1694 -76 1650 -41 ct 1607 -6 1553 10 1490 10 ct +1425 10 1372 -2 1331 -29 ct 1290 -56 1259 -94 1238 -145 ct 1216 -195 1206 -249 1206 -307 ct +1206 -370 1218 -425 1242 -472 ct 1266 -519 1300 -554 1345 -579 ct 1389 -603 1438 -615 1491 -615 ct +1552 -615 1603 -600 1644 -569 ct 1686 -538 1714 -495 1731 -439 ct 1652 -420 l +1638 -465 1617 -497 1591 -517 ct 1564 -537 1530 -547 1490 -547 ct 1443 -547 1404 -536 1373 -513 ct +1342 -491 1320 -461 1307 -424 ct 1295 -386 1288 -347 1288 -307 ct 1288 -256 1296 -211 1311 -172 ct +1326 -134 1349 -105 1381 -86 ct 1412 -67 1447 -58 1484 -58 ct 1529 -58 1567 -71 1598 -97 ct +1629 -122 l 1650 -161 l p ef +pom +gr +0.996 c 19984 17258 m 18926 16305 l 16809 16305 l 16809 18210 l 18926 18210 l +19984 17258 l p ef +0.000 c 19984 17258 m 18926 16305 l 16809 16305 l 16809 18210 l 18926 18210 l +19984 17258 l pc +gs +pum +17489 17542 t +65 0 m 65 -605 l 273 -605 l 320 -605 356 -602 381 -596 ct 416 -588 445 -574 470 -553 ct +502 -526 526 -492 542 -450 ct 558 -408 565 -360 565 -306 ct 565 -260 560 -219 549 -183 ct +539 -148 525 -118 508 -95 ct 491 -72 473 -54 453 -40 ct 433 -27 409 -17 381 -10 ct +352 -3 320 0 283 0 ct p +145 -71 m 274 -71 l 314 -71 345 -75 368 -82 ct 391 -90 409 -100 423 -114 ct +442 -133 456 -158 467 -190 ct 478 -222 483 -261 483 -307 ct 483 -370 472 -419 452 -453 ct +431 -487 406 -510 376 -521 ct 354 -530 320 -534 272 -534 ct 145 -534 l p ef +608 0 m 840 -605 l 926 -605 l 1174 0 l 1083 0 l 1012 -183 l 759 -183 l +692 0 l p +782 -248 m 987 -248 l 924 -416 l 905 -467 891 -509 881 -541 ct 873 -503 863 -464 849 -426 ct +p ef +1661 -212 m 1741 -192 l 1724 -126 1694 -76 1650 -41 ct 1607 -6 1553 10 1490 10 ct +1425 10 1372 -2 1331 -29 ct 1290 -56 1259 -94 1238 -145 ct 1216 -195 1206 -249 1206 -307 ct +1206 -370 1218 -425 1242 -472 ct 1266 -519 1300 -554 1345 -579 ct 1389 -603 1438 -615 1491 -615 ct +1552 -615 1603 -600 1644 -569 ct 1686 -538 1714 -495 1731 -439 ct 1652 -420 l +1638 -465 1617 -497 1591 -517 ct 1564 -537 1530 -547 1490 -547 ct 1443 -547 1404 -536 1373 -513 ct +1342 -491 1320 -461 1307 -424 ct 1295 -386 1288 -347 1288 -307 ct 1288 -256 1296 -211 1311 -172 ct +1326 -134 1349 -105 1381 -86 ct 1412 -67 1447 -58 1484 -58 ct 1529 -58 1567 -71 1598 -97 ct +1629 -122 l 1650 -161 l p ef +pom +gr +0.996 c 19984 10478 m 18926 9525 l 16809 9525 l 16809 11430 l 18926 11430 l +19984 10478 l p ef +0.000 c 19984 10478 m 18926 9525 l 16809 9525 l 16809 11430 l 18926 11430 l +19984 10478 l pc +gs +pum +17489 10768 t +-1 0 m 231 -605 l 317 -605 l 565 0 l 474 0 l 403 -183 l 150 -183 l +83 0 l p +173 -248 m 378 -248 l 315 -416 l 296 -467 282 -509 272 -541 ct 264 -503 254 -464 240 -426 ct +p ef +621 0 m 621 -605 l 829 -605 l 876 -605 912 -602 937 -596 ct 972 -588 1001 -574 1026 -553 ct +1058 -526 1082 -492 1098 -450 ct 1114 -408 1121 -360 1121 -306 ct 1121 -260 1116 -219 1105 -183 ct +1095 -148 1081 -118 1064 -95 ct 1047 -72 1029 -54 1009 -40 ct 989 -27 965 -17 937 -10 ct +908 -3 876 0 839 0 ct p +701 -71 m 830 -71 l 870 -71 901 -75 924 -82 ct 947 -90 965 -100 979 -114 ct +998 -133 1012 -158 1023 -190 ct 1034 -222 1039 -261 1039 -307 ct 1039 -370 1028 -419 1008 -453 ct +987 -487 962 -510 932 -521 ct 910 -530 876 -534 828 -534 ct 701 -534 l p ef +1661 -212 m 1741 -192 l 1724 -126 1694 -76 1650 -41 ct 1607 -6 1553 10 1490 10 ct +1425 10 1372 -2 1331 -29 ct 1290 -56 1259 -94 1238 -145 ct 1216 -195 1206 -249 1206 -307 ct +1206 -370 1218 -425 1242 -472 ct 1266 -519 1300 -554 1345 -579 ct 1389 -603 1438 -615 1491 -615 ct +1552 -615 1603 -600 1644 -569 ct 1686 -538 1714 -495 1731 -439 ct 1652 -420 l +1638 -465 1617 -497 1591 -517 ct 1564 -537 1530 -547 1490 -547 ct 1443 -547 1404 -536 1373 -513 ct +1342 -491 1320 -461 1307 -424 ct 1295 -386 1288 -347 1288 -307 ct 1288 -256 1296 -211 1311 -172 ct +1326 -134 1349 -105 1381 -86 ct 1412 -67 1447 -58 1484 -58 ct 1529 -58 1567 -71 1598 -97 ct +1629 -122 l 1650 -161 l p ef +pom +gr +0.996 c 19984 14618 m 18926 13665 l 16809 13665 l 16809 15570 l 18926 15570 l +19984 14618 l p ef +0.000 c 19984 14618 m 18926 13665 l 16809 13665 l 16809 15570 l 18926 15570 l +19984 14618 l pc +gs +pum +17489 14896 t +65 0 m 65 -605 l 273 -605 l 320 -605 356 -602 381 -596 ct 416 -588 445 -574 470 -553 ct +502 -526 526 -492 542 -450 ct 558 -408 565 -360 565 -306 ct 565 -260 560 -219 549 -183 ct +539 -148 525 -118 508 -95 ct 491 -72 473 -54 453 -40 ct 433 -27 409 -17 381 -10 ct +352 -3 320 0 283 0 ct p +145 -71 m 274 -71 l 314 -71 345 -75 368 -82 ct 391 -90 409 -100 423 -114 ct +442 -133 456 -158 467 -190 ct 478 -222 483 -261 483 -307 ct 483 -370 472 -419 452 -453 ct +431 -487 406 -510 376 -521 ct 354 -530 320 -534 272 -534 ct 145 -534 l p ef +608 0 m 840 -605 l 926 -605 l 1174 0 l 1083 0 l 1012 -183 l 759 -183 l +692 0 l p +782 -248 m 987 -248 l 924 -416 l 905 -467 891 -509 881 -541 ct 873 -503 863 -464 849 -426 ct +p ef +1661 -212 m 1741 -192 l 1724 -126 1694 -76 1650 -41 ct 1607 -6 1553 10 1490 10 ct +1425 10 1372 -2 1331 -29 ct 1290 -56 1259 -94 1238 -145 ct 1216 -195 1206 -249 1206 -307 ct +1206 -370 1218 -425 1242 -472 ct 1266 -519 1300 -554 1345 -579 ct 1389 -603 1438 -615 1491 -615 ct +1552 -615 1603 -600 1644 -569 ct 1686 -538 1714 -495 1731 -439 ct 1652 -420 l +1638 -465 1617 -497 1591 -517 ct 1564 -537 1530 -547 1490 -547 ct 1443 -547 1404 -536 1373 -513 ct +1342 -491 1320 -461 1307 -424 ct 1295 -386 1288 -347 1288 -307 ct 1288 -256 1296 -211 1311 -172 ct +1326 -134 1349 -105 1381 -86 ct 1412 -67 1447 -58 1484 -58 ct 1529 -58 1567 -71 1598 -97 ct +1629 -122 l 1650 -161 l p ef +pom +gr +23767 18828 m 20592 18828 l 20592 13113 l 26942 13113 l 26942 18828 l +23767 18828 l pc +gs +pum +22133 15795 t +219 0 m 219 -534 l 19 -534 l 19 -605 l 499 -605 l 499 -534 l 299 -534 l +299 0 l p ef +583 0 m 583 -438 l 650 -438 l 650 -372 l 667 -403 683 -423 698 -433 ct +712 -443 728 -448 745 -448 ct 770 -448 796 -440 822 -424 ct 796 -355 l 778 -366 760 -371 742 -371 ct +725 -371 711 -366 698 -357 ct 685 -347 676 -333 670 -316 ct 662 -289 658 -261 658 -229 ct +658 0 l p ef +1162 -54 m 1134 -30 1108 -14 1082 -4 ct 1057 5 1029 9 1000 9 ct 952 9 915 -1 889 -25 ct +863 -48 850 -79 850 -115 ct 850 -137 855 -156 865 -174 ct 875 -192 887 -206 903 -217 ct +919 -228 937 -236 957 -241 ct 971 -245 993 -249 1023 -252 ct 1083 -259 1127 -268 1155 -278 ct +1156 -288 1156 -295 1156 -297 ct 1156 -328 1149 -349 1135 -361 ct 1116 -378 1087 -387 1050 -387 ct +1015 -387 989 -380 973 -368 ct 956 -356 944 -334 936 -303 ct 863 -313 l 869 -344 880 -369 896 -388 ct +911 -408 933 -422 961 -433 ct 990 -443 1023 -448 1061 -448 ct 1098 -448 1129 -444 1152 -435 ct +1175 -426 1193 -415 1204 -402 ct 1215 -388 1222 -371 1227 -351 ct 1229 -338 1231 -316 1231 -282 ct +1231 -183 l 1231 -114 1232 -70 1235 -52 ct 1238 -34 1245 -16 1254 0 ct 1176 0 l +1169 -15 l 1164 -33 l p +1155 -220 m 1128 -209 1088 -199 1034 -192 ct 1003 -187 982 -182 969 -177 ct +956 -171 947 -163 940 -153 ct 933 -142 929 -130 929 -117 ct 929 -97 937 -81 952 -68 ct +967 -54 989 -48 1018 -48 ct 1046 -48 1072 -54 1094 -67 ct 1117 -79 1133 -96 1143 -118 ct +1151 -135 1155 -160 1155 -192 ct p ef +1325 0 m 1325 -438 l 1392 -438 l 1392 -376 l 1424 -424 1471 -448 1532 -448 ct +1558 -448 1583 -443 1605 -434 ct 1627 -424 1643 -412 1654 -396 ct 1666 -381 1673 -363 1678 -342 ct +1680 -328 1682 -304 1682 -269 ct 1682 0 l 1607 0 l 1607 -266 l 1607 -297 1605 -319 1599 -334 ct +1593 -349 1583 -361 1568 -370 ct 1553 -379 1536 -384 1516 -384 ct 1484 -384 1457 -374 1434 -354 ct +1411 -333 1400 -295 1400 -239 ct 1400 0 l p ef +1772 -130 m 1845 -142 l 1849 -113 1861 -90 1880 -74 ct 1898 -59 1925 -51 1959 -51 ct +1993 -51 2018 -58 2035 -72 ct 2051 -85 2059 -102 2059 -121 ct 2059 -137 2052 -151 2038 -160 ct +2027 -167 2002 -175 1962 -185 ct 1907 -199 1869 -211 1848 -221 ct 1827 -231 1811 -245 1800 -263 ct +1789 -281 1784 -300 1784 -322 ct 1784 -341 1788 -359 1797 -376 ct 1806 -393 1818 -407 1834 -418 ct +1845 -426 1861 -433 1881 -439 ct 1901 -445 1923 -448 1945 -448 ct 1980 -448 2010 -443 2036 -433 ct +2062 -423 2081 -410 2094 -393 ct 2106 -376 2115 -353 2119 -325 ct 2047 -315 l +2043 -338 2034 -355 2018 -368 ct 2002 -381 1980 -387 1951 -387 ct 1917 -387 1892 -381 1878 -370 ct +1863 -359 1856 -346 1856 -330 ct 1856 -321 1859 -312 1865 -304 ct 1871 -296 1880 -290 1893 -285 ct +1901 -282 1923 -275 1959 -266 ct 2012 -251 2048 -240 2069 -231 ct 2090 -222 2106 -209 2118 -192 ct +2130 -175 2136 -154 2136 -128 ct 2136 -104 2129 -80 2114 -58 ct 2100 -36 2079 -20 2052 -8 ct +2024 3 1993 9 1959 9 ct 1902 9 1859 -1 1829 -25 ct 1799 -49 l 1780 -84 l p ef +2198 0 m 2198 -438 l 2265 -438 l 2265 -377 l 2279 -398 2297 -415 2320 -428 ct +2343 -442 2369 -448 2398 -448 ct 2430 -448 2457 -441 2478 -428 ct 2499 -414 2513 -396 2522 -371 ct +2556 -423 2602 -448 2657 -448 ct 2701 -448 2734 -436 2758 -412 ct 2781 -388 2793 -351 2793 -301 ct +2793 0 l 2719 0 l 2719 -276 l 2719 -306 2716 -327 2712 -340 ct 2707 -353 2698 -364 2685 -372 ct +2673 -380 2658 -384 2641 -384 ct 2610 -384 2584 -373 2564 -353 ct 2543 -332 2533 -300 2533 -254 ct +2533 0 l 2459 0 l 2459 -285 l 2459 -318 2453 -342 2441 -359 ct 2429 -375 2409 -384 2381 -384 ct +2360 -384 2341 -378 2323 -367 ct 2305 -356 2293 -340 2285 -319 ct 2277 -298 2273 -267 2273 -227 ct +2273 0 l p ef +2914 -520 m 2914 -605 l 2988 -605 l 2988 -520 l p +2914 0 m 2914 -438 l 2988 -438 l 2988 0 l p ef +3261 -66 m 3271 0 l 3250 3 3232 5 3215 5 ct 3188 5 3167 1 3152 -7 ct 3138 -15 3127 -26 3121 -40 ct +3115 -54 3112 -83 3112 -128 ct 3112 -380 l 3057 -380 l 3057 -438 l 3112 -438 l +3112 -547 l 3186 -591 l 3186 -438 l 3261 -438 l 3261 -380 l 3186 -380 l +3186 -124 l 3186 -103 3187 -89 3190 -83 ct 3192 -77 3197 -72 3203 -68 ct 3208 -65 3217 -63 3228 -63 ct +3236 -63 l 3247 -64 l p ef +pom +pum +20955 16748 t +65 0 m 65 -605 l 273 -605 l 320 -605 356 -602 381 -596 ct 416 -588 445 -574 470 -553 ct +502 -526 526 -492 542 -450 ct 558 -408 565 -360 565 -306 ct 565 -260 560 -219 549 -183 ct +539 -148 525 -118 508 -95 ct 491 -72 473 -54 453 -40 ct 433 -27 409 -17 381 -10 ct +352 -3 320 0 283 0 ct p +145 -71 m 274 -71 l 314 -71 345 -75 368 -82 ct 391 -90 409 -100 423 -114 ct +442 -133 456 -158 467 -190 ct 478 -222 483 -261 483 -307 ct 483 -370 472 -419 452 -453 ct +431 -487 406 -510 376 -521 ct 354 -530 320 -534 272 -534 ct 145 -534 l p ef +951 -54 m 923 -30 897 -14 871 -4 ct 846 5 818 9 789 9 ct 741 9 704 -1 678 -25 ct +652 -48 639 -79 639 -115 ct 639 -137 644 -156 654 -174 ct 664 -192 676 -206 692 -217 ct +708 -228 726 -236 746 -241 ct 760 -245 782 -249 812 -252 ct 872 -259 916 -268 944 -278 ct +945 -288 945 -295 945 -297 ct 945 -328 938 -349 924 -361 ct 905 -378 876 -387 839 -387 ct +804 -387 778 -380 762 -368 ct 745 -356 733 -334 725 -303 ct 652 -313 l 658 -344 669 -369 685 -388 ct +700 -408 722 -422 750 -433 ct 779 -443 812 -448 850 -448 ct 887 -448 918 -444 941 -435 ct +964 -426 982 -415 993 -402 ct 1004 -388 1011 -371 1016 -351 ct 1018 -338 1020 -316 1020 -282 ct +1020 -183 l 1020 -114 1021 -70 1024 -52 ct 1027 -34 1034 -16 1043 0 ct 965 0 l +958 -15 l 953 -33 l p +944 -220 m 917 -209 877 -199 823 -192 ct 792 -187 771 -182 758 -177 ct 745 -171 736 -163 729 -153 ct +722 -142 718 -130 718 -117 ct 718 -97 726 -81 741 -68 ct 756 -54 778 -48 807 -48 ct +835 -48 861 -54 883 -67 ct 906 -79 922 -96 932 -118 ct 940 -135 944 -160 944 -192 ct +p ef +1401 0 m 1401 -64 l 1367 -14 1320 9 1262 9 ct 1236 9 1212 4 1189 -4 ct 1167 -14 1150 -27 1139 -42 ct +1128 -57 1121 -75 1116 -97 ct 1113 -112 1112 -135 1112 -166 ct 1112 -438 l 1186 -438 l +1186 -195 l 1186 -156 1187 -130 1191 -116 ct 1195 -97 1205 -82 1220 -70 ct +1235 -59 1254 -54 1276 -54 ct 1299 -54 1320 -59 1339 -71 ct 1359 -82 1373 -98 1381 -117 ct +1389 -137 1393 -166 1393 -203 ct 1393 -438 l 1467 -438 l 1467 0 l p ef +1577 36 m 1649 47 l 1652 69 1660 85 1674 95 ct 1693 109 1718 116 1750 116 ct +1784 116 1811 109 1829 95 ct 1848 82 1861 62 1867 38 ct 1871 22 1873 -8 1873 -57 ct +1840 -19 1800 0 1751 0 ct 1691 0 1644 -21 1611 -65 ct 1578 -108 1562 -160 1562 -221 ct +1562 -263 1569 -302 1584 -337 ct 1600 -373 1622 -400 1650 -419 ct 1679 -438 1713 -448 1752 -448 ct +1804 -448 1846 -427 1880 -385 ct 1880 -438 l 1948 -438 l 1948 -59 l 1948 8 1941 57 1928 85 ct +1914 114 1892 136 1861 153 ct 1831 169 1794 178 1750 178 ct 1698 178 1656 166 1623 142 ct +1591 119 l 1576 83 l p +1638 -227 m 1638 -169 1650 -127 1672 -101 ct 1695 -74 1724 -61 1758 -61 ct +1793 -61 1821 -74 1844 -101 ct 1867 -127 1879 -168 1879 -224 ct 1879 -278 1867 -318 1843 -346 ct +1819 -373 1791 -387 1757 -387 ct 1724 -387 1696 -373 1673 -346 ct 1650 -319 l +1638 -280 l p ef +2066 0 m 2066 -605 l 2141 -605 l 2141 -388 l 2175 -428 2219 -448 2272 -448 ct +2304 -448 2333 -442 2357 -429 ct 2381 -416 2398 -398 2408 -376 ct 2418 -353 2424 -320 2424 -278 ct +2424 0 l 2349 0 l 2349 -278 l 2349 -315 2341 -342 2325 -359 ct 2309 -376 2286 -384 2257 -384 ct +2235 -384 2214 -378 2195 -367 ct 2175 -356 2161 -340 2153 -320 ct 2145 -301 2141 -274 2141 -240 ct +2141 0 l p ef +2705 -66 m 2715 0 l 2694 3 2676 5 2659 5 ct 2632 5 2611 1 2596 -7 ct 2582 -15 2571 -26 2565 -40 ct +2559 -54 2556 -83 2556 -128 ct 2556 -380 l 2501 -380 l 2501 -438 l 2556 -438 l +2556 -547 l 2630 -591 l 2630 -438 l 2705 -438 l 2705 -380 l 2630 -380 l +2630 -124 l 2630 -103 2631 -89 2634 -83 ct 2636 -77 2641 -72 2647 -68 ct 2652 -65 2661 -63 2672 -63 ct +2680 -63 l 2691 -64 l p ef +3081 -141 m 3157 -131 l 3145 -86 3123 -52 3090 -27 ct 3057 -2 3015 9 2965 9 ct +2900 9 2849 -9 2812 -49 ct 2774 -88 2755 -144 2755 -215 ct 2755 -289 2774 -346 2812 -387 ct +2851 -428 2900 -448 2960 -448 ct 3019 -448 3067 -428 3104 -388 ct 3141 -348 3160 -292 3160 -220 ct +3160 -215 3160 -209 3159 -200 ct 2832 -200 l 2835 -152 2849 -115 2873 -89 ct +2898 -64 2928 -51 2965 -51 ct 2992 -51 3015 -58 3035 -72 ct 3054 -87 l 3069 -109 l +p +2836 -261 m 3081 -261 l 3078 -298 3069 -326 3053 -344 ct 3030 -373 2999 -387 2961 -387 ct +2927 -387 2898 -376 2875 -353 ct 2852 -330 l 2839 -299 l p ef +3255 0 m 3255 -438 l 3322 -438 l 3322 -372 l 3339 -403 3355 -423 3370 -433 ct +3384 -443 3400 -448 3417 -448 ct 3442 -448 3468 -440 3494 -424 ct 3468 -355 l +3450 -366 3432 -371 3414 -371 ct 3397 -371 3383 -366 3370 -357 ct 3357 -347 3348 -333 3342 -316 ct +3334 -289 3330 -261 3330 -229 ct 3330 0 l p ef +3617 0 m 3548 0 l 3548 -605 l 3622 -605 l 3622 -389 l 3654 -428 3694 -448 3742 -448 ct +3769 -448 3795 -443 3819 -432 ct 3843 -421 3863 -406 3879 -386 ct 3894 -366 3906 -343 3915 -315 ct +3924 -287 3928 -257 3928 -225 ct 3928 -150 3910 -92 3873 -51 ct 3835 -10 3791 9 3739 9 ct +3687 9 3646 -11 3617 -54 ct p +3616 -222 m 3616 -170 3623 -132 3638 -108 ct 3661 -70 3693 -51 3733 -51 ct +3765 -51 3793 -65 3817 -93 ct 3840 -121 3852 -163 3852 -219 ct 3852 -277 3841 -319 3818 -346 ct +3796 -373 3768 -387 3736 -387 ct 3703 -387 3675 -373 3652 -345 ct 3628 -316 l +3616 -276 l p ef +3970 -219 m 3970 -300 3992 -360 4037 -399 ct 4075 -432 4121 -448 4175 -448 ct +4236 -448 4285 -428 4323 -389 ct 4361 -349 4381 -295 4381 -225 ct 4381 -169 4372 -124 4355 -92 ct +4338 -59 4314 -34 4281 -16 ct 4249 0 4214 9 4175 9 ct 4114 9 4064 -9 4026 -49 ct +3989 -88 l 3970 -145 l p +4046 -219 m 4046 -163 4058 -121 4083 -93 ct 4107 -65 4138 -51 4175 -51 ct 4212 -51 4243 -65 4267 -93 ct +4292 -121 4304 -164 4304 -221 ct 4304 -276 4292 -317 4267 -345 ct 4243 -373 4212 -387 4175 -387 ct +4138 -387 4107 -373 4083 -345 ct 4058 -317 l 4046 -275 l p ef +4761 -54 m 4733 -30 4707 -14 4681 -4 ct 4656 5 4628 9 4599 9 ct 4551 9 4514 -1 4488 -25 ct +4462 -48 4449 -79 4449 -115 ct 4449 -137 4454 -156 4464 -174 ct 4474 -192 4486 -206 4502 -217 ct +4518 -228 4536 -236 4556 -241 ct 4570 -245 4592 -249 4622 -252 ct 4682 -259 4726 -268 4754 -278 ct +4755 -288 4755 -295 4755 -297 ct 4755 -328 4748 -349 4734 -361 ct 4715 -378 4686 -387 4649 -387 ct +4614 -387 4588 -380 4572 -368 ct 4555 -356 4543 -334 4535 -303 ct 4462 -313 l +4468 -344 4479 -369 4495 -388 ct 4510 -408 4532 -422 4560 -433 ct 4589 -443 4622 -448 4660 -448 ct +4697 -448 4728 -444 4751 -435 ct 4774 -426 4792 -415 4803 -402 ct 4814 -388 4821 -371 4826 -351 ct +4828 -338 4830 -316 4830 -282 ct 4830 -183 l 4830 -114 4831 -70 4834 -52 ct +4837 -34 4844 -16 4853 0 ct 4775 0 l 4768 -15 l 4763 -33 l p +4754 -220 m 4727 -209 4687 -199 4633 -192 ct 4602 -187 4581 -182 4568 -177 ct +4555 -171 4546 -163 4539 -153 ct 4532 -142 4528 -130 4528 -117 ct 4528 -97 4536 -81 4551 -68 ct +4566 -54 4588 -48 4617 -48 ct 4645 -48 4671 -54 4693 -67 ct 4716 -79 4732 -96 4742 -118 ct +4750 -135 4754 -160 4754 -192 ct p ef +4922 0 m 4922 -438 l 4989 -438 l 4989 -372 l 5006 -403 5022 -423 5037 -433 ct +5051 -443 5067 -448 5084 -448 ct 5109 -448 5135 -440 5161 -424 ct 5135 -355 l +5117 -366 5099 -371 5081 -371 ct 5064 -371 5050 -366 5037 -357 ct 5024 -347 5015 -333 5009 -316 ct +5001 -289 4997 -261 4997 -229 ct 4997 0 l p ef +5499 0 m 5499 -55 l 5471 -11 5430 9 5376 9 ct 5341 9 5309 0 5280 -19 ct 5250 -38 5228 -65 5212 -99 ct +5195 -134 5187 -174 5187 -218 ct 5187 -262 5195 -302 5209 -338 ct 5224 -373 5246 -401 5275 -420 ct +5304 -439 5337 -448 5373 -448 ct 5399 -448 5423 -443 5444 -431 ct 5464 -420 5481 -406 5494 -388 ct +5494 -605 l 5568 -605 l 5568 0 l p +5264 -218 m 5264 -162 5276 -120 5299 -92 ct 5323 -65 5351 -51 5383 -51 ct 5416 -51 5443 -64 5466 -91 ct +5489 -117 5500 -158 5500 -212 ct 5500 -272 5489 -316 5465 -344 ct 5442 -373 5414 -387 5380 -387 ct +5347 -387 5319 -373 5297 -346 ct 5275 -319 l 5264 -277 l p ef +pom +gr +23767 12065 m 20592 12065 l 20592 6350 l 26942 6350 l 26942 12065 l +23767 12065 l pc +gs +pum +22239 9022 t +66 0 m 66 -605 l 335 -605 l 389 -605 430 -600 458 -589 ct 486 -578 508 -559 525 -531 ct +542 -504 550 -473 550 -440 ct 550 -397 536 -361 508 -331 ct 481 -302 438 -283 380 -275 ct +401 -265 417 -255 428 -245 ct 451 -223 473 -197 494 -164 ct 600 0 l 499 0 l +419 -125 l 395 -162 376 -190 361 -209 ct 346 -228 332 -242 320 -249 ct 308 -257 296 -263 284 -266 ct +275 -267 260 -268 239 -268 ct 146 -268 l 146 0 l p +146 -338 m 318 -338 l 355 -338 384 -342 404 -349 ct 425 -357 441 -369 451 -386 ct +462 -402 468 -420 468 -440 ct 468 -468 457 -492 436 -510 ct 416 -529 383 -538 338 -538 ct +146 -538 l p ef +965 -141 m 1041 -131 l 1029 -86 1007 -52 974 -27 ct 941 -2 899 9 849 9 ct +784 9 733 -9 696 -49 ct 658 -88 639 -144 639 -215 ct 639 -289 658 -346 696 -387 ct +735 -428 784 -448 844 -448 ct 903 -448 951 -428 988 -388 ct 1025 -348 1044 -292 1044 -220 ct +1044 -215 1044 -209 1043 -200 ct 716 -200 l 719 -152 733 -115 757 -89 ct 782 -64 812 -51 849 -51 ct +876 -51 899 -58 919 -72 ct 938 -87 l 953 -109 l p +720 -261 m 965 -261 l 962 -298 953 -326 937 -344 ct 914 -373 883 -387 845 -387 ct +811 -387 782 -376 759 -353 ct 736 -330 l 723 -299 l p ef +1427 -160 m 1500 -151 l 1492 -100 1471 -61 1438 -32 ct 1405 -4 1365 9 1317 9 ct +1257 9 1209 -9 1172 -48 ct 1136 -88 1118 -144 1118 -217 ct 1118 -265 1125 -306 1141 -342 ct +1157 -377 1181 -404 1213 -421 ct 1245 -439 1280 -448 1317 -448 ct 1365 -448 1404 -436 1434 -412 ct +1465 -388 1484 -354 1493 -309 ct 1420 -298 l 1413 -328 1401 -350 1384 -365 ct +1366 -380 1345 -387 1320 -387 ct 1283 -387 1252 -374 1229 -347 ct 1206 -320 1194 -277 1194 -219 ct +1194 -160 1205 -118 1228 -91 ct 1250 -64 1280 -51 1316 -51 ct 1345 -51 1370 -60 1389 -78 ct +1409 -95 l 1421 -123 l p ef +1864 -141 m 1940 -131 l 1928 -86 1906 -52 1873 -27 ct 1840 -2 1798 9 1748 9 ct +1683 9 1632 -9 1595 -49 ct 1557 -88 1538 -144 1538 -215 ct 1538 -289 1557 -346 1595 -387 ct +1634 -428 1683 -448 1743 -448 ct 1802 -448 1850 -428 1887 -388 ct 1924 -348 1943 -292 1943 -220 ct +1943 -215 1943 -209 1942 -200 ct 1615 -200 l 1618 -152 1632 -115 1656 -89 ct +1681 -64 1711 -51 1748 -51 ct 1775 -51 1798 -58 1818 -72 ct 1837 -87 l 1852 -109 l +p +1619 -261 m 1864 -261 l 1861 -298 1852 -326 1836 -344 ct 1813 -373 1782 -387 1744 -387 ct +1710 -387 1681 -376 1658 -353 ct 1635 -330 l 1622 -299 l p ef +2040 -520 m 2040 -605 l 2114 -605 l 2114 -520 l p +2040 0 m 2040 -438 l 2114 -438 l 2114 0 l p ef +2347 0 m 2180 -438 l 2259 -438 l 2353 -175 l 2363 -147 2372 -118 2381 -87 ct +2388 -110 2397 -138 2409 -171 ct 2506 -438 l 2583 -438 l 2417 0 l p ef +2949 -141 m 3025 -131 l 3013 -86 2991 -52 2958 -27 ct 2925 -2 2883 9 2833 9 ct +2768 9 2717 -9 2680 -49 ct 2642 -88 2623 -144 2623 -215 ct 2623 -289 2642 -346 2680 -387 ct +2719 -428 2768 -448 2828 -448 ct 2887 -448 2935 -428 2972 -388 ct 3009 -348 3028 -292 3028 -220 ct +3028 -215 3028 -209 3027 -200 ct 2700 -200 l 2703 -152 2717 -115 2741 -89 ct +2766 -64 2796 -51 2833 -51 ct 2860 -51 2883 -58 2903 -72 ct 2922 -87 l 2937 -109 l +p +2704 -261 m 2949 -261 l 2946 -298 2937 -326 2921 -344 ct 2898 -373 2867 -387 2829 -387 ct +2795 -387 2766 -376 2743 -353 ct 2720 -330 l 2707 -299 l p ef +pom +pum +20955 9975 t +65 0 m 65 -605 l 273 -605 l 320 -605 356 -602 381 -596 ct 416 -588 445 -574 470 -553 ct +502 -526 526 -492 542 -450 ct 558 -408 565 -360 565 -306 ct 565 -260 560 -219 549 -183 ct +539 -148 525 -118 508 -95 ct 491 -72 473 -54 453 -40 ct 433 -27 409 -17 381 -10 ct +352 -3 320 0 283 0 ct p +145 -71 m 274 -71 l 314 -71 345 -75 368 -82 ct 391 -90 409 -100 423 -114 ct +442 -133 456 -158 467 -190 ct 478 -222 483 -261 483 -307 ct 483 -370 472 -419 452 -453 ct +431 -487 406 -510 376 -521 ct 354 -530 320 -534 272 -534 ct 145 -534 l p ef +951 -54 m 923 -30 897 -14 871 -4 ct 846 5 818 9 789 9 ct 741 9 704 -1 678 -25 ct +652 -48 639 -79 639 -115 ct 639 -137 644 -156 654 -174 ct 664 -192 676 -206 692 -217 ct +708 -228 726 -236 746 -241 ct 760 -245 782 -249 812 -252 ct 872 -259 916 -268 944 -278 ct +945 -288 945 -295 945 -297 ct 945 -328 938 -349 924 -361 ct 905 -378 876 -387 839 -387 ct +804 -387 778 -380 762 -368 ct 745 -356 733 -334 725 -303 ct 652 -313 l 658 -344 669 -369 685 -388 ct +700 -408 722 -422 750 -433 ct 779 -443 812 -448 850 -448 ct 887 -448 918 -444 941 -435 ct +964 -426 982 -415 993 -402 ct 1004 -388 1011 -371 1016 -351 ct 1018 -338 1020 -316 1020 -282 ct +1020 -183 l 1020 -114 1021 -70 1024 -52 ct 1027 -34 1034 -16 1043 0 ct 965 0 l +958 -15 l 953 -33 l p +944 -220 m 917 -209 877 -199 823 -192 ct 792 -187 771 -182 758 -177 ct 745 -171 736 -163 729 -153 ct +722 -142 718 -130 718 -117 ct 718 -97 726 -81 741 -68 ct 756 -54 778 -48 807 -48 ct +835 -48 861 -54 883 -67 ct 906 -79 922 -96 932 -118 ct 940 -135 944 -160 944 -192 ct +p ef +1401 0 m 1401 -64 l 1367 -14 1320 9 1262 9 ct 1236 9 1212 4 1189 -4 ct 1167 -14 1150 -27 1139 -42 ct +1128 -57 1121 -75 1116 -97 ct 1113 -112 1112 -135 1112 -166 ct 1112 -438 l 1186 -438 l +1186 -195 l 1186 -156 1187 -130 1191 -116 ct 1195 -97 1205 -82 1220 -70 ct +1235 -59 1254 -54 1276 -54 ct 1299 -54 1320 -59 1339 -71 ct 1359 -82 1373 -98 1381 -117 ct +1389 -137 1393 -166 1393 -203 ct 1393 -438 l 1467 -438 l 1467 0 l p ef +1577 36 m 1649 47 l 1652 69 1660 85 1674 95 ct 1693 109 1718 116 1750 116 ct +1784 116 1811 109 1829 95 ct 1848 82 1861 62 1867 38 ct 1871 22 1873 -8 1873 -57 ct +1840 -19 1800 0 1751 0 ct 1691 0 1644 -21 1611 -65 ct 1578 -108 1562 -160 1562 -221 ct +1562 -263 1569 -302 1584 -337 ct 1600 -373 1622 -400 1650 -419 ct 1679 -438 1713 -448 1752 -448 ct +1804 -448 1846 -427 1880 -385 ct 1880 -438 l 1948 -438 l 1948 -59 l 1948 8 1941 57 1928 85 ct +1914 114 1892 136 1861 153 ct 1831 169 1794 178 1750 178 ct 1698 178 1656 166 1623 142 ct +1591 119 l 1576 83 l p +1638 -227 m 1638 -169 1650 -127 1672 -101 ct 1695 -74 1724 -61 1758 -61 ct +1793 -61 1821 -74 1844 -101 ct 1867 -127 1879 -168 1879 -224 ct 1879 -278 1867 -318 1843 -346 ct +1819 -373 1791 -387 1757 -387 ct 1724 -387 1696 -373 1673 -346 ct 1650 -319 l +1638 -280 l p ef +2066 0 m 2066 -605 l 2141 -605 l 2141 -388 l 2175 -428 2219 -448 2272 -448 ct +2304 -448 2333 -442 2357 -429 ct 2381 -416 2398 -398 2408 -376 ct 2418 -353 2424 -320 2424 -278 ct +2424 0 l 2349 0 l 2349 -278 l 2349 -315 2341 -342 2325 -359 ct 2309 -376 2286 -384 2257 -384 ct +2235 -384 2214 -378 2195 -367 ct 2175 -356 2161 -340 2153 -320 ct 2145 -301 2141 -274 2141 -240 ct +2141 0 l p ef +2705 -66 m 2715 0 l 2694 3 2676 5 2659 5 ct 2632 5 2611 1 2596 -7 ct 2582 -15 2571 -26 2565 -40 ct +2559 -54 2556 -83 2556 -128 ct 2556 -380 l 2501 -380 l 2501 -438 l 2556 -438 l +2556 -547 l 2630 -591 l 2630 -438 l 2705 -438 l 2705 -380 l 2630 -380 l +2630 -124 l 2630 -103 2631 -89 2634 -83 ct 2636 -77 2641 -72 2647 -68 ct 2652 -65 2661 -63 2672 -63 ct +2680 -63 l 2691 -64 l p ef +3081 -141 m 3157 -131 l 3145 -86 3123 -52 3090 -27 ct 3057 -2 3015 9 2965 9 ct +2900 9 2849 -9 2812 -49 ct 2774 -88 2755 -144 2755 -215 ct 2755 -289 2774 -346 2812 -387 ct +2851 -428 2900 -448 2960 -448 ct 3019 -448 3067 -428 3104 -388 ct 3141 -348 3160 -292 3160 -220 ct +3160 -215 3160 -209 3159 -200 ct 2832 -200 l 2835 -152 2849 -115 2873 -89 ct +2898 -64 2928 -51 2965 -51 ct 2992 -51 3015 -58 3035 -72 ct 3054 -87 l 3069 -109 l +p +2836 -261 m 3081 -261 l 3078 -298 3069 -326 3053 -344 ct 3030 -373 2999 -387 2961 -387 ct +2927 -387 2898 -376 2875 -353 ct 2852 -330 l 2839 -299 l p ef +3255 0 m 3255 -438 l 3322 -438 l 3322 -372 l 3339 -403 3355 -423 3370 -433 ct +3384 -443 3400 -448 3417 -448 ct 3442 -448 3468 -440 3494 -424 ct 3468 -355 l +3450 -366 3432 -371 3414 -371 ct 3397 -371 3383 -366 3370 -357 ct 3357 -347 3348 -333 3342 -316 ct +3334 -289 3330 -261 3330 -229 ct 3330 0 l p ef +3617 0 m 3548 0 l 3548 -605 l 3622 -605 l 3622 -389 l 3654 -428 3694 -448 3742 -448 ct +3769 -448 3795 -443 3819 -432 ct 3843 -421 3863 -406 3879 -386 ct 3894 -366 3906 -343 3915 -315 ct +3924 -287 3928 -257 3928 -225 ct 3928 -150 3910 -92 3873 -51 ct 3835 -10 3791 9 3739 9 ct +3687 9 3646 -11 3617 -54 ct p +3616 -222 m 3616 -170 3623 -132 3638 -108 ct 3661 -70 3693 -51 3733 -51 ct +3765 -51 3793 -65 3817 -93 ct 3840 -121 3852 -163 3852 -219 ct 3852 -277 3841 -319 3818 -346 ct +3796 -373 3768 -387 3736 -387 ct 3703 -387 3675 -373 3652 -345 ct 3628 -316 l +3616 -276 l p ef +3970 -219 m 3970 -300 3992 -360 4037 -399 ct 4075 -432 4121 -448 4175 -448 ct +4236 -448 4285 -428 4323 -389 ct 4361 -349 4381 -295 4381 -225 ct 4381 -169 4372 -124 4355 -92 ct +4338 -59 4314 -34 4281 -16 ct 4249 0 4214 9 4175 9 ct 4114 9 4064 -9 4026 -49 ct +3989 -88 l 3970 -145 l p +4046 -219 m 4046 -163 4058 -121 4083 -93 ct 4107 -65 4138 -51 4175 -51 ct 4212 -51 4243 -65 4267 -93 ct +4292 -121 4304 -164 4304 -221 ct 4304 -276 4292 -317 4267 -345 ct 4243 -373 4212 -387 4175 -387 ct +4138 -387 4107 -373 4083 -345 ct 4058 -317 l 4046 -275 l p ef +4761 -54 m 4733 -30 4707 -14 4681 -4 ct 4656 5 4628 9 4599 9 ct 4551 9 4514 -1 4488 -25 ct +4462 -48 4449 -79 4449 -115 ct 4449 -137 4454 -156 4464 -174 ct 4474 -192 4486 -206 4502 -217 ct +4518 -228 4536 -236 4556 -241 ct 4570 -245 4592 -249 4622 -252 ct 4682 -259 4726 -268 4754 -278 ct +4755 -288 4755 -295 4755 -297 ct 4755 -328 4748 -349 4734 -361 ct 4715 -378 4686 -387 4649 -387 ct +4614 -387 4588 -380 4572 -368 ct 4555 -356 4543 -334 4535 -303 ct 4462 -313 l +4468 -344 4479 -369 4495 -388 ct 4510 -408 4532 -422 4560 -433 ct 4589 -443 4622 -448 4660 -448 ct +4697 -448 4728 -444 4751 -435 ct 4774 -426 4792 -415 4803 -402 ct 4814 -388 4821 -371 4826 -351 ct +4828 -338 4830 -316 4830 -282 ct 4830 -183 l 4830 -114 4831 -70 4834 -52 ct +4837 -34 4844 -16 4853 0 ct 4775 0 l 4768 -15 l 4763 -33 l p +4754 -220 m 4727 -209 4687 -199 4633 -192 ct 4602 -187 4581 -182 4568 -177 ct +4555 -171 4546 -163 4539 -153 ct 4532 -142 4528 -130 4528 -117 ct 4528 -97 4536 -81 4551 -68 ct +4566 -54 4588 -48 4617 -48 ct 4645 -48 4671 -54 4693 -67 ct 4716 -79 4732 -96 4742 -118 ct +4750 -135 4754 -160 4754 -192 ct p ef +4922 0 m 4922 -438 l 4989 -438 l 4989 -372 l 5006 -403 5022 -423 5037 -433 ct +5051 -443 5067 -448 5084 -448 ct 5109 -448 5135 -440 5161 -424 ct 5135 -355 l +5117 -366 5099 -371 5081 -371 ct 5064 -371 5050 -366 5037 -357 ct 5024 -347 5015 -333 5009 -316 ct +5001 -289 4997 -261 4997 -229 ct 4997 0 l p ef +5499 0 m 5499 -55 l 5471 -11 5430 9 5376 9 ct 5341 9 5309 0 5280 -19 ct 5250 -38 5228 -65 5212 -99 ct +5195 -134 5187 -174 5187 -218 ct 5187 -262 5195 -302 5209 -338 ct 5224 -373 5246 -401 5275 -420 ct +5304 -439 5337 -448 5373 -448 ct 5399 -448 5423 -443 5444 -431 ct 5464 -420 5481 -406 5494 -388 ct +5494 -605 l 5568 -605 l 5568 0 l p +5264 -218 m 5264 -162 5276 -120 5299 -92 ct 5323 -65 5351 -51 5383 -51 ct 5416 -51 5443 -64 5466 -91 ct +5489 -117 5500 -158 5500 -212 ct 5500 -272 5489 -316 5465 -344 ct 5442 -373 5414 -387 5380 -387 ct +5347 -387 5319 -373 5297 -346 ct 5275 -319 l 5264 -277 l p ef +pom +gr +4245 18828 m 1070 18828 l 1070 13113 l 7420 13113 l 7420 18828 l 4245 18828 l +pc +gs +pum +2607 15795 t +219 0 m 219 -534 l 19 -534 l 19 -605 l 499 -605 l 499 -534 l 299 -534 l +299 0 l p ef +583 0 m 583 -438 l 650 -438 l 650 -372 l 667 -403 683 -423 698 -433 ct +712 -443 728 -448 745 -448 ct 770 -448 796 -440 822 -424 ct 796 -355 l 778 -366 760 -371 742 -371 ct +725 -371 711 -366 698 -357 ct 685 -347 676 -333 670 -316 ct 662 -289 658 -261 658 -229 ct +658 0 l p ef +1162 -54 m 1134 -30 1108 -14 1082 -4 ct 1057 5 1029 9 1000 9 ct 952 9 915 -1 889 -25 ct +863 -48 850 -79 850 -115 ct 850 -137 855 -156 865 -174 ct 875 -192 887 -206 903 -217 ct +919 -228 937 -236 957 -241 ct 971 -245 993 -249 1023 -252 ct 1083 -259 1127 -268 1155 -278 ct +1156 -288 1156 -295 1156 -297 ct 1156 -328 1149 -349 1135 -361 ct 1116 -378 1087 -387 1050 -387 ct +1015 -387 989 -380 973 -368 ct 956 -356 944 -334 936 -303 ct 863 -313 l 869 -344 880 -369 896 -388 ct +911 -408 933 -422 961 -433 ct 990 -443 1023 -448 1061 -448 ct 1098 -448 1129 -444 1152 -435 ct +1175 -426 1193 -415 1204 -402 ct 1215 -388 1222 -371 1227 -351 ct 1229 -338 1231 -316 1231 -282 ct +1231 -183 l 1231 -114 1232 -70 1235 -52 ct 1238 -34 1245 -16 1254 0 ct 1176 0 l +1169 -15 l 1164 -33 l p +1155 -220 m 1128 -209 1088 -199 1034 -192 ct 1003 -187 982 -182 969 -177 ct +956 -171 947 -163 940 -153 ct 933 -142 929 -130 929 -117 ct 929 -97 937 -81 952 -68 ct +967 -54 989 -48 1018 -48 ct 1046 -48 1072 -54 1094 -67 ct 1117 -79 1133 -96 1143 -118 ct +1151 -135 1155 -160 1155 -192 ct p ef +1325 0 m 1325 -438 l 1392 -438 l 1392 -376 l 1424 -424 1471 -448 1532 -448 ct +1558 -448 1583 -443 1605 -434 ct 1627 -424 1643 -412 1654 -396 ct 1666 -381 1673 -363 1678 -342 ct +1680 -328 1682 -304 1682 -269 ct 1682 0 l 1607 0 l 1607 -266 l 1607 -297 1605 -319 1599 -334 ct +1593 -349 1583 -361 1568 -370 ct 1553 -379 1536 -384 1516 -384 ct 1484 -384 1457 -374 1434 -354 ct +1411 -333 1400 -295 1400 -239 ct 1400 0 l p ef +1772 -130 m 1845 -142 l 1849 -113 1861 -90 1880 -74 ct 1898 -59 1925 -51 1959 -51 ct +1993 -51 2018 -58 2035 -72 ct 2051 -85 2059 -102 2059 -121 ct 2059 -137 2052 -151 2038 -160 ct +2027 -167 2002 -175 1962 -185 ct 1907 -199 1869 -211 1848 -221 ct 1827 -231 1811 -245 1800 -263 ct +1789 -281 1784 -300 1784 -322 ct 1784 -341 1788 -359 1797 -376 ct 1806 -393 1818 -407 1834 -418 ct +1845 -426 1861 -433 1881 -439 ct 1901 -445 1923 -448 1945 -448 ct 1980 -448 2010 -443 2036 -433 ct +2062 -423 2081 -410 2094 -393 ct 2106 -376 2115 -353 2119 -325 ct 2047 -315 l +2043 -338 2034 -355 2018 -368 ct 2002 -381 1980 -387 1951 -387 ct 1917 -387 1892 -381 1878 -370 ct +1863 -359 1856 -346 1856 -330 ct 1856 -321 1859 -312 1865 -304 ct 1871 -296 1880 -290 1893 -285 ct +1901 -282 1923 -275 1959 -266 ct 2012 -251 2048 -240 2069 -231 ct 2090 -222 2106 -209 2118 -192 ct +2130 -175 2136 -154 2136 -128 ct 2136 -104 2129 -80 2114 -58 ct 2100 -36 2079 -20 2052 -8 ct +2024 3 1993 9 1959 9 ct 1902 9 1859 -1 1829 -25 ct 1799 -49 l 1780 -84 l p ef +2198 0 m 2198 -438 l 2265 -438 l 2265 -377 l 2279 -398 2297 -415 2320 -428 ct +2343 -442 2369 -448 2398 -448 ct 2430 -448 2457 -441 2478 -428 ct 2499 -414 2513 -396 2522 -371 ct +2556 -423 2602 -448 2657 -448 ct 2701 -448 2734 -436 2758 -412 ct 2781 -388 2793 -351 2793 -301 ct +2793 0 l 2719 0 l 2719 -276 l 2719 -306 2716 -327 2712 -340 ct 2707 -353 2698 -364 2685 -372 ct +2673 -380 2658 -384 2641 -384 ct 2610 -384 2584 -373 2564 -353 ct 2543 -332 2533 -300 2533 -254 ct +2533 0 l 2459 0 l 2459 -285 l 2459 -318 2453 -342 2441 -359 ct 2429 -375 2409 -384 2381 -384 ct +2360 -384 2341 -378 2323 -367 ct 2305 -356 2293 -340 2285 -319 ct 2277 -298 2273 -267 2273 -227 ct +2273 0 l p ef +2914 -520 m 2914 -605 l 2988 -605 l 2988 -520 l p +2914 0 m 2914 -438 l 2988 -438 l 2988 0 l p ef +3261 -66 m 3271 0 l 3250 3 3232 5 3215 5 ct 3188 5 3167 1 3152 -7 ct 3138 -15 3127 -26 3121 -40 ct +3115 -54 3112 -83 3112 -128 ct 3112 -380 l 3057 -380 l 3057 -438 l 3112 -438 l +3112 -547 l 3186 -591 l 3186 -438 l 3261 -438 l 3261 -380 l 3186 -380 l +3186 -124 l 3186 -103 3187 -89 3190 -83 ct 3192 -77 3197 -72 3203 -68 ct 3208 -65 3217 -63 3228 -63 ct +3236 -63 l 3247 -64 l p ef +pom +pum +1429 16748 t +65 0 m 65 -605 l 273 -605 l 320 -605 356 -602 381 -596 ct 416 -588 445 -574 470 -553 ct +502 -526 526 -492 542 -450 ct 558 -408 565 -360 565 -306 ct 565 -260 560 -219 549 -183 ct +539 -148 525 -118 508 -95 ct 491 -72 473 -54 453 -40 ct 433 -27 409 -17 381 -10 ct +352 -3 320 0 283 0 ct p +145 -71 m 274 -71 l 314 -71 345 -75 368 -82 ct 391 -90 409 -100 423 -114 ct +442 -133 456 -158 467 -190 ct 478 -222 483 -261 483 -307 ct 483 -370 472 -419 452 -453 ct +431 -487 406 -510 376 -521 ct 354 -530 320 -534 272 -534 ct 145 -534 l p ef +951 -54 m 923 -30 897 -14 871 -4 ct 846 5 818 9 789 9 ct 741 9 704 -1 678 -25 ct +652 -48 639 -79 639 -115 ct 639 -137 644 -156 654 -174 ct 664 -192 676 -206 692 -217 ct +708 -228 726 -236 746 -241 ct 760 -245 782 -249 812 -252 ct 872 -259 916 -268 944 -278 ct +945 -288 945 -295 945 -297 ct 945 -328 938 -349 924 -361 ct 905 -378 876 -387 839 -387 ct +804 -387 778 -380 762 -368 ct 745 -356 733 -334 725 -303 ct 652 -313 l 658 -344 669 -369 685 -388 ct +700 -408 722 -422 750 -433 ct 779 -443 812 -448 850 -448 ct 887 -448 918 -444 941 -435 ct +964 -426 982 -415 993 -402 ct 1004 -388 1011 -371 1016 -351 ct 1018 -338 1020 -316 1020 -282 ct +1020 -183 l 1020 -114 1021 -70 1024 -52 ct 1027 -34 1034 -16 1043 0 ct 965 0 l +958 -15 l 953 -33 l p +944 -220 m 917 -209 877 -199 823 -192 ct 792 -187 771 -182 758 -177 ct 745 -171 736 -163 729 -153 ct +722 -142 718 -130 718 -117 ct 718 -97 726 -81 741 -68 ct 756 -54 778 -48 807 -48 ct +835 -48 861 -54 883 -67 ct 906 -79 922 -96 932 -118 ct 940 -135 944 -160 944 -192 ct +p ef +1401 0 m 1401 -64 l 1367 -14 1320 9 1262 9 ct 1236 9 1212 4 1189 -4 ct 1167 -14 1150 -27 1139 -42 ct +1128 -57 1121 -75 1116 -97 ct 1113 -112 1112 -135 1112 -166 ct 1112 -438 l 1186 -438 l +1186 -195 l 1186 -156 1187 -130 1191 -116 ct 1195 -97 1205 -82 1220 -70 ct +1235 -59 1254 -54 1276 -54 ct 1299 -54 1320 -59 1339 -71 ct 1359 -82 1373 -98 1381 -117 ct +1389 -137 1393 -166 1393 -203 ct 1393 -438 l 1467 -438 l 1467 0 l p ef +1577 36 m 1649 47 l 1652 69 1660 85 1674 95 ct 1693 109 1718 116 1750 116 ct +1784 116 1811 109 1829 95 ct 1848 82 1861 62 1867 38 ct 1871 22 1873 -8 1873 -57 ct +1840 -19 1800 0 1751 0 ct 1691 0 1644 -21 1611 -65 ct 1578 -108 1562 -160 1562 -221 ct +1562 -263 1569 -302 1584 -337 ct 1600 -373 1622 -400 1650 -419 ct 1679 -438 1713 -448 1752 -448 ct +1804 -448 1846 -427 1880 -385 ct 1880 -438 l 1948 -438 l 1948 -59 l 1948 8 1941 57 1928 85 ct +1914 114 1892 136 1861 153 ct 1831 169 1794 178 1750 178 ct 1698 178 1656 166 1623 142 ct +1591 119 l 1576 83 l p +1638 -227 m 1638 -169 1650 -127 1672 -101 ct 1695 -74 1724 -61 1758 -61 ct +1793 -61 1821 -74 1844 -101 ct 1867 -127 1879 -168 1879 -224 ct 1879 -278 1867 -318 1843 -346 ct +1819 -373 1791 -387 1757 -387 ct 1724 -387 1696 -373 1673 -346 ct 1650 -319 l +1638 -280 l p ef +2066 0 m 2066 -605 l 2141 -605 l 2141 -388 l 2175 -428 2219 -448 2272 -448 ct +2304 -448 2333 -442 2357 -429 ct 2381 -416 2398 -398 2408 -376 ct 2418 -353 2424 -320 2424 -278 ct +2424 0 l 2349 0 l 2349 -278 l 2349 -315 2341 -342 2325 -359 ct 2309 -376 2286 -384 2257 -384 ct +2235 -384 2214 -378 2195 -367 ct 2175 -356 2161 -340 2153 -320 ct 2145 -301 2141 -274 2141 -240 ct +2141 0 l p ef +2705 -66 m 2715 0 l 2694 3 2676 5 2659 5 ct 2632 5 2611 1 2596 -7 ct 2582 -15 2571 -26 2565 -40 ct +2559 -54 2556 -83 2556 -128 ct 2556 -380 l 2501 -380 l 2501 -438 l 2556 -438 l +2556 -547 l 2630 -591 l 2630 -438 l 2705 -438 l 2705 -380 l 2630 -380 l +2630 -124 l 2630 -103 2631 -89 2634 -83 ct 2636 -77 2641 -72 2647 -68 ct 2652 -65 2661 -63 2672 -63 ct +2680 -63 l 2691 -64 l p ef +3081 -141 m 3157 -131 l 3145 -86 3123 -52 3090 -27 ct 3057 -2 3015 9 2965 9 ct +2900 9 2849 -9 2812 -49 ct 2774 -88 2755 -144 2755 -215 ct 2755 -289 2774 -346 2812 -387 ct +2851 -428 2900 -448 2960 -448 ct 3019 -448 3067 -428 3104 -388 ct 3141 -348 3160 -292 3160 -220 ct +3160 -215 3160 -209 3159 -200 ct 2832 -200 l 2835 -152 2849 -115 2873 -89 ct +2898 -64 2928 -51 2965 -51 ct 2992 -51 3015 -58 3035 -72 ct 3054 -87 l 3069 -109 l +p +2836 -261 m 3081 -261 l 3078 -298 3069 -326 3053 -344 ct 3030 -373 2999 -387 2961 -387 ct +2927 -387 2898 -376 2875 -353 ct 2852 -330 l 2839 -299 l p ef +3255 0 m 3255 -438 l 3322 -438 l 3322 -372 l 3339 -403 3355 -423 3370 -433 ct +3384 -443 3400 -448 3417 -448 ct 3442 -448 3468 -440 3494 -424 ct 3468 -355 l +3450 -366 3432 -371 3414 -371 ct 3397 -371 3383 -366 3370 -357 ct 3357 -347 3348 -333 3342 -316 ct +3334 -289 3330 -261 3330 -229 ct 3330 0 l p ef +3617 0 m 3548 0 l 3548 -605 l 3622 -605 l 3622 -389 l 3654 -428 3694 -448 3742 -448 ct +3769 -448 3795 -443 3819 -432 ct 3843 -421 3863 -406 3879 -386 ct 3894 -366 3906 -343 3915 -315 ct +3924 -287 3928 -257 3928 -225 ct 3928 -150 3910 -92 3873 -51 ct 3835 -10 3791 9 3739 9 ct +3687 9 3646 -11 3617 -54 ct p +3616 -222 m 3616 -170 3623 -132 3638 -108 ct 3661 -70 3693 -51 3733 -51 ct +3765 -51 3793 -65 3817 -93 ct 3840 -121 3852 -163 3852 -219 ct 3852 -277 3841 -319 3818 -346 ct +3796 -373 3768 -387 3736 -387 ct 3703 -387 3675 -373 3652 -345 ct 3628 -316 l +3616 -276 l p ef +3970 -219 m 3970 -300 3992 -360 4037 -399 ct 4075 -432 4121 -448 4175 -448 ct +4236 -448 4285 -428 4323 -389 ct 4361 -349 4381 -295 4381 -225 ct 4381 -169 4372 -124 4355 -92 ct +4338 -59 4314 -34 4281 -16 ct 4249 0 4214 9 4175 9 ct 4114 9 4064 -9 4026 -49 ct +3989 -88 l 3970 -145 l p +4046 -219 m 4046 -163 4058 -121 4083 -93 ct 4107 -65 4138 -51 4175 -51 ct 4212 -51 4243 -65 4267 -93 ct +4292 -121 4304 -164 4304 -221 ct 4304 -276 4292 -317 4267 -345 ct 4243 -373 4212 -387 4175 -387 ct +4138 -387 4107 -373 4083 -345 ct 4058 -317 l 4046 -275 l p ef +4761 -54 m 4733 -30 4707 -14 4681 -4 ct 4656 5 4628 9 4599 9 ct 4551 9 4514 -1 4488 -25 ct +4462 -48 4449 -79 4449 -115 ct 4449 -137 4454 -156 4464 -174 ct 4474 -192 4486 -206 4502 -217 ct +4518 -228 4536 -236 4556 -241 ct 4570 -245 4592 -249 4622 -252 ct 4682 -259 4726 -268 4754 -278 ct +4755 -288 4755 -295 4755 -297 ct 4755 -328 4748 -349 4734 -361 ct 4715 -378 4686 -387 4649 -387 ct +4614 -387 4588 -380 4572 -368 ct 4555 -356 4543 -334 4535 -303 ct 4462 -313 l +4468 -344 4479 -369 4495 -388 ct 4510 -408 4532 -422 4560 -433 ct 4589 -443 4622 -448 4660 -448 ct +4697 -448 4728 -444 4751 -435 ct 4774 -426 4792 -415 4803 -402 ct 4814 -388 4821 -371 4826 -351 ct +4828 -338 4830 -316 4830 -282 ct 4830 -183 l 4830 -114 4831 -70 4834 -52 ct +4837 -34 4844 -16 4853 0 ct 4775 0 l 4768 -15 l 4763 -33 l p +4754 -220 m 4727 -209 4687 -199 4633 -192 ct 4602 -187 4581 -182 4568 -177 ct +4555 -171 4546 -163 4539 -153 ct 4532 -142 4528 -130 4528 -117 ct 4528 -97 4536 -81 4551 -68 ct +4566 -54 4588 -48 4617 -48 ct 4645 -48 4671 -54 4693 -67 ct 4716 -79 4732 -96 4742 -118 ct +4750 -135 4754 -160 4754 -192 ct p ef +4922 0 m 4922 -438 l 4989 -438 l 4989 -372 l 5006 -403 5022 -423 5037 -433 ct +5051 -443 5067 -448 5084 -448 ct 5109 -448 5135 -440 5161 -424 ct 5135 -355 l +5117 -366 5099 -371 5081 -371 ct 5064 -371 5050 -366 5037 -357 ct 5024 -347 5015 -333 5009 -316 ct +5001 -289 4997 -261 4997 -229 ct 4997 0 l p ef +5499 0 m 5499 -55 l 5471 -11 5430 9 5376 9 ct 5341 9 5309 0 5280 -19 ct 5250 -38 5228 -65 5212 -99 ct +5195 -134 5187 -174 5187 -218 ct 5187 -262 5195 -302 5209 -338 ct 5224 -373 5246 -401 5275 -420 ct +5304 -439 5337 -448 5373 -448 ct 5399 -448 5423 -443 5444 -431 ct 5464 -420 5481 -406 5494 -388 ct +5494 -605 l 5568 -605 l 5568 0 l p +5264 -218 m 5264 -162 5276 -120 5299 -92 ct 5323 -65 5351 -51 5383 -51 ct 5416 -51 5443 -64 5466 -91 ct +5489 -117 5500 -158 5500 -212 ct 5500 -272 5489 -316 5465 -344 ct 5442 -373 5414 -387 5380 -387 ct +5347 -387 5319 -373 5297 -346 ct 5275 -319 l 5264 -277 l p ef +pom +gr +4245 12065 m 1070 12065 l 1070 6350 l 7420 6350 l 7420 12065 l 4245 12065 l +pc +gs +pum +2713 9022 t +66 0 m 66 -605 l 335 -605 l 389 -605 430 -600 458 -589 ct 486 -578 508 -559 525 -531 ct +542 -504 550 -473 550 -440 ct 550 -397 536 -361 508 -331 ct 481 -302 438 -283 380 -275 ct +401 -265 417 -255 428 -245 ct 451 -223 473 -197 494 -164 ct 600 0 l 499 0 l +419 -125 l 395 -162 376 -190 361 -209 ct 346 -228 332 -242 320 -249 ct 308 -257 296 -263 284 -266 ct +275 -267 260 -268 239 -268 ct 146 -268 l 146 0 l p +146 -338 m 318 -338 l 355 -338 384 -342 404 -349 ct 425 -357 441 -369 451 -386 ct +462 -402 468 -420 468 -440 ct 468 -468 457 -492 436 -510 ct 416 -529 383 -538 338 -538 ct +146 -538 l p ef +965 -141 m 1041 -131 l 1029 -86 1007 -52 974 -27 ct 941 -2 899 9 849 9 ct +784 9 733 -9 696 -49 ct 658 -88 639 -144 639 -215 ct 639 -289 658 -346 696 -387 ct +735 -428 784 -448 844 -448 ct 903 -448 951 -428 988 -388 ct 1025 -348 1044 -292 1044 -220 ct +1044 -215 1044 -209 1043 -200 ct 716 -200 l 719 -152 733 -115 757 -89 ct 782 -64 812 -51 849 -51 ct +876 -51 899 -58 919 -72 ct 938 -87 l 953 -109 l p +720 -261 m 965 -261 l 962 -298 953 -326 937 -344 ct 914 -373 883 -387 845 -387 ct +811 -387 782 -376 759 -353 ct 736 -330 l 723 -299 l p ef +1427 -160 m 1500 -151 l 1492 -100 1471 -61 1438 -32 ct 1405 -4 1365 9 1317 9 ct +1257 9 1209 -9 1172 -48 ct 1136 -88 1118 -144 1118 -217 ct 1118 -265 1125 -306 1141 -342 ct +1157 -377 1181 -404 1213 -421 ct 1245 -439 1280 -448 1317 -448 ct 1365 -448 1404 -436 1434 -412 ct +1465 -388 1484 -354 1493 -309 ct 1420 -298 l 1413 -328 1401 -350 1384 -365 ct +1366 -380 1345 -387 1320 -387 ct 1283 -387 1252 -374 1229 -347 ct 1206 -320 1194 -277 1194 -219 ct +1194 -160 1205 -118 1228 -91 ct 1250 -64 1280 -51 1316 -51 ct 1345 -51 1370 -60 1389 -78 ct +1409 -95 l 1421 -123 l p ef +1864 -141 m 1940 -131 l 1928 -86 1906 -52 1873 -27 ct 1840 -2 1798 9 1748 9 ct +1683 9 1632 -9 1595 -49 ct 1557 -88 1538 -144 1538 -215 ct 1538 -289 1557 -346 1595 -387 ct +1634 -428 1683 -448 1743 -448 ct 1802 -448 1850 -428 1887 -388 ct 1924 -348 1943 -292 1943 -220 ct +1943 -215 1943 -209 1942 -200 ct 1615 -200 l 1618 -152 1632 -115 1656 -89 ct +1681 -64 1711 -51 1748 -51 ct 1775 -51 1798 -58 1818 -72 ct 1837 -87 l 1852 -109 l +p +1619 -261 m 1864 -261 l 1861 -298 1852 -326 1836 -344 ct 1813 -373 1782 -387 1744 -387 ct +1710 -387 1681 -376 1658 -353 ct 1635 -330 l 1622 -299 l p ef +2040 -520 m 2040 -605 l 2114 -605 l 2114 -520 l p +2040 0 m 2040 -438 l 2114 -438 l 2114 0 l p ef +2347 0 m 2180 -438 l 2259 -438 l 2353 -175 l 2363 -147 2372 -118 2381 -87 ct +2388 -110 2397 -138 2409 -171 ct 2506 -438 l 2583 -438 l 2417 0 l p ef +2949 -141 m 3025 -131 l 3013 -86 2991 -52 2958 -27 ct 2925 -2 2883 9 2833 9 ct +2768 9 2717 -9 2680 -49 ct 2642 -88 2623 -144 2623 -215 ct 2623 -289 2642 -346 2680 -387 ct +2719 -428 2768 -448 2828 -448 ct 2887 -448 2935 -428 2972 -388 ct 3009 -348 3028 -292 3028 -220 ct +3028 -215 3028 -209 3027 -200 ct 2700 -200 l 2703 -152 2717 -115 2741 -89 ct +2766 -64 2796 -51 2833 -51 ct 2860 -51 2883 -58 2903 -72 ct 2922 -87 l 2937 -109 l +p +2704 -261 m 2949 -261 l 2946 -298 2937 -326 2921 -344 ct 2898 -373 2867 -387 2829 -387 ct +2795 -387 2766 -376 2743 -353 ct 2720 -330 l 2707 -299 l p ef +pom +pum +1429 9975 t +65 0 m 65 -605 l 273 -605 l 320 -605 356 -602 381 -596 ct 416 -588 445 -574 470 -553 ct +502 -526 526 -492 542 -450 ct 558 -408 565 -360 565 -306 ct 565 -260 560 -219 549 -183 ct +539 -148 525 -118 508 -95 ct 491 -72 473 -54 453 -40 ct 433 -27 409 -17 381 -10 ct +352 -3 320 0 283 0 ct p +145 -71 m 274 -71 l 314 -71 345 -75 368 -82 ct 391 -90 409 -100 423 -114 ct +442 -133 456 -158 467 -190 ct 478 -222 483 -261 483 -307 ct 483 -370 472 -419 452 -453 ct +431 -487 406 -510 376 -521 ct 354 -530 320 -534 272 -534 ct 145 -534 l p ef +951 -54 m 923 -30 897 -14 871 -4 ct 846 5 818 9 789 9 ct 741 9 704 -1 678 -25 ct +652 -48 639 -79 639 -115 ct 639 -137 644 -156 654 -174 ct 664 -192 676 -206 692 -217 ct +708 -228 726 -236 746 -241 ct 760 -245 782 -249 812 -252 ct 872 -259 916 -268 944 -278 ct +945 -288 945 -295 945 -297 ct 945 -328 938 -349 924 -361 ct 905 -378 876 -387 839 -387 ct +804 -387 778 -380 762 -368 ct 745 -356 733 -334 725 -303 ct 652 -313 l 658 -344 669 -369 685 -388 ct +700 -408 722 -422 750 -433 ct 779 -443 812 -448 850 -448 ct 887 -448 918 -444 941 -435 ct +964 -426 982 -415 993 -402 ct 1004 -388 1011 -371 1016 -351 ct 1018 -338 1020 -316 1020 -282 ct +1020 -183 l 1020 -114 1021 -70 1024 -52 ct 1027 -34 1034 -16 1043 0 ct 965 0 l +958 -15 l 953 -33 l p +944 -220 m 917 -209 877 -199 823 -192 ct 792 -187 771 -182 758 -177 ct 745 -171 736 -163 729 -153 ct +722 -142 718 -130 718 -117 ct 718 -97 726 -81 741 -68 ct 756 -54 778 -48 807 -48 ct +835 -48 861 -54 883 -67 ct 906 -79 922 -96 932 -118 ct 940 -135 944 -160 944 -192 ct +p ef +1401 0 m 1401 -64 l 1367 -14 1320 9 1262 9 ct 1236 9 1212 4 1189 -4 ct 1167 -14 1150 -27 1139 -42 ct +1128 -57 1121 -75 1116 -97 ct 1113 -112 1112 -135 1112 -166 ct 1112 -438 l 1186 -438 l +1186 -195 l 1186 -156 1187 -130 1191 -116 ct 1195 -97 1205 -82 1220 -70 ct +1235 -59 1254 -54 1276 -54 ct 1299 -54 1320 -59 1339 -71 ct 1359 -82 1373 -98 1381 -117 ct +1389 -137 1393 -166 1393 -203 ct 1393 -438 l 1467 -438 l 1467 0 l p ef +1577 36 m 1649 47 l 1652 69 1660 85 1674 95 ct 1693 109 1718 116 1750 116 ct +1784 116 1811 109 1829 95 ct 1848 82 1861 62 1867 38 ct 1871 22 1873 -8 1873 -57 ct +1840 -19 1800 0 1751 0 ct 1691 0 1644 -21 1611 -65 ct 1578 -108 1562 -160 1562 -221 ct +1562 -263 1569 -302 1584 -337 ct 1600 -373 1622 -400 1650 -419 ct 1679 -438 1713 -448 1752 -448 ct +1804 -448 1846 -427 1880 -385 ct 1880 -438 l 1948 -438 l 1948 -59 l 1948 8 1941 57 1928 85 ct +1914 114 1892 136 1861 153 ct 1831 169 1794 178 1750 178 ct 1698 178 1656 166 1623 142 ct +1591 119 l 1576 83 l p +1638 -227 m 1638 -169 1650 -127 1672 -101 ct 1695 -74 1724 -61 1758 -61 ct +1793 -61 1821 -74 1844 -101 ct 1867 -127 1879 -168 1879 -224 ct 1879 -278 1867 -318 1843 -346 ct +1819 -373 1791 -387 1757 -387 ct 1724 -387 1696 -373 1673 -346 ct 1650 -319 l +1638 -280 l p ef +2066 0 m 2066 -605 l 2141 -605 l 2141 -388 l 2175 -428 2219 -448 2272 -448 ct +2304 -448 2333 -442 2357 -429 ct 2381 -416 2398 -398 2408 -376 ct 2418 -353 2424 -320 2424 -278 ct +2424 0 l 2349 0 l 2349 -278 l 2349 -315 2341 -342 2325 -359 ct 2309 -376 2286 -384 2257 -384 ct +2235 -384 2214 -378 2195 -367 ct 2175 -356 2161 -340 2153 -320 ct 2145 -301 2141 -274 2141 -240 ct +2141 0 l p ef +2705 -66 m 2715 0 l 2694 3 2676 5 2659 5 ct 2632 5 2611 1 2596 -7 ct 2582 -15 2571 -26 2565 -40 ct +2559 -54 2556 -83 2556 -128 ct 2556 -380 l 2501 -380 l 2501 -438 l 2556 -438 l +2556 -547 l 2630 -591 l 2630 -438 l 2705 -438 l 2705 -380 l 2630 -380 l +2630 -124 l 2630 -103 2631 -89 2634 -83 ct 2636 -77 2641 -72 2647 -68 ct 2652 -65 2661 -63 2672 -63 ct +2680 -63 l 2691 -64 l p ef +3081 -141 m 3157 -131 l 3145 -86 3123 -52 3090 -27 ct 3057 -2 3015 9 2965 9 ct +2900 9 2849 -9 2812 -49 ct 2774 -88 2755 -144 2755 -215 ct 2755 -289 2774 -346 2812 -387 ct +2851 -428 2900 -448 2960 -448 ct 3019 -448 3067 -428 3104 -388 ct 3141 -348 3160 -292 3160 -220 ct +3160 -215 3160 -209 3159 -200 ct 2832 -200 l 2835 -152 2849 -115 2873 -89 ct +2898 -64 2928 -51 2965 -51 ct 2992 -51 3015 -58 3035 -72 ct 3054 -87 l 3069 -109 l +p +2836 -261 m 3081 -261 l 3078 -298 3069 -326 3053 -344 ct 3030 -373 2999 -387 2961 -387 ct +2927 -387 2898 -376 2875 -353 ct 2852 -330 l 2839 -299 l p ef +3255 0 m 3255 -438 l 3322 -438 l 3322 -372 l 3339 -403 3355 -423 3370 -433 ct +3384 -443 3400 -448 3417 -448 ct 3442 -448 3468 -440 3494 -424 ct 3468 -355 l +3450 -366 3432 -371 3414 -371 ct 3397 -371 3383 -366 3370 -357 ct 3357 -347 3348 -333 3342 -316 ct +3334 -289 3330 -261 3330 -229 ct 3330 0 l p ef +3617 0 m 3548 0 l 3548 -605 l 3622 -605 l 3622 -389 l 3654 -428 3694 -448 3742 -448 ct +3769 -448 3795 -443 3819 -432 ct 3843 -421 3863 -406 3879 -386 ct 3894 -366 3906 -343 3915 -315 ct +3924 -287 3928 -257 3928 -225 ct 3928 -150 3910 -92 3873 -51 ct 3835 -10 3791 9 3739 9 ct +3687 9 3646 -11 3617 -54 ct p +3616 -222 m 3616 -170 3623 -132 3638 -108 ct 3661 -70 3693 -51 3733 -51 ct +3765 -51 3793 -65 3817 -93 ct 3840 -121 3852 -163 3852 -219 ct 3852 -277 3841 -319 3818 -346 ct +3796 -373 3768 -387 3736 -387 ct 3703 -387 3675 -373 3652 -345 ct 3628 -316 l +3616 -276 l p ef +3970 -219 m 3970 -300 3992 -360 4037 -399 ct 4075 -432 4121 -448 4175 -448 ct +4236 -448 4285 -428 4323 -389 ct 4361 -349 4381 -295 4381 -225 ct 4381 -169 4372 -124 4355 -92 ct +4338 -59 4314 -34 4281 -16 ct 4249 0 4214 9 4175 9 ct 4114 9 4064 -9 4026 -49 ct +3989 -88 l 3970 -145 l p +4046 -219 m 4046 -163 4058 -121 4083 -93 ct 4107 -65 4138 -51 4175 -51 ct 4212 -51 4243 -65 4267 -93 ct +4292 -121 4304 -164 4304 -221 ct 4304 -276 4292 -317 4267 -345 ct 4243 -373 4212 -387 4175 -387 ct +4138 -387 4107 -373 4083 -345 ct 4058 -317 l 4046 -275 l p ef +4761 -54 m 4733 -30 4707 -14 4681 -4 ct 4656 5 4628 9 4599 9 ct 4551 9 4514 -1 4488 -25 ct +4462 -48 4449 -79 4449 -115 ct 4449 -137 4454 -156 4464 -174 ct 4474 -192 4486 -206 4502 -217 ct +4518 -228 4536 -236 4556 -241 ct 4570 -245 4592 -249 4622 -252 ct 4682 -259 4726 -268 4754 -278 ct +4755 -288 4755 -295 4755 -297 ct 4755 -328 4748 -349 4734 -361 ct 4715 -378 4686 -387 4649 -387 ct +4614 -387 4588 -380 4572 -368 ct 4555 -356 4543 -334 4535 -303 ct 4462 -313 l +4468 -344 4479 -369 4495 -388 ct 4510 -408 4532 -422 4560 -433 ct 4589 -443 4622 -448 4660 -448 ct +4697 -448 4728 -444 4751 -435 ct 4774 -426 4792 -415 4803 -402 ct 4814 -388 4821 -371 4826 -351 ct +4828 -338 4830 -316 4830 -282 ct 4830 -183 l 4830 -114 4831 -70 4834 -52 ct +4837 -34 4844 -16 4853 0 ct 4775 0 l 4768 -15 l 4763 -33 l p +4754 -220 m 4727 -209 4687 -199 4633 -192 ct 4602 -187 4581 -182 4568 -177 ct +4555 -171 4546 -163 4539 -153 ct 4532 -142 4528 -130 4528 -117 ct 4528 -97 4536 -81 4551 -68 ct +4566 -54 4588 -48 4617 -48 ct 4645 -48 4671 -54 4693 -67 ct 4716 -79 4732 -96 4742 -118 ct +4750 -135 4754 -160 4754 -192 ct p ef +4922 0 m 4922 -438 l 4989 -438 l 4989 -372 l 5006 -403 5022 -423 5037 -433 ct +5051 -443 5067 -448 5084 -448 ct 5109 -448 5135 -440 5161 -424 ct 5135 -355 l +5117 -366 5099 -371 5081 -371 ct 5064 -371 5050 -366 5037 -357 ct 5024 -347 5015 -333 5009 -316 ct +5001 -289 4997 -261 4997 -229 ct 4997 0 l p ef +5499 0 m 5499 -55 l 5471 -11 5430 9 5376 9 ct 5341 9 5309 0 5280 -19 ct 5250 -38 5228 -65 5212 -99 ct +5195 -134 5187 -174 5187 -218 ct 5187 -262 5195 -302 5209 -338 ct 5224 -373 5246 -401 5275 -420 ct +5304 -439 5337 -448 5373 -448 ct 5399 -448 5423 -443 5444 -431 ct 5464 -420 5481 -406 5494 -388 ct +5494 -605 l 5568 -605 l 5568 0 l p +5264 -218 m 5264 -162 5276 -120 5299 -92 ct 5323 -65 5351 -51 5383 -51 ct 5416 -51 5443 -64 5466 -91 ct +5489 -117 5500 -158 5500 -212 ct 5500 -272 5489 -316 5465 -344 ct 5442 -373 5414 -387 5380 -387 ct +5347 -387 5319 -373 5297 -346 ct 5275 -319 l 5264 -277 l p ef +pom +gr +51 lw 13970 5080 m 13970 6350 l ps +11010 7920 m 11900 7920 l ps +11010 10460 m 11900 10460 l ps +11010 14605 m 11900 14605 l ps +11010 17245 m 11900 17245 l ps +7835 7955 m 7420 7955 l ps +7835 10460 m 7420 10460 l ps +7835 14605 m 7420 14605 l ps +7835 17245 m 7420 17245 l ps +16013 7955 m 16809 7955 l ps +19984 7920 m 20592 7920 l ps +19984 10460 m 20592 10460 l ps +16013 10495 m 16809 10495 l ps +16013 14605 m 16809 14605 l ps +16013 17245 m 16809 17245 l ps +19984 14605 m 20592 14605 l ps +19984 17245 m 20592 17245 l ps +gr +0 20290 t +pom +count op_count sub {pop} repeat countdictstack dict_count sub {end} repeat b4_inc_state restore +%%PageTrailer +%%Trailer +%%EOF diff --git a/doc/usrp-block-diagram.png b/doc/usrp-block-diagram.png new file mode 100644 index 0000000000000000000000000000000000000000..55a0f0b38637603cf006a0a88d500ce7a482077c GIT binary patch literal 35729 zcmZs@2RxR4-#0D_$qPw#R+6O1%BGBvtQ4}NC>f#bm5?N4g^*1`q9HrUN(jlw2pJjK zoB#Xl`ajQeKllBdzt`1OoKDB_9iPv8eUD%*jdK*t6huTs6sjtUIz&XfR`5R`a$FH^?7N?e`CVv+ESk*~t zd_EuH58p--{P}zye-LF$6aM@^U;Z!OtE$`c(rb_Ger{UT0dfg(*2nT3Dj7OCx)1Ay z=UhDtj0GtV(~vU;HdqSbYd6OYX^EZ-P!sv9UcA^|e4|}?kyBipvF25-Ucrab(%GM- z3=NX0@8ACz7?6{eepWN|*R|}xQH@7T!q-1N*l%ZNmy(il?b@|uH(gPp^?4$}`!vCd zM~)n!qqz3}Y>dPv5-qqn!WtBavVkUr!MzVhwcx1Xgh$B!LL zlyb4#Se{NwN;`c$CkdZ~FR`DxMBg?aQfn^X6ok+ro$`1qDS*qEuEv zL0ARf@#6(1<&vjP6_%7ph=@dKWUb`+wTvZ;-~QEK?t#G(5fu&K*@H!AMs9xfs*umN z=bD~mqDF>}2cN6DI%P<0suu6L$E>%VoD`gj96x;cK*c7#+O8?roN#(J!M;LUSNHz^ z`f&@3BDaO#r?=Ku=Z10N6YW_n%*#1gjf!-*13*D?0{_wO&5 zo**HtJxc9|At4G13b_51*#XTIEt7KhH$FSw3=FZs2aaB4{Qmv>Tl1Pg!*_PJ{bg%% zJ8NN{%=AREyUZ@p{hg?}T6lNr2L`e5_OLQO0b}I0aQ(=Uj6+g)MMOl%ci+S1^uDtX z3JNMPD$(JI+#7H>Q=Ew6yo;TwPgN z*@FiUrlzJ$eYT=&hMvj!^tZP=jqIqXsoncdBD<^VDv2kB7H?ETaVaTW`fTsJu-dED0sr53cN1z^Rn_g8J_#wQ()KJ( z8yg!7Mlq+~>H-1KgD| zXvRh*CMJHCn0VpBh2}3`zT` z&!0bEU|MNsW@ct-xqF(DaMy#c%&PBUNXEy7#nZ(+E*SscI-bF_;(u{!^bdCIn8UK z`ShQzf|f5|Jl7X*ptPW}4i67&CQ6E8Sam;FS96Mp(0SQeTfg_-T6Y=n!bC|r{r=J= zsdiaU@0_AyU!~7ZYl=d3b+rR0VVkXTFfuV=4=hm>21$2of6v06?&-NAEG#UUI5SFk z5x%)N(JpH9{h9dfv-$I+q@<{RF|#wXvvN1SrT_TxLp748&AQkmIyO4mw(tEZ2?@8A znVE{;jVK zt1nMaVZQY8jV7k1=qLh+{hp_%k9-bg>FMba6BA<$EP4MP(_r-8fm2lU5(mw5p_XJh zO;yzii4wjDmDQcJ(o(6DC-XBhYI}MQtnNPt7 zEG#VS`^(}YBip}!&&GA9c#5*rY3y-suFa)O2aOIBz}Pk? zvELxt7}^#JcSJ;l%S>N)nVZwyyURUqY$78gcS4)&Z{3>0+_`^Na%K5+^)`O?VMx{W zqJ0z;>!0O_d{e0PZ~3O2Ra0yHnkcokwFStaoYj7casjWE6>2J~{&)7tiHV1<{CsH6 z7*sRlAP$T$e?sQQjT`$zYAHz-D#G8OndtRX=jitI_dl*1_UKei(PE_h+`DNQq0-UQ zv)(grbTYPPNRW|ID2_7rAOQsI45QBPCg$Ylr&N{xSY3^tNrBJO*4|$uD4V>qF)Z`>rgi3#ZKa1F{*4EbXa|8AR6)649 zmO`kC$;ksRF6E9pyL)(S>u(F*hFqIz(G}uq{T|UCC0k!6VyS8;>79E}zf& zHMbfbPP5ka{{8##@Nl5FugP+iXqJ+aABu}bBqihJIYvfD(O*#STjE7?b90aL@x92) zJ0T{928CB~dHK)w_ICUwH}}uX&(e~T5-fQU<_joz^P^3;PI3y0ctP{Cs;Uhr3ixS& z!?nyxcYwt=HeIA-WIl7X3}^$|+S+^e?8(wdq$S@yF)@Mdh*JNixVYonw|k7W1ngoa z6Uqm0x#jGQPCfc*i z9mc*U=I5W()YL@5o}Zsb&1Pg_85TO1H=41@Wfs0p8E{rxN9RRO4%#>KX**V-g2)C-A0HoSw&a9_ zjh?lBEavrf_Y|$C;o%OG9XSB!7`59aeZPKP)s+V`=}<=ZW9`-3Ey>}k_nWV;^gK3yiejh2z1}PT*XZQCE{{DI z;$C-8bye867CJgPVFE^30IWxa%TdxDM0XKt83kHUf|#wEs%o5+OTK5CBA0~My0fF> ze0{{>Q^w6sxL<)Q4HDH>D!)2F=0j{SUpJMHb;%lz~%ckUeF<|Yp~OGXy7ZS#4^!Be(!R*R@c5SvR$ zsa9@#H7zCO3_rb-__Nhj*BsrOR#q!LFZi*yDJbw3U>wY9a!aN2#J9=LToj%`3gXsS z@DV{#Q5o02gJ?|W!q}!KCQ#lDw6*8(rZ{0M5R^;W+HGIH-1_r94-g!9ms#|tE>Hu| zU#e0FYWId|fu*hO&%VCRr7lxIW=Bx7a$OI+zxSg$J4;&|E3qdG#n77H zzI|J937r|e=%i_dG%v3;sx3eLpXKRZ%>2^)ynELrJt9Ftnz!}?RC%cQKS(u0f?{hjw;((sJuOYa z(9i=zo6Q|ocYq?`Vy3z_s#kmaMQ!bf2Fu^Sf5*hc@YCCTOIHQT%pUnWR3jrT4P@EW z)HLDjZf!k|at0Kj%Qrnf&M0>4X-LREW-|3SAs}@nQ`3REx~$UDQcSU`>W#KkCER#g zn{{>>E=Rg+us2zX$Wxp{k4~^vKA-nJnXljODFTQ7e-r8d`sM#lvax0!TqdO?=8CX> zMb$jEuy^-Iv(ZU~>d^midZ0AiIQz>q`=1{=Yio~SShXJK=jQG^Oh(qi&RN(Sy)u!iqPe&9daOX(-Mk%Wd2l(_kQkXgXy0Z(0Xt%ciT_s4_z@8 z9xM65!F!8)f-1OagFp56Z!bu1ef)UVPrh{}bMtxeyLTwie8-Ma{Me6q306$?_pcfA z%pDsY-H&$VN2Iw$mH~9r(lTqiG4Jl~j;`l_dE+^Gz(>@fmgU7`bPxUf{7@LPyy97@ zvQTA&D?3%WpTxy6F#~Ps>a5%CPM{-7LH%I?tqW;I+{!>akAJU}kl|AJu-EX#s zgNue-k*iOe{m;QDwG5D5nsN$VHpUP2makEAHlZtcihw4 z(}R_W)}@%RE1E2jODCroeIIvIQ)A&f?9<@!93O_a%P=!DU%q^q#K)*m-$+O2NkYP( z!9gO6*P4476TP@-O^u9$F*`giEXix&VCToL5VyKymm4{Cp5 zR8zFXuYMx8rWiE6ir3AX@i8$xG~~}ksoC=F+dSy) z&!0bAIg&r}Qp67qEAi50W@Q=b>s#NvdDez#c0Y;-3RXvlE*Tja0CN4@ZZ9`8nnA}B z{BrC>kf1@jU1cuTBJn{%=b&S#zwmD)AqiFI8Fmnli;G)cUcPeWN-IYd*;xaF?&|6k z6mN)G7jhI(zz4V5dwSv%6J>DCl8ICbHwG2Ohes6P>h z&w0;J==gEo!>hc!T#>7xr6pE{yOrbld=*(bNK|2ATX#2Zk?9HvqhP(|JSxL&aU(ms zljK|H$X0)Nij=S3yGKk}Gc`TkVCgtOY(0HE&>SN#W6USPs)35X4&trCP0JRBf;3^c zH>~c@_&A0Evkwg5EP04t-;3WFuRC{6F+NHv@c9ST9x5^g)u1p*vlXPLD`MR{5U#Zsr2@` zapRcCc54>k5Y)zqGj`v%Zy)CS_VDMtD{uH@WXi{8P(ydNw}70W zb+OC17lS|F+p}+GpmL{2wiL^>qQV(N7+V#1BnB0F>h5;)f3@Zd77)A3CeTtUrVAU?l8Y)(Cj%YOr)~|gfPIsK0u~a`@EiC&2{_sHY7j{>M z{W)-@8#gAT61^dRT3L-9^@#@j074q5@U*kbUo>8w_1VeI$#MJrg$Wn`{=N9x^5&-J z;lpVF9QE(8vqwfOQDZ=n@e5QkzF}E%MZ9;JH36d+h>44XGzDhOPZhL~>HqfKJ2|)c z^fzyoPH4V(^-7C_rt0ucid&wYf9-XZuuni@7zuTC^>qOQ6BBSiS+DiQx#7A6*D|cB zmEoW2+_YmY$@Vrj3E|;jhG^wao;=A^kNfrO7Z>|+n&3~-$Mpy*5BRbJXP^+sRAcmU zh`V3Ee#L48t)9M7JYkz$J6v8?29k?8>iF^Ff%y+i8IS?wiXToVtpGZp;X?9DOilfj z@FKN+0zVrN5CFbsG*Nw(Wb*(@05(Hp&Gke13c;vf`e5xHNk&o&W)206Kf<&Mkgi$6F*B%p8fNu_YYgm@Eq37cCSLa zwFp@6qeqmGGci%yX$b^e6CeL^i8y*^3V<6u8&mAnY`vSf`sdFrTkZ@7 z>#X^Xc6Kw6+52BhvxPz5@JV>$DZ2xH>n!Qjk*&>5dyIpFLsD`b!Y`Ka*8TkUwzg`) zmlYKig@yQT+r**|E2qCASILJDvL4G*ziLCg?1z(}HhlW@$=8Z1d($dNga7V}Q3V+k_NV&|%tOYe%5}CDWvR zp~}7G9`6bZ=P=ah@;tFAn(CvVDwhom)?!9cu`#y&nE;>Dkeiq&mCq1fek$Btw86J; z-^M2UbJX{cV;D9pUe&{MP%mv~ioIvdX@lu#X}|3-KaP)Q4tLdBYuS&6^y<~C3IptD zR<^K~=H}6bHFSxs`=`*Cf`fxGHW&$NHfec^d~8=xF|3Z$ORal|&s@89BwDSrt84Zj ztrajSBd4O8F~~&Kl$7lG{{8O9`+M!3PGb5#eHuv=BEEd-k{8u}W)<#lPmY}Lmu(p6 zm3oB^hV_Fz?X$DBGQZ-2z6J?-sg}XC>_!0=$H-=WN{YF)wf>bWjbjTQd7>c zrcjBtltSo#0)s;XI1P2?&Y$m?4!ltI20G3)L1aCD9^%8%$OcGj_-Uvb6P<~`m;`{`ki>>#+E`F(B zn3|t&x3#`he=W7Vd<$C#It>5>mI|s3kHo)M*KInvs=d|KnB4>(`ERziO=;t+3;O$p*Yueqxe3`}@CMErcI|4F)AThTmX5Q(txb zF&{6l!<{>OV%UK$3 zP!SaaYWGpv;9a|R$&86bMMqn;Bqct5N|5ip*G6L*0~6uqpr{3;G~8ZBBN!3J1+ggQDxz_x9MwN9O^B=H@Pdq8*LpGiz0jw4cAz z+|=aJ6zo07ewdB|z`OND$2R)};LZ2%myaIJN@}@eXxQsdMh%RE`t81UCMG)i$kC&v z@88pq-%lF84V06W1s~1U%&gUk0U7`#fi6=YltCKu-B>v6?CksYg`CcNJH0Qg&c@o> zRj;({!-w^w>_(9_Lr_&ccF(iC69D1eJ4=QtZ_ot&nVS02((F|e^B*C{!+v^z-Nb~dKRM76xPN2A5ytqI@!GXnDVw4XW)5`vw@^Rz&jBgOf51)HnFPbRN zF*xVS6~RbLD})lT!q#2({=I8+yeJIC+m4Rw*~zC-Gl>0s)w5CVIOMB>0-HvG*5VTq z(v*r6V$gvXT&3w`*z;y$)G~lf(OM>%(k8t2A3S);#Dwk8A(=(?nlpczoWxmqBH`zR zR;1pML~R}#8o~;>n5E%W8KiJ(*?rHoEfsS?M)X?i<_@Vm(LKICf1g2b{r2(W)d%OL z1I?S8n?cihUtildX;h^D5{L`^Gw}X>$PJ^@V@mzB_V)HzzF}PLU(LP_r&OuV7YM~+ z+*-bWCy1~rquS%fVhJZA8=z&urPcK3NNAp!oO}ZNtFaMM)x00}{L!BL^mOh4kmk~> zwG^cO)z^#GJS$>iF1O4}vr*gb4_1Wu!$AW!O6otSVX~WKZ#13G{)GRP1yH+l_wLu` z=32oo_4VZ6(}~#cVPn32Ed>1%?=N)rMFAKIn}*X1>JDuM^Agc`o|{%I0dy&}ZukbS z%gQHM5xwr~sG}-3EyWH;R|dvpX2!1AxFRGuIa!}SQzr-O$Wo}psy-*l5F&*H>tmSA zj*I<4boLp=3S$%yhdW-^8))%FqHq-$6n)0n)z)77{D=uwL8sZ=n$dM6|n;qHk!vKh=x>>NPz?(`63kzX*41D6;<=drWYHF&jJv2VPTBzb_ zN=HXWNl6KVGOVsf5b!V&@}syo!IW)oKEcgBvbHc*-w+N5Rm$b-z<>`h3&0J!ivXM_ zW-pk*&!2NdSxx^bsQlW{a3*>dt-15XC3PMr=&=C!bis=A{aKZjJ8*;3b#CBlumrq3 zJ#X3CW~s+H&h(W4TDF`Yy(VNZypx@m*IZw(U+FCqt)`S?+tb^t_fj8DwKIfB;8#>( z&yDGK1miDazAMkL3k0`Gpz>2)9YzqP5~{*M1_sz{z(sT5hrkMG4#*{7D>{aRYw$tkY3 zpFb1phOyU{4_sm;>R+mUi6&-k?cnUZ`99_?#qN8VnLOOb;DL4J8%qJ41L>kKsPmMf zjpM@>mzE#{9mFn#Ey~RN@HN-YTpc_5qN9sTrN_z)2F$eFed(vm0M;!2;Q}iglnOYY zugFRh%mPfy(9|?catcrk8cRdN#QM^oc{X#Hz7`f~{{9L;AF%OaBO{A!d*4E{gkpWW zDdq$&hvmM*rvH=UuxM}fmx0MP=v^0Pq$Kt;yK#ewi78lJgp7){wX4f#eq?V?#+x^H zfHuL{W~Qd3UH?8u&2^_vi&DV#5EMHQGqkX_FWgt|+uGa9-I>&lQ;&J_BsD85HX@>} zvs2U!>@1QeMdUQr4w`yHLjx)`zy&8Kr>89YR!w#`FVxsIcE%_pZF`_0RlLc?<(>0i zUn6b*=;M=HT=XFzvH+Dp%>5RJDIwBHCO)RMx}vWSdGQ!1)$!wSuH{_+%JW2GFhH^| zB#2Qogn)i-t`^3`e1{=$O^Atk3zcxO9V@ry<3~VmsOTglB%?c<;A?0_u_uk6G+3f$ z-F0!Xx3;eT@u6NldW^ppk4;Z+NZgLHJDBO^NwxOez#v+v9Yl;4rHpM+tvjh3IaryPjwPq$y?6nn4K)P<2|mivo(X0jhE<0*3IUU0 zhxY(_snfid*pgdj-L$S<8yy@RL{n2zauJH8b-S8r_YP0e}HOXyqCrz+^&##PZ_Biv|X9 z`uuEz0ipgc=g-IRpGn4Mr)6Y(@3nCkrb#hpJ!cMuxE)@}q2oBO2%Ru9?Wwm55J3jo>ZcU=Oemn!v3R$}3^83hR?Bvnu) z0AF3|9v>n=(6?_-o;dLny_MoAs0?5!>I#-RR@2V%mJJg6%v9mBH{X% zLx?9;UES;26=P!=K|#S&ry|a#0O0K*CB4cBG6OwM5<-7#tJX+Eduyw2;4Sv16F}(- zJdtn|{UilQ>}dmzM9hXH$wcoueEPKBg$sGH_r1~w=T@s=zzz<=$pc2Y))aG$j}PH7 zC#MB$Q{g)f}nsKfn5q82uYCClt?%S4;zjK{hLwnq$J5ZHvv__uNVWdaSinKH=#RiZ*PNc z8J%1~yy2+EGo**s_3yI<)c|>?WiR>*2`QY|ySYI%@!aSP3roVg2Klu@)TVc~z024Z zAlE;7dSFIvtgfO-A@|~gY#H2AFm&)d+1tN9LHWwOkU$ULHZpQ}ap#}7CxHwXdBlVkW3m$Cem6WcbeWKXH@&dtDD0m2Q1nvu)ocCrO zyAPx_-s8s&i>^}yE2>?%aA;gh*I#sldH?=1S?wDdb+|_+78X5SU8Jl~V(@q51(0G{ zgH#R8&}Z&ffI5#wQ8(HrWN=JlBDNM#IgBRMZNwi=4|rO@kC~W|K>7#E8i_CH$mj|2 z@i*=4lA@ynsGtprU;n}g@06gawc#F7G6>QhD=R`;t_lh@;5*ckm*y+3o66~!EiWyY z6J0k&t@FQkZ$vm7&Ne?i7O6I@UjzXFk3pFsw(#)qpeKP3pFVZUpxBxq$3Bq)=)?>F z%0Vh%W@0)d;i$+>i}!~flKTGbn~1C7InV4?i-hTZ86qklHj^%~203Na{$?MRwr%^(2{OCn;a;A2%vGzX8 zQwFzh7lwp{`1|`KVyU44TsJ;5^S!f^f}A`&NE#}@-o1NKIIb3AJ-7qX@oK$*Tyy8o zWep9g*rv{J-{NJxBpX==AnXFS>^;C!A6uE3o{reza^F4Yv1)%Z+zDihuCA`$UY3As zJMv{->W!MT4^-FI1c^=^6EJ#@S|))7l@y~8p+d*bKJfFW46Yq|6;GraRtJ2H9NkIW z(CuG}ZhZuo?f(7y;G7V;K(g!8+<@dieNtRZLIp~aaN-dv;XZm4BDDHb!81uEL%0G| zNo=vHwE~EW@z0)p8FI+hokZyiq+nS-)62v~O)VimdItabQRmImxFM-Kc#-sT0sUdFz+RwgPolD$233VDuJWv)|1ZXti8dR=q?KG%^ozTKK`{dlDF%ruHm7DXK z?=>JjZ<1{{fp?*_9AeZQ!eaRF{(YI)6Nc3$|H@6P83EHPS8hVgK)wsk4CtwijTB@C z38&xEZu5#<5uOixXb&D7otPj5Z&tFTKO zq}>p0Rh{Pm7YRv~4cT|x80<5P&yUWSV!c`*Cn_X#()a@s7)zYW)apD7Z}!(>a4R9P z1A+KxSz*|Gm5$B+lRI{_=vnTgnZj`$F$I7EnDPevhCY%ajvn(0qF-+Ad7en^9Nj2q zRh~!?WrU9!x6)vYSqjBT`%u6nDe6XwuG$QH7x{;roMT;BkB~`JIcTg!n6HTRe*5-u zY@x)+PC>yRFdE)su$k5uAyWS{89LgJI6)KXC{($13=LTlHO>Vgs(?m_X#^8Sp_?D1 z<%)RFV3|5i5EzO=7uG!KLjsgf;9r!a{^~qn*H{UFkQ(RCpAR{kf=UPIb29dPhRzY% z245Lrp}3a_554-;07S5|9lt|K2t`D>h8vw^*h9p=s^H=7-gpFQG(u%Wd=X$-+-F<* zwI75@v4rN~IarvuEX~^h9xg7Y-6`85d%u5I&d?b(f7$A<&J}?St3E$y=j+YeKxQzZ zap`mvN*6AKo=t)1fH_Rjs>k@KXMXq~NfmT}d^bvyr);u14+u>YNrjk*Nb7`i)O8KE zW9ND4P*3K7YpF+Dh}{biKEU3VOzanad;x5^(IkjFL^*9}&Xp>tW^4f<2OpZ6n)>)L z6KqEqThSbj_;mCb+9ZetkgWUA=-5FH+uguQq z>+3^^Ehw;eaQF-Gpv6ZENfF@Nr1WlHdip0oc(hwH$$2aTEEzarS~||Dt}o_m8>-|G zak0_jA_nw2#>@Mox0l+kLjplp@6Ai)cNxH>>9OgS52w z*iOpHRU*y31@Hpsi173|9kzo93Gqy*$kfzfz_$4&<;-DqT^${paOlvP)Op&!eRKTv zDHx%W@!If&gi_E_R8vef))-P14<3+XMl$ zl|>?Dk;eUaH8kWD$n2|m1s0Z8#tK;nOUMhY5fmd+BN4e+7%*W%3uwpZEA-6F2Ji1Z zfa%1p=D83*GBVvn*{_$Utb)O z2heI?pAlQw%Icg2or{Q!jLflP4cKt~{cLe+h^u8ke?B-miilYLe?oJVHQ1haXZpa= zKA;n0z}dZ5{jj_woIY1onL&BOdMvp+9goKT?%ip%^Nz@dAv}XsHaao_{PLr#OV7}- z6iX*B4~b3;2L;k;-LEr>ixmZ#re z&oxgC>lMu%+lDvdYt@fYlw*ibpdSU(Xg(pCnZI$#=sXpxzxLtO02s=3E33NCpMi1E z(h$soo(qDUo|Tnmj7kHwq0O@wcZjGF1Hb-X2&x!(48x(Inv_?%xE7Ac20%RQJ`gda z8Ic}`n+x?PBsjROqvO$o2fP9Tv*3O+rL!;+z1JtQpp-w8^}2%K4)!qbt7tG)|7!hW z>o#;Bgp^mNd(ZJiqPh_r6LcexaAC$r=#;^=0J;p=80VCfFl1BRMRoP{yoj;lOGs_= z^47Pt&8-ahw0!+q;X0QJ7GY-gT%Uh?A}g8h;KAvsDIDYQUL6VoSSfKD!x*G8-o!RZ z*W!f`XKx?tBgYp;se>34=sf81&$qTLkqwG+n4k+vN=L-R-m*uBg@z(CrK+K!+zSsE z*vjLDr-OswdT{O4wbj+#yLUhLJp;qRqVhmGyA>Ol_0SKpCoBdV82u zXKl|u`g*4;a6?WQyxz_9^8Q(Kh(OSipYsVss30%3G(UR2{@@0CKz9oOx~ON zYHAPBv4NnVrztB3CMESlcWb=_nEj*Dr&6C^Ir`Q>g|UG_3F=8s8N~O^JMZlWWU+Rk z)jgMlYr@LPifN5WNI0L?=DoF~S8U8rKil)B>Bo=N?jkD`A-T=J3N3N{@FCF0Iis_5 za-gGGZ(tdMjKfDBnYXsESkU0x@g_FoY8Pf6Z+<4x{`KogY)FJ9U%cQG6+JlNA?FWn zP8^{!GBFYSR*RPo-@?D$nB1;F^MS1g-_V_@6i5OQ4(Nbz4#IBDLC9gHI+yei!I0&~ zP!4Lo^ykmbY-~KhF6cupUA~O$CHLuUg6Q(}X_@;Hqz(*KY*ZAWtenqwSw+P*Mus+6 zQFef9CkO6~BU(L;g#gtl3nxQxe8!V|F^NHun%z{CKKTlL|Y{!48WXsexh1nw~ey(1IfuKjJH~gAaTu2hb%8@1!A9i z6o4?O%*elctj!udnCvz_NuZ5TOFo*7oL2Ni=h}{$3LSQn#;kbf@yH`if2LvV2$`$05ck z&RVhyB@X(Oudgq%Iu$ujk`DZWHp5RJqL_+CnpBJ9V1a?8um5uM@DQSw@0|gH!5S~9 zsEiv*NEReT17lHJjf2M`S_GEOF<0fWE2suE3+e)@7fdKhwY&B?x=0L#_Hlt=qR(rU zsX941!FlRP-sqJe73n)?>Y=0xpVN_@2GR>RZNORcfv!g?+#iSM9OGa#0$Nm*y-4zA zDo2^aVs(`!c;q-75XB5JGFTB3W1RYLv|Ajmf--1hXD17oj=^+WW+e9GV4$!}hS3+h zV?{#Z?|0b^Oz_a5yp)uoKYt*>R^nU}3~typSQy$l9kAEY&6X#ZEEqvCkwCywcvLf_ zr4xf!3jG5VxZZh#h-LFx}0?H6cats@I#wYz)mLTQ=jnh?&{l{2EQp=h=ii@)~Z zI7)Uh7RmR~*;!L#V=n|y5V*z0LdfA_P6vM1=g*&)^I|lzA{$1qMMPMF%lzF(lf1$- z_Jhu28s-NZi2j;jRXD)@`1Z!p*B{-!bq`iAM`&QhC^cKFQODUV_@6x4QK|tfYVdZIs2{foQc#(`x3?@@JS|?-2;jDj7N6}R$5Az?;Ltl!tFif(^1A!_ zo~dwS-KL(pU#7RUym=t#M2Z%{dc*7TWr)kPKqLna2;%7<3Q^ypQ<`W)2jI_v@y>2Z)ZoWNB%6=FBeSt07Zgxzb~}9TyWrPajfiCiwaB zAsqOMi;7ar&^bn@1}_{Arx!fw)6+1&^)FuZAA!W+jSLGIDEcU%-ZDBwy3Vnn8i~78 zjFAn`q}_yKn?@bPDM?8Z8Pr<0do~E?5TVRM)5amVIzlvK8}*o-tJ+XcuM6|`5(Klj zSoX8xmnxbdwG0SYuK^nhM2E|v`2})kz(YY1ML<|Uz#cFW)*=$cpa9Uj>gyjUry)=v z=eZi*V5!DU3sDj6FH19-i(wKzOw-0HlDa339b21zH-H|E623e;u(K=!T&^LTOgQW? zIEW}d7KMC<&YbHePEVCN44oCB?ux~70-i`cD#OV+1pg2kFm~+0U`0eUc-QnWQ)uNU zaFlj>dJplgusRl5&-Ylz4o?@gtcrY3#0-#TM!U4lgV#PobsjBjA8l@$_4~TB^-oYGa#dP_i zo3A6jkn-pQ!QBV0K$2kWOI%uZ_K(iajDi9Ixzs05bTkESiO`+3*Ml~I8Uh&u9u*;7 zfYk%si*z+SV^=s-5Tya7&Wrd?G8q#E)xZskXc&P~1PBFJM<=J_?_URWK+uX?Kx`o4 zSdxi}iNOA7iU3sTEJ-3azM+@k98pS6POu3zHUdauC(jP_Lqa|YzY+l+XeUSoqEOdU zEPKh&T6^MH>e$STEHBB;LE&A^r(&X_{;qjKL8Wes!x0!r!ti!V9Y-mc|2UNx(FQN# zFwU1}5(jDoEtg~*2CJaMMQ9POa%>FT7VbNY1QIeTNSr}UqZGS|A+%faFD)!2z_)-@ zflP!_q5dN_d2B{hN3IB7x`&%aD9or8lk+fsbcfI?(2goWQP97>K0Q_Q`Ew@j6VMBa z8ZSSE`^cyQD>`Ia8}fM!jEoQJhQSAU)SuF@vcAmD23Dv*`BP7nyo7RCTpZOjid_;P z7Y95A{f}@wk((QbGEq2yP)0(2{9#8kw(BpGKx%PdV4$jsaPG?Z@KU8A{r))hyIbpb z=tDZ4(lFY$L>kui#Iu~Ly`P+Au1 zBSci+&`>?(fZ7RjA*IdQdcHh8-4Y24$B<1dNF42&9jJt1+F~Y13=ipXKd-2|vGF0c zFc$|0a&mHc3M5XDobSW#;--a|2m%O=<hY#E^WEg&d!pgyIE} zTl1NCVFBlC^0oapkig2_dxL~2p8@JiK%bjpj3*ZGvI^`jyVCtz@iOLjBLIx=e}4EW`*c2Uo@h_ z15nrX^j4sq0-%9^fFhxTBS{Ff15pce!x#wK+lHpr-OaRj3!4G}8B|SJNC-kW28dw1 z=VrjoMizAdEfe+xBuPYOi}g%Q`q_OpaeNy_iuS#4QBib&E_7=*5k{0b8pkf@{p`sT zE;9&n!?io_(+X=h}GbC(Fy11|MOe`91X!3_{_`R zot;!Y7OjTT^dvGeqSHoYS5j1R;L%YVoZG^^0HyDUQ_K^Mcuh9|0;5D-gzZX72Hn54 zv$Gt1;HXcLm%L`9PjF%3DL?ri?{5=`KLP~s?a{(VjP2#W;)WsjB_yy|UM3->m1dIz zyZ|kG_KXz)oXRCP7UwU`%{Wp9)6fw+22E6MXR{sQh}zoGg)&ctUpKpd{PQ2*Bo-`MC;X_mZwI!Wab+vdJy> zwzg0j@EsIi{JdAzBFr?r1LYc=0sM{w*6%7S-AzO_R2)rIc) z71bLc|`L^8iNH5DPSiW8<(XB~00$)h<-LR=hO`?<)nBUmJy$7VA@TnNGz zi5jM81b`6ww*o6_31}872nsE9Y?)!hk+HFr#zr$hw>y&^>FMc7rKiQjym9IkmkZrd zEdxms3@tRN2$jX28px8;9?OrKuTx(OX|`%=ee;88tL5hJkr8Vfo0Xy&Rj!D>QWqSB z#yUoVrM9=XbgTeREkGZEcWwQ94M{xo=6Z^5$m2Ybh)dz*B~H0PM|#XGs>V+bx5X6+ zJ}iA$F^&SpX4X1zKc76gYHLe?6)4SwU$l7#$5H05MZ(unS5eVNa0A8^&T^x`CL|<) z-t3@D!O|l5Y{!m45SSjQWDoGhwj7tL%z|CVL4%MumOc|DX|demsGm<~EK-gzcJgql zthfJJK>^`7II>14{!oP6mq#(9c-}&rFfaZ>7ibQ+uh2w%y(K9xH#Z?M@n_N3WS?!O znpbf1#+#_;DmGE^G3SH_5M*aRIGeLL)im2(lw~zEHFfLo;lp4X%gc9jblqXbaYeY| zFdQMCyzr}bA0YAIpxM88@@sv5x<`A~=M^disB>=wp1dW-B4M*_`x^!97iuEz58ejq z8Jyd)hBNdvf{@e@Z3aks`jio;BMc1_udZpeSLic13Qr4 z@NeGPZ#KxjqETiU5f(`sZ1AC)_|>bZ^c##+zbn6$LOcfs*~l**mAPjGuUskjQ~i8~XvbI~gn%PL zp}3snCmT^vs9SQiO0}7XXVvEswYdX$v(6?fi6T z#G0o!4y51!WLFpDSTJ!A3*K7~aO~1)q<%k^9Reqn%_Rs=BJJOmbYAYe|1PS#;=JJv zBYrmjnMzvMk!MB*o!j4!YjWZx$Gu3N9YQ|D9}1W56Ech z@j_H>LD56#ZgH3)?7KeBEq(;it2SHoITmnsXv`rmh(~Zk5(idzv0wqwL4LRBAiI_N z>}^Z=P^==}DRX-JD8ZVP~SaA_17QM-YPpT{R}oH8{%21}>}7M^IlNfywS@q5c9SF2h%|M|EBXuzOL-V?xU1cHcoAGpjzoX2>69?o8TR8+C+ z+%H^cXRcnF!4_x{+C@0#5W-97U&oLx-j$?Wbp$5I&$(&o+DaCaeY&O zW&i4xAVlVZ7Dq3y@{o|Gbk#^;WA`n@-&3DIcffSi*Q?+Fz|>h>8`ctD(4~M-!wb?! z=Um}IiUd2}uRPxS6GPfDxQE$85qmH@CDz zqUP~QnTHiNSFh4S&T_fW5K@b17Q72IIj~%uK7w)qr)hI-EZI%EKjE>7t}Yt)oJK@b zm8mz)*66^AdBMNlZcX(yFiNnT@F1Rv0#B)sTI5gK5URg>cjj7YL4Ll*`SV5Z-XZTS z6Bz^}3gmFs(ZseanAouSfz;wf`sGlE*VtAB;)Q} zK#DXE{2wqb9DO=#_jo=TKZS73($bQL+aLscX&7+e1Y8juu|`lRx-=f0=Y9gfhnQg| zvHh>BaubN+WOyOz+stR*=M(efRaV zim0tOyMKt|7P&|81CnzYT?V#q-2as87}~!v$y>f_ZEO6d^QLXV6`O+6o}SCBytR3} z+MF-%GhNo-b(Z!r?b+Web!&DNp5pl-87;E{D*Y=L9Q#Ka8r)jklETCBB#|cfY9dOJ zsDsh9SKZv*sdh%@@nogL(6}k7sE`s;>I_XeQzefG4)2K*6jW5+ZVN>Urfif#7#Fa8 zkWmy@YYM^VBaWa=ZYnC|_gx>%n`s#s8U_Uf5Z3lpj#dsc4nS8RNyic+6+SX;Hp*SP z?dNhkFYD^cKPPK3hBk;TrlL|moc@J`X0%!!XL)ff6uwuO$s?+&VPWP_Y(9zrE)kK% zHi>#7MK{5}W7I()jj3(cp0WduTlNm2bFi(#*)aizFE zKYg4!PNCXez4~iV?!)EWfc}96A@0fsv>!AGL^@KoI2-+kV2%R1Q8zT|OSA1vUE8y3 z{cTKxrT@-*Bz(dyS~AK+YJS2qQMdmGig7+-D{)Od%ttwr~8og8VThD=S9k;3|5T+oGD zHHTvnh(zHDMenQ42w(wj3n(M90WdWnUn3_6z`FK3!JdF>VGK-L3&jz5A3~K0>X`_W zcWfpJ{amJ3GUtbWZJn(k3Q)_ih zr0L1i3B>~VMs7>VS;+=UEJE-gkAdqg5AOiXns&sBY7^kk4Ed^;3*_hlY*en zyAM-s67M!I%)0Z3p5w_9PnG(DuJQEY#Ax>1e3i1AEAiwMmKhuc)&>Q=<1S^ zlmt~O&bX3iXKO3UNI7oG6;Xe^2*+Q~ricUi;%PA$yYljKXfrL(BqC#CfT2nM|9REt z$H+W!t49yNq7k+R&kk1M(FJ4dCj=DbV>K`E90*nv@{s|YCmj4qOC#B0p`i&!F09%N z85Fp9V0~?^JIG#DST;N%D0Xw7Sz1>K`-$YFnAlwqmfyJrc*IVhOr4n^Qia=?f}L5z zXY$W=a*%ORx(kE_PLg-ohUyPO0Btwl;BxVdrVCC^!leF)rNFqH8XqU{bSVDXu>*~b zlQ=gkZ1uI+lY@w`IyqXeWO=vuHZxKNhK03|%*G2{YXq)FtWFqWAl;%idu3jpE!ds) zLk*~mm^c%!rB0ZUspXWUH9&W8i}3mq=|F^9Q1uEwH3gt(-}fGAR)AU1cH}Vr39-;R z0>5#9*W%RO355GVCVn4+(+f)+q6buN1Ts^O?82T5Jj~9X3@Od~Z#5Zk9v(x4nybSX z4N?f6XeAVfK<&izv<%^CPP)1d4zETZ1HwU%#_kx47q#j8`SU*?M2dhdPTdet1iv&? z38=}ahwST*kJ4mnCeI8HJAuUD_y(3B{7XCq?rQDBcm3{7K>6wE_ti2WPAs3lVFowv zyP^Fd93oClB}QpJ^ZYU$qmY8hakZ>=kad1~tlC*q<&84=JYGTdjd?g*X*xNr@+3Gv zj4CwFNOce(OGJu|vKSGcfU~>YWXR&L2f{Zp;m$O^Gm1`*r&f8kCWUsAwlnM>M?fDmMwM8|E}@D#8_dD87B;cQ~>E znQKokFHUOAg&-?a=w~c?KyN%Aic?h{&n-M2p)#l_Ed^7`X;*JG4jG|U;wT1i@s|wx z>U~7siRI+#JQqR3!6I+n;vacRqDdB32Zamy9@*rA_KD|bIM9*K{@aqkQ)q?6yS$(I zS<%wa4B`P8$;kyeInPD$o|LSvKTzKNkL15*v#&AQ=TQ zTK17p<;dh@&8&7D!h9}TCUXQZ!KI1hJHX ziOB%=2hvpk-tsmniH$9+ZqyME+`xwr;S3P6ArQsj>}yHVVd6VzTE-TT0z<7-wpQ|9CMMhBh7c)RxS;PLIslPrETjEt+uX5eW_eLmhfx-XKGO(B9*mfp0nL4?{E6AJ+W ze$2INwf_zUJ@33Z>!Vn1VtVl+4lTl2J|KD)aM0A0-E)Mjhh$jn(GN-&$wcIakUN96 zCCgu`f&-nueF&*^N>U3L0|+1$8)czA;Wm<=J|#rC5GHCe@w|ThH`0OVd{peRMvw*c z^$F=Mc%d%+Zdo5bFl$shVE5ep^=Ys3U( zgCeM^29KV3%qH`&+6>)-%xi6^FLq^N!3M2yAXS$Sr576vwav!61$wrdt1FaUbA+Z4 z%XTd3E8Buf@z-?|=R@yECa!(P^Aw>$;^9wt@}S&Q3Rnd=cXxk3m6zLilYds0E+3w# z3U6p;dU{LoPZE?IBs{L@>EY3=ttXg6f1~$8J;4Tq3IpnQ%ijKU*tAKR>urR>;nT&C z;j9XMSe?gk=;=YlM;thO4uE4RvT9q2xNXnZ1`}oxPo%?t0^IQCJpL=F< zbzPt9{eHb)ujlqw?6DO-BO$LO12LTPBapupy_|k@*unv*bg{j?z3AaXVJRse>v#fs zP*6oo9ZpeE+v=fbyT3?&HHt+uU4$O?_Z=!zT;&uCP5V$-gdIQ5V=N&}6Ia&Akt5-{ zO?OV2I@LA(6=<$cxid)IFj-lO#Hqlarya~&n^v+O-jxwy^yr_~XyV7m6$hq1d;e5u zAIc5;hICl;nq2|zRlda4%Otg>8H)r z65xkiT&VlV&^4(0xhPP&p8cwWqm2#S_$D(Ad4_4uY%&}eOHM@ow79owgLnVm^z}RT z)<;PUxRd6RFz20;$ljZ@0U(QX`-aLq|B`Ht@PAo%Ah5JH!!KSwb+mmO#naXGJb@t} z8=Z6_R~npv5si_NK<^ylvzKq}sQiet-31aM574$w*Vg{hd(%c^iG_s)Rx1GhKmMMC zVwaF&?=OPgXW>Flw{KpCH_9t2R*gEQq~``rcc0^jWD@}-t$ET=KCSOlS`ji*`3d$d zdLi>i9mDAHslLAJo29j;e9oA~g30ddhOyY?)_G)bo&spmq|$d}uJEBg03M=7Z;9i1 zYDYd6810oeFbQG&m-I8j4H#>sDShR;?&Tz&FE|o|52;KwR_am`5;*a^T5by6iH@`M zaD@n!bMWm*BppbWLbmjG7vq({9u=--?p>{Y0fR5XfSzQd@TH z;1LMw{fNYWfZ)i_J!Tf~HqqpHZ8173o{*Ch=48yUSIpu&KLl$1x$N8f{nBVFFdZJr zb;R9)&j;Jp)5amaNK}ntzm#})Bg7!PhmJm>{*V}%FhNi$Mn*=&BUmH|_HE;(iE(kG ziEZoQ`?~?d3WrE-B0P*=V`O3`D){RiD;A|&C-V+eS_MLEFmF;Wz(zI!harnfDW@FP z!^{C3c@kDyX)Lvl-kk$nRBU;n3~IfS?a#5~P0a{1tD=jg_XF+P@T(scCX0uQzMtLV z%*WtFiS}v&GNt?cO*VjYNC>4g9`zFCd)}ohKbqRTvt@=2Yp#7_s37lnt6STl>wI}V zkSIvp=<0&yXRPQ9*QNi%jdE zh!F2HG#{*h<_JWJo|o|8AJX%Fi;qM3 z^XGID zmK}d1zmAMND9G!D*(d*CbRgeuD@E;XyPYAq*k^#Thg=vwC*Bo8%$XbghpIl3b`MkW z;$&3}RvR_y!vd{%qcD{_>e5RcOvROk)-*OY*4OW@dNdqFMzX(nj;Xbs9lQ8WUf$|! zk0k(s>F|IDaMkPZab7pbp^17l)hFwpO9H!(JjiGMqHVUkTn#+K21q&j!& z;4F1PTQ2y%a^Ns?9WP(MZkp4N$=OipY?kc>#`+8P$%5LH|9^G;A0*2n2k0sA2*}t;5LX8`J)NFz?@g8?yt|XOLiVZ@D|Ltur2p+cj9huYJpzmG zZB6m*sq|MNG6LD%Rb<9FJq??oIEhHfRu1?D*Gp|=N0-{$M%nQUrnC8VXNt(!V6(i{mQ z`vi*>Ll!@tp2+>-bmHRM=*;kK*lAuJ8(@6LDV6r$B(8)t{O+B~%AWGNZ5UD0(n?)) zN<`!{&5gGPMxc=oya!dxYBd?Z2dyIw=H|^>`*XjvwvG+WCwji1>ZG|^x_z*Cgw>)= z$j~dNrtdL|B^i@a03nD#XLV|+A3r6K@qOz#3DQm9@6DU3+WZg)-b*n#-=-C7mnq-X;5V zv$zu4#eVT~-EoS6^a0?ImuC`(V$7qpY$+5IKr1XeiL2CQEARNZ{zG|&=uU5-vG??( zd0ducBlvN7r{pH1@53a`qyp}N5?2!4bN#&bPcNNyB6SrDS<()>8`7Cem@Rb;u82x7 zf*kqnVppe#{m<)4Yd+H#IX2Y4Pw^h9idsvQ^mgmU19R-UG-LzV@q(DT@jmoE9=~A| z_^a>CoF00eV8GLXI448G8#+VYpE&IV3Q|a`N&g&Ce0k zwRv+RU|r*_t|!1}aBg%tly$B3$?DHyV6E7Xs{rWHLor)n28d#cAby7s0N<7pQ$lj) zlw`46fQ{&)`|o|v9EU2OS71$3&^gi?h_dDV!K(s8`9Q=W1^o_{Qh$XQWyUp_3v~Sm z6W(Tdq@6vxuW&6s=ki*8%3P9-qO7btrc&S1&*{S?Un?&{$Br+ba?X_1GB@{+ zxm99iuG?*Fo@qDUo2AAqws`Rt-Uf=ZPj7Edqn#s>AEogOuWxP`TIS6g7*QZpsudH< z>suLu=u!BL>ky9d2}r^OsXUbH2xIGuf0)mMJ`6;OYWJxkd$}NMJd7q8Ll@`f^E?6_OKh3$69AxAkopN9^6 z7Jl;Nzwh7g$#uk>L1JwzDHzS)icD3!=`ZP4kjiZBXj+qQpIlnUFvy|>xCJyUzqo9_ z>zJ<{UIxlJAedLZwh_PtsqcYN0B}T7d@hTH4N+ApXk@Nm2j-*Asjk=08zvt}_~@NV zH;7AWXpdQ+*q0N(-J%6>(SZcbo?m|k*UE;J?6&(OHp8z5n@k2yMUeaZALqyfVJ;wV z6dsK!83$EpzAlRacPe_E4bLwMt<2@iGW&BA%Ul6~#DmETA`m&=_CiV444ugC+(9bH zrkNh-*(k%zqr`*rbNS^))Y6gVLad=l90ZYCsQ!s%6$hQe+FM(vw2ubM<*0%(q79)H zn5~Mgy?O$a;^PgvkC#nBKPK!-0Vl=4%VCa$^305#6VE#aJopIc^7u6gWGFixd{pu6 z*Lk_BvT{zW)d8c*kAIu*`h3-X!o>)WiIi3%=HAcxliCF`iEk!w+V6(y>Jr)d`7TWW zopi0&iFId;W_a?6%mzO$o~CqczOHHP(p4U7$V;NH%V$db1N1gD6xWbn|06*2|Mq`c zw+#Y;PN1P7xXshJ>`m@1&q-320c(EE;!r1%1jK@&DnxOL2J!98lgG1ryLJ*u746-& z%*)G*4{dAvoDqh8lwLo$JDmG)kv$yl~X3UVz|CPu$ z;tf52i+W}-X--^;7k~q)HBMBxQVR|E?!j+BKa-i+Q8LdA!3h^BWHHx(vT@NuX(?yh znKfm227+;AOs?%GHaa5T#mLW<@L@vFii-LOCg`nMg?M^7)-mX1SRF#8>$Z)NtxFo@ z!Um(=1mAKvd`pP8J$-s*j*1>9`td?;i}(xb3z#2$|0t?ro6D+7|Vt8Xw7Ze1^ zNe&#zr5U|sj?6^#$74X4$Hv7ZKZ$pV;D<0IBnQG2CCyObJQ+A#u)^l zJucb{?IDIPJ-rE&!#b)k2rSW9Vs0L!pO;Z05)Ach4F0j>=5;zn!V4U=kxZfv#{S8v zO}~yR`a4D!d`-|>lYm;K!-prS2{GiOmcPQn?mB8Cq`|D??yloWDZGJLJ0n9+?oEAt zJ-{J?X4-EC<6x7~Cl3>H0l_w;+frQEf0#c`i%B&k*dH1gT~tGq_M#Kom0PwhHdrjaaDVQeRSWP?J36ZR z=gsl(sMy^&6Dm_CK)1|wil32(-SHLQ0B5PbuSZ z-e@@&Wgia%&1N^^00ZywJA#?1Lcc`ApNBNYo;!hu+-kzNtm>luw zus$sa$z(!CsS&nrm(1hnS+l@79JLMBzVZ36WHIZHXl#m0?Pfp=;zHoltdgEFt4rU# zn8A1IpFBf|@BYK3LOar&+1oSQ$IWv*X6CpOyL0D$5>qvaTO3!C)%;|J;N@`CcF&|e z*-j}{@%qv)s_+cTn5_a-+jqH0;0Z(ctcWsZJ#Zd+fR#J$(WGA84Gu)I8X4{Dc*lyq zxGG!7Hle1$fwD!QztH)zdnmaywdLgzCULP%LVsI*%9a@(TDov8EQC!L626$Q<)rH4 zw;A#lr^eH#)?9FP&j}+E3SBF$n434FW~<8m@(ZLezJp+sKb9^X7j8Cqz&->V+=emz z3OTq*HvEsK{0x2lSXnObu~3&ovqru}L&GK?TaEDZDCJmAj~*Sq=M-tW-KxTa?!L5i zKUz!OlSpg;3UeK?KhjOojhVzv!Vgn+n;}~x{IEsB2Hlgn-7jJyW{ruqlk{tH8Z%bK z9wpPT@}D^SK5Ri6bDOeZ4MA-0g*roy$vS<}Hsn%@V9 z{Bp!TnM5(?R6CK_vbYl1Gj%yh;;r5LQ%IwlN1V4gk7R&B98px&mDT<3YXn8MO zC6$!KsRW11mv-sW&?>X9t*!Ht9zvGRR(0F5C5iF$^XIA3Y9vRJKExF1sNKzF8h4h4 z=A*8##mG}$POeYjzei6vWY}ra=9#1nDJvmklg^*jNhdZ&R*+`+`}3AT$AIvq#GB=Y zpF1;G4}@z4s1qzRfnQTtdVHm*)A4f==gG$-F9<(_0A{k}IOAz@I%;P11?+gkj7t+u zSHPnalCfx0DLWM4>8DBI0QUqdQ~OYvPgw z*KwlT@TfvzY=1NjfmYj-8I6c=q3caJ8(+N=9O4|kz$K6mQQY-_KxnA{41~7e*~kL; z?+A8TJ~WYo#tj;J-VECA;Fw|iZ7(cQm)pNJ>Ek_eN%hApOe7P*cobs3xlz$DL*fKR zoiXTu{D+zb>7x_oNkL7;mev6*VIhF1_wA{7Ks>pd&_y_BgOhu2CK|kr79y#@D9YyNPeY$2#~L-sXuAUT#SYf=Us8}m;7mB-T;13<@k12z{UJxd%EFvs|w2eymAU+v=kkKy+JoEcC&8?mk!37H!cJbht z5v|l$ARi_vl(JPKLQM?PIH=PJ!1jV|GP{Q!anv#HE%0FmqKoS4!D8Fj1I2UZ*s;pG zI_!j4wg{G4h25H_zUh6`uw?0n83qvr!GtUMdi}aT_wnf&8nM%mfm5UPOR~i%CNW9?i;Zv|$0ceDqf%u_r`S{^OafU(X_bVHaSb+7x zJx6FR!=zVUQZk8dU2uj^*Ft3h;D8cQ2%W&oiH`f_#%mO?`c@h>lPNbbI3Q#tkZy0T zBQJqSb-3g_7DQB`K!+e5W^%+`d=>2}Zg(;( zN7@WHaCnbpuA}y$drrzBcwfagtpKk*WfDj3?e%vJd>T9_dOQle+Q>Rd!VYJqfB6z0 z6ypKv$Z#{k^s}LN7kG$abYpe(!GB5JX)as>4&lk7s@IbvPES@7fA>{4cVyf+K6yK+K;dBJ>rr zSYX82f_pC_HFzgIsvUR4&@UiHefs+K4CM4Ev}sHL3wZXhTJTp7tK3uVPKAZ(qPn5b z@)x4EBaVw|3;HSiCW#V^b!>j30Z3J`#C$S&tvTZWbgE}BYNoFbs-la`&BE^Y8@mwv ziQK1lb_YTnGGLj%k?iK!^z?k$Wk8$r!@z^EgG{2<<$rfQ8lQqAsx&|UcTP6qPkO9~ zljebdp5(irYI+uci+TzeGIIn|C6pISV>-s-ZW@0q+0#9mTv|5vwO!9)YX{~!niHpr znSgOH>HK*!OH1KGz1@x3HSgcc$jMz@Qy||mWsmqdM&2pwpN>%szVDO@UArew(BBq+ z?Q4q2(Ii=d{?iF?Ps!W}=71+SI=#*=(5IPcj@uGRMt*MF0t@%rQZmaG*OAVvA z(*v$~p8OlhOSGyy7C$3$G4k2noRAP@?7W~L*bM1~h5PWZk@zHnV&z+4^kuq=th)NE zM)(b;AAEvvrJ#CxdV0E3rxI@pbo^Hsr~}k7*ONGdeWDKnqy&2yZ+kI=94@q4)93Hn z^$q@*{(kSHK#uF=l{b$UROu)Lp=c2wG$A>5E*2@?X#Y9F0S7LmZ>IbV`b|!l!on$=hsnt7=>>W<9`&`ipUn3g zl&DkFo$pI+L&7(wXG;t2)W&Hij)E6^ECsUVhns-7-sFGQoi>dlnh?~MP|1)75JHloLc4T(MD55~3XA&fNnmzHE``gV&E$Vs z=A3=KRL(`N##FU7t>)n7b(0^#k zzf-YR95Di3ah=7Yp!-t9$tiBGn|5_xymjIBkyNsm8+UMi?bvaRPBA)K<=>i0w+v=Z z0lFe46pb!)3@+g&hVHSl3+B!9BW^aqhWDj2ZXx?@sYbXE?9*qzY?+_GKbvajgrpzsyxCMG`Wi3nI625Z3fQ43v=P#T%i-Ez~uXI4Q9r7*5U zK|w)}$f$zXg$~l~DtE73QI!vzXKHn!?08h{#%G?u-sKoV)^Qvt4IKxLs;{4kDeqlh z@AaymAKz@*O$#v1&D-O&#nKfk9y_I~j@Q|>YNjV*R3-?RtY_ZJ-8C_#bp&26#O14L z%SvXJb7!U`o&d0sIxe)l+B*|fCfz80`qXLY=pMtaF|zqO>-FUWvwc0K6zd7sn%Zvo zb8}8e;-w%B6O?y|tALdco-Xt@lLO1LH|(s9BP0T3nXla4hIk^XI#`#-`y!QKw*15b;B&t=)&r*HZ;;aK0i8A8fV z6B-%S34Isty`NV;;JE+nY#}!ZN+mQOkR#s(*`y#3+qaK1oUSV5MJf>m*a>S#oV{}8 zDL@l{%3KYQmv%j7^LlP$BDT-m4|)>wp_ZSPx6`Ka60NzJ4{ zzz&y)$bz}D!n93^q<>gww(qQaYj%n$?=^`FR-SqC!AFw+uGn3ib7=sbIuQd^Of$NJ zd$1Rg9tUPX$4RyiCx~eND^wgQINGJijb&gemu0cZot5S1OxC1mMjsHfS?|9BKdMRFy(Upq>W7r!&wh4>E^7j z;+`wvV}0KXBRuUc>R_ud)6mW{wdn?h8D8+`Gzf-%1#+;ZdEGvabb~H3P!TzX3%FX$7To`9* zKM3uibHYmRnr}&2pM|V!sHoR~)?~&ufgw|R_s+(;yLa!2sCQ*$@CJmK zoH~8lAs2zKKE^?A?o!@~1g8(lWmRp{!u3Hn*L2SrYH$MmR4Zw}# zdw=fxhK6Js6H?wv>j(qL>FeFS^}z_%NgDj2ky-<*SCB|De#o_9t8>6&?;aNS8Tt+_-g)T}`@*$?@@P zSbDV%$fI0z1TV*q274yM%F3_Y4+4TW2{#cDK?w=tbabpQlySY^&k_glB!7ODKA!mD z`}ftD)xqnyIL1Fu5Zk=F)e~xIxa`KZ-_KY0OJ>A0ic`bXLJKW#GhHQ=#%2(rnC9Ep z3uV!ac&0JCeHCtLVT9)Tjn|Ia! zUXfwfCw`6gQ%d|JU#MWD4G%8^H;0`&hNoro<`mlt;8YOUHX7M|zX}OC3|GLB-E@(x zZl>@>YNcDV)DKr|Wv=DO*ni-y<9jZf<&5QGB#g0ga=J3xFM#On&((tipkpmr7dn58 zyWT0<`nY2vT`73>ik6mbvH>o-ia04~g5$00C}p%Xo&fN|bDHC|)i9!NG7i{K!CUKFoLb&Z{Mf4M{qk?ZB?il2T<a$h8=g37GqYswoCn0Mbi_u3{=|6AC*r+APn^KAi0!un1L)(EQ-%cplaZN8 z?r>pQ857nmC@L1MA+e;2*LTsoGF}p`3&6n9m@9=Oia(09V;jOL?te0iS0kEbaZmfW z3!@n1*=K9?d%2If2GWBg+h>p{{T17q^OhT{A<8F4kkImjAb#dbj{KxfnAhiy+UV6N z`2TLhLuI5EirE1706`TLpiMfF*t0ikD=-*vQ^DhM3nUk8cNdp2$L7O_KBVbTkb+ic zN~rxNN?kI0wpc^~oTW(K1H~`m_TrygJbQq9sohjhCg;1u2Hu<% zQdqh~@PT7$=TUpzefa);eM1AMm8GtO^7%u8=up9SpcnK4eE>M|tmn~B^3ESZ&5g6T zIfPgo0b4jOfATtKkiNb?%W&w>p{xzmLQJ_-)9+HV2KrtUEl3E^Ga~k8m?|i^aO>6? zqgY%ZG50u@xsW-Po$Sp~%8SsT7#k0`aqXgw24#|(0EvOeVAG~#vf@%x7nqqDz0Kfg zAYFqeV`C@jJ=0~)8b*BtopQCH-gH0^AXH;eRNywm{rba^WKglVY%IQZl7lVN3FGWv z1y%IBbSvC;g6rGRP)J3`W=*`2`*ZFMHB7#GAU835(Jg<&lcHQb8jY<%xfsNlopPaLuqcf(Z{cgPU_YX1_EgdHO+hnxJzfQU4F>trBq;A z)yI#`R2eSk^ed_v5quwOW;W;7@zHg+9kp>fg9UMZ7gR1jZGpdRo&FN=XURq7*?r|( z_-+8F5(t)0*_`vv($UlXP&c4OdJ16=nasTd%#BRvIpX`W+D?-#6Sio#Zm`>V=Uqt8FaDaXHYQ)8H$*`fhnR}?n*ZC7B`4ZR@&1qd&kbk zpNPv86O(LQU_8gBVkWr`oRj{G+_{5ypHb}5f-0sRNI7_^P9_zAjE#|JXuE`LVBlVu z%ip!Mu7A464B468UcuFZ938_Y{W#P4Ef5kKMbTR=g=>0B7HihT8^v9f9UmO;kfB3+QPcsseZ6gSLsNb{ z+0I&8mKxzkT_HjJriu2gR{nrCJgRU9*J<4Sdlv%s>8B~%ToRD5D5{Mk484T%^lgbZ zZoJA`#FSxsK@jwkR)A4cQ^kp!V-UPSUa?L&Nf`O)eQ0_nOq@u1v+OCq)rL+MaV53e zZV;2iWwDB zTN3xqvz}-nQRca7&<`psBkRd3bp!uA0{&j{eW*-Yf|zkSWrw@bVq^Ph{DYp|a;`== z8DG4=Wfn?4UZUxH^_MM2d`pGEl7uA)fG6D^uPH1^vCbU^t=6t&;62WngJoe}UrxOH zip>&*t0+BT#l#!}pP~wnP&1^Z;frUw|0AJzb&mcGq?MgzK65tMTD2WBHIO+rA3?>R zT+dhT98={#p}%gf%)e-aQCO^wta+fcdKQX9z%;|{bKG=8`d8^g+cIa+SHoxCu5@F1 z=OlxqizJy04FWg#bV~LHrOcZcfd;B4;M}AG{{CnTd;A=Rg9<@u27>B5c;iDeS(Kr1 zINya&OvZqeI0P}x0~p0xXXm+NWC?I@qP+my4%sebWjf#pdQU*ahKpfQ1 z%b(V@pfA2{z3EVs7Tx((QlGYl>rB=iOL|C6Qk=oR4`NRccm@cwEZv?^jUC%IGs07d z=#3d|&31Iw_7@Aud-CK@uuJN1NKT-2lGm?>ZLC%z6heG8qD5aje~LBOBa%_$)>dAX z-b_8*3)g!kdh6BVzRYrE$Fsuq84=&)GJ#xh4?G75jhKAD&Q~0pCs|`&S69oX- zS*g=&sYu|f$fLvb*OkQa8CWed*B{)!cYd&rR1unn_F-%Eb{+TUwputd7=H#u7O_xd z2o_4R5uG^0wYK{D%o``54F-k^jmcr;7^0&dTJPaAqqC+i9O zHLDURPe2%G%ySlm@)r0TEp1oHN~Oa!@gLav@C{sAK<+1R9qIMNf;;4jYsv;74f&yV zr86zvthNNWPM{xZj28qLTVwY)dQ>}Rp1W8}l|${;xvDV(%o&!{2lnM%qeNCqpSROA zWYp#p0PZ6k_z_Kp7{xX7Xc^x-{yBlaAkNB`s!5Q3b3%_@&pI+4&X{`7KXCIjf5kGY zUl%YToy+3(ob%^hfj0P|;q-nn7AaXVY{r{61^}Ox(G6m^UzJzhYAbWphBhKnWza<9 zEZ>IlETzGNJKA&lxU?E#L@0uYTzLzKT*JeWFIz1O^>9HI4Zu+Uk8t8@ zg8G9DROt;4rq5q3MQq+)vD;EpenhZItQE=QO>iPDudz4OZ1(Mn!qUgert{)^Lx<&O zv}NZ`X$gtTsi}gPo|_SkO|lr~fuu|8&~+WM>*{og^v`W>JrU_obn1$US`#J&A35@Q zS~^}Dt_Ll6bc2R4v358VM5HIPPrhB@#DFxSUwPH z;7eQERBj1UI_mLlwfMwl&^BuJ)IJUaWWGr@8j9<{1PPr|RlSYiwKw-Tf^K?tn_io^ z5}e!6@BEb<)ttI~+Cdg^Fx{NDi~+=Wm*{on=}7Odso%S0gwLj6F$jQ)3PbL_AFn>J`cceX|>31e~1-b;zr7S81yo=(q<+8vc*(2Uume zx~cp(Bjp8zB_UG!ap~t(aRuE(F{SS|YHfU-C@%@nhYG-DEy0*WL>h$vcJ#-eAm)K^ zl}K~Qzn_x(iQ7=;JUsLx3cM?|{(_Frn^b(E>|ZV=3cEC5PmKk)BM#Vyry*nL0KtWA zpsYfiFKABxet-K6ELzDI&zXvDJV!qRi=@J{*&)YMiAi0rt0OypXFF;u6l={B$>0LFWBi~W<)Vr-%{KAdp&*2O7vGhq zMu+^>r4RlhA2?h|=~P6-pg-zzOY7?E;f;}(AY0OQZkpGBgM)(-qYZi>w8``;%H5_& zL#@<4c;F-1-xtI81BglN>?;-C>@A!OUS8ct?@Aab`}&rQ|00J7)BhiPPb({#uns?U zX%jKofB_{tjCZ#wW{KJD+k)fzzs!AtU-N(emz>Xd0e={vn~Kv@04R_TDvDwR-lHS2n}r~UhY4pZtXX-t5<8g(CnG3kuRy$ zT>!)2b|cp+7oJ8mPt|}JscEuLVvoOA7bEEfgsfDej)&E~U6jaVc5|9$F+g3GVL2p|}-?0)+&3 zie7%_{oZrF@80+RamU>mBV&!dvgdy0oX=Wot~F;Ke?6`Po-4^I$^p>O&;SZgAHd@h zKpOB20}~Sy!QpDsc?JY0MtLSkYfLLwp(a+((;q*P=?L==n^RJ648 z^zY9^8U_aXlLFX4Y#=@w5bde`j0ix?h{cOd zB1!sE)0~XYH3Wy8Nh&dSlKHKmmRm}7ZTImD7O;i;)P{hxwxv~QSW;fiD}EVSkca1& zK*n^vTEyVZ84vYGU>{^TDvpOXtddm6WvSpEh#i_@M%=lpYXa( z?dU9hm79j(w2qRtw=G6m5-SMSY-$BwY>U4JF}Dvq_f&Z|*~KDrN55Zap4Y=VOKmrh2-}ws zKW-pqoVGR>x~X9PBF?a17tSUaGh(NTyfM-7vN3Xp+U~P{W$_!n|KJRQIg|8BHyyyA?od zlr;4cm~*poxa$-Ehs~Q}wIu_`p0$h4bo8LLBb^)N@P{L}iW?_8gpQ(0u{Lv{veOVS zswDS4fDc=kTUR_a=n>FlV2G`}YJ(J^5aD_RG^ZS=fi8c0$^R+M0}e=lPP+PoUvpFC zviYLUj5o59*4$Ba1%X9~j`<~vz^vRtfkys}FX}KJRZ)q& zLZNQAT+fZJP$DrmzOLLXO7C;=w&h|h#gV{a*T#8P1K+@dxy#bX@c9h5p^nLK)OwZC zC!0KY49>`;DC+p{Ct4h}N23u(sqLpyGXyNu{F#w!6E}Xi^fU8a zubNDMoOyBmn~^>>L>=7Vd|ymk^mO@~wt*HT#F1Me6-y{?C1VjkgD5(giLlGauIJeA zI^Z|_5wM>abk4sBsOA4OnS&u0M+Nx**|0&471er_x4aKOEi&-6ef7LlUX`o2`C0H1 zRW%L!4#mAe{Q1sTW3(Avh4KdbKkqwrc~^^MMG z_ioNUt^oBJHApNt^~-63ByE&<3!tgaKKr1R3kEnp0-IE3+0O_$<<}b^dL?2>BzHid zzwgQPo>!fE)#W&Iwz^sja4GB0uCP6Dc-+;$HLxt&Wp_IFNV%5>d)QIM)dOkmSiwm` z@5ve}F@RlL$7s_n0h5NccK5>3T6^pQ0fKshu^J8k@0(c|vr5!h2VFgL~%xg_iI+{DgYpW1&t z0_;L3;o|p&Y($9C^1H;wyXQXEr1d2xBf!HY?gOtwpj5r<_Zl%>0Ldx#2SV~7@)q<1 zkNif>)otQ=1*W_tzW|lzVBY3Nh@xH`SF%xggT!Dzx3r2hwEgV{Z#aeq@>#Ns?C9o)>>TZTLEE>Bf*gm-`C$ z6M`pMvxh|{l_Vk|N?*+d+v067!3O}qgi2sE;I(N0>ivr^3|N7|Fqe7={NIF1ky| zz2a|mWV~F}ycEM#m^5_DwC+1v9#`OBA`-powky)pv&KL-3HcdM(JNb3t$tTN${9X( zd9z>dSZ%1yWJ8O`Se=oDm7-TjS~ScM4$rxV>PX$s@uL4 zdZ8&MW~nRbp0p=i8Ie=b^HROl_qNG6A1@@XCF=U`jD~@~^sb@xQbnn+RG+D;hwpH@ zZyo%MIad4ghuUI#*q!CP3R%1HY|0}b3?Ai;Qp;=7)n3|8JF&YJu~00*<`4^#mA`bpib(mx>d&)y5Y7vrFBMy`AK;!L!jglhIf?jn5}$?in*an$~JXc2D>tO z=}9axuLX5dFA-hK`^vo6Ns8hvAuBhxh|RtCI|?3+G8q@fNf2m}EsAGInYwI*5icp$ zzh^tsweAdRgx|;MuY(#H2VXnuPU;XDTB8hE9Q{)~$r3+IE5LM{eh&7Dmaoig-1XdP z=HT`%{TRzAYn@wRD-{Xt6ZoMm;H!UlHaP%h>^GjI;5mcnf3QTUWwiw5-q`hc7B(*; z=wNx!rE?=Lo5U0KKc8FGetXkyB@J)|ihS{ukM$&93jdQnKV3(*X9hMbMs)Nj{dQ)z z_9>oB`TiZ8#=MW2iLM}G%o? zdZGP*XLW!*;|){A83W`eGv#p16mQ_yI2LO%heS}f=>90LBHEztYFDKL-7-F@37Ll@ zOGV8R8Lefvp?m0_#>a|ueddxcxr%tL2E?`~6X4rlRlr8v?W;@#CGH z+#8Xu6OUy%sA?8J>azMz<5tX%iP*CvzgT(UBiK#s`FvE`Qe3V`$=;;J2c3J0x#yiJj_oUY8VHiIMTnkQ!9Mc zMn~|HgC)S(*l1NAfJeaVa9S>B0U@Bl*MkmVOQl0;qsGb(JP+pPHa3xu24x_}K#SU< z^JJ|)zo-~>Yct|LZu5K*ldEgcFV($GRAv_J=ZDD0*nk`V&*8?5UvC9GEMElcYE}SP z(Xc4=ok`-T#*%2@vNl!oOa$Pa)3kI5)TkpnuXj{_E2+Wo-KdA--pYaAGZG;hXJ5C< zt!u|t>X=4l&|(Wy_?^U#!CB`pyiTuGRz}zrR^f3+%OltUJpnG6h1zFGfb{05E?Dtpzf!1S}S!+&f5h@@$_wS8e8YUifT3AQ8L%m1nZ(r zvuKQe_t8r|kNWVg^v^3*j9yE`2-F8Ka`&I$lWKrO!19{-R{chN#qY-h_Cn=wdjNQ? za?NXfYUQXFOjJxqB8sQE6?|U!;&90JQ+eWIE{wyKIn13iP(>$MfPah?s6F#2ygtt_m-c-KU< zRcFO`wY~ksgftiaG&9vX%hNhI^3`PWrC_@-gyIZP6$WABfgb{)jo?7Gb7R?Tq~BNS z*o)Wa5zhkT3`Z{ATEp-OhrIw>UPN~9$%6De9s!2u<;giaNqgG!LV{r>ETog&&YUKO zWBNjWA1u&*l(?zAjorm46iF^_aW2Y*IOU`8RMXkjn0#*rk+b7nFPKEYA6pHMK%AyF z&6>-_6bZFcYBl}pU3^Ib+Si|-3G|fQsi5rRQk_>co!UnvRaI_9cXu}<1mO{{`M<=O zx{JHzex-rEvu(S$DCya7jv`wTn{@L?)0m!TsYb}S)Q-9$AS}@{+HXr6SmdtU25c`T zo^3ch5iF%+)}f-X0=_)-XZmN&t92JSP-21)lT!WoT9~Y<`uTvts=pZWswsd_)2Xm| zY1FYMFFM`lw~}uaxrbD5YJ_wh(RXTNjQ`iDdQIM{PIGcjb85-f9R4(|pz;*D^b1mw znciG*DKg*es8R6)CXJ_Q#f+zV3QP89wDsmN;RfVU6gvEXm*MAlb(XYMyi2Nc*@Plg z)5`kFj!0!$F7Ql5OqIM!&P2_B?_0lZO~l*U>t-q4cqP|PtrNI?vzm+43>M8+6XvLC9cD3`H)u} zP1uz9Z6Hu;7k%3#4cS-IXKl!h)6k=Rpg9#K4^94D`nKwigtnNEB!sz zX8qlg?eaWQGIcJ=*qQF{ZAIfABfJAnYB}`b)}$oY+@9qhVIt|2?At|2l&i1gY?Jr` ze!NZfq7bIJ^X&Nh8D%eTx^Tz8>ubm&CXD=R9}b=v7pg7OmVHhQ?oqy7r{IET9&X~J zadvpTRxml7yKSF`BRDF^w?PHPK92x);!-CtrW;6zf$nWF=5e1UW`a7gGHHzFg7u5KlFujMP*tmWrE0hMEJsn};`{aI}d7IDc?_mvvHekJ0=g_L$qPXcNB+A|jfoJyxX5E?Inck2`?qyd4L7O@T; zpGkWJ{Lr#(=@3t;h=-TWq3TvhZ*B1u-}2YpX5cdVoEq02mJmuO;2Heg=#(^de!J={ z#$?l^J0rWTDj>_(oal8x9kQPA4qxuWI<450J~wF^S<^owq0B%gkEFot9b8KP<@kx@ zM+X0~;)=u*$O(9UMa-hK#baJ$Vim_9ZFP%Rn)&C{9~gO4x)!OfWH0&K^R zfD+%Ua%e`0W1`0jtKy8#2q}Lm(U^S!9HJ97`X}O7nG!kCUz=F;1yO+NryEoFrw+)a zGB-ZGoGSnMdq#|ft&E`bp*yVy%Pq)l{D7e~a*wnKWnHH+bl!!&MMq|?gO1acKy>66 z{8~JWD*pf`vRa`iIpaa3&%x!{h_kLN>XEAIMmqi`N_~fLh#c@YLaYfdv6IOdI|nB< zvPV3)THA>IK#aw#HT2%=*R_HuRT^aYM;8~ky!D*OHE%lv>bzTFE1zpDqQ}QIZS~ zdSPEy7yYTF&%@a{Mwd^S+>7m(e2ceWfS*~M9u+?tF|s4Iw81BSmR4U=7c<%~zp<+- zFTv8z{Eda;Az?c2r5)a<L+k5whqlJ>VnZ>{tfkJmO8-nU+Q*DM4 zs1-Z{zOaHl>1D3<-B3>7;03Un=zN}fHe($@v$8I9VM^@tJ>B)~c>!@oA5BLT-j}E= z?kPzFO{sVRiW`CjE%?#gQSF{@b_J)^Xj;c*Q}didKDTqkimD^(>*x+Vcegdx8>v-M zgSU;>Su^|B4szVGoi2z&2>sPf^Jc72hc2$X@fsphk=GD6aX!lZJvS8N`Ps{Keacxk zsoXOFUUICReZHO?$KF+Vs<%`23CGlYLD8K{nL!jYgwH>?N}6tfk~-xZWF2R?no8Q{ zxZ|(k%=x@p5iO^*6Qs}3#?Lx5Ndd$n8Sjp5IgaDA*y{dw<-&P);+g4mJJ~!&!F-Mg zbZ`11i<7oUStXTpLM3(9g+hhBiF|?N8AFoL7KAs;{)x!BEj{o(Zc^~XIZeZo8Bs>K zSou^(A(>z<(|aa27yS^2v*5RV#rYqw;+__ZPm}-mhHZYyjoa)j`L5&DH@ZA1M-xY{ zlvK&7G()10;m5slqgQ69|@x)!f9e>NI}LRZGC-o_EH~i8*`u^-EpSIMqEk*&Oec7#_NOF4d&NaccpaSYlFoOOc&@ z$twPZ=NU*@z@pbe-^!LEjgbH#ijR*LQrr*+;9v3ensrA}i#?RQ5W?fl_*JM6+$VW8 zL>khA4p_el_6vbK{*P4nH#zLY<^nj?XJ(DxYl?yD{tWm)_MXdPk9x%D{h+y|NXd*3 zo{5wTX7uc!*K7o@IyWqRnY-vTT!b7cQenjuU#3Fx=`%QrITJ4;&}cB=hhMAvrfF%d zkxi_=QRRZyY?i5Az?XegPqC(j)Q;LBKicyX=X}<^!^GsGxqC5K`e&jN6Dp6?Lat z9MI}tMap(?o}XGJ)_&w@_ozj0>-JT`tC}qH^L#+d`#hc{z6 zXP1Wwg`Ph`IleTY>uNWm7*m4KfB~NAcbL}_h0;-FbTvf)I2t)>FA7GKCY)U&^46hBRwjTs<|F|@M@eB z29L|OoSvsyxW;wSV9kc*gOhYtBsS{LidH#I)h_M>Itw>S&VJY5)8i+}L`WT=t92z( zGKZvcp>;Xxi~M`-nFnh=;{uAQoJbO{zexOn80y-(8>CV^UrD>GbbfHlZv23EZi_vw z<9u3=eU@_HBA!tjl)5XC2|t*0d9gc1SX8#QZAZ9+d+QM(^zjkEIT0kRzLdBAda{6C zRljq1hJH-@a`(n*^g*}r5%8}r+dXP-3C;7uxo!|z#D*gGTbpU$#Ozk#`PYGHx+P!1 zSEX%YO-ae!to8EL^d-BipnUoZ3AvVRWUJ6$ld!+Tfh(?SS~{B7&esl8tH_cZ@{FHI z<{EhhHsYMmZdMR1=8?cS-%9zXBQA4Zy%%ly>EgWezcqF9*#-~9s3gxZWk=QUJ2)`a`+@_s72QMSwFA7vIghtL0|%!^j`1MmM<=3ja~ zb^UL8=KRNMUjMOL%_AW7;1TeTHJbiq(Wk!l|JkDZYukQ7|F$*af3x*dk1yd4`>hAw zO3G#H()h#aKk!WR6~xnPpX5LNl=Wcpd^Vf%#vttPkH8hc|KB-{ua==S=H#3LXp;OVfi;}M`_U-FRtq6AW~snGEY+@rg#AULH94B z|4YPwqx-k57u@3u5B@#^=Kf**|IOV0hAW;?vqP`EboK}+`}Z*VpIrL^?_%UB1E#S! zmBlzU*XO);Nc>ZGv*wM&{i_z;|FG4~W~0X?zx_ILLdU>v`19}gU%zeZfcaFShsLmH z#V(Ly#4%}{TF%zr|H`J!-wAq}%1q)p%jt7>Ig&P9GY<4P*h$o?-8ex`tYkoj^=;26 zFcwJ~k#na19>05IW1qLSZk3a&{;mDLhWUSM|Kwb@|8tfY!z-`&JcYvpavNb}Bx2S2 z`GI*IV;qp(`T_5sY!uE;bWm5z_<2H*QMz>=JfFV`m*HoUYr^-Tfyy3r6P8B+2B*Z7 zoR0k&vhxy2<)4wK50^5TLD%=Lq!2$2x3kZ)tT z#(?f;N0a644BOnVt4mZh;QLDINxgl@Cl~^|8U5a91vVs;3sZ6$y?u~Lr*>q!5)BFY zwJH4f6Dg^j%4g1a69Kw*&r$;>eI96JZtSI9G`^jC*H&dky48u)#IRHhDdo`p9DI6z zqVUye!J*b)c>-AF`Xj)?{XBqD^PBDwm3VwUGa6OcF7IA}z?I!F5J#n9E~&wDnL(@X zrS`8umpAGTuJPK1UP=SSL@^ieh>!c#Od;7HD3S`GSy+pT;>^Um=SGTbD++7nFU$C6jfKP?hJ>e{TnJRG!VpPvpr(rl7fl^RYm zBLSh7{XeMJLOivu4}2O-+xT1cX%9}R>arMpcKpkZ`G}jWXd>8e6z07rSGDxSwen4F zj7__DAMkr(N^z!Lp|Ib!8>#(~#do6B7wA7?XFU|o9BKXrJGwps^k@}+H)uu8^M=K5 znmuH>)34|Lw$gz`lpu$XSmJ=1NrZw@O^U({u6JewN3%l@WR5w0rE+LA*`Fk8HAlY5 z2X9mT^81w07&hxq#cq@@$IdS1Prt7QjfqXd*R*`6iE>>t5d%_~JrnU7q?q%2#FCV%Q9TnrO0BGV2}U<+FTH$Mn!s-gj~ zzc%1SH=PpcF4+xCJ5QF|ODi89!Bq!@0X9t2 z*{VWwp4`t^XvvIa$3|#8t81rQ!HUsjYPj^tTLj{?=W#dvgQLj-HI~A^ON<@?;M``O zDHER1$(j$)MHZ}+WRsYY!1E-I#Uc7U?r6Oal1bcVI25Km|KZy|)QENQQTQ;RLUZ5| zfMTh($L9XS}ccmF((AK@F_tUv3?MdEIR3&w!X)&SHn&S51n~Fm|tafEjMoQk- zyE8lz&lyi41{Bkz~rLQ`=nJ`Uok5jz1#Y zE%DB8iqv!G;~n#?&1`3qPiX9&zX`p-U=4vSo_rGxhWuTJ@JVzC2rqQ>SKAk?BokM* z?n>kvwN83e32k)x!WmU8$8RNkj6D^+h?5i+-}|dS@b-!*-0G3~yTH z;-hUQI8NJhLzuL=nI=UDSs1(7CYD%p@t?J zn2&J#lur}|k1Rrg76?1#r#^o^)n?i*e=RMW)G>zE?@eQd>O_vUpa}AHlKO1RDx$3T zzbbwi?3er9Mf}9aq=VnwQ{6h}Y0CaH?oK1P#kfPFS1XWT5+C_TLF+%Ox2aT3xjOrx zAe}`k4M<1~?AC9OoqMLk^m&nMd?)zbNmRC8N4MHjAeRLnc^z|!%Wk{4;RX+tW+W+{ zR&Un!_WTu#+wTW^1OTN*t0uOA+FrG%tn~7lAIAF0Fi*W*;~bPYST%;INW~!Ucjh(p zMU|1oFL?##mIr%mwNmAo)`OVf{ClM=swEpPdCeLE9cx`fSp;e;lBO;e`?IT|R+;r!i>!2g)>RBQxwcm&9`CHGNFGfK_u269SBl-a)R zK(Em1@iWD~CFw8B|1_irx_dX)AT24QC>tWTjB$8#SBs#!hTAN6UU!h1{r0zsuiYvC z`nx0r{jj8yc!Pp7~;e!g}6Bvv$ZNq+YE*!+$v+tMU zb$?PI)?v_+(PzkRjWIYdTX^+;oQeDA9xG2&!X4Tghcc6ER*yN+7eIvHq8m z7Y!RC^aoSJ1g$l*!_{(Iwe+KjrWl*S?g&rrQWm!evQ`_Js3pXhS8u0;_Y)O-MyH>% zEdbjU!L+seQ#(g9Nd0IUvmJ^f1c}X^u*Xhk;vdk-BcN5ew0L-bp8M<9ry`;mki4k! z1C~xuLD2e9er@2@M>zsSw3%>`i|!_94QI z_#OSvRiPKu3jOW_1ER>tp7*NEVsAA)8=WD0hPuKf2rVHV7H4j`0Q8W*q}edu>~A6&EB>xEGwRy-V#0XQVyP8;Q+@1DBYk5kRUX-l~XT6xfFrXh+ zt&{r}RTlQNpDNAbJMZf($!Rt%K$UzYs{ed@@G3#14YcW{vfVT$=ykDzjOD*}2mVmU z7V&L}hJUtAUC8^o*Jce_#};Oaz#DTt=}$CvdNV&c&azZYZ19dE`lT%~KLdWKR0wP! zl&^rOd!Cxa;GOSOjFF>zxvcPytLfj-2Ng%8vlEI$cd3R4QVY)_=By>0UR-3k&FdQn zCg$iL<0$T4lD$oX~g#g%I zUgDYVn{AOr<><1E=@mQdgAW4g2iVF(WVDLI_u1MKY*QN5h8~OU8NCK2WICrGx$-fB z3EMhrb@-BD*K=RM1XhbVupOE`H=4V%O8enE_+_dd*tIT2%lB~J*>j994gx)wp@u}fw(6b~-8uerICWI4#Fm}QM zwuuC-328OKUeNcIAN^YJd;=1NQrldFuU?@}QerJf*aaT`!L3(p;)Ba9?WREYcIh6Q z3wqDz{BYNhR#MFl_0{X!dQK#DdG(=|p)G2IlucDtR^PSJd`xchBHGMtrOGwQ6Qi_M zpXY`B#WaF_JAGC+h))FJq8|Wx^KDV`;q}__IUFs@bB}-iObVivlaF(inj>tYF#pBL z{FhCK$I(o({wqk-f`!7^ya1EcR|YppjMa}?!7hSl30v!AXxYr(h`%%%JovqwzosDp2peRvvR?Byn{6RSe;v&sCHp}eO_@8uM^L; z)&Pd+`qSL6)66|IKogK@7jP}Ue%)y?U}h(A^V!qN+Pj91Ps{6*XWlW4YVcrOaUO~b z-8!Phd)Z8epKYuQQ@EJZxYkzY(olY3s%Ol>DHci&@)!H?2=Jx3cZO#93)2671Ypf) z`!?)90?IE+i$d%P<&V`K0neHJ@4ukNRuY}`49(l`Si>#&=-QC?r7kxD-y#9vpsuT% zN5G$5#Bm#oKxU!aEJUfYfpkk>1(t)6&x9?_c5E(n@*FxZG$ zs&%?BNqO(f2;iCYsE+p-IyP*Ib#(SRr5BclgpT4DrY0m%pyO_a60Q{zEtLhlo}e{G zzsQO?(sqXz#o)008QEqT+HBtF*r!2;_0NreZC4(8O08JXKLQBJbDL?N2d+U&-TjF` zg`|rLL-FsJD5*5AsKsLD=D+Sk>O#R^IJOQy?$CIzlf*+4cUa>blisWL&uV|{oM?Bf zK$I%dxc$}Y-y3do4y%t)cag*lCGb>LXrz9bAzL31+Y(gjYg%qll0Gi4DQ&E(VyE=ZqNwDC)2KFz4=FXF(=+Ec}G z)SPLoclNzdY*07r{;cSz6Wiq2X(UA!gTHhm*}L3Q?1|g<2il9V0G1ijiNF`$%G0vK z;dlFN{SW3C`*WTB%Ht2;;~SXo(<|8z!HL)H+#c?Z2#4(-mBL?XtK)pfWs%@NC&lf% zA6=(S2V%92hHgpsd^*) z4Z?SY+LRo^cJ-;b)${>l># zxy~9&zHG*(`t?+7wvc5j3$Vm!sHJP3qNGe@wh_jzo*B>CuAB9U1nX6JFDi@HAAC4J zohhvmO67VAy+Cv>^2iy=C@Rvd*5G^Jltrt)ZL44B0a3(3KO|Jwy@ypK?pB0BKIU7B z`lKuN(^2Q35nV0HZ90%@qkUs@*ZcW%6t+`d(t2_>FZ+6^*agW@LPDiOrqvbs}n9tSI#I=A!?|W-aZTK9rDYQhYv7ov#Sb3x2)u zHujL7()f9*QnhlW0P5d6ES5|@^7q8peg8#gthhmUMpq0dz(2$_h4Zymu8EsMbIiy( zXva1&ndV@8rBbh&i8;Fy+~{eM#?xD-I*l+d%6+Qxj4#OS#v2jQ?$WXzjOC_ru*8W1 zP#26?MLN)Mw9-O4lpw{>7D*~)tuv)PiXZH5dcne7lwI^d-m~4eg$=r#?ovJ*?cxTC z4Znw7fnymeaz{t>(peVN+_AAX^9|L>dxALY$!mI{uKk6?4T8i%__RIqkAQ~k8s-iny(Y zS-id0qnU!lpgXTkW|FD z--v5N=YVbpO^~OtW&Q@tNWn^}{L`$(+lom{Vx!_wPqtRxM>@9`U#&Sk05+B+jX8_t zc#E}P@n$rF74w-B=`jP`Nmw(}7vixqc@H+6SW#D=@!$`fV~~gVy7r%YGTg7P-!GnN zLR+AmVpJl;9mlrCIxE<6bJ7Z5x4AU5x};){#XCGP>}ADjOKmIWZa88@>@+;*1$JKTPS)4Ns8{g5oV}{efGS*%2P&%5!|4ueCJGMTw_1BxxXs z{eUY5zh1gu7#Q=(C8dh*6jZ=j?1q+boRwFUgA7~iSDRF!JcM!g!rj2PJ?6hNjub(uRey$!>PHJQeDIObvuQlHhgM(<)F$pR(a)EB^87y5_h7SfL4tEE zP3-a(xn`1Lw3U~6HF#8Z+~w5WweNoaAR=T&&K>K2Qtm}2XtYB8n`LTp>T=Kcdy8*T z5_F}*3z6iRjw{7$?NZw4BtJLqv@i{xuJE0@p+^#=?k?!(z9!uhuoUM_U0faW5%u>G zZ!z12RhBj^+SJKAH>d(N=Y>-z{(kd`W~iw;1nWxR6G|5OWgX5M8`7#Y_`cb5_Soq%u@MeRa)Gjg`|s_Q5ElSj#D=Zb98vu+>bD(uua*HY_HNE{k6>V9 zFOOn7T{Thely_`amN~o0b`9?9b`kWH&IMWIB4eV#JCK(Jhh0|-ZUJ-a{sM)v?XgHf zH4*GyAS4AzrKD`^tsZTnC~GA|q}eXP_OlFTKxPJRC8zhQQ~s?BUfWw70j&_3)MNX~ zM6_>5zZ>CMw2ZZK>kY}Yvh7IDt*on2RH+lZDV-{Iwh*Gyv9sPJ7X7GF&6xJ7|0$pE zLv^`g-8ngL#Lzrxz|5{-Sscyjh~&Z{BEv)*df>~BsG04auH>4IyMF{++7+6V zQ8k3g2)y7}z*sHe26_GZ_8s41gNmK?{hRYo)XV`|?#m(FQ;@vod&Vi0P19nD-C|W$ z%-RmcMzkiGq^+ft+QCDl((4n@`9XTO)Qki)#?&$H`3J^C9peROmJH!_{N#{KOVL6U zEZ1)|0+wzdZ0^JHD(xq<;O9O|vKKDLdoPO3bu6_!7i%JlFZQDq00e@2sulz}Ab>WXpOak?HAv0mDPO7HvITbEqPS+?zpSy^rzU zX?(;u%NTa?;(xaiXbF*>T%r5%5)xH7() zVL9-)^k_=Cx_Z+@wka}UO91ug!%mZb&!&WglIJHrZAOO>#9?t=zINIh_eOPR<7744 zj&-IsP&8?m$~*y${*0%}V7l(X&m=(jQ?8PXi$ckZoYvY)<&LdwY42vf$Tl}?OPX6a zFGq0K+|V>tngjGKi=yqpBiwWigZlFh)#T(=x=2NNt!BAZQvW=V0_oT(-$SJ_N*ynr zqXz$(TG-=Ph9v~M)zvgK?uV}Ubb$0&i>l_{DsXvv1LcY#VW;aGn`qw}lW5;Y^w0$; zT*7vo;V8dR&m=o#k4l>U5nV&2=^jO47cIGHZ(eHY;5XaK?2HXrL|#>>(wdnxvBM;% zHb{tFru_M`$M5-bkM}xN#?tl9b%$q)pU&vhV*OT*(dH^D+O_GbT9)GM%f#2TRawdm z%{etev$2!2>6w3HG=Y^+EP|gl_^wn!$_Ae0p2JWBnH9Wx7NfdYGf3<3?}8qv^Xu`S zA$+~)@0cCuP}KGHH%KRNJ#+z2v$0NR)XA3Js@zViD9EP&cSO$7La>W__&!c6(O3tk zpI@A~0I|OT$|(M>T>KF*D36F@b#_R2dwEySy+^TkRIRbXgn+k$BpsriUr-0M7w4px z@rSQja%ArFhW-Lm##!ne+4c{pU!C*JCcuFR8STp4ncpwp}GX;hc%*Fa(ZY@ zSh1-N_@z9b$G(eX=eIbQIG>vARlIm_?PvtEcAM&^nVeB@ZINtF=pAz#z3BdEfgV<8 z7kXxllV2T8i`aFXl$K!u{(09UY@SK5-+MWxxC1}~)|pa0t(szC>&t3(1SKJ)6Ts~!Cn*bo1l+*Ge3iVNRzB#-?aP2%lS5qU)!9s z6)*f&JFG*)xG|Joa6#`}p92yBnYOku4T)A;+@S+AGU_wIElN^I(X zek$_%s`2*)Wp{so_=>Xsa|aK{O*EHzMXWax>lQQ0mfwdvL)$bWWCt~us*jfKDJ;90 zEBHK{!X?rPBJ`3m|pz| z*b`p08rTUidN89qgg3V6A)IQpr+!|L_Hxyo);QY4$m+%>?kd%6`O+YvY7xih%i(?o zhaX>h*H=3Mw4h^Nhq!;D9s#2S)HK+%=Vz|Ph$bTr9x`VBv%#ss;aoYzp)MM_Q@>ZornK>nv8}PKEA29B5C_JeFr+#cH$ z6xXsPe^Q>tRhg;E=ZhQDJ2vX~W5V4t^hNOe{M?55`L1d0X-3=70C%FY5G%aF?R*=P z%?KtY<~`NZiqzLSY_B~N*S7N&`ldS4!#~M7$TsG2DF@AerejEV*AELjzXatOXXU5LpUmIkdB7ApuVsK5GXu zx^7KJg>>;E%vu~S-xkXMS+hK!J3xAW`rGWvp;k2TxiiNY7m6rxZ zT?S!`ngUk<`f%zu;Z@Y0jBZbCunPg&!y}+l!MC#*(IN<2p{&(5t`MT~Dvh%%Of-WB zE1j@&QggP&o(%P`lYMw+@qk(>Z*-v{*r8ILfl>>BH79#KOG_GOC-P<0b=84CRUG>6 z8s)5)G2T9xMi-*{`&-|LZ>@l>%J`EAyzo`0<^*?3QA~x15=u6;;DeR?r){YPv-0gh zV3Gpoa#$hxPvGuT!OE_PyltaFi(3y%%m_DF#eJp_Y;CQgOjFPIvZf!??kAHB;j0(! z#KzH1U`^Gw)C%cePh$bcV)j$Hm_#<>0Us1QSQ%G{}MVApTGDWfmxSYu&ln3Bj z-POk?4bTaZBtKO%n5He2H(@jeuqHItZ8K|zQx1+(3J>f~=#$0?%(}49YBLX;yvt04 z`Cx0t12_AC4!v$uB|H1{2h)w9843qoA@wrdky|v)Y~++FkZEB${N#4)r~9Q@(8qQ; zlEc3kM6c~!;-LkKEX<1IJsUZ}^7~VJs$!xwYV~T*3!dd;eF({jMOR-`d!K0;i#+u6 zR_X&;-WYhvjL??F3Z4X05a`8bqMfco{7chSsH>mzAOD3pLo+(#Lb9jf4>4EHlfi^D z&b!kxKj?XXT3=$n$1oFIKFR*zXFFX$czsE@)kyC;1DfNiXm!dES^Yk_u7xGGx|;q) z3tiM1xiU=pHF5OrOQDlh^`~Z+?V(@RCG5O|rQd^W#%S)(%`*DbMp>RhZ;RM-3 zy?9C@2(;zIU4OsBd&*QPVqXju#aQtzz0~OY(B1EcTzlG1fSn{Z7#^DW=j|CZWy*Rm z30w8|_Vt1NtJSX8?VuMmd9m5s1Og)hMl-{53O3>`D788Vj|&~XKm_Yfn?2NK=zGU1 zmVhyEVWcn6X1T+mE2|*MEBmRA#Wd^@puWOGYpw1Jhp##3+QgKYiZZI6yaC`x><7HJ z0T&xDyT_RXg@KOLr(aw__zn)v_kwZPizzp^$Lfo%zowxN6OHog1(;j6&v*){4w;uA zB4&ZwVhgg}(?8YSKXp4)_20#RJ1RFew`>}kZI>{1Y#NodD10lh9>C7UI1y6I*@{i! zPsI325={$3)i~ZM3 zyf}-fjEdHVI4i{fUA~4o5dP*u=eYa-qUo%n+W6kDABqPSPzo)sp+JzLZE!0RC{74k z!`_#@*Z#VO#QT=>tUHGOK2!JJ63H_i~cS-q4pevBzh@hNkdT+gw| z8M4(jm`P6xm4M61@tvLD06yT$O|5-N948N-zEsd9WeV`>-Dv!6NL+mEj#YgZDU;6l780k(s;)C-p zpAphKQ@bGU@d@K1f4k^EJ0Ew_Efqe?0$qor%QBO#SCl3H1GH!Tky6Tg18#LssU;`HRIL3!&`r+KQ$0Tj%|J;E?-`SiHO@0gDz4n0OOMY4j5gP*l z%&VoN2|*~pbj8$U1GpkRw|T@D2-9XLwzVjWV8`Vhjvnu<^HURM+Fa@42%b*A4=UzO zN~Ut1o*Da$jd>T54^gxgdI9fd);8d$5ZexM?0w-)0(NcqqVq#>(oWqO-8^K>OQjB! zg4dUeurwuqb9+|Bj9e_B{XEh&h6@YWEHtaYhJGz6J+xs@-;Bs}3c(vB?!~v&Qc}*F z9zKO?I^27bye6{tfNRT5t5xd#MvDF@|Y8z4nyj3%jH6R_qw zd1ekt_Ff-z{9}hsDShU$;ZUc-j96pYAWLkC4KCex3=}vnVmv7umE^?htVba?R`6P) zkLpc2XB;}?`|<0AT*@KKdxb?}b7`o0tQLiEr%nH|?}5jR=nN6BE!WWukgsj9MtAa6 zB9|>TrjnA>p7b>`O^2ZgT%J(Ws@exHp&5AlwwHl4Cw;Qif#G`Q2?VgA)++2^@YBna zvnDR;UzW{S#h5K8fBauskSbk6N(mQt(&j~J>#Fr*H$@fbReLfApQ#+WA< z5YxLQbABCOEh$bxHk%z}j{MNF{>Ufdx=AtcE=~{A2^6#T3O!CHL7aTl2L|J8UEYti zfxLcuP8WSzPkPNDUUAHK^Q)e0#+WU{=96vIqRr^1v;TuO}}3~WgKu?D(w?fw803Q0Mrvyu zO**=~i5Wh^!mK04Ih zKLT|hwUl(*0W;CXA63?-A;^D#jRSkg?l#(_?=jv|$Jxm|b2#lQSXo|q^C%8V7k<5) zPu$P`GzR?_Ew5H7NGb-_~q{)q0(y8B10qO$_;?-3DB#sL8td58(4n8`^>S z{fDfiGfZfJr8M?!>|49h0=r=Ne}EV7oC7~Hw`$EyjBj&U6&I{_eEt`nzkiTcx_dyq zg!kUS@N4!RWp}XE{OhC5YSwS~+P#cUhy2OWBy}-Ur8~xK5l=zM)PnsJ!^2QGS$BNA za44Zf6@dV_m1FTg0BN$QdkxGFm@CJp##61b#Y^fSa3r-Ze=-2tM0)U?ITl~KpDV3y z%{+d1{7DJ3_?F(uMTrqfu5T!b@csi({kf*Zh!%fUo@seaEsEUwQX0+iY0qwbll{)u zXa9XPrd>+2ZrK`5`6QYMU6Se(FwZcW`;qmUGa*>Xg)#4dejz_3W_IIYp7U1k%MG)X z$$MJ8amS1eeD%qE)etuMiy?zep;zf`{FaeK-Sl#=QdzQ_`Z+}sXZuxM{C^>$$M-6b zlCgEEo#n{)foJ!opZEQMC&%~=VP)DSY4IqB8kN*w1LSD8GT>Im(v={7;%Wm$jFqb2 zGB8QsDhi%fe&MQgHt+gkRl@60IeCEg2D$jMJ!~)`bded@!O#FcsvT92$Ve<{_r-sCpCauh(06FLV-RntgX$x^~?Vjo`|XRib56#Sn??g zv#RBOZOdp(^zzm&~QJ&Ggj2n=TEZDduqxLT7kAJ5gaoWPC56U1)ir}Ar@ zxFB*gl@LgaYORC(%DOB3U;74ES01l-1cg9-qg~3ZQHAFH%MCN{4S>xbaU_2k`F@_V zDk!wOx}h_7p%i^LM<;I0&h(ZP>XYx4uu$lEtMnvXCaVQ;jhDLLGHjIEs;S5)CBi3V z4x{9C->=0r!)?MWcLTN?&qtn>sQM){tT4<$9s^;BUT5$2(ozLY8oiPtO~I!s1Ul&O zq?0ZN=5H^v%0IK^VK^oW>~zOFhdoe`hO*%BUhukuE+Ql( zc)n|LEUi@4`h=U$N?kX-J?8=*4No|b0lQW=4Wtwt%CNKJ=BT798PSQQ8GnW;PObxKyS;y0!hdUymY`6^;dO9s+$(5k>V>nIY{M}xH){;FR!{5TZbemC+# z>pHyS*ekUC=u8;IK}Laz6B_K+5*B}2KkaC7Vh}9QBsMZ&CS}ZJ(+t!SavNX@Gq#Qe z$Dgk~h<+Jm@(KtQ7&QRzl8iY^D?ErEzs8sUm{WdVjrOD6YI!MaKD_Wx?0UA1abZAw z*zHakcOtev?DPO?Oq)0^1N?a2KUOwaHgXMRh%pxodCW&O^#@soBru)>3Z-7@*2@Zs zU!r!|bAF1p=6$}nH;N3R5e`fdcRH7LXdudeT;b5nxws{(S%}_GxeEO(8qymN9{Yy@ zYX#Gr$J0*3uV46({B`%5Y=z|8wNo^kPtg9<`!xJd)2mGghdoY9_-uO2_Z4u}7jB#d zrHuMpWG1R=?i4hH>sk#Y8_n8vk{Y7B1dqFH(#I1FjG*p4_l3V5OA|;p25n`FBq9SV zIi*i=PsYXF_dnyGWH!3}C4_3b8^SzpUC+d$zq9>iCYV|JLWqKHc8bU84AS@i%ft)y z9}fASjj2}RXD=PVLE7iQLr2+_u;9($b^2G_vHVp>?qQd`F8?PwCLDJ{*_4*Ky2tmYI-^P$sf~ih|HnEpmK97C#PnLz zN^Tk+rpVeK(waG@my)n`OcsO+NNptC9H!ASjv}xsa?RuCO0whoECKiX9W4O&8Qm?% zWyrv%Y&WW`>OrY%7=Edkcg|=h{xvC1ymWVI$(eI$(R06T+}R>2UAXSMNFOV0RF@e` zLgVR!sA`V9^2p;;10Dl^=ae+NQ5h00G``zJFCnjvU`;Bx)apT<^ps&%cIxWari-W11c6J zX2~@UR<6$eiYjbmK>49I>B{cG`q_=PI(TV>5it6+((tLoXLv zB>5|O#Jx2+eqBl9JNt)+uLpTn#n)+JZir4|i_m%Fs2L>L#8hYlgBX7J+BaEEcH3;^ z{r3ZKyy8~|K2oYqwOCBAw3w!n2wQh45 z0#7j6q18IFtcKp>pQQw`59rhD@+*fLd}0O7XY6mk@^XAu(;z-F1{aday!=W#rczc7 zr4_oY{XEg=G9DC>ZT)IyIw?vejv>C^pud860i~it1mVo`98>A$)Xuy$g0HGmx!)Y9 znO1v+C@aNOzr>5kdcje%&c%~m@Yy9HG5ogN?iGwG@P|`j{Zhb1lE^27i+YwwZZqHM zu@)S13yshO-;%$eMQl-+^ZlUuq+3P7lERYCnN+$@uNCr06q4u{hgt*nD zGP1E{2Wm+pGq<+ju?r9BIqPve+_9m^Q4^c-!^ywR-5u^R6JXP+1!ulN7{hMNkO(~M?zsx>RGK);o(pQ9-;GhJQ@W`%zG0xuk=axrg z0O@d^`G`Dy#_KE$E<{~YemB}H5SQ51W3|Gx)dhGpkUhHUY3S#Tzy>K@k1z7yyC1uSz8E?q; z%Zmsx;in#!(huxuTJf4Rn+%DdgN$zuu%p>UF3J@JLuExcHJhqAh0k>S@Gw0m#LD5F znfsKIY7>lRsY*^~$2Q8A7G|WxyQD;Az8kV9n#>`pXsV;D({nkxOTu9LKkhhbfk%;Q zsu^kI11dpsVLvJQaA!w6hrw?RlkO=cvM8KAYFf4#=8Q1kAt+RF(&V)AnYmw1ZZFj#pvQD=x87BianI;8rO#9{Irbn_73bROs|`tk&9i;&JXgS z{x#2{V`W(q&vuP*XotFF_zVOaZRSTIfc2c5k}KP1Z=^X`9%M?V$2n=X5I2M!d9MEf z?o>3SnR3p3ubB`Y)gR8r_jKX4ed(LHwBu48zTFXIgf6#-R)P2D!7L%DwSxC1O_~zV zx4;zuJe=6xdk@GTn!!t3+>88+hmZmGg=t3lB3j*0g5sbsy3*-s_AKspp+?AhPwpi~ zaMQQ?{DV+^{>?txNw@nMJq$$T$p7WecD#oU;gS_W()r6}%;VLWDoL_c^p$AC;I=QA zzMO5A&ed~ZNA0?ZWI)2i{GQ-yET8KAV~E+gwg2oJm8H0i#WOBA+WHpXF<>)T<+qhi z9AO?7b1wefx5&fK-&9Uf={>hBfgz&-2JkTOxtWs?w=>YjbI##E0P3=;=ga3%VML&c z)xU}g$COs>#rxO>+odcKeC)1;4d=ye2ygSE|9q5Kf-7#U6d5MtX$DuY%&Dymd;wG6 z-S@*ejRRW_PREwZKt(XB95&BJ;nwX}Y(fj~zb6xK;?=9uS@G*QBas}sS1SQM#i&E- zrDE*o@KTP#CcT-VSJj}%iE-Yy&*F7n4>w$d)9l9FuS_s9JMRbP7gttd8d7Yhl%Z_; zHNsh{vFuFdZ#&jY>l$$~+1csh0)=Od>|s}?QhF?p37`yB!-j@Cn-Zh`#XHGhgQh`3 z2{kM0CteQifr3{R0_o^F4KLReW; zZ79`JNaC~d2lr;Y=L7Un1CB3Dcv@mt%?s4BrG$SH+i^P_xoG24p!Hsg_L~K_Sr_5Z z63=7AzIo*6nm7i$Qpbh84ooX6MI*SL*7eg_#5BbH!Z=IgwEOM{+$awG;+iUg zM7<>oE~gVii^f>Lyri~t9AOXY;q}wQZ2K^kXr^Qw*b%CY)|#xVMq>4g=_2{2Z@KbQ z^u7{DnaYplvp10*lS(iF;kq1?Q;vmIy|L$0k7O=lAfeHLeeAvtI{;9H&rf{NJrTRq794}#%cej$GhJJyA(Rho zVaR5wDEkLvsl_$hylTExU^LNwxC5UEH3?W3D)@1`=dWSFPgN9LIy2TP%e4XBpyeQB zHCH?NMk}JIjGCexpN_pQq3#QZh|9wUZSsd@PDdy$?XEhUMxAs7?{Z2q0+bYKW%$IA z7Wf^CQ@!FBBe?vsZDMiHzT7<`KUVyMeSQS(q+*G0=+emXma6I#SQLBg!dxRbvz@Ux zboAE9Hv@vfhjoB$CKZc?t8GY<2q}@Rk)I7*<{50+C6;tBpHd2rhqKY(c9f4zhBlpQ z5ACFEUc@@Fjx0o~Hlh4lBvH#GCB?JEhKh&zr9~2OB>oLIJA|EGGN2`9m9y=!9J8!u z*`~Otq|osAyjw`6?odl@5UP3G)640?E48`|l<37*d{Lz{J){b=+4RPv9AGi{z@HaQ ziEEJ-A8?`+AS#%BjODKUsvTzOLH{mp=zaiq>Ue5S?W%Vz&&I5IQVR@I#zEHIx%ds9 z2(m(6olsDaUJ$dGN6^M?o1m5=r^*+9RsYsjmLsLu@taYA2}F4fQqlll{vuu^*~Ois zYv9oPSU5BOD#ehm;U0L6iS;!a?AB2QMQ%CHPn_@y6d8kXPSFraJU6XbWxLQ_USk_u zbL;&0n(c+aM%tAS)bIYZ{aZCoAjR_#o$w{00h9z$;pSkY;@?%(KYU64g2ovTi0O3 z>21i3ElQK$Iy=f#Fgscndt|(d6PE0_?UO_=WOZT#CgfNx{^Y%L>>6_xUZa_@m?hVh zT3iKFgS=S39Rm{MTa_fZfC7Tc)mw>}zWlovnghnVPQlu+>CRLG))+dUi6?0nQX6!n zpJYi=%tjb}1N9S2h9E$Hx5m?yaEjg%ZhqVub$kb@4&;Uu&w!eNiSF>4zUf!;#yJ4$ zUUh-N47E6?rtWet#Pi*rpRGK3R_q2`h)7$eAO*Z&4;BzEYjp{2xfDpW(*`Sm$`GlY zgu5lu88VwKy8nEbOVz`E-rVgElmxA0=%W0)1Ti_V^n=RQKtfFexC1uDUT_7^Ul>W) zB0;V$u=K$zX5~%RmXwm){zHa?ltE|!vC}+FWqf$;`2b{!uP*5K%9PW&Z(QfCNXw8y zS?sjw-uGL!v&ZJ27JQIh-)3x7xy)|&W7IigUM?>Z(vx&`JvAP+)|Iig{lBZoZ+^z? zT)|Z|v@);u9_hO0y0rfC^y2Sx!zGjeGQ5m#tdHYYDfh}qb+#-2A8cH1*9}?0o{bJ} z0~(VG&YeFeG!mgyQ~2)D*1r<^h3k#vDFpj*J`=bU_VP5untJ%_rMlin5(G$ZVw}P? z5pYOW?oAd&{0tEpPZwyR47-UT!F>!i{hh^Sf-`fya>|nDa&f|o6;hV4D8?2GZ{J#VO;nRQY(wHPXqM$-6o)qGC}B9$kF@VF95Fp^i~zk7XQKJl0vc=iY2gA$SU@O=Uz-s45P$wo$t)9czLuH*W*x@vF+;bWX=3sUwnO+pK&VlbU+>P#e z+IunvG-saAG>nKPSe1QUK&JO!^{sPXj1fS1)7&Mh2NmTTGGi`)K#lyy@0t?QJUorE z@f2gNRy5MajHvL`Ro$kr?02B@U+Stlj{9V$+*?0B9OcuX+{h3{HJ6UNIUsGkV@Q!z_e1!#Epq*q&kQ(ITj`oPaY z9FjOvUa1tp)zLz8K%Lwp%*BEs`vTbtD^aCCcDTiu6&0R8(YtBY?M_Xmk5x*Cst$R6(+DeG&S*V<*=TL=wrpP4>s0&WXnLH(#N7@!qA3njLf3p! zE7nV94|bcsopqU6G}_?vNC_*lWe-KIv2Snag%%q{kd=Lp&x6g&F6U<9gcU!ulWR+j zHT-bKls64HWe^?Ie&Fe!>;{^H8{Y7*oT#vN6M0_7XIAnzvJ=(?yyAg!ytT>j#ikW% z*~}C|DH;iR%ZO>f!&>p9)Ufa29-N#>YJRoanm=`~c?=H=uu2Bs6>-A$mh089$MZtn zX0qYE%-*@2VlS%>jK0-qI_08;MX6LRB3|5A-Q}6I{K+KA@tuy3?5S?4l~g&T=Sx4h5GYl!a1*}nr;kXsZb=Vz&~;&rArTas?L z{uuL&8JN!2K(1AJ!x5&d;cn_~SWNvArl6Gi^=}TebpbFreBt7IfYPr58HQIQMthE; z$xY+uq>4AELIqx>eWW;GgkX&(Dw%45on@?3j-C`-~BSf<8!$CfjvjPqaXcZmR_*`>GC*k*?@~;$5p_8^XCA`8z!Og5(1Yr{%`Cb zgXADvLsui>t!N{SsBY~VEsEN-|?em*+6^O(J6SGw7=3s@x8hn~q zc7G|@--=^1IZ%^DoVhV5@7IVLH5Qn^zubJAKV0`DKQ^DFOmD_H68x!ti9LlkY`dv( z>Pa($v-^fw?tb*5$_Y%wRLZ(6BCjBp<`NH|lEA|aIFd2~ER4r}Ld9?covE*MJt$3f zPtff-1?Q@Olw)*641V%(wse7C@pPXS4;EC_+j2gwb36a(a=0`{cjaplc(iBl?@s&Z z(|O3Pq>;}R$2K;bo&;ElelYNfGx+(0sYM{RGs$%rJKu9^1p(lU0d_TsNE7?B{6=3S zp0jTjzppK88=9FKpMB|3mclHk?*I8U-tf@|EO@bKVT|e{y2AP3L6S$Q@4=Uk z+(PPUCus5!W)UyEtFid<_|NylQ|WaAqz-@%;G3p$iDmpgT9O@w6$;~=tBKig>S~&L zAGzDVL_LyrC)HZYF7bjT{Mn7uYfgHz-<&C@r(Xlc0RX7k1>o7O&G5jiXwvfoAbvrt z0h+p}GEF&yF3*;1Bdp7Mj$UQ!iK|di&x9AI{W_+0t-Nu#YPOJ1P4~`A=Zftx9#lK)1n zo)E!fnGyakK_57M-ZI#CXT_>YNpn6=={683>bdwS_G>9eQS)-8b*WjYra4-x9!XGv z_0E&zDT_rUdKtRBA#~J(y&*)gya@IRps4qXR^PT%J{QLO0)$q)t zscu*N)nVbG2-Hhz9?55@&!`s#fq!Bf6vUdns%dWP`DB za!+!+0~Ao2R1o7g>4Sn@LdNZTG3di^AnbZGr~oafVh~r#j^?F!miqU|9L*jt1evbv zjs~}!zTorXnlPdx`HnAf`mu;)l%Aw1^iRRFItG^|#O$q~)1TYyZ!|wctvCM3{|Atr zs&A;11(l$`Epl@XWD`qxnbmUtnWJ6*JHQfegqEeMx_|igmrjqcIPkB@q?M4h-}Cb; z^J$T5ZV?aUfE3ly>%us?K~l}}rr)X6n=Eb-K#W5~Yl(fW-r{a2d{V0n!>-#`_3q^d zj<)_pUrG>fB&mebPeJ4d9{h&c41Mn+gr3ewhzRdId2Ao^k57AR)?1V$F+CmIs#QOz z?Pj!xPQFXzr>qAk4T2y{Iiyb$!V2LU-(3>J8183N@-wnO?ccP{8FDl#YisL*j8omj z61wBL=pj%dLdVU-!LCR>_aDD13p%nJ2RP(8X7h2LD4lruh!hI+>ya6Y4a}T))79^^ zDQN$ky~?cEOJL8n@N=7#i}nFBB!sm+*7wg-rj60lbWKzKg?Z+C&ms?f8=$4!mz0*LMO?C=BDQ{hu zyOh{%64%7fMCY~oflMVl7n5>2+l9klAqP+chgQdfGo9|pl_Sw>D${`J{)V)%1UZgH zZ4w7|%N}~6-Gc}gbEGr&jZMT4j|1`2I_*YX58Q`X4D)2-F<*7Vc`M#7&D}ogZH399 zK_zlxnqnE1!h=8KsU3{0BX9J)M7fM}N8s`Y=nX%&3~4x7cH1AH zJv|>Qi_Vz+eXfBA-oK&nwF_8rgw;JYtl*lEjpnfRBx&XJlp_D%ZQF_qTH5;?B1jaw>1ZbK z;)nq#FEi=3+v}}^k-~$De6;4vQfy^>*7i&4i-(vc-Zy?D15TQnA=mevrTexP1*Hch zr9)I@aV^zLq!7tn)S@^8ZjK3XGMYZwA;6t#_I}5DmTMLsRptD;L3;FKKt`IL!2xfS zl~Ky=;htH=JOQ5V$zExWZiB$U&cH?@YZz9%nhR@}gK>J=Tcx1H)Vw4Vn!c1c_QJ*T zh#0pS_g$kz`Q){W>eBZfY)7eWKL@eGNo~8V6v{VTx*?2tzhRXxSD{Qz$t^OL`-pe{vd|R5oQ! zqh`RfzYmHv%&~8sf#VnuEzz7_t315%AFD4nRi4x`iiU!sa7QP;bm3K9G3+AzBcvq_ z^|B4;sFS(XH3Lf%G9fx_i-fLFo^UM!s3bthCC19_Ft&u8imF|Kcc1dpj>x$~(pDDQ zd_zf=wwuK~SOX^|`$p7lu+R=^=-Y$LD&GH$3w}W;**soZk+Wa=UhUiB#-GCJpH2x+ zA!Or;S#Buhz_pV1-~HOgHyP$qG5-N*l#v|PT4(G)smWG9=7=)ymL;qj*S-9c?FeC~ z;_e6K)boEUzCloSB4uK=g(BuRo-ox)!*er0qX}2}bIjpqmCdq{)pWg2(Y%vSeq6rl z?98Pj?7O^}D$!ayc|5=bUvZ~OukERiphF0|-n*18JuQi9soHyjOfq7~m~>#v<#V-9 zU`^p>WX%n5X}5$ahh>#p6(u?I5Rn=2Q>IqUJ~)6+WhE}7bE+t1^amV0mb&jrVpaI@ z1Cz>d;|%BK`R^dhjAO;1UM~%40 zW6Sas*j7I{G5tf5sGRNxD9|K^hT*w-AHe{g`OPW9j-*fjl4A&ix;32K7^joZwE ze=z;RH3J|}NG^deA)bLiaBHJ_ z#np#qh+%(m1|Jk)5GQAFO~j*X{#~*m;cYO1`OxA@jgYhVP`}2vPK}g|eAek%qQdlN z9wypw)nJ7A(anbhnxRLm>XE{r)s@lW&@pu=CI-pZCspgWya3WHQ%%Kw4<7iaveK`S zA+qg(0o$a+z#JMJTMtB=p(^0bN=!zU_|Q&m#wWTjAAuABN2LI7JfV1Dg6IdhJ_i36 z)^?s%q5vv&M$Y`CFs3z_zN$4=BHr}WO$X+&J=>9$a)~WYVfd;KhDC21DiMr&v4*Ty zRur^LX(XD;kD|PZ*&~OM4A|#D*)2p!*B0WS>9`U%M!(F8mahzqO4AE-Yt_$ivi>YSLN7m?svfZw7 zYm$Zy|5J!`nO)8#^aQ$v`WI~93>z^OVyym7WmiL^%gXltK`GE5>BE^=^yE}rTUnh- zD<Fr0&_J-Hh;=EFj|;kKlc`059T9ZwAKnS+=Xu^?}?>7rQ{pl|dK zQYtYHEzR%&AuwDR?!A-^ct&^^57CBcO|PAR7|l|1@U9&{(Mo)1g$?$=C_iszr9&1# zh$G8@j~h>0X`mEq*?*lNFaRUF2YJ-qC1@FT6Ho=uF@}zEtV#EX}UqK;$R*J8Z1b zbDSL%3jDh;t1N?CrsNe$#B)yAG;99xX-IC!ZSf;pxTNla5`W#)mT66AyYtmXmPrRr zZ%pKx+h7p-qzbQ$5L*EUS5%ZqDZ?b^Xa-Vs>c6_j57K@sChGC~o@w1R!Xzy;Eb(J8 zB4!Wm2otHhpe3zVeo3joMzrL66XgEUk&v;UTwG!1R&7_y#J03VBTZP3@giN^Gp#PJ zNzl?6SCCUO3#GF43{&Hm!99ae+0|6P$}wEpH+OL^iZJquVf@og3I(UglFw-DT5s|? zi%nPdvphNl^btX4sExH>j8}8k6`f0tN!LnW3&A>KZ_|x|lKcoF*8UfSc(|eN$8Ok0 zxPH+H#$fb1m3TLxbrUF(=H<2>OYr9W+~Nu^+!>)CqJzy;Ym3pA)EcLnYOC%;@~Heo zGHNk?@{mf( zYY|`1;T2>7loXAY? zuQTqP6#*TdZRPc#5X?5Fc1AaHZf%X`l3i!s$uDGKpf`>cQ7Z1v!R3)qNvJ^$=FoMz zr+HTLJVV@!_w~>u*Zxe{+Yp*UKBgcaLedW|t0vp6Tio=%Y?BSB2EzhX12$}Vu|;%- zR4H>RP)T!!7F6Nq#d$R4pd8gsM!{Ej+c|ZAsSQN{pmH;sqp@I?xehaddW8C zt@Ijs2YNVQvs*{c3h@!~w`J#}i#Iko$(B!&VA~ery|ENFd)U}cC8MdM|K64?$Z|k_VN1Dz{$X`GqxZ-YSH4%0tkvGFPC>mf# zOQ>~9^`H2M16KUceAhX6lm#@vg(HGiN>BT6^!8gp&8PnXM7)^!xJ~{psxw3}ux3KK zW)FPKlHXv~8JI*}ex&To5_V`vxmT|4L8h!*FDAl%rb1W#-)L%a=jSr zUYS1cK$IiDbm$o#Pm?Inq6?#AYa+M{Ej*TF(tg~%R(h&Y{NCVM`%~qaF3@7NdX?l8%=NFs2QjwyGf@f2zfQ%OqL&Bxyr&$pU zVYgv1Jqb1wV9b`V*6@6+Jix+9&tgnL7yn}VGWW#65EU&rfB9o^fx0^MN|+Q(?Q%m&of9t`$XPMofv=pz_5T_eVlONa!s3 z>$cXP0S8|tdfaOp7!atg;=>Z>`aN{vqwrx!;?Q~)nYRq^brjjv+n$aUg%|S1rD(p| z@>!cCpF=!^dEzLJ{+sbRmS=UiS%S1Z2{DSrKV0@+wnqE9cMkFN>%m%7$0|tPB*ujJ zS3x;x?Jp$kK4`-A$8LsSS+|c6!L_<~jQBEF^k`j2wesF8Gd*rvG#+ zAvCaIs-H}cbUoWKI@0KqsD~DDDb5ov;HgS&c8%J8VpxOlb#-&Z#MiW$Zd1-L({q@8 zevm?Q9@>dlk!p3ZE55UXz!>m8;JhYmzpBsypp1Hn1$z) zAW5$7<8Ccr_0K%dREikR^bd8p;u=tXMmMjD6s7c)BF}`_U*B_@Ih$n|)%^!&74c_` zL#2+G8}CJC)}`o7?vWk4TEiC^O{xVo4)Jvb;H8;Fu&b<1(Qnw#ru9w5kY_Qtp|j-vs_SJhohSi z?fx2Eu-J)|^beYUTfDQX<1JbUZ%z}jqoQ-a0lckP|{b>jnu-Ai9 z@)2AYJ(jkw^W$RytHMKCw!d=2G6a1 z{95Pp-s0p4vU`-wt&K-)*gkuu+QrW^#q9#67XsBOo-utibu5NZ88S#v}godKi==jP7S)kPTfF>hjT)*w}aW>Pn+-H9? zEXP|D6G9H$H>O~ES6(eP2c`uf249_v8bXOyLWXd~x^`nea1^kqDOku3s2J5K1z=0# z?vi?qFc_}IP|FP28i(b!`}KRXER>XB*5#5~g}bQUiUjoCLD_V&FfGENSvL8zV3RcZ zf!@v&^5|UVN30!-c!-i4s^bZObNFE##p8r#WZ(VP5lqsOV5Ew%s#^Y$pwGuMa=Ib9 zw+b|$sp9+?D5dF^yL>%oIhh&aG~Bo6G+m^}bM~fI$hA$-qtYscqk26_r$x$ZM9v%Z z?2H30p{~mp?lWPX&A*@KhT@zq$(xB;LqowHU!rsUlGH=?1m6Z(7HlO2N`z&F&HwRW z&%rG#jdQ5;U#(vfK)lm=8gqhGA}ZOI{Qt zPs?8)a92<#O(&RO%CRT!W_0__4W`*CUSr1Fy7+ziJ+OsOS@4S23j(LQ>|F_^YIA0a zTH3>1W*#ROga1~19;=8StF5lgVu|i-l_Y5xJf(imb+kv$6*vJ<H5&)4}rd;&Oz_nb|GVdbb#-AxQB(N8bRM@y9fzt{uhLgNJUC%;;M)jNO#*y zUBX|{4m>RGng2uoju}LcY^?PtJmBw(z#omO%>CC*Gr7~iy~ z12bdUDnG=KpU=$yq_zekPYaSh1Fkds;RGvX&M#-a)tPZ>95Q{E__Hf&X9|RMtT)8j zE+k!cCFs>fLf-ofB4|Wc@keo?Kp@?we7msS3RAVn~`KU1^$ zR{Z=y+kC%XsYKOCBsUgSZ(SnLU%I10ZS*d3hm(YRv~WGL*EXwjcF7SXF=1lMtAFTG zzrM%swv@FTfsAXX% zH$P!3lrVci?qe>nD0)Lay9t+m>Gz@)x}Y$}CL;qSUjQ@`h5X(W&lvYAu2*t^t;nd( z2$#N?fy^|61zCk?d!w6cOQ*%;%$K|wwhzWm$dApg{4o3 zwkSnDC@^z10^xS`{{7;y83!euB0^V{I*xc{);B|ME#E!M?lY6IqMhs{w`Wu^{AC)7 zW8QjqY)JAp=AArSS){qE<_y3~s)p#!MtNcy%4J?yqE8sgj=On(CsXo%@~3v!2uLr! zA6`v_!yK3~A$s4RT9pSgbsbb-~r8!t=fJsNGOtx5<81L-DI>Bwp)lTNM}_*b>o z2(^7wkK5=7R6}vYQx<_Ct!QLIwHE=&z}!k)O5MqAGy>sux6e-PpiQge`QopX4}iJw zkbFtl`abYN<}z7xjeGJ*VOWm3x7)zd`IJQ*pytioa_M1#$^q6Qn<53~If#dN78jfF zG|tp&0Mm76ElGN_scRmk1RyurWW27SYsoNA;NC`ZB-tmLJ#E&+V@{y!9JaeT_Hwr6k2R{c)aT z*6=QwqMfwBhRR-Qzajj79fLoF7Y<-lEN))r{`0D`ym0`krV-)BtF5C4%>pxaC!28M zU6?8<8MD|}oEF^kM@JuvGM>oT78ueY>Aof5?=D8_9UI&}F-(__r@bI=4i#lS_hlx} z-Iw^Q7;Uf;=Ho6~_mCkJ{G7G*(_j~9cU6q#NaHK#Pne4y<{bIn0dMPeO0MzD=w6;I zv!$Iw)F#vxp{J5G*&>dKyt8Ti8ef@t60E{_Mm$sRX}8d*ErsXdUTlk@gM{OqYVFyk z+Qzd7@o=AW2df+j)N`&csma?<{AIVPSDjKdO2OI`7_xt2BUm3K^Cax%>Bgl6nbDOx zFiMF?aE79#BwZ<4=5^$y_U=FpguBc)c8>%(Oaor=AK=1nL^F?SX9K@Fzuv`ECpQ#t zk~FOU4WkYFTt_VnneaZsj`{s#{@6lOmx1Z-(}4db!Y+W2`loA<|A+nAGJnyA)F)Ur znOK<;tsBY!efJV&0V#6daTXwYbvk=}hTD4iyqV_8QrFqYHy zzp6y>Naqo%I9eBqpfW^f4oRRZnOtuLjq8VU>5-1&B!QAac$~Kzj-#FL+AiTB(ofIt{t8xge-|E^R96+oZo}3pPs-4r_ERv+lE^#Yx(Ph)uypr$p^n z2N`rY+4$(bw*O*k^ z8q4AK{D^TPb&!zdp{&4;9A-&NJC?!!eE6Fmc2sEx4EJ05aK!Aj=vKHw44&Rez{a^*&!WE{JInZm1DI_45Z%8C9?M z&yF$N|1k|SkrPEPH;!gMo|HrEc8J!{lDhI7$I1#P+aEh6bQ3avq9dBBgWE;D#PWbv zjlTG=qxrsYTJyu?>>cnUX+I$e#e25#^csmVzp|}Vwk!ZS9af_sv#E;n{UL7lw@oU=z_$JxFb5?i)VDy_+B_}rA%#P^-)>Ct#Oru8?iRWMoz zE>a9c=AN?CA8nYB5wZx(u|$fL>GB8w+c&j;+}A5(7?)mGQG;fA738CapX2bbamhvM!o#kIJ* z6$&&22$13w3n55>;#MdQ#oZ}V+^xmlo&Vco?6Hq?vJSG6IiKgguDjH7Tw^Gyl%jJ| zFfDnXALdmbpfd9=&mj~BWGk!GA=#G4KM_#MxOttBAB%amTN_OZ5qtx%5A$1_t>>Ct ziD~d`s`2NBQrL46P>>Kxe?1^nUorYo!M@wRFtu`ERSXm}n8V4`GnG2X6p7O1dj;!` zQo;|-ys@XzWulJLb6>zD9hFxrLf^13}F*(k$y+y0GtqhfPl8qM3b zpmM$4Ihe|wyMw)h1K5cY7wp03r4TbS*XS>*M)7|m$A*Y0?Y#+nk9K0p&J(0}p4hPA zT6CiqWvqP3c3%3y(|FS-nVf!;0Q9!!L8$lj8Oiz4R&KP% zkM$SeUAuaN8-p<*O?o-6{WhU#uTseG?EA0D*u|PfcdN5_CT{JDb4od=BK>6pDpi^JF~z`Gn{Klq zXfLPH`;&3_A3$}bieQl{zgqcx%7oij4BUpe*Wokx|nmGSk@=))UmhkKv#++Nk z_a~Xx9UO*UDwqlC!b(GACaD$~!`dkhl$2~1iQS{Gqj2}B4hZoW3RZsakdlXRWwK}( z8|h>A*#xcFrrMhV7`>LpCG4m!77MDvA|Olg#<{GbZnJmh%+n1Oy9>*%VSj5yqIbrt z0lqVD6#OOjp)KQ$8{)p3M^>qcX!mf}dTUX4{8Z!vOGRZ<+GGVn!EcpH>JdHA2l>d2EoT+MAy0U z3?P4KDLIv^9N0SOsb}wCyoj@F%`e4W(|{C!F%7Q`0)eCbq18f{y&pQxn!4Rt)& zP2=}^mWkzT)d3O*cR!QN?kC8q?(n{5^~wb`wR^)5_ib_+B9N!i&!jQJ*7{TH;K(P~ar0}Zm3t=6+O(%9oZiYYRE%_frvzMk?5 z#a=0|4(B&ku$nV}@iUD_ADH-NUU8M$H(b^??_wg{m};^!c@(EAKgs9ecZyEAwt0=- z{Bj@1EB7?W=1}#S(pQRl@DN5FWII_uf_Vj1dOlMBk1|2G%w7mWk$-$Fdd?5A4pSbY z^IkGoFc;NZE^1_%V5 zr-X-h9dtI_?J4QaY>)F&jRNVt>I*uvhSZ9N2-gt~NFbJ+P8{eYHmi0lb?1bxvr{v9 zQ;O$vd7B6a^36_)seAOHS%BWhUJ4`r=ri`w!s^Sxv8(dK`}c@L5C7D8qiV(5fa(IO zn2#lt0c1K~tv%B*S=s|P^U?4#nN|&NwU&VAmMIO{@$wu^|Ey6+CGF7U+^{xx5vE5} ztCcFnU8a_t9wA-M2b>%_j)eZm1hzlZGp7Y%R)+FJ<^Fz41r1v|Kjz!0YJlWGy zFIl;Dt@C?U>UQuCcp8brJPxYM!LU;A|09#DJAuvn>_gowtD+P6poY=^0NW`VeY=K` zOfcpGIuqV6U*+eu{M%;J>K+Xx%jyYlMWUxt|68nQ@zi3ffgA%^jJeVpFbZVdre^{-U`(48sJ+3mr=Kd*+8H5WzWcQLH*p%>W(G%g%52Z*n2)u>ewzj~ zPpI;6`!GJDwA=hF{&{4eqR9uG1z0u7(raL9V@r+3jW3m8P>9WaMUtoSea29Q!-T zu8G-pX-@}p0oKJ4-XOX~+^LmnI(eP37Ns-as#Uz9@p+F3xlHXf=n|Fd0hec^KTl1~ zfvK{(D$CD;Boi1ids;O0O}-8S$g8wn@E4Pf%J=BaTY+{2ZB3@br|y5A4_cL-y+m!r zxI|IKnim3a;G!de95WVjJ1QKoJ;VIsVhG^9VM-E~O~gN#pZxXWrgY*qqS`vUdo%o# zRw@tV?=eAyhK!h*uT}~dnCI0inHq7vceX}S<_E;K;9#qdF*FdbU3sa&5S48H7J5oRY`s|V+*i*jmWYx;o=X1#a+*B_rGYhCT|Dr zn()FyBKi3YvvuXM!4!(th6bT19P+h+v{f!zWEs>Wsa3X~YM9I_`a-vjZP_HX%W5Eb zXOpDMeA7Fh>5-~TH6)!_zZC0z_2zMa^+txw0NcGkQ3+Mxh{GraAYga6IK zN^ZZh#Gq%qTJ^7s(jeW~@4viE&jaFgOyFRO@w`X=VpR2o$c#5J8Ydt(BZs-%4$`>Z z5Jwq%ulA)u7(mwPQGy86ex)mlm%OYPZN?@2B)|dT6omKMWbuQT?VQ0_dz8}~1Uxr$ zosrHhJT#S>>i$Klj@cy!QKRC>HTc?^mMj*8#JeJW?$A${D-hMNeq^E4{t>3Ai!~H5 z)LyUq2`jdTHUZ2KgE8-aJv&Njc&(T$c|20dh@+DK4xZcvUN7a_jHkg&6;&6~H<~rC z+%eJcRmo`7(psG5@AIKIc?SL~9Nr8y#G0L_aM?@VhD*e$_M1c*RG5WRcH~fJ%(gnI9izTAk6awP#_3fE>=;ugXn$vq$51Wt*pYO`rM+zqrsR{3=t%`?2svBj$@LxLn*cf&58$dqKOT)3qu;iC*=?WdkzMo#gtq7Ozhj!5`2b z#c#dpdK(gEj;--2L-7bsBWmc=DGUrA;7`b9le!oTS4A?`=>tQUrIO4`MTYC7+8w|p*J^GvW>p-#uy*_bBCJ!4;d$_mZmfjj$4&vk~MEQ3ItkQ@|(s~^HAUZq? z{2W&%uGN-=igg{&)bDGz%v@FOrD-*=i%u2E%iNYW=lb4SF}520{Mtn*;5qAc;RsdI ztp|XDl}Q3WfZ5=O$0}6faQxz~qWp)2yO5xneRCslR)QN=+2WYdHxjTLB(#^>NAp{^cl9s&+A9V zr|6LX3x~cy&no}FovTB0iz^m@E3{;xsh~si8QbVT059QDx`qKiYEm(dVnBtS$En8j z1>2UpB-wSU-mH>_=8upa$R)aCm8ueT?=c(QG($Wf6Xv;6>G`ddw0tstaJ1>G@MsJ1 z#XPx~;*wzBC4#9;(qEC>p?sJ)eYzn{V#PrY5MS8XxL3&C$%!Qic}FF zvbx!2y>(*VauoxTzAtz_zjTn-D$)8cp9!Av&l;n9&xjMYWk};@-u%bmZ#I?mQW7)9 z7e%qKEx|a;?ykUXsDQ+!P}1+2*$j?kyi>qB1BY9pC%D>C0)PeH|78q>7 zR2)S!HVr4&B2ZAU`xEJrPX>O@r&g{h&vS62)K8ecU8EeXcSuBE;6RU|M>tJ#Fsz6l zuOIx*M^oY(Y6qa+kUD>G;>o3)t7>#fFzAZJImuAcoCN~b>xrnv9`0WD!NA9nXG9+A z^MGc5DC-WN@G}{y8YFUO@>X#EgBlWf{%Zf28#dK|$?Oq6eBX<#F?i#`Ju74YX~b`Q zt8u4taF9>aC-Inww zYs|;^tzIlBn0e{`3W?$d+Bma2#OK>yu2rNOyzMYgi~?TJUD(7ZxNX*kLAn;BM4i_+@vz7$vZGxsX^K>c-tv$eK8xZ)1?5uhb~(wS@Lna06E0+`#Wn z>%ADG;TSgU{dBI@52J$7YOWGcbLAsZP+H;$q#- zVK~O9g_tbxY3;MEw$g4T}gR2?Cr*J$nK}(*wH+KjE7mkXuZ#;TaFH~}! zAr6F?0XQ!)f3S9+??yf8YG=tj(FJYwnGtgc>Sk<>m0!WYq+Rk7Z#+ zr$o4&(J|f|9jg1E`5yQqmCfUfjh8u38~ylZMt#bP;GnAhcS_TzE^|Pd;`{WY=+%Q> zlx5jvUKDK&ndV>-yYh7{y$hB6lmSjj)dzoL*BthPoi@FxQJ@hYQYA;n%wL`on> zJzf;vLy~v&&f?ea>_2MK%}J1Di~7QfpkPW&FG_kk?*SEBBSq@0Ol$AM@LkV_ycdzJ z(?B~oLWsSO=tX+wNq)!Sk0ZNx;)nAY{8$R{*l9n9y6m$@Nosx>#Hghbprco4Rrmfg zBDW0XL6(t-+m0HSj7Fw3vhQ%dY~3jDM`gNrEXnB43hCQssVsX)?j3 z@@TAS`Wx^hh{Z3@&EF`H28fsm4(v*!`?v!#u`m@7*AZUL?3< zZUJza89JT`W~S*%lbuN$bT@cLXtfL{vYt}x&L^(#_}a3PHCroIv-&QD6k=D2`13-1 zd?dD|9$fwZ%9!so`3tj1K7=i_nsJJJb1Q z2JO3$SBN3cHk08oQv|<)69j%>W(aSY8T>RW+)U6>RAc6%my=YF#?CWS?E?4+}KKdqe?pOMcw4>FEilDS< z-8sGN!%}v}C{-pT8&=(3ioeNuxY+dY=_#~MvOUer!(V`PBuVW*0FyF+P|SRc^Op=% zvWi3+{ZlK)joPN3^V_Yqv9-#<$uXceQR-v(fF{GwBR`+s6PNmT^v}k+ph-oh&FyEy zjq9V~Ls|}=FP!3;#w8!+m`i|@qkmMo`J^GqX$2G>G{2+b8|%gVnFEwUCVrllA0aC| zY1y=z6Dyd68jTi94UwNVxa;E_G18hhQ-ipMPAYhsi+QCmrUF)!bw-K0MnR2aqzCMt zj>&bq1B>+LpV$h=DYo;S$Q0X(6{^cy6x}kOf|^u@sOL)9tK($)rP^O82_N;#F_Xjo z1E?JbvlJmgh0kvgr}vP<8c&vw4BIpW_d|R<@`5)lMY;>^* z_R=c8EvNCfs>M3*_ImOSxmk_y{79@6wleIDT48el21-~Q5eKs$ zb%PloQK3=(ap9Jl{`Q&v>6DJ)MOjE40EXc^BoGAvumjL0U{!UDb~f=5Rzju$A42d$ zqv)%Bhx7s8?#W&sBL2d;@>dRs;!Q`h_gwDcl^RzD{Vy0Cfvqm4#-LQdxL=1~=diLX zK`@r({&?iSWsBk0r0W%Lsu!w`Zwlz<{mxr-+b7)ObFzdr*wbXbd=el}<&(&I_M}$E zZJl0NraF7&bU@|yk&JA@t+e$0TEiba4I5(UZ`R{C6MuGK0IXDDVCnfxHJ6!KS9CT9 zt!UzW5D42l4@nZbMEl8BWd}c>xob&0CWg}Xp2K+``Qt4}sjWa&YvXSCor-BL?xc;} zCV{Grjz_Jaqy({lNLN?`r?4-D#e)w)aEkPi@*v51>*-TAA5jd|U2;nC z-9mytNisjx%geLqIg^UTC~$PbheqwVM=&O63TIY~H211_jn(}P$rPo;fyDz#%IRW) zRlR^Z3cXVHYl7$Md;=+JFL>bqXKsdMr%=4&hg3NwtHGHj!K;PJYquhNOKr!Dj`y>rioqXxsPv(s*1pX3BAi1S!{>_j(VKS0)@4wq;Et4Hq-&B%$9G zUXWBhWRR^upzAFIR8>-pb3DRo=#IOzb(o)ms;y6d+80c>yt{>rjQO(D(g))5{*V## z6#b+&*CdyZ6@rDV#T-qZl}LZ=Vn>~TdUTVnl9xXbsDgs>X148nZ&z!X%6bI6#pVIq zc}FJ5h$Z4l`P-Z22a7HEHhS#XkD0J@Y5>FZ-dB++(Liw=pX%!gu2lk`#>oq(zENqm z?795i2R#x>-E2Mdg?C(4aD>v5{T`n`I1hOEsXu|hd#??z{m%Ix;1h3Ns*n0CKH9-N zjJRItq8NSV;%IGg-v)-S<7h>G->o{aZ%%#^QR&&xE&MZm1f*-7{OR)XQ}qAR7bNH# zO^2VM=OudRE=<=fB|q7-i$WF9NcfO%-yX{U|4=yh9z}eI1Q2pQWH)1I!7A;KKC)-I z99=GT2sG-**J|6xlmhGLG0p;?4AnoBlabYvDveK;fc^tmKirHVr=6mAP1MTS$N7u{ z?-|>QlqG#4t+X}PC0i+5@_&&8Qu}%*Hwok_M zS?&CGakg0;<4BF$Rzh?^MAMnYa8o-%N{Ir+<=xidJ1_76fL@BFbz#h#ui?CxTAl(z zareer;*Fyt8x$9eSxeO&4b`f>(~=#ecdYug4r$KMg&JM+4dA*5$(<$JtN92BexpFr zUC{XW5kc@C#v3&RI&T{4x5X&_9hukT({2~69_m~$ONDS%a5Gi&WTfk9>u`kE>)@xU z;b!j^4K11~1rJ$QNk9@v$%9~sBY9F%LVZrX?=S6s)p5e@cALUiPXTvB3|?M}6STKS z9~uo;_EFnvYO#MbNgJj#s=BR3cgbqK&j*Ut=K_0)lf)}sly@`C*#8Yay=nN#50eUH zvn}37*8IfQ42l=4xlYs9QP=0xw^#c(iie$*HNJ@<2H0b$xCS$inD?nlE$0ATU%GUJr136t4CrI2eR2OH z9KeQY<`x3K&}{p1z(uA2Y)Ird@pC7Q1;o7kNCVl7$H>?r!kf!m7U!&I5Lz%P$vM#^ z;~~8vXjqA@q_oj_^_p@OzzvpYenI#rk9b#Vo~)v+R}&kkG0xHZk~G^E;K3@`0?^_^ zKaI-f36oa{>TLIct-{YM0&gVVWC&{u(Ag-1I*RukkQ`{;q{W43KOPTCJ093 z%XzAX0q82Tq~gF^uTcg&5CcB!BOl=2hr+sG5Gz#M7s_#ZF*7|i_iO!Ko65_ecnls& ze1Hf4_@ zv_9Bk|Y4zAlzz_NwgFcW(nwCaCI~bE=e6J zAA29@gXm4!wzv0rm!52JwPFZz%S6?zUymiZx(2(h&IZeKvvBQxYYBD2Tn7(UG)Zzd zTI?Qm<+cnebLp{6XXm`v2ww5Q5Cd~Ab%O`AaK$TFnkh=vGn)|Wv(x42+S)vJjql!- zucdt%eeWL)pdm2)RL-o)QqfG1pFda-+e|6G+-vSv_0`0_T~BvRo6HWFuq6;Lh{Y}k zc^!Kp>Aj(?Z=gGaq;MCoVd1C=r#4*Z(esLYq$U17ab` zCs0*!y`4S$PYU(@`CXH()%b1TEk_>siQW*Va2yB1mIGkP9l zD{ccb)(eq%bxR)huco)XFNC7;xj0OENdkS6TBV+!JS+kxMdZT8!KUm;V8hJQC!!6(-HBHfSBlG4^mrlJX1m^Y%7!lr2I$#I-UlxkT0V z%sH7F67_%qS5&UWHaVtQzYJav^qmUE^Q;(_<4!u!1Fbg+006hq-80_Ff>q8oS^Zg6 zY?eBTSIG**9C@k73VwB`Y#{a*+S%KXeAO^%H=2BJO{p9c(2I)?<&j)LIAB8(kzTL% zlpHTU9I>4}gE$@Bn3e~B>j*--{{VQmQH!E(o-)@kSD(c}XtUtidm&?(zH#tbK&a)I zyQ^868=Ne}-#V&x^(B74><5lvnkT3wwR6jANYe(VxtkHV#vmg_DCx8It1&)B?v=!z zy;?TFQ;stf_Q(Ckus8<2+h%n2N19w|Iq+jP@XJ`BS7%y;z1nNU%HEY1O!1rShyAp| z^Kp(SdmKE`StW81iPBaJfI!6^RB*gc^6!fAFiv-oGG%d7#9u{_B2BI$_l|p%(10nnHdd{usgzjoTNA;HUT{rhwfAsVCHVlZtRak6AZc31>@cMpn^mLTcOpc%<4?PMuP}j10_z5b&~=`aHf15uc%iqr!jMi zUy7#V{79QPS{3D*zRXdeVx{BFiTkS4N9uR0%Fs5aGNSDLJ1H~l?*UDExiqx0cjJX6 zQ2$kH7uMw6yW8N@?#V>poAH1OMb1SAd`{J>L~Yxo3mILLqVn9V5|}A0SU;ls;N|DB z|9k3J4epZX-ex@5?qu%NDw&*Y2p2}d7g#8IkIhK%iz)%|5cA}|$l-`TjXV~(!x~w`z8CuLQ z#Sv8M&*%tzQ0I^op|E3y#7LXnID3$0>J0s?VW~jy;D2i;iP|;ID4=*Dl4t({?|QaE z3gh>t$y|U72e)5yTYFiJxOiQTzaY3kxAhAXNrB^PN$86AX@Q@%3#wUn`BWfl8Gb+m zn-M?7KTK|b)nKwue1H(Ih}Yz7c$dJb5{>HFQ7)h5B%|W8xH4_4f<6$DZZpscv(^s! z#^>Z2RXcqj{ikNi25i!89<_x;)Y6%KqXB-!x1+L{kmH<$STETGxtVLLhr(Sm-%`z) zCjhny+-wXyTeE1wI{oKHr6;enOoc4sJNnWa}zA)V=J zYTE1C)m~=r<@K{LOjL16fdKSwa=+Ej$9%A*IO6kukG8JR!g3!RELtt8FVAO+&)$QT z)RKD%83|w?q-4PHR=?K7_6t`I_*Pk(LzXJ0lm^`M-Ge;k<{>3kyk+6IA80sddMR^`^2kvjd+z;iL8H3H@3W3 z$XKh(KL6-$8`>#rnbB8d&$MZ7I2}v<Jib%!W?~=9^^iV>R z?|T>5Da&J|cEhcZKC^_-FH~&SJKJsr&oyh#&i^~uN|&gxm$t6B2HbA9($jxBSb$_2 z(r9cm*8zEc3O2>O+;!_UPCh7C2 zp3*WCnIf#oW$5<=dudqw!jsutTugFMOW^wI%f4}e(rtHOayMod`usG{ zNI(E!-p)6ZruOTv_xNbuD`~huox|PHT}?}JXVUFIN+SRlTUH%paQS&K-6V}V`0d>^ zsk>ZrLXD%QWA{-jDjtIH!mu_VzLZ4ouHBcU+30gS%t2ig;5Q@$UKRn*YDezP{{coL zH8-t;Gr`a9ys*D6oCKLyOLIQkl-G9{!}CU_rjK3+upOTpPQf0Kz9vlCY;S71EE%l$ z413$s<>x$A6OHB8cU+KI-P5yyD|0=J`0Om*gJ-qrTOc5GvE_tznEVd_bZUw|CPqHL z1%%k9r`Zvq^9{>y9Y9zkOEPiU)bUtep2*8#-yFY~I{AAtMF+>3mvb zFE-x-s;mRW@RumI4WH-}!f8z{wUyO<3)GSljVQh>?qX*{NqzXln6(>>)h*qHr3`7! zCV)z3ER*!1_y%`7q1^_3UQx;t0ibOc#`u!46W*Vn~YVOxhEzqC` za9b+7^?JI};c?!`s4u1|W%7&-PncUQQPLoYGSUF3om`*hpxiK zoUmZusX}y2{94Li0YbvXRON6st)~5dMmV(c@7@GLh1b~F--F0$rrNXf7Pf^X|Mqgbh4%4t|l7ge|fq`;}Wmcc%YUPK(war8C|Bs5LOR;iAl3P zOBg*v1{@joPKzV^rQYy@PL5W*0M`+&fR)@$^s?uyvO=|*a=P1~0&u*CA}Nw|&_o8LmI4^MCJW)_-4T;afo=`$Zd5>@r4w*ngw1RO}!-`{lh^ zv!)uR@MtY!^;Ipt^A+1RHa5Og$*9^t{oI~xqN3-xy(l2v))i(@Oqc4-EU1S^*f+s>ifH4uhN^iodRCE>Ry5s)lX8Y!FU za`^mZ<;>WiZbGJIC7-ML{f7mtY@~ffnymxLYb_#<58H5Sv1LCIZSY?iR_>(>`bsOi zJdBA!&B)|%Azr#(mH`vQRai0TBQ`M4XQe6bKY#@IW?VRbrXnO{MfZ5_%Nx^xQ!W~5 zk4e?D+El_CLNLR2zHD|O?#`e_M2aT8BcISu@rBaQ7}wRZwBL`l2bz`VI{7(q)HCI9 zn@`yWBhT)yfotvb>2&cD*1ne~Ujc+{pu25NOjL+j2H%Gy zEosXJ;@sAM0z>;X#q~NpADXQ^^z~;-cgvQP7Na`f#iy|-uY-tRZ0M%CYuF5I<5uh+ z0$odVl@}}pb?ITLAGy4?J$(RWU@VyI9_C!DxI6S}rdd3NHR&Wf<_#A}8ZCc06VomH zQuDp?TfNz?kpJBG9`WRUsu=XYHtj&pomug|5o~$`M@5{l?1VHw(5(Yqj?u@?;fm(t z*rhtuo5U180%yO51r4E(Jv&Mv!xWQdJKQQENeBRRRla(1Bg7u^x#|-$WC}c=+xYJN zUX$5}x-nBG$x_iTyPtSpM^T&uATTW%+3}*I+CvW?Xdy;@S`dxXF7)1<%6m0Ts6ss8 z4Cp|{Jo#GK#R2gO^nrx|*ey_J0fEFQ2}q0kr<8f_Vm@FghI*3C?!1Pi6$*CYJ&EU1 zoeBb!Bc2O^ify@nwLRD#Cm!~U$hZ3M=HpqIpG|T9160kj)tnep(UmsH8EY}Yybz3k zN^t2M1ylP1u>!Bfuh$d4J-=JElR+mXbrZq~ncjK%cAp$nnb-%&&`Q5m->CZ!kSIU+ z*j6Yr@51tP)bDFWIij+8f^-giYt45g(?O0mqT<^UeVQKI)3cD>_<4XcdT{V~_NtpT ziLMA9TxyWaD>9$98bxems%onZ2z;V~yyrGnw}0n)Xb%;9o7u_9l!4PDp$#94jZ&Ei zqmQ1i`Ep2paF|odq@6eL`Nmk&*w zftZCFN1EDZrr9aaKn$sigWY328`@9i$@-vN$%xT2Azcfn%yy5OB>2DRZ*U(iQ zC~M^t;qM1%U^Q%`#;0%OLe*SiU_=fdp~Mg)5kufxt!v8D*z_t>eVwEF&iT;#*5r`p zV-8b&aKT4=60x&8TD}PBCFvhLoV$x5u;Pt9q4V zYX3~WT__c)8Oa!4Ka4dyZy4;ZfQLUIa9$v3|DwgFX1S$DBqpwrR3SFq$>}()==6^T zoxZaU?x1v(OPAJ<@184v>+~iLv4&6WFVOa=r{$lXMBH`l18brNw5nLa!w*8HUOYFg zKc>-L4;PbujedeNh6Tuj;1>$IM(WWnq9mm>0w+MgNg-T#{~#o*yu88#dGJZ@rFO`6 z+q=FR0t$EFi$~vm9HFsiqAIy&Q7uC_WzTE2Z);T(32>(1gZtHxXG0+tI;{KIjf2RE zpfefGdG1=RC&QVyR5Mu_QnNx)aC&-w1B`v`uiaEP_pYsM@sR`QWUHAk1u($KOC9s* zG;Z^j?U+gt*KFB|@1)k4P&i6+M(HKic`$Rbv_CMM2Nn-p&Sf#zpB3p(WBpj+j#?aP z$A9QeR!a(1C^XG|di(E;xLISh-@sRWE}x5uM--NOrZQgcCFyZz7$nIdW4&kEthNd( z7L_ubhAD77HjbT&IM^OK>dWIDR9K2J!1ZImAv7cN4Is^ob)m6ZI~4)eD4 zudxTy(>1uuqtSO5<)@uLmOS!bo7&fzcxHSi6SmZV&91N{3BQ1SfTy+B4bi}S2U>0E zi9#YAiOY(2TlSKN_yEJ8vrU4X$A;pPKDt7Lv_Vrl9BoTo8I-htv%Q_Ne}XKDDpxbj ze8!yJrAnXbPdO~b%yY8Rq*8y4F5mW!&FAl5$d{b`Q&t_Q2mvlx$8!A#FmDQ?f4x#S zU`)_)Fv3})DOJB?znGGVr$lM^Y44H3E#$MyFb{ETL3@*tc_mOz-aSN3B45}+7!_}r z?P3oHesy88@W73kyQM$ED4xJAx`cA>Y=mx|CGJG>ZCU4is^+<=nn{8{cnNwzk85#v&b^V ziZcTOgFbgKT-T%?M~^(spqzb)G3qSk?Ec0g2<7XIpso+k3!tDkIqcyt1}rU;7HVLO zSAHW+yw@W>jbfm95EZF4I?NJ#e>t)0EBxF;W;lZ!L_98nG?83x~ zK&2HN^3+6f%Sw3QL5BYTb-X>KFIdyU8g*JgGypjOVZ7|g`Suox*@VDiR-1Qn6?b{( z%Ad6If`!II7X^XiGG&v&wulOUK@#I5K@R#oJ1TLec!WoBr$u$GCC#fazx|8@tmE2> zWZW#6jS3T=iv9+8TQjW&MA+p=77*f?J9ok3O zR2ma;3t$!EGz*jrl-;^!pySdjJkOkEv|GduE7&i+wMKiuV;(2IpUv7-h(O#2Ys#&d z`f1i8BVdBB2j(tqiqdxV1oy{9>3`*-nBjR@K9cwLg*fE?Q zSQONIHh>4F_gpDoPbfCZDaA8VePbd*{6W|Q{N?c3^>#-zvR!YyxptYIyP?r&#Iz`| zrhrXASww}972qThkc=Y5XkT+56f<-@@N`O2n{W=n(&xs?HGJ#<)z2H54!GRGI9ffHR@l7A^fP&2ol`9fS3xn&mrY^eCv{#smegN0hseIKF zXs!lRlODf2b67uml?ES@%!8`cRQf5V?<~n-L9`k`l`*Zt_$AC7#2HGkC^jTRAow&; zNX&6c8nl~M&!^13v8a6O?4Dr|;9$>#6%$BPfPvXOM7;zN?OeR?g$^+N<(?Sr4i$I}nz52dGDZN-f|fdL7VLsP?K z`J9>Fe|nrE7#_jb$xKZEmWn z?z=^>wgP00LfQ`UQ|nG_%X7!BsQKIc$aPDHeliB`#-HEP$=(0b6Ra0>ULWLqZD2gt z1+M)tLUhu*RKPag))j@u{qZb1*@Uii3zLLJDX9$q)!G2^mr8ndL{~sE*F?$4n18yt z?SB1g7UD{U(q<(T%k``8s2iuPH+u(om8bOb=jCv+t?tacGf%$0qC2#pDJLEw=hqPG zF46xs8;{>WX{4LDi_d-#X%ZoxV8(f{FDag+`r&pZN|Z97%p}*9SQ}#`p;RmQW?~4) zQPghc2ou|jZi{Gw`Q^Y+Ggz5o-R>g?y1LLU0X%649>aO@g1JqzdCrD*L=`M!$l>zv zUMUI5l?hZ481J)Zr?G3wdBmWYUpX;4EjwcGM?ev;OtW-*B-HF=xr#peK&!l9G@*l& zR|tZdMq_{Ml@d4h5TgpD-RI#PG+IT)R9vs8U_Ug5_UJO4t{p&B=zf%!!taDF@9%W= z13#8d^FZ;s?R4>Xo09T;YzF|C>k|lq756_gvJI-*5jA53;c(S9kqyb(XWh~}dsu+? z*>}EPFKw!QpZDye=@&HDBpzdK>s6rN`6i>ix$gD9U7V^9mUG(&b>fRE_U-d?Xk$4j z)e@Riw2n#WTecxCp4v0i%1W=sgf7r|P&i`kc*!5yFfchtG-MzA?BBr%^7!SRf=SvOYv%82=-+lSVmbRk0yiOPX6=wJMR{la}FH(7>;z^3f|KUKz?1qO0l~hOi;r}7(tfJZo z+btZ52NqT+7Cg8Vcc-|!l|pfMr?g0M5+GQy;O-Q+;#vsq)&j+$xYLvW{AaCmJ2Mw^ zG4rig_I`Hu{P1gpmQ{SDt(L+ck<<~KRzKUJWVzWCgd!v~7cSA{E{#fUo@T(URfjqEki078nw&)(z|2WD>6;Au;c)%v z{j_uk{ReP6TtFoUwlRyNOlEM8)$rn=*@ZH^k?8QMo?90r`oim36`m@0_?db4FZB<* z0Cf`5v;sx_jmKi>8O;7;M}O1 zBC{{@ue{eWR)j5bY*&W&m04^ov`s~rt=^WNH{j<{ERw~%O?hPy3drQ#a50qyZ1BM_ zr2hegy*7W9YBUGh9c0=&RB&FPSMRdA>FS}J5@@Efg-J;Kb>~YkGgUv^lHfP^JR*it z>PVg3X#mohs)96Q&}vdkXMK!LG^G{#)`~zhnX?oWBJNO&79pdhHS67muuJj~MVf40!cTBw)&4K(5_W4yB2xTv9Bf#Dmfo z2n^qEt|M!@_C4T3D)-8o)=Ai+zPi>vxuKVPUcDvY7~>Cff{yo$GUuy)A7~Qr_gB$; zIc+kFbN*O`U+bhBA1^>T5jBuF`uM)>41fHOayMb)4?^Rv_mARh=vOf5RU++QK!G2&p0%_6~2v;I*XEQ-Qfy) zNbb32XS#Fhx<*H@=7B-}erfMK)^3hg1=Lg^txg;@C>+#Rtw>;+(P%4?LaPpS;WemOmO zDZqAcv@OmNRL6x7M{D>tz_7Oe2pso(EBoeIjp}ujBwqOp6sSnp())mqoLJg;DeFab zeG!i?Kd`U+!lAg*KKNh>(A?GFIV{xqEQ2WVDTDO9hKo>)dp^=jcJW|-5&5C$Vl5hg zx3uCwt{Xvi0uQo-`p}`oz3BnLAI2oAhSzE6ATs1yzkbc5c?%>vgVPe)9u?Xd`XzGX zE~u6!R57l%9bYyVD=3SkACxEYd2$cTK6H~4UJ);!vYDd&1JL;(YVRUH@ivRCsc~Kt zB7Ryo&&Z4=D&XM<^O$}Uf>H_glfTto{dGKZC__g3ir6DL+wUZI@tFd;^8JPK!P$jj zvkYL+3w~|F7%~mGHj}!wU@Q*ikq5O%V$QTLHFzUC!422S)T?&O2nNNz#n9 z_#!On-eoI|Jv^ka#cR{}sN;>Uq2+yc&3gZ0v*f9d$z5H~2HlD$y72I`-+VOkkBCI? zMRjnM5&sAHuD=&ceZ7JItS^nY$Tf26jtNgiN-&H$BiqhgVXwn`DEm=xCrq3msX;>Os0#B+x)v82;!nly?#u@3Cf_@;J3U5 z5mD@~5kNMHw=f{r-(!=AQr}H|SkA_{hL2NLmZ&&R^xn0}V=UHKE13YNH8%)dfiyfd z&2&?3`a0HdjVoPrFmqt;gipWYEH?sTyOy^-t~8%g$>MzB&j_0nWH_4&mS*&qofW%> z5L;lUPx#m;g{8%#4F{xz*L^ zWK#G=rBOCCWD^Br-PVzDVMs$O=iUYxMf$_6KmX|NtmadipCPh^i)@NpalwyhzRl$p zw?9^Jb;+TFuNTBz#G$i#`lE^w@ocVkw5_=Ad3c{uwQIU%yF3E%DHVe2pBIXW2fyq$ z_y%XZMt}F&2-v003ox@o+xbWWMd6WZ zm6^=0snh$uI5$4$n-wQ}-6DXm_}aOw0j3Jq_e#9)CpV)WC~*f~Ga{Q_m*{FCVkKlh4^944?GG zFKrjrk+i$=y7rw_Wfb4=42^eL5~lnN`tn81&SYEG)0#J^tL2^5qsJ)1ttHz}++{_C zb4cU_(O-9ep3v%*ja#A_eFBJWh{<1*cKH>BlFqTju%)0VMI~3uQ{SqrOeXwK=mADr__+z}0!V!yIX7Nrt5^ys*ddw{X{#&?v{mqHVvAw)PhyIA&j;%U; zi74+fOlBxp>@puH@8s$AYa|oXSSv%tk+lPC5Mxl}G^ zh|N_4OP%*_>-rxXuiYEX9R(+wbXK4Gbpbr}F^=FU!q8S=;SbE;o?*)_`^dw=;Ltk1 z627WR%p>44aqzKC&y_wvEhI7Def@XXMLO3-Qq%aG~8bJm26QDY&rF}>wxw>4OHFYq7uNoV> zw`gztJg15H$1teWyq74%a8_SjjsvKb$(-CL(I3JZgO=%rN>{9IE!6m zmoBD?;lCh!(Yi4apD5wOp5NrHHlG3m1}d>JH^>>2;FyUo#h*^Jk#87X(nnDL^2THi zg|L1X0RAYe@f`?7^EtMg1U65DnbM^saJqyg+rn@`2%uUF~G`p9beC6IiwU5{Ug+D0& zQjQ;fWmCAJ{mq)?w(%(N@(YP;$_&#$;8C)k4z`We2ifl!=Ddu0lD15kKMi|m6;4ha zIe-21eaPA~ME0P$Ki{8oSf(Y9lhFRiY*3oc2T|A^N* zMivwo5@vtXH=mGLi9BnjqxHE7z{6~_^L1v?J1`u(MKcA{Z}f!e#DBM4tw z>c_#O*tUHh;Q(_PpzQ-`EBOl|YWRoiX?1oQQkbs%D7gvG+~v!)6gU~N)btv?X1+O^ z>Z*tPZ%;j8G;E=+Lh&{=)_^joEjRc#jzF}ljW4r}E}AFeda`YT|tHL+TSv zRIQ6r=ey$4;(Tut6@SK?Ic5nF#_sndS>Ih*450(o*;b*YadY$X_A-LF7m~lu=N1bC zUC(iET#E|=$$>Fk1cPEK;RG5nXS_9%9jGB1(zLg``0`US#)`pwrs~#-TK9={=<%8( zWbYw^F;s2akhQ|GqpBMj2{js-kpoKRWOWrk4PsP|L+OkL--Z)fU^VcJ^)ukGB z8QeU3fRDxTJ*X6LZYyz2~k91e>{>2C7jBsOaxSDSTk(8bdh z{N-ppGoh&D0GeF+0Rn5P=^odV&`KI`|4s~9k);%2Mkc{ZG>B2@^cnmi@uQA7`8$a0R1~!G6}lE5pESvf$sDnaMSkWm~Z<2YDUi#2zEn^laGC`m|I(Tekr_3GkeU ztY}ucuTzS^$}zgIF?*0r^qSwRnOZVj(|BqW@h#Z*dOqveu%qb{PD?}WW#0x}m*mk* z8&CRG$$^`9>}_pBmbW2$qt_<5 zwYXsOt<1DRELm`Kfpy#@ks9Pok3WFxWETk@^X&=8eZ|)fN8=9LO$oR92t-r&Aqp}aL7O| z4e)>b$*81-K0yM)N>N)7A5y?KcRNSIz3ih~9zzWjz<0g?t7D2~ijPokk-G;cNz4-L zdnbM^d=Sn46zVWiPu}kK68{gNG{5{S8_VVUMB~}zjWxAL(`RuSGo2g`%$X?YdF}y4 zXD8R1b1EBhf+cb`JWq4HC`EV|=`8u}%tN>YB_9*02YR)U>ssjhTNCmukhXp{XT9Ba zlYVOz^;nRwlvCM|j@%&+WB!og>iYMvE>o1}D zKMrV-bg5a{j_PxylL53{zo)UmC4ZqgnLB!`ky^@>56N{=NH*{)P$JPEyu1S;Gt7fpJ-+Py}r?cxKck1 zTLOu_T>#d%PwjdRG3D|ji-np-k(YYoB0q51hBP=g=2&vwsW+*|=tiiPMryu1*iha; zm3_?BcQ!e9(_HFSpgK^rjuqR~c~bai?Mq2ZIXfY)4GtHKL7s#j&F>|L*)cJLNs#vG zuMcN(k&_C6Q}ysm(mis}UWAzT!_9ur`RxkB@E^cXHv@Q-B2gd#s-)WmZg(rzGz|BI zUSevFPtT7i3E|jb`kmEowwwzb95@zFx(fD5@FDkS<%PWX@AFUSV&T}#iSz&za$E2g zo`~>XHwGp+5kmu`IkRl0*uKnxzJg`Y8m82L>UCcURkdryv_BRC)qgHK$O=b7MZ_S@ zWUIHMpZ*YWpA5H!D1q%H4`G;$-?nK~=4Z7Vz4Z+ecYSNK7@W2I*+a5xL>M6VEAAcP z{q~CSg>UD0GT7UYU@+Z>?ORHe(wCH|l`=QWUrtC)e-V)@Y(hddO~<`-e4I(fs^e*$ ziHbeYs1IHg3gtG^A8EV)`;Epo`#7y5qMdD8!bQRZP8E&5QjqHuD7Yi5!P`&9kee1) zU=>@Cvz9&(>XQ*6+I-wNls({>oz%8S{^97=XXd68DmdH1-3_}8Whwh+w8n}VMT7=0tHp4(v@DCW)_ra zh7tq6Fz6J;ElA-z*~x9MaS-3^sk#}iI}nkv2dB|Ef(zwDGsP{XCegFV(H@doC{#a{ z?jO_;+jl7%8>*sx*UjZE&)6;o;>uvh-y|*NDp1zP2!l-47uqx@2m{op%oY!?`5S|B>kp}9M=22T+jOjWYl z5kc%?U@@TjeTrvr9C&!4S(TGGH2L_c6>B3}@kGbvVy2iFI2=N=fqF6{$8Y|3uE=-N zk>~lc95}gXtnXb_X`0Pb{q92LjcU-5qu14hPzj%VG7bJ6mHbZx zx$N`D_E@Emlo(6*))B}KgE&;q>&6P^588sH3ebPU@LA`xmItPSLX^QbWK@WG{kw#k zUnH3&jN@zeIZ<=?2B#=PV&8_DTdW>NSbx>2fE^sU(w42=`C@3$!gD%nf%vpu$!9#w zl&S?Sarq}e8?0Ezv0{fEj~>G0AK4)&$06Cj>XXlex@@T!Q=eHVmNIFf%r>#<_<7r&uB-_+ErUq5?uxKa{o8@A1+MQh++SZZ6Q@E%<~w|lJ9E?{kkb(~7_ zPZG=#xHM0-&$g{h$Cn@It91^*_80s$I9U%RlwrtvOt@$|ls zd6ZUuP4&KRQK^X2b7GsJab@SI4=AbNiCVg|@U3^rQdlEWAO_S3pBc1SI&f%fq#eG4 zX_?rXdpE{uX}Zg4ldO4u1%LDm69>pYLo2%Jt#w({n;%Y1*dW42k1St$(q*tUOdBfro|NS(jy*=M18GHfe zM9oKSO|XB;43Y3HgF-B-N}DIt(pq=@*Y|XF$$02T$gD8=>uP-rPTMxf0KCd1@34s* zWW-r{-$X2vzl&Q+Wj?|SmXwlkyynzcbUAux3)YRO>7&07IY4_r!yXfUh(> zzIv&?v$yofPB^|hxGZukfU64a0iJ@^WfA(WE3VT!SXEVaIM~Y?* z^3u}(cv<``R*b#ai86} z;uV4@3}{|_)7jbJY;SF!GFpYjcj_d&+eb$5MUJ_JpWCNOzPM)!5h}) zLtl74`3e_Hxj(Ey-q?J)3VO;twl&XoSMYz7vZHY8Sc_oe*UFh~om86K43%1v2!eCt zRCm`*sO`^78>W_rS;F4!Hz>q^T7oW2f=DQ%*jpBbXPnx-k8hUBU363(lkC!zD{yt@ zl!ZSM$oh?jYz;FI0no<$wYY8j+3HMwBtJ**)=9N!@)Q-8r_|i*)PCtYdu7Td7hFUb zqC9d|{=-~+DQXa%#R1G7rAk!mPq z=cTHsC^EZ`XRJOu1VVP0WU~nUjq>&|ayr;;pk9DgO0`jJ5vvRfsLF%-6G9df6h6f0 zYKp7Qzxstq{$$ay(o|#43#=~ANgQvXXk$ResLIOXuGz^Qa8_JBFErFvjacm|Cz5At zmmvz7?ocXXF>Bj69ZvA?cr&S?i(}L1+l5$NSYJhcrqxNy)vaK2Hf~Is->3foPaFRL zoa*Djj>-Q3v(J&;rEP0Yfi5oB0x(rg6&yKAl+)AYj%@2aOTRn2AATC)M>XY5S8Hz` zgV%aBQEZe3IXFX%vTYKRH|LJVAz=~K^I~uL#IUk(u0EsEXng92273%6)HbMB%WL>a zsDp=844~Q(D%xB!RF_>Is~-ySnGL58r*GKg?<+|}=k9;5r)>=v)s$6sR|mg4p4Zin zDNYd%-?STb84t;Zc?wgc`Ec3@$m0?)27{{Xk}|BimERMD^)vsZJ`(%|D+Shhl$Zno z(fEeByXRdMaRDtgp4^H7N|T>y6Ov}1PxHClXBo_E>Z>pmsD1c(pFNQhvvD8>=5Wh; zEz6n5ZcOQuT44Pge;2w-^K`LRCh#9XQgMP6s@0J08^PQ3nwNoTE9>!OYuo8e_p0;R zCeWn9X^?v4kS?rLq(LBo zy0);Lt5Kd<`OV{*@z>4sxSoDt1Vn3A*)?X!vMCMw>yLQSiJm>4aSHfPVM|E->E0An zl5Ev*mO$Uk>GbtRjV7b>g(jVi`Yzli-B%C&lDCwD7!^*80x=CAVDk*vIH=_xs|S^S zO$j7A(QJvK?!L;ILAW|Tw6T6*oo@I$~kk(%H(K&AppIotY)|Zi?9a zyxR2|h+?gvhP$`Ey*(`MwJB~XN}sa*mR_9JozXg zk>aP&x&Pc~Aay#;De}Da;r$1wtx7Lo#bi2>xk=nqxlV2D9fD^CjFi z(@a-x_Q7)H=OfjZvZXh zd{25khIod&s(hMqrq#K$`-h1u+PqzQUj|c=T;KTcLzJsI*LbU8>MY6zv{b2Q{&t_b z_X|4^hTfeyo6(`^uwt5x~{C`0e@5&-S%MYWZRVhwnTaaVEVveca+xbRh#Tz&9B&u!C|Gelc;dEhrh6PWFd!=SvZ$Ub>0* zE~&}YSA(?ne&^PitzQ29Kcv)UgEF*FJ(BG|v*!ZEeT2{BKd_a!)LzNCsc#%V%ey*7 zWbClwhKX!t$d2L=D2-sEfk1?RrGO?I*xvJ`x@)d_sao$;IMf=tICRN+FZoVKstUm@ zlYBRJ`a*J7DH7y1m3dBIg@A_#g|Gq>_dZ6Wxd{0+6j!qtFy59`d{$+jiDUjWDJ!eh z?>)b;bzNGkHVf>wdgx|%aFqCtN9B>eUb%|%VniWDQ$ux3>=nM8p=c~lG1v6z8FcpD z$g!~4``*Uqfuqq*zJszuw6`Wgb|B+@Ze+R^{0X_yhOqotoHMEo=CjK`aDq(2&-Jb@ z^=97gRF9Nl!8EXX5tfD#me>p!+7h_9^)u>Bn|v&t7lu&GB~vMmqd0TIXo&c^o#}j8 z>6&gg+toaLAX3a(@cw|Q2|?#uP^t{G*;V;Atweof{mG*ud|Z7s?0mBLGy8`KI|JRt zqO3LV-BC6YQ>jxxsCru9(DS>aLQ!9~%<;F1rbSpcBM+b9)p%=Bxxmg`SoU-4 z{I_;!j)ahNHVKK2Iu9qQthbBTNl~lo2nWhRrT`i0tdFF3O?dz3)Bq(Ud<)Z3GNPsS zGs;L5g_&b@Rn<{ki>8#u8f#hg+>|=WiUw^(0EUX}WZ=CVeT;dQjOPMqk6N`;&H$zabUQ_%t#RMZ5^Cah!|M}m>VJ%#~l zV>HeN5IS+y5KI0$=j+>`c{R7#o>puH;?~v}Im0CqAbIree zn$l-~<4|*(j%)Nf+%z{bi<&L)p3SPNby!Y?jn*Jd--;-g&9gX+)fv{Ifby_*K5`<{ z8Pie?rQxG7U6Pv>f@Za1yQG_l&{kDi9WOGaeI((+2)?sabnx^?33`nTnK(FVQPD@z zcaf;6xj9$D9%hDiAdGXBDui8Vf1FLIR}ScS5L zE%HzZxKJ!;29Ov({7{Mi+~;0S{A?GO|1QtND(vU zdS>V3UwC*_3v0+v_-9yfz7#%LU>wBnV#++p9aE^1N$3$p23m|kNed*qxx zvQuIu#cA#2smuWEgmq?L;PFp5ss{V~hT=QN#tIo4GnJ!(jhDxraW$W&H2Xzatnw;4 zwPhXUIdm|MZ89{Llv&Rtr-o5~w39ud%>6lI$cRGuGw*p2Qvjbebxc`fW1>$xVRSwK ziURY#_foVa;`>9Qm}x)OPrixERUKEAXs%c~afj=$)|9m8vmVT@qZdUGW=i8Jts*3{ z$T+>-r}fMo>{rTJ3C9P)O~77yvGfg>yqrSvt=G_=BOpm$S;y?G`0ordaZhD#mpYj4 zrb~Vd!1^&S8H#eOHgL)RoFZmYW5zLeVRB^89Ju_48sSZnTtz&c6B?h$#;4lo%HV*u zM<%?J-{xH?Cs9+f$y1eCXd|(?%4`zof6K!47tJ;ir7aRmJVY-E!mleY$GHJdUwMPI z>g}mYE5pe`aQ4>1}s=Hk1KBWV*1A_x`^BeDvsaIN~oVryU z$7t-bxGiG1|0e zJ5iS)c~1$}q7(t9GO)>@MH-+H^wWl6Z5{TV!*FagO%+eBFHJwe;VsIja+ISdd_aoe z`eweSXfVdH;DyL!X0T~NJg4ybKA*tvg~6pkO_y)8V7G7gn|`wVZgjtF17MKjN>4DQYR$tt$|w9<`+~mfM+O z5aogcZf;i_nlstxBxN(tAyYTQ#2;wV`HGGGY(4rM!F2m!IYR+a zbzp!zBc-)59aPIBo3Ir`m>l_@5RNq)K{eK#28L$pCs@a^wIq|f_a+U2YEC)|6;^YK z^1u$Ttfb8l?{=vQq2N1;)*0boc26V5Fwx;K?81wkFcPBz?~A9d5`GlluUohlo(kB^ zCXBUJDKxxVh5#4Bf{<4uodCcIf7^C4!)usVtqF_tNa`e>Fmed{CF)?I8Ojl_G?06# zIs6asV}I^_7BJ%X@dtwkjq*?X>f-s%)70Qk1tt$|hefi! zjg!VHJfi@(>|VnSGWCY}!@%Q%r9G0yIbJLt6g|1#8|iVhsea9ws3}FgvZ*w2S1(pB zd9soMlMr_GC{Yl1>|*z;&EPmXO*rUa)>*IeRq4)eRkyti?y96nL#GrGLppWs!B$?N z1aFIQ>Vp+Zl3-)y^0#NWJmS~t>h49xZ@^}gV+{lO-vAmD{Sx0x&!{+oKIdP`Cu&67 z*!E9J^o8*4v5-+MLY1`m$zO4mg@tJ?Kz~qW9NWyeh_9|JMavmBMIfXfSE7wqIhi(y zd3GKg?8JmB_&Efa(%)rVld4Rwx^RAKS^HDbq83>YCK{`#T=aD=z@h_XH=Z>V7=^t9@5jCF9lG|+e6wd7#2VpEYh>21@u`CDn@_0f&82^v>90#A1z za$}h*3yA=!?`l7N=!lOanDh|1*ph8DTs}xgF^TLecfi=w7lTG}EYPXQ$!79{ij#G>$RH%B@9brN)Oi?E$T`NzL|N22Z>L zn=^?@5`e}Z<#b|ufn|iJiplm#%270vE4f+Ulw+Q7T{Nv`RmZkzR{TQtV*%Z}LGgLo zITbl}49Z9>VBWjp@7GT=^P^Jg*I!|4pe|F1nzGDDE-)jqggy(}5|YfLe(-LdxyzAr zeqhR+Ui9|8M+;xJEU1JsZM3@UF>x>V-tA$^Pg|y|+z83dBCc41>7Yq zS;u_KI~QKDsvosEYHoHWtj5ur4?ssHA{cIQ#qcNVxuS^j2KybE$Ln)96_z=^rAc4c zRGXD?H}qx>tTXU&r}XQr!lz3K^EtRDnh%hoQv3%Xd3)|h?_jGjSgksPq@uR7d;0|v z8k_mVic%!2zCA52FD`+RaDMmXvVMQMMG8h8r6@RfFl~YkN`R(T7uZ2fEx_0$kj%Mz z8VOwks^A}e%B7&#&b{>op)pN@8o$O?>eM5Z0PTExwG@4wF>00>fz+a<;$nIM#=csK z5HgBsm-;)1D|gqA()N|;KAJHCE&U;@4PwdlJS%toNwE|1lUlCh_cL3{E6XGT?G**8 z6W~fsFcKAW*QE{4R<<5ayRjKs%cggZQyujeU{DlB~e;23* z2A=egSB`w;foNo!K-#^0K#2g6+go$A`uhf}bOs9Y};$=717=dFX4IXiVR#$YwvbsDf?4X2}`544Bhjh2#(djTocIi z6~+{eoL#D@Dr9P?G}2+bKO$!nWEDB)^(lLueVOBwq54*&7YT%m2z%GOKJ(Y$Dj59* z+N}K62QW8VG+o#a#9*u3&5pvv^!4fhdxXXS(dH!d-Rvq$!otp!41le_yN%PM}it`B1=Fa;fPL?WM{yR^R={ z#>g(qfsXPR=sQaxg#pm(`<@*ODE2t&Q~=0jDR2xl)6clPqWXY>Dr3}8rvRBsm7?}~ zrs&(iIv+0S{g}&J^dFj?d6Y|R;KV(L8J=+~^Trw6r+q^YnKkH7o6M*z{0}f+yZ{tL z{=s`TU8vBGUgS2gxux&+p!6TN(8_&&JTFww-TVCiy+XG6B1I9>jLm;P zQxw!&BS$bpVdYLXW_ehop)bjLEg7Tety0JH6WhwvgS3*jJF|e>hldjPA`ht8wyK;J zq*h9Icpp-^>;YeUZg2Vrz&t#hk34q@Lo1Kjjr@omTyYXkK%ja^6)S8pAG8B1}9IQ5W+n0z4$bIeG>cAWvhp z63!%z$dDO`*4wI)>Aj*2lU(<%^QNYbcW4PB^U$9+fjYPx#g&YaO5VHq9gPUU+acdLx`pRFMfZ_H29DcuMHq zOWLH^Lvd*DROaxFy{Aw92wBL8t@B;^CfV_gfM+e2e!K zCI5R9iO~~bfVLe_sqx07hNFGv4e@~TO~$SFMYfe?lG%kX51cT}%|GhRD)Vj53SHuj6Nczj|VAg|3DVe`ztRaQ9H=i(zZ2+KKqS_DS-ltO8%=gWq7AE|o@) zMXveUOZy_@W`9X}Y>6iR+gD1xK+=l$udqiEr(gDmkF7HJhHE??hAA}8<2^cdH$_`y zCxc-kZ$E%2zB%GY3HiY2nq+-cBWU5CK#{XYf$hytLXKq>no)+u_96)d;^-QW-Oc!>8($=@vb1sO=hldRjQpv<|$L zNXj6xK=A$(uT!@6ynjG&zCX5t?IH715;<;7x5BXfdkv$z$ zGuPTM=58GWy@eq`V65>xI91_Q42r?p7zQdX5jUPYR^(%Z&+b4V(VhC9yf$O#jFMgj zQYPTr4@d6hNs|$^F8=e9L=tK~oFA?IBj@!GP5u^9Ybe&eMp%u^;!Mm`bgtGG1->>U zMdWT=WjfX*NRyl_*0&zNH;@^yY%AyYS+Oy5ze;{bZn4GnKR|Tub7rc4ms@e|(L=Jt3Z+9yov9;n+s6~UM&i78tp=P7 zuD3zBtfPR}#ep(u7ER94tC_3Xy10fWi+P0snQ~gJ68S?jDhdD_=hvry713ZyWV5%X zhJ4G;*ZPDJR`PD~MRZvarPi2>ty=!u8$EZ9Z&lITOMjBG=a{vEbw=^iUkj&wgd`?n zttJm`_w0q2n;RKEGHcH2H_5BB#o4qHsyFh5l=n_z{y9aQhlo~psq%=)J^t_%0uGT- zKl%7;4gASCk2pIRlJKq(D;7M7WSdxCAzd~X8S+@|7FoDIv;TBxRGWUoS3SchEG_Xw zped0h?DkzW;2}`S(c#ow-G{ZLtW`W|6qLC8lV7RfEoXm%z^lEmqMP2?^}k#??-h`R z$1%^ai3TwpF=V+_3s1shc=$swA2}wE0Xhy0oxuX>;_De5Uh!@oo#*N3#h-cBecjVM zXW7S@|0~Nu`;2D7a{TDDrC-$8^RS}0L5sXLM|EeTdj7g`r%D*nEcWpp!IX0$_DU~4 z{*deLb%qCdNk<{BI?#T}oUR7WAlEbU@yFPNZpSwa;6LgiqNvm8u zWS^41O)zPCN^I3|YxabPmTR`gkH?U~w?U=;rB#g0EyPuroxwBQJYhjrr!(zromVbF zMY{Q0?en#XIIMW(jZ{KVwp@DeB2Ri|P8;F! z4QBhhl~omv>;ul=GVC#>nTBn*T1@x5q@x`E4<%|=8t~`JKT$N4E~Ig}&|us8e%u6g za{*NVUjuR6&$Zw!Y(mKTi)5!GiJU`i`xtF8yY_CS#yLHS707<_nD<8$&~jwTISs`c4^-tS=9NfxFA5+H`h?lJ z)$wfQu0a3|WR&kA^sB)tO!aO*aHG5yI_%l1rK8GogI1mY3TvA-zzIC$n}};c%Hkd% z?p3mUOllGs6{Z^O?8!jl&3~$r=pJNE(+DCQnN0GjYE}-MJbV@+PFyx|w`WMH_ldGR z!F>-i-G&8BHun0o%K_zq3*9V*W@Slp?GdO`0Dl@zRdvuxc{vYaUo}r$Yhinlc;@x$ z@nWv@hG}ZEVLhT4{Nua&Nnl49=FI#6e6!vBX5VRj@k=UWUs>yItax`z@g z%Yl8IoZG@Dv7_ZJr{ap5`fBdkxpx=3qP(MqtaPo+Ust40DdE_&#KFPyJX1X^?Jd=G zZTAD34A;1Sa`KIqLSBot?7W64oebC19jK`0>=iv!6tGkrfm^!J_MBWBG-f0)MQm4;_NUBHF4Ak- zGbz12rhJ(7b=D}n{!HBUYVRlm2L@Q*hOPq&)7Qt?>!sV*cw(Jo09ZWU6#eh(R+sYl8ZXd*1GafbF0o$nmsg~ zI(*PcKBaQ*X;Pi~M4EWuByi?q;@*#LX#D53KImLWoWjQ(IB&&vNxWxUa`_E2VA$mY z9OBJiL40-||9wiGdjjZ_ArU)ort2R2{byQ1_I=9v?6)-+YduDzdgcIU3oGh&I{(At z5tb7nVAfXw(?8`=Z#98ZDg90r<#a8cpgOXVRk#mn@ME}KwUB`sQY@6_jR3K6s(450+*X?jo2IL3k$$Aa>wdDWk@flIS_S>lx-lw2K)6s+wEO0 zR$M8!{jQk0Ihd5fdB(lVp)cNusbe(MJk?1&I*_cq(9$i4#N$z$!*4(o1Xj z4EpuEP4@c*__gkx1w|uhd0ge*&;UwXM|B+I2w*tqlaAjG;{?1_hB8@vxmmVYQQ`n{ zZ>XYIf)Y5gX1!!M|2`l|)&hxx;?CESD<0bS_&%TNqsL%0c%Hv{7y#vcNpB;@@suX> zsj$`5D}u7qR7Q48zJ{!Q>Pv(i8p-S?orzp5x1jcrF(mqMmsm9-#roHoexBk#I81YI zaYFZIMG+ue55#gci-x4=PabA!c)Kb{gc7qSguh`^PXB$f1c%c2D~wdQUOWpkY8t~S z)m4;VM=?LCXqGpE6BGl2M&OWXPtI;qrfek*Dc}`z(V=Cxo8mZe+_LeP!AdeLP3(+z zt>_7=#>frBN0E`XaNb}%B7S4Y`_QOK5$YV|7`m(`b!wbMUqu=8vzESET)8bh!m3G; z)*atn_+%(aQTVLHfitR{taPfa%j(XqnWuQJ{)E=T!k0n@w7tElp|=Af@X?Dc+DQ`L zCn`%$0|s9K2oJrgn-|>vZqHg|L#{#p0H-rYhSJX_1wjC*7Kn|5^WCr6Y?OPIcnc)? z+-6qm2)+#y*trXOu{kPKfOxBe-3HE(UEcqa&B>av)p=t;{4S8nc&oFyEaV;a|K6dB zO#cau^`ILNaS8eBS>$zNCyFqyYfh&9%!g}gB+2_xHdspBF)Jmp&{eaf8X15%IUe*% z>|O4H-@L#df_!DV`Ue4G(b6}_>8j!IegeQNe3EbN%gur%lKesQ&_2mEe1#{n@Zg`R zOhlGK>I=+E%uDXs*}`u;uRJ!2(Tp@B$JC!6e|N3ZOFt4Dp#%tP;3IPXveko1U78zr z^_kMtu~Vb}>>XcDZBe}oYp@n0eYnGa<{sz|cII+%G zAbG>oU=GqvdruTvYqlDHRQA=j`CsZEkzf*o%Bqyr0g}W=%EE>2ldJ-^v2FvQoOs|V zLsIyr*4x)E>R#uUgijjQ*8h%f(B-druwI zgq9wTwIL0xDRYgpebv+t5g6KF3l}UQQXgDDJYw7vOdi+Hzhkip{f8RW)vfdLc1q>D zVPSAw_ej)T9T`T0AzJWTN^Qu2CpvpwUQs<=%AZ8*^sf@3y#LS#KV?qqO}aH8xFEhl%l`|}D>RHzaL&#E|d{emB+6Gv`Kr-!!}f>F}g z#Ym!l+VAurYZw%<&_1uFLm)e$HVv8fI%BAswg3_IMlrai`a8Kofl7h!!UHU1?!(nI zg^^+|s;-W7pFNImqJUh;X67gyOSGOnMbssAWR*Tr!BBTOJ?Wt-TwzJ#{050aRCFwD zQ(M;z>@a7yHyBhlsTL5Y|HTcfQBhh@#_wPvC-3|-PWIF^42awugy%+n$jhww6_A!T zFDK_2tvfyVM^n=vk;IU3BxZJ{fTQ0t5$3zCo*KjERu@JF^$Jh8-~9do>t*(0Z~Mm4 z$L}DE6Dn5Sw`=SVi%nBOD-NUZFQ}L>qtvg>>Wa;OXBGuGwMuHlb;zoA@ix$?>s+?C zg{uU)csG7_k)~W5*d?#)1gO9;`^opTZ5c`yb^@%nkvVdj{l^Q)_9y=G9DJzndmvR< zL!}G4CgMad%w%iUzc~7u%rr;R6YDqe)EB3<^Zn7~nMC+gV{G-e0z={W{80*{ z+U5>buw62hBYAWiQKjWeG=CgAK%M~0Jp|WfIUgZuFJg|`btk7E2KmDy%j`1 z#_${%JKZ#p!b4fAxW?ga7d)WPXifYNkfT*j9D77FICSljGlEGjPA(Kb*XYv~p!MMl zy;XO~WuA~fUb@^SuXsR3pX@%Ka(xmL6YMwl;aU}4zoFpqqe7_?AaIP|(Ou*=>WebRK!D>gD;N4T!d|W3^W}xO+KsDU;xY}h3& zlOoXe1}BIl=AC1n4!31qZdCyDTpF`-2gl%keyQ839NY+8TTxK;n@{^~Dhn;iI88_P zb5#8{ZnvSTU(rR`pH}@wLN!O)r$Ti62-%}UO2Ufl3&E{zG$;Lrl~m&HXm$H zFG!iuOMa=BoIWS!v~#zQkuXG)nJ&HMsXw6(U!E*Dy1fgs0g{t9o+H*1!rqRB2c`0q z=WGITrBaNUKHzs|_3qF>g-5a!XMwnyEM~{gWArU3I5sVVO z6Ov#M-RQj=y>~%E)WK*WdN&xomk?!?=)IRAqDSw(XMX>4an8+L?TcA!ueI0S@8^A= z2l=khJQr(@BLekNDEEYtrxFxK<8{EPtrwfkgf#oO{y|ua((}^YDY_4{N%!7W=`MG& z4||r?uCg<=%Gb<}Y0!0Y$J%W^e|aBb@b&cz;B$+bI|MI_*c$nirl&uD=iiv1?2{QC zfB(B>!5Cr94{}^4fpG^#Ux5r@x%W6;PpaJIcgz&D`Axbg{CIIBy%`|g z^Cux@nU}MW@+~=+kVta$m19~N_94jSV_>&p7wdUiUI95B5`pwtCq$SAv-k5qg>iGn z*0Q3Ckz>!Cq(2qMS2tMUMDS3HqDxbC0T`#r_5JLTgMxhdd!8}zo~ARWpDlNZeQTUyOYHw z-{$MPndy^{Ft9Yj{*@?(C$J&Zh#UvqMsqZltEq;{ZQNIxJTU}PpzsVe`?44#UU4mH zw}`Hc0=UNjxL%Scduu*bCs+(5W7s?K&(3G~ZcH|(vstDfj-4lYQRjf9SUMSd?zDic zkDiU+3oA;+d^bv>(wAU$Rsc0Tg7_}1V6D#EabKa%L%I$z%%-&HWiU zZnXBX6ym@4-gWm6Pi4K^IFQnEZ89u(p3~1+SVgiXbdxx0^B5=7*kn$2;*M-jfA z$+Kr;QwvgzF6&pTpHyR~S5&)dtuxzgEpV2*N zP(sBpesre@C5pfgx*m|KkLl$+JbiFdXj_3f1R^7Tkdwt7y_84*3`*!G?I$fGf{5~G zT2Rp3rIn=-p^I0ANnbwnWpB?=+J|Ak63xlbor*|Q3XTO%*jbpNM7l1Jc<=xKlG0ji zJ=M=yM5V#JqTh;+aS!QhnM1`)IkGYX28iSIaDxtW`N&k`Th*LP;KSMgRv;ZC_|{HKy;1YBGhXC?;EBrHv$zpM`Gd zrBbi{V|~}?Y??9_uMz-?S&r+MV5|TZPGseV3VtH(H>bu7$XySSFb}5P$1f}PfUOs3 ztZqGkH%BF>iEc~}XS;QY?)gb?7Q_4Zb1F)bmKf-q-#;N@c}D_#D;Ul2M(#1+1dP3r z-{Oy*Tnd`if1OgVimcF6ehv1)RbYz^k>3~?qY2+(dB_-(B%LToH&Xn@CeO2*G}pPP zY5KmWp%m@5rwN~pGR&GFV{&+0SPsBzNwc7g zF{8$GW8YPxi6XeF#e4pMU@h%(E4t-O5{5cmTR3TJ6kPaGQ6m0&M6=I_9x|a|8Tpf@ z>MDo~QM<#kcXm1!nl3Zt2 zNrwJ@y3Bj|55nV+b*m6D$y=BTtiuG|j3)fr z;BtRVw%aOVM}xpiQYc1?R{PXO2w}X@6Z;JJOSklwFJ)Yu=4I_aSf!5akF?!?)SsWC zIos9Ac|V9eT_)Me@q>$PM)jA7pWB-Jh!<{<+IxCvRIXP0i*uG*(;DvYC%ak-FQg5q zD2jLWqgvn5=tL#v{6qe`6=1i*f zYWUCU@U34{KM0rCJB5fX%ZrJ}Tm<#6$z6XsPuVLjiW3sb@b_U4&+#m;k@{^FW;%s! z@!%<{D2qE8eolH*xItB^c-`*Bse7bsE{MBo&1EhzB5w#J^oX^L^_fa>8fpZ#uw1fP z->0R7+pM*!R3Zp*@G|{<4oeR%9ylEvCcT3C&)lO|)YKF-Z3L&l_11ySQE{>^zN6_> zQY{$q%UzAh*&{e&+r3pw&XJp<8wTS>)CU`Nzmggt+%y^}YU9JodB22fAPbOzM9!2# z>9DmT@njvtyvC2`2Zy|&8|3xr&km}VsCJUFB^=^gov-}!^Umy!DPfARvI2O~dS!-i z3WY1hP&HSsE6y0r{~iESR_S|nGxyGhHh2$FiqLDr}1C%g>ZrGI<#7xBgc1&5&Y3@9 z6?2BiluF{oQRV_uIwLP5gw&DYDWQvb+61EjXg{yu{0-pWXW3acH==j+^Wr?$DK=J! z=naQv&%?#BX%WLpP{Z64XX!OMYLp+HMQL1b^kn~niyiQ%+ctzHb6>%D*=a7gsdMEJ zF*7LV)~sR>C-p7~Oq@BO<@|^KXtS+uR3J2ykPc1M0{REQ9E^XUHFLhk`46zBx$Qc7 zXkk5VtSjqLH+_DRpXJ!tfpri?M@8)_es@0mA$^@8b@;}|LZwZ(v_J78$W(P&?;yD` zU}my5e*tptoboF46QUfdJ?$6z^+;aw!nj$iTa50ji5#{;X!SWt-R*J3@~`ifzvYLN z!4&z~l8XC(0puQ;XN5u#Bg@8jx_HVs_Xn69c+%jgBHH=p1_t!{q@n__pXB%EFcYy9 z-I-H+1#W$3TUD?7+rA8i13*4)8}JMo7%f0#_23)>+(j%Mgg z`MJ&qW4)^<_COBu3VxOCVKEy#M~C_&>ru$Suh_HlC&u<1{_zDcl$-ifqbh6V=rN^Q z^uhjfd;W?F`H#UTCJ-(OJ}r}?R`CJOeHsk#T}^n}5aKhB;uWuPV)0r~ni$K3-*iFM z9?ov$GaUy0Ifq#07WE}f$yjQ_W27QgQf5}c>&eR1?fIhV*29NEQ)Od+a3Dm zEKV+B?>e&o1LP>lbUjZ2^p$26^o1Ix-Z{T;aECdq`kW&Es)L<55r z#>b%l0lMif<5q`*{$`XrOeon|hUF8Izh{3vti_lZNxbd!+61LT>pCtkue3GoK-^Cq zg4rbO;1iAe!M>!{(Zq&#y>J+>dUIp%p6|{)-?l1F-U+W|;8`H?dj30Xv18 zjSt7%3eK{Cxt+`R=%Xv)r-{l+!_dQHa_*-ox=Fj2UqiG>%5^8#uU_jmNtn}FyB9Yv z19+Eg884ecy zLk!0S_GWjH2hizGCsW46?kd|wD%Qcqh1P=yqCV)jJ03B zBuLXQj7DGBiPHX)7DHeC2RJMv8|V#1yrk<4IV;Fs8JqW;i@p}ysF|l1`Xlp*=?tTd z3%Mova!I?-Iz~%&>s2oOubXY0T&S9aI{Dc5^ZND;_s@!VAC`NI(v?;bB_>p#Ekm~wayvRNJ4QYRObaQf>d2U>olBtIa^XH zmDI8Sd=o>i$~1Z0I{t-i*`nmu^9)y!^Q(-3YM1l0Pa%U~okBMB>{bSQZm!Rn-?W^H z@|T5@rv9Bk;Ji)_8PeCoEezwY5Ix+ld_-vc@zZJleCjf0T4rKX;Asw4Ci#shF9_i$ zrL|OET!Rvjc)4^yF=qg4>*azOMJh*n(TmyrZQ7Jq=Pi-#A;T>e&q!NWPj9#7smPj1 zV#yLmGyVIEcER-H!XmZciTY3gKUD!FeGrdJEtM~G9YDy3qBuGTk5g0{l>oYm(G4Ci zz2l4HR4X5&wWs5I9dh^W9be_t@A0Xd5ZhIT7olY}9`>Bk5ej3+bGc`OQ+>urI0rC@ z&p8s;yG;;IYl{;aWo0DHFE;vQfUe=Ix2?}_j~*>Dqrz%RD;HlLY1FnvB$2C;)r%0> zX&X7CbN)Zg^Fj!EzfqyB5Hyns2fPPnOR-#$~ zWGO@WF7#;F>4(|!k}4q%+uGxQfD%n*4mRx4YAEq|`k#W!^5jWrRp=C0Q`B8*6Y8<& zV|%#=wPm>%^_*Qke5)0EFO^|z5swiFetNokb@nz0JH&F``v29@c-0F6UMe_`>jHM~ z{_l|D|4M3n8ZEERsn@Ypq3FKkp(Ql4&a(UGRm}Ctjf&<2nuwY~%1ByF;DO@J_KpQ9 z{4)nqGvhB2XL)dT!-%r3 zLv)1RJ8v$e)Hq$ur}@F~2v;02N$(j8NWU6T`hlm$u&8xB+F(K7v2I|O(Ppf!l~Xj~ z&AK~4GLsM=U1#Kd^=xlOk)1p0;b-}whSv%gH@JcB{GRUGzl90oOJXP0dXnj=l8iSmZvmpMMP>$WsYM9OkH zSsGK9`>l!|xps#i7CBNy3sY@9Nr1mc>Ku7InpoV0scb(bc{+Is{aD;=HP|yN2oqcW zWy@v>>87#m572AKpy}(UG0A*kT~b~e0e@BI)lBi5^fmpf7!U&& zrtxWDeN8(XqPA9o;#X@vgq#RvP~&VDixXHqoW%0{sQI_Gs&L-QGK^SZ>H)-a)huW2 zAq9_|nf~3Nq5QhF%!P*;DYEsYx<+QNV%e!bT*A4{S=c|0ziC)Ij0PZ)@t=@5_PVUmW@N*bcv*mTcL|`VaTQbqxgl8{?QfS*$<5Da6|ROg zd|UY0zSFx00ECa|9s+K685Em(NB3IewWcDBc78g`x0@#}<5f|&>>R&asuKAU|E-5j zlL^CqaaWUNae`sl`0G*8-bKWgeZSu|r23L1yGLxC6Ee3={_Kw^CYH_u*=5TXiXHDc zu?EnU9M3lG#B!Y91^jJpQ2;(AF!m}&Vepug>=t!DWY(5)p|J;qxY(d5La{$Xw^L0F zBRX~U$$;}1YO(Y|0FTEYeY2}IllRgl zWpyPYw*}3HfBT~H1-mox4t?RhAX0F(+r2<^S+Q%jCEuNNYm8+^RU)X>!sq$#-`H6o zZf}A>Z1(kRUDx`lV1B;jyC*|@`=j;MTUmwlPx^hQqwP{en21EpE0@P zKIESmZmh{o_qivAbCBs$n3Ynm{k|;5csM~F1pvKBGgN`Gi@V6Pq_T?Vno9^%t0)eR ztW;L0`B(Kx+%C(Iz+b#lt0IMp+v&dw##l-hWo$vXghbTmw4|wpO;-yW_rrf)uAZ02 z-T4G8EXD1&HM)H}%xZU0LJE0u!%kEDH9FI7$?PO>)>L2q#=&XPT7z)F={&c|Gh+{L zSFacY8%PfFWKyzaXg&{y);n+E{M*qR*6wEkg1KxFxbg6S$BL`*%HwiHn)U6-F1)12 z)kTWw-X~EqKv~Sss&l-5ld*5!v5fUH9G}gWNLtZx%|kf0aqqM(X-|Vq3owOV;6Wyx z*O2pTm=;si8#d_-|H3tmjg--32;{OdL%(`z0tM{*Ge3m4(p}9mu`;h zMb5tGYhDkSVt^Cv-AO5P|JIv>y~ReP948)?{u1S_N5R!~Sc6(joX4LIP)SK5;CY42 zN6TzsJlLVx))9%HiEPBAuAaTKx-!L7=`2AeaZvUeP_p<%Pq>S{*=u_<90Ii}{M}k@ zB0RhGK%p?XF%})cAM?=Ygv05n#qz2PEj@cqyMw;81rB5pxgyP1Ig4JmmULxWw_`I` z!EF53vMh9UOIem`N6%#rZ)=LkNGvg>?C$P9HsiUZ@H&u>=$&dc{(3ci=IviDO6v8X zZ*j6jZ4qKS$8*&b24DGsL;S8?K09;|0&x}y3hM+0Ki2@aoVupsjxZ+BF11-mvr$sl zJ1I!gjG**|=c@r54(CdW(h^P%DhoW`3#eqNeE+k_C3gr2T}^uD#k%*JfVCEmutRA> zodln9R=l9JBesw%lP4S`G2caWZ-+r7A97(VpxLng%(8R+QoL;Rx%ceMr?=BC zZ5Iv`G@1W8ZVpdol_GJv?z~v$`|=fOU#$W!!M_WGzf`P}F*k$a`MkG+?qeTXM`Q*u zAs$O6NBBu=QvW=8Sjq%>&(lx$VR>wcU&aP7n$p5#SN<>&2Xi8=X^w-www#}uj6E)& z=c?3pVPo;oj^_8KPlE{5l*yGlJ{?X7L;Z}W(fo&OjKP1?LZn3Tn!4;2B5A#>(Rd9` zYE_?ygcDX2>0a2rBgonK4?xN^_07~{`bvJez{wLswf&QQr5U|DmkfV2f65&(FLAs6 zBKD!+(%!(*=E(pHjiOrIhO0o%A&pLE>C@5g4X=5LiKy=ccg$OWZ%&I@nY?ZEah-YV zcxHzl{dv1QFKA=QhD{fx4<%(ke7fY*KTK$lNoNtv)^f1|xgKwoIGUk6&1{&iXpEd<)zCO!$8TouuLLz4W&Iq@oQ{1asXEaR7Oe2+@HG{5; z?kkhcC;x)*9;Wq7-fn7+qw22gG3X~$!i?OX3dg0`;5#OxEAwPgwoI~YcTcv;bTStk zX8fR5iJ#{Vqw72IKV_-DRRn*uH!diF~{2 zBmOMr`X4rRgKHGuQi)(I43=STWeia}bYzC{*Z(WhEBw{VpfaQzV*h|wy^;+pNUO(MvPfCO=+(j&MmO{gJJ3J>_g8JfrXD6gplPD%Tg1}D&F@J zW$_0gTK;N1k;<}MZv+)ppUq7W6q$~A0eO<@8jYx z)M8AIjP6A!vL#0dvWcz4?pePsobY_fwLGF5p#LfgQ?{4R@uoBtR*Z~}U@uCTjABVi zPZW_i^ko`v13)eqdvA+SoI!c@8W&l!+lp=iJvvyVXta*?D!kT-i)yertbIpJqJcxC zN8hJ18oV@@qfU;WXJ_fJB%m+4@M&VO$T|Co{d(6tX0V zt;#HsU1zuLa9l;+Fd@5amnW-U-=W;; zLG7?X+j)XUr^t7qafVy)>y{<(Fvsgh*w6lfFlT20^sr96hL=dgH~6l7u>owhJA<;w z+BR-8&E9UeAf;Lu=MTi!6=E4dvGV9o6H|y-V)ES$%eBxldt2`eF8UstFi$Odh`S0JV6f*dT zAj0pjtCRS%p+@oX;{T%jh8hLnJDP??v#FCO6N^rQUdaP3{;jRtC_9 zVTMWJ?;kWcKryV5&+aE^AB!hf{=LZTEVUcnNm%I=y=#E~!J}ftYa zQqil@16#(7LX%ktU7w9pz!mSuwaJTWy-|v0e)RUAYFlh=25rO!2exvICFlzhs-Ifa zT+s#yU>+YEdstZ?f)X?*44w5Kew+Vx)y}zQTZYK9?RCn44jo;83Afpyc$97;tnfmD zkJhAYPRen;-3AYSk_39vjkiq=zfb_VTgZ7?BbeJl-#_CU3yl3I;V#thfeaqx+wV6; zV{XHQz~>GF=BT;4dMtg}FHB+rggn9bUVP`AZ6)J7c;hO1e0p4bgOL&A%nYR5xU_2) zg$Zjn4y+{8mWtxT`u3IOY8Qf#wezh!2-H*S3^>MAgR4Q{Q+Js;LVvy@L_QQLvsmB) z$P5iNHVS!pW`=s71HIYnJ{bzDZR-`!a|kONp~Iej8E^GZIfb*AH7U*0Z}MyriBWf7 zOt9H4FMRoG=<|VFz0rsTSyk&PML-AaM6gv^>O(b&el++bfm)0PAjSnOEUfY3x|o-yT#2y+E=l+<*Ee}fzsb}p zo}B#;&_Y<$ztQZL?b*q}_eLMSs^(GLOZW5h z5OG?-a#5#lg=$O~e|-Fk`?Z>Sy9T}gU?6W5PYe0}sE)bA$RKz<{=D%xnb!LelL6uH zeq+JU>vulJa$(P{n~Yam!xrm<#*WPD>l3X0K>h>l17UvoThvjKEMj5FeM<%CTpC?8ds#$EJEO_$H8yO!r)R> zV!qtE+ylR-Ji5s%`^I+bk>yX}5r1%8W#}x!l^Y*L>oBt0Y&{-y8}L1Df8YRcZ5yxR zq^<@e24U#Nt_~}ez6=s=?3RKSvC|#+vMmkNsW`Q<7OaP}+I9L&w0q2*kZ&0Qpv?lA@G6cWNYuC;wS%%|LY^__BUY|UOOYm?x$ZP!0jsU9iEgj9ZNdKr;e%+(_50VG^5JBr! zCWIK-dLmT}7jFwU3by8cSu5yH*ZA$cGs>5vT3X zdi{kCZLdE&BfO>zF?;3Ka(s<9fYPJ|%QCVAh8FV1v+i@2_|R!|Sy^d#hWH{3rbk`m zJ3W;<(D~3uAi$|*8n_)@zn<`hq)_`0fo2)?Xswg z@|#!Tq^Q(|_OyCsF2tr+VsGTam8&*;zZm|j9ZAQXeG+HH#zy9EAjN(;(u%8lT^TBh zU2c;RtFzAQbQN-N_`ZqnIlt>#NwPtKVEfD*jHK1@WN9gVe>}K@5#6 z_h*8hVMWczjn@w5->vXk0^&Zk22z|f6@LhAmQsZre0Co${TzxN2;!S1Am{_=b+tHO zNL;T>k?g%ZDjfi325+b7VXpfRD7V*Q-d6rE_Ud)`{{k+BGJykLf^(yX+l1>J^vBtp z>w*8hQrf#6Xb|)t=C1!=?lpx*1ciPJl%u--56}rqavFPqZ&tbNR$hlTBf#U~i?m#a zuO-jCDYT`vJ)ntxP0M;c^SSMB+&>q+5SI!m!X}b?-XMW2I})N&%)yR+IY8Ar5grgI zuSj@RW z^FSv~i+(>}S~$~Lexos~3&u=KmO!*O%j4Ux5NHd3XHtALOD)BvbZc2YJ283Qh~F^t zn-LX_QtV925Z&Tbeh{*|#!Tu@qq%D@~*Yfja729`0|dfC%D zE!^!)0~Md9E>6BEj*iI`=5(ZZIRI+WdG)eIT@z43s7X2-81~YeipwM9S&Y#0rm3-j zmYI6>ite41jvLm*+Q9n3t1V|WHmYGhJT?uEKhtA|f*UE`Pg(XZQfE{YgG+qDcJg4W zIOV~RnqqQcYrWdU*l;GFfF+Oa6ch276NbM-(a5)8@jY~QR)xso_rl`hX!(a>c2Hqa zX#CrwM!NoKD;>d${#xafU&w8cG9U+rr7K6~Ll>iRjM(v{M*00l3nwoK){uu@+PZtQ zRT0_IwZ*u9krOJkZ+ZR=;jk|7F4Z;jjfpa4*8jeGVjQ&9MBx>e5C4%{p({X#eT=Q^|6o zy9ke39)1~qwTq3d$Dp%ff8oT8rmP}se>AE1ur70tYolc6Ik|bdu-L_~7Pu+|C#9Qu zwP#u|%3<$mN)49E5nT&2<&AYYT`oTGx1~ml9*!3C&-T@0%7gMP2hsHH4)4HPIHjjn zb{`!19fx+}J+l|K+|C&2l$ri5l@`}cndDW}X&Y=6g`x6M)LXuPF)6H$BaQs>W2`A* z5m)Kj&SJeW-A^|f)w>c6U_7d6({sq z@Ds)_w?fXQTt2|ZFRjKZE-JmC-65(sVQWlKGR-~$%_A8RWdSa}P!`u0U>rPO6jQo* z82c`AOYi7!m^ds7@>Dz5+&m#E1QUXwzXqcB655=qYrhoE5eiY_A&49=O_wT#NPBD> z#k%mO=)dVrm&*$DF}I5Iy+^g_>(M^%iVb_hLNuqil6(mWY<|eF=skk9bD}AfM8N|U zsN64M#F#H-KjXOtS6ODG6|JK3>X&qKkx4B;AfMP(i&2UwIuCTx3#|X5!UhN^p~7n{ zp%G*2?NvrP|Kipsguz-Yvy0zg z6caHgl`~kZa$`R&}xTa7IXoYcm?m0e&UU{X3tv)-MaQli}yCMg_{;I+~bD zlTJmXvW1~ayg;6V>Fm{X`AS@X_q5xke%Hi`JDKxqF_%EQqErVjR%5x^e5Ckol~ouu zN3XVKR2XLpe~rCH`=EE-%V&L!j5E5MP$6#0sOqPm1g9Gf;{>7g_0#A3xNq!#I|epf zX{XAIy_X$TTxovtQB~`!b01<=++>a98dd7Yov4MVgz%0s#}98+IZkSAWv@D1q1kQs zOb`*&%uUectrUvM?^4WhTU_~E_r!MW0&Dxj_on`q8(u@jD^pn??G7o$OboLq)3qS~ z!hhh#a!b5o3Nbt77@c8ubnbR5Rg0OJj3HGCz>1fbSrnPM@n0s^ugj@Ia|XP3fZ2)z zW(x$3q582!TxFe8(nTGf4Fq!iYxr{v{F%@XL`Pmj%@Mz!BpIFQmEFL zN@rmtGA%5BTh#*YD=g?rlx4mw%k(`L|NhC5-!#2r4c8VTAZbmlgAc86p=?<i8WUX zB)3dGYTDDOgBoq@I!Bh}H`NAck4)BE+PlB!d>#Vq<)xy&Qp**ez`&F}PP8gqo-d7X zcfzkUAdh1}X09-sPc7Pbfw6Fm^qG0B>ZBLYAJ}r3qALzFDC1z)&_S8uK)#m12%S22 zEuIN1e+hB*;xA+M@^l)eCn(wMU{LN;oc4KY-MOS9An6M3krmH?rNdHlKcarNoZ2_h zU28RbGFNqPz<#lO3ElrU-PU(h)V3_Xc_*JH5&Oy@`um<`18@Pz#SAG(W{+nQ1<{5d z36#3muz>z5vgSoJ{16Ucw3qHBsfe%pwe+4igwVcUb-h z7?n8)7SCS3=PxVV-H+Sm@gip>;G9-ek*c2>qhD0=Pt}KRFHvikb}w2nhT|v(aw#nl zbkgXwtn9hT$2C~MRjRbtJ!oFclf;b;s4IAbi39LAHybEDACSaOXUja~py%$@)XyaU zFc`W}o3-0gZG|Ry_PO$X(b^_w#zHaM;wam0jluY*Vmm2xbMh{Nno~ryFQ35vkxGT;|$-3t5ai&lR zOhsZ)Kg|90wm{T$Ari@3xX1C^bV8FC*1HT6e`&Lt3Bzz=d95WG4`kli(a6qSOjpk8 zYJ!>nl#P*|jn*}GG)~B;85VR)eJt;cj*uTn+Tbex4|_m;RCTw((0e;Pp=hU8-mL)s z(8n9Gph9yn>ZFt}KCoa7v9G6W_P**&?>Os~maraYU8?l>|ReL~U(){J}e*h?<=;#cm zy?;jPXY7v|C{^3HJxsD5GNU6%J#0>)^d&O^?It?yJhU%w&sAuMs{A)8t0Jgt0GwSN z`jx5H;(Kw%EW7(xwWvWucg1mH1zZ?MRyLCx&DWsAO9c+UpShyKSqoDO{Qga|M+gd( z({^i9cyWVr`^Cu%NV=?M2rka1S>5*JH+u8Xt!R^(Fgw4m$-u*%mrDF3vN0fyQCJni zMde>%yL$SJCb)N-K|0Yt#zT>BlIKU*&IWLG#K}=$LdZ7lrFVY@8?e)y6x@7T`*J;n zMY>&B@On;zZs^W2feA?0ig?4tm-^BZ&9WVVcO;&)W?Nt&zT^dLJ`_yR=)K%aFSW;~ z5UlSWEcRWL|8(f8Kg~Bk`kFk<9=X|Ac3T65|kOj8Yz)UlLSZ2Hm z@CMTxyW%WFSzID?CMTK9TS?2sBIia9(B=bBvaqc>Hc_#KRyn7E%iAWnf7$KPhv65L zm?2TsxkDT*sVpGtT35g*09PX@Z#O1W5U4dR62)3jqGV-Lt(9K^13XPGCAr^ObvH~9 z=$iFul}>1rbJ0Ie3z_yT`&4yKz;4P700cBB{r1T58?@jR2od7@GWGFUp>MRf|Hfgh zCaG0^2`m8m@!9lW?NOaZIJ99q3@OGYNrx9HYmgahfMT61aTTlA=gMw*Nu5<2*D<6#*=HBEd_R*=} z%A8U4FK_EbJU-?G*Ufd*a~HK3`|fQjd+_#4em^BD*%nePr&}47fbE@3i#ADbd^^Pq z?&J*7X=X;;ovZI8#vf#Uo4I9lcTGb-Tn%cPq^3> z-+itzU}rZ+^k_k~$Lmv|LKOW}E7(cL$2_TZmeWDUY(2Q}S#ce*)k;$iN-DREDREk| zEpI*09}r!ki41Vdw64j%hl$Kij%gUv$@SZ>()co$l-SRwMB(CX7at8HM(P6aQ@%nk|YS6 zIlK5Wk=T8Q^~IpXH_$q{yxVS;dC*>VB&wj$W1^|Jpx{}Jvd|3^`74jqkEhQ(!pFp@ z0RM8o<2N8?)u*I_J|$txW@?|T9V0Q%ev=8@4W%YKlZpnF{jGiv@h16ju&ThhPwpT4kH9W zAtCJU>;uF1!X1sFn8CWt@1Q`+r4GbO$q!oh|beBJ7pn1;n396 z`>1CV60>AwRl171t?NpX7s^7{O~tb1F1YWK(fXqR))DO!=S=ZJeTEsC#Kp>#WIiw| z!YD>{xHhE{z-Gw}blWko$`fD92aft}?5Y+x#2G7VD+5>8PpLE1{HQx}+>CHtb!k(u z^oZNLtB5A5^&&dDX^Rc``CPQ#MD6_IZ;qfNLfM67j41W=`xR3u+LZHTD6U|$CeR>U zTY>+hshf!`x;@&R*Y`Mf=V?%XakSDNj3!*x_@lio4n=I@(V#kn)epMu>elZH;i#K< z8&zX&*A(EaykE6SXT-j1SF+n#m5q66A^5q(-cMyoM}Vz%yD_wzBQdL`i|Rf2oYA{UAuu$@;oaaN>jF z#}2LMm)5aLHMJ1?pz+WxC{SvRFQf~UC8X&o#DMi(#p)Os-0&RwD0>-q9(%k%%Abs| zWfbFweouN%Er!R%mq{n_CkiV0mGm($ zct3kq^C4n=US7p0$ltvL${jQjSLRpR?`GsL>GJESTDgKPQhdM_ri7YLe&zUX5$8mb z4T~r}^6D||OIUBfUIeKG85=aHNKRMnP?4mNyJ%K_G<1f*1qZ<;8orGl$$2`!;q&X~ zG<&{B=jSyIMq1O_^1#L|w8dOMFa8UwyCfcMT(uKu6aj+<^(KPDDni>6Aq@UI+>jF5 zjZZI2#6navodM=R(Mgy!O&|qlD8;YG$#KspDBXSWHiKz244o;P|K?vV!iM8MF)lej z=d(M45XXM(3t?6t($EhX#cldi{q?{)T#nM>sUB$^#N(z!D~HD6NV}71#op=SR8w6S3nI&@eW9m4IpmR8e|z5`abnT9tvpBBI^@U6*fgy^Zdgvw z`-`JSK`k=8h!@r8vEq zX7tT?11a(1nmAU!=Hj2f0Aw$Sw_B80&I%?^M}b1Qbb8~7vdZP2;9sJhY|9$MXAthi zIb^$m0{?96KV3jY1`Dm87zBKsY+Q>lNX8t!v%$9i2|9@efgewomHLGlQ<0wi0SGy^ z^W8-tct#~6H8-GST^4ir7=LN6Uyz~gbUp*5i*eGk^4RYN65n8`XOuL>dBR`m1j%kZ z%!n7KE=;{xb2*7|a%;fTWvgGZQS#=)JsEiMy0C_43!|(CN3BAo!^v8~81!W4?n;%Z1v1_P76=9LGskQgty)??cl{kHp z6x4PQ(Ih#GHWA&4hI>7C^&2fVp`vRHE+Lw+cbAqvR2aUye_*8+Q}`s=u_pM=cTP>p zCq~N6yQlyey{6`u4NiJOZ{!R*y^4Md%{=so~jTTwH*x(aH>+!XB4@w#TB7^rtsdR?J&#tLnXDO4MD${#p zy=N{!A)BC5U?ckI=beiu2um3>jFQQ<#QS~f1=^$N$IOA3=Dhz23?&gCl~$f9IIKcp zUyOtkY+LBto4bAq?OF-#I-G}zx1dq-g(jS{3T`JfJMPh`;vXyF@G{2u*G&5CWy|u- zc;VO!*S%@r>|+3{d%-_6KYqyWG*MkUfXsJ#nsFuPyYXG+H`WYcrTZM3l;uUGB?e!~ ze_2N*{Z^AVx+2;XOss1a2;*aBxcl%P9GBg9I49*X^K--GYBGzR%N0b)v1`YijecL0 zZrnd|^c^VKPH2g6OF{tP3+=im;2Y0~C0Shl!Y{2bY#0BeJhe-w{3|6Ar!-U-Un!{iHf(labyH)?et9A^Q6$kiCEQ-Ur?1)WLVNkx{pubu%t3_Bo+Y6`*B3+YW+qV3?!{j zvQa1r8n1vJw`?u7r&2%~KLjN>w~Y}>7jZ=7c<-feUx?LKDwCvWN#T#dv|)w zSqD1A&lVHKR{MgiC(r0IQWLW~^%qk`pR%vLxl~VQbM`<7!e|kl<%52R{QB|w(sr8@ zMC&D2@`IL^vZ>&q3W=sH3x>5O(MZ}jq)6qpj%pY*(5q8u z*B5ipLVQz(;>!O*7%em5x0O!bi*0e660F=J=|*QXc6sDXx=C)YeQaHVB{0&h8kY5| z4&??B(QA6FXK{Ebn{NecOu4rPpo3jop-Y&&5zf8#PDbosN?pZtTzHX23Z)TrXrpC0 zXSrTpz2nb-D`Y6l53L`^GAlPsqa>@vRtd8LiEn}aQVs?6t0p&UOi|#!4pvdqgZy$w z_>7rc3)W%;vi%a#tJ|^?MthYh2~>NU9x5P5JgP0NZ4CU`6Bd^9J-78NI%9=!V--)z zFUl@;(|Hxe%0W`vh>AZ#MqEAkgfbA&Gn}o^D(F|EtAdN%pK_4l`&6y$X{d3G!PV5} z=jSL5-G!qDu76q+AMXlnBUPZxY4pwq)dV7ZgJ9x~%*G$Lh+(T#ti4AvNXTeLE)fLt zjry9T0phV*rp9c@vg(;xe?z63NJ_QLx4yV%oV}pTa!FkR_rvFpksyphWvG_+pxz z{Bf?1lpmYgnpIKhZW;H8%F7gb+q$LI=&^r*pCyBCgt8b*8x0Kn^q28DG8shpD#?Yw~~JxQF!M04b$wLmDI|-7z{h z8bP|dJA@A+T?!IX14efVf+#Hrj1ECS*eHR~pwGU~?|6>m`FH=`yYKh=y3X@_ow(V9 zQbtegQ$Xd}cgNCCRxS(DjDJ$~d2*Seup6K7i%q$AhkY~idb~!bDqpNRMX}6HE0`F6 z)1jGksbtH^|7GQQ)hR970_^SE9AY_x*srkn&b_QIYfS7G|$)a^p*N8id z#Ffh}P!maKQM=-F9xvcQ_5QKgC)Oi0BAV($^(w-xtapU8f=1&{j=2QDnNT&M&u1@P zw?eqL#wMwV+p~2pAf+vcA42H4a=-$FL#z?&q8!`=-e#15G+fD1v(=dWi3!!~KqhqD-}%~$r~ntX0<^L}#tM6|q5r~QNOwuqV z?NCH}RTOjo13cpYzxn(~jK(Y7Ni6k$jW*^X$Izw@68c1uky~S=Vv%)}jKEtD`B!TZ zIXHVlrF2EG?S0Zob?LmM`zhuhAb5r$ZRzL|Xm>rVzrSEO0&b|G^#y<$r zWxxsJ8Ffz+@z;qNxHTH>D~^TLpLJd+yi)^IRlQ!{%z!=)vQ4%q%;>g{y}A#qd^lcu zu+Zn^#a`UF82;Ci%J=EcyaT(={Sq7H`ME|_T>MvY0Zl-{S3{!UCHlENrlQ{aK;(_# zY%soJi$S31H}5Liwr0q9(N|w$rzOhP_>}IG?6p0O-v*(>IQaEmMfNjG%$EP3n^fu7 zayi=d{9f8ThaE2)!{LH-{ePd3>{YhUX!}))>Ty78@+4Q62M2(uQ@%ZFfRb=`{kL>a z(2bW9ku5oM#w(t**zlKC)3)Ds-zP>3;(?~{`GBVxdI7`pxiddBl~@AZ3~?m6d~RPF z5u=J6VppyZZkDcDw{DDEg$c5{x+Y}XtlZVXndj}7kKjTcW`HDXLB2X~06clmddzG% z6*#_=68@S+A)xPe$Qv#5J^9qD(N&0=BdsGz(J@Un$_VtkbifYeQA5ll#T+-Lp&-oN zrL+`&>k6WXie^j9n}E$vVv&+4PfF|}Yhr2V{GhJxe2t)|LMv=^)=(pz?L8YFd8l!& zO{f{GJVAWJPyc-jAm1q3Rk{K;KMUbfZDHgEovkS9p&Zs4zij26Nnycm@|@#^ zQZD`8vLY23nUz6O{EH{c_vpuy)ZahZ@+wvQSoD1G#sD=3BcGYpq z`~z_LHSA0mfX_ALUtQtyF230{0h{wHxDHXtbiIn-So>VuH&Z&eRA9J<30c|Lko03L zSxc(?%<O&TB^$=<>ikCBS{wcf?dJYn zFr<6h(kjCc;@j}$CV-!HWNoMQv5L@PTt0`URD-#22d=mhG-VXm_w|zDmT}do_{56^ z);=@ZrZ0}lF&gQB<=i!kY#td&c#nEk*y}ye=+7*!Sb9UvJ%ZhaB}DwX;cJtI+Kf{UOsdk(2WR(g)i5doSJl&p5ldj#UsQzEgMG>lN-&? z+LwIfSq)~axH?u`XBuI;-VN(dcUqfAX&4rCSOyA`VOI_q%Ec7oR!J-@9t?XIjF&+60oH}B0PI? za>q)w4os=1@@JD8KD_n_&-z!(0g%T30GJ$F`LPm_R^uv&Jv8AeaJIf9LRq!G2<4N* zlTDp1401u#hZv_hwjce{Ke6U_LZG`n@(5dJE`Y)S{-B^&O>$A9pdg@50^uApGW)taP<8;JDhO|FyH%pyfI|fixq?N72|4qPyfrXU3!jD8c(Nqqe(5IHz`+`IvGaiS_ zS1$0n7-?*%Sgyoq2}oq?22`cX#X&hKQIDg~{sCrAnZ3$*UlnZ@vGUs6rKLQF#|{$z zrYQA!LV;NW3a57(osfTc(trT4ZJ?(au66(11yXyhVNAEG?utfivYRf|yWU;9$FO z45|Ln#|$tJ7cfato;wh7Xr zN26;&rAQ0OBr;k*L*uSD8u)lBp7i)lo9@o0^Q-(dr3G#VHWYW3kc+F5k~1Egm9&T=aZHAhR_>Oh^%eey-;TT z``W+j5sAX#?E7+HVNv)0l2mv#su!phY;cQgBP(wfVWm&8)?~{Gghz41(Q%x48&H__ zC`KqXOAUDL%2P@SvpHdTML2we5>~PFOQ`t)Ba4((8)|!fLWScRL4yd+5y=Ndxc`ke z?aU__{2jxx>qjk1PuXXtPBI2{F37K~tebn1M>VEe7SC`eh-n05RTgj(knY5q5hmS?&Gf z>PFVZ>-LbkE-vtMEu+a;+4(?GPcvIZQ=#pRpG6h%od7YLTeo7?l+Lf~Y;$i_m`gW5 z8Cj=XK=gjF%R9<{Bt& zBW(Ki!f#<6XnU~FiOqrv(iomSDbq;Nnb4>NbC3@B zj8DEd* z=sdr)gso!QK7tGpT#810?bZu-LSdiGk|IPMkcqH9|L`|8fXmZDB znr6g6z3{^7YA95I)9}+Ee;qua&)BbtBiX$EB2fHH%M8l8#4^7l@RdM^!y`LJ9Njm* zXJlaNv`U-!8M*JqzZY6r*R6ixCvvs)X`uIhOhA9N=4x|Y+u8lfCL}z%x;`=Om;Gy? z+T`RP77-^+WA?k- zy^wH6QmHAVW%5O?T#3grp$7kb>FQ@`Y+)+5y#9!h`FPI$2RgWJ^x`1fM2lE7{dGyW>0lD0>el19wz*SXo*lgiAi5+RfH4eQFZt*%I`7(Dvx1II+* ze6NY3KtPVcH)BAW3;ObA=GfWG|E7KlYPWJmQBjt;^m}W`Xk7+~n0|#xOAK`dXNA{W zDI-c*oPGG7Rap0e9M%Y*J8r<9cS4MFL z3XTS(>OT4@yO-?WZI?g9W03%7ii?x$T`M+vQT3I}-cg|7R<LM| z@RIUp!})dPT-%%}45kKd<>yjU85KD^3nJ_Sb;-X51`xw7Pas8_2062eZPSc5+I=cs zFAoP&GDnBS;^T*rwY+N9z}RHh8lW(|gQ@b%icsE`2@2WCXPWs|Tojl^&*bmb=7KH^DV$E7F<+4J0Bl%r~ruc^g@p+y|jjVl}8win_Xa? z;Miihz$WHDGL*$_#yiSYKLC)f$X7oZ=eS(O{haES-L4tGIhS}HEk)RGAOB6&uY<}< z1uW=uV3h9E#Cu|{Y1-x|DLoX}Sf3gnP_jy3e}D)yjZ1#dxl`Xexei7Vd@_&x|CHqa zjjEsjUn#kdv}D;{2>QuKYWmg4at-v&&w+xUyMqsYZW2(wI-gSVjlBq8^l){ZrB288X88tKKP9=ip3nn^k7qNWxr?fQLB>0o5 z2qzsLM-ccOBMwZzPFGc3kQ!!Jg6J5cY40hIUfGiEaQFW^X2A#q)B7wLr@iNmYZ!EOetSyvtGD*^^)fnyHP_9KLd3w=IIC zNLyP#*#ymGuUG-?T0V00FIwVWYA*IqFWJ95KsB#R2Ogm=RVxrl)V2DA0?&sXLadi6 z0ScXhxJ#Y_3D0--`@62yVra~G_CB3zu3vp74VuGBXpl9@X>qW zRTH==Tna9HwP8tz{9zFkn*B9#kZVofxn;G6hffd{C+yH^OjK;+8RPYZNZoL4lyrd4 ze_7XeKJe+dP}8SK7Vj=mh@xWwqw=`fGYMWG?D+(6+<$CvPph#{-!Hy=zhL7ZKpmyp ztn5@KNV;lDqbGkKW}hO zbUyh_R+*NC9+Q;k_uIkKwbtD058f&(Yv? zvWo40k=iv1S`Ru@Vi^`GRrC1rx=PPNj`+iUTTVwT)MwwTzPw4$+|44iasMq)r4+m~ z(@eShnoyG~XtS`0>oo6z&CmjUJYyi(^DHlo1f8JtzHCJ6G^HCZptrV%-=BS917Ghc z_~}*AD=2_ivl1enu;2+?wRW}|pq;Rg66PTfp`jirT zlHTe&v%-0hQukb;8`U^uB%h8EIgO)Piyn?zSF`LKGHL`$gg-R|D4e;xVNiH_*B1bi z;Q9N%;mdmaupK%a)oQ_uGt5>YH85MLadjJ3E*pOs#*fn{ulm%FA3nlnO$Ff34NXj; zbgIwz+LCq4%=$Z+$d>4UqwI9V%x;7C?0dEG!^JIWabX2+VKugiEj%5u&n-eKc5HY3 zlJEceaL*Y48H5ZgbxdxN*S~72TxzLBMZln+9DP5LK%%ixLM7}Bq*l6VnNl7+Kj?RW zT&)yj4tQ>2YykVF%?ea(RMGnaVaH1##s~Pw0KpwALhS)rCPo$wbmBA5Zn%@Pps7zc znDTR8De`P{r~7_R_Boo*&71h|jfk~-{j;ojW30!;lNA%-%xt*e3;Wc>AEfD+ZTite zD8+oRd!*{q>c3e%1(<7UdN=BM0=_1a9YfWmcA+-x4b`KuzI=QR1BuYAa(~*xoeNMS znSqvFLz;`zN=v9-TG~fsOFw;jT@~mT4hS;$Q-4_-9PHkvbr<8NB_%ozD`pvvssbbb zM*AN>1ow;=7xrDSjAOH)Fn6K$b|YwLvT98#Sl(0C0PH8LM=-V3S@`^Zo?xfw z@w*v+%V(#QRot~@sRt_;s=7u)(lQDqY`ZVwXo7tFJG0lA3rlO`I!N|+8{14~jTeS3 zvNUVP1P4+-cLq8eyT(wlXIq8Ru9xculb z#E#XSH5`>*xn;e^OCCANGqq5EL_Y(@VV$u_y$T{q-#R41^ZL1A?7`El9&Vo_leBT# z$FpKSPw^SB^Z++|V-$-kP{35X4pQ%$rC8(hV%Mzb=1bmca~doTZyNYVa;Tc?K$^*B zZegW1emVE6Skqg6Z6RpS6cMm6rY>~Pb&s(ALrPtPd*U+@3y@8#@z6}LCShl#3;6V3<|*rq%1Z%y~AYt3)VzSR{*a2CB&WA5?}NPbSl zX^I5o0F96N>N$K_b+FMI9$GG^8DtR*5cfs(P&|hM(hW;`4aeW*AzZl&O!G|brp`p1 z?DWCS$5GDku4OKNmaxK|?4@C?eBThKSi%!pUF#^xEuZ7{lVCqsujZo^GbR z{O(N$UcI`)@RbHQl?rzYYR)r`=d17Q)Eog@;dwk5UhK%U@n;(8WTDJ^KF@V`WA6{k z6_s(#=&g*WE-Qt@K4yH!?9ME$!+}-?>ZyKJTK-%rZ}65fce|uyDIQvDOt&=6y&4XB zWl?n6oP*kjekh3e=_C8h7_h9C25=y}_u8hoPogZSSTsPcOAptuLRO>6W0R29)pIc~ z*E`g@aJG!$Dzjh=`;ABo6eIb)+~)V_=_54(30wcTND~E9H8!>4+9!){kdDf4zsyGp zKn@$U;l0`bpU?sMDp;!X%Yg5TUmXAZ&91KhZX?%`_Vc$O*SDFI)&F(M_k ztJ(*$P&B`3;zcA2b{(i@w;Y-9U3$Lf6B>eep8 zEPr|ZS?JJqez_t$=HWx~vB{ znSmhX+BQTX)8<`6chI!e<-u#nfnGbSCil4AfFvKRL1}ceI8wo+sxz&A$(7p3=; zFnY!7*npaVIAAjvJn3LIKgy&{E)$_NEIv2i4_XV$uG*M@aDfA6Uu=%ocZ=@tc}wn; z?Xll(ZzIwyYgd&QlhQiaPpe<9w_}d%2g!;0*!MF03vW*wDP-&wD31f5_9LF1)C$_* zjk+zzN^ad;`#|KH5^>C7xfgmOzhVC`(4_AVh)rWGJ4QR~AD{qYXV!H(gh-5*ulff- zyfb^ZE#^e_$MM(1fqE+AiWK9i%r%YW-z>_5Y{Ognfih)coL{_1LslOLIQa(u|>@=1h(UlJ7y(H~<^}#IRboz-6P974q3~rAw)B2*31J#{P(i%xCR7r*Y6s`n_LV zQkw@QyLt3h0NRmhJPR`IDnOFlBMQ zuPLhagK76(Pc!mrVDJcmrp)(+Tlm#8{pYIuXQC-K{<4|=hJ`<~Ny_7)>Y-rHhCGq8 z5u6d9BC97#5$>Ep$($Cfu+6M*(EUx zL!CdivA*@5KYvi_xH!3Ecs}BPmty}dc2H4mDt`s=i|*8_kH1n0dN}+CaLVGQUkN02 zGb!2y$=82g6EIbAXiMUKlErhsoFMC`X(-0o+bW){H`s;z_~i(Yp@|b(`2+XwY>Y!` zvGX)2)Q@>6kU%|)5SM9C`a)#!noylqR0Qyd)=A;%2@zg&$HIi6KJ{0=YWJ-C4G2B_ z-DI+wC-PAuo*sZW=qZB@KN{&;+5eT z1TN2Orxb6dEi-mY!(~s%q=AW&>&RN~cW%;Bpg7)Q;2T3DUO1OyYH};l(DUm!5@O@L zQxCVW-P#65n9| zF@GbC(3Rh0_6J12_4s-A9;L*DfML?rhpfOI{~2>>%4(P6oGdFuyLCNmu``4-_SmSR zl>uLkiT-cH(p}M=ga{aIc{qJTEUjP}9; zW--h1{eEv{M3!7nLCT1x2txdiM^%ss3AIYsHmlRxEA_nZuU)&kusxqIO<457#@GvO z#gD4*fV4W#CSwV09LH9~3WabmM{ugBMU7oSsB`U`%EY`ZM28u?BlInSu!!Q?(Hf0c z=&*nMs@~J2ijPeXOcn!HZpf|LEPzxjwG>?Cp5fEcYIuy)psje?GK>eQlAF++p^9W+ z(cs7&L5gNoge8KE2^~uda(gxYyH@NrHU-aj9KdxyjYg~xl%>((q?P2XgmZYz;ck8! z(b0YUGfcSO@@+BNMe`H30+~g>%iq>h`?wBT%Kivix@`$+3y`A=2!=E-m`s!1G#i>& zQERbpHw99WvMQXD=gSf~?FnAwLLluIkc({bdAOMDxz5)oq0D(s3Zk0QE_n+%EG@@w zcKSVHv43#a4LMiY;+5s$NO_wov%<}-F8u7__tnEnHzO?5-Y3Jw(s_wxpUcqYl?G=} zSy7J*Th0vIh?^sX3g_{0{iT~BI8E@$Yv@4O=zR0d(DI(7LI_*PJVb{4Vy)DO+Pb9K zoEy=>GjMc^-JR!8D{tIp%bR8nbL|Vg*i%Lw51VH>sWcBqg~?Gy*cZ`**i#~VCh(9fJi5dI1Q=zn=c} zMFl05=&y<1_3E9ir#%;&l6(luyViaD{->R7P`kKN|MwBY7cV90Sqt7@OT*oTm2yPy z#6wv>+stA2MbAF`189o{n_QF_ToBIo^!JAa;4q%92RoHj8bCV^T$`O?B72#COytZo zzGe>tA4WPZYfMwl>d~n{0G+x7fhO5#W%+8G7eS1V|0tt(jR81130%@DIgQ5A$MSC9 zysEFNEvpVea%4KhnVHq{$7jIOzA`_KlALQRu4^gg45fQNWV{%>P z%iexGrV|cCqWf~sI^Sba?e#$X?%g-B_8T9w$4B^hrf7Kpgzw05)mEAvb2uiBzf>!& zrBSKV!E6ZufRBLZ02Eh4`FstjAf+v}iXfepNbQ8S=oIbd6Z{GG=;)bRrmuIAh>6ct z`=ILBMvk7$RQS*|r^RVp@-T#*JM*AB%}*2csK}?>ANY}oJILn+fn%Hy7(-TbpY7uE!>CZyf9#2x5hyTogPjq)IacslgRbN{Byu$Pyl-j43|{_wVPuO6*g@PgbVNODgJ3kSl*n@;b|36)+xH>$jqe1dPP%sU-=H9It#c zm-RFVUX1TM9gqqC*D+xUTUxE&?5`J8BZRh&dD@$@D8FBa9bJJ!k^qj@?@~^mbiQ&= zI0^3IpQ`AbE>)b18%UUT=84JD!Qe1l!;vGWnokL^ z@AjL~Q{8nmHN-NsZ^J8>Mb5u#-b!%JU;&nc%&)j~vN#`I>se@}rD7oXtIQlT z{KtfIP7`z_Kzrk&Xjj`M0v|d_SoqNQG}&5M&bn+@m-*=}eN~o)IhCD1>@h#}^NJSf z&D(N{%`HL4>WfOoEIqDRbvHigf|;o5RwIk*`mA+}&{7PLD9h07wHkrPGXvmOl9bMI z=8fmK18=qo(;2ccx9Ev=3>RN+TXsu+%l&)qoJ#{y<@8{=vH8KxPW`z+Htl8f{>SY7 z_9~z(J4a}xNoHiosLUVBjJ_lSSDP)*A9<_LxOCsDiV8$=aX%3md8njJPTbyx{Ymg< zM0@9qmx=H0ia1LAyZfbk;DvOq50aL-u+y|XIdR$>`NZYG(=cGYM++HfQu6`1AMqna zbR1s?Av)BrzA5_2;kQ^IqOQ}r*7F^`1@2;7Tu{b2*da|_*Udmoz^V=%vZmaE^cSCQ zuBRbpYalM2RDzPsz0V9|m>n|ui|)cO38%`68$5y9!uBD^QPAR~$KO8xDx;+ytmrDZ z;LMY5abP%=2c>uOI_HdLDF$y!Q}S56zo_X$IzUL@KLx)?ba+=&Pl`Q*BHBzE=H#m+ zsTLH?)xnntE~)~MUri$lew%$Q`O9mneEv-^ut2KjUBJGVh}UaRVj=wSE&^w{)~d8Z zcW@+!Pm^h&ZoHdpb~%ooXEyV@()Qy`HO%`>OL?5NUI<4;ByiWNr=;3NwM7x!t=LlM zd4dwDN{JC$U5|(u#qR|Mu)IT{_j!Yw9)B(G_~uHXkn)x7hm3uHH=UGv#CavXgxBio zejrD}YfhxoVywEEu*v>@?Z&#bW7n+FYR#;xPH99-F8Q$ei*I~IUzD{a_8gliKk*f} zS5@EJ*VN}2NX!zLf()8Nv^29`|cpSrkiA*}<(QB>73diTG{*a8W2Cy~ZaF&WyDBg}WpAlHRDA#T}1#?Fy_)1;wx zvYZXGM|IEf2Ddv}nM=^4jG-7N@ivK3kDQQCaBW(@;heYKeHWtyQLe)j6ci+*#C*(N z@=O=&JzRO6l}P*4^Ko6KZPwTL*;mfe>m7S?wX%H`9|k;_a*#gIJ{%B8!g!Uo{9Zm_ zjjsU!!95(d>$a}F?X&sl%}{kj(MTHc*E7h8 zrFB`~qM^ZRnPbPy=YrYKtl`1L-YfFQYi>{%%&n!zla;`l?%`(7bCfYuz?ZLL;C;t; zn!JojQrlD7<&=roWXv}ytS;63OA9KatyPx^YDxGsH?ajDpLTa1)MzsNeA-jn^|oWQ zC7Y#x&&dV7Pz+q*HF2xn9<{5_Qwx&OdP6%rAi^EZ-eKO;v>KLn9(pS(onEnBL?E=K zs&1}Y^kuWLw>gI|QF;8uUc&hJF4xyIZO(*~lnBkge|u)X9%E5=h)-IHV|3KQ(B)kh z+FFh3GG&S0c!mIfrg#uw*ok7GqAH)Sb*9 z1P0%hmBzR}sr9{uft9c)e_wsmB1Sca$V1Fw%`bST)+>Di`+; z&a%>)n0%d?|LY&1L0+ysAb>fOBKJ?a!)Zs@u~Ke!zr%mAcj7Z%rzPK3k^{U)G|56O zm->K=DR|jqN?DPBolAV_wSMuC*7U8{pZpZQwN|wstao|=a4IZfo(QHNMkB1-|=3p+4+)XO_aiZ zd)D>LuMhaewNoc59u+(HIHP8biFRGT-1_>rwH?;id*AqD5q;OcU)50cs5$ybJQ#f` zbY{&T-Ln+Ba(?;o0H5v^t4$)AQDJ((jV}(N^dpc^UM!?|F#bZh=spwc$T3BED-;RY z4w?QH&3&3r>bT`a?UoyQ{jRrMgc$77>S+2adHhVaX%Fg}fHt`}cbVs>^)61Z!P@ zVR-o6@)$=;0tD7VbG~OPta#yBb~l%Ip!VCv<)B`i-#c04b+QZH8w&r-Pse~_QT52c za!UG+W7jXcfe^Z%(m`X3YIQ@Eo9NZGs0%?)I@PQpDO)-dgUyWYB?(@zb0-2h(1;Bz zW-!cxbqV-^f=$f$=yL7{3EVcrFFse63bms&rH4QRv#9FeVJ25V-mr3P8@2CS7(DR&Xz*n|9)RMA-yL(DD7=w>^#?)Bm{#h&;QP1TaUFN_cT6f`3J9fm()U&L%* zEN^iIE{;}@O?Z&{dt#XK2Yhiy(HV${W~im~|IKzcV$tK+@w2)&>L#T`C%(SV@t&)W zdwzOqjk|KTI!P zn70wzDp;J-Jmk9X4zvdA>qj>ttLqBPV_Y071%3#4GdYO1{3i*@4Pq-K39D~63JeIi zoT})wL|oSB7@8RVs1uv}{!IPy3`WF~4*C&1#+ZOLwK1w^e$rnDapmd(=|W-l0;wc^ z6HFz#6@_ey#I{ml7}n0Rwi#VWf3sVG13$&^%H(#2;z^AD0<%LfcK)K2Z4N21wM${g zYiXBLP^=|AR$aySQh01saRd}6znyvIiWzb3UbD_y^=xQ#Npd9=6dNBK8{|+LxC>a; zCur=^)C?^Vn1VLQVAlV{ZTYu^nE$dKo`%Z-1D?(7>QeUX17XQH!ezmv{17ttLyMDS zC9hfX9JU0ut&n_mf&_eP@%~kHQzCqlYU5|=m5!1iRcq*~D5e9ddOJoypbD8&8xBXu z!8dO2^&j7>WF{Ure$GzWgmq2hr$PFpPZ|ru*UeF?d(7}jv7edgC&P7mWET-+rAAao zLQ$FR>zw@o;A~4TQWgbhpZGC$ioobFdaQf(__KGw=J~3HtbFSRFErk%Y})6){nH@2 z4M+aQmXoO=A?VH(4#tI@*XVOxObNxLAru@V_0e|}Ina5zu&>cuPvKdiBc1d13P5$2 za2v`y0eGq1IGT*`lC^N3#JOdyG%FqHP+enM8TkCGKE*b^+dn{I$eg!HK%*h-+B>?m zs(GCi;r-aTAsJkm(W_|B;b=gl<;?nL+aM9c+V`qtn4%uUKw!n!Z&T+E3O*&AqCTHL zTKxwQK*~BFUEtv2m;G#)6m<-2B}01snUPcJea`stYCH^s+nK8dZ`XTz7X7L_t$2Qy z*Tv~(4T^iDrN;Ou?KKlbC=r{yLY}f}mMUmmr6s^En*`%Y|tq$BndA5nH?@Nr*l_4~uNaaJR z^!IcY?#R9Pw*j9qmvf!}$ti@jhBVJUI(2F2eAheE14IU;G+n-Cz>5Jpr=$u?=6w@E zZmqnGj&&#b2rNVf4E(}e?&2c+&^>SJCUajRDpBKqHe2zZgXJBA|j z^YThy$x5}en#1IW;Bo*{-1;;y{(SIceCJ;4%h_u;w|eorwqQAZiGpO;sz5uAYhJz9 zYZf|)XyoTzs#!-jpL9@ngXm<(ld36P@=*nx6@# zDic?KTwzFO!xF2ypl~{IUurIUHoVatc9Hnlv0(`C)GiIJkZi4YK`K5gIBs@zI1G=R z-=0fg#L8!Et+T%T##PpL@9%!`99BzdoakIb_a;%@_m(JUk~)m^m#yfj=pI>YhI#;3 zPZuDvz^0SYsEw|S6xymi=|TKp+z|Djh)Kc~u8@$dw3J16zIlG^@Rv+3xH5<47-(U) z=HTEb_Gc>aN2e6dwr@fWQ{#W`Lo9z%dgDjAjtnow8RJ_5A8i~h@+p}LGPmXOdsb&U z8*3pa8~djL<6t<02bhZXZa#nZ_a3+8+O<=ycDe?bB-> z&V(8VR#jCuI@yR8y?FG|;h3pqPjZB~@T%!Jmu|5)rR~osdsV3+L^VE0WWW0&bC4Y` z?ql}g3Q%yaZIO&+7O|zR1%^DoF;@GHtj+LC@h^rhk6vsO>1(1`Gzs5Z9(8oN!dgW{ zCtFxXdRYO2CC00BjE8j{J@4|rUQ`PTeG32VXFS*RWAK;bk|o`fV$ZCWXTag3Cl2^5 zeTRi%&ia?Q09fL2!HpaaHGJ(FNcJc0r?qBiQEmEe#WUU2ST@-G^n|e`?{u0RWMmH& zjh#K9o2y$9-?RvD_;uWfRXZ4J$YU-T$#z5J3Entfyn6_@G_ftM-3W%0&F_ z4k{|?u>5TX(OOi!F{}mO)L=>QDz)B|zOEWg zts>a_g*Z1?x(Cm8Y;Bz1EU(v7*R3*JrM>M3>AHK%@eNneuO*HI&CDf{HxCxyOv@V5 zpaMUt^xoFexxQ%U0X9_RTQBbS8UlSp$o$u$nKZ!|SF%kDPsQjm?~DHR7Ynvp7{BKu zbF4jTC854Q7ul+;Nh)8JCX~&3ape*`9(!!>nJ65gR6W>EU7pn{%Qjmu_PHT+leI8dcCWLk??I&3YTb$Kr?o1&_^TgmG*uhBp(< zVO?8Try?6!+~eyoc2uWoFF81qOIE0Kh;6`!Fw6e$_(y7mfeR#8ep0#O4O0CPIo(c` zCiznipiETnBOQ75Qyr#~9a$b>VEpx4dD$B_dM*?)6>&ZH+FeM9W|TtLf8o=9Kyx4e9iy7}TAhV?(V z1*6GpES5;sK#!-M*;&4LaA|YC0eqAmP8ymLrpYd?H-` zxqp%;Cxeke^@Ep%Q1CX?10huNh^DSdG@RBcUxlXGf>C2Vk;Eo69iN-Kh~t!zPTP|T zh7alX2rCgBxupC7A$3?EmJ?ak4#2j^ynj*qLoaMCoCWH&hdbMP{{hB7Lzy7Cf*S=} z7CEQ~37V<9>-7s5%$=jkv{!9$mh+n}=Qo$l>hzA&1F59^ zc>;8FEm7WA&jJ^EK6nJu1zLj?%f$1XI1e6&KH(;rtWBL1^`oHJBxRr<4~H5)2uHNf z2r|Q9e@15s&$aV7pBkRn0s!18VOMip8|Ved69Tsnb*bKsnjm;}K1sm2=m7f|{G5|s z5}$X(Q{xj$xAD?(2K<2%Y8h~upn<8Bw`2Die*%#l+F@1KS8&P;vN&dQp3SR`lJLf; z^^C=0df%85gpM$UVj11mv%500d}|d(G>;aMuWPE>Rs~I^O`pTQlkm7nf!ikHwBs|o zVj@Xp?OKxKYFr&_AhcN{tP-)(wSJ29>O%@q;}pc)_(cMa0q(Fu&hmk;+lyHA!pPhe z8H&!|kdb7o{Os$T$(rl_wz}Uct@tcwR*(cBdvH#}<9zjKZnrP#&sB}F6j9Ggcm$#8 z(Hzw)>kpO3&tIa!?j>4B=6=e7y6x#}gi!9?R8Nf1yDn3c_Ag|OTA@aNzV(!?0U{h4 zBJQb0#o_|VwIc_&5|JCAWS^~B714(0GIt{kdzL*>#fW*68XH0`RUlaC^c_W)$uu7x za5zMPt++J%d+%Bxi-?cuZ}hA)vE;pT=Q%E@H}_6Q%^$tmx=#jH8}oeJCi~1Sp98{c)Z3JqbzirAH!+EX?6n zsB_czx#}^lI*-GL$H>c{MXihbjabqe4j6nqAz7Vlo8H1l0WVzm=duSr>yGRjRtDO< zh8m*2gX5M3I4+4aP9VVkeSqg6q2>TLah6^$qI>QZNjoV@(s8@DI_a~>JTb=9P#0IE#ZCkDr3 zf66Hhi(Bl;r{q=Q=bwa|^v_4OQELqw-HCIr``xf{p zP;~3R&qm?#KfAEQ?|a^T6RPijVCAd$SoLJ{?<6mJiB4#1xn=Tu(ZFN>5kwia5R|nC zH8BF3!@63VL%hp44N~$<+Q8Y@2@9=7vlm?7rl*1wW&?`#S}`@Sx_2uh1h$D0r&s8= z3{ne9;S_rBWV@29=Pq@^oKF1P=3#FmJ#xNtFRrGC6Q^zORW%OFY)jeu5M*cRP*F$y z3@%dVeVF)Avn}<|<7b$z|9%mHZQmRI(%DI(z2#kMEiJy&W2kSq6_$wo8g(+VOkjgK z5XX=W*)m>AZC`bb`~!SI4@nhOra#l ztTg5ekvkW_UiM(=*z|FN$+l6le?|*cy~x(!9=+A+!(V4;-neND>;+Lkr-Q%GrD?{I zeM5cLE`i?yOgbw>l$vQ>fo7^cnxZT*d`v4xlV*9nqigj4DeWtx+U&YEL-D|ZLQ8Qe zQYe(-6t@<42@a*DxJ!_rg%;Ofg<{1*aJLp|aVP|LDNcgB)48ALTkD%OGi!d#JNc1y zCo9Q)&OZC>?6c*%`nZNkN;Go%T6DpMN|rOXapec##`4|Ax;Zw1%U)HhIVwHR<+v!- zP2~D>qoR_XLPXXU1om^O@37VNU;4YCYdW*eSlVwhoFsZmVpxe%-j->B_9$J89TzCTl%6%~vk z9b67DI&-gcCWFkTdxI#0@$iG<0)z}N8`5} zepC}X%Mxp6xcJ(|%O5y|qJOaVuv+F11j$e{nhZ7S~fY!0$qL(}FV)d%O z$bQNb8&*8tlEB9JjEWQF`WlLJA{{x`b5bQWf}11gFQ@9mWM9OL)qTz3D8Q<+aFvp# zyFLAe_lFigF~=`NXvf0BA~UHEem8y*PFz_H7tj7XfZ)I^UoSCL^tt8gFG4)a3-_?h5Y+*|W1;8Rhuj?D+ z=|Tv$a4coV)LaY0GPWD$Xxhb6#l$^J*vN5D80VfPJD~zuv2kE@_H&;xw*m#JsMlI& z9Y5(3`XP!cC~zOP7(Q>hlBk3W)mE$w>^V(xp=!|??-MXMXPDK7{rqA&X^hf{z8I;z zU|8+!m7}qg(`alpbYfiEV5Ba@6;H1{`HG>SPO_mDiO#dbR%X?febko=BFj`@bfNCq zWpEcFJ)E1wJt^5LtZ3lwNli_)508LQ#XSt7@)l*XcqpFj7V?K9D+q=t(w_LdEnaz$csW#tc1>(n5-vJzV>3Y#Va3Qt4w%P7~j7g4uY!tYAp2vyBM&hn^9Fsv)$pPvuCI`$ymVzS|xI8aQM*C$*~PqA+U| zL;x5Y@sD-nC74jKY{1HK4h+{(l~=~)mU&>fm~w;?X8~$I)b&X-1>y{Dpnj+EVUL%d zo|adZ?zo(24Vq|F|KQV##Iu{wamMLu>MPO><`w9r@n#HdO*~JBWo*t+T|8%bi?$wp zUV&TkvRCNJpWH3RUnoUv)pPHT2E7fqw8N>LWsQS7c;b<=8aekde*!XeDT5_RX}O~A z3*FmkN&^3a7?^0{Jeo3NHfe%YEVfeVuuf=vFe=neKx0E;7CoyGXTNStOr4sPSp-vv zEDqVv;TD~*9f6+`KfOjHS>Fp&bLMk3(ZzhE>g%Hh9@C;{kY7b-CP_%H+onhxVcaP&m$g<>NR=qEJ}T&P>qd^z1H(dH(NyH&z6?_ z(76CFKQ#H8SI7doQ+Rrs;N-zm^Nj^sI{9NQpK65SBgN?qlT^&)J?-v}7_x z_fug-NLvfJT-p=8)xzrkc!HWO6RD`-)jUZae3JM&_qd-$bTO&7^TrcpC({Nr3NGQN z>jd4?I4M1UXZ9(<6_1c1{d63Rh^M{&Kr)ZvyU-aB5;RcN9f1UppZ&wk_a$Qb-)6wm z1b~?@UY4_09t>Ad^mmo|3sP6|*SN>k2OvEDiFCL=qQD_etSdbHsvu>G$r$dd$=iCgF_SNaUR8+L6-QC*VdotJe2t2HyZb* zUMT8q9B+PkwHl{ip}8nPg1(^p}DS*LPEe~C+l03;EGo4K<)>t@Zu>{ z?~cB2Uen3_hoBwIW;~lNR-}hlxZU%GvfXbfQQ0z*@c|ay+TP?PrTwhuG%=NCMz8r) zIM-je2R+NoiJux}H!&)DO*E$8(lj?P+Vk3Gd}n)rXZAA3BFURBpyjZtPi}xJ=HoG{ zQ@dd&S{KN&IPdzktzrRxy{h{GvSWI2XAkytb&eE64oxl|&2u)pWd{z=@z+U+zIwzn zqLG?Z0Fk5pG>lRCUdpS_;>{`1)*B))>=i%EX6OLsY1F85HpX%B@URNWp8ex-(lO!e zj6_d-8gMoswqSf=GSSWs3cQIqIl4J3F-M?VT!cN#%Gu8MXI*smhCz2H*?)$%2Oxwc3>~jnk zyOELAg>`;~D}ke+cDADB*&RtkTw`ra5^k?#QZ>ueI_RoCNZ?9){bMF+<$TgLG&9S=GKJw)L6cY&=fJ39=n>;v z-Q;+kEz8XzV3F-2~iA`hr;Gn_Z^?_XcBf7|7$3$jpb{~5$4j5u4Gyu*He^byD<~10o zA*CTjdvDBNV~*Ee^Xy1oxoY$zezA1b$R{GSMU28MT5vnOi2T@tkxPFO{&Fat`k9gz8@6WA9GK z4y=vuP87JPrFyRI)sHbyI)2FX9zNf?xvg7!%h{>Pn*YvrG+i$dF7wC#PH^ZQ_RKqc z*3a)g-sU5E-}bGOYd&oYBD)qSbxbdGw0hLdp)V1Fb)7$*J?B=#3v1~MK}x@wwq$8| zzV0k~<2h-^`@>qPKv^qWr9t)}JE%RtzT^jLe2lhC???~lHfenDmnvP!XiL(~Duebyg;j_D%mV99BREdS{#{6W<~9Pd?8X32Qe z^%vw^R-P|1A%v_T&5LF8CXt;kBxNE_EV{2zZAP0QMjn;D(pKA3+Wpx31y9f7&}05! zQu~q1`3p8F~%<1sU}p?N|+qH2n#pca-eF`&G{64C$`d76y1lG$_l0H zhInW!6TWAht?<{XPp2k22nsTD#2#-3=+!Lohni)kA7KV(&LsIIFT|uy0!(n@p0)WXB%kwEL z))0FjH1^r|mv)5rT%-rrXAQvzc@aP|*gS{w;>Sn1|AON;^(^jI!KZ_*AC*VBD~PNI z%uVITXG5!bm8glb38iu*eci`B-+au`p0R95?oy-@0a@Hhx zdEZ~qnu?ZBKlPPskaL9#G3xSKN?hhI$fgJ>l^t}{%AB$w@%v&!LF%B^!29z`PO-M0 zGdE5sW4`IFff*I2^jY1Yx&|SLL8f=Mc(0bF=l(0>Q3^g##Plpp$CBoUiKyw(cM+B~ zRIhfaJ120QjA~w0NzB}mZZ4dhm{vNaV0`n#({{AnT25#+=)k5?2Q5*}4O$TpSY z->{Ip;og~gF`qMCs_2lu>23F55BD`z+(Kgf-k2~P2bs#YD&J?Zl!+a4cipc~;#R}a zyCUfvTIffYWj6XaRuCT5lKH*X%bZ`i*Xe0e9=bZ-K8I!fM_@U0@J$NYfvtjD7_MSx z_2sQ#@Q5N67PBlkHW%yHUFf(fg_+%#j%J>RDa{8T`wvDFJ_PQ3Jq0^B#|C?qro{yo zPeUNOPQ^-)*T_pIe8%NiE4CIwIl<~@kQ&L+U`3j0kEKy*oA;CeUR}oqW7oEVV*OC> zRlXrZVhn$dV***9xZ>Wl(U45``y`bT!avFPLl)xQ&)CvH<64s@1;u* zMKzKNnWOU9g)GBOuOj#3d{L6^wZ<>a7=Ty>w}Wad=e)iP>%!xM*fbITKkp(gT}ecH zi&`3IEE0q*K9MbhfmhIP<)=lm1R?xCm8FxYvCr+hhtF%S4b|iYuf2~HUrc!Vel3Zu zc7A*~*RA!*RG^LjV|xJ8yDGo)J_Z2AF8{6+`MJd*mYc0i@9KS1)=>%=KtbK5vl02j z&`Tw$u4z};X$?=W61bTW0Z1R~i#{oC+;BfVTLf55h%)tgHcM|*2k(cC8&20pp)Xvx zjS342bNnF>dujz7T|7T6wBD>Ip3^&p7m~3M?K#U_B5t5#J>#mI_>c8=W&ZeDkOb~I z3b$ClAkWSex7asKYuvt(R*0G8ZdNya#vD|!w3hz1kkUyXA}#vAB((p>Rx+SI5tRts$M`ytl6yu7m5Po7$_aghGc3RK>wTiUQ6uXlGf zZnru%FRxYcpH)hqzTE@(=Kch20AASWUr?jji-rt2NNY%r-Ssm3?Lp3LdD!S1-Nk|; zQ4x{PJ^=N)i$O#{PUJnJW7BdBXgyYuyt>V~fkvV&{3d~HgSm908JA>U5)(H)|H*>f z7ilk{&)hAMld~Mi8B$&Hlk56drCllgm+=^X631JJ?q5&}T~I#okI;In4|3BBx_rAg z4WNEK61nSCD-LYpMY5cdj+X(@fw=(_dJ80^$>O(uwi*cXfY)SqnjeSQ3wwj?q+vmg z=C9Ov%8eLLgZ8FXq9Ko%^G0<-^wzIbmv4a5lWK*(#U)G&Lra-cIOHW0Pp5f(q2tL(jM*2_&> zaunwaAd76c=RB7HAY0bYl8#r_qbZ){r?P#>;tlrD>%F(VYw>S5-E|nFoN3L?;m?cM zvbY_8h1x1T7Bf^5d6@Y?W(n zZvPgPyVR&dHq5Kx^u1c`)AuI-ehbU-^An)+=j+2Z_oEF%el8b#G^Xw3i)-v&i3`^k?G`g-he2q*Jqe zud4`sy)beQe|9pc_%_aoo~`}||kYB8by)u`6+iiep%i}46dXjs~H`lJ__hZ*x}D6L*~ zP*?!aMQb(=iOC`rAda>gsy&QspB%jm*Z%G@N=diY zn0$L*?ip0wo-q)W>%F#uLM&DW#E5O#4wB$kv zb-qQ3a9npwh?OtNROvs$2)6|x%ovgl2dz{e1PNyPOWnbet&XdSL9a;P>c%R*V!saE zMcf(Dbx&q97>u4S2D}}CYDF;F5mh;YekAo@+SPV4q+|e@jJ9#y3YGGtI{C@?Koarz zh-qyoxUi%}e?xB9CbbA|nEvGi9-b|veortSSvEcBKnmlG*rW@hc8ed&H!me5gq(Vl z5ictDm@Hf4EtlPtF}dA(bZ+5R_8r zc4_4<(jCVnDb4xiFQ~Qj%r=3~tVE=LE!I9e9e~(f_rd}Eon^5&yPG$6DU{b6o7(*= zSzR$->8LvP(KkVDf)#0<;-Ox3I@zx7=#U_d3TR%pfWp|rpTc3iEZFTR!}*nSPX5Xl zlWgwuUz|m#58}4=C&V=8EMKZ1_6C2Karg_gC~^*@&dEDtyo(eW$C2%CJnIKgJ`@nu z2XB}?-?M>3WO|)cR#RTRsbP7V4Ep+UJuy3wF)&NmS+s+;iOGw7qj2+)w|leT6=#ZA zRN=fsG~Yb4#X1}j93b0!>QUTHa&Wjd{yp56Gw9k5%E4ct(?jdsHbaFIvnG+F(W`Bb zr@I!fVX=Nt+;CHc-227rc$O0OHop9w`` z+Uj1Ko>J=XOQJ?5fs9vkMfzy*=BViG@5;$mSG|%`b_1;CyPo2nAdG_yChq$Q5koj; z0fzOV81RL4&0gm#ywUJ-pNFy=?=N45PNsL5Mzbln9S#rA&0eCWb`|zRFynEGml^r( zcj{2QSn7v1HayCc^zI&Up%{SuD6IG|NY}7k=d5QWdL+Q~G2LHK)1)-Uq4?C^omrqZ zmHaPgsx;>o8?)@k3e*)COwdZH{s7(pi zhK^VSk%`sXuDOh)0KYdg^}6_aL4dLAWyN0aWokY!4yjm;Hws?v`A||b3(iwgeIOh4 zeuDHbNWfe^Xs3>tRPM}fSX9_JCNt>ww7%_V;-jq0%FFI)YSb#Dfz3ak4MJ8L6t^sc zNoCKRDaW^sLvwCuFab3DOvA$l&fj+2rGw4Paw2N=f{@=}(G?F8FT*E0a^8Nk2kcID zMe%4pGx6@mXN*)cQ0vFB^4KfCM(*|g^%?){*I>@54K%pc(E4Scrb%&ldJV?Jt@I;)uGt-9HXL=Q1%jDYk z+TBlm3T5D?##>eh&-%@}5QTpb|KME8Us~!scVr78)yzI7A1=XdIz2aX`dVzOFcKLTL zy-|H1zeyCu8}-Mb+r}|_O!2G!XVY^+e9qh|;<>}9tU#ir>+t;R3iN0X$}^+Fd-b#J zx)2dFc22*gE1R!`7q$Vb_foT7@1->6=kfIu#GSfuAXP(2Tj)`Ek-vV;x7UJ^TYG<~ zS9ZW&1b50|upQ-qYAthHR&t$b-NH97NTE=iAdObVf~vUZ+8Z2B`jR~RaWQ$H z7I;YT`4lH4J%Tl5p{{EnT5d(gbD@JZQd3~7{Gl}X@F>J_k`d!jQs*$RA%D9jY6Od~ zz+U&n*FP8i3nB-Us_biV%fcQ?7HT&?f2*zw2rWk;CPK8weH_YTDjWpJUPdZp@E@t+ zBgK~Ouyb2#>4UGI69KNxe?c8m<X z|0=XPpwM({qINB56$C86p78CxxBACa$U)gnahZTkbFzG^s(p_@nW+Mwq@EoNN5cM8 zS&p=t{p{<`KmhkTJmWD*02Zg5Dd(75@j3&e{_njZ&bd2Y{tUsG#isseL%NxNK@+3u z0Xw!&4aak@zZ1<1!{C7R8iMM_QjF);gh#rh=ccLoo|p9X0<*cpM2^RHVn9>{z2SDhZmH z*0G&V>x;hXabJTgT+@_*XF*VyU$}VgL`dC%X}U z5l~IKYoih$z`&F}Lc(U*_(?)ByVYC&wQTXgvSqtvcC{K!V||pwpG43R&jNRwnz`<* zNIn^9HCc`^vKRN4Dr&J*$Y*BBv=MAHg!Zy}vg_Zvo&F(fdbkn7x?HRx;u3ydbB?5Ex&aZ#2=|}Skm0jaY`UIi>LP!VnhPH&za!5wxROErV7{k(~B;E5&3eT>ph6&A16f^|dm$l@q}KJMzufI{g?q4IZO3dVpW02)fUa8+Whb&PtT8!33cRV9%*NkQ z;at6Ao{oN`lD3nUC~5RgU7eU*PfxwhDoUQbwu+(PC7wcwMqc(v`$tGz)H-B`OH3|| z_6^uWqJA@#Pvfcf0VR2|)By|5`S?Y6n95tm>pYSoI1d6N2Ai-YN>Cjy>EpyvT-gdS zB#mOMdhm05zY@JvSy)_*zKO2~+ewr}EKxsArR?$g;m+AY2YVIj! z>H)|dWPr{Sg)5VVz2*YgTQXx^Cb7o@o=lioj<=C5!9p;O=Yh$ua7+R`>lhXd&opWp zwv9{+%=af2KW-9lsZRtrcvX46RXb}PFLs8WGvr|W3iC>kCDd(6jhjApTWJit74%QB zB1BoU*VnQ0PaU#a6jr9S&s;QopcAhKznYsLP-;)1_DITXX;L;|&ZKL2nGeB# zZM-9v)J^ier1?xy*H1F7_|IcOUNhFHbWkB80V&S{<74Nm=5P;KfUCFXVgtqkBxpOD zOR&6V8nhyP#5nWy_cbN@t^J8eZ_b9}eB6CAYO#pn+mXiNyW$vy@={0Ed#^fvxz@x|$agW7qtMcy_4Tl=yQsR}#Q1xW z+p$Sc2cq8zjYSX~RP6PcYBhph>%(^YU6|Tke6_*WxgYfWvOT%^<_R5N1avbFR56 zyw;068^JfWZ%pfYiKtuNt-CWAaj>ads(7%dYDBTfX&vQF{Qi+#@q@5A0C^I7Syw9l z+QKvT3zY0N?3_R3?PSdip4%N2PL=8kwgqn-a-Y9|r0Xiy{ zR=te(Ep4B1TGSjZw+KZ(g{w*cJkc+96R(P%Coo^>P<8Txnl6-vq3vC@uS`yXa3t8F zae=w1(*b5!R2({pK&INeA4L>Mh~Rv-yh6mju|0@f#W(PA(6p;xdOr74FpYM)!DJKh z_yx!MXA4Va4m)D_8dwwD+aQSL{of|uUUJny_vdI9wjU> z;;Sqr&(X;MQF~0Zr|`{hQf*ZVQ;PRbpF(_}CMbQaK1=2gtvhrZ4i>#Q^lX~DHtFJW z3L&g;ywkQcs?aoXC@Ea_{hVzSMZG37KW0SwJ?V-p)2+~RQFRsUqpZ4`qG&dSlAxE} zEt=dFM5+RG)*1Zq5f^E5?({}(!MqxV%k=W&4W+kJ$bGHvgLaiF*RPbpRGSbhe3mB8 zU2rym7|?Eo-^zU%dzrSYb4RpiKD~Z*@O|jK(tdb%>tflDdau_B1d-y0rs>EUO;Ns# z_yMig%M#E)Y1Mf)tk~wmMQ|$VhD08zd98d=P}Z8E3l=IZ6B}zpT+bt67_d@dMd&XK z=gi7azDVPef|!^sTWg$?Op@ywvG89~32oC$_FPh5;XXfYa-vO}FoQJHMZo*1lv zZ?ckcqX`<>L1Zus;Dp0nr#3!oS^XRST})Zwb6*TnM7m8_(<2Kc!&wnvwz6gDIVrhZ zy3^7Izfm^ZbDhxD?cUJS9T$>;V?Van7bfVhZnSjIM8}0)Ojn)uhTVBUrlGa{la0~t z`g2q8w3$3aiGI>R{IU7_6tfb;W_BFRAexjIW?AGsV)op4&rDZYZNl@}hI>Z2ZLXtp z6h&f$j9f8$+hgK2NO$zlo53@uF#A&anxA$xX7c^|X-F=Id@r*NOGIJH6Hd>UKflCe z5|a>);9ML6r^I8TY3Uns#C2_Pd`truMRcd1w7y}vp71`hadQ51UJ)EO%GV0+lbAaY zZ1zDP`au+jT+_)UK-;nr%A;W_7I^ST-K9ylRZ`7ivCU+V7-VT&N zt*D*0uV~YoBO5LzDv=WW==o_ay|?g^E1M>Lg+v2Y+ZJ`jy{Jr{3>FKjj~y;$_|!dV z&{s02l{!W*&P|4D=ZYPHUaV1t6H$&sq~4&-3t>3Hd+!Ipn(Cik+*i~t-3la?vc$XNu|wd;T+Dq)P0n92k2oHR#xJsXjhML6yd9YgFu$iC@u~FQF}^<1w(;wRL~$Cs zy|J|Sf{QRS^KtT%2UmM7=!J-`4m1Ig;FXDnif<(!vsdiH@@N#7WZq;lB~a{oY#;(> zt}xQ$fmEl{nr81x>xX>f;8_JQ6BDy%_Fxa@nzlY7M^L!`0|MGO&Aq|knZT1b?lx-&v5Q0mx@(e*Na&$ZKtpxgehUu;(g+-$Q z(^F2nZ5E?P67=OUaZ)sHnEiNkU%mNq5COyx4af#9 zm5LrtYOHTBDocKnVdJ!)T=nUM_VTyli)DeN!bIb}QFBfnGHsbOaD)zFi5w}v(nz&D z`^1CaGFMqIMsx8Ps(E+Ba!oSy=8EfeFYRi!HJx{fR*_Jd=FC9Wvu(P4_N>)xuwhdo&lv>&C2Q8DavF zm&cVjJ0ZlZ$Aat%z>ftOb?fzP{@|qoe#d`1Apc%OLJcC#2*;-5^TeW&#oYCIY+t&? z$r^-N@z|-bnT|D!3LiuCChHQWv?pHcs*4daXRwpNpHmZ;i7>^v11v6FEk*H%F__|O zlcH@G56yA?iKMxGsX;pFl#)4<1@|4G5lw_q@|932P`82kefZ=+77cZD+?-?bnpPBg>7gGHvlW|xfd1Yp`00sHuVYyU& ztm>E$NgVe+!<~Bo)r zP6gl$+Yhk(vo#f!M<)r*kDda2PhNUFsY6$zH@SP4sZuSVw$uMZIzqn#$$XNgTvi-~ zY3t`q;til+Zi%~BMxr{$+{%1?U6wi4o~a54`;M182qC<~+RnL`$=hv7K=X25)8e&z zEE>5p_0n>=bC*4Zn3r@mmw@Lp{aeoxbUPvW8T9+KDUXnWh*hRWRMHnqyK`AJ=DYBODK&2 zweO<%9?w<@%x1;`&WJA6@_^wTo9)01%KC=+Rb-R?klSNB{2VekYcxlXvhcg3{bF4A zSqUM{l^mVfgGMyWoFSqjx7GAnvvb@0l5v#iCR5*I1o=0|DjmI;#3Te){2OT2_fnT> zsf3o(ThAq{1vALMEv?G3M$pUIE;e%^t;&G^(UqMMT5H&Xt zEh&*Sp{Mi#ZoolkZOsY~WQVA~)fv6#Uw(e8eneX)Msxf!>9w!Lyb?$L@iWN#kleguK{L`v}+A<^D-)oP}DeCwf$si zNg=~a9n9WN^}M2ud;~X}dS}y*IDi0VnD-3^6uPicF`PKjR}b1#j#9L0P68!8fmYvT z{TomFO5u4GUlEu+Oo{Chj$KCX+K^Xb5NqgSXHpLcl%jKq@=8M>VJ*&~aFP^<%F%kE zJ*Yy4z#dSZlkn+c?L;^ACV#1ZRO>U zJRuaGkIPvILi-K0B!<#E+`q|+41*XlYU=UOfe|Hj&{H#IHc$R;Mpf;Z-zo)sK30jp z)9;^?W5wOtd;D*f?w>Q)|7!dGKi_!`&YJ}v7hO@%DZ7`1i1}hb7fT|8k9Ci6=TEbQ zp=t7-jfP;C9&rgFl#=22U~7IVcPBB$NEj%XUm)}&;D*~`!J`XW>?2=PkIvd6;oa@q z^-+?gs;$IMRU~+jFN|>-NoTKKdm?nqIVvf?NQxizCiLqwo(GMLYSfCKT@2+bSc8CfwG4zDFr16erC5A|{ zfg!cz^S*F1&YJ=IT;?b4WujU`arc`6LK`-+8n-7~OtZT*x=?rgKH@sMQ*0@`4GIp~b1Oig?e-vK#%S{v zlMe?v>=3@*RIAyDXeK7A9#?`9+-A2Uu5Y$4ymlrPwZ~|sWfk^UV(CzC0lSrRN!)e$K$jF7FKsmxD~QXqiQ&Sak4EiT0Gh z@+VRnG_o*K6^NbEw|Zmso?bVTQNL;jcgvYS84t)CJ@^q(-7wUo(>k$EAuLwW+<1ns za2Yx+DeBcsuxG$!C1k;rl_sqfTwD59g>_!J5+)*#&X?`pa&A0c;PF4HIqZ z<@aexp4(yg344-5wOMblOzbfUU)`2QmQY~r8F%5!DbCB%;t$sH84`a|MBbq~LQ6Qq z3&lcOh`@7!8RZCo!7Ok3EH|5UKwCS*Nc%%N-kT3Ckp#En9QawDQvYdu`9F(F|Ht3L I{yY0W054x_`~Uy| literal 0 HcmV?d00001 diff --git a/doc/usrp_guide.xml b/doc/usrp_guide.xml new file mode 100644 index 0000000..7c4d5d5 --- /dev/null +++ b/doc/usrp_guide.xml @@ -0,0 +1,399 @@ + + + +
+ + USRP User's and Developer's Guide + + Matt + Ettus + + Ettus Research LLC +
+ Ettus Research LLC + 604 Mariposa Ave + Mountain View, CA 94041 + USA + matt@ettus.com +
+ + + + + + This guide explains both basic usage of the USRP as well as how to expand it. + + + + + + + Introduction + + The Universal Software Radio Peripheral, or USRP (pronounced "usurp") + is designed to allow general purpose computers to function as high + bandwidth software radios. In essence, it serves as a digital + baseband and IF section of a radio communication system. In addition, + it has a well-defined electrical and mechanical interface to RF + front-ends (daughterboards) which can translate between that IF or + baseband and the RF bands of interest + + + The basic design philosophy behind the USRP has been to do all of the + waveform-specific processing, like modulation and demodulation, on the + host CPU. All of the high-speed general purpose operations like + digital up- and downconversion, decimation and interpolation are done + on the FPGA. + + + It is anticipated that the majority of USRP users will never need to + use anything other than the standard FPGA configuration. However, for + those users that wish to, the FPGA design may be changed or replaced. + All of the interfaces are well defined and documented. + +
+ USRP with Daughterboards + + + + This USRP has 2 BasicTX and 2 BasicRX boards mounted on it. + Notice that the boards on the left are rotated 180 degrees. + + +
+ + + System Requirements + + The USRP requires a PC or Mac with a USB2 interface. + + + + + Capabilities + + The USRP has 4 high-speed analog to digital converters (ADCs), each at + 12 bits per sample, 64 million samples per second. There are also + 4 high-speed digital to analog converters (DACs), each at 14 bits per + sample, 128 million samples per second. These 4 input and 4 output + channels are connected to an Altera Cyclone EP1C12 FPGA. The FPGA, in + turn, connects to a USB2 interface chip, the Cypress FX2, and on to the + computer. The USRP connects to the computer via a high speed USB2 + interface only, and will not work with USB1.1. + +
Universal Software Radio Peripheral + + + + + +
+ + + + Getting Started + + Getting all the Software + + The first step in using your USRP system is to get all of GNU Radio installed. This can + sometimes be a daunting process, as there are several other libraries which will need to be + installed first. + + + Library Dependencies + + + SWIG + + We use SWIG (Simple Wrapper Interface Generator) to tie together the C++ and Python code + in the GNU Radio system. We require that you have version 1.3.24 or newer. You'll + probably have to compile it from source, which you can find here: SWIG + + + + FFTW + + FFTW is the library which GNU Radio uses for FFTs. GNU Radio requires version 3.0.1 or + newer, and it must be compiled for single precision. You can get it from the + FFTW Homepage + + + + Boost Library + + Boost provides several low-level structures used in our C++ code. If it is not included in + your OS distribution, you can get it here: Boost + + + + CPP Unit + + CPPUnit provides our unit-testing framework. This creates automated tests to insure that + code does not break when changes are made. Get it at the + CPP Unit Homepage + + + + + + Getting GNU Radio and the USRP code + + There are several packages of software which make up GNU Radio and the USRP support software. + Links to the latest versions of each can be found on the GNU Radio Wiki at + Download Links. Gr-build + can greatly simplify the installation process, and its use it highly recommended. + + + + Following CVS Development + + Development for the USRP proceeds very quickly at times, so some users may want to keep up with + the latest by following the CVS trees. There are three separate software repositories + which contain various parts of the USRP system. + + + + USRP-HW, containing the hardware and FPGA designs. + + + All of the schematics in this repository were created in + gEDA. The board + layouts were created in PCB. + Verilog designs are compiled in Quartus II Web Edition from + Altera. + + + + + USRP-SW, + USRP-SW, containing firmware and host drivers for the USRP + + + Host side drivers and firmware which runs in the USB2 interface chip on the board. + + + + + GNU Radio/gr-usrp + which contains the GNU Radio interface to the USRP + + + + + + + + Using your USRP + + Mechanical Connection + + The USRP ships with a complete set of standoffs, nuts and bolts. There are 20 standoffs, + M3x10mm M-F, of which 4 are intended to be used as "feet" for the USRP. Place them in the 4 + corner holes on the main board, inserting the male part from below. The remaining 16 + are used to hold the daughterboards in place. Four of them should be connected to the male + portion of the 4 standoffs already inserted from below. The remaining 12 should be + connected to the board with the 12 M3x6mm screws from below. At this point there should be + 16 standoffs on the board with the male ends up to serve as a guide for the daughterboards. + The 16 M3 nuts are used to fasten the daughterboards down to the main board. + + + The USRP accomodates 2 TX and 2 RX daughterboards. The placement of the standoffs is designed + to prevent the accidental incorrect connection of daughterboards. The 2 sides of the USRP have + their daughterboard slots rotated 180 degrees. The USRP should not be operated without + standoffs, and daughterboards should never be connected or removed while power is applied. + + + + Electrical Connections + + The USRP is powered by a 6V 4A power converter included in the kit. The converter is + capable of 90-260 Vac, 50/60 Hz operation, and so should work in any country. + If there is a need to use another power supply, the connector is a standard 2.1mm/5.5mm + DC power connector. The USRP itself only needs 5V at 2A, but a 6V supply was chosen to + accomodate future daughterboards. Extra power supplies are available from Ettus Research. + + + The included USB cable should be connected to a USB2-capable socket on a computer. The USRP + does not support USB 1.1 operation at this time. + + + + Troubleshooting + + When first powered up, an LED on the USRP should be flashing at about 3-4x per second. + This indicates that the processor is running, and has put the device in a low power mode. + Once firmware has been downloaded to the USRP, the LED will blink at a slower rate. + If there is no blinking LED, check all power connections, and check for continuity + in the power fuse (F501, near the power connector). If the fuse needs replacement, it + is size 0603, 3 amps. + + + + + + FPGA + + Standard FPGA Configuration + + In the standard fpga configuration, usrp_std, all samples sent over + the USB interface are in 16-bit signed integers in IQ format. When + there are multiple channels (up to 4), the channels are interleaved. + For example, with 4 channels, the sequence would be I0 Q0 I1 Q1 I2 Q2 + I3 Q3 I0 Q0, etc. + + + The USRP can operate in full duplex mode. When in this mode, the + transmit and receive sides are completely independent of one another. + The only consideration is that the combined data rate over the bus + must be 32 Megabytes per second or less. The multiple RX channels + (1,2, or 4) must all be the same data rate (i.e. same decimation + ratio). The same applies to the 1,2, or TX channels, which each must + be at the same data rate (which may be different from the RX rate). + + + On the RX side, each of the 4 ADCs can be routed to either of I or the + Q input of any of the 4 downconverters. This allows for having + multiple channels selected out of the same ADC sample stream. + + + The digital upconverters (DUCs) on the transmit side are actually + contained in the AD9862 CODEC chips, not in the FPGA. The only + transmit signal processing blocks in the FPGA are the interpolators. + The interpolator outputs can be routed to any of the 4 CODEC inputs. + +
Digital Down Converter Block Diagram + + + + + +
+ + + + + Daughterboard Interface + + Power + + Daughterboards are provided with clean regulated 3.3V for the analog + and digital sections. Additionally there is a 6V connection straight from + the wall supply which is intended to supply a 5V LDO regulator. All daughterboards + may draw a combined total of 1.5 A. + + + + Logical Interface + + There are slots for 2 TX daughterboards, labeled TXA and TXB, and 2 + corresponding RX daughterboards, RXA and RXB. Each daughterboard slot has + access to 2 of the 4 high-speed data converter analog signals (DAC outputs + for TX, ADC inputs for RX). This allows each daughterboard which uses real + (not IQ) sampling to have 2 independent RF sections, and 2 antennas + (4 total for the system). If IQ sampling is used, each board can support + a single RF section, for a total of 2 for the whole system. + + + No antialias or reconstruction filtering is provided on the USRP motherboard. + This allows for maximum flexibility in frequency planning for the + daughterboards. The analog input bandwidth of the ADCs is over 200 MHz, so + IF frequencies up to that high may be chosen. If several decibels of loss + is tolerable, and IF frequency as high as 500 MHz can be used. + + + Every daughterboard has an I2C EEPROM (24LC024 or 24LC025) onboard + which identifies the board to the system. This allows the host + software to automatically set up the system properly based on the + installed daughterboard. The EEPROM may also store calibration values + like DC offsets or IQ imbalances. If this EEPROM is not programmed, a + warning message is printed every time USRP software is run. + + + + Analog Interface + + Each RX daughterboard has 2 differential analog inputs + (VINP_A/VINN_A and VINP_B/VINN_B) which are sampled at a rate of 64 MS/s. + The input impedance is approximately 1Kohm. + The motherboard has a software-controllable programmable gain amplifier + on these inputs, with 0 to 20 dB of gain. With gain set to zero, full + scale inputs are 2 Volts peak-to-peak differential. When set to 20 dB, + only .2 V pk-pk differential is needed to reach full scale. + + + If signals are AC-coupled, there is no need to provide DC bias as long as the + internal buffer is turned on. It will provide an approximately 2V bias. + If signals are DC-couple, a DC bias of Vdd/2 (1.65V) should be provided to + both the positive and negative inputs, and the internal buffer should be turned off. + VREF provides a clean 1 V reference. + + + Each TX daughterboard has a pair of differential analog outputs which are + updated at 128 MS/s. The signals (IOUTP_A/IOUTN_A and IOUTP_B/IOUTN_B) are + current-output, each varying between 0 and 20 mA. Since they are high-impedance, + they can be converted into differential voltages with a resistor. + + + In addition to the high-speed signals, each daughterboard has exclusive access to 2 low-speed ADC inputs + (labeled AUX_ADC_A and AUX_ADC_B) which can be read from software. + These are useful for sensing RSSI signal levels, temperatures, bias + levels, etc. Additionally, each board has shared access to 4 low-speed DAC + signals, labeled AUX_DAC_A through AUX_DAC_D. RXA and TXA share one set + of these 4 lines, and RXB and TXB share their own independent set. These + signals are useful for controlling gain of variable-gain amplifiers, for example. + AUX_ADC_REF provides a reference level for gain setting if it is necessary. + + + + + Digital Interface + + + + Connector Pinouts + + RX DBoard Connector + + + + Pin # + Name + Description + + + + + 1 + power + This is power + + + c1 + c4 + + + d1 + d4 + d5 + + + +
+ + + + Available Daughterboards + + BasicRX + + + + + BasicTX + + + + +
diff --git a/firmware/Makefile.am b/firmware/Makefile.am new file mode 100644 index 0000000..16a03cc --- /dev/null +++ b/firmware/Makefile.am @@ -0,0 +1,22 @@ +# +# Copyright 2003 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +SUBDIRS = include lib src diff --git a/firmware/include/Makefile.am b/firmware/include/Makefile.am new file mode 100644 index 0000000..7f58d19 --- /dev/null +++ b/firmware/include/Makefile.am @@ -0,0 +1,59 @@ +# +# Copyright 2003 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +include_HEADERS = \ + usrp_i2c_addr.h \ + usrp_spi_defs.h + + +noinst_HEADERS = \ + delay.h \ + fpga_regs_common.h \ + fpga_regs_common.v \ + fpga_regs_standard.h \ + fpga_regs_standard.v \ + fpga_regs0.h \ + fx2regs.h \ + fx2utils.h \ + i2c.h \ + isr.h \ + syncdelay.h \ + timer.h \ + usb_common.h \ + usb_descriptors.h \ + usb_requests.h \ + usrp_commands.h \ + usrp_config.h \ + usrp_ids.h \ + usrp_interfaces.h + + +CODE_GENERATOR = \ + generate_regs.py + +EXTRA_DIST = \ + $(CODE_GENERATOR) + +fpga_regs_common.v: fpga_regs_common.h generate_regs.py + PYTHONPATH=$(top_srcdir)/usrp/firmware/include $(srcdir)/generate_regs.py $< $@ + +fpga_regs_standard.v: fpga_regs_standard.h generate_regs.py + PYTHONPATH=$(top_srcdir)/usrp/firmware/include $(srcdir)/generate_regs.py $< $@ diff --git a/firmware/include/delay.h b/firmware/include/delay.h new file mode 100644 index 0000000..c0ef19a --- /dev/null +++ b/firmware/include/delay.h @@ -0,0 +1,38 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifndef _DELAY_H_ +#define _DELAY_H_ + +/* + * delay for approximately usecs microseconds + * Note limit of 255 usecs. + */ +void udelay (unsigned char usecs); + +/* + * delay for approximately msecs milliseconds + */ +void mdelay (unsigned short msecs); + + +#endif /* _DELAY_H_ */ diff --git a/firmware/include/fpga_regs0.h b/firmware/include/fpga_regs0.h new file mode 100644 index 0000000..fd591dd --- /dev/null +++ b/firmware/include/fpga_regs0.h @@ -0,0 +1,42 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifndef _FPGA_REGS0_H_ +#define _FPGA_REGS0_H_ + +#define FR_RX_FREQ_0 0 +#define FR_RX_FREQ_1 1 +#define FR_RX_FREQ_2 2 +#define FR_RX_FREQ_3 3 +#define FR_TX_FREQ_0 4 +#define FR_TX_FREQ_1 5 +#define FR_TX_FREQ_2 6 +#define FR_TX_FREQ_3 7 +#define FR_COMBO 8 + + +#define FR_ADC_CLK_DIV 128 // pseudo regs mapped to FR_COMBO by f/w +#define FR_EXT_CLK_DIV 129 +#define FR_INTERP 130 +#define FR_DECIM 131 + +#endif diff --git a/firmware/include/fpga_regs_common.h b/firmware/include/fpga_regs_common.h new file mode 100644 index 0000000..3272fdf --- /dev/null +++ b/firmware/include/fpga_regs_common.h @@ -0,0 +1,147 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003,2004 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ +#ifndef INCLUDED_FPGA_REGS_COMMON_H +#define INCLUDED_FPGA_REGS_COMMON_H + +// This file defines registers common to all FPGA configurations. +// Registers 0 to 31 are reserved for use in this file. + + +// The FPGA needs to know the rate that samples are coming from and +// going to the A/D's and D/A's. div = 128e6 / sample_rate + +#define FR_TX_SAMPLE_RATE_DIV 0 +#define FR_RX_SAMPLE_RATE_DIV 1 + +// 2 is available. +// 3 is available. + +#define FR_MASTER_CTRL 4 // master enable and reset controls +# define bmFR_MC_ENABLE_TX (1 << 0) +# define bmFR_MC_ENABLE_RX (1 << 1) +# define bmFR_MC_RESET_TX (1 << 2) +# define bmFR_MC_RESET_RX (1 << 3) + +// i/o direction registers for pins that go to daughterboards. +// Setting the bit makes it an output from the FPGA to the d'board. +// top 16 is mask, low 16 is value + +#define FR_OE_0 5 // slot 0 +#define FR_OE_1 6 +#define FR_OE_2 7 +#define FR_OE_3 8 + +// i/o registers for pins that go to daughterboards. +// top 16 is a mask, low 16 is value + +#define FR_IO_0 9 // slot 0 +#define FR_IO_1 10 +#define FR_IO_2 11 +#define FR_IO_3 12 + +#define FR_MODE 13 +# define bmFR_MODE_NORMAL 0 +# define bmFR_MODE_LOOPBACK (1 << 0) // enable digital loopback +# define bmFR_MODE_RX_COUNTING (1 << 1) // Rx is counting +# define bmFR_MODE_RX_COUNTING_32BIT (1 << 2) // Rx is counting with a 32 bit counter + // low and high 16 bits are multiplexed across channel I and Q + + +// If the corresponding bit is set, internal FPGA debug circuitry +// controls the i/o pins for the associated bank of daughterboard +// i/o pins. Typically used for debugging FPGA designs. + +#define FR_DEBUG_EN 14 +# define bmFR_DEBUG_EN_TX_A (1 << 0) // debug controls TX_A i/o +# define bmFR_DEBUG_EN_RX_A (1 << 1) // debug controls RX_A i/o +# define bmFR_DEBUG_EN_TX_B (1 << 2) // debug controls TX_B i/o +# define bmFR_DEBUG_EN_RX_B (1 << 3) // debug controls RX_B i/o + + +// If the corresponding bit is set, enable the automatic DC +// offset correction control loop. +// +// The 4 low bits are significant: +// +// ADC0 = (1 << 0) +// ADC1 = (1 << 1) +// ADC2 = (1 << 2) +// ADC3 = (1 << 3) +// +// This control loop works if the attached daugherboard blocks DC. +// Currently all daughterboards do block DC. This includes: +// basic rx, dbs_rx, tv_rx, flex_xxx_rx. + +#define FR_DC_OFFSET_CL_EN 15 // DC Offset Control Loop Enable + + +// offset corrections for ADC's and DAC's (2's complement) + +#define FR_ADC_OFFSET_0 16 +#define FR_ADC_OFFSET_1 17 +#define FR_ADC_OFFSET_2 18 +#define FR_ADC_OFFSET_3 19 + + +// ------------------------------------------------------------------------ +// Automatic Transmit/Receive switching +// +// If automatic transmit/receive (ATR) switching is enabled in the +// FR_ATR_CTL register, the presence or absence of data in the FPGA +// transmit fifo selects between two sets of values for each of the 4 +// banks of daughterboard i/o pins. +// +// Each daughterboard slot has 3 16-bit registers associated with it: +// FR_ATR_MASK_*, FR_ATR_TXVAL_* and FR_ATR_RXVAL_* +// +// FR_ATR_MASK_{0,1,2,3}: +// +// These registers determine which of the daugherboard i/o pins are +// affected by ATR switching. If a bit in the mask is set, the +// corresponding i/o bit is controlled by ATR, else it's output +// value comes from the normal i/o pin output register: +// FR_IO_{0,1,2,3}. +// +// FR_ATR_TXVAL_{0,1,2,3}: +// FR_ATR_RXVAL_{0,1,2,3}: +// +// If the Tx fifo contains data, then the bits from TXVAL that are +// selected by MASK are output. Otherwise, the bits from RXVAL that +// are selected by MASK are output. + +#define FR_ATR_MASK_0 20 // slot 0 +#define FR_ATR_TXVAL_0 21 +#define FR_ATR_RXVAL_0 22 + +#define FR_ATR_MASK_1 23 // slot 1 +#define FR_ATR_TXVAL_1 24 +#define FR_ATR_RXVAL_1 25 + +#define FR_ATR_MASK_2 26 // slot 2 +#define FR_ATR_TXVAL_2 27 +#define FR_ATR_RXVAL_2 28 + +#define FR_ATR_MASK_3 29 // slot 3 +#define FR_ATR_TXVAL_3 30 +#define FR_ATR_RXVAL_3 31 + +#endif /* INCLUDED_FPGA_REGS_COMMON_H */ diff --git a/firmware/include/fpga_regs_common.v b/firmware/include/fpga_regs_common.v new file mode 100644 index 0000000..ee87ac0 --- /dev/null +++ b/firmware/include/fpga_regs_common.v @@ -0,0 +1,114 @@ +// +// This file is machine generated from fpga_regs_common.h +// Do not edit by hand; your edits will be overwritten. +// + +// This file defines registers common to all FPGA configurations. +// Registers 0 to 31 are reserved for use in this file. + + +// The FPGA needs to know the rate that samples are coming from and +// going to the A/D's and D/A's. div = 128e6 / sample_rate + +`define FR_TX_SAMPLE_RATE_DIV 7'd0 +`define FR_RX_SAMPLE_RATE_DIV 7'd1 + +// 2 is available. +// 3 is available. + +`define FR_MASTER_CTRL 7'd4 // master enable and reset controls + +// i/o direction registers for pins that go to daughterboards. +// Setting the bit makes it an output from the FPGA to the d'board. +// top 16 is mask, low 16 is value + +`define FR_OE_0 7'd5 // slot 0 +`define FR_OE_1 7'd6 +`define FR_OE_2 7'd7 +`define FR_OE_3 7'd8 + +// i/o registers for pins that go to daughterboards. +// top 16 is a mask, low 16 is value + +`define FR_IO_0 7'd9 // slot 0 +`define FR_IO_1 7'd10 +`define FR_IO_2 7'd11 +`define FR_IO_3 7'd12 + +`define FR_MODE 7'd13 + + +// If the corresponding bit is set, internal FPGA debug circuitry +// controls the i/o pins for the associated bank of daughterboard +// i/o pins. Typically used for debugging FPGA designs. + +`define FR_DEBUG_EN 7'd14 + + +// If the corresponding bit is set, enable the automatic DC +// offset correction control loop. +// +// The 4 low bits are significant: +// +// ADC0 = (1 << 0) +// ADC1 = (1 << 1) +// ADC2 = (1 << 2) +// ADC3 = (1 << 3) +// +// This control loop works if the attached daugherboard blocks DC. +// Currently all daughterboards do block DC. This includes: +// basic rx, dbs_rx, tv_rx, flex_xxx_rx. + +`define FR_DC_OFFSET_CL_EN 7'd15 // DC Offset Control Loop Enable + + +// offset corrections for ADC's and DAC's (2's complement) + +`define FR_ADC_OFFSET_0 7'd16 +`define FR_ADC_OFFSET_1 7'd17 +`define FR_ADC_OFFSET_2 7'd18 +`define FR_ADC_OFFSET_3 7'd19 + + +// ------------------------------------------------------------------------ +// Automatic Transmit/Receive switching +// +// If automatic transmit/receive (ATR) switching is enabled in the +// FR_ATR_CTL register, the presence or absence of data in the FPGA +// transmit fifo selects between two sets of values for each of the 4 +// banks of daughterboard i/o pins. +// +// Each daughterboard slot has 3 16-bit registers associated with it: +// FR_ATR_MASK_*, FR_ATR_TXVAL_* and FR_ATR_RXVAL_* +// +// FR_ATR_MASK_{0,1,2,3}: +// +// These registers determine which of the daugherboard i/o pins are +// affected by ATR switching. If a bit in the mask is set, the +// corresponding i/o bit is controlled by ATR, else it's output +// value comes from the normal i/o pin output register: +// FR_IO_{0,1,2,3}. +// +// FR_ATR_TXVAL_{0,1,2,3}: +// FR_ATR_RXVAL_{0,1,2,3}: +// +// If the Tx fifo contains data, then the bits from TXVAL that are +// selected by MASK are output. Otherwise, the bits from RXVAL that +// are selected by MASK are output. + +`define FR_ATR_MASK_0 7'd20 // slot 0 +`define FR_ATR_TXVAL_0 7'd21 +`define FR_ATR_RXVAL_0 7'd22 + +`define FR_ATR_MASK_1 7'd23 // slot 1 +`define FR_ATR_TXVAL_1 7'd24 +`define FR_ATR_RXVAL_1 7'd25 + +`define FR_ATR_MASK_2 7'd26 // slot 2 +`define FR_ATR_TXVAL_2 7'd27 +`define FR_ATR_RXVAL_2 7'd28 + +`define FR_ATR_MASK_3 7'd29 // slot 3 +`define FR_ATR_TXVAL_3 7'd30 +`define FR_ATR_RXVAL_3 7'd31 + diff --git a/firmware/include/fpga_regs_standard.h b/firmware/include/fpga_regs_standard.h new file mode 100644 index 0000000..3c46422 --- /dev/null +++ b/firmware/include/fpga_regs_standard.h @@ -0,0 +1,284 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003,2004,2006 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ +#ifndef INCLUDED_FPGA_REGS_STANDARD_H +#define INCLUDED_FPGA_REGS_STANDARD_H + +// Register numbers 0 to 31 are reserved for use in fpga_regs_common.h. +// Registers 64 to 79 are available for custom FPGA builds. + + +// DDC / DUC + +#define FR_INTERP_RATE 32 // [1,1024] +#define FR_DECIM_RATE 33 // [1,256] + +// DDC center freq + +#define FR_RX_FREQ_0 34 +#define FR_RX_FREQ_1 35 +#define FR_RX_FREQ_2 36 +#define FR_RX_FREQ_3 37 + +// See below for DDC Starting Phase + +// ------------------------------------------------------------------------ +// configure FPGA Rx mux +// +// 3 2 1 +// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +// +-----------------------+-------+-------+-------+-------+-+-----+ +// | must be zero | Q3| I3| Q2| I2| Q1| I1| Q0| I0|Z| NCH | +// +-----------------------+-------+-------+-------+-------+-+-----+ +// +// There are a maximum of 4 digital downconverters in the the FPGA. +// Each DDC has two 16-bit inputs, I and Q, and two 16-bit outputs, I & Q. +// +// DDC I inputs are specified by the two bit fields I3, I2, I1 & I0 +// +// 0 = DDC input is from ADC 0 +// 1 = DDC input is from ADC 1 +// 2 = DDC input is from ADC 2 +// 3 = DDC input is from ADC 3 +// +// If Z == 1, all DDC Q inputs are set to zero +// If Z == 0, DDC Q inputs are specified by the two bit fields Q3, Q2, Q1 & Q0 +// +// NCH specifies the number of complex channels that are sent across +// the USB. The legal values are 1, 2 or 4, corresponding to 2, 4 or +// 8 16-bit values. + +#define FR_RX_MUX 38 + +// ------------------------------------------------------------------------ +// configure FPGA Tx Mux. +// +// 3 2 1 +// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +// +-----------------------+-------+-------+-------+-------+-+-----+ +// | | DAC3 | DAC2 | DAC1 | DAC0 |0| NCH | +// +-----------------------------------------------+-------+-+-----+ +// +// NCH specifies the number of complex channels that are sent across +// the USB. The legal values are 1 or 2, corresponding to 2 or 4 +// 16-bit values. +// +// There are two interpolators with complex inputs and outputs. +// There are four DACs. (We use the DUC in each AD9862.) +// +// Each 4-bit DACx field specifies the source for the DAC and +// whether or not that DAC is enabled. Each subfield is coded +// like this: +// +// 3 2 1 0 +// +-+-----+ +// |E| N | +// +-+-----+ +// +// Where E is set if the DAC is enabled, and N specifies which +// interpolator output is connected to this DAC. +// +// N which interp output +// --- ------------------- +// 0 chan 0 I +// 1 chan 0 Q +// 2 chan 1 I +// 3 chan 1 Q + +#define FR_TX_MUX 39 + +// ------------------------------------------------------------------------ +// REFCLK control +// +// Control whether a reference clock is sent to the daughterboards, +// and what frequency. The refclk is sent on d'board i/o pin 0. +// +// 3 2 1 +// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +// +-----------------------------------------------+-+------------+ +// | Reserved (Must be zero) |E| DIVISOR | +// +-----------------------------------------------+-+------------+ + +// +// Bit 7 -- 1 turns on refclk, 0 allows IO use +// Bits 6:0 Divider value + +#define FR_TX_A_REFCLK 40 +#define FR_RX_A_REFCLK 41 +#define FR_TX_B_REFCLK 42 +#define FR_RX_B_REFCLK 43 + +# define bmFR_REFCLK_EN 0x80 +# define bmFR_REFCLK_DIVISOR_MASK 0x7f + +// ------------------------------------------------------------------------ +// DDC Starting Phase + +#define FR_RX_PHASE_0 44 +#define FR_RX_PHASE_1 45 +#define FR_RX_PHASE_2 46 +#define FR_RX_PHASE_3 47 + +// ------------------------------------------------------------------------ +// Tx data format control register +// +// 3 2 1 +// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +// +-------------------------------------------------------+-------+ +// | Reserved (Must be zero) | FMT | +// +-------------------------------------------------------+-------+ +// +// FMT values: + +#define FR_TX_FORMAT 48 +# define bmFR_TX_FORMAT_16_IQ 0 // 16-bit I, 16-bit Q + +// ------------------------------------------------------------------------ +// Rx data format control register +// +// 3 2 1 +// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +// +-----------------------------------------+-+-+---------+-------+ +// | Reserved (Must be zero) |B|Q| WIDTH | SHIFT | +// +-----------------------------------------+-+-+---------+-------+ +// +// FMT values: + +#define FR_RX_FORMAT 49 + +# define bmFR_RX_FORMAT_SHIFT_MASK (0x0f << 0) // arithmetic right shift [0, 15] +# define bmFR_RX_FORMAT_SHIFT_SHIFT 0 +# define bmFR_RX_FORMAT_WIDTH_MASK (0x1f << 4) // data width in bits [1, 16] (not all valid) +# define bmFR_RX_FORMAT_WIDTH_SHIFT 4 +# define bmFR_RX_FORMAT_WANT_Q (0x1 << 9) // deliver both I & Q, else just I +# define bmFR_RX_FORMAT_BYPASS_HB (0x1 << 10) // bypass half-band filter + +// The valid combinations currently are: +// +// B Q WIDTH SHIFT +// 0 1 16 0 +// 0 1 8 8 + + +// Possible future values of WIDTH = {4, 2, 1} +// 12 takes a bit more work, since we need to know packet alignment. + +// ------------------------------------------------------------------------ +// FIXME register numbers 50 to 63 are available + +// ------------------------------------------------------------------------ +// Registers 64 to 79 are reserved for user custom FPGA builds. +// The standard USRP software will not touch these. + +#define FR_USER_0 64 +#define FR_USER_1 65 +#define FR_USER_2 66 +#define FR_USER_3 67 +#define FR_USER_4 68 +#define FR_USER_5 69 +#define FR_USER_6 70 +#define FR_USER_7 71 +#define FR_USER_8 72 +#define FR_USER_9 73 +#define FR_USER_10 74 +#define FR_USER_11 75 +#define FR_USER_12 76 +#define FR_USER_13 77 +#define FR_USER_14 78 +#define FR_USER_15 79 + +//Registers needed for multi usrp master/slave configuration +// +//Rx Master/slave control register (FR_RX_MASTER_SLAVE = FR_USER_0) +// +#define FR_RX_MASTER_SLAVE 64 +#define bitnoFR_RX_SYNC 0 +#define bitnoFR_RX_SYNC_MASTER 1 +#define bitnoFR_RX_SYNC_SLAVE 2 +# define bmFR_RX_SYNC (1 < list above. + * addr is the address of the interrupt service routine. + */ +void hook_sv (unsigned char vector_number, unsigned short addr); + +/* + * Hook usb interrupt vector. + * + * vector_number is from the UV_ list above. + * addr is the address of the interrupt service routine. + */ +void hook_uv (unsigned char vector_number, unsigned short addr); + +/* + * Hook fifo/gpif interrupt vector. + * + * vector_number is from the FGV_ list above. + * addr is the address of the interrupt service routine. + */ +void hook_fgv (unsigned char vector_number, unsigned short addr); + +/* + * One time call to enable autovectoring for both USB and FIFO/GPIF + */ +void setup_autovectors (void); + + +/* + * Must be called in each usb interrupt handler + */ +#define clear_usb_irq() \ + EXIF &= ~bmEXIF_USBINT; \ + INT2CLR = 0 + +/* + * Must be calledin each fifo/gpif interrupt handler + */ +#define clear_fifo_gpif_irq() \ + EXIF &= ~bmEXIF_IE4; \ + INT4CLR = 0 + +#endif /* _ISR_H_ */ diff --git a/firmware/include/syncdelay.h b/firmware/include/syncdelay.h new file mode 100644 index 0000000..fa67338 --- /dev/null +++ b/firmware/include/syncdelay.h @@ -0,0 +1,65 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ +#ifndef _SYNCDELAY_H_ +#define _SYNCDELAY_H_ + +/* + * Magic delay required between access to certain xdata registers (TRM page 15-106). + * For our configuration, 48 MHz FX2 / 48 MHz IFCLK, we need three cycles. Each + * NOP is a single cycle.... + * + * From TRM page 15-105: + * + * Under certain conditions, some read and write access to the FX2 registers must + * be separated by a "synchronization delay". The delay is necessary only under the + * following conditions: + * + * - between a write to any register in the 0xE600 - 0xE6FF range and a write to one + * of the registers listed below. + * + * - between a write to one of the registers listed below and a read from any register + * in the 0xE600 - 0xE6FF range. + * + * Registers which require a synchronization delay: + * + * FIFORESET FIFOPINPOLAR + * INPKTEND EPxBCH:L + * EPxFIFOPFH:L EPxAUTOINLENH:L + * EPxFIFOCFG EPxGPIFFLGSEL + * PINFLAGSAB PINFLAGSCD + * EPxFIFOIE EPxFIFOIRQ + * GPIFIE GPIFIRQ + * UDMACRCH:L GPIFADRH:L + * GPIFTRIG EPxGPIFTRIG + * OUTPKTEND REVCTL + * GPIFTCB3 GPIFTCB2 + * GPIFTCB1 GPIFTCB0 + */ + +/* + * FIXME ensure that the peep hole optimizer isn't screwing us + */ +#define SYNCDELAY _asm nop; nop; nop; _endasm +#define NOP _asm nop; _endasm + + +#endif /* _SYNCDELAY_H_ */ diff --git a/firmware/include/timer.h b/firmware/include/timer.h new file mode 100644 index 0000000..7bb640e --- /dev/null +++ b/firmware/include/timer.h @@ -0,0 +1,35 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifndef _TIMER_H_ +#define _TIMER_H_ + +/* + * Arrange to have isr_tick_handler called at 100 Hz + */ +void hook_timer_tick (unsigned short isr_tick_handler); + +#define clear_timer_irq() \ + TF2 = 0 /* clear overflow flag */ + + +#endif /* _TIMER_H_ */ diff --git a/firmware/include/usb_common.h b/firmware/include/usb_common.h new file mode 100644 index 0000000..f8e26be --- /dev/null +++ b/firmware/include/usb_common.h @@ -0,0 +1,37 @@ +/* -*- c -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifndef _USB_COMMON_H_ +#define _USB_COMMON_H_ + +extern volatile bit _usb_got_SUDAV; + +// Provided by user application to handle VENDOR commands. +// returns non-zero if it handled the command. +unsigned char app_vendor_cmd (void); + +void usb_install_handlers (void); +void usb_handle_setup_packet (void); + +#define usb_setup_packet_avail() _usb_got_SUDAV + +#endif /* _USB_COMMON_H_ */ diff --git a/firmware/include/usb_descriptors.h b/firmware/include/usb_descriptors.h new file mode 100644 index 0000000..68390d7 --- /dev/null +++ b/firmware/include/usb_descriptors.h @@ -0,0 +1,40 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +extern xdata const char high_speed_device_descr[]; +extern xdata const char high_speed_devqual_descr[]; +extern xdata const char high_speed_config_descr[]; + +extern xdata const char full_speed_device_descr[]; +extern xdata const char full_speed_devqual_descr[]; +extern xdata const char full_speed_config_descr[]; + +extern xdata unsigned char nstring_descriptors; +extern xdata char * xdata string_descriptors[]; + +/* + * We patch these locations with info read from the usrp config eeprom + */ +extern xdata char usb_desc_hw_rev_binary_patch_location_0[]; +extern xdata char usb_desc_hw_rev_binary_patch_location_1[]; +extern xdata char usb_desc_hw_rev_ascii_patch_location_0[]; +extern xdata char usb_desc_serial_number_ascii[]; diff --git a/firmware/include/usb_requests.h b/firmware/include/usb_requests.h new file mode 100644 index 0000000..c4680b0 --- /dev/null +++ b/firmware/include/usb_requests.h @@ -0,0 +1,88 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +// Standard USB requests. +// These are contained in end point 0 setup packets + + +#ifndef _USB_REQUESTS_H_ +#define _USB_REQUESTS_H_ + +// format of bmRequestType byte + +#define bmRT_DIR_MASK (0x1 << 7) +#define bmRT_DIR_IN (1 << 7) +#define bmRT_DIR_OUT (0 << 7) + +#define bmRT_TYPE_MASK (0x3 << 5) +#define bmRT_TYPE_STD (0 << 5) +#define bmRT_TYPE_CLASS (1 << 5) +#define bmRT_TYPE_VENDOR (2 << 5) +#define bmRT_TYPE_RESERVED (3 << 5) + +#define bmRT_RECIP_MASK (0x1f << 0) +#define bmRT_RECIP_DEVICE (0 << 0) +#define bmRT_RECIP_INTERFACE (1 << 0) +#define bmRT_RECIP_ENDPOINT (2 << 0) +#define bmRT_RECIP_OTHER (3 << 0) + + +// standard request codes (bRequest) + +#define RQ_GET_STATUS 0 +#define RQ_CLEAR_FEATURE 1 +#define RQ_RESERVED_2 2 +#define RQ_SET_FEATURE 3 +#define RQ_RESERVED_4 4 +#define RQ_SET_ADDRESS 5 +#define RQ_GET_DESCR 6 +#define RQ_SET_DESCR 7 +#define RQ_GET_CONFIG 8 +#define RQ_SET_CONFIG 9 +#define RQ_GET_INTERFACE 10 +#define RQ_SET_INTERFACE 11 +#define RQ_SYNCH_FRAME 12 + +// standard descriptor types + +#define DT_DEVICE 1 +#define DT_CONFIG 2 +#define DT_STRING 3 +#define DT_INTERFACE 4 +#define DT_ENDPOINT 5 +#define DT_DEVQUAL 6 +#define DT_OTHER_SPEED 7 +#define DT_INTERFACE_POWER 8 + +// standard feature selectors + +#define FS_ENDPOINT_HALT 0 // recip: endpoint +#define FS_DEV_REMOTE_WAKEUP 1 // recip: device +#define FS_TEST_MODE 2 // recip: device + +// Get Status device attributes + +#define bmGSDA_SELF_POWERED 0x01 +#define bmGSDA_REM_WAKEUP 0x02 + + +#endif /* _USB_REQUESTS_H_ */ diff --git a/firmware/include/usrp_commands.h b/firmware/include/usrp_commands.h new file mode 100644 index 0000000..2487892 --- /dev/null +++ b/firmware/include/usrp_commands.h @@ -0,0 +1,99 @@ +/* + * USRP - Universal Software Radio Peripheral + * + * Copyright (C) 2003,2004 Free Software Foundation, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef _USRP_COMMANDS_H_ +#define _USRP_COMMANDS_H_ + +#include +#include + +#define MAX_EP0_PKTSIZE 64 // max size of EP0 packet on FX2 + +// ---------------------------------------------------------------- +// Vendor bmRequestType's +// ---------------------------------------------------------------- + +#define VRT_VENDOR_IN 0xC0 +#define VRT_VENDOR_OUT 0x40 + +// ---------------------------------------------------------------- +// USRP Vendor Requests +// +// Note that Cypress reserves [0xA0,0xAF]. +// 0xA0 is the firmware load function. +// ---------------------------------------------------------------- + + +// IN commands + +#define VRQ_GET_STATUS 0x80 +#define GS_TX_UNDERRUN 0 // wIndexL // returns 1 byte +#define GS_RX_OVERRUN 1 // wIndexL // returns 1 byte + +#define VRQ_I2C_READ 0x81 // wValueL: i2c address; length: how much to read + +#define VRQ_SPI_READ 0x82 // wValue: optional header bytes + // wIndexH: enables + // wIndexL: format + // len: how much to read + +// OUT commands + +#define VRQ_SET_LED 0x01 // wValueL off/on {0,1}; wIndexL: which {0,1} + +#define VRQ_FPGA_LOAD 0x02 +# define FL_BEGIN 0 // wIndexL: begin fpga programming cycle. stalls if trouble. +# define FL_XFER 1 // wIndexL: xfer up to 64 bytes of data +# define FL_END 2 // wIndexL: end programming cycle, check for success. + // stalls endpoint if trouble. + +#define VRQ_FPGA_WRITE_REG 0x03 // wIndexL: regno; data: 32-bit regval MSB first +#define VRQ_FPGA_SET_RESET 0x04 // wValueL: {0,1} +#define VRQ_FPGA_SET_TX_ENABLE 0x05 // wValueL: {0,1} +#define VRQ_FPGA_SET_RX_ENABLE 0x06 // wValueL: {0,1} +// see below VRQ_FPGA_SET_{TX,RX}_RESET + +#define VRQ_SET_SLEEP_BITS 0x07 // wValueH: mask; wValueL: bits. set bits given by mask to bits + +# define SLEEP_ADC0 0x01 +# define SLEEP_ADC1 0x02 +# define SLEEP_DAC0 0x04 +# define SLEEP_DAC1 0x08 + +#define VRQ_I2C_WRITE 0x08 // wValueL: i2c address; data: data + +#define VRQ_SPI_WRITE 0x09 // wValue: optional header bytes + // wIndexH: enables + // wIndexL: format + // len: how much to write + +#define VRQ_FPGA_SET_TX_RESET 0x0a // wValueL: {0, 1} +#define VRQ_FPGA_SET_RX_RESET 0x0b // wValueL: {0, 1} + + +// ------------------------------------------------------------------- +// we store the hashes at fixed addresses in the FX2 internal memory + +#define USRP_HASH_SLOT_0_ADDR 0xe1e0 +#define USRP_HASH_SLOT_1_ADDR 0xe1f0 + + + +#endif /* _USRP_COMMANDS_H_ */ diff --git a/firmware/include/usrp_config.h b/firmware/include/usrp_config.h new file mode 100644 index 0000000..6d87665 --- /dev/null +++ b/firmware/include/usrp_config.h @@ -0,0 +1,44 @@ +/* + * USRP - Universal Software Radio Peripheral + * + * Copyright (C) 2003 Free Software Foundation, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/* + * configuration stuff for debugging + */ + +/* + * Define to 0 for normal use of port A, i.e., FPGA control bus. + * Define to 1 to write trace to port A for scoping with logic analyzer. + */ +#define UC_TRACE_USING_PORT_A 0 + + +/* + * Define to 0 for normal use of low 3 bits of port E, i.e., A/D, D/A SLEEP bits. + * Define to 1 to enable by default driving the GPIF state to the + * low three bits of port E. + */ +#define UC_START_WITH_GSTATE_OUTPUT_ENABLED 0 + + +/* + * Define to 1 for normal use (the board really has an FPGA on it). + * Define to 0 for debug use on board without FPGA. + */ +#define UC_BOARD_HAS_FPGA 1 diff --git a/firmware/include/usrp_i2c_addr.h b/firmware/include/usrp_i2c_addr.h new file mode 100644 index 0000000..738bf2e --- /dev/null +++ b/firmware/include/usrp_i2c_addr.h @@ -0,0 +1,78 @@ +/* -*- c++ -*- */ +/* + * Copyright 2004 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ +#ifndef INCLUDED_USRP_I2C_ADDR_H +#define INCLUDED_USRP_I2C_ADDR_H + +// I2C addresses + +#define I2C_DEV_EEPROM 0x50 // 24LC02[45]: 7-bits 1010xxx + +#define I2C_ADDR_BOOT (I2C_DEV_EEPROM | 0x0) +#define I2C_ADDR_TX_A (I2C_DEV_EEPROM | 0x4) +#define I2C_ADDR_RX_A (I2C_DEV_EEPROM | 0x5) +#define I2C_ADDR_TX_B (I2C_DEV_EEPROM | 0x6) +#define I2C_ADDR_RX_B (I2C_DEV_EEPROM | 0x7) + + +// format of FX2 BOOT EEPROM +// 00: 0xC0 code for ``Read IDs from EEPROM'' +// 01: 0xFE USB Vendor ID (LSB) +// 02: 0xFF USB Vendor ID (MSB) +// 03: 0x02 USB Product ID (LSB) +// 04: 0x00 USB Product ID (MSB) +// 05: 0x01 USB Device ID (LSB) // rev1 +// 06: 0x00 USB Device ID (MSB) // 0 = unconfig'd (no firmware) +// 07: 0x00 option byte + + +// format of daughterboard EEPROM +// 00: 0xDB code for ``I'm a daughterboard'' +// 01: .. Daughterboard ID (LSB) +// 02: .. Daughterboard ID (MSB) +// 03: .. io bits 7-0 direction (bit set if it's an output from m'board) +// 04: .. io bits 15-8 direction (bit set if it's an output from m'board) +// 05: .. ADC0 DC offset correction (LSB) +// 06: .. ADC0 DC offset correction (MSB) +// 07: .. ADC1 DC offset correction (LSB) +// 08: .. ADC1 DC offset correction (MSB) +// ... +// 1f: .. negative of the sum of bytes [0x00, 0x1e] + +#define DB_EEPROM_MAGIC 0x00 +#define DB_EEPROM_MAGIC_VALUE 0xDB +#define DB_EEPROM_ID_LSB 0x01 +#define DB_EEPROM_ID_MSB 0x02 +#define DB_EEPROM_OE_LSB 0x03 +#define DB_EEPROM_OE_MSB 0x04 +#define DB_EEPROM_OFFSET_0_LSB 0x05 // offset correction for ADC or DAC 0 +#define DB_EEPROM_OFFSET_0_MSB 0x06 +#define DB_EEPROM_OFFSET_1_LSB 0x07 // offset correction for ADC or DAC 1 +#define DB_EEPROM_OFFSET_1_MSB 0x08 +#define DB_EEPROM_CHKSUM 0x1f + +#define DB_EEPROM_CLEN 0x20 // length of common portion of eeprom + +#define DB_EEPROM_CUSTOM_BASE DB_EEPROM_CLEN // first avail offset for + // daughterboard specific use + +#endif /* INCLUDED_USRP_I2C_ADDR_H */ + diff --git a/firmware/include/usrp_ids.h b/firmware/include/usrp_ids.h new file mode 100644 index 0000000..65c4755 --- /dev/null +++ b/firmware/include/usrp_ids.h @@ -0,0 +1,53 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +/* + * USB Vendor and Product IDs that we use + * + * (keep in sync with usb_descriptors.a51) + */ + +#ifndef _USRP_IDS_H_ +#define _USRP_IDS_H_ + +#define USB_VID_CYPRESS 0x04b4 +#define USB_PID_CYPRESS_FX2 0x8613 + + +#define USB_VID_FSF 0xfffe // Free Software Folks +#define USB_PID_FSF_EXP_0 0x0000 // Experimental 0 +#define USB_PID_FSF_EXP_1 0x0001 // Experimental 1 +#define USB_PID_FSF_USRP 0x0002 // Universal Software Radio Peripheral +#define USB_PID_FSF_USRP_reserved 0x0003 // Universal Software Radio Peripheral +#define USB_PID_FSF_SSRP 0x0004 // Simple Software Radio Peripheral +#define USB_PID_FSF_SSRP_reserved 0x0005 // Simple Software Radio Peripheral +#define USB_PID_FSF_HPSDR 0x0006 // High Performance Software Defined Radio (Internal Boot) +#define USB_PID_FSF_HPSDR_HA 0x0007 // High Performance Software Defined Radio (Host Assisted Boot) + +#define USB_PID_FSF_LBNL_UXO 0x0018 // http://recycle.lbl.gov/~ldoolitt/uxo/ + + +#define USB_DID_USRP_0 0x0000 // unconfigured rev 0 USRP +#define USB_DID_USRP_1 0x0001 // unconfigured rev 1 USRP +#define USB_DID_USRP_2 0x0002 // unconfigured rev 2 USRP + +#endif /* _USRP_IDS_H_ */ diff --git a/firmware/include/usrp_interfaces.h b/firmware/include/usrp_interfaces.h new file mode 100644 index 0000000..98432d1 --- /dev/null +++ b/firmware/include/usrp_interfaces.h @@ -0,0 +1,47 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifndef _USRP_INTERFACES_H_ +#define _USRP_INTERFACES_H_ + +/* + * We've now split the USRP into 3 separate interfaces. + * + * Interface 0 contains only ep0 and is used for command and status. + * Interface 1 is the Tx path and it uses ep2 OUT BULK. + * Interface 2 is the Rx path and it uses ep6 IN BULK. + */ + +#define USRP_CMD_INTERFACE 0 +#define USRP_CMD_ALTINTERFACE 0 +#define USRP_CMD_ENDPOINT 0 + +#define USRP_TX_INTERFACE 1 +#define USRP_TX_ALTINTERFACE 0 +#define USRP_TX_ENDPOINT 2 // streaming data from host to FPGA + +#define USRP_RX_INTERFACE 2 +#define USRP_RX_ALTINTERFACE 0 +#define USRP_RX_ENDPOINT 6 // streaming data from FPGA to host + + +#endif /* _USRP_INTERFACES_H_ */ diff --git a/firmware/include/usrp_spi_defs.h b/firmware/include/usrp_spi_defs.h new file mode 100644 index 0000000..8404d7c --- /dev/null +++ b/firmware/include/usrp_spi_defs.h @@ -0,0 +1,86 @@ +/* -*- c++ -*- */ +/* + * Copyright 2004 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifndef INCLUDED_USRP_SPI_DEFS_H +#define INCLUDED_USRP_SPI_DEFS_H + +/* + * defines for the VRQ_SPI_READ and VRQ_SPI_WRITE commands + * + * SPI == "Serial Port Interface". SPI is a 3 wire bus plus a + * separate enable for each peripheral. The common lines are SCLK, + * SDI and SDO. The FX2 always drives SCLK and SDI, the clock and + * data lines from the FX2 to the peripheral. When enabled, a + * peripheral may drive SDO, the data line from the peripheral to the + * FX2. + * + * The SPI_READ and SPI_WRITE commands are formatted identically. + * Each specifies which peripherals to enable, whether the bits should + * be transmistted Most Significant Bit first or Least Significant Bit + * first, the number of bytes in the optional header, and the number + * of bytes to read or write in the body. + * + * The body is limited to 64 bytes. The optional header may contain + * 0, 1 or 2 bytes. For an SPI_WRITE, the header bytes are + * transmitted to the peripheral followed by the the body bytes. For + * an SPI_READ, the header bytes are transmitted to the peripheral, + * then len bytes are read back from the peripheral. + */ + +/* + * SPI_FMT_* goes in wIndexL + */ +#define SPI_FMT_xSB_MASK (1 << 7) +# define SPI_FMT_LSB (1 << 7) // least signficant bit first +# define SPI_FMT_MSB (0 << 7) // most significant bit first +#define SPI_FMT_HDR_MASK (3 << 5) +# define SPI_FMT_HDR_0 (0 << 5) // 0 header bytes +# define SPI_FMT_HDR_1 (1 << 5) // 1 header byte +# define SPI_FMT_HDR_2 (2 << 5) // 2 header bytes + +/* + * SPI_ENABLE_* goes in wIndexH + * + * For the software interface, the enables are active high. + * For reads, it's an error to have more than one enable set. + * + * [FWIW, the hardware implements them as active low. Don't change the + * definitions of these. They are related to usrp_rev1_regs.h] + */ +#define SPI_ENABLE_FPGA 0x01 // select FPGA +#define SPI_ENABLE_CODEC_A 0x02 // select AD9862 A +#define SPI_ENABLE_CODEC_B 0x04 // select AD9862 B +#define SPI_ENABLE_reserved 0x08 +#define SPI_ENABLE_TX_A 0x10 // select d'board TX A +#define SPI_ENABLE_RX_A 0x20 // select d'board RX A +#define SPI_ENABLE_TX_B 0x40 // select d'board TX B +#define SPI_ENABLE_RX_B 0x80 // select d'board RX B + +/* + * If there's one header byte, it goes in wValueL. + * + * If there are two header bytes, they go in wValueH | wValueL. + * The transmit order of the bytes (and bits within them) is + * determined by SPI_FMT_*SB + */ + +#endif /* INCLUDED_USRP_SPI_DEFS_H */ diff --git a/firmware/lib/Makefile.am b/firmware/lib/Makefile.am new file mode 100644 index 0000000..3ddafcf --- /dev/null +++ b/firmware/lib/Makefile.am @@ -0,0 +1,83 @@ +# +# Copyright 2003 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +EXTRA_DIST = \ + delay.c \ + fx2utils.c \ + i2c.c \ + isr.c \ + timer.c \ + usb_common.c + + + +DEFINES= +INCLUDES=-I$(top_srcdir)/usrp/firmware/include + +# with EA = 0, the FX2 implements a portion of the 8051 "external memory" +# on chip. This memory is mapped like this: +# +# The bottom 8K of memory (0x0000 - 0x1fff) is used for both data and +# code accesses. There's also 512 bytes for data only from 0xe000 - 0xe1ff. +# +# We tell the linker to start the xdata segment at 0x1800, 6K up from +# the bottom. + +LINKOPTS = --code-loc 0x0000 --code-size 0x1800 --xram-loc 0x1800 --xram-size 0x0800 + +LIBRARY = libfx2.lib + +LIBOBJS = \ + delay.rel \ + fx2utils.rel \ + i2c.rel \ + isr.rel \ + timer.rel \ + usb_common.rel + + + +all: libfx2.lib + +%.rel : %.c + $(XCC) $(INCLUDES) $(DEFINES) -c $< -o $@ + +%.rel : %.a51 + $(XAS) $< + + +$(LIBRARY): $(LIBOBJS) + -rm -f $(LIBRARY) + touch $(LIBRARY) + for obj in $(LIBOBJS); do basename $$obj .rel >> $(LIBRARY) ; done + + +CLEANFILES = \ + *.ihx *.lnk *.lst *.map *.mem *.rel *.rst *.sym *.asm *.lib + +DISTCLEANFILES = \ + *.ihx *.lnk *.lst *.map *.mem *.rel *.rst *.sym *.asm *.lib + +install: all + + +# dependencies + diff --git a/firmware/lib/delay.c b/firmware/lib/delay.c new file mode 100644 index 0000000..c8bad7f --- /dev/null +++ b/firmware/lib/delay.c @@ -0,0 +1,76 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +/* + * Delay approximately 1 microsecond (including overhead in udelay). + */ +static void +udelay1 (void) _naked +{ + _asm ; lcall that got us here took 4 bus cycles + ret ; 4 bus cycles + _endasm; +} + +/* + * delay for approximately usecs microseconds + */ +void +udelay (unsigned char usecs) +{ + do { + udelay1 (); + } while (--usecs != 0); +} + + +/* + * Delay approximately 1 millisecond. + * We're running at 48 MHz, so we need 48,000 clock cycles. + * + * Note however, that each bus cycle takes 4 clock cycles (not obvious, + * but explains the factor of 4 problem below). + */ +static void +mdelay1 (void) _naked +{ + _asm + mov dptr,#(-1200 & 0xffff) +002$: + inc dptr ; 3 bus cycles + mov a, dpl ; 2 bus cycles + orl a, dph ; 2 bus cycles + jnz 002$ ; 3 bus cycles + + ret + _endasm; +} + +void +mdelay (unsigned int msecs) +{ + do { + mdelay1 (); + } while (--msecs != 0); +} + + diff --git a/firmware/lib/fx2utils.c b/firmware/lib/fx2utils.c new file mode 100644 index 0000000..544302e --- /dev/null +++ b/firmware/lib/fx2utils.c @@ -0,0 +1,54 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#include "fx2utils.h" +#include "fx2regs.h" +#include "delay.h" + +void +fx2_stall_ep0 (void) +{ + EP0CS |= bmEPSTALL; +} + +void +fx2_reset_data_toggle (unsigned char ep) +{ + TOGCTL = ((ep & 0x80) >> 3 | (ep & 0x0f)); + TOGCTL |= bmRESETTOGGLE; +} + +void +fx2_renumerate (void) +{ + USBCS |= bmDISCON | bmRENUM; + + // mdelay (1500); // FIXME why 1.5 seconds? + mdelay (250); // FIXME why 1.5 seconds? + + USBIRQ = 0xff; // clear any pending USB irqs... + EPIRQ = 0xff; // they're from before the renumeration + + EXIF &= ~bmEXIF_USBINT; + + USBCS &= ~bmDISCON; // reconnect USB +} diff --git a/firmware/lib/i2c-compiler-bug.c b/firmware/lib/i2c-compiler-bug.c new file mode 100644 index 0000000..ae97f1a --- /dev/null +++ b/firmware/lib/i2c-compiler-bug.c @@ -0,0 +1,129 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#include "i2c.h" +#include "fx2regs.h" +#include + + +// issue a stop bus cycle and wait for completion + + +// returns non-zero if successful, else 0 +unsigned char +i2c_read (unsigned char addr, xdata unsigned char *buf, unsigned char len) +{ + volatile unsigned char junk; + + if (len == 0) // reading zero bytes always works + return 1; + + // memset (buf, 0, len); // FIXME, remove + + while (I2CS & bmSTOP) // wait for stop to clear + ; + + + I2CS = bmSTART; + I2DAT = (addr << 1) | 1; // write address and direction (1's the read bit) + + while ((I2CS & bmDONE) == 0) + ; + + if ((I2CS & bmBERR) || (I2CS & bmACK) == 0) // no device answered... + goto fail; + + if (len == 1) + I2CS |= bmLASTRD; + + junk = I2DAT; // trigger the first read cycle + +#if 1 + while (len != 1){ + while ((I2CS & bmDONE) == 0) + ; + + if (I2CS & bmBERR) + goto fail; + + len--; + if (len == 1) + I2CS |= bmLASTRD; + + *buf++ = I2DAT; // get data, trigger another read + } +#endif + + // wait for final byte + + while ((I2CS & bmDONE) == 0) + ; + + if (I2CS & bmBERR) + goto fail; + + I2CS |= bmSTOP; + *buf = I2DAT; + + return 1; + + fail: + I2CS |= bmSTOP; + return 0; +} + + + +// returns non-zero if successful, else 0 +unsigned char +i2c_write (unsigned char addr, xdata const unsigned char *buf, unsigned char len) +{ + while (I2CS & bmSTOP) // wait for stop to clear + ; + + I2CS = bmSTART; + I2DAT = (addr << 1) | 0; // write address and direction (0's the write bit) + + while ((I2CS & bmDONE) == 0) + ; + + if ((I2CS & bmBERR) || (I2CS & bmACK) == 0) // no device answered... + goto fail; + + while (len > 0){ + I2DAT = *buf++; + len--; + + while ((I2CS & bmDONE) == 0) + ; + + if ((I2CS & bmBERR) || (I2CS & bmACK) == 0) // no device answered... + goto fail; + } + + I2CS |= bmSTOP; + return 1; + + fail: + I2CS |= bmSTOP; + return 0; +} diff --git a/firmware/lib/i2c.c b/firmware/lib/i2c.c new file mode 100644 index 0000000..08a09cf --- /dev/null +++ b/firmware/lib/i2c.c @@ -0,0 +1,123 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#include "i2c.h" +#include "fx2regs.h" +#include + + +// issue a stop bus cycle and wait for completion + + +// returns non-zero if successful, else 0 +unsigned char +i2c_read (unsigned char addr, xdata unsigned char *buf, unsigned char len) +{ + volatile unsigned char junk; + + if (len == 0) // reading zero bytes always works + return 1; + + while (I2CS & bmSTOP) // wait for stop to clear + ; + + I2CS = bmSTART; + I2DAT = (addr << 1) | 1; // write address and direction (1's the read bit) + + while ((I2CS & bmDONE) == 0) + ; + + if ((I2CS & bmBERR) || (I2CS & bmACK) == 0) // no device answered... + goto fail; + + if (len == 1) + I2CS |= bmLASTRD; + + junk = I2DAT; // trigger the first read cycle + + while (--len != 0){ + while ((I2CS & bmDONE) == 0) + ; + + if (I2CS & bmBERR) + goto fail; + + if (len == 1) + I2CS |= bmLASTRD; + + *buf++ = I2DAT; // get data, trigger another read + } + + // wait for final byte + + while ((I2CS & bmDONE) == 0) + ; + + if (I2CS & bmBERR) + goto fail; + + I2CS |= bmSTOP; + *buf = I2DAT; + + return 1; + + fail: + I2CS |= bmSTOP; + return 0; +} + + + +// returns non-zero if successful, else 0 +unsigned char +i2c_write (unsigned char addr, xdata const unsigned char *buf, unsigned char len) +{ + while (I2CS & bmSTOP) // wait for stop to clear + ; + + I2CS = bmSTART; + I2DAT = (addr << 1) | 0; // write address and direction (0's the write bit) + + while ((I2CS & bmDONE) == 0) + ; + + if ((I2CS & bmBERR) || (I2CS & bmACK) == 0) // no device answered... + goto fail; + + while (len > 0){ + I2DAT = *buf++; + len--; + + while ((I2CS & bmDONE) == 0) + ; + + if ((I2CS & bmBERR) || (I2CS & bmACK) == 0) // no device answered... + goto fail; + } + + I2CS |= bmSTOP; + return 1; + + fail: + I2CS |= bmSTOP; + return 0; +} diff --git a/firmware/lib/isr.c b/firmware/lib/isr.c new file mode 100644 index 0000000..7a20107 --- /dev/null +++ b/firmware/lib/isr.c @@ -0,0 +1,167 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#include "isr.h" +#include "fx2regs.h" +#include "syncdelay.h" + +extern xdata unsigned char _standard_interrupt_vector[]; +extern xdata unsigned char _usb_autovector[]; +extern xdata unsigned char _fifo_gpif_autovector[]; + +#define LJMP_OPCODE 0x02 + +/* + * Hook standard interrupt vector. + * + * vector_number is from the SV_ list. + * addr is the address of the interrupt service routine. + */ +void +hook_sv (unsigned char vector_number, unsigned short addr) +{ + bit t; + + // sanity checks + + if (vector_number < SV_MIN || vector_number > SV_MAX) + return; + + if ((vector_number & 0x0f) != 0x03 && (vector_number & 0x0f) != 0x0b) + return; + + t = EA; + EA = 0; + _standard_interrupt_vector[vector_number] = LJMP_OPCODE; + _standard_interrupt_vector[vector_number + 1] = addr >> 8; + _standard_interrupt_vector[vector_number + 2] = addr & 0xff; + EA = t; +} + +/* + * Hook usb interrupt vector. + * + * vector_number is from the UV_ list. + * addr is the address of the interrupt service routine. + */ +void +hook_uv (unsigned char vector_number, unsigned short addr) +{ + bit t; + + // sanity checks + + if (vector_number < UV_MIN || vector_number > UV_MAX) + return; + + if ((vector_number & 0x3) != 0) + return; + + t = EA; + EA = 0; + _usb_autovector[vector_number] = LJMP_OPCODE; + _usb_autovector[vector_number + 1] = addr >> 8; + _usb_autovector[vector_number + 2] = addr & 0xff; + EA = t; +} + +/* + * Hook fifo/gpif interrupt vector. + * + * vector_number is from the FGV_ list. + * addr is the address of the interrupt service routine. + */ +void +hook_fgv (unsigned char vector_number, unsigned short addr) +{ + bit t; + + // sanity checks + + if (vector_number < FGV_MIN || vector_number > FGV_MAX) + return; + + if ((vector_number & 0x3) != 0) + return; + + t = EA; + EA = 0; + _fifo_gpif_autovector[vector_number] = LJMP_OPCODE; + _fifo_gpif_autovector[vector_number + 1] = addr >> 8; + _fifo_gpif_autovector[vector_number + 2] = addr & 0xff; + EA = t; +} + +/* + * One time call to enable autovectoring for both USB and FIFO/GPIF. + * + * This disables all USB and FIFO/GPIF interrupts and clears + * any pending interrupts too. It leaves the master USB and FIFO/GPIF + * interrupts enabled. + */ +void +setup_autovectors (void) +{ + // disable master usb and fifo/gpif interrupt enables + EIUSB = 0; + EIEX4 = 0; + + hook_sv (SV_INT_2, (unsigned short) _usb_autovector); + hook_sv (SV_INT_4, (unsigned short) _fifo_gpif_autovector); + + // disable all fifo interrupt enables + SYNCDELAY; + EP2FIFOIE = 0; SYNCDELAY; + EP4FIFOIE = 0; SYNCDELAY; + EP6FIFOIE = 0; SYNCDELAY; + EP8FIFOIE = 0; SYNCDELAY; + + // clear all pending fifo irqs + EP2FIFOIRQ = 0xff; SYNCDELAY; + EP4FIFOIRQ = 0xff; SYNCDELAY; + EP6FIFOIRQ = 0xff; SYNCDELAY; + EP8FIFOIRQ = 0xff; SYNCDELAY; + + IBNIE = 0; + IBNIRQ = 0xff; + NAKIE = 0; + NAKIRQ = 0xff; + USBIE = 0; + USBIRQ = 0xff; + EPIE = 0; + EPIRQ = 0xff; + SYNCDELAY; GPIFIE = 0; + SYNCDELAY; GPIFIRQ = 0xff; + USBERRIE = 0; + USBERRIRQ = 0xff; + CLRERRCNT = 0; + + INTSETUP = bmAV2EN | bmAV4EN | bmINT4IN; + + // clear master irq's for usb and fifo/gpif + EXIF &= ~bmEXIF_USBINT; + EXIF &= ~bmEXIF_IE4; + + // enable master usb and fifo/gpif interrrupts + EIUSB = 1; + EIEX4 = 1; +} diff --git a/firmware/lib/timer.c b/firmware/lib/timer.c new file mode 100644 index 0000000..9e396f4 --- /dev/null +++ b/firmware/lib/timer.c @@ -0,0 +1,49 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#include "timer.h" +#include "fx2regs.h" +#include "isr.h" + +/* + * Arrange to have isr_tick_handler called at 100 Hz. + * + * The cpu clock is running at 48e6. The input to the timer + * is 48e6 / 12 = 4e6. + * + * We arrange to have the timer overflow every 40000 clocks == 100 Hz + */ + +#define RELOAD_VALUE ((unsigned short) -40000) + +void +hook_timer_tick (unsigned short isr_tick_handler) +{ + ET2 = 0; // disable timer 2 interrupts + hook_sv (SV_TIMER_2, isr_tick_handler); + + RCAP2H = RELOAD_VALUE >> 8; // setup the auto reload value + RCAP2L = RELOAD_VALUE; + + T2CON = 0x04; // interrupt on overflow; reload; run + ET2 = 1; // enable timer 2 interrupts +} diff --git a/firmware/lib/usb_common.c b/firmware/lib/usb_common.c new file mode 100644 index 0000000..731fd68 --- /dev/null +++ b/firmware/lib/usb_common.c @@ -0,0 +1,385 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#include "usb_common.h" +#include "fx2regs.h" +#include "syncdelay.h" +#include "fx2utils.h" +#include "isr.h" +#include "usb_descriptors.h" +#include "usb_requests.h" + +extern xdata char str0[]; +extern xdata char str1[]; +extern xdata char str2[]; +extern xdata char str3[]; +extern xdata char str4[]; +extern xdata char str5[]; + + +#define bRequestType SETUPDAT[0] +#define bRequest SETUPDAT[1] +#define wValueL SETUPDAT[2] +#define wValueH SETUPDAT[3] +#define wIndexL SETUPDAT[4] +#define wIndexH SETUPDAT[5] +#define wLengthL SETUPDAT[6] +#define wLengthH SETUPDAT[7] + +#define MSB(x) (((unsigned short) x) >> 8) +#define LSB(x) (((unsigned short) x) & 0xff) + +volatile bit _usb_got_SUDAV; + +unsigned char _usb_config = 0; +unsigned char _usb_alt_setting = 0; // FIXME really 1/interface + +xdata unsigned char *current_device_descr; +xdata unsigned char *current_devqual_descr; +xdata unsigned char *current_config_descr; +xdata unsigned char *other_config_descr; + +static void +setup_descriptors (void) +{ + if (USBCS & bmHSM){ // high speed mode + current_device_descr = high_speed_device_descr; + current_devqual_descr = high_speed_devqual_descr; + current_config_descr = high_speed_config_descr; + other_config_descr = full_speed_config_descr; + } + else { + current_device_descr = full_speed_device_descr; + current_devqual_descr = full_speed_devqual_descr; + current_config_descr = full_speed_config_descr; + other_config_descr = high_speed_config_descr; + } + + // whack the type fields + // FIXME, may not be required. + // current_config_descr[1] = DT_CONFIG; + // other_config_descr[1] = DT_OTHER_SPEED; +} + +static void +isr_SUDAV (void) interrupt +{ + clear_usb_irq (); + _usb_got_SUDAV = 1; +} + +static void +isr_USBRESET (void) interrupt +{ + clear_usb_irq (); + setup_descriptors (); +} + +static void +isr_HIGHSPEED (void) interrupt +{ + clear_usb_irq (); + setup_descriptors (); +} + +void +usb_install_handlers (void) +{ + setup_descriptors (); // ensure that they're set before use + + hook_uv (UV_SUDAV, (unsigned short) isr_SUDAV); + hook_uv (UV_USBRESET, (unsigned short) isr_USBRESET); + hook_uv (UV_HIGHSPEED, (unsigned short) isr_HIGHSPEED); + + USBIE = bmSUDAV | bmURES | bmHSGRANT; +} + +// On the FX2 the only plausible endpoints are 0, 1, 2, 4, 6, 8 +// This doesn't check to see that they're enabled + +unsigned char +plausible_endpoint (unsigned char ep) +{ + ep &= ~0x80; // ignore direction bit + + if (ep > 8) + return 0; + + if (ep == 1) + return 1; + + return (ep & 0x1) == 0; // must be even +} + +// return pointer to control and status register for endpoint. +// only called with plausible_endpoints + +xdata volatile unsigned char * +epcs (unsigned char ep) +{ + if (ep == 0x01) // ep1 has different in and out CS regs + return EP1OUTCS; + + if (ep == 0x81) + return EP1INCS; + + ep &= ~0x80; // ignore direction bit + + if (ep == 0x00) // ep0 + return EP0CS; + + return EP2CS + (ep >> 1); // 2, 4, 6, 8 are consecutive +} + +void +usb_handle_setup_packet (void) +{ + _usb_got_SUDAV = 0; + + // handle the standard requests... + + switch (bRequestType & bmRT_TYPE_MASK){ + + case bmRT_TYPE_CLASS: + case bmRT_TYPE_RESERVED: + fx2_stall_ep0 (); // we don't handle these. indicate error + break; + + case bmRT_TYPE_VENDOR: + // call the application code. + // If it handles the command it returns non-zero + + if (!app_vendor_cmd ()) + fx2_stall_ep0 (); + break; + + case bmRT_TYPE_STD: + // these are the standard requests... + + if ((bRequestType & bmRT_DIR_MASK) == bmRT_DIR_IN){ + + //////////////////////////////////// + // handle the IN requests + //////////////////////////////////// + + switch (bRequest){ + + case RQ_GET_CONFIG: + EP0BUF[0] = _usb_config; // FIXME app should handle + EP0BCH = 0; + EP0BCL = 1; + break; + + // -------------------------------- + + case RQ_GET_INTERFACE: + EP0BUF[0] = _usb_alt_setting; // FIXME app should handle + EP0BCH = 0; + EP0BCL = 1; + break; + + // -------------------------------- + + case RQ_GET_DESCR: + switch (wValueH){ + + case DT_DEVICE: + SUDPTRH = MSB (current_device_descr); + SUDPTRL = LSB (current_device_descr); + break; + + case DT_DEVQUAL: + SUDPTRH = MSB (current_devqual_descr); + SUDPTRL = LSB (current_devqual_descr); + break; + + case DT_CONFIG: + if (0 && wValueL != 1) // FIXME only a single configuration + fx2_stall_ep0 (); + else { + SUDPTRH = MSB (current_config_descr); + SUDPTRL = LSB (current_config_descr); + } + break; + + case DT_OTHER_SPEED: + if (0 && wValueL != 1) // FIXME only a single configuration + fx2_stall_ep0 (); + else { + SUDPTRH = MSB (other_config_descr); + SUDPTRL = LSB (other_config_descr); + } + break; + + case DT_STRING: + if (wValueL >= nstring_descriptors) + fx2_stall_ep0 (); + else { + xdata char *p = string_descriptors[wValueL]; + SUDPTRH = MSB (p); + SUDPTRL = LSB (p); + } + break; + + default: + fx2_stall_ep0 (); // invalid request + break; + } + break; + + // -------------------------------- + + case RQ_GET_STATUS: + switch (bRequestType & bmRT_RECIP_MASK){ + case bmRT_RECIP_DEVICE: + EP0BUF[0] = bmGSDA_SELF_POWERED; // FIXME app should handle + EP0BUF[1] = 0; + EP0BCH = 0; + EP0BCL = 2; + break; + + case bmRT_RECIP_INTERFACE: + EP0BUF[0] = 0; + EP0BUF[1] = 0; + EP0BCH = 0; + EP0BCL = 2; + break; + + case bmRT_RECIP_ENDPOINT: + if (plausible_endpoint (wIndexL)){ + EP0BUF[0] = *epcs (wIndexL) & bmEPSTALL; + EP0BUF[1] = 0; + EP0BCH = 0; + EP0BCL = 2; + } + else + fx2_stall_ep0 (); + break; + + default: + fx2_stall_ep0 (); + break; + } + + // -------------------------------- + + case RQ_SYNCH_FRAME: // not implemented + default: + fx2_stall_ep0 (); + break; + } + } + + else { + + //////////////////////////////////// + // handle the OUT requests + //////////////////////////////////// + + switch (bRequest){ + + case RQ_SET_CONFIG: + _usb_config = wValueL; // FIXME app should handle + break; + + case RQ_SET_INTERFACE: + _usb_alt_setting = wValueL; // FIXME app should handle + break; + + // -------------------------------- + + case RQ_CLEAR_FEATURE: + switch (bRequestType & bmRT_RECIP_MASK){ + + case bmRT_RECIP_DEVICE: + switch (wValueL){ + case FS_DEV_REMOTE_WAKEUP: + default: + fx2_stall_ep0 (); + } + break; + + case bmRT_RECIP_ENDPOINT: + if (wValueL == FS_ENDPOINT_HALT && plausible_endpoint (wIndexL)){ + *epcs (wIndexL) &= ~bmEPSTALL; + fx2_reset_data_toggle (wIndexL); + } + else + fx2_stall_ep0 (); + break; + + default: + fx2_stall_ep0 (); + break; + } + break; + + // -------------------------------- + + case RQ_SET_FEATURE: + switch (bRequestType & bmRT_RECIP_MASK){ + + case bmRT_RECIP_DEVICE: + switch (wValueL){ + case FS_TEST_MODE: + // hardware handles this after we complete SETUP phase handshake + break; + + case FS_DEV_REMOTE_WAKEUP: + default: + fx2_stall_ep0 (); + break; + } + } + break; + + case bmRT_RECIP_ENDPOINT: + switch (wValueL){ + case FS_ENDPOINT_HALT: + if (plausible_endpoint (wIndexL)) + *epcs (wIndexL) |= bmEPSTALL; + else + fx2_stall_ep0 (); + break; + + default: + fx2_stall_ep0 (); + break; + } + break; + + // -------------------------------- + + case RQ_SET_ADDRESS: // handled by fx2 hardware + case RQ_SET_DESCR: // not implemented + default: + fx2_stall_ep0 (); + } + + } + break; + + } // bmRT_TYPE_MASK + + // ack handshake phase of device request + EP0CS |= bmHSNAK; +} diff --git a/firmware/src/Makefile.am b/firmware/src/Makefile.am new file mode 100644 index 0000000..e480137 --- /dev/null +++ b/firmware/src/Makefile.am @@ -0,0 +1,22 @@ +# +# Copyright 2004 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +SUBDIRS = common usrp2 diff --git a/firmware/src/common/Makefile.am b/firmware/src/common/Makefile.am new file mode 100644 index 0000000..ba3c0e4 --- /dev/null +++ b/firmware/src/common/Makefile.am @@ -0,0 +1,50 @@ +# +# Copyright 2004 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +EXTRA_DIST = \ + _startup.a51 \ + blink_leds.c \ + check_mdelay.c \ + check_udelay.c \ + edit-gpif \ + fpga.h \ + fpga_load.h \ + fpga_load.c \ + gpif.c \ + gpif.gpf \ + init_gpif.c \ + usrp_common.c \ + usrp_globals.h \ + vectors.a51 \ + build_eeprom.py + +all: usrp_gpif.c + +usrp_gpif.c usrp_gpif_inline.h : gpif.c + srcdir=$(srcdir) $(srcdir)/edit-gpif $(srcdir)/gpif.c usrp_gpif.c usrp_gpif_inline.h + +CLEANFILES = \ + *.ihx *.lnk *.lst *.map *.mem *.rel *.rst *.sym *.asm *.lib \ + usrp_gpif.c usrp_gpif_inline.h + +DISTCLEANFILES = \ + *.ihx *.lnk *.lst *.map *.mem *.rel *.rst *.sym *.asm *.lib \ + usrp_gpif.c usrp_gpif_inline.h diff --git a/firmware/src/common/_startup.a51 b/firmware/src/common/_startup.a51 new file mode 100644 index 0000000..0bffbbe --- /dev/null +++ b/firmware/src/common/_startup.a51 @@ -0,0 +1,80 @@ +;;; -*- asm -*- +;;; +;;; Copyright 2003,2004 Free Software Foundation, Inc. +;;; +;;; This file is part of GNU Radio +;;; +;;; GNU Radio is free software; you can redistribute it and/or modify +;;; it under the terms of the GNU General Public License as published by +;;; the Free Software Foundation; either version 2, or (at your option) +;;; any later version. +;;; +;;; GNU Radio is distributed in the hope that it will be useful, +;;; but WITHOUT ANY WARRANTY; without even the implied warranty of +;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;;; GNU General Public License for more details. +;;; +;;; You should have received a copy of the GNU General Public License +;;; along with GNU Radio; see the file COPYING. If not, write to +;;; the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +;;; Boston, MA 02111-1307, USA. + + +;;; The default external memory initialization provided by sdcc is not +;;; appropriate to the FX2. This is derived from the sdcc code, but uses +;;; the FX2 specific _MPAGE sfr. + + + ;; .area XISEG (XDATA) ; the initialized external data area + ;; .area XINIT (CODE) ; the code space consts to init XISEG + .area XSEG (XDATA) ; zero initialized xdata + .area USBDESCSEG (XDATA) ; usb descriptors + + + .area CSEG (CODE) + + ;; sfr that sets upper address byte of MOVX using @r0 or @r1 + _MPAGE = 0x0092 + +__sdcc_external_startup:: + ;; This system is now compiled with the --no-xinit-opt + ;; which means that any initialized XDATA is handled + ;; inline by code in the GSINIT segs emitted for each file. + ;; + ;; We zero XSEG and all of the internal ram to ensure + ;; a known good state for uninitialized variables. + +; _mcs51_genRAMCLEAR() start + mov r0,#l_XSEG + mov a,r0 + orl a,#(l_XSEG >> 8) + jz 00002$ + mov r1,#((l_XSEG + 255) >> 8) + mov dptr,#s_XSEG + clr a + +00001$: movx @dptr,a + inc dptr + djnz r0,00001$ + djnz r1,00001$ + + ;; We're about to clear internal memory. This will overwrite + ;; the stack which contains our return address. + ;; Pop our return address into DPH, DPL +00002$: pop dph + pop dpl + + ;; R0 and A contain 0. This loop will execute 256 times. + ;; + ;; FWIW the first iteration writes direct address 0x00, + ;; which is the location of r0. We get lucky, we're + ;; writing the correct value (0) + +00003$: mov @r0,a + djnz r0,00003$ + + push dpl ; restore our return address + push dph + + mov dpl,#0 ; indicate that data init is still required + ret diff --git a/firmware/src/common/_startup.a51.brittle b/firmware/src/common/_startup.a51.brittle new file mode 100644 index 0000000..1238f3d --- /dev/null +++ b/firmware/src/common/_startup.a51.brittle @@ -0,0 +1,78 @@ +;;; -*- asm -*- +;;; +;;; Copyright 2003 Free Software Foundation, Inc. +;;; +;;; This file is part of GNU Radio +;;; +;;; GNU Radio is free software; you can redistribute it and/or modify +;;; it under the terms of the GNU General Public License as published by +;;; the Free Software Foundation; either version 2, or (at your option) +;;; any later version. +;;; +;;; GNU Radio is distributed in the hope that it will be useful, +;;; but WITHOUT ANY WARRANTY; without even the implied warranty of +;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;;; GNU General Public License for more details. +;;; +;;; You should have received a copy of the GNU General Public License +;;; along with GNU Radio; see the file COPYING. If not, write to +;;; the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +;;; Boston, MA 02111-1307, USA. + + +;;; The default external memory initialization provided by sdcc is not +;;; appropriate to the FX2. This is derived from the sdcc code, but uses +;;; the FX2 specific _MPAGE sfr. + + + .area XISEG (XDATA) ; the initialized external data area + .area XINIT (CODE) ; the code space consts to init XISEG + .area XSEG (XDATA) ; zero initialized xdata + .area USBDESCSEG (XDATA); usb descriptors + + + ;; BIG TIME KLUDGE! + ;; Look at usrp_main.rst and count the bytes from our + ;; "normal return location" to the first instruction following + ;; the comment: "_mcs51_getRAMCLEAR () start" + + INSTRUCTION_BYTES_TO_SKIP = 0x29 ; valid for sdcc 2.4.0 + + + .area CSEG (CODE) + + ;; sfr that sets upper address byte of MOVX using @r0 or @r1 + _MPAGE = 0x0092 + +__sdcc_external_startup:: +; _mcs51_genXINIT() start + mov r1,#l_XINIT + mov a,r1 + orl a,#(l_XINIT >> 8) + jz 00003$ + mov r2,#((l_XINIT+255) >> 8) + mov dptr,#s_XINIT + mov r0,#s_XISEG + mov _MPAGE,#(s_XISEG >> 8) +00001$: clr a + movc a,@a+dptr + movx @r0,a + inc dptr + inc r0 + cjne r0,#0,00002$ + inc _MPAGE +00002$: djnz r1,00001$ + djnz r2,00001$ + mov _MPAGE,#0xFF +00003$: + + ;; Danger! Total KLUDGE! + ;; We pop the return address, add a magic number to it + ;; then jump to that address. Believe it or not, this + ;; looks like the least kludgy way to handle this, + ;; short of patching the compiler... + + pop dph + pop dpl + mov a,#INSTRUCTION_BYTES_TO_SKIP + jmp @a+dptr diff --git a/firmware/src/common/blink_leds.c b/firmware/src/common/blink_leds.c new file mode 100644 index 0000000..4654e73 --- /dev/null +++ b/firmware/src/common/blink_leds.c @@ -0,0 +1,36 @@ +/* + * USRP - Universal Software Radio Peripheral + * + * Copyright (C) 2003 Free Software Foundation, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include "usrp_common.h" + +void +main (void) +{ + unsigned short counter = 0; + + init_usrp (); + + while (1){ + unsigned char counter_high = counter >> 8; + set_led_0 (counter_high & 0x40); + set_led_1 (counter_high & 0x80); + counter++; + } +} diff --git a/firmware/src/common/build_eeprom.py b/firmware/src/common/build_eeprom.py new file mode 100755 index 0000000..6612059 --- /dev/null +++ b/firmware/src/common/build_eeprom.py @@ -0,0 +1,182 @@ +#!/usr/bin/env python +# +# Copyright 2004,2006 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +import re +import sys +import os, os.path +from optparse import OptionParser + +# USB Vendor and Product ID's + +VID = 0xfffe # Free Software Folks +PID = 0x0002 # Universal Software Radio Peripheral + + +def hex_to_bytes (s): + if len (s) & 0x1: + raise ValueError, "Length must be even" + r = [] + for i in range (0, len(s), 2): + r.append (int (s[i:i+2], 16)) + return r + +def msb (x): + return (x >> 8) & 0xff + +def lsb (x): + return x & 0xff + +class ihx_rec (object): + def __init__ (self, addr, type, data): + self.addr = addr + self.type = type + self.data = data + +class ihx_file (object): + def __init__ (self): + self.pat = re.compile (r':[0-9A-F]{10,}') + def read (self, file): + r = [] + for line in file: + line = line.strip().upper () + if not self.pat.match (line): + raise ValueError, "Invalid hex record format" + bytes = hex_to_bytes (line[1:]) + sum = reduce (lambda x, y: x + y, bytes, 0) % 256 + if sum != 0: + raise ValueError, "Bad hex checksum" + lenx = bytes[0] + addr = (bytes[1] << 8) + bytes[2] + type = bytes[3] + data = bytes[4:-1] + if lenx != len (data): + raise ValueError, "Invalid hex record (bad length)" + if type != 0: + break; + r.append (ihx_rec (addr, type, data)) + + return r + +def get_code (filename): + """Read the intel hex format file FILENAME and return a tuple + of the code starting address and a list of bytes to load there. + """ + f = open (filename, 'r') + ifx = ihx_file () + r = ifx.read (f) + r.sort (lambda a,b: a.addr - b.addr) + code_start = r[0].addr + code_end = r[-1].addr + len (r[-1].data) + code_len = code_end - code_start + code = [0] * code_len + for x in r: + a = x.addr + l = len (x.data) + code[a-code_start:a-code_start+l] = x.data + return (code_start, code) + + +def build_eeprom_image (filename, rev): + """Build a ``C2 Load'' EEPROM image. + + For details on this format, see section 3.4.3 of + the EZ-USB FX2 Technical Reference Manual + """ + # get the code we want to run + (start_addr, bytes) = get_code (filename) + + devid = rev + + rom_header = [ + 0xC2, # boot from EEPROM + lsb (VID), + msb (VID), + lsb (PID), + msb (PID), + lsb (devid), + msb (devid), + 0 # configuration byte + ] + + # 4 byte header that indicates where to load + # the immediately follow code bytes. + code_header = [ + msb (len (bytes)), + lsb (len (bytes)), + msb (start_addr), + lsb (start_addr) + ] + + # writes 0 to CPUCS reg (brings FX2 out of reset) + trailer = [ + 0x80, + 0x01, + 0xe6, + 0x00, + 0x00 + ] + + image = rom_header + code_header + bytes + trailer + + assert (len (image) <= 256) + return image + +def build_shell_script (out, ihx_filename, rev): + + image = build_eeprom_image (ihx_filename, rev) + + out.write ('#!/bin/sh\n') + out.write ('usrper -x load_firmware /usr/local/share/usrp/rev%d/std.ihx\n' % rev) + out.write ('sleep 1\n') + + # print "len(image) =", len(image) + + i2c_addr = 0x50 + rom_addr = 0x00 + + hex_image = map (lambda x : "%02x" % (x,), image) + + while (len (hex_image) > 0): + l = min (len (hex_image), 16) + out.write ('usrper i2c_write 0x%02x %02x%s\n' % + (i2c_addr, rom_addr, ''.join (hex_image[0:l]))) + hex_image = hex_image[l:] + rom_addr = rom_addr + l + out.write ('sleep 1\n') + +if __name__ == '__main__': + usage = "usage: %prog -r REV [options] bootfile.ihx" + parser = OptionParser (usage=usage) + parser.add_option ("-r", "--rev", type="int", default=-1, + help="Specify USRP revision number REV (2 or 4)") + (options, args) = parser.parse_args () + if len (args) != 1: + parser.print_help () + sys.exit (1) + if options.rev < 0: + sys.stderr.write ( + "You must specify the USRP revision number (2 or 4) with -r REV\n") + sys.exit (1) + + ihx_filename = args[0] + + build_shell_script (sys.stdout, ihx_filename, options.rev) diff --git a/firmware/src/common/check_mdelay.c b/firmware/src/common/check_mdelay.c new file mode 100644 index 0000000..8cdadab --- /dev/null +++ b/firmware/src/common/check_mdelay.c @@ -0,0 +1,37 @@ +/* + * USRP - Universal Software Radio Peripheral + * + * Copyright (C) 2003 Free Software Foundation, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include "usrp_common.h" +#include "delay.h" + +void +main (void) +{ + init_usrp (); + + // CPUCS = 0; // 12 MHz + // CPUCS = bmCLKSPD0; // 24 MHz + CPUCS = bmCLKSPD1; // 48 MHz + + while (1){ + USRP_LED_REG ^= bmLED0; + mdelay (10); + } +} diff --git a/firmware/src/common/check_udelay.c b/firmware/src/common/check_udelay.c new file mode 100644 index 0000000..6e1c840 --- /dev/null +++ b/firmware/src/common/check_udelay.c @@ -0,0 +1,37 @@ +/* + * USRP - Universal Software Radio Peripheral + * + * Copyright (C) 2003 Free Software Foundation, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include "usrp_common.h" +#include "delay.h" + +void +main (void) +{ + init_usrp (); + + // CPUCS = 0; // 12 MHz + // CPUCS = bmCLKSPD0; // 24 MHz + CPUCS = bmCLKSPD1; // 48 MHz + + while (1){ + USRP_LED_REG ^= bmLED0; + udelay (250); + } +} diff --git a/firmware/src/common/edit-gpif b/firmware/src/common/edit-gpif new file mode 100755 index 0000000..c507f50 --- /dev/null +++ b/firmware/src/common/edit-gpif @@ -0,0 +1,114 @@ +#!/usr/bin/env python +# -*- Python -*- +# +# Copyright 2003 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + + +# Edit the gpif.c file generated by the Cypress GPIF Designer Tool and +# produce usrp_gpif.c, and usrp_gpif_inline.h, files suitable for our +# uses. + +import re +import string +import sys + +def check_flow_state (line, flow_state_dict): + mo = re.match (r'/\* Wave (\d) FlowStates \*/ (.*),', line) + if mo: + wave = int (mo.group (1)) + data = mo.group (2) + split = data.split (',', 8) + v = map (lambda x : int (x, 16), split) + # print "%s, %s" % (wave, data) + # print "split: ", split + # print "v : ", v + flow_state_dict[wave] = v + + +def delta (xseq, yseq): + # set subtraction + z = [] + for x in xseq: + if x not in yseq: + z.append (x) + return z + + +def write_define (output, name, pairs): + output.write ('#define %s()\t\\\n' % name) + output.write ('do {\t\t\t\t\t\\\n') + for reg, val in pairs: + output.write ('%14s = 0x%02x;\t\t\t\\\n' % (reg, val)) + output.write ('} while (0)\n\n') + +def write_inlines (output, dict): + regs = ['FLOWSTATE', 'FLOWLOGIC', 'FLOWEQ0CTL', 'FLOWEQ1CTL', 'FLOWHOLDOFF', + 'FLOWSTB', 'FLOWSTBEDGE', 'FLOWSTBHPERIOD', 'GPIFHOLDAMOUNT'] + + READ_FLOW_STATE = 2 + WRITE_FLOW_STATE = 3 + + read_info = zip (regs, dict[READ_FLOW_STATE]) + write_info = zip (regs, dict[WRITE_FLOW_STATE]) + + output.write ('''/* + * Machine generated by "edit-gpif". Do not edit by hand. + */ + +''') + write_define (output, 'setup_flowstate_common', read_info) + write_define (output, 'setup_flowstate_read', delta (read_info, write_info)) + write_define (output, 'setup_flowstate_write', delta (write_info, read_info)) + + +def edit_gpif (input_name, output_name, inline_name): + input = open (input_name, 'r') + output = open (output_name, 'w') + inline = open (inline_name, 'w') + flow_state_dict = {} + + output.write ('''/* + * Machine generated by "edit-gpif". Do not edit by hand. + */ + +''') + + while 1: + line = input.readline () + line = string.replace (line, '\r','') + line = re.sub (r' *$', r'', line) + + check_flow_state (line, flow_state_dict) + + line = re.sub (r'#include', r'// #include', line) + line = re.sub (r'xdata ', r'', line) + if re.search (r'GpifInit', line): + break + + output.write (line) + + output.close () + write_inlines (inline, flow_state_dict) + inline.close () + + +# gpif.c usrp_gpif.c usrp_gpif_inline.h +edit_gpif (sys.argv[1], sys.argv[2], sys.argv[3]) diff --git a/firmware/src/common/fpga.h b/firmware/src/common/fpga.h new file mode 100644 index 0000000..d95db33 --- /dev/null +++ b/firmware/src/common/fpga.h @@ -0,0 +1,31 @@ +/* -*- c++ -*- */ +/* + * Copyright 2004 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ +#ifndef INCLUDED_FPGA_H +#define INCLUDED_FPGA_H + +#include "fpga_load.h" + +#if defined(HAVE_USRP2) +#include "fpga_rev2.h" +#endif + +#endif /* INCLUDED_FPGA_H */ diff --git a/firmware/src/common/fpga_load.c b/firmware/src/common/fpga_load.c new file mode 100644 index 0000000..1c2792d --- /dev/null +++ b/firmware/src/common/fpga_load.c @@ -0,0 +1,193 @@ +/* + * USRP - Universal Software Radio Peripheral + * + * Copyright (C) 2003 Free Software Foundation, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include "usrp_common.h" +#include "fpga_load.h" +#include "delay.h" + +/* + * setup altera FPGA serial load (PS). + * + * On entry: + * don't care + * + * On exit: + * ALTERA_DCLK = 0 + * ALTERA_NCONFIG = 1 + * ALTERA_NSTATUS = 1 (input) + */ +unsigned char +fpga_load_begin (void) +{ + USRP_ALTERA_CONFIG &= ~bmALTERA_BITS; // clear all bits (NCONFIG low) + udelay (40); // wait 40 us + USRP_ALTERA_CONFIG |= bmALTERA_NCONFIG; // set NCONFIG high + + if (UC_BOARD_HAS_FPGA){ + // FIXME should really cap this loop with a counter so we + // don't hang forever on a hardware failure. + while ((USRP_ALTERA_CONFIG & bmALTERA_NSTATUS) == 0) // wait for NSTATUS to go high + ; + } + + // ready to xfer now + + return 1; +} + +/* + * clock out the low bit of bits. + * + * On entry: + * ALTERA_DCLK = 0 + * ALTERA_NCONFIG = 1 + * ALTERA_NSTATUS = 1 (input) + * + * On exit: + * ALTERA_DCLK = 0 + * ALTERA_NCONFIG = 1 + * ALTERA_NSTATUS = 1 (input) + */ + + +#if 0 + +static void +clock_out_config_byte (unsigned char bits) +{ + unsigned char i; + + // clock out configuration byte, least significant bit first + + for (i = 0; i < 8; i++){ + + USRP_ALTERA_CONFIG = ((USRP_ALTERA_CONFIG & ~bmALTERA_DATA0) | ((bits & 1) ? bmALTERA_DATA0 : 0)); + USRP_ALTERA_CONFIG |= bmALTERA_DCLK; /* set DCLK to 1 */ + USRP_ALTERA_CONFIG &= ~bmALTERA_DCLK; /* set DCLK to 0 */ + + bits = bits >> 1; + } +} + +#else + +static void +clock_out_config_byte (unsigned char bits) _naked +{ + _asm + mov a, dpl + + rrc a + mov _bitALTERA_DATA0,c + setb _bitALTERA_DCLK + clr _bitALTERA_DCLK + + rrc a + mov _bitALTERA_DATA0,c + setb _bitALTERA_DCLK + clr _bitALTERA_DCLK + + rrc a + mov _bitALTERA_DATA0,c + setb _bitALTERA_DCLK + clr _bitALTERA_DCLK + + rrc a + mov _bitALTERA_DATA0,c + setb _bitALTERA_DCLK + clr _bitALTERA_DCLK + + rrc a + mov _bitALTERA_DATA0,c + setb _bitALTERA_DCLK + clr _bitALTERA_DCLK + + rrc a + mov _bitALTERA_DATA0,c + setb _bitALTERA_DCLK + clr _bitALTERA_DCLK + + rrc a + mov _bitALTERA_DATA0,c + setb _bitALTERA_DCLK + clr _bitALTERA_DCLK + + rrc a + mov _bitALTERA_DATA0,c + setb _bitALTERA_DCLK + clr _bitALTERA_DCLK + + ret + + _endasm; +} + +#endif + +static void +clock_out_bytes (unsigned char bytecount, + unsigned char xdata *p) +{ + while (bytecount-- > 0) + clock_out_config_byte (*p++); +} + +/* + * Transfer block of bytes from packet to FPGA serial configuration port + * + * On entry: + * ALTERA_DCLK = 0 + * ALTERA_NCONFIG = 1 + * ALTERA_NSTATUS = 1 (input) + * + * On exit: + * ALTERA_DCLK = 0 + * ALTERA_NCONFIG = 1 + * ALTERA_NSTATUS = 1 (input) + */ +unsigned char +fpga_load_xfer (xdata unsigned char *p, unsigned char bytecount) +{ + clock_out_bytes (bytecount, p); + return 1; +} + +/* + * check for successful load... + */ +unsigned char +fpga_load_end (void) +{ + unsigned char status = USRP_ALTERA_CONFIG; + + if (!UC_BOARD_HAS_FPGA) // always true if we don't have FPGA + return 1; + + if ((status & bmALTERA_NSTATUS) == 0) // failed to program + return 0; + + if ((status & bmALTERA_CONF_DONE) == bmALTERA_CONF_DONE) + return 1; // everything's cool + + // I don't think this should happen. It indicates that + // programming is still in progress. + + return 0; +} diff --git a/firmware/src/common/fpga_load.h b/firmware/src/common/fpga_load.h new file mode 100644 index 0000000..baf22de --- /dev/null +++ b/firmware/src/common/fpga_load.h @@ -0,0 +1,28 @@ +/* + * USRP - Universal Software Radio Peripheral + * + * Copyright (C) 2003 Free Software Foundation, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef INCLUDED_FPGA_LOAD_H +#define INCLUDED_FPGA_LOAD_H + +unsigned char fpga_load_begin (void); +unsigned char fpga_load_xfer (xdata unsigned char *p, unsigned char len); +unsigned char fpga_load_end (void); + +#endif /* INCLUDED_FPGA_LOAD_H */ diff --git a/firmware/src/common/gpif.c b/firmware/src/common/gpif.c new file mode 100755 index 0000000..489e6e8 --- /dev/null +++ b/firmware/src/common/gpif.c @@ -0,0 +1,292 @@ +// This program configures the General Programmable Interface (GPIF) for FX2. +// Please do not modify sections of text which are marked as "DO NOT EDIT ...". +// +// DO NOT EDIT ... +// GPIF Initialization +// Interface Timing Async +// Internal Ready Init IntRdy=1 +// CTL Out Tristate-able Binary +// SingleWrite WF Select 1 +// SingleRead WF Select 0 +// FifoWrite WF Select 3 +// FifoRead WF Select 2 +// Data Bus Idle Drive Tristate +// END DO NOT EDIT + +// DO NOT EDIT ... +// GPIF Wave Names +// Wave 0 = singlerd +// Wave 1 = singlewr +// Wave 2 = FIFORd +// Wave 3 = FIFOWr + +// GPIF Ctrl Outputs Level +// CTL 0 = WEN# CMOS +// CTL 1 = REN# CMOS +// CTL 2 = OE# CMOS +// CTL 3 = CLRST CMOS +// CTL 4 = unused CMOS +// CTL 5 = BOGUS CMOS + +// GPIF Rdy Inputs +// RDY0 = EF# +// RDY1 = FF# +// RDY2 = unused +// RDY3 = unused +// RDY4 = unused +// RDY5 = TCXpire +// FIFOFlag = FIFOFlag +// IntReady = IntReady +// END DO NOT EDIT +// DO NOT EDIT ... +// +// GPIF Waveform 0: singlerd +// +// Interval 0 1 2 3 4 5 6 Idle (7) +// _________ _________ _________ _________ _________ _________ _________ _________ +// +// AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val +// DataMode NO Data NO Data NO Data NO Data NO Data NO Data NO Data +// NextData SameData SameData SameData SameData SameData SameData SameData +// Int Trig No Int No Int No Int No Int No Int No Int No Int +// IF/Wait Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 +// Term A +// LFunc +// Term B +// Branch1 +// Branch0 +// Re-Exec +// Sngl/CRC Default Default Default Default Default Default Default +// WEN# 0 0 0 0 0 0 0 0 +// REN# 0 0 0 0 0 0 0 0 +// OE# 0 0 0 0 0 0 0 0 +// CLRST 0 0 0 0 0 0 0 0 +// unused 0 0 0 0 0 0 0 0 +// BOGUS 0 0 0 0 0 0 0 0 +// +// END DO NOT EDIT +// DO NOT EDIT ... +// +// GPIF Waveform 1: singlewr +// +// Interval 0 1 2 3 4 5 6 Idle (7) +// _________ _________ _________ _________ _________ _________ _________ _________ +// +// AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val +// DataMode Activate Activate Activate Activate Activate Activate Activate +// NextData SameData SameData SameData SameData SameData SameData SameData +// Int Trig No Int No Int No Int No Int No Int No Int No Int +// IF/Wait Wait 1 IF Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 +// Term A EF# +// LFunc AND +// Term B EF# +// Branch1 ThenIdle +// Branch0 ElseIdle +// Re-Exec No +// Sngl/CRC Default Default Default Default Default Default Default +// WEN# 0 1 1 1 1 1 1 0 +// REN# 0 0 0 0 0 0 0 0 +// OE# 0 0 0 0 0 0 0 0 +// CLRST 0 0 0 0 0 0 0 0 +// unused 0 0 0 0 0 0 0 0 +// BOGUS 0 0 0 0 0 0 0 0 +// +// END DO NOT EDIT +// DO NOT EDIT ... +// +// GPIF Waveform 2: FIFORd +// +// Interval 0 1 2 3 4 5 6 Idle (7) +// _________ _________ _________ _________ _________ _________ _________ _________ +// +// AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val +// DataMode NO Data Activate NO Data NO Data NO Data NO Data NO Data +// NextData SameData SameData SameData SameData SameData SameData SameData +// Int Trig No Int No Int No Int No Int No Int No Int No Int +// IF/Wait Wait 1 IF Wait 1 IF Wait 1 Wait 1 Wait 1 +// Term A TCXpire TCXpire +// LFunc AND AND +// Term B TCXpire TCXpire +// Branch1 Then 2 ThenIdle +// Branch0 Else 1 ElseIdle +// Re-Exec No No +// Sngl/CRC Default Default Default Default Default Default Default +// WEN# 0 0 0 0 0 0 0 0 +// REN# 0 0 0 0 0 0 0 0 +// OE# 1 1 1 0 0 0 0 0 +// CLRST 0 0 0 0 0 0 0 0 +// unused 0 0 0 0 0 0 0 0 +// BOGUS 0 0 0 0 0 0 0 0 +// +// END DO NOT EDIT +// DO NOT EDIT ... +// +// GPIF Waveform 3: FIFOWr +// +// Interval 0 1 2 3 4 5 6 Idle (7) +// _________ _________ _________ _________ _________ _________ _________ _________ +// +// AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val +// DataMode NO Data Activate Activate Activate Activate Activate Activate +// NextData SameData SameData SameData SameData SameData SameData SameData +// Int Trig No Int No Int No Int No Int No Int No Int No Int +// IF/Wait Wait 1 IF Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 +// Term A TCXpire +// LFunc AND +// Term B TCXpire +// Branch1 ThenIdle +// Branch0 Else 1 +// Re-Exec No +// Sngl/CRC Default Default Default Default Default Default Default +// WEN# 0 0 0 0 0 0 0 0 +// REN# 0 0 0 0 0 0 0 0 +// OE# 0 0 0 0 0 0 0 0 +// CLRST 0 0 0 0 0 0 0 0 +// unused 0 0 0 0 0 0 0 0 +// BOGUS 0 0 0 0 0 0 0 0 +// +// END DO NOT EDIT + +// GPIF Program Code + +// DO NOT EDIT ... +#include "fx2.h" +#include "fx2regs.h" +#include "fx2sdly.h" // SYNCDELAY macro +// END DO NOT EDIT + +// DO NOT EDIT ... +const char xdata WaveData[128] = +{ +// Wave 0 +/* LenBr */ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07, +/* Opcode*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +/* Output*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +/* LFun */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, +// Wave 1 +/* LenBr */ 0x01, 0x3F, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07, +/* Opcode*/ 0x22, 0x03, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00, +/* Output*/ 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, +/* LFun */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, +// Wave 2 +/* LenBr */ 0x01, 0x11, 0x01, 0x3F, 0x01, 0x01, 0x01, 0x07, +/* Opcode*/ 0x00, 0x03, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, +/* Output*/ 0x04, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, +/* LFun */ 0x00, 0x2D, 0x00, 0x2D, 0x00, 0x00, 0x00, 0x3F, +// Wave 3 +/* LenBr */ 0x01, 0x39, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07, +/* Opcode*/ 0x00, 0x03, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00, +/* Output*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +/* LFun */ 0x00, 0x2D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, +}; +// END DO NOT EDIT + +// DO NOT EDIT ... +const char xdata FlowStates[36] = +{ +/* Wave 0 FlowStates */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/* Wave 1 FlowStates */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/* Wave 2 FlowStates */ 0x81,0x2D,0x26,0x00,0x04,0x04,0x03,0x02,0x00, +/* Wave 3 FlowStates */ 0x81,0x2D,0x21,0x00,0x04,0x04,0x03,0x02,0x00, +}; +// END DO NOT EDIT + +// DO NOT EDIT ... +const char xdata InitData[7] = +{ +/* Regs */ 0xA0,0x00,0x00,0x00,0xEE,0x4E,0x00 +}; +// END DO NOT EDIT + +// TO DO: You may add additional code below. + +void GpifInit( void ) +{ + BYTE i; + + // Registers which require a synchronization delay, see section 15.14 + // FIFORESET FIFOPINPOLAR + // INPKTEND OUTPKTEND + // EPxBCH:L REVCTL + // GPIFTCB3 GPIFTCB2 + // GPIFTCB1 GPIFTCB0 + // EPxFIFOPFH:L EPxAUTOINLENH:L + // EPxFIFOCFG EPxGPIFFLGSEL + // PINFLAGSxx EPxFIFOIRQ + // EPxFIFOIE GPIFIRQ + // GPIFIE GPIFADRH:L + // UDMACRCH:L EPxGPIFTRIG + // GPIFTRIG + + // Note: The pre-REVE EPxGPIFTCH/L register are affected, as well... + // ...these have been replaced by GPIFTC[B3:B0] registers + + // 8051 doesn't have access to waveform memories 'til + // the part is in GPIF mode. + + IFCONFIG = 0xEE; + // IFCLKSRC=1 , FIFOs executes on internal clk source + // xMHz=1 , 48MHz internal clk rate + // IFCLKOE=0 , Don't drive IFCLK pin signal at 48MHz + // IFCLKPOL=0 , Don't invert IFCLK pin signal from internal clk + // ASYNC=1 , master samples asynchronous + // GSTATE=1 , Drive GPIF states out on PORTE[2:0], debug WF + // IFCFG[1:0]=10, FX2 in GPIF master mode + + GPIFABORT = 0xFF; // abort any waveforms pending + + GPIFREADYCFG = InitData[ 0 ]; + GPIFCTLCFG = InitData[ 1 ]; + GPIFIDLECS = InitData[ 2 ]; + GPIFIDLECTL = InitData[ 3 ]; + GPIFWFSELECT = InitData[ 5 ]; + GPIFREADYSTAT = InitData[ 6 ]; + + // use dual autopointer feature... + AUTOPTRSETUP = 0x07; // inc both pointers, + // ...warning: this introduces pdata hole(s) + // ...at E67B (XAUTODAT1) and E67C (XAUTODAT2) + + // source + AUTOPTRH1 = MSB( &WaveData ); + AUTOPTRL1 = LSB( &WaveData ); + + // destination + AUTOPTRH2 = 0xE4; + AUTOPTRL2 = 0x00; + + // transfer + for ( i = 0x00; i < 128; i++ ) + { + EXTAUTODAT2 = EXTAUTODAT1; + } + +// Configure GPIF Address pins, output initial value, + PORTCCFG = 0xFF; // [7:0] as alt. func. GPIFADR[7:0] + OEC = 0xFF; // and as outputs + PORTECFG |= 0x80; // [8] as alt. func. GPIFADR[8] + OEE |= 0x80; // and as output + +// ...OR... tri-state GPIFADR[8:0] pins +// PORTCCFG = 0x00; // [7:0] as port I/O +// OEC = 0x00; // and as inputs +// PORTECFG &= 0x7F; // [8] as port I/O +// OEE &= 0x7F; // and as input + +// GPIF address pins update when GPIFADRH/L written + SYNCDELAY; // + GPIFADRH = 0x00; // bits[7:1] always 0 + SYNCDELAY; // + GPIFADRL = 0x00; // point to PERIPHERAL address 0x0000 + +// Configure GPIF FlowStates registers for Wave 0 of WaveData + FLOWSTATE = FlowStates[ 0 ]; + FLOWLOGIC = FlowStates[ 1 ]; + FLOWEQ0CTL = FlowStates[ 2 ]; + FLOWEQ1CTL = FlowStates[ 3 ]; + FLOWHOLDOFF = FlowStates[ 4 ]; + FLOWSTB = FlowStates[ 5 ]; + FLOWSTBEDGE = FlowStates[ 6 ]; + FLOWSTBHPERIOD = FlowStates[ 7 ]; +} + diff --git a/firmware/src/common/gpif.gpf b/firmware/src/common/gpif.gpf new file mode 100755 index 0000000000000000000000000000000000000000..a954ac193a180718f8b37781d4a35e20487f4e37 GIT binary patch literal 5281 zcmeH~F>BjE6vw67ZNd$0>0U@MWHTh8?(Vu)2m~ACBu++yg)udz$O)y;C0oY~nX+fh zp3jgeQ$9&QK;K`|3+MAmcP9w;;De{LPx`%kPj~MxsdfHk|7)YZ*J!rHThH@+9|yAJ z5A|uo2wHmD_uD~D1Z0=f%ULv3y5rW_&v6`y;4tV0lfg(FPA|e}F#Ii27v#k6w>vcv z;?Ql^MC&N*9kZ8j-Gh^!n42+)=nc^ove|e#nndw1x#W}vzT-^EhG}l%FrhniY?6J* z49VKMW%7%ytfSLq_~4`gy2wmg;%{BueEUB>?_$!}!*Craogej2lle>3BE zWuAVU_;geJiUlsjrua;Th8xRG{>@{$enx}yd`jB#*Tf6koudf=ITUS5EOJp}_6J?m zBzsv1O2Cu@vwt!%_K_^Fps;CRXq-EG+d`6g%ncTEt3`;I)ckcU za#vaSRGZ9l-Yx~K<6R0^$Ga4;j>j18yG;S>c$Wf}c|0t_Ve$-GPWfKdcf4w~LVE<| zJ750k!mC>+9bG)$FYvZx>g$oZCpTm+2reNEVkw(svILmQm?dBt@`2cF$s|KOS1KvZyl>F8@!DWW6@iOx{Tn^STfPOls@w;8@jiS zyb@5^qPLE`xH)fE$>F(~hku>qm||z%wS3k2UCUSHUCWpGUh*xug|E}(;}m> 8; SYNCDELAY; // this is the length for high speed + EP6AUTOINLENL = (512) & 0xff; SYNCDELAY; + + init_board (); +} + diff --git a/firmware/src/common/usrp_globals.h b/firmware/src/common/usrp_globals.h new file mode 100644 index 0000000..6caa234 --- /dev/null +++ b/firmware/src/common/usrp_globals.h @@ -0,0 +1,32 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ +#ifndef _USRP_GLOBALS_H_ +#define _USRP_GLOBALS_H_ + +extern unsigned char g_tx_enable; +extern unsigned char g_rx_enable; +extern unsigned char g_fpga_reset; +extern unsigned char g_rx_overrun; +extern unsigned char g_tx_underrun; + + +#endif /* _USRP_GLOBALS_H_ */ diff --git a/firmware/src/common/vectors.a51 b/firmware/src/common/vectors.a51 new file mode 100644 index 0000000..7fd5f95 --- /dev/null +++ b/firmware/src/common/vectors.a51 @@ -0,0 +1,180 @@ +;;; -*- asm -*- +;;; +;;; Copyright 2003 Free Software Foundation, Inc. +;;; +;;; This file is part of GNU Radio +;;; +;;; GNU Radio is free software; you can redistribute it and/or modify +;;; it under the terms of the GNU General Public License as published by +;;; the Free Software Foundation; either version 2, or (at your option) +;;; any later version. +;;; +;;; GNU Radio is distributed in the hope that it will be useful, +;;; but WITHOUT ANY WARRANTY; without even the implied warranty of +;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;;; GNU General Public License for more details. +;;; +;;; You should have received a copy of the GNU General Public License +;;; along with GNU Radio; see the file COPYING. If not, write to +;;; the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +;;; Boston, MA 02111-1307, USA. +;;; + +;;; Interrupt vectors. + +;;; N.B. This object module must come first in the list of modules + + .module vectors + +;;; ---------------------------------------------------------------- +;;; standard FX2 interrupt vectors +;;; ---------------------------------------------------------------- + + .area CSEG (CODE) + .area GSINIT (CODE) + .area CSEG (CODE) +__standard_interrupt_vector:: +__reset_vector:: + ljmp s_GSINIT + + ;; 13 8-byte entries. We point them all at __isr_nop + ljmp __isr_nop ; 3 bytes + .ds 5 ; + 5 = 8 bytes for vector slot + ljmp __isr_nop + .ds 5 + ljmp __isr_nop + .ds 5 + ljmp __isr_nop + .ds 5 + ljmp __isr_nop + .ds 5 + ljmp __isr_nop + .ds 5 + ljmp __isr_nop + .ds 5 + ljmp __isr_nop + .ds 5 + ljmp __isr_nop + .ds 5 + ljmp __isr_nop + .ds 5 + ljmp __isr_nop + .ds 5 + ljmp __isr_nop + .ds 5 + ljmp __isr_nop + .ds 5 + +__isr_nop:: + reti + +;;; ---------------------------------------------------------------- +;;; the FIFO/GPIF autovector. 14 4-byte entries. +;;; must start on a 128 byte boundary. +;;; ---------------------------------------------------------------- + + . = __reset_vector + 0x0080 + +__fifo_gpif_autovector:: + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + + +;;; ---------------------------------------------------------------- +;;; the USB autovector. 32 4-byte entries. +;;; must start on a 256 byte boundary. +;;; ---------------------------------------------------------------- + + . = __reset_vector + 0x0100 + +__usb_autovector:: + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop + ljmp __isr_nop + nop diff --git a/firmware/src/usrp2/Makefile.am b/firmware/src/usrp2/Makefile.am new file mode 100644 index 0000000..e708312 --- /dev/null +++ b/firmware/src/usrp2/Makefile.am @@ -0,0 +1,168 @@ +# +# Copyright 2003,2006 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +firmware2dir = $(prefix)/share/usrp/rev2 +firmware2_DATA = std.ihx + +# we put the same stuff in the rev4 directory +firmware4dir = $(prefix)/share/usrp/rev4 +firmware4_DATA = std.ihx + +EXTRA_DIST = \ + edit-gpif \ + _startup.a51 \ + blink_leds.c \ + board_specific.c \ + check_mdelay.c \ + check_udelay.c \ + eeprom_boot.a51 \ + eeprom_init.c \ + eeprom_io.c \ + eeprom_io.h \ + fpga_load.c \ + fpga_rev2.c \ + fpga_rev2.h \ + gpif.c \ + init_gpif.c \ + spi.c \ + spi.h \ + usb_descriptors.a51 \ + usrp_common.c \ + usrp_common.h \ + usrp_gpif.c \ + usrp_main.c \ + usrp_rev2_regs.h \ + vectors.a51 + + +DEFINES=-DHAVE_USRP2 +INCLUDES=-I$(top_srcdir)/usrp/firmware/include -I$(top_srcdir)/usrp/firmware/src/usrp2 -I$(top_srcdir)/usrp/firmware/src/common -I./ -I../common + +# with EA = 0, the FX2 implements a portion of the 8051 "external memory" +# on chip. This memory is mapped like this: +# +# The bottom 8K of memory (0x0000 - 0x1fff) is used for both data and +# code accesses. There's also 512 bytes for data only from 0xe000 - 0xe1ff. +# +# We tell the linker to start the xdata segment at 0x1800, 6K up from +# the bottom. + +MEMOPTS = --code-loc 0x0000 --code-size 0x1800 --xram-loc 0x1800 --xram-size 0x0800 \ + -Wl '-b USBDESCSEG = 0xE000' + +LIBOPTS = -L ../../lib libfx2.lib +LIBDEP = ../../lib/libfx2.lib + +LINKOPTS = $(MEMOPTS) $(LIBOPTS) + +EXECUTABLES = \ + std.ihx \ + blink_leds.ihx \ + check_mdelay.ihx \ + check_udelay.ihx \ + eeprom_boot.ihx + +STARTUP = _startup.rel + +noinst_SCRIPTS = \ + burn-usrp2-eeprom \ + burn-usrp4-eeprom + + +%.rel : %.c + $(XCC) $(INCLUDES) $(DEFINES) \ + -c -o $@ `test -f '$<' || echo '$(srcdir)/'`$< + +%.rel : %.a51 + test -f `basename '$<'` || ln -s '$<' . + test -f ../common/`basename '$<'` -o \ + \! -f `dirname '$<'`/../common/`basename '$<'` \ + || ln -s `dirname '$<'`/../common/`basename '$<'` ../common/. + $(XAS) `basename '$<'` + + +EEPROM_BOOT_OBJS = eeprom_boot.rel eeprom_init.rel $(STARTUP) + +eeprom_boot.ihx: $(EEPROM_BOOT_OBJS) $(LIBDEP) + $(XCC) $(LINKOPTS) -o $@ $(EEPROM_BOOT_OBJS) + +burn-usrp2-eeprom: eeprom_boot.ihx + $(srcdir)/../common/build_eeprom.py -r2 $< > $@ + chmod +x $@ + +burn-usrp4-eeprom: eeprom_boot.ihx + $(srcdir)/../common/build_eeprom.py -r4 $< > $@ + chmod +x $@ + + +BLINK_LEDS_OBJS = blink_leds.rel usrp_common.rel board_specific.rel spi.rel $(STARTUP) + +blink_leds.ihx: $(BLINK_LEDS_OBJS) $(LIBDEP) + $(XCC) $(LINKOPTS) -o $@ $(BLINK_LEDS_OBJS) + + +CHECK_MDELAY_OBJS = check_mdelay.rel usrp_common.rel board_specific.rel spi.rel $(STARTUP) + +check_mdelay.ihx: $(CHECK_MDELAY_OBJS) $(LIBDEP) + $(XCC) $(LINKOPTS) -o $@ $(CHECK_MDELAY_OBJS) + + + +CHECK_UDELAY_OBJS = check_udelay.rel usrp_common.rel board_specific.rel spi.rel $(STARTUP) + +check_udelay.ihx: $(CHECK_UDELAY_OBJS) $(LIBDEP) + $(XCC) $(LINKOPTS) -o $@ $(CHECK_UDELAY_OBJS) + + + +USRP_OBJS = \ + vectors.rel \ + usrp_main.rel usrp_common.rel board_specific.rel \ + fpga_load.rel fpga_rev2.rel init_gpif.rel usrp_gpif.rel \ + usb_descriptors.rel spi.rel eeprom_io.rel $(STARTUP) + +std.ihx: $(USRP_OBJS) $(LIBDEP) + $(XCC) $(LINKOPTS) -o $@ $(USRP_OBJS) + +CLEANFILES = \ + *.ihx *.lnk *.lst *.map *.mem *.rel *.rst *.sym *.asm *.lib \ + usrp_gpif.c usrp_gpif_inline.h \ + burn-usrp2-eeprom \ + burn-usrp4-eeprom + +DISTCLEANFILES = \ + *.ihx *.lnk *.lst *.map *.mem *.rel *.rst *.sym *.asm *.lib + +# build gpif stuff + +all: usrp_gpif.c + +usrp_gpif.c usrp_gpif_inline.h : gpif.c + srcdir=$(srcdir) $(srcdir)/edit-gpif $(srcdir)/gpif.c usrp_gpif.c usrp_gpif_inline.h + + +# dependencies + +usrp_main.rel: usrp_gpif_inline.h +#usrp_main.rel: fpga.h usrp_common.h ../../include/usrp_commands.h usrp_gpif_inline.h ../../include/usrp_config.h usrp_rev2_regs.h ../../include/fx2regs.h +#usrp_common.rel: usrp_common.h ../../include/usrp_commands.h ../../include/usrp_config.h usrp_rev2_regs.h ../../include/fx2regs.h +#fpga.rel: usrp_common.h ../../include/usrp_commands.h fpga.h ../../include/usrp_config.h usrp_rev2_regs.h ../../include/fx2regs.h +#init_gpif.rel: usrp_common.h ../../include/usrp_config.h usrp_rev2_regs.h ../../include/fx2regs.h diff --git a/firmware/src/usrp2/_startup.a51 b/firmware/src/usrp2/_startup.a51 new file mode 100644 index 0000000..4f53099 --- /dev/null +++ b/firmware/src/usrp2/_startup.a51 @@ -0,0 +1 @@ + .include "../common/_startup.a51" diff --git a/firmware/src/usrp2/blink_leds.c b/firmware/src/usrp2/blink_leds.c new file mode 100644 index 0000000..c633d5d --- /dev/null +++ b/firmware/src/usrp2/blink_leds.c @@ -0,0 +1 @@ +#include "../common/blink_leds.c" diff --git a/firmware/src/usrp2/board_specific.c b/firmware/src/usrp2/board_specific.c new file mode 100644 index 0000000..a4ff45c --- /dev/null +++ b/firmware/src/usrp2/board_specific.c @@ -0,0 +1,113 @@ +/* -*- c++ -*- */ +/* + * Copyright 2004 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#include "usrp_common.h" +#include "spi.h" + +void +set_led_0 (unsigned char on) +{ + if (!on) // active low + USRP_PC |= bmPC_LED0; + else + USRP_PC &= ~bmPC_LED0; +} + +void +set_led_1 (unsigned char on) +{ + if (!on) // active low + USRP_PC |= bmPC_LED1; + else + USRP_PC &= ~bmPC_LED1; +} + +void +toggle_led_0 (void) +{ + USRP_PC ^= bmPC_LED0; +} + +void +toggle_led_1 (void) +{ + USRP_PC ^= bmPC_LED1; +} + +void +la_trace_init (void) +{ +} + +void +set_sleep_bits (unsigned char bits, unsigned char mask) +{ + // NOP on usrp1 +} + +static xdata unsigned char xbuf[1]; + +void +write_9862 (unsigned char which, unsigned char regno, unsigned char value) +{ + xbuf[0] = value; + + spi_write (0, regno & 0x3f, + which == 0 ? SPI_ENABLE_CODEC_A : SPI_ENABLE_CODEC_B, + SPI_FMT_MSB | SPI_FMT_HDR_1, + xbuf, 1); +} + +void +write_both_9862s (unsigned char regno, unsigned char value) +{ + xbuf[0] = value; + + spi_write (0, regno & 0x3f, + SPI_ENABLE_CODEC_A | SPI_ENABLE_CODEC_B, + SPI_FMT_MSB | SPI_FMT_HDR_1, + xbuf, 1); +} + +#define REG_RX_PWR_DN 1 +#define REG_TX_PWR_DN 8 +#define REG_TX_MODULATOR 20 + +static void +power_down_9862s (void) +{ + write_both_9862s (REG_RX_PWR_DN, 0x01); + write_both_9862s (REG_TX_PWR_DN, 0x0f); // pwr dn digital and analog_both + write_both_9862s (REG_TX_MODULATOR, 0x00); // coarse & fine modulators disabled +} + +void +init_board (void) +{ + la_trace_init (); + init_spi (); + + USRP_PC &= ~bmPC_nRESET; // active low reset + USRP_PC |= bmPC_nRESET; + + power_down_9862s (); +} diff --git a/firmware/src/usrp2/check_mdelay.c b/firmware/src/usrp2/check_mdelay.c new file mode 100644 index 0000000..ea4ccdb --- /dev/null +++ b/firmware/src/usrp2/check_mdelay.c @@ -0,0 +1 @@ +#include "../common/check_mdelay.c" diff --git a/firmware/src/usrp2/check_udelay.c b/firmware/src/usrp2/check_udelay.c new file mode 100644 index 0000000..d01622e --- /dev/null +++ b/firmware/src/usrp2/check_udelay.c @@ -0,0 +1 @@ +#include "../common/check_udelay.c" diff --git a/firmware/src/usrp2/edit-gpif b/firmware/src/usrp2/edit-gpif new file mode 100755 index 0000000..c507f50 --- /dev/null +++ b/firmware/src/usrp2/edit-gpif @@ -0,0 +1,114 @@ +#!/usr/bin/env python +# -*- Python -*- +# +# Copyright 2003 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + + +# Edit the gpif.c file generated by the Cypress GPIF Designer Tool and +# produce usrp_gpif.c, and usrp_gpif_inline.h, files suitable for our +# uses. + +import re +import string +import sys + +def check_flow_state (line, flow_state_dict): + mo = re.match (r'/\* Wave (\d) FlowStates \*/ (.*),', line) + if mo: + wave = int (mo.group (1)) + data = mo.group (2) + split = data.split (',', 8) + v = map (lambda x : int (x, 16), split) + # print "%s, %s" % (wave, data) + # print "split: ", split + # print "v : ", v + flow_state_dict[wave] = v + + +def delta (xseq, yseq): + # set subtraction + z = [] + for x in xseq: + if x not in yseq: + z.append (x) + return z + + +def write_define (output, name, pairs): + output.write ('#define %s()\t\\\n' % name) + output.write ('do {\t\t\t\t\t\\\n') + for reg, val in pairs: + output.write ('%14s = 0x%02x;\t\t\t\\\n' % (reg, val)) + output.write ('} while (0)\n\n') + +def write_inlines (output, dict): + regs = ['FLOWSTATE', 'FLOWLOGIC', 'FLOWEQ0CTL', 'FLOWEQ1CTL', 'FLOWHOLDOFF', + 'FLOWSTB', 'FLOWSTBEDGE', 'FLOWSTBHPERIOD', 'GPIFHOLDAMOUNT'] + + READ_FLOW_STATE = 2 + WRITE_FLOW_STATE = 3 + + read_info = zip (regs, dict[READ_FLOW_STATE]) + write_info = zip (regs, dict[WRITE_FLOW_STATE]) + + output.write ('''/* + * Machine generated by "edit-gpif". Do not edit by hand. + */ + +''') + write_define (output, 'setup_flowstate_common', read_info) + write_define (output, 'setup_flowstate_read', delta (read_info, write_info)) + write_define (output, 'setup_flowstate_write', delta (write_info, read_info)) + + +def edit_gpif (input_name, output_name, inline_name): + input = open (input_name, 'r') + output = open (output_name, 'w') + inline = open (inline_name, 'w') + flow_state_dict = {} + + output.write ('''/* + * Machine generated by "edit-gpif". Do not edit by hand. + */ + +''') + + while 1: + line = input.readline () + line = string.replace (line, '\r','') + line = re.sub (r' *$', r'', line) + + check_flow_state (line, flow_state_dict) + + line = re.sub (r'#include', r'// #include', line) + line = re.sub (r'xdata ', r'', line) + if re.search (r'GpifInit', line): + break + + output.write (line) + + output.close () + write_inlines (inline, flow_state_dict) + inline.close () + + +# gpif.c usrp_gpif.c usrp_gpif_inline.h +edit_gpif (sys.argv[1], sys.argv[2], sys.argv[3]) diff --git a/firmware/src/usrp2/eeprom_boot.a51 b/firmware/src/usrp2/eeprom_boot.a51 new file mode 100644 index 0000000..65e4526 --- /dev/null +++ b/firmware/src/usrp2/eeprom_boot.a51 @@ -0,0 +1,573 @@ +;-------------------------------------------------------- +; Hand tweaked minimal eeprom boot code +;-------------------------------------------------------- + .module eeprom_boot + .optsdcc -mmcs51 --model-small + +;-------------------------------------------------------- +; Public variables in this module +;-------------------------------------------------------- + .globl _eeprom_init + .globl _EP8FIFOBUF + .globl _EP6FIFOBUF + .globl _EP4FIFOBUF + .globl _EP2FIFOBUF + .globl _EP1INBUF + .globl _EP1OUTBUF + .globl _EP0BUF + .globl _CT4 + .globl _CT3 + .globl _CT2 + .globl _CT1 + .globl _USBTEST + .globl _TESTCFG + .globl _DBUG + .globl _UDMACRCQUAL + .globl _UDMACRCL + .globl _UDMACRCH + .globl _GPIFHOLDAMOUNT + .globl _FLOWSTBHPERIOD + .globl _FLOWSTBEDGE + .globl _FLOWSTB + .globl _FLOWHOLDOFF + .globl _FLOWEQ1CTL + .globl _FLOWEQ0CTL + .globl _FLOWLOGIC + .globl _FLOWSTATE + .globl _GPIFABORT + .globl _GPIFREADYSTAT + .globl _GPIFREADYCFG + .globl _XGPIFSGLDATLNOX + .globl _XGPIFSGLDATLX + .globl _XGPIFSGLDATH + .globl _EP8GPIFTRIG + .globl _EP8GPIFPFSTOP + .globl _EP8GPIFFLGSEL + .globl _EP6GPIFTRIG + .globl _EP6GPIFPFSTOP + .globl _EP6GPIFFLGSEL + .globl _EP4GPIFTRIG + .globl _EP4GPIFPFSTOP + .globl _EP4GPIFFLGSEL + .globl _EP2GPIFTRIG + .globl _EP2GPIFPFSTOP + .globl _EP2GPIFFLGSEL + .globl _GPIFTCB0 + .globl _GPIFTCB1 + .globl _GPIFTCB2 + .globl _GPIFTCB3 + .globl _GPIFADRL + .globl _GPIFADRH + .globl _GPIFCTLCFG + .globl _GPIFIDLECTL + .globl _GPIFIDLECS + .globl _GPIFWFSELECT + .globl _SETUPDAT + .globl _SUDPTRCTL + .globl _SUDPTRL + .globl _SUDPTRH + .globl _EP8FIFOBCL + .globl _EP8FIFOBCH + .globl _EP6FIFOBCL + .globl _EP6FIFOBCH + .globl _EP4FIFOBCL + .globl _EP4FIFOBCH + .globl _EP2FIFOBCL + .globl _EP2FIFOBCH + .globl _EP8FIFOFLGS + .globl _EP6FIFOFLGS + .globl _EP4FIFOFLGS + .globl _EP2FIFOFLGS + .globl _EP8CS + .globl _EP6CS + .globl _EP4CS + .globl _EP2CS + .globl _EP1INCS + .globl _EP1OUTCS + .globl _EP0CS + .globl _EP8BCL + .globl _EP8BCH + .globl _EP6BCL + .globl _EP6BCH + .globl _EP4BCL + .globl _EP4BCH + .globl _EP2BCL + .globl _EP2BCH + .globl _EP1INBC + .globl _EP1OUTBC + .globl _EP0BCL + .globl _EP0BCH + .globl _FNADDR + .globl _MICROFRAME + .globl _USBFRAMEL + .globl _USBFRAMEH + .globl _TOGCTL + .globl _WAKEUPCS + .globl _SUSPEND + .globl _USBCS + .globl _XAUTODAT2 + .globl _XAUTODAT1 + .globl _I2CTL + .globl _I2DAT + .globl _I2CS + .globl _PORTECFG + .globl _PORTCCFG + .globl _PORTACFG + .globl _INTSETUP + .globl _INT4IVEC + .globl _INT2IVEC + .globl _CLRERRCNT + .globl _ERRCNTLIM + .globl _USBERRIRQ + .globl _USBERRIE + .globl _GPIFIRQ + .globl _GPIFIE + .globl _EPIRQ + .globl _EPIE + .globl _USBIRQ + .globl _USBIE + .globl _NAKIRQ + .globl _NAKIE + .globl _IBNIRQ + .globl _IBNIE + .globl _EP8FIFOIRQ + .globl _EP8FIFOIE + .globl _EP6FIFOIRQ + .globl _EP6FIFOIE + .globl _EP4FIFOIRQ + .globl _EP4FIFOIE + .globl _EP2FIFOIRQ + .globl _EP2FIFOIE + .globl _OUTPKTEND + .globl _INPKTEND + .globl _EP8ISOINPKTS + .globl _EP6ISOINPKTS + .globl _EP4ISOINPKTS + .globl _EP2ISOINPKTS + .globl _EP8FIFOPFL + .globl _EP8FIFOPFH + .globl _EP6FIFOPFL + .globl _EP6FIFOPFH + .globl _EP4FIFOPFL + .globl _EP4FIFOPFH + .globl _EP2FIFOPFL + .globl _EP2FIFOPFH + .globl _EP8AUTOINLENL + .globl _EP8AUTOINLENH + .globl _EP6AUTOINLENL + .globl _EP6AUTOINLENH + .globl _EP4AUTOINLENL + .globl _EP4AUTOINLENH + .globl _EP2AUTOINLENL + .globl _EP2AUTOINLENH + .globl _EP8FIFOCFG + .globl _EP6FIFOCFG + .globl _EP4FIFOCFG + .globl _EP2FIFOCFG + .globl _EP8CFG + .globl _EP6CFG + .globl _EP4CFG + .globl _EP2CFG + .globl _EP1INCFG + .globl _EP1OUTCFG + .globl _REVCTL + .globl _REVID + .globl _FIFOPINPOLAR + .globl _UART230 + .globl _BPADDRL + .globl _BPADDRH + .globl _BREAKPT + .globl _FIFORESET + .globl _PINFLAGSCD + .globl _PINFLAGSAB + .globl _IFCONFIG + .globl _CPUCS + .globl _RES_WAVEDATA_END + .globl _GPIF_WAVE_DATA +;-------------------------------------------------------- +; special function registers +;-------------------------------------------------------- +_IOA = 0x0080 +_SP = 0x0081 +_DPL = 0x0082 +_DPH = 0x0083 +_DPL1 = 0x0084 +_DPH1 = 0x0085 +_DPS = 0x0086 +_PCON = 0x0087 +_TCON = 0x0088 +_TMOD = 0x0089 +_TL0 = 0x008a +_TL1 = 0x008b +_TH0 = 0x008c +_TH1 = 0x008d +_CKCON = 0x008e +_IOB = 0x0090 +_EXIF = 0x0091 +_MPAGE = 0x0092 +_SCON0 = 0x0098 +_SBUF0 = 0x0099 +_APTR1H = 0x009a +_APTR1L = 0x009b +_AUTODAT1 = 0x009c +_AUTOPTRH2 = 0x009d +_AUTOPTRL2 = 0x009e +_AUTODAT2 = 0x009f +_IOC = 0x00a0 +_INT2CLR = 0x00a1 +_INT4CLR = 0x00a2 +_IE = 0x00a8 +_EP2468STAT = 0x00aa +_EP24FIFOFLGS = 0x00ab +_EP68FIFOFLGS = 0x00ac +_AUTOPTRSETUP = 0x00af +_IOD = 0x00b0 +_IOE = 0x00b1 +_OEA = 0x00b2 +_OEB = 0x00b3 +_OEC = 0x00b4 +_OED = 0x00b5 +_OEE = 0x00b6 +_IP = 0x00b8 +_EP01STAT = 0x00ba +_GPIFTRIG = 0x00bb +_GPIFSGLDATH = 0x00bd +_GPIFSGLDATLX = 0x00be +_GPIFSGLDATLNOX = 0x00bf +_SCON1 = 0x00c0 +_SBUF1 = 0x00c1 +_T2CON = 0x00c8 +_RCAP2L = 0x00ca +_RCAP2H = 0x00cb +_TL2 = 0x00cc +_TH2 = 0x00cd +_PSW = 0x00d0 +_EICON = 0x00d8 +_ACC = 0x00e0 +_EIE = 0x00e8 +_B = 0x00f0 +_EIP = 0x00f8 +;-------------------------------------------------------- +; special function bits +;-------------------------------------------------------- +_SEL = 0x0086 +_IT0 = 0x0088 +_IE0 = 0x0089 +_IT1 = 0x008a +_IE1 = 0x008b +_TR0 = 0x008c +_TF0 = 0x008d +_TR1 = 0x008e +_TF1 = 0x008f +_RI = 0x0098 +_TI = 0x0099 +_RB8 = 0x009a +_TB8 = 0x009b +_REN = 0x009c +_SM2 = 0x009d +_SM1 = 0x009e +_SM0 = 0x009f +_EX0 = 0x00a8 +_ET0 = 0x00a9 +_EX1 = 0x00aa +_ET1 = 0x00ab +_ES0 = 0x00ac +_ET2 = 0x00ad +_ES1 = 0x00ae +_EA = 0x00af +_PX0 = 0x00b8 +_PT0 = 0x00b9 +_PX1 = 0x00ba +_PT1 = 0x00bb +_PS0 = 0x00bc +_PT2 = 0x00bd +_PS1 = 0x00be +_RI1 = 0x00c0 +_TI1 = 0x00c1 +_RB81 = 0x00c2 +_TB81 = 0x00c3 +_REN1 = 0x00c4 +_SM21 = 0x00c5 +_SM11 = 0x00c6 +_SM01 = 0x00c7 +_CP_RL2 = 0x00c8 +_C_T2 = 0x00c9 +_TR2 = 0x00ca +_EXEN2 = 0x00cb +_TCLK = 0x00cc +_RCLK = 0x00cd +_EXF2 = 0x00ce +_TF2 = 0x00cf +_P = 0x00d0 +_FL = 0x00d1 +_OV = 0x00d2 +_RS0 = 0x00d3 +_RS1 = 0x00d4 +_F0 = 0x00d5 +_AC = 0x00d6 +_CY = 0x00d7 +_INT6 = 0x00db +_RESI = 0x00dc +_ERESI = 0x00dd +_SMOD1 = 0x00df +_EIUSB = 0x00e8 +_EI2C = 0x00e9 +_EIEX4 = 0x00ea +_EIEX5 = 0x00eb +_EIEX6 = 0x00ec +_PUSB = 0x00f8 +_PI2C = 0x00f9 +_EIPX4 = 0x00fa +_EIPX5 = 0x00fb +_EIPX6 = 0x00fc +_bitS_CLK = 0x0080 +_bitS_OUT = 0x0081 +_bitS_IN = 0x0082 +_bitALTERA_DATA0 = 0x00a1 +_bitALTERA_DCLK = 0x00a3 +;-------------------------------------------------------- +; overlayable register banks +;-------------------------------------------------------- + .area REG_BANK_0 (REL,OVR,DATA) + .ds 8 +;-------------------------------------------------------- +; internal ram data +;-------------------------------------------------------- + .area DSEG (DATA) +;-------------------------------------------------------- +; overlayable items in internal ram +;-------------------------------------------------------- + .area OSEG (OVR,DATA) +;-------------------------------------------------------- +; Stack segment in internal ram +;-------------------------------------------------------- + .area SSEG (DATA) +__start__stack: + .ds 1 + +;-------------------------------------------------------- +; indirectly addressable internal ram data +;-------------------------------------------------------- + .area ISEG (DATA) +;-------------------------------------------------------- +; bit data +;-------------------------------------------------------- + .area BSEG (BIT) +;-------------------------------------------------------- +; external ram data +;-------------------------------------------------------- + .area XSEG (XDATA) +_GPIF_WAVE_DATA = 0xe400 +_RES_WAVEDATA_END = 0xe480 +_CPUCS = 0xe600 +_IFCONFIG = 0xe601 +_PINFLAGSAB = 0xe602 +_PINFLAGSCD = 0xe603 +_FIFORESET = 0xe604 +_BREAKPT = 0xe605 +_BPADDRH = 0xe606 +_BPADDRL = 0xe607 +_UART230 = 0xe608 +_FIFOPINPOLAR = 0xe609 +_REVID = 0xe60a +_REVCTL = 0xe60b +_EP1OUTCFG = 0xe610 +_EP1INCFG = 0xe611 +_EP2CFG = 0xe612 +_EP4CFG = 0xe613 +_EP6CFG = 0xe614 +_EP8CFG = 0xe615 +_EP2FIFOCFG = 0xe618 +_EP4FIFOCFG = 0xe619 +_EP6FIFOCFG = 0xe61a +_EP8FIFOCFG = 0xe61b +_EP2AUTOINLENH = 0xe620 +_EP2AUTOINLENL = 0xe621 +_EP4AUTOINLENH = 0xe622 +_EP4AUTOINLENL = 0xe623 +_EP6AUTOINLENH = 0xe624 +_EP6AUTOINLENL = 0xe625 +_EP8AUTOINLENH = 0xe626 +_EP8AUTOINLENL = 0xe627 +_EP2FIFOPFH = 0xe630 +_EP2FIFOPFL = 0xe631 +_EP4FIFOPFH = 0xe632 +_EP4FIFOPFL = 0xe633 +_EP6FIFOPFH = 0xe634 +_EP6FIFOPFL = 0xe635 +_EP8FIFOPFH = 0xe636 +_EP8FIFOPFL = 0xe637 +_EP2ISOINPKTS = 0xe640 +_EP4ISOINPKTS = 0xe641 +_EP6ISOINPKTS = 0xe642 +_EP8ISOINPKTS = 0xe643 +_INPKTEND = 0xe648 +_OUTPKTEND = 0xe649 +_EP2FIFOIE = 0xe650 +_EP2FIFOIRQ = 0xe651 +_EP4FIFOIE = 0xe652 +_EP4FIFOIRQ = 0xe653 +_EP6FIFOIE = 0xe654 +_EP6FIFOIRQ = 0xe655 +_EP8FIFOIE = 0xe656 +_EP8FIFOIRQ = 0xe657 +_IBNIE = 0xe658 +_IBNIRQ = 0xe659 +_NAKIE = 0xe65a +_NAKIRQ = 0xe65b +_USBIE = 0xe65c +_USBIRQ = 0xe65d +_EPIE = 0xe65e +_EPIRQ = 0xe65f +_GPIFIE = 0xe660 +_GPIFIRQ = 0xe661 +_USBERRIE = 0xe662 +_USBERRIRQ = 0xe663 +_ERRCNTLIM = 0xe664 +_CLRERRCNT = 0xe665 +_INT2IVEC = 0xe666 +_INT4IVEC = 0xe667 +_INTSETUP = 0xe668 +_PORTACFG = 0xe670 +_PORTCCFG = 0xe671 +_PORTECFG = 0xe672 +_I2CS = 0xe678 +_I2DAT = 0xe679 +_I2CTL = 0xe67a +_XAUTODAT1 = 0xe67b +_XAUTODAT2 = 0xe67c +_USBCS = 0xe680 +_SUSPEND = 0xe681 +_WAKEUPCS = 0xe682 +_TOGCTL = 0xe683 +_USBFRAMEH = 0xe684 +_USBFRAMEL = 0xe685 +_MICROFRAME = 0xe686 +_FNADDR = 0xe687 +_EP0BCH = 0xe68a +_EP0BCL = 0xe68b +_EP1OUTBC = 0xe68d +_EP1INBC = 0xe68f +_EP2BCH = 0xe690 +_EP2BCL = 0xe691 +_EP4BCH = 0xe694 +_EP4BCL = 0xe695 +_EP6BCH = 0xe698 +_EP6BCL = 0xe699 +_EP8BCH = 0xe69c +_EP8BCL = 0xe69d +_EP0CS = 0xe6a0 +_EP1OUTCS = 0xe6a1 +_EP1INCS = 0xe6a2 +_EP2CS = 0xe6a3 +_EP4CS = 0xe6a4 +_EP6CS = 0xe6a5 +_EP8CS = 0xe6a6 +_EP2FIFOFLGS = 0xe6a7 +_EP4FIFOFLGS = 0xe6a8 +_EP6FIFOFLGS = 0xe6a9 +_EP8FIFOFLGS = 0xe6aa +_EP2FIFOBCH = 0xe6ab +_EP2FIFOBCL = 0xe6ac +_EP4FIFOBCH = 0xe6ad +_EP4FIFOBCL = 0xe6ae +_EP6FIFOBCH = 0xe6af +_EP6FIFOBCL = 0xe6b0 +_EP8FIFOBCH = 0xe6b1 +_EP8FIFOBCL = 0xe6b2 +_SUDPTRH = 0xe6b3 +_SUDPTRL = 0xe6b4 +_SUDPTRCTL = 0xe6b5 +_SETUPDAT = 0xe6b8 +_GPIFWFSELECT = 0xe6c0 +_GPIFIDLECS = 0xe6c1 +_GPIFIDLECTL = 0xe6c2 +_GPIFCTLCFG = 0xe6c3 +_GPIFADRH = 0xe6c4 +_GPIFADRL = 0xe6c5 +_GPIFTCB3 = 0xe6ce +_GPIFTCB2 = 0xe6cf +_GPIFTCB1 = 0xe6d0 +_GPIFTCB0 = 0xe6d1 +_EP2GPIFFLGSEL = 0xe6d2 +_EP2GPIFPFSTOP = 0xe6d3 +_EP2GPIFTRIG = 0xe6d4 +_EP4GPIFFLGSEL = 0xe6da +_EP4GPIFPFSTOP = 0xe6db +_EP4GPIFTRIG = 0xe6dc +_EP6GPIFFLGSEL = 0xe6e2 +_EP6GPIFPFSTOP = 0xe6e3 +_EP6GPIFTRIG = 0xe6e4 +_EP8GPIFFLGSEL = 0xe6ea +_EP8GPIFPFSTOP = 0xe6eb +_EP8GPIFTRIG = 0xe6ec +_XGPIFSGLDATH = 0xe6f0 +_XGPIFSGLDATLX = 0xe6f1 +_XGPIFSGLDATLNOX = 0xe6f2 +_GPIFREADYCFG = 0xe6f3 +_GPIFREADYSTAT = 0xe6f4 +_GPIFABORT = 0xe6f5 +_FLOWSTATE = 0xe6c6 +_FLOWLOGIC = 0xe6c7 +_FLOWEQ0CTL = 0xe6c8 +_FLOWEQ1CTL = 0xe6c9 +_FLOWHOLDOFF = 0xe6ca +_FLOWSTB = 0xe6cb +_FLOWSTBEDGE = 0xe6cc +_FLOWSTBHPERIOD = 0xe6cd +_GPIFHOLDAMOUNT = 0xe60c +_UDMACRCH = 0xe67d +_UDMACRCL = 0xe67e +_UDMACRCQUAL = 0xe67f +_DBUG = 0xe6f8 +_TESTCFG = 0xe6f9 +_USBTEST = 0xe6fa +_CT1 = 0xe6fb +_CT2 = 0xe6fc +_CT3 = 0xe6fd +_CT4 = 0xe6fe +_EP0BUF = 0xe740 +_EP1OUTBUF = 0xe780 +_EP1INBUF = 0xe7c0 +_EP2FIFOBUF = 0xf000 +_EP4FIFOBUF = 0xf400 +_EP6FIFOBUF = 0xf800 +_EP8FIFOBUF = 0xfc00 +;-------------------------------------------------------- +; external initialized ram data +;-------------------------------------------------------- +;-------------------------------------------------------- +; interrupt vector +;-------------------------------------------------------- + .area CSEG (CODE) +__interrupt_vect: + ljmp __sdcc_gsinit_startup +;-------------------------------------------------------- +; global & static initialisations +;-------------------------------------------------------- + .area GSINIT (CODE) + .area GSFINAL (CODE) + .area GSINIT (CODE) +__sdcc_gsinit_startup: + mov sp,#__start__stack - 1 + lcall __sdcc_external_startup + mov a,dpl + jz __sdcc_init_data + ljmp __sdcc_program_startup +__sdcc_init_data: + .area GSFINAL (CODE) + ljmp __sdcc_program_startup +;-------------------------------------------------------- +; Home +;-------------------------------------------------------- + .area HOME (CODE) + .area CSEG (CODE) +;-------------------------------------------------------- +; code +;-------------------------------------------------------- + .area CSEG (CODE) +__sdcc_program_startup: + lcall _eeprom_init +; return from _eeprom_init will spin here + sjmp . + .area CSEG (CODE) diff --git a/firmware/src/usrp2/eeprom_init.c b/firmware/src/usrp2/eeprom_init.c new file mode 100644 index 0000000..fb949bc --- /dev/null +++ b/firmware/src/usrp2/eeprom_init.c @@ -0,0 +1,116 @@ +/* -*- c++ -*- */ +/* + * Copyright 2004 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#include "usrp_common.h" +#include "usrp_commands.h" +#include "spi.h" + +/* + * the host side fpga loader code pushes an MD5 hash of the bitstream + * into hash1. + */ +#define USRP_HASH_SIZE 16 +xdata at USRP_HASH_SLOT_0_ADDR unsigned char hash0[USRP_HASH_SIZE]; + + +#define enable_codecs() USRP_PA &= ~(bmPA_SEN_CODEC_A | bmPA_SEN_CODEC_B) +#define disable_all() USRP_PA |= (bmPA_SEN_CODEC_A | bmPA_SEN_CODEC_B) + +static void +write_byte_msb (unsigned char v); + +void +write_both_9862s (unsigned char header_lo, unsigned char v) +{ + enable_codecs (); + + write_byte_msb (header_lo); + write_byte_msb (v); + + disable_all (); +} + +// ---------------------------------------------------------------- + +static void +write_byte_msb (unsigned char v) +{ + unsigned char n = 8; + do { + v = (v << 1) | (v >> 7); // rotate left (MSB into bottom bit) + bitS_OUT = v & 0x1; + bitS_CLK = 1; + bitS_CLK = 0; + } while (--n != 0); +} + +// ---------------------------------------------------------------- + +#define REG_RX_PWR_DN 1 +#define REG_TX_PWR_DN 8 +#define REG_TX_MODULATOR 20 + +void eeprom_init (void) +{ + unsigned short counter; + unsigned char i; + + // configure IO ports (B and D are used by GPIF) + + IOA = bmPORT_A_INITIAL; // Port A initial state + OEA = bmPORT_A_OUTPUTS; // Port A direction register + + IOC = bmPORT_C_INITIAL; // Port C initial state + OEC = bmPORT_C_OUTPUTS; // Port C direction register + + IOE = bmPORT_E_INITIAL; // Port E initial state + OEE = bmPORT_E_OUTPUTS; // Port E direction register + + EP0BCH = 0; SYNCDELAY; + + // USBCS &= ~bmRENUM; // chip firmware handles commands + USBCS = 0; // chip firmware handles commands + + USRP_PC &= ~bmPC_nRESET; // active low reset + USRP_PC |= bmPC_nRESET; + + // init_spi (); + bitS_OUT = 0; /* idle state has CLK = 0 */ + + write_both_9862s (REG_RX_PWR_DN, 0x01); + write_both_9862s (REG_TX_PWR_DN, 0x0f); // pwr dn digital and analog_both + write_both_9862s (REG_TX_MODULATOR, 0x00); // coarse & fine modulators disabled + + // zero firmware hash slot + i = 0; + do { + hash0[i] = 0; + i++; + } while (i != USRP_HASH_SIZE); + + counter = 0; + while (1){ + counter++; + if (counter & 0x8000) + IOC ^= bmPC_LED0; + } +} diff --git a/firmware/src/usrp2/eeprom_io.c b/firmware/src/usrp2/eeprom_io.c new file mode 100644 index 0000000..1aa51a0 --- /dev/null +++ b/firmware/src/usrp2/eeprom_io.c @@ -0,0 +1,65 @@ +/* -*- c++ -*- */ +/* + * Copyright 2006 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#include "eeprom_io.h" +#include "i2c.h" +#include "delay.h" + +// returns non-zero if successful, else 0 +unsigned char +eeprom_read (unsigned char i2c_addr, unsigned char eeprom_offset, + xdata unsigned char *buf, unsigned char len) +{ + // We setup a random read by first doing a "zero byte write". + // Writes carry an address. Reads use an implicit address. + + static xdata unsigned char cmd[1]; + cmd[0] = eeprom_offset; + if (!i2c_write(i2c_addr, cmd, 1)) + return 0; + + return i2c_read(i2c_addr, buf, len); +} + + +#if 0 + +// returns non-zero if successful, else 0 +unsigned char +eeprom_write (unsigned char i2c_addr, unsigned char eeprom_offset, + const xdata unsigned char *buf, unsigned char len) +{ + static xdata unsigned char cmd[2]; + unsigned char ok; + + while (len-- > 0){ + cmd[0] = eeprom_offset++; + cmd[1] = *buf++; + ok = i2c_write(i2c_addr, cmd, 2); + mdelay(10); // delay 10ms worst case write time + if (!ok) + return 0; + } + return 1; +} + +#endif diff --git a/firmware/src/usrp2/eeprom_io.h b/firmware/src/usrp2/eeprom_io.h new file mode 100644 index 0000000..ece8036 --- /dev/null +++ b/firmware/src/usrp2/eeprom_io.h @@ -0,0 +1,38 @@ +/* -*- c++ -*- */ +/* + * Copyright 2006 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifndef INCLUDED_EEPROM_IO_H +#define INCLUDED_EEPROM_IO_H + + +// returns non-zero if successful, else 0 +unsigned char +eeprom_read (unsigned char i2c_addr, unsigned char eeprom_offset, + xdata unsigned char *buf, unsigned char len); + +// returns non-zero if successful, else 0 +unsigned char +eeprom_write (unsigned char i2c_addr, unsigned char eeprom_offset, + const xdata unsigned char *buf, unsigned char len); + + +#endif /* INCLUDED_EEPROM_IO_H */ diff --git a/firmware/src/usrp2/fpga_load.c b/firmware/src/usrp2/fpga_load.c new file mode 100644 index 0000000..b0256e9 --- /dev/null +++ b/firmware/src/usrp2/fpga_load.c @@ -0,0 +1 @@ +#include "../common/fpga_load.c" diff --git a/firmware/src/usrp2/fpga_rev2.c b/firmware/src/usrp2/fpga_rev2.c new file mode 100644 index 0000000..cd282d6 --- /dev/null +++ b/firmware/src/usrp2/fpga_rev2.c @@ -0,0 +1,122 @@ +/* -*- c++ -*- */ +/* + * Copyright 2004 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#include "fpga.h" +#include "fpga_regs_common.h" +#include "usrp_common.h" +#include "usrp_globals.h" +#include "spi.h" + +unsigned char g_tx_reset = 0; +unsigned char g_rx_reset = 0; + +void +fpga_write_reg (unsigned char regno, const xdata unsigned char *regval) +{ + spi_write (0, 0x00 | (regno & 0x7f), + SPI_ENABLE_FPGA, + SPI_FMT_MSB | SPI_FMT_HDR_1, + regval, 4); +} + + +static xdata unsigned char regval[4] = {0, 0, 0, 0}; + +static void +write_fpga_master_ctrl (void) +{ + unsigned char v = 0; + if (g_tx_enable) + v |= bmFR_MC_ENABLE_TX; + if (g_rx_enable) + v |= bmFR_MC_ENABLE_RX; + if (g_tx_reset) + v |= bmFR_MC_RESET_TX; + if (g_rx_reset) + v |= bmFR_MC_RESET_RX; + regval[3] = v; + + fpga_write_reg (FR_MASTER_CTRL, regval); +} + +// Resets both AD9862's and the FPGA serial bus interface. + +void +fpga_set_reset (unsigned char on) +{ + on &= 0x1; + + if (on){ + USRP_PC &= ~bmPC_nRESET; // active low + g_tx_enable = 0; + g_rx_enable = 0; + g_tx_reset = 0; + g_rx_reset = 0; + } + else + USRP_PC |= bmPC_nRESET; +} + +void +fpga_set_tx_enable (unsigned char on) +{ + on &= 0x1; + g_tx_enable = on; + + write_fpga_master_ctrl (); + + if (on){ + g_tx_underrun = 0; + fpga_clear_flags (); + } +} + +void +fpga_set_rx_enable (unsigned char on) +{ + on &= 0x1; + g_rx_enable = on; + + write_fpga_master_ctrl (); + if (on){ + g_rx_overrun = 0; + fpga_clear_flags (); + } +} + +void +fpga_set_tx_reset (unsigned char on) +{ + on &= 0x1; + g_tx_reset = on; + + write_fpga_master_ctrl (); +} + +void +fpga_set_rx_reset (unsigned char on) +{ + on &= 0x1; + g_rx_reset = on; + + write_fpga_master_ctrl (); +} diff --git a/firmware/src/usrp2/fpga_rev2.h b/firmware/src/usrp2/fpga_rev2.h new file mode 100644 index 0000000..6c04271 --- /dev/null +++ b/firmware/src/usrp2/fpga_rev2.h @@ -0,0 +1,58 @@ +/* + * USRP - Universal Software Radio Peripheral + * + * Copyright (C) 2003,2004 Free Software Foundation, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef INCLUDED_FPGA_REV1_H +#define INCLUDED_FPGA_REV1_H + +void fpga_set_reset (unsigned char v); +void fpga_set_tx_enable (unsigned char v); +void fpga_set_rx_enable (unsigned char v); +void fpga_set_tx_reset (unsigned char v); +void fpga_set_rx_reset (unsigned char v); + +unsigned char fpga_has_room_for_packet (void); +unsigned char fpga_has_packet_avail (void); + +#if (UC_BOARD_HAS_FPGA) +/* + * return TRUE iff FPGA internal fifo has room for 512 bytes. + */ +#define fpga_has_room_for_packet() (GPIFREADYSTAT & bmFPGA_HAS_SPACE) + +/* + * return TRUE iff FPGA internal fifo has at least 512 bytes available. + */ +#define fpga_has_packet_avail() (GPIFREADYSTAT & bmFPGA_PKT_AVAIL) + +#else /* no FPGA on board. fake it. */ + +#define fpga_has_room_for_packet() TRUE +#define fpga_has_packet_avail() TRUE + +#endif + +#define fpga_clear_flags() \ + do { \ + USRP_PE |= bmPE_FPGA_CLR_STATUS; \ + USRP_PE &= ~bmPE_FPGA_CLR_STATUS; \ + } while (0) + + +#endif /* INCLUDED_FPGA_REV1_H */ diff --git a/firmware/src/usrp2/gpif.c b/firmware/src/usrp2/gpif.c new file mode 100644 index 0000000..f6745a4 --- /dev/null +++ b/firmware/src/usrp2/gpif.c @@ -0,0 +1,292 @@ +// This program configures the General Programmable Interface (GPIF) for FX2. +// Please do not modify sections of text which are marked as "DO NOT EDIT ...". +// +// DO NOT EDIT ... +// GPIF Initialization +// Interface Timing Async +// Internal Ready Init IntRdy=1 +// CTL Out Tristate-able Binary +// SingleWrite WF Select 1 +// SingleRead WF Select 0 +// FifoWrite WF Select 3 +// FifoRead WF Select 2 +// Data Bus Idle Drive Tristate +// END DO NOT EDIT + +// DO NOT EDIT ... +// GPIF Wave Names +// Wave 0 = singlerd +// Wave 1 = singlewr +// Wave 2 = FIFORd +// Wave 3 = FIFOWr + +// GPIF Ctrl Outputs Level +// CTL 0 = WEN# CMOS +// CTL 1 = REN# CMOS +// CTL 2 = OE# CMOS +// CTL 3 = CLRST CMOS +// CTL 4 = unused CMOS +// CTL 5 = BOGUS CMOS + +// GPIF Rdy Inputs +// RDY0 = EF# +// RDY1 = FF# +// RDY2 = unused +// RDY3 = unused +// RDY4 = unused +// RDY5 = TCXpire +// FIFOFlag = FIFOFlag +// IntReady = IntReady +// END DO NOT EDIT +// DO NOT EDIT ... +// +// GPIF Waveform 0: singlerd +// +// Interval 0 1 2 3 4 5 6 Idle (7) +// _________ _________ _________ _________ _________ _________ _________ _________ +// +// AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val +// DataMode NO Data NO Data NO Data NO Data NO Data NO Data NO Data +// NextData SameData SameData SameData SameData SameData SameData SameData +// Int Trig No Int No Int No Int No Int No Int No Int No Int +// IF/Wait Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 +// Term A +// LFunc +// Term B +// Branch1 +// Branch0 +// Re-Exec +// Sngl/CRC Default Default Default Default Default Default Default +// WEN# 0 0 0 0 0 0 0 0 +// REN# 0 0 0 0 0 0 0 0 +// OE# 0 0 0 0 0 0 0 0 +// CLRST 0 0 0 0 0 0 0 0 +// unused 0 0 0 0 0 0 0 0 +// BOGUS 0 0 0 0 0 0 0 0 +// +// END DO NOT EDIT +// DO NOT EDIT ... +// +// GPIF Waveform 1: singlewr +// +// Interval 0 1 2 3 4 5 6 Idle (7) +// _________ _________ _________ _________ _________ _________ _________ _________ +// +// AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val +// DataMode Activate Activate Activate Activate Activate Activate Activate +// NextData SameData SameData SameData SameData SameData SameData SameData +// Int Trig No Int No Int No Int No Int No Int No Int No Int +// IF/Wait Wait 1 IF Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 +// Term A EF# +// LFunc AND +// Term B EF# +// Branch1 ThenIdle +// Branch0 ElseIdle +// Re-Exec No +// Sngl/CRC Default Default Default Default Default Default Default +// WEN# 0 1 1 1 1 1 1 0 +// REN# 0 0 0 0 0 0 0 0 +// OE# 0 0 0 0 0 0 0 0 +// CLRST 0 0 0 0 0 0 0 0 +// unused 0 0 0 0 0 0 0 0 +// BOGUS 0 0 0 0 0 0 0 0 +// +// END DO NOT EDIT +// DO NOT EDIT ... +// +// GPIF Waveform 2: FIFORd +// +// Interval 0 1 2 3 4 5 6 Idle (7) +// _________ _________ _________ _________ _________ _________ _________ _________ +// +// AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val +// DataMode NO Data Activate NO Data NO Data NO Data NO Data NO Data +// NextData SameData SameData SameData SameData SameData SameData SameData +// Int Trig No Int No Int No Int No Int No Int No Int No Int +// IF/Wait Wait 1 IF Wait 1 IF Wait 1 Wait 1 Wait 1 +// Term A TCXpire TCXpire +// LFunc AND AND +// Term B TCXpire TCXpire +// Branch1 Then 2 ThenIdle +// Branch0 Else 1 ElseIdle +// Re-Exec No No +// Sngl/CRC Default Default Default Default Default Default Default +// WEN# 0 0 0 0 0 0 0 0 +// REN# 1 0 0 0 0 0 0 0 +// OE# 1 1 1 0 0 0 0 0 +// CLRST 0 0 0 0 0 0 0 0 +// unused 0 0 0 0 0 0 0 0 +// BOGUS 0 0 0 0 0 0 0 0 +// +// END DO NOT EDIT +// DO NOT EDIT ... +// +// GPIF Waveform 3: FIFOWr +// +// Interval 0 1 2 3 4 5 6 Idle (7) +// _________ _________ _________ _________ _________ _________ _________ _________ +// +// AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val +// DataMode NO Data Activate Activate Activate Activate Activate Activate +// NextData SameData SameData SameData SameData SameData SameData SameData +// Int Trig No Int No Int No Int No Int No Int No Int No Int +// IF/Wait Wait 1 IF Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 +// Term A TCXpire +// LFunc AND +// Term B TCXpire +// Branch1 ThenIdle +// Branch0 Else 1 +// Re-Exec No +// Sngl/CRC Default Default Default Default Default Default Default +// WEN# 0 0 0 0 0 0 0 0 +// REN# 0 0 0 0 0 0 0 0 +// OE# 0 0 0 0 0 0 0 0 +// CLRST 0 0 0 0 0 0 0 0 +// unused 0 0 0 0 0 0 0 0 +// BOGUS 0 0 0 0 0 0 0 0 +// +// END DO NOT EDIT + +// GPIF Program Code + +// DO NOT EDIT ... +#include "fx2.h" +#include "fx2regs.h" +#include "fx2sdly.h" // SYNCDELAY macro +// END DO NOT EDIT + +// DO NOT EDIT ... +const char xdata WaveData[128] = +{ +// Wave 0 +/* LenBr */ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07, +/* Opcode*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +/* Output*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +/* LFun */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, +// Wave 1 +/* LenBr */ 0x01, 0x3F, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07, +/* Opcode*/ 0x22, 0x03, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00, +/* Output*/ 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, +/* LFun */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, +// Wave 2 +/* LenBr */ 0x01, 0x11, 0x01, 0x3F, 0x01, 0x01, 0x01, 0x07, +/* Opcode*/ 0x00, 0x03, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, +/* Output*/ 0x06, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, +/* LFun */ 0x00, 0x2D, 0x00, 0x2D, 0x00, 0x00, 0x00, 0x3F, +// Wave 3 +/* LenBr */ 0x01, 0x39, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07, +/* Opcode*/ 0x00, 0x03, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00, +/* Output*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +/* LFun */ 0x00, 0x2D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, +}; +// END DO NOT EDIT + +// DO NOT EDIT ... +const char xdata FlowStates[36] = +{ +/* Wave 0 FlowStates */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/* Wave 1 FlowStates */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +/* Wave 2 FlowStates */ 0x81,0x2D,0x26,0x00,0x04,0x04,0x03,0x02,0x00, +/* Wave 3 FlowStates */ 0x81,0x2D,0x21,0x00,0x04,0x04,0x03,0x02,0x00, +}; +// END DO NOT EDIT + +// DO NOT EDIT ... +const char xdata InitData[7] = +{ +/* Regs */ 0xA0,0x00,0x00,0x00,0xEE,0x4E,0x00 +}; +// END DO NOT EDIT + +// TO DO: You may add additional code below. + +void GpifInit( void ) +{ + BYTE i; + + // Registers which require a synchronization delay, see section 15.14 + // FIFORESET FIFOPINPOLAR + // INPKTEND OUTPKTEND + // EPxBCH:L REVCTL + // GPIFTCB3 GPIFTCB2 + // GPIFTCB1 GPIFTCB0 + // EPxFIFOPFH:L EPxAUTOINLENH:L + // EPxFIFOCFG EPxGPIFFLGSEL + // PINFLAGSxx EPxFIFOIRQ + // EPxFIFOIE GPIFIRQ + // GPIFIE GPIFADRH:L + // UDMACRCH:L EPxGPIFTRIG + // GPIFTRIG + + // Note: The pre-REVE EPxGPIFTCH/L register are affected, as well... + // ...these have been replaced by GPIFTC[B3:B0] registers + + // 8051 doesn't have access to waveform memories 'til + // the part is in GPIF mode. + + IFCONFIG = 0xEE; + // IFCLKSRC=1 , FIFOs executes on internal clk source + // xMHz=1 , 48MHz internal clk rate + // IFCLKOE=0 , Don't drive IFCLK pin signal at 48MHz + // IFCLKPOL=0 , Don't invert IFCLK pin signal from internal clk + // ASYNC=1 , master samples asynchronous + // GSTATE=1 , Drive GPIF states out on PORTE[2:0], debug WF + // IFCFG[1:0]=10, FX2 in GPIF master mode + + GPIFABORT = 0xFF; // abort any waveforms pending + + GPIFREADYCFG = InitData[ 0 ]; + GPIFCTLCFG = InitData[ 1 ]; + GPIFIDLECS = InitData[ 2 ]; + GPIFIDLECTL = InitData[ 3 ]; + GPIFWFSELECT = InitData[ 5 ]; + GPIFREADYSTAT = InitData[ 6 ]; + + // use dual autopointer feature... + AUTOPTRSETUP = 0x07; // inc both pointers, + // ...warning: this introduces pdata hole(s) + // ...at E67B (XAUTODAT1) and E67C (XAUTODAT2) + + // source + AUTOPTRH1 = MSB( &WaveData ); + AUTOPTRL1 = LSB( &WaveData ); + + // destination + AUTOPTRH2 = 0xE4; + AUTOPTRL2 = 0x00; + + // transfer + for ( i = 0x00; i < 128; i++ ) + { + EXTAUTODAT2 = EXTAUTODAT1; + } + +// Configure GPIF Address pins, output initial value, + PORTCCFG = 0xFF; // [7:0] as alt. func. GPIFADR[7:0] + OEC = 0xFF; // and as outputs + PORTECFG |= 0x80; // [8] as alt. func. GPIFADR[8] + OEE |= 0x80; // and as output + +// ...OR... tri-state GPIFADR[8:0] pins +// PORTCCFG = 0x00; // [7:0] as port I/O +// OEC = 0x00; // and as inputs +// PORTECFG &= 0x7F; // [8] as port I/O +// OEE &= 0x7F; // and as input + +// GPIF address pins update when GPIFADRH/L written + SYNCDELAY; // + GPIFADRH = 0x00; // bits[7:1] always 0 + SYNCDELAY; // + GPIFADRL = 0x00; // point to PERIPHERAL address 0x0000 + +// Configure GPIF FlowStates registers for Wave 0 of WaveData + FLOWSTATE = FlowStates[ 0 ]; + FLOWLOGIC = FlowStates[ 1 ]; + FLOWEQ0CTL = FlowStates[ 2 ]; + FLOWEQ1CTL = FlowStates[ 3 ]; + FLOWHOLDOFF = FlowStates[ 4 ]; + FLOWSTB = FlowStates[ 5 ]; + FLOWSTBEDGE = FlowStates[ 6 ]; + FLOWSTBHPERIOD = FlowStates[ 7 ]; +} + diff --git a/firmware/src/usrp2/gpif.gpf b/firmware/src/usrp2/gpif.gpf new file mode 100755 index 0000000000000000000000000000000000000000..854e253994b44e8ba4a1888c2304c565dfe9c24f GIT binary patch literal 5341 zcmeH~F>BjE6vw5;ZNm+1>0W3tWHYp-?(R5N2!t5qq;5xpg)udz$Tp#n#aqV?ow8@_ zp3jgeQ$9&PK;B={3+MBl?oLqL!4IC!KIwPwJ>7dxQv2JdkDr^356xCvJPm>%3~?aM z{?M2UW+3_LFziHi5s@yYi&-*MhST=fALBF;(NWZmCWDbUn$F{7F#IX91BF51U&@03^B?;f7@#EQktqbEe~kj}=_(IiQS*(G0S;s9qV3e5aTXqg>X^ zUeUa%^~kK8g1F_}KFV5;iD%zUEr9(r@vsdR_ucgTH?iQr<2-ysY<^9Vy7NlR9Aax;|XgQol@DcW1 z+XgrYw_A)pZG(AkIk0Vd>rhijWy{`JOf1K3YFDQ6W82JQeO=3O<$cRnweMTLD(_pq z%=fbI(6{)q%|2}DHdv)#`ssL{I78?Yer7Vl&&W2K?cN02OruKM){S4Y`G4!?0l%pT A*8l(j literal 0 HcmV?d00001 diff --git a/firmware/src/usrp2/init_gpif.c b/firmware/src/usrp2/init_gpif.c new file mode 100644 index 0000000..0f5944b --- /dev/null +++ b/firmware/src/usrp2/init_gpif.c @@ -0,0 +1 @@ +#include "../common/init_gpif.c" diff --git a/firmware/src/usrp2/spi.c b/firmware/src/usrp2/spi.c new file mode 100644 index 0000000..0c6abb4 --- /dev/null +++ b/firmware/src/usrp2/spi.c @@ -0,0 +1,381 @@ +/* -*- c++ -*- */ +/* + * Copyright 2004,2006 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#include "spi.h" +#include "usrp_rev2_regs.h" + +static void +setup_enables (unsigned char enables) +{ + // Software eanbles are active high. + // Hardware enables are active low. + + // Uhh, the CODECs are active low, but the FPGA is active high... + enables ^= SPI_ENABLE_FPGA; + + // KLUDGE: This code is fragile, but reasonably fast... + // low three bits of enables go into port A + USRP_PA = USRP_PA | (0x7 << 3); // disable FPGA, CODEC_A, CODEC_B + USRP_PA ^= (enables & 0x7) << 3; // enable specified devs + + // high four bits of enables go into port E + USRP_PE = USRP_PE | (0xf << 4); // disable TX_A, RX_A, TX_B, RX_B + USRP_PE ^= (enables & 0xf0); // enable specified devs +} + +#define disable_all() setup_enables (0) + +void +init_spi (void) +{ + disable_all (); /* disable all devs */ + bitS_OUT = 0; /* idle state has CLK = 0 */ +} + +#if 0 +static unsigned char +count_bits8 (unsigned char v) +{ + static unsigned char count4[16] = { + 0, // 0 + 1, // 1 + 1, // 2 + 2, // 3 + 1, // 4 + 2, // 5 + 2, // 6 + 3, // 7 + 1, // 8 + 2, // 9 + 2, // a + 3, // b + 2, // c + 3, // d + 3, // e + 4 // f + }; + return count4[v & 0xf] + count4[(v >> 4) & 0xf]; +} + +#else + +static unsigned char +count_bits8 (unsigned char v) +{ + unsigned char count = 0; + if (v & (1 << 0)) count++; + if (v & (1 << 1)) count++; + if (v & (1 << 2)) count++; + if (v & (1 << 3)) count++; + if (v & (1 << 4)) count++; + if (v & (1 << 5)) count++; + if (v & (1 << 6)) count++; + if (v & (1 << 7)) count++; + return count; +} +#endif + +static void +write_byte_msb (unsigned char v); + +static void +write_bytes_msb (const xdata unsigned char *buf, unsigned char len); + +static void +read_bytes_msb (xdata unsigned char *buf, unsigned char len); + + +// returns non-zero if successful, else 0 +unsigned char +spi_read (unsigned char header_hi, unsigned char header_lo, + unsigned char enables, unsigned char format, + xdata unsigned char *buf, unsigned char len) +{ + if (count_bits8 (enables) > 1) + return 0; // error, too many enables set + + setup_enables (enables); + + if (format & SPI_FMT_LSB){ // order: LSB +#if 1 + return 0; // error, not implemented +#else + switch (format & SPI_FMR_HDR_MASK){ + case SPI_FMT_HDR_0: + break; + case SPI_FMT_HDR_1: + write_byte_lsb (header_lo); + break; + case SPI_FMT_HDR_2: + write_byte_lsb (header_lo); + write_byte_lsb (header_hi); + break; + default: + return 0; // error + } + if (len != 0) + read_bytes_lsb (buf, len); +#endif + } + + else { // order: MSB + + switch (format & SPI_FMT_HDR_MASK){ + case SPI_FMT_HDR_0: + break; + case SPI_FMT_HDR_1: + write_byte_msb (header_lo); + break; + case SPI_FMT_HDR_2: + write_byte_msb (header_hi); + write_byte_msb (header_lo); + break; + default: + return 0; // error + } + if (len != 0) + read_bytes_msb (buf, len); + } + + disable_all (); + return 1; // success +} + + +// returns non-zero if successful, else 0 +unsigned char +spi_write (unsigned char header_hi, unsigned char header_lo, + unsigned char enables, unsigned char format, + const xdata unsigned char *buf, unsigned char len) +{ + setup_enables (enables); + + if (format & SPI_FMT_LSB){ // order: LSB +#if 1 + return 0; // error, not implemented +#else + switch (format & SPI_FMR_HDR_MASK){ + case SPI_FMT_HDR_0: + break; + case SPI_FMT_HDR_1: + write_byte_lsb (header_lo); + break; + case SPI_FMT_HDR_2: + write_byte_lsb (header_lo); + write_byte_lsb (header_hi); + break; + default: + return 0; // error + } + if (len != 0) + write_bytes_lsb (buf, len); +#endif + } + + else { // order: MSB + + switch (format & SPI_FMT_HDR_MASK){ + case SPI_FMT_HDR_0: + break; + case SPI_FMT_HDR_1: + write_byte_msb (header_lo); + break; + case SPI_FMT_HDR_2: + write_byte_msb (header_hi); + write_byte_msb (header_lo); + break; + default: + return 0; // error + } + if (len != 0) + write_bytes_msb (buf, len); + } + + disable_all (); + return 1; // success +} + +// ---------------------------------------------------------------- + +static void +write_byte_msb (unsigned char v) +{ + v = (v << 1) | (v >> 7); // rotate left (MSB into bottom bit) + bitS_OUT = v & 0x1; + bitS_CLK = 1; + bitS_CLK = 0; + + v = (v << 1) | (v >> 7); // rotate left (MSB into bottom bit) + bitS_OUT = v & 0x1; + bitS_CLK = 1; + bitS_CLK = 0; + + v = (v << 1) | (v >> 7); // rotate left (MSB into bottom bit) + bitS_OUT = v & 0x1; + bitS_CLK = 1; + bitS_CLK = 0; + + v = (v << 1) | (v >> 7); // rotate left (MSB into bottom bit) + bitS_OUT = v & 0x1; + bitS_CLK = 1; + bitS_CLK = 0; + + v = (v << 1) | (v >> 7); // rotate left (MSB into bottom bit) + bitS_OUT = v & 0x1; + bitS_CLK = 1; + bitS_CLK = 0; + + v = (v << 1) | (v >> 7); // rotate left (MSB into bottom bit) + bitS_OUT = v & 0x1; + bitS_CLK = 1; + bitS_CLK = 0; + + v = (v << 1) | (v >> 7); // rotate left (MSB into bottom bit) + bitS_OUT = v & 0x1; + bitS_CLK = 1; + bitS_CLK = 0; + + v = (v << 1) | (v >> 7); // rotate left (MSB into bottom bit) + bitS_OUT = v & 0x1; + bitS_CLK = 1; + bitS_CLK = 0; +} + +static void +write_bytes_msb (const xdata unsigned char *buf, unsigned char len) +{ + while (len-- != 0){ + write_byte_msb (*buf++); + } +} + +#if 0 +/* + * This is incorrectly compiled by SDCC 2.4.0 + */ +static unsigned char +read_byte_msb (void) +{ + unsigned char v = 0; + + bitS_CLK = 1; + v |= bitS_IN; + bitS_CLK = 0; + + v = v << 1; + bitS_CLK = 1; + v |= bitS_IN; + bitS_CLK = 0; + + v = v << 1; + bitS_CLK = 1; + v |= bitS_IN; + bitS_CLK = 0; + + v = v << 1; + bitS_CLK = 1; + v |= bitS_IN; + bitS_CLK = 0; + + v = v << 1; + bitS_CLK = 1; + v |= bitS_IN; + bitS_CLK = 0; + + v = v << 1; + bitS_CLK = 1; + v |= bitS_IN; + bitS_CLK = 0; + + v = v << 1; + bitS_CLK = 1; + v |= bitS_IN; + bitS_CLK = 0; + + v = v << 1; + bitS_CLK = 1; + v |= bitS_IN; + bitS_CLK = 0; + + return v; +} +#else +static unsigned char +read_byte_msb (void) _naked +{ + _asm + clr a + + setb _bitS_CLK + mov c, _bitS_IN + rlc a + clr _bitS_CLK + + setb _bitS_CLK + mov c, _bitS_IN + rlc a + clr _bitS_CLK + + setb _bitS_CLK + mov c, _bitS_IN + rlc a + clr _bitS_CLK + + setb _bitS_CLK + mov c, _bitS_IN + rlc a + clr _bitS_CLK + + setb _bitS_CLK + mov c, _bitS_IN + rlc a + clr _bitS_CLK + + setb _bitS_CLK + mov c, _bitS_IN + rlc a + clr _bitS_CLK + + setb _bitS_CLK + mov c, _bitS_IN + rlc a + clr _bitS_CLK + + setb _bitS_CLK + mov c, _bitS_IN + rlc a + clr _bitS_CLK + + mov dpl,a + ret + _endasm; +} +#endif + +static void +read_bytes_msb (xdata unsigned char *buf, unsigned char len) +{ + while (len-- != 0){ + *buf++ = read_byte_msb (); + } +} + diff --git a/firmware/src/usrp2/spi.h b/firmware/src/usrp2/spi.h new file mode 100644 index 0000000..b17126d --- /dev/null +++ b/firmware/src/usrp2/spi.h @@ -0,0 +1,43 @@ +/* -*- c++ -*- */ +/* + * Copyright 2004 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifndef INCLUDED_SPI_H +#define INCLUDED_SPI_H + +#include "usrp_spi_defs.h" + +void init_spi (void); // one time call to init + +// returns non-zero if successful, else 0 +unsigned char +spi_read (unsigned char header_hi, unsigned char header_lo, + unsigned char enables, unsigned char format, + xdata unsigned char *buf, unsigned char len); + +// returns non-zero if successful, else 0 +unsigned char +spi_write (unsigned char header_hi, unsigned char header_lo, + unsigned char enables, unsigned char format, + const xdata unsigned char *buf, unsigned char len); + + +#endif /* INCLUDED_SPI_H */ diff --git a/firmware/src/usrp2/usb_descriptors.a51 b/firmware/src/usrp2/usb_descriptors.a51 new file mode 100644 index 0000000..06a92f5 --- /dev/null +++ b/firmware/src/usrp2/usb_descriptors.a51 @@ -0,0 +1,404 @@ +;;; -*- asm -*- +;;; +;;; Copyright 2003 Free Software Foundation, Inc. +;;; +;;; This file is part of GNU Radio +;;; +;;; GNU Radio is free software; you can redistribute it and/or modify +;;; it under the terms of the GNU General Public License as published by +;;; the Free Software Foundation; either version 2, or (at your option) +;;; any later version. +;;; +;;; GNU Radio is distributed in the hope that it will be useful, +;;; but WITHOUT ANY WARRANTY; without even the implied warranty of +;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;;; GNU General Public License for more details. +;;; +;;; You should have received a copy of the GNU General Public License +;;; along with GNU Radio; see the file COPYING. If not, write to +;;; the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +;;; Boston, MA 02111-1307, USA. +;;; + +;;; USB Descriptor table for the USRP +;;; +;;; We're a high-speed only device (480 Mb/sec) with 1 configuration +;;; and 3 interfaces. +;;; +;;; interface 0: command and status (ep0 COMMAND) +;;; interface 1: Transmit path (ep2 OUT BULK) +;;; interface 2: Receive path (ep6 IN BULK) + + .module usb_descriptors + + VID_FREE = 0xfffe ; Free Software Folks + PID_USRP = 0x0002 ; USRP + + ;; We distinguish configured from unconfigured USRPs using the Device ID. + ;; If the MSB of the DID is 0, the device is unconfigured. + ;; The LSB of the DID is reserved for hardware revs. + + DID_USRP = 0x0100 ; Device ID (bcd) + + + DSCR_DEVICE = 1 ; Descriptor type: Device + DSCR_CONFIG = 2 ; Descriptor type: Configuration + DSCR_STRING = 3 ; Descriptor type: String + DSCR_INTRFC = 4 ; Descriptor type: Interface + DSCR_ENDPNT = 5 ; Descriptor type: Endpoint + DSCR_DEVQUAL = 6 ; Descriptor type: Device Qualifier + + DSCR_DEVICE_LEN = 18 + DSCR_CONFIG_LEN = 9 + DSCR_INTRFC_LEN = 9 + DSCR_ENDPNT_LEN = 7 + DSCR_DEVQUAL_LEN = 10 + + ET_CONTROL = 0 ; Endpoint type: Control + ET_ISO = 1 ; Endpoint type: Isochronous + ET_BULK = 2 ; Endpoint type: Bulk + ET_INT = 3 ; Endpoint type: Interrupt + + + ;; configuration attributes + bmSELF_POWERED = 1 << 6 + +;;; -------------------------------------------------------- +;;; external ram data +;;;-------------------------------------------------------- + + .area USBDESCSEG (XDATA) + +;;; ---------------------------------------------------------------- +;;; descriptors used when operating at high speed (480Mb/sec) +;;; ---------------------------------------------------------------- + + .even ; descriptors must be 2-byte aligned for SUDPTR{H,L} to work + + ;; The .even directive isn't really honored by the linker. Bummer! + ;; (There's no way to specify an alignment requirement for a given area, + ;; hence when they're concatenated together, even doesn't work.) + ;; + ;; We work around this by telling the linker to put USBDESCSEG + ;; at 0xE000 absolute. This means that the maximimum length of this + ;; segment is 480 bytes, leaving room for the two hash slots + ;; at 0xE1EO to 0xE1FF. + ;; + ;; As of July 7, 2004, this segment is 326 bytes long + +_high_speed_device_descr:: + .db DSCR_DEVICE_LEN + .db DSCR_DEVICE + .db <0x0200 ; Specification version (LSB) + .db >0x0200 ; Specification version (MSB) + .db 0xff ; device class (vendor specific) + .db 0xff ; device subclass (vendor specific) + .db 0xff ; device protocol (vendor specific) + .db 64 ; bMaxPacketSize0 for endpoint 0 + .db VID_FREE ; idVendor + .db PID_USRP ; idProduct +_usb_desc_hw_rev_binary_patch_location_0:: + .db DID_USRP ; bcdDevice + .db SI_VENDOR ; iManufacturer (string index) + .db SI_PRODUCT ; iProduct (string index) + .db SI_SERIAL ; iSerial number (string index) + .db 1 ; bNumConfigurations + +;;; describes the other speed (12Mb/sec) + .even +_high_speed_devqual_descr:: + .db DSCR_DEVQUAL_LEN + .db DSCR_DEVQUAL + .db <0x0200 ; bcdUSB (LSB) + .db >0x0200 ; bcdUSB (MSB) + .db 0xff ; bDeviceClass + .db 0xff ; bDeviceSubClass + .db 0xff ; bDeviceProtocol + .db 64 ; bMaxPacketSize0 + .db 1 ; bNumConfigurations (one config at 12Mb/sec) + .db 0 ; bReserved + + .even +_high_speed_config_descr:: + .db DSCR_CONFIG_LEN + .db DSCR_CONFIG + .db <(_high_speed_config_descr_end - _high_speed_config_descr) ; LSB + .db >(_high_speed_config_descr_end - _high_speed_config_descr) ; MSB + .db 3 ; bNumInterfaces + .db 1 ; bConfigurationValue + .db 0 ; iConfiguration + .db 0x80 | bmSELF_POWERED ; bmAttributes + .db 0 ; bMaxPower + + ;; interface descriptor 0 (command & status, ep0 COMMAND) + + .db DSCR_INTRFC_LEN + .db DSCR_INTRFC + .db 0 ; bInterfaceNumber (zero based) + .db 0 ; bAlternateSetting + .db 0 ; bNumEndpoints + .db 0xff ; bInterfaceClass (vendor specific) + .db 0xff ; bInterfaceSubClass (vendor specific) + .db 0xff ; bInterfaceProtocol (vendor specific) + .db SI_COMMAND_AND_STATUS ; iInterface (description) + + ;; interface descriptor 1 (transmit path, ep2 OUT BULK) + + .db DSCR_INTRFC_LEN + .db DSCR_INTRFC + .db 1 ; bInterfaceNumber (zero based) + .db 0 ; bAlternateSetting + .db 1 ; bNumEndpoints + .db 0xff ; bInterfaceClass (vendor specific) + .db 0xff ; bInterfaceSubClass (vendor specific) + .db 0xff ; bInterfaceProtocol (vendor specific) + .db SI_TX_PATH ; iInterface (description) + + ;; interface 1's end point + + .db DSCR_ENDPNT_LEN + .db DSCR_ENDPNT + .db 0x02 ; bEndpointAddress (ep 2 OUT) + .db ET_BULK ; bmAttributes + .db <512 ; wMaxPacketSize (LSB) + .db >512 ; wMaxPacketSize (MSB) + .db 0 ; bInterval (iso only) + + ;; interface descriptor 2 (receive path, ep6 IN BULK) + + .db DSCR_INTRFC_LEN + .db DSCR_INTRFC + .db 2 ; bInterfaceNumber (zero based) + .db 0 ; bAlternateSetting + .db 1 ; bNumEndpoints + .db 0xff ; bInterfaceClass (vendor specific) + .db 0xff ; bInterfaceSubClass (vendor specific) + .db 0xff ; bInterfaceProtocol (vendor specific) + .db SI_RX_PATH ; iInterface (description) + + ;; interface 2's end point + + .db DSCR_ENDPNT_LEN + .db DSCR_ENDPNT + .db 0x86 ; bEndpointAddress (ep 6 IN) + .db ET_BULK ; bmAttributes + .db <512 ; wMaxPacketSize (LSB) + .db >512 ; wMaxPacketSize (MSB) + .db 0 ; bInterval (iso only) + +_high_speed_config_descr_end: + +;;; ---------------------------------------------------------------- +;;; descriptors used when operating at full speed (12Mb/sec) +;;; ---------------------------------------------------------------- + + .even +_full_speed_device_descr:: + .db DSCR_DEVICE_LEN + .db DSCR_DEVICE + .db <0x0200 ; Specification version (LSB) + .db >0x0200 ; Specification version (MSB) + .db 0xff ; device class (vendor specific) + .db 0xff ; device subclass (vendor specific) + .db 0xff ; device protocol (vendor specific) + .db 64 ; bMaxPacketSize0 for endpoint 0 + .db VID_FREE ; idVendor + .db PID_USRP ; idProduct +_usb_desc_hw_rev_binary_patch_location_1:: + .db DID_USRP ; bcdDevice + .db SI_VENDOR ; iManufacturer (string index) + .db SI_PRODUCT ; iProduct (string index) + .db SI_NONE ; iSerial number (None) + .db 1 ; bNumConfigurations + + +;;; describes the other speed (480Mb/sec) + .even +_full_speed_devqual_descr:: + .db DSCR_DEVQUAL_LEN + .db DSCR_DEVQUAL + .db <0x0200 ; bcdUSB + .db >0x0200 ; bcdUSB + .db 0xff ; bDeviceClass + .db 0xff ; bDeviceSubClass + .db 0xff ; bDeviceProtocol + .db 64 ; bMaxPacketSize0 + .db 1 ; bNumConfigurations (one config at 480Mb/sec) + .db 0 ; bReserved + + .even +_full_speed_config_descr:: + .db DSCR_CONFIG_LEN + .db DSCR_CONFIG + .db <(_full_speed_config_descr_end - _full_speed_config_descr) ; LSB + .db >(_full_speed_config_descr_end - _full_speed_config_descr) ; MSB + .db 1 ; bNumInterfaces + .db 1 ; bConfigurationValue + .db 0 ; iConfiguration + .db 0x80 | bmSELF_POWERED ; bmAttributes + .db 0 ; bMaxPower + + ;; interface descriptor 0 (command & status, ep0 COMMAND) + + .db DSCR_INTRFC_LEN + .db DSCR_INTRFC + .db 0 ; bInterfaceNumber (zero based) + .db 0 ; bAlternateSetting + .db 0 ; bNumEndpoints + .db 0xff ; bInterfaceClass (vendor specific) + .db 0xff ; bInterfaceSubClass (vendor specific) + .db 0xff ; bInterfaceProtocol (vendor specific) + .db SI_COMMAND_AND_STATUS ; iInterface (description) + +_full_speed_config_descr_end: + +;;; ---------------------------------------------------------------- +;;; string descriptors +;;; ---------------------------------------------------------------- + +_nstring_descriptors:: + .db (_string_descriptors_end - _string_descriptors) / 2 + +_string_descriptors:: + .db str0 + .db str1 + .db str2 + .db str3 + .db str4 + .db str5 + .db str6 +_string_descriptors_end: + + SI_NONE = 0 + ;; str0 contains the language ID's. + .even +str0: .db str0_end - str0 + .db DSCR_STRING + .db 0 + .db 0 + .db <0x0409 ; magic code for US English (LSB) + .db >0x0409 ; magic code for US English (MSB) +str0_end: + + SI_VENDOR = 1 + .even +str1: .db str1_end - str1 + .db DSCR_STRING + .db 'F, 0 ; 16-bit unicode + .db 'r, 0 + .db 'e, 0 + .db 'e, 0 + .db ' , 0 + .db 'S, 0 + .db 'o, 0 + .db 'f, 0 + .db 't, 0 + .db 'w, 0 + .db 'a, 0 + .db 'r, 0 + .db 'e, 0 + .db ' , 0 + .db 'F, 0 + .db 'o, 0 + .db 'l, 0 + .db 'k, 0 + .db 's, 0 +str1_end: + + SI_PRODUCT = 2 + .even +str2: .db str2_end - str2 + .db DSCR_STRING + .db 'U, 0 + .db 'S, 0 + .db 'R, 0 + .db 'P, 0 + .db ' , 0 + .db 'R, 0 + .db 'e, 0 + .db 'v, 0 + .db ' , 0 +_usb_desc_hw_rev_ascii_patch_location_0:: + .db '?, 0 +str2_end: + + SI_COMMAND_AND_STATUS = 3 + .even +str3: .db str3_end - str3 + .db DSCR_STRING + .db 'C, 0 + .db 'o, 0 + .db 'm, 0 + .db 'm, 0 + .db 'a, 0 + .db 'n, 0 + .db 'd, 0 + .db ' , 0 + .db '&, 0 + .db ' , 0 + .db 'S, 0 + .db 't, 0 + .db 'a, 0 + .db 't, 0 + .db 'u, 0 + .db 's, 0 +str3_end: + + SI_TX_PATH = 4 + .even +str4: .db str4_end - str4 + .db DSCR_STRING + .db 'T, 0 + .db 'r, 0 + .db 'a, 0 + .db 'n, 0 + .db 's, 0 + .db 'm, 0 + .db 'i, 0 + .db 't, 0 + .db ' , 0 + .db 'P, 0 + .db 'a, 0 + .db 't, 0 + .db 'h, 0 +str4_end: + + SI_RX_PATH = 5 + .even +str5: .db str5_end - str5 + .db DSCR_STRING + .db 'R, 0 + .db 'e, 0 + .db 'c, 0 + .db 'e, 0 + .db 'i, 0 + .db 'v, 0 + .db 'e, 0 + .db ' , 0 + .db 'P, 0 + .db 'a, 0 + .db 't, 0 + .db 'h, 0 +str5_end: + + SI_SERIAL = 6 + .even +str6: .db str6_end - str6 + .db DSCR_STRING +_usb_desc_serial_number_ascii:: + .db '3, 0 + .db '., 0 + .db '1, 0 + .db '4, 0 + .db '1, 0 + .db '5, 0 + .db '9, 0 + .db '3, 0 +str6_end: + diff --git a/firmware/src/usrp2/usrp_common.c b/firmware/src/usrp2/usrp_common.c new file mode 100644 index 0000000..f389d92 --- /dev/null +++ b/firmware/src/usrp2/usrp_common.c @@ -0,0 +1 @@ +#include "../common/usrp_common.c" diff --git a/firmware/src/usrp2/usrp_common.h b/firmware/src/usrp2/usrp_common.h new file mode 100644 index 0000000..5625b42 --- /dev/null +++ b/firmware/src/usrp2/usrp_common.h @@ -0,0 +1,77 @@ +/* + * USRP - Universal Software Radio Peripheral + * + * Copyright (C) 2003,2006 Free Software Foundation, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/* + * common defines and prototypes for USRP + * + * In comments below "TRM" refers to the EZ-USB FX2 Technical Reference Manual + */ + +#ifndef _USRPCOMMON_H_ +#define _USRPCOMMON_H_ + +#include +#include +#include + +/* + * From TRM page 15-105: + * + * Under certain conditions, some read and write access to the FX2 + * registers must be separated by a "synchronization delay". The + * delay is necessary only under the following conditions: + * + * - between a write to any register in the 0xE600 - 0xE6FF range + * and a write to one of the registers listed below. + * + * - between a write to one of the registers listed below and a read + * from any register in the 0xE600 - 0xE6FF range. + * + * Registers which require a synchronization delay: + * + * FIFORESET FIFOPINPOLAR + * INPKTEND EPxBCH:L + * EPxFIFOPFH:L EPxAUTOINLENH:L + * EPxFIFOCFG EPxGPIFFLGSEL + * PINFLAGSAB PINFLAGSCD + * EPxFIFOIE EPxFIFOIRQ + * GPIFIE GPIFIRQ + * UDMACRCH:L GPIFADRH:L + * GPIFTRIG EPxGPIFTRIG + * OUTPKTEND REVCTL + * GPIFTCB3 GPIFTCB2 + * GPIFTCB1 GPIFTCB0 + */ + +#define TRUE 1 +#define FALSE 0 + + +void init_usrp (void); +void init_gpif (void); + +void set_led_0 (unsigned char on); +void set_led_1 (unsigned char on); +void toggle_led_0 (void); +void toggle_led_1 (void); + +#define la_trace(v) + +#endif /* _USRPCOMMON_H_ */ diff --git a/firmware/src/usrp2/usrp_main.c b/firmware/src/usrp2/usrp_main.c new file mode 100644 index 0000000..0dbba8e --- /dev/null +++ b/firmware/src/usrp2/usrp_main.c @@ -0,0 +1,380 @@ +/* + * USRP - Universal Software Radio Peripheral + * + * Copyright (C) 2003,2004 Free Software Foundation, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include "usrp_common.h" +#include "usrp_commands.h" +#include "fpga.h" +#include "usrp_gpif_inline.h" +#include "timer.h" +#include "i2c.h" +#include "isr.h" +#include "usb_common.h" +#include "fx2utils.h" +#include "usrp_globals.h" +#include "usrp_i2c_addr.h" +#include +#include "spi.h" +#include "eeprom_io.h" +#include "usb_descriptors.h" + +/* + * offsets into boot eeprom for configuration values + */ +#define HW_REV_OFFSET 5 +#define SERIAL_NO_OFFSET 248 +#define SERIAL_NO_LEN 8 + + +#define bRequestType SETUPDAT[0] +#define bRequest SETUPDAT[1] +#define wValueL SETUPDAT[2] +#define wValueH SETUPDAT[3] +#define wIndexL SETUPDAT[4] +#define wIndexH SETUPDAT[5] +#define wLengthL SETUPDAT[6] +#define wLengthH SETUPDAT[7] + + +unsigned char g_tx_enable = 0; +unsigned char g_rx_enable = 0; +unsigned char g_rx_overrun = 0; +unsigned char g_tx_underrun = 0; + +/* + * the host side fpga loader code pushes an MD5 hash of the bitstream + * into hash1. + */ +#define USRP_HASH_SIZE 16 +xdata at USRP_HASH_SLOT_1_ADDR unsigned char hash1[USRP_HASH_SIZE]; + +static void +get_ep0_data (void) +{ + EP0BCL = 0; // arm EP0 for OUT xfer. This sets the busy bit + + while (EP0CS & bmEPBUSY) // wait for busy to clear + ; +} + +/* + * Handle our "Vendor Extension" commands on endpoint 0. + * If we handle this one, return non-zero. + */ +unsigned char +app_vendor_cmd (void) +{ + if (bRequestType == VRT_VENDOR_IN){ + + ///////////////////////////////// + // handle the IN requests + ///////////////////////////////// + + switch (bRequest){ + + case VRQ_GET_STATUS: + switch (wIndexL){ + + case GS_TX_UNDERRUN: + EP0BUF[0] = g_tx_underrun; + g_tx_underrun = 0; + EP0BCH = 0; + EP0BCL = 1; + break; + + case GS_RX_OVERRUN: + EP0BUF[0] = g_rx_overrun; + g_rx_overrun = 0; + EP0BCH = 0; + EP0BCL = 1; + break; + + default: + return 0; + } + break; + + case VRQ_I2C_READ: + if (!i2c_read (wValueL, EP0BUF, wLengthL)) + return 0; + + EP0BCH = 0; + EP0BCL = wLengthL; + break; + + case VRQ_SPI_READ: + if (!spi_read (wValueH, wValueL, wIndexH, wIndexL, EP0BUF, wLengthL)) + return 0; + + EP0BCH = 0; + EP0BCL = wLengthL; + break; + + default: + return 0; + } + } + + else if (bRequestType == VRT_VENDOR_OUT){ + + ///////////////////////////////// + // handle the OUT requests + ///////////////////////////////// + + switch (bRequest){ + + case VRQ_SET_LED: + switch (wIndexL){ + case 0: + set_led_0 (wValueL); + break; + + case 1: + set_led_1 (wValueL); + break; + + default: + return 0; + } + break; + + case VRQ_FPGA_LOAD: + switch (wIndexL){ // sub-command + case FL_BEGIN: + return fpga_load_begin (); + + case FL_XFER: + get_ep0_data (); + return fpga_load_xfer (EP0BUF, EP0BCL); + + case FL_END: + return fpga_load_end (); + + default: + return 0; + } + break; + + + case VRQ_FPGA_SET_RESET: + fpga_set_reset (wValueL); + break; + + case VRQ_FPGA_SET_TX_ENABLE: + fpga_set_tx_enable (wValueL); + break; + + case VRQ_FPGA_SET_RX_ENABLE: + fpga_set_rx_enable (wValueL); + break; + + case VRQ_FPGA_SET_TX_RESET: + fpga_set_tx_reset (wValueL); + break; + + case VRQ_FPGA_SET_RX_RESET: + fpga_set_rx_reset (wValueL); + break; + + case VRQ_I2C_WRITE: + get_ep0_data (); + if (!i2c_write (wValueL, EP0BUF, EP0BCL)) + return 0; + break; + + case VRQ_SPI_WRITE: + get_ep0_data (); + if (!spi_write (wValueH, wValueL, wIndexH, wIndexL, EP0BUF, EP0BCL)) + return 0; + break; + + default: + return 0; + } + + } + else + return 0; // invalid bRequestType + + return 1; +} + + + +static void +main_loop (void) +{ + setup_flowstate_common (); + + while (1){ + + if (usb_setup_packet_avail ()) + usb_handle_setup_packet (); + + + if (GPIFTRIG & bmGPIF_IDLE){ + + // OK, GPIF is idle. Let's try to give it some work. + + // First check for underruns and overruns + + if (UC_BOARD_HAS_FPGA && (USRP_PA & (bmPA_TX_UNDERRUN | bmPA_RX_OVERRUN))){ + + // record the under/over run + if (USRP_PA & bmPA_TX_UNDERRUN) + g_tx_underrun = 1; + + if (USRP_PA & bmPA_RX_OVERRUN) + g_rx_overrun = 1; + + // tell the FPGA to clear the flags + fpga_clear_flags (); + } + + // Next see if there are any "OUT" packets waiting for our attention, + // and if so, if there's room in the FPGA's FIFO for them. + + if (g_tx_enable && !(EP24FIFOFLGS & 0x02)){ // USB end point fifo is not empty... + + if (fpga_has_room_for_packet ()){ // ... and FPGA has room for packet + + GPIFTCB1 = 0x01; SYNCDELAY; + GPIFTCB0 = 0x00; SYNCDELAY; + + setup_flowstate_write (); + + SYNCDELAY; + GPIFTRIG = bmGPIF_EP2_START | bmGPIF_WRITE; // start the xfer + SYNCDELAY; + + while (!(GPIFTRIG & bmGPIF_IDLE)){ + // wait for the transaction to complete + } + } + } + + // See if there are any requests for "IN" packets, and if so + // whether the FPGA's got any packets for us. + + if (g_rx_enable && !(EP6CS & bmEPFULL)){ // USB end point fifo is not full... + + if (fpga_has_packet_avail ()){ // ... and FPGA has packet available + + GPIFTCB1 = 0x01; SYNCDELAY; + GPIFTCB0 = 0x00; SYNCDELAY; + + setup_flowstate_read (); + + SYNCDELAY; + GPIFTRIG = bmGPIF_EP6_START | bmGPIF_READ; // start the xfer + SYNCDELAY; + + while (!(GPIFTRIG & bmGPIF_IDLE)){ + // wait for the transaction to complete + } + + SYNCDELAY; + INPKTEND = 6; // tell USB we filled buffer (6 is our endpoint num) + } + } + } + } +} + + +/* + * called at 100 Hz from timer2 interrupt + * + * Toggle led 0 + */ +void +isr_tick (void) interrupt +{ + static unsigned char count = 1; + + if (--count == 0){ + count = 50; + USRP_LED_REG ^= bmLED0; + } + + clear_timer_irq (); +} + +/* + * Read h/w rev code and serial number out of boot eeprom and + * patch the usb descriptors with the values. + */ +void +patch_usb_descriptors(void) +{ + static xdata unsigned char hw_rev; + static xdata unsigned char serial_no[8]; + unsigned char i; + + eeprom_read(I2C_ADDR_BOOT, HW_REV_OFFSET, &hw_rev, 1); // LSB of device id + usb_desc_hw_rev_binary_patch_location_0[0] = hw_rev; + usb_desc_hw_rev_binary_patch_location_1[0] = hw_rev; + usb_desc_hw_rev_ascii_patch_location_0[0] = hw_rev + '0'; // FIXME if we get > 9 + + eeprom_read(I2C_ADDR_BOOT, SERIAL_NO_OFFSET, serial_no, SERIAL_NO_LEN); + + for (i = 0; i < SERIAL_NO_LEN; i++){ + unsigned char ch = serial_no[i]; + if (ch == 0xff) // make unprogrammed EEPROM default to '0' + ch = '0'; + usb_desc_serial_number_ascii[i << 1] = ch; + } +} + +void +main (void) +{ +#if 0 + g_rx_enable = 0; // FIXME (work around initialization bug) + g_tx_enable = 0; + g_rx_overrun = 0; + g_tx_underrun = 0; +#endif + + memset (hash1, 0, USRP_HASH_SIZE); // zero fpga bitstream hash. This forces reload + + init_usrp (); + init_gpif (); + + // if (UC_START_WITH_GSTATE_OUTPUT_ENABLED) + IFCONFIG |= bmGSTATE; // no conflict, start with it on + + set_led_0 (0); + set_led_1 (0); + + EA = 0; // disable all interrupts + + patch_usb_descriptors(); + + setup_autovectors (); + usb_install_handlers (); + hook_timer_tick ((unsigned short) isr_tick); + + EIEX4 = 1; // disable INT4 FIXME + EA = 1; // global interrupt enable + + fx2_renumerate (); // simulates disconnect / reconnect + + main_loop (); +} diff --git a/firmware/src/usrp2/usrp_rev2_regs.h b/firmware/src/usrp2/usrp_rev2_regs.h new file mode 100644 index 0000000..e18003f --- /dev/null +++ b/firmware/src/usrp2/usrp_rev2_regs.h @@ -0,0 +1,163 @@ +/* + * USRP - Universal Software Radio Peripheral + * + * Copyright (C) 2003 Free Software Foundation, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/* + * These are the register definitions for the Rev 1 USRP prototype + * The Rev 1 is the version with the AD9862's and daughterboards + */ + +#ifndef _USRP_REV1_REGS_H_ +#define _USRP_REV1_REGS_H_ + +#include "fx2regs.h" + +/* + * Port A (bit addressable): + */ + +#define USRP_PA IOA // Port A +#define USRP_PA_OE OEA // Port A direction register + +#define bmPA_S_CLK bmBIT0 // SPI serial clock +#define bmPA_S_DATA_TO_PERIPH bmBIT1 // SPI SDI (peripheral rel name) +#define bmPA_S_DATA_FROM_PERIPH bmBIT2 // SPI SDO (peripheral rel name) +#define bmPA_SEN_FPGA bmBIT3 // serial enable for FPGA (active low) +#define bmPA_SEN_CODEC_A bmBIT4 // serial enable AD9862 A (active low) +#define bmPA_SEN_CODEC_B bmBIT5 // serial enable AD9862 B (active low) +//#define bmPA_FX2_2 bmBIT6 // misc pin to FPGA (overflow) +//#define bmPA_FX2_3 bmBIT7 // misc pin to FPGA (underflow) +#define bmPA_RX_OVERRUN bmBIT6 // misc pin to FPGA (overflow) +#define bmPA_TX_UNDERRUN bmBIT7 // misc pin to FPGA (underflow) + + +sbit at 0x80+0 bitS_CLK; // 0x80 is the bit address of PORT A +sbit at 0x80+1 bitS_OUT; // out from FX2 point of view +sbit at 0x80+2 bitS_IN; // in from FX2 point of view + + +/* all outputs except S_DATA_FROM_PERIPH, FX2_2, FX2_3 */ + +#define bmPORT_A_OUTPUTS (bmPA_S_CLK \ + | bmPA_S_DATA_TO_PERIPH \ + | bmPA_SEN_FPGA \ + | bmPA_SEN_CODEC_A \ + | bmPA_SEN_CODEC_B \ + ) + +#define bmPORT_A_INITIAL (bmPA_SEN_FPGA | bmPA_SEN_CODEC_A | bmPA_SEN_CODEC_B) + + +/* Port B: GPIF FD[7:0] */ + +/* + * Port C (bit addressable): + * 5:1 FPGA configuration + */ + +#define USRP_PC IOC // Port C +#define USRP_PC_OE OEC // Port C direction register + +#define USRP_ALTERA_CONFIG USRP_PC + +#define bmPC_nRESET bmBIT0 // reset line to codecs (active low) +#define bmALTERA_DATA0 bmBIT1 +#define bmALTERA_NCONFIG bmBIT2 +#define bmALTERA_DCLK bmBIT3 +#define bmALTERA_CONF_DONE bmBIT4 +#define bmALTERA_NSTATUS bmBIT5 +#define bmPC_LED0 bmBIT6 // active low +#define bmPC_LED1 bmBIT7 // active low + +sbit at 0xA0+1 bitALTERA_DATA0; // 0xA0 is the bit address of PORT C +sbit at 0xA0+3 bitALTERA_DCLK; + + +#define bmALTERA_BITS (bmALTERA_DATA0 \ + | bmALTERA_NCONFIG \ + | bmALTERA_DCLK \ + | bmALTERA_CONF_DONE \ + | bmALTERA_NSTATUS) + +#define bmPORT_C_OUTPUTS (bmPC_nRESET \ + | bmALTERA_DATA0 \ + | bmALTERA_NCONFIG \ + | bmALTERA_DCLK \ + | bmPC_LED0 \ + | bmPC_LED1 \ + ) + +#define bmPORT_C_INITIAL (bmPC_LED0 | bmPC_LED1) + + +#define USRP_LED_REG USRP_PC +#define bmLED0 bmPC_LED0 +#define bmLED1 bmPC_LED1 + + +/* Port D: GPIF FD[15:8] */ + +/* Port E: not bit addressible */ + +#define USRP_PE IOE // Port E +#define USRP_PE_OE OEE // Port E direction register + +#define bmPE_PE0 bmBIT0 // GPIF debug output +#define bmPE_PE1 bmBIT1 // GPIF debug output +#define bmPE_PE2 bmBIT2 // GPIF debug output +#define bmPE_FPGA_CLR_STATUS bmBIT3 // misc pin to FPGA (clear status) +#define bmPE_SEN_TX_A bmBIT4 // serial enable d'board TX A (active low) +#define bmPE_SEN_RX_A bmBIT5 // serial enable d'board RX A (active low) +#define bmPE_SEN_TX_B bmBIT6 // serial enable d'board TX B (active low) +#define bmPE_SEN_RX_B bmBIT7 // serial enable d'board RX B (active low) + + +#define bmPORT_E_OUTPUTS (bmPE_FPGA_CLR_STATUS \ + | bmPE_SEN_TX_A \ + | bmPE_SEN_RX_A \ + | bmPE_SEN_TX_B \ + | bmPE_SEN_RX_B \ + ) + + +#define bmPORT_E_INITIAL (bmPE_SEN_TX_A \ + | bmPE_SEN_RX_A \ + | bmPE_SEN_TX_B \ + | bmPE_SEN_RX_B \ + ) + +/* + * FPGA output lines that are tied to FX2 RDYx inputs. + * These are readable using GPIFREADYSTAT. + */ +#define bmFPGA_HAS_SPACE bmBIT0 // usbrdy[0] has room for 512 byte packet +#define bmFPGA_PKT_AVAIL bmBIT1 // usbrdy[1] has >= 512 bytes available +// #define bmTX_UNDERRUN bmBIT2 // usbrdy[2] D/A ran out of data +// #define bmRX_OVERRUN bmBIT3 // usbrdy[3] A/D ran out of buffer + +/* + * FPGA input lines that are tied to the FX2 CTLx outputs. + * + * These are controlled by the GPIF microprogram... + */ +// WR bmBIT0 // usbctl[0] +// RD bmBIT1 // usbctl[1] +// OE bmBIT2 // usbctl[2] + +#endif /* _USRP_REV1_REGS_H_ */ diff --git a/firmware/src/usrp2/vectors.a51 b/firmware/src/usrp2/vectors.a51 new file mode 100644 index 0000000..fa579ba --- /dev/null +++ b/firmware/src/usrp2/vectors.a51 @@ -0,0 +1 @@ + .include "../common/vectors.a51" diff --git a/fpga/Makefile.am b/fpga/Makefile.am new file mode 100644 index 0000000..61227f0 --- /dev/null +++ b/fpga/Makefile.am @@ -0,0 +1,24 @@ +# +# Copyright 2004,2005,2006 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +SUBDIRS = rbf + +include Makefile.extra diff --git a/fpga/Makefile.extra b/fpga/Makefile.extra new file mode 100644 index 0000000..c3ccaa0 --- /dev/null +++ b/fpga/Makefile.extra @@ -0,0 +1,150 @@ +EXTRA_DIST = \ + gen_makefile_extra.py \ + megacells/accum32.bsf \ + megacells/accum32.cmp \ + megacells/accum32.inc \ + megacells/accum32.v \ + megacells/accum32_bb.v \ + megacells/accum32_inst.v \ + megacells/add32.bsf \ + megacells/add32.cmp \ + megacells/add32.inc \ + megacells/add32.v \ + megacells/add32_bb.v \ + megacells/add32_inst.v \ + megacells/addsub16.bsf \ + megacells/addsub16.cmp \ + megacells/addsub16.inc \ + megacells/addsub16.v \ + megacells/addsub16_bb.v \ + megacells/addsub16_inst.v \ + megacells/bustri.bsf \ + megacells/bustri.cmp \ + megacells/bustri.inc \ + megacells/bustri.v \ + megacells/bustri_bb.v \ + megacells/bustri_inst.v \ + megacells/clk_doubler.v \ + megacells/clk_doubler_bb.v \ + megacells/dspclkpll.v \ + megacells/dspclkpll_bb.v \ + megacells/fifo_2k.v \ + megacells/fifo_2k_bb.v \ + megacells/fifo_4k.v \ + megacells/fifo_4k_bb.v \ + megacells/mylpm_addsub.bsf \ + megacells/mylpm_addsub.cmp \ + megacells/mylpm_addsub.inc \ + megacells/mylpm_addsub.v \ + megacells/mylpm_addsub_bb.v \ + megacells/mylpm_addsub_inst.v \ + megacells/pll.v \ + megacells/pll_bb.v \ + megacells/pll_inst.v \ + megacells/sub32.bsf \ + megacells/sub32.cmp \ + megacells/sub32.inc \ + megacells/sub32.v \ + megacells/sub32_bb.v \ + megacells/sub32_inst.v \ + models/bustri.v \ + models/fifo.v \ + models/fifo_1c_1k.v \ + models/fifo_1c_2k.v \ + models/fifo_1c_4k.v \ + models/fifo_1k.v \ + models/fifo_2k.v \ + models/fifo_4k.v \ + models/pll.v \ + models/ssram.v \ + sdr_lib/adc_interface.v \ + sdr_lib/bidir_reg.v \ + sdr_lib/bus_interface.v \ + sdr_lib/cic_decim.v \ + sdr_lib/cic_int_shifter.v \ + sdr_lib/cic_interp.v \ + sdr_lib/clk_divider.v \ + sdr_lib/cordic.v \ + sdr_lib/cordic_stage.v \ + sdr_lib/ddc.v \ + sdr_lib/dpram.v \ + sdr_lib/duc.v \ + sdr_lib/ext_fifo.v \ + sdr_lib/gen_cordic_consts.py \ + sdr_lib/gen_sync.v \ + sdr_lib/hb/acc.v \ + sdr_lib/hb/coeff_ram.v \ + sdr_lib/hb/coeff_rom.v \ + sdr_lib/hb/halfband_decim.v \ + sdr_lib/hb/halfband_interp.v \ + sdr_lib/hb/hbd_tb/test_hbd.v \ + sdr_lib/hb/mac.v \ + sdr_lib/hb/mult.v \ + sdr_lib/hb/ram16_2port.v \ + sdr_lib/hb/ram16_2sum.v \ + sdr_lib/hb/ram32_2sum.v \ + sdr_lib/io_pins.v \ + sdr_lib/master_control.v \ + sdr_lib/master_control_multi.v \ + sdr_lib/phase_acc.v \ + sdr_lib/ram.v \ + sdr_lib/ram16.v \ + sdr_lib/ram32.v \ + sdr_lib/ram64.v \ + sdr_lib/rx_buffer.v \ + sdr_lib/rx_chain.v \ + sdr_lib/rx_chain_dual.v \ + sdr_lib/rx_dcoffset.v \ + sdr_lib/serial_io.v \ + sdr_lib/setting_reg.v \ + sdr_lib/setting_reg_masked.v \ + sdr_lib/sign_extend.v \ + sdr_lib/strobe_gen.v \ + sdr_lib/tx_buffer.v \ + sdr_lib/tx_chain.v \ + sdr_lib/tx_chain_hb.v \ + tb/cbus_tb.v \ + tb/cordic_tb.v \ + tb/decim_tb.v \ + tb/fullchip_tb.v \ + tb/interp_tb.v \ + tb/justinterp_tb.v \ + tb/usrp_tasks.v \ + toplevel/mrfm/biquad_2stage.v \ + toplevel/mrfm/biquad_6stage.v \ + toplevel/mrfm/mrfm.csf \ + toplevel/mrfm/mrfm.esf \ + toplevel/mrfm/mrfm.psf \ + toplevel/mrfm/mrfm.py \ + toplevel/mrfm/mrfm.qpf \ + toplevel/mrfm/mrfm.qsf \ + toplevel/mrfm/mrfm.v \ + toplevel/mrfm/mrfm.vh \ + toplevel/mrfm/mrfm_compensator.v \ + toplevel/mrfm/mrfm_fft.py \ + toplevel/mrfm/mrfm_proc.v \ + toplevel/mrfm/shifter.v \ + toplevel/sizetest/sizetest.csf \ + toplevel/sizetest/sizetest.psf \ + toplevel/sizetest/sizetest.v \ + toplevel/usrp_multi/usrp_multi.csf \ + toplevel/usrp_multi/usrp_multi.esf \ + toplevel/usrp_multi/usrp_multi.psf \ + toplevel/usrp_multi/usrp_multi.qpf \ + toplevel/usrp_multi/usrp_multi.qsf \ + toplevel/usrp_multi/usrp_multi.v \ + toplevel/usrp_multi/usrp_multi.vh \ + toplevel/usrp_multi/usrp_multi_config_2rx_0tx.vh \ + toplevel/usrp_multi/usrp_multi_config_2rxhb_0tx.vh \ + toplevel/usrp_multi/usrp_multi_config_2rxhb_2tx.vh \ + toplevel/usrp_multi/usrp_multi_config_4rx_0tx.vh \ + toplevel/usrp_multi/usrp_std.vh \ + toplevel/usrp_std/usrp_std.csf \ + toplevel/usrp_std/usrp_std.esf \ + toplevel/usrp_std/usrp_std.psf \ + toplevel/usrp_std/usrp_std.qpf \ + toplevel/usrp_std/usrp_std.qsf \ + toplevel/usrp_std/usrp_std.v \ + toplevel/usrp_std/usrp_std.vh \ + toplevel/usrp_std/usrp_std_config_2rxhb_2tx.vh \ + toplevel/usrp_std/usrp_std_config_4rx_0tx.vh diff --git a/fpga/TODO b/fpga/TODO new file mode 100644 index 0000000..76287c3 --- /dev/null +++ b/fpga/TODO @@ -0,0 +1,23 @@ + + +Area Reduction +============== +Reduce one or both stages of dec/interp to max rate of 8 instead of 16 +Optimize CICs to minimize registers +Reduce width of RX CORDIC +Fix CORDIC wasted logic cells from bad synthesis +Progressively narrow x,y,z on CORDIC +16-bit wide FIFOs, split IQ/channels on other side (?) + +Enhancements +============ +Halfband filter in Spartan 3 +Muxing of inputs +Switch over to newfc +RAM interface? + +Other +===== +Capture/Transmit straight samples (no DUC/DDC) + + diff --git a/fpga/gen_makefile_extra.py b/fpga/gen_makefile_extra.py new file mode 100755 index 0000000..165a849 --- /dev/null +++ b/fpga/gen_makefile_extra.py @@ -0,0 +1,67 @@ +#!/usr/bin/env python +# +# Copyright 2006 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +""" +Generate Makefile.extra +""" + +import sys +import os.path + +extensions_we_like = ( + '.v', '.vh', + '.csf', '.esf', '.psf', '.qpf', '.qsf', + '.inc', '.cmp', '.bsf', + '.py') + +def visit(keepers, dirname, names): + if 'rbf' in names: + names.remove('rbf') + if 'CVS' in names: + names.remove('CVS') + + if dirname == '.': + dirname = '' + if dirname.startswith('./'): + dirname = dirname[2:] + + for n in names: + base, ext = os.path.splitext(n) + if ext in extensions_we_like: + keepers.append(os.path.join(dirname, n)) + +def generate(f): + keepers = [] + os.path.walk('.', visit, keepers) + keepers.sort() + write_keepers(keepers, f) + +def write_keepers(files, outf): + m = reduce(max, map(len, files), 0) + e = 'EXTRA_DIST =' + outf.write('%s%s \\\n' % (e, (m-len(e)+8) * ' ')) + for f in files[:-1]: + outf.write('\t%s%s \\\n' % (f, (m-len(f)) * ' ')) + outf.write('\t%s\n' % (files[-1],)) + +if __name__ == '__main__': + generate(open('Makefile.extra','w')) diff --git a/fpga/megacells/accum32.bsf b/fpga/megacells/accum32.bsf new file mode 100755 index 0000000..494a820 --- /dev/null +++ b/fpga/megacells/accum32.bsf @@ -0,0 +1,86 @@ +/* +WARNING: Do NOT edit the input and output ports in this file in a text +editor if you plan to continue editing the block that represents it in +the Block Editor! File corruption is VERY likely to occur. +*/ +/* +Copyright (C) 1991-2003 Altera Corporation +Any megafunction design, and related netlist (encrypted or decrypted), +support information, device programming or simulation file, and any other +associated documentation or information provided by Altera or a partner +under Altera's Megafunction Partnership Program may be used only +to program PLD devices (but not masked PLD devices) from Altera. Any +other use of such megafunction design, netlist, support information, +device programming or simulation file, or any other related documentation +or information is prohibited for any other purpose, including, but not +limited to modification, reverse engineering, de-compiling, or use with +any other silicon devices, unless such use is explicitly licensed under +a separate agreement with Altera or a megafunction partner. Title to the +intellectual property, including patents, copyrights, trademarks, trade +secrets, or maskworks, embodied in any such megafunction design, netlist, +support information, device programming or simulation file, or any other +related documentation or information provided by Altera or a megafunction +partner, remains with Altera, the megafunction partner, or their respective +licensors. No other licenses, including any licenses needed under any third +party's intellectual property, are provided herein. +*/ +(header "symbol" (version "1.1")) +(symbol + (rect 0 0 240 120) + (text "accum32" (rect 87 2 166 21)(font "Arial" (font_size 10))) + (text "inst" (rect 8 101 31 116)(font "Arial" )) + (port + (pt 0 40) + (input) + (text "data[31..0]" (rect 0 0 73 16)(font "Arial" (font_size 8))) + (text "data[31..0]" (rect 20 24 82 40)(font "Arial" (font_size 8))) + (line (pt 0 40)(pt 16 40)(line_width 3)) + ) + (port + (pt 0 56) + (input) + (text "clock" (rect 0 0 36 16)(font "Arial" (font_size 8))) + (text "clock" (rect 20 40 51 56)(font "Arial" (font_size 8))) + (line (pt 0 56)(pt 16 56)(line_width 1)) + ) + (port + (pt 0 72) + (input) + (text "clken" (rect 0 0 36 16)(font "Arial" (font_size 8))) + (text "clken" (rect 20 56 51 72)(font "Arial" (font_size 8))) + (line (pt 0 72)(pt 16 72)(line_width 1)) + ) + (port + (pt 0 96) + (input) + (text "aclr" (rect 0 0 24 16)(font "Arial" (font_size 8))) + (text "aclr" (rect 20 80 41 96)(font "Arial" (font_size 8))) + (line (pt 0 96)(pt 16 96)(line_width 1)) + ) + (port + (pt 240 56) + (output) + (text "result[31..0]" (rect 0 0 81 16)(font "Arial" (font_size 8))) + (text "result[31..0]" (rect 152 40 221 56)(font "Arial" (font_size 8))) + (line (pt 240 56)(pt 224 56)(line_width 3)) + ) + (drawing + (text "acc" (rect 102 48 123 64)(font "Arial" (font_size 8))) + (text "SIGNED" (rect 177 18 214 32)(font "Arial" )) + (line (pt 16 16)(pt 224 16)(line_width 1)) + (line (pt 16 16)(pt 16 104)(line_width 1)) + (line (pt 16 104)(pt 224 104)(line_width 1)) + (line (pt 224 16)(pt 224 104)(line_width 1)) + (line (pt 88 24)(pt 136 48)(line_width 1)) + (line (pt 136 64)(pt 136 48)(line_width 1)) + (line (pt 88 88)(pt 136 64)(line_width 1)) + (line (pt 88 24)(pt 88 88)(line_width 1)) + (line (pt 16 40)(pt 88 40)(line_width 1)) + (line (pt 16 56)(pt 88 56)(line_width 1)) + (line (pt 136 56)(pt 224 56)(line_width 1)) + (line (pt 16 72)(pt 88 72)(line_width 1)) + (line (pt 16 72)(pt 88 72)(line_width 1)) + (line (pt 16 96)(pt 104 96)(line_width 1)) + (line (pt 104 96)(pt 104 80)(line_width 1)) + ) +) diff --git a/fpga/megacells/accum32.cmp b/fpga/megacells/accum32.cmp new file mode 100755 index 0000000..55b5fdc --- /dev/null +++ b/fpga/megacells/accum32.cmp @@ -0,0 +1,31 @@ +--Copyright (C) 1991-2003 Altera Corporation +--Any megafunction design, and related netlist (encrypted or decrypted), +--support information, device programming or simulation file, and any other +--associated documentation or information provided by Altera or a partner +--under Altera's Megafunction Partnership Program may be used only +--to program PLD devices (but not masked PLD devices) from Altera. Any +--other use of such megafunction design, netlist, support information, +--device programming or simulation file, or any other related documentation +--or information is prohibited for any other purpose, including, but not +--limited to modification, reverse engineering, de-compiling, or use with +--any other silicon devices, unless such use is explicitly licensed under +--a separate agreement with Altera or a megafunction partner. Title to the +--intellectual property, including patents, copyrights, trademarks, trade +--secrets, or maskworks, embodied in any such megafunction design, netlist, +--support information, device programming or simulation file, or any other +--related documentation or information provided by Altera or a megafunction +--partner, remains with Altera, the megafunction partner, or their respective +--licensors. No other licenses, including any licenses needed under any third +--party's intellectual property, are provided herein. + + +component accum32 + PORT + ( + data : IN STD_LOGIC_VECTOR (31 DOWNTO 0); + clock : IN STD_LOGIC := '0'; + clken : IN STD_LOGIC := '1'; + aclr : IN STD_LOGIC := '0'; + result : OUT STD_LOGIC_VECTOR (31 DOWNTO 0) + ); +end component; diff --git a/fpga/megacells/accum32.inc b/fpga/megacells/accum32.inc new file mode 100755 index 0000000..6c66900 --- /dev/null +++ b/fpga/megacells/accum32.inc @@ -0,0 +1,32 @@ +--Copyright (C) 1991-2003 Altera Corporation +--Any megafunction design, and related netlist (encrypted or decrypted), +--support information, device programming or simulation file, and any other +--associated documentation or information provided by Altera or a partner +--under Altera's Megafunction Partnership Program may be used only +--to program PLD devices (but not masked PLD devices) from Altera. Any +--other use of such megafunction design, netlist, support information, +--device programming or simulation file, or any other related documentation +--or information is prohibited for any other purpose, including, but not +--limited to modification, reverse engineering, de-compiling, or use with +--any other silicon devices, unless such use is explicitly licensed under +--a separate agreement with Altera or a megafunction partner. Title to the +--intellectual property, including patents, copyrights, trademarks, trade +--secrets, or maskworks, embodied in any such megafunction design, netlist, +--support information, device programming or simulation file, or any other +--related documentation or information provided by Altera or a megafunction +--partner, remains with Altera, the megafunction partner, or their respective +--licensors. No other licenses, including any licenses needed under any third +--party's intellectual property, are provided herein. + + +FUNCTION accum32 +( + data[31..0], + clock, + clken, + aclr +) + +RETURNS ( + result[31..0] +); diff --git a/fpga/megacells/accum32.v b/fpga/megacells/accum32.v new file mode 100755 index 0000000..ce50cbb --- /dev/null +++ b/fpga/megacells/accum32.v @@ -0,0 +1,765 @@ +// megafunction wizard: %ALTACCUMULATE%CBX% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: altaccumulate + +// ============================================================ +// File Name: accum32.v +// Megafunction Name(s): +// altaccumulate +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// ************************************************************ + + +//Copyright (C) 1991-2003 Altera Corporation +//Any megafunction design, and related netlist (encrypted or decrypted), +//support information, device programming or simulation file, and any other +//associated documentation or information provided by Altera or a partner +//under Altera's Megafunction Partnership Program may be used only +//to program PLD devices (but not masked PLD devices) from Altera. Any +//other use of such megafunction design, netlist, support information, +//device programming or simulation file, or any other related documentation +//or information is prohibited for any other purpose, including, but not +//limited to modification, reverse engineering, de-compiling, or use with +//any other silicon devices, unless such use is explicitly licensed under +//a separate agreement with Altera or a megafunction partner. Title to the +//intellectual property, including patents, copyrights, trademarks, trade +//secrets, or maskworks, embodied in any such megafunction design, netlist, +//support information, device programming or simulation file, or any other +//related documentation or information provided by Altera or a megafunction +//partner, remains with Altera, the megafunction partner, or their respective +//licensors. No other licenses, including any licenses needed under any third +//party's intellectual property, are provided herein. + + +//altaccumulate DEVICE_FAMILY=Cyclone LPM_REPRESENTATION=SIGNED WIDTH_IN=32 WIDTH_OUT=32 aclr clken clock data result +//VERSION_BEGIN 3.0 cbx_altaccumulate 2003:04:08:16:04:48:SJ cbx_mgl 2003:06:11:11:00:44:SJ cbx_stratix 2003:05:16:10:26:50:SJ VERSION_END + +//synthesis_resources = lut 32 +module accum32_accum_nta + ( + aclr, + clken, + clock, + data, + result) /* synthesis synthesis_clearbox=1 */; + input aclr; + input clken; + input clock; + input [31:0] data; + output [31:0] result; + + wire [0:0] wire_acc_cella_0cout; + wire [0:0] wire_acc_cella_1cout; + wire [0:0] wire_acc_cella_2cout; + wire [0:0] wire_acc_cella_3cout; + wire [0:0] wire_acc_cella_4cout; + wire [0:0] wire_acc_cella_5cout; + wire [0:0] wire_acc_cella_6cout; + wire [0:0] wire_acc_cella_7cout; + wire [0:0] wire_acc_cella_8cout; + wire [0:0] wire_acc_cella_9cout; + wire [0:0] wire_acc_cella_10cout; + wire [0:0] wire_acc_cella_11cout; + wire [0:0] wire_acc_cella_12cout; + wire [0:0] wire_acc_cella_13cout; + wire [0:0] wire_acc_cella_14cout; + wire [0:0] wire_acc_cella_15cout; + wire [0:0] wire_acc_cella_16cout; + wire [0:0] wire_acc_cella_17cout; + wire [0:0] wire_acc_cella_18cout; + wire [0:0] wire_acc_cella_19cout; + wire [0:0] wire_acc_cella_20cout; + wire [0:0] wire_acc_cella_21cout; + wire [0:0] wire_acc_cella_22cout; + wire [0:0] wire_acc_cella_23cout; + wire [0:0] wire_acc_cella_24cout; + wire [0:0] wire_acc_cella_25cout; + wire [0:0] wire_acc_cella_26cout; + wire [0:0] wire_acc_cella_27cout; + wire [0:0] wire_acc_cella_28cout; + wire [0:0] wire_acc_cella_29cout; + wire [0:0] wire_acc_cella_30cout; + wire [31:0] wire_acc_cella_dataa; + wire [31:0] wire_acc_cella_datab; + wire [31:0] wire_acc_cella_datac; + wire [31:0] wire_acc_cella_regout; + wire sload; + + stratix_lcell acc_cella_0 + ( + .aclr(aclr), + .cin(1'b0), + .clk(clock), + .cout(wire_acc_cella_0cout[0:0]), + .dataa(wire_acc_cella_dataa[0:0]), + .datab(wire_acc_cella_datab[0:0]), + .datac(wire_acc_cella_datac[0:0]), + .ena(clken), + .regout(wire_acc_cella_regout[0:0]), + .sload(sload)); + defparam + acc_cella_0.cin_used = "true", + acc_cella_0.lut_mask = "96e8", + acc_cella_0.operation_mode = "arithmetic", + acc_cella_0.sum_lutc_input = "cin", + acc_cella_0.synch_mode = "on", + acc_cella_0.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_1 + ( + .aclr(aclr), + .cin(wire_acc_cella_0cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_1cout[0:0]), + .dataa(wire_acc_cella_dataa[1:1]), + .datab(wire_acc_cella_datab[1:1]), + .datac(wire_acc_cella_datac[1:1]), + .ena(clken), + .regout(wire_acc_cella_regout[1:1]), + .sload(sload)); + defparam + acc_cella_1.cin_used = "true", + acc_cella_1.lut_mask = "96e8", + acc_cella_1.operation_mode = "arithmetic", + acc_cella_1.sum_lutc_input = "cin", + acc_cella_1.synch_mode = "on", + acc_cella_1.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_2 + ( + .aclr(aclr), + .cin(wire_acc_cella_1cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_2cout[0:0]), + .dataa(wire_acc_cella_dataa[2:2]), + .datab(wire_acc_cella_datab[2:2]), + .datac(wire_acc_cella_datac[2:2]), + .ena(clken), + .regout(wire_acc_cella_regout[2:2]), + .sload(sload)); + defparam + acc_cella_2.cin_used = "true", + acc_cella_2.lut_mask = "96e8", + acc_cella_2.operation_mode = "arithmetic", + acc_cella_2.sum_lutc_input = "cin", + acc_cella_2.synch_mode = "on", + acc_cella_2.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_3 + ( + .aclr(aclr), + .cin(wire_acc_cella_2cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_3cout[0:0]), + .dataa(wire_acc_cella_dataa[3:3]), + .datab(wire_acc_cella_datab[3:3]), + .datac(wire_acc_cella_datac[3:3]), + .ena(clken), + .regout(wire_acc_cella_regout[3:3]), + .sload(sload)); + defparam + acc_cella_3.cin_used = "true", + acc_cella_3.lut_mask = "96e8", + acc_cella_3.operation_mode = "arithmetic", + acc_cella_3.sum_lutc_input = "cin", + acc_cella_3.synch_mode = "on", + acc_cella_3.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_4 + ( + .aclr(aclr), + .cin(wire_acc_cella_3cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_4cout[0:0]), + .dataa(wire_acc_cella_dataa[4:4]), + .datab(wire_acc_cella_datab[4:4]), + .datac(wire_acc_cella_datac[4:4]), + .ena(clken), + .regout(wire_acc_cella_regout[4:4]), + .sload(sload)); + defparam + acc_cella_4.cin_used = "true", + acc_cella_4.lut_mask = "96e8", + acc_cella_4.operation_mode = "arithmetic", + acc_cella_4.sum_lutc_input = "cin", + acc_cella_4.synch_mode = "on", + acc_cella_4.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_5 + ( + .aclr(aclr), + .cin(wire_acc_cella_4cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_5cout[0:0]), + .dataa(wire_acc_cella_dataa[5:5]), + .datab(wire_acc_cella_datab[5:5]), + .datac(wire_acc_cella_datac[5:5]), + .ena(clken), + .regout(wire_acc_cella_regout[5:5]), + .sload(sload)); + defparam + acc_cella_5.cin_used = "true", + acc_cella_5.lut_mask = "96e8", + acc_cella_5.operation_mode = "arithmetic", + acc_cella_5.sum_lutc_input = "cin", + acc_cella_5.synch_mode = "on", + acc_cella_5.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_6 + ( + .aclr(aclr), + .cin(wire_acc_cella_5cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_6cout[0:0]), + .dataa(wire_acc_cella_dataa[6:6]), + .datab(wire_acc_cella_datab[6:6]), + .datac(wire_acc_cella_datac[6:6]), + .ena(clken), + .regout(wire_acc_cella_regout[6:6]), + .sload(sload)); + defparam + acc_cella_6.cin_used = "true", + acc_cella_6.lut_mask = "96e8", + acc_cella_6.operation_mode = "arithmetic", + acc_cella_6.sum_lutc_input = "cin", + acc_cella_6.synch_mode = "on", + acc_cella_6.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_7 + ( + .aclr(aclr), + .cin(wire_acc_cella_6cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_7cout[0:0]), + .dataa(wire_acc_cella_dataa[7:7]), + .datab(wire_acc_cella_datab[7:7]), + .datac(wire_acc_cella_datac[7:7]), + .ena(clken), + .regout(wire_acc_cella_regout[7:7]), + .sload(sload)); + defparam + acc_cella_7.cin_used = "true", + acc_cella_7.lut_mask = "96e8", + acc_cella_7.operation_mode = "arithmetic", + acc_cella_7.sum_lutc_input = "cin", + acc_cella_7.synch_mode = "on", + acc_cella_7.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_8 + ( + .aclr(aclr), + .cin(wire_acc_cella_7cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_8cout[0:0]), + .dataa(wire_acc_cella_dataa[8:8]), + .datab(wire_acc_cella_datab[8:8]), + .datac(wire_acc_cella_datac[8:8]), + .ena(clken), + .regout(wire_acc_cella_regout[8:8]), + .sload(sload)); + defparam + acc_cella_8.cin_used = "true", + acc_cella_8.lut_mask = "96e8", + acc_cella_8.operation_mode = "arithmetic", + acc_cella_8.sum_lutc_input = "cin", + acc_cella_8.synch_mode = "on", + acc_cella_8.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_9 + ( + .aclr(aclr), + .cin(wire_acc_cella_8cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_9cout[0:0]), + .dataa(wire_acc_cella_dataa[9:9]), + .datab(wire_acc_cella_datab[9:9]), + .datac(wire_acc_cella_datac[9:9]), + .ena(clken), + .regout(wire_acc_cella_regout[9:9]), + .sload(sload)); + defparam + acc_cella_9.cin_used = "true", + acc_cella_9.lut_mask = "96e8", + acc_cella_9.operation_mode = "arithmetic", + acc_cella_9.sum_lutc_input = "cin", + acc_cella_9.synch_mode = "on", + acc_cella_9.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_10 + ( + .aclr(aclr), + .cin(wire_acc_cella_9cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_10cout[0:0]), + .dataa(wire_acc_cella_dataa[10:10]), + .datab(wire_acc_cella_datab[10:10]), + .datac(wire_acc_cella_datac[10:10]), + .ena(clken), + .regout(wire_acc_cella_regout[10:10]), + .sload(sload)); + defparam + acc_cella_10.cin_used = "true", + acc_cella_10.lut_mask = "96e8", + acc_cella_10.operation_mode = "arithmetic", + acc_cella_10.sum_lutc_input = "cin", + acc_cella_10.synch_mode = "on", + acc_cella_10.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_11 + ( + .aclr(aclr), + .cin(wire_acc_cella_10cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_11cout[0:0]), + .dataa(wire_acc_cella_dataa[11:11]), + .datab(wire_acc_cella_datab[11:11]), + .datac(wire_acc_cella_datac[11:11]), + .ena(clken), + .regout(wire_acc_cella_regout[11:11]), + .sload(sload)); + defparam + acc_cella_11.cin_used = "true", + acc_cella_11.lut_mask = "96e8", + acc_cella_11.operation_mode = "arithmetic", + acc_cella_11.sum_lutc_input = "cin", + acc_cella_11.synch_mode = "on", + acc_cella_11.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_12 + ( + .aclr(aclr), + .cin(wire_acc_cella_11cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_12cout[0:0]), + .dataa(wire_acc_cella_dataa[12:12]), + .datab(wire_acc_cella_datab[12:12]), + .datac(wire_acc_cella_datac[12:12]), + .ena(clken), + .regout(wire_acc_cella_regout[12:12]), + .sload(sload)); + defparam + acc_cella_12.cin_used = "true", + acc_cella_12.lut_mask = "96e8", + acc_cella_12.operation_mode = "arithmetic", + acc_cella_12.sum_lutc_input = "cin", + acc_cella_12.synch_mode = "on", + acc_cella_12.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_13 + ( + .aclr(aclr), + .cin(wire_acc_cella_12cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_13cout[0:0]), + .dataa(wire_acc_cella_dataa[13:13]), + .datab(wire_acc_cella_datab[13:13]), + .datac(wire_acc_cella_datac[13:13]), + .ena(clken), + .regout(wire_acc_cella_regout[13:13]), + .sload(sload)); + defparam + acc_cella_13.cin_used = "true", + acc_cella_13.lut_mask = "96e8", + acc_cella_13.operation_mode = "arithmetic", + acc_cella_13.sum_lutc_input = "cin", + acc_cella_13.synch_mode = "on", + acc_cella_13.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_14 + ( + .aclr(aclr), + .cin(wire_acc_cella_13cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_14cout[0:0]), + .dataa(wire_acc_cella_dataa[14:14]), + .datab(wire_acc_cella_datab[14:14]), + .datac(wire_acc_cella_datac[14:14]), + .ena(clken), + .regout(wire_acc_cella_regout[14:14]), + .sload(sload)); + defparam + acc_cella_14.cin_used = "true", + acc_cella_14.lut_mask = "96e8", + acc_cella_14.operation_mode = "arithmetic", + acc_cella_14.sum_lutc_input = "cin", + acc_cella_14.synch_mode = "on", + acc_cella_14.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_15 + ( + .aclr(aclr), + .cin(wire_acc_cella_14cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_15cout[0:0]), + .dataa(wire_acc_cella_dataa[15:15]), + .datab(wire_acc_cella_datab[15:15]), + .datac(wire_acc_cella_datac[15:15]), + .ena(clken), + .regout(wire_acc_cella_regout[15:15]), + .sload(sload)); + defparam + acc_cella_15.cin_used = "true", + acc_cella_15.lut_mask = "96e8", + acc_cella_15.operation_mode = "arithmetic", + acc_cella_15.sum_lutc_input = "cin", + acc_cella_15.synch_mode = "on", + acc_cella_15.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_16 + ( + .aclr(aclr), + .cin(wire_acc_cella_15cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_16cout[0:0]), + .dataa(wire_acc_cella_dataa[16:16]), + .datab(wire_acc_cella_datab[16:16]), + .datac(wire_acc_cella_datac[16:16]), + .ena(clken), + .regout(wire_acc_cella_regout[16:16]), + .sload(sload)); + defparam + acc_cella_16.cin_used = "true", + acc_cella_16.lut_mask = "96e8", + acc_cella_16.operation_mode = "arithmetic", + acc_cella_16.sum_lutc_input = "cin", + acc_cella_16.synch_mode = "on", + acc_cella_16.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_17 + ( + .aclr(aclr), + .cin(wire_acc_cella_16cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_17cout[0:0]), + .dataa(wire_acc_cella_dataa[17:17]), + .datab(wire_acc_cella_datab[17:17]), + .datac(wire_acc_cella_datac[17:17]), + .ena(clken), + .regout(wire_acc_cella_regout[17:17]), + .sload(sload)); + defparam + acc_cella_17.cin_used = "true", + acc_cella_17.lut_mask = "96e8", + acc_cella_17.operation_mode = "arithmetic", + acc_cella_17.sum_lutc_input = "cin", + acc_cella_17.synch_mode = "on", + acc_cella_17.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_18 + ( + .aclr(aclr), + .cin(wire_acc_cella_17cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_18cout[0:0]), + .dataa(wire_acc_cella_dataa[18:18]), + .datab(wire_acc_cella_datab[18:18]), + .datac(wire_acc_cella_datac[18:18]), + .ena(clken), + .regout(wire_acc_cella_regout[18:18]), + .sload(sload)); + defparam + acc_cella_18.cin_used = "true", + acc_cella_18.lut_mask = "96e8", + acc_cella_18.operation_mode = "arithmetic", + acc_cella_18.sum_lutc_input = "cin", + acc_cella_18.synch_mode = "on", + acc_cella_18.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_19 + ( + .aclr(aclr), + .cin(wire_acc_cella_18cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_19cout[0:0]), + .dataa(wire_acc_cella_dataa[19:19]), + .datab(wire_acc_cella_datab[19:19]), + .datac(wire_acc_cella_datac[19:19]), + .ena(clken), + .regout(wire_acc_cella_regout[19:19]), + .sload(sload)); + defparam + acc_cella_19.cin_used = "true", + acc_cella_19.lut_mask = "96e8", + acc_cella_19.operation_mode = "arithmetic", + acc_cella_19.sum_lutc_input = "cin", + acc_cella_19.synch_mode = "on", + acc_cella_19.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_20 + ( + .aclr(aclr), + .cin(wire_acc_cella_19cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_20cout[0:0]), + .dataa(wire_acc_cella_dataa[20:20]), + .datab(wire_acc_cella_datab[20:20]), + .datac(wire_acc_cella_datac[20:20]), + .ena(clken), + .regout(wire_acc_cella_regout[20:20]), + .sload(sload)); + defparam + acc_cella_20.cin_used = "true", + acc_cella_20.lut_mask = "96e8", + acc_cella_20.operation_mode = "arithmetic", + acc_cella_20.sum_lutc_input = "cin", + acc_cella_20.synch_mode = "on", + acc_cella_20.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_21 + ( + .aclr(aclr), + .cin(wire_acc_cella_20cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_21cout[0:0]), + .dataa(wire_acc_cella_dataa[21:21]), + .datab(wire_acc_cella_datab[21:21]), + .datac(wire_acc_cella_datac[21:21]), + .ena(clken), + .regout(wire_acc_cella_regout[21:21]), + .sload(sload)); + defparam + acc_cella_21.cin_used = "true", + acc_cella_21.lut_mask = "96e8", + acc_cella_21.operation_mode = "arithmetic", + acc_cella_21.sum_lutc_input = "cin", + acc_cella_21.synch_mode = "on", + acc_cella_21.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_22 + ( + .aclr(aclr), + .cin(wire_acc_cella_21cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_22cout[0:0]), + .dataa(wire_acc_cella_dataa[22:22]), + .datab(wire_acc_cella_datab[22:22]), + .datac(wire_acc_cella_datac[22:22]), + .ena(clken), + .regout(wire_acc_cella_regout[22:22]), + .sload(sload)); + defparam + acc_cella_22.cin_used = "true", + acc_cella_22.lut_mask = "96e8", + acc_cella_22.operation_mode = "arithmetic", + acc_cella_22.sum_lutc_input = "cin", + acc_cella_22.synch_mode = "on", + acc_cella_22.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_23 + ( + .aclr(aclr), + .cin(wire_acc_cella_22cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_23cout[0:0]), + .dataa(wire_acc_cella_dataa[23:23]), + .datab(wire_acc_cella_datab[23:23]), + .datac(wire_acc_cella_datac[23:23]), + .ena(clken), + .regout(wire_acc_cella_regout[23:23]), + .sload(sload)); + defparam + acc_cella_23.cin_used = "true", + acc_cella_23.lut_mask = "96e8", + acc_cella_23.operation_mode = "arithmetic", + acc_cella_23.sum_lutc_input = "cin", + acc_cella_23.synch_mode = "on", + acc_cella_23.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_24 + ( + .aclr(aclr), + .cin(wire_acc_cella_23cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_24cout[0:0]), + .dataa(wire_acc_cella_dataa[24:24]), + .datab(wire_acc_cella_datab[24:24]), + .datac(wire_acc_cella_datac[24:24]), + .ena(clken), + .regout(wire_acc_cella_regout[24:24]), + .sload(sload)); + defparam + acc_cella_24.cin_used = "true", + acc_cella_24.lut_mask = "96e8", + acc_cella_24.operation_mode = "arithmetic", + acc_cella_24.sum_lutc_input = "cin", + acc_cella_24.synch_mode = "on", + acc_cella_24.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_25 + ( + .aclr(aclr), + .cin(wire_acc_cella_24cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_25cout[0:0]), + .dataa(wire_acc_cella_dataa[25:25]), + .datab(wire_acc_cella_datab[25:25]), + .datac(wire_acc_cella_datac[25:25]), + .ena(clken), + .regout(wire_acc_cella_regout[25:25]), + .sload(sload)); + defparam + acc_cella_25.cin_used = "true", + acc_cella_25.lut_mask = "96e8", + acc_cella_25.operation_mode = "arithmetic", + acc_cella_25.sum_lutc_input = "cin", + acc_cella_25.synch_mode = "on", + acc_cella_25.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_26 + ( + .aclr(aclr), + .cin(wire_acc_cella_25cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_26cout[0:0]), + .dataa(wire_acc_cella_dataa[26:26]), + .datab(wire_acc_cella_datab[26:26]), + .datac(wire_acc_cella_datac[26:26]), + .ena(clken), + .regout(wire_acc_cella_regout[26:26]), + .sload(sload)); + defparam + acc_cella_26.cin_used = "true", + acc_cella_26.lut_mask = "96e8", + acc_cella_26.operation_mode = "arithmetic", + acc_cella_26.sum_lutc_input = "cin", + acc_cella_26.synch_mode = "on", + acc_cella_26.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_27 + ( + .aclr(aclr), + .cin(wire_acc_cella_26cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_27cout[0:0]), + .dataa(wire_acc_cella_dataa[27:27]), + .datab(wire_acc_cella_datab[27:27]), + .datac(wire_acc_cella_datac[27:27]), + .ena(clken), + .regout(wire_acc_cella_regout[27:27]), + .sload(sload)); + defparam + acc_cella_27.cin_used = "true", + acc_cella_27.lut_mask = "96e8", + acc_cella_27.operation_mode = "arithmetic", + acc_cella_27.sum_lutc_input = "cin", + acc_cella_27.synch_mode = "on", + acc_cella_27.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_28 + ( + .aclr(aclr), + .cin(wire_acc_cella_27cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_28cout[0:0]), + .dataa(wire_acc_cella_dataa[28:28]), + .datab(wire_acc_cella_datab[28:28]), + .datac(wire_acc_cella_datac[28:28]), + .ena(clken), + .regout(wire_acc_cella_regout[28:28]), + .sload(sload)); + defparam + acc_cella_28.cin_used = "true", + acc_cella_28.lut_mask = "96e8", + acc_cella_28.operation_mode = "arithmetic", + acc_cella_28.sum_lutc_input = "cin", + acc_cella_28.synch_mode = "on", + acc_cella_28.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_29 + ( + .aclr(aclr), + .cin(wire_acc_cella_28cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_29cout[0:0]), + .dataa(wire_acc_cella_dataa[29:29]), + .datab(wire_acc_cella_datab[29:29]), + .datac(wire_acc_cella_datac[29:29]), + .ena(clken), + .regout(wire_acc_cella_regout[29:29]), + .sload(sload)); + defparam + acc_cella_29.cin_used = "true", + acc_cella_29.lut_mask = "96e8", + acc_cella_29.operation_mode = "arithmetic", + acc_cella_29.sum_lutc_input = "cin", + acc_cella_29.synch_mode = "on", + acc_cella_29.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_30 + ( + .aclr(aclr), + .cin(wire_acc_cella_29cout[0:0]), + .clk(clock), + .cout(wire_acc_cella_30cout[0:0]), + .dataa(wire_acc_cella_dataa[30:30]), + .datab(wire_acc_cella_datab[30:30]), + .datac(wire_acc_cella_datac[30:30]), + .ena(clken), + .regout(wire_acc_cella_regout[30:30]), + .sload(sload)); + defparam + acc_cella_30.cin_used = "true", + acc_cella_30.lut_mask = "96e8", + acc_cella_30.operation_mode = "arithmetic", + acc_cella_30.sum_lutc_input = "cin", + acc_cella_30.synch_mode = "on", + acc_cella_30.lpm_type = "stratix_lcell"; + stratix_lcell acc_cella_31 + ( + .aclr(aclr), + .cin(wire_acc_cella_30cout[0:0]), + .clk(clock), + .dataa(wire_acc_cella_dataa[31:31]), + .datab(wire_acc_cella_datab[31:31]), + .datac(wire_acc_cella_datac[31:31]), + .ena(clken), + .regout(wire_acc_cella_regout[31:31]), + .sload(sload)); + defparam + acc_cella_31.cin_used = "true", + acc_cella_31.lut_mask = "9696", + acc_cella_31.operation_mode = "normal", + acc_cella_31.sum_lutc_input = "cin", + acc_cella_31.synch_mode = "on", + acc_cella_31.lpm_type = "stratix_lcell"; + assign + wire_acc_cella_dataa = data, + wire_acc_cella_datab = wire_acc_cella_regout, + wire_acc_cella_datac = data; + assign + result = wire_acc_cella_regout, + sload = 1'b0; +endmodule //accum32_accum_nta +//VALID FILE + + +module accum32 ( + data, + clock, + clken, + aclr, + result)/* synthesis synthesis_clearbox = 1 */; + + input [31:0] data; + input clock; + input clken; + input aclr; + output [31:0] result; + + wire [31:0] sub_wire0; + wire [31:0] result = sub_wire0[31:0]; + + accum32_accum_nta accum32_accum_nta_component ( + .clken (clken), + .aclr (aclr), + .clock (clock), + .data (data), + .result (sub_wire0)); + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: WIDTH_IN NUMERIC "32" +// Retrieval info: PRIVATE: WIDTH_OUT NUMERIC "32" +// Retrieval info: PRIVATE: LPM_REPRESENTATION NUMERIC "0" +// Retrieval info: PRIVATE: SLOAD NUMERIC "0" +// Retrieval info: PRIVATE: ADD_SUB NUMERIC "0" +// Retrieval info: PRIVATE: CIN NUMERIC "0" +// Retrieval info: PRIVATE: CLKEN NUMERIC "1" +// Retrieval info: PRIVATE: ACLR NUMERIC "1" +// Retrieval info: PRIVATE: COUT NUMERIC "0" +// Retrieval info: PRIVATE: OVERFLOW NUMERIC "0" +// Retrieval info: PRIVATE: LATENCY NUMERIC "0" +// Retrieval info: PRIVATE: EXTRA_LATENCY NUMERIC "0" +// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: CONSTANT: WIDTH_IN NUMERIC "32" +// Retrieval info: CONSTANT: WIDTH_OUT NUMERIC "32" +// Retrieval info: CONSTANT: LPM_REPRESENTATION STRING "SIGNED" +// Retrieval info: CONSTANT: LPM_TYPE STRING "altaccumulate" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: USED_PORT: data 0 0 32 0 INPUT NODEFVAL data[31..0] +// Retrieval info: USED_PORT: result 0 0 32 0 OUTPUT NODEFVAL result[31..0] +// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT GND clock +// Retrieval info: USED_PORT: clken 0 0 0 0 INPUT VCC clken +// Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT GND aclr +// Retrieval info: CONNECT: @data 0 0 32 0 data 0 0 32 0 +// Retrieval info: CONNECT: result 0 0 32 0 @result 0 0 32 0 +// Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0 +// Retrieval info: CONNECT: @clken 0 0 0 0 clken 0 0 0 0 +// Retrieval info: CONNECT: @aclr 0 0 0 0 aclr 0 0 0 0 +// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all diff --git a/fpga/megacells/accum32_bb.v b/fpga/megacells/accum32_bb.v new file mode 100755 index 0000000..142bde8 --- /dev/null +++ b/fpga/megacells/accum32_bb.v @@ -0,0 +1,35 @@ +//Copyright (C) 1991-2003 Altera Corporation +//Any megafunction design, and related netlist (encrypted or decrypted), +//support information, device programming or simulation file, and any other +//associated documentation or information provided by Altera or a partner +//under Altera's Megafunction Partnership Program may be used only +//to program PLD devices (but not masked PLD devices) from Altera. Any +//other use of such megafunction design, netlist, support information, +//device programming or simulation file, or any other related documentation +//or information is prohibited for any other purpose, including, but not +//limited to modification, reverse engineering, de-compiling, or use with +//any other silicon devices, unless such use is explicitly licensed under +//a separate agreement with Altera or a megafunction partner. Title to the +//intellectual property, including patents, copyrights, trademarks, trade +//secrets, or maskworks, embodied in any such megafunction design, netlist, +//support information, device programming or simulation file, or any other +//related documentation or information provided by Altera or a megafunction +//partner, remains with Altera, the megafunction partner, or their respective +//licensors. No other licenses, including any licenses needed under any third +//party's intellectual property, are provided herein. + +module accum32 ( + data, + clock, + clken, + aclr, + result)/* synthesis synthesis_clearbox = 1 */; + + input [31:0] data; + input clock; + input clken; + input aclr; + output [31:0] result; + +endmodule + diff --git a/fpga/megacells/accum32_inst.v b/fpga/megacells/accum32_inst.v new file mode 100755 index 0000000..c354acc --- /dev/null +++ b/fpga/megacells/accum32_inst.v @@ -0,0 +1,7 @@ +accum32 accum32_inst ( + .data ( data_sig ), + .clock ( clock_sig ), + .clken ( clken_sig ), + .aclr ( aclr_sig ), + .result ( result_sig ) + ); diff --git a/fpga/megacells/add32.bsf b/fpga/megacells/add32.bsf new file mode 100755 index 0000000..b2da9fc --- /dev/null +++ b/fpga/megacells/add32.bsf @@ -0,0 +1,62 @@ +/* +WARNING: Do NOT edit the input and output ports in this file in a text +editor if you plan to continue editing the block that represents it in +the Block Editor! File corruption is VERY likely to occur. +*/ +/* +Copyright (C) 1991-2003 Altera Corporation +Any megafunction design, and related netlist (encrypted or decrypted), +support information, device programming or simulation file, and any other +associated documentation or information provided by Altera or a partner +under Altera's Megafunction Partnership Program may be used only +to program PLD devices (but not masked PLD devices) from Altera. Any +other use of such megafunction design, netlist, support information, +device programming or simulation file, or any other related documentation +or information is prohibited for any other purpose, including, but not +limited to modification, reverse engineering, de-compiling, or use with +any other silicon devices, unless such use is explicitly licensed under +a separate agreement with Altera or a megafunction partner. Title to the +intellectual property, including patents, copyrights, trademarks, trade +secrets, or maskworks, embodied in any such megafunction design, netlist, +support information, device programming or simulation file, or any other +related documentation or information provided by Altera or a megafunction +partner, remains with Altera, the megafunction partner, or their respective +licensors. No other licenses, including any licenses needed under any third +party's intellectual property, are provided herein. +*/ +(header "symbol" (version "1.1")) +(symbol + (rect 0 0 160 96) + (text "add32" (rect 58 2 111 21)(font "Arial" (font_size 10))) + (text "inst" (rect 8 77 31 92)(font "Arial" )) + (port + (pt 0 40) + (input) + (text "dataa[7..0]" (rect 0 0 73 16)(font "Arial" (font_size 8))) + (text "dataa[7..0]" (rect 4 24 66 40)(font "Arial" (font_size 8))) + (line (pt 0 40)(pt 64 40)(line_width 3)) + ) + (port + (pt 0 72) + (input) + (text "datab[7..0]" (rect 0 0 73 16)(font "Arial" (font_size 8))) + (text "datab[7..0]" (rect 4 56 66 72)(font "Arial" (font_size 8))) + (line (pt 0 72)(pt 64 72)(line_width 3)) + ) + (port + (pt 160 56) + (output) + (text "result[7..0]" (rect 0 0 73 16)(font "Arial" (font_size 8))) + (text "result[7..0]" (rect 95 40 157 56)(font "Arial" (font_size 8))) + (line (pt 160 56)(pt 96 56)(line_width 3)) + ) + (drawing + (text "A" (rect 66 32 75 48)(font "Arial" (font_size 8))) + (text "B" (rect 66 64 75 80)(font "Arial" (font_size 8))) + (text "A+B" (rect 68 48 94 64)(font "Arial" (font_size 8))) + (line (pt 64 32)(pt 96 40)(line_width 1)) + (line (pt 96 40)(pt 96 72)(line_width 1)) + (line (pt 96 72)(pt 64 80)(line_width 1)) + (line (pt 64 80)(pt 64 32)(line_width 1)) + ) +) diff --git a/fpga/megacells/add32.cmp b/fpga/megacells/add32.cmp new file mode 100755 index 0000000..3b12017 --- /dev/null +++ b/fpga/megacells/add32.cmp @@ -0,0 +1,29 @@ +--Copyright (C) 1991-2003 Altera Corporation +--Any megafunction design, and related netlist (encrypted or decrypted), +--support information, device programming or simulation file, and any other +--associated documentation or information provided by Altera or a partner +--under Altera's Megafunction Partnership Program may be used only +--to program PLD devices (but not masked PLD devices) from Altera. Any +--other use of such megafunction design, netlist, support information, +--device programming or simulation file, or any other related documentation +--or information is prohibited for any other purpose, including, but not +--limited to modification, reverse engineering, de-compiling, or use with +--any other silicon devices, unless such use is explicitly licensed under +--a separate agreement with Altera or a megafunction partner. Title to the +--intellectual property, including patents, copyrights, trademarks, trade +--secrets, or maskworks, embodied in any such megafunction design, netlist, +--support information, device programming or simulation file, or any other +--related documentation or information provided by Altera or a megafunction +--partner, remains with Altera, the megafunction partner, or their respective +--licensors. No other licenses, including any licenses needed under any third +--party's intellectual property, are provided herein. + + +component add32 + PORT + ( + dataa : IN STD_LOGIC_VECTOR (7 DOWNTO 0); + datab : IN STD_LOGIC_VECTOR (7 DOWNTO 0); + result : OUT STD_LOGIC_VECTOR (7 DOWNTO 0) + ); +end component; diff --git a/fpga/megacells/add32.inc b/fpga/megacells/add32.inc new file mode 100755 index 0000000..6755257 --- /dev/null +++ b/fpga/megacells/add32.inc @@ -0,0 +1,30 @@ +--Copyright (C) 1991-2003 Altera Corporation +--Any megafunction design, and related netlist (encrypted or decrypted), +--support information, device programming or simulation file, and any other +--associated documentation or information provided by Altera or a partner +--under Altera's Megafunction Partnership Program may be used only +--to program PLD devices (but not masked PLD devices) from Altera. Any +--other use of such megafunction design, netlist, support information, +--device programming or simulation file, or any other related documentation +--or information is prohibited for any other purpose, including, but not +--limited to modification, reverse engineering, de-compiling, or use with +--any other silicon devices, unless such use is explicitly licensed under +--a separate agreement with Altera or a megafunction partner. Title to the +--intellectual property, including patents, copyrights, trademarks, trade +--secrets, or maskworks, embodied in any such megafunction design, netlist, +--support information, device programming or simulation file, or any other +--related documentation or information provided by Altera or a megafunction +--partner, remains with Altera, the megafunction partner, or their respective +--licensors. No other licenses, including any licenses needed under any third +--party's intellectual property, are provided herein. + + +FUNCTION add32 +( + dataa[7..0], + datab[7..0] +) + +RETURNS ( + result[7..0] +); diff --git a/fpga/megacells/add32.v b/fpga/megacells/add32.v new file mode 100755 index 0000000..d809061 --- /dev/null +++ b/fpga/megacells/add32.v @@ -0,0 +1,221 @@ +// megafunction wizard: %LPM_ADD_SUB%CBX% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: lpm_add_sub + +// ============================================================ +// File Name: add32.v +// Megafunction Name(s): +// lpm_add_sub +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// ************************************************************ + + +//Copyright (C) 1991-2003 Altera Corporation +//Any megafunction design, and related netlist (encrypted or decrypted), +//support information, device programming or simulation file, and any other +//associated documentation or information provided by Altera or a partner +//under Altera's Megafunction Partnership Program may be used only +//to program PLD devices (but not masked PLD devices) from Altera. Any +//other use of such megafunction design, netlist, support information, +//device programming or simulation file, or any other related documentation +//or information is prohibited for any other purpose, including, but not +//limited to modification, reverse engineering, de-compiling, or use with +//any other silicon devices, unless such use is explicitly licensed under +//a separate agreement with Altera or a megafunction partner. Title to the +//intellectual property, including patents, copyrights, trademarks, trade +//secrets, or maskworks, embodied in any such megafunction design, netlist, +//support information, device programming or simulation file, or any other +//related documentation or information provided by Altera or a megafunction +//partner, remains with Altera, the megafunction partner, or their respective +//licensors. No other licenses, including any licenses needed under any third +//party's intellectual property, are provided herein. + + +//lpm_add_sub DEVICE_FAMILY=Cyclone LPM_DIRECTION=ADD LPM_WIDTH=8 dataa datab result +//VERSION_BEGIN 3.0 cbx_lpm_add_sub 2003:04:10:18:28:42:SJ cbx_mgl 2003:06:11:11:00:44:SJ cbx_stratix 2003:05:16:10:26:50:SJ VERSION_END + +//synthesis_resources = lut 8 +module add32_add_sub_nq7 + ( + dataa, + datab, + result) /* synthesis synthesis_clearbox=1 */; + input [7:0] dataa; + input [7:0] datab; + output [7:0] result; + + wire [7:0] wire_add_sub_cella_combout; + wire [0:0] wire_add_sub_cella_0cout; + wire [0:0] wire_add_sub_cella_1cout; + wire [0:0] wire_add_sub_cella_2cout; + wire [0:0] wire_add_sub_cella_3cout; + wire [0:0] wire_add_sub_cella_4cout; + wire [0:0] wire_add_sub_cella_5cout; + wire [0:0] wire_add_sub_cella_6cout; + wire [7:0] wire_add_sub_cella_dataa; + wire [7:0] wire_add_sub_cella_datab; + + stratix_lcell add_sub_cella_0 + ( + .cin(1'b0), + .combout(wire_add_sub_cella_combout[0:0]), + .cout(wire_add_sub_cella_0cout[0:0]), + .dataa(wire_add_sub_cella_dataa[0:0]), + .datab(wire_add_sub_cella_datab[0:0])); + defparam + add_sub_cella_0.cin_used = "true", + add_sub_cella_0.lut_mask = "96e8", + add_sub_cella_0.operation_mode = "arithmetic", + add_sub_cella_0.sum_lutc_input = "cin", + add_sub_cella_0.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_1 + ( + .cin(wire_add_sub_cella_0cout[0:0]), + .combout(wire_add_sub_cella_combout[1:1]), + .cout(wire_add_sub_cella_1cout[0:0]), + .dataa(wire_add_sub_cella_dataa[1:1]), + .datab(wire_add_sub_cella_datab[1:1])); + defparam + add_sub_cella_1.cin_used = "true", + add_sub_cella_1.lut_mask = "96e8", + add_sub_cella_1.operation_mode = "arithmetic", + add_sub_cella_1.sum_lutc_input = "cin", + add_sub_cella_1.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_2 + ( + .cin(wire_add_sub_cella_1cout[0:0]), + .combout(wire_add_sub_cella_combout[2:2]), + .cout(wire_add_sub_cella_2cout[0:0]), + .dataa(wire_add_sub_cella_dataa[2:2]), + .datab(wire_add_sub_cella_datab[2:2])); + defparam + add_sub_cella_2.cin_used = "true", + add_sub_cella_2.lut_mask = "96e8", + add_sub_cella_2.operation_mode = "arithmetic", + add_sub_cella_2.sum_lutc_input = "cin", + add_sub_cella_2.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_3 + ( + .cin(wire_add_sub_cella_2cout[0:0]), + .combout(wire_add_sub_cella_combout[3:3]), + .cout(wire_add_sub_cella_3cout[0:0]), + .dataa(wire_add_sub_cella_dataa[3:3]), + .datab(wire_add_sub_cella_datab[3:3])); + defparam + add_sub_cella_3.cin_used = "true", + add_sub_cella_3.lut_mask = "96e8", + add_sub_cella_3.operation_mode = "arithmetic", + add_sub_cella_3.sum_lutc_input = "cin", + add_sub_cella_3.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_4 + ( + .cin(wire_add_sub_cella_3cout[0:0]), + .combout(wire_add_sub_cella_combout[4:4]), + .cout(wire_add_sub_cella_4cout[0:0]), + .dataa(wire_add_sub_cella_dataa[4:4]), + .datab(wire_add_sub_cella_datab[4:4])); + defparam + add_sub_cella_4.cin_used = "true", + add_sub_cella_4.lut_mask = "96e8", + add_sub_cella_4.operation_mode = "arithmetic", + add_sub_cella_4.sum_lutc_input = "cin", + add_sub_cella_4.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_5 + ( + .cin(wire_add_sub_cella_4cout[0:0]), + .combout(wire_add_sub_cella_combout[5:5]), + .cout(wire_add_sub_cella_5cout[0:0]), + .dataa(wire_add_sub_cella_dataa[5:5]), + .datab(wire_add_sub_cella_datab[5:5])); + defparam + add_sub_cella_5.cin_used = "true", + add_sub_cella_5.lut_mask = "96e8", + add_sub_cella_5.operation_mode = "arithmetic", + add_sub_cella_5.sum_lutc_input = "cin", + add_sub_cella_5.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_6 + ( + .cin(wire_add_sub_cella_5cout[0:0]), + .combout(wire_add_sub_cella_combout[6:6]), + .cout(wire_add_sub_cella_6cout[0:0]), + .dataa(wire_add_sub_cella_dataa[6:6]), + .datab(wire_add_sub_cella_datab[6:6])); + defparam + add_sub_cella_6.cin_used = "true", + add_sub_cella_6.lut_mask = "96e8", + add_sub_cella_6.operation_mode = "arithmetic", + add_sub_cella_6.sum_lutc_input = "cin", + add_sub_cella_6.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_7 + ( + .cin(wire_add_sub_cella_6cout[0:0]), + .combout(wire_add_sub_cella_combout[7:7]), + .dataa(wire_add_sub_cella_dataa[7:7]), + .datab(wire_add_sub_cella_datab[7:7])); + defparam + add_sub_cella_7.cin_used = "true", + add_sub_cella_7.lut_mask = "9696", + add_sub_cella_7.operation_mode = "normal", + add_sub_cella_7.sum_lutc_input = "cin", + add_sub_cella_7.lpm_type = "stratix_lcell"; + assign + wire_add_sub_cella_dataa = dataa, + wire_add_sub_cella_datab = datab; + assign + result = wire_add_sub_cella_combout; +endmodule //add32_add_sub_nq7 +//VALID FILE + + +module add32 ( + dataa, + datab, + result)/* synthesis synthesis_clearbox = 1 */; + + input [7:0] dataa; + input [7:0] datab; + output [7:0] result; + + wire [7:0] sub_wire0; + wire [7:0] result = sub_wire0[7:0]; + + add32_add_sub_nq7 add32_add_sub_nq7_component ( + .dataa (dataa), + .datab (datab), + .result (sub_wire0)); + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: nBit NUMERIC "8" +// Retrieval info: PRIVATE: Function NUMERIC "0" +// Retrieval info: PRIVATE: WhichConstant NUMERIC "0" +// Retrieval info: PRIVATE: ConstantA NUMERIC "0" +// Retrieval info: PRIVATE: ConstantB NUMERIC "0" +// Retrieval info: PRIVATE: ValidCtA NUMERIC "0" +// Retrieval info: PRIVATE: ValidCtB NUMERIC "0" +// Retrieval info: PRIVATE: CarryIn NUMERIC "0" +// Retrieval info: PRIVATE: CarryOut NUMERIC "0" +// Retrieval info: PRIVATE: Overflow NUMERIC "0" +// Retrieval info: PRIVATE: Latency NUMERIC "0" +// Retrieval info: PRIVATE: aclr NUMERIC "0" +// Retrieval info: PRIVATE: clken NUMERIC "0" +// Retrieval info: PRIVATE: LPM_PIPELINE NUMERIC "0" +// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "8" +// Retrieval info: CONSTANT: LPM_DIRECTION STRING "ADD" +// Retrieval info: CONSTANT: LPM_TYPE STRING "LPM_ADD_SUB" +// Retrieval info: CONSTANT: LPM_HINT STRING "ONE_INPUT_IS_CONSTANT=NO" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: USED_PORT: result 0 0 8 0 OUTPUT NODEFVAL result[7..0] +// Retrieval info: USED_PORT: dataa 0 0 8 0 INPUT NODEFVAL dataa[7..0] +// Retrieval info: USED_PORT: datab 0 0 8 0 INPUT NODEFVAL datab[7..0] +// Retrieval info: CONNECT: result 0 0 8 0 @result 0 0 8 0 +// Retrieval info: CONNECT: @dataa 0 0 8 0 dataa 0 0 8 0 +// Retrieval info: CONNECT: @datab 0 0 8 0 datab 0 0 8 0 +// Retrieval info: LIBRARY: lpm lpm.lpm_components.all diff --git a/fpga/megacells/add32_bb.v b/fpga/megacells/add32_bb.v new file mode 100755 index 0000000..8d1588c --- /dev/null +++ b/fpga/megacells/add32_bb.v @@ -0,0 +1,31 @@ +//Copyright (C) 1991-2003 Altera Corporation +//Any megafunction design, and related netlist (encrypted or decrypted), +//support information, device programming or simulation file, and any other +//associated documentation or information provided by Altera or a partner +//under Altera's Megafunction Partnership Program may be used only +//to program PLD devices (but not masked PLD devices) from Altera. Any +//other use of such megafunction design, netlist, support information, +//device programming or simulation file, or any other related documentation +//or information is prohibited for any other purpose, including, but not +//limited to modification, reverse engineering, de-compiling, or use with +//any other silicon devices, unless such use is explicitly licensed under +//a separate agreement with Altera or a megafunction partner. Title to the +//intellectual property, including patents, copyrights, trademarks, trade +//secrets, or maskworks, embodied in any such megafunction design, netlist, +//support information, device programming or simulation file, or any other +//related documentation or information provided by Altera or a megafunction +//partner, remains with Altera, the megafunction partner, or their respective +//licensors. No other licenses, including any licenses needed under any third +//party's intellectual property, are provided herein. + +module add32 ( + dataa, + datab, + result)/* synthesis synthesis_clearbox = 1 */; + + input [7:0] dataa; + input [7:0] datab; + output [7:0] result; + +endmodule + diff --git a/fpga/megacells/add32_inst.v b/fpga/megacells/add32_inst.v new file mode 100755 index 0000000..bc7e6d4 --- /dev/null +++ b/fpga/megacells/add32_inst.v @@ -0,0 +1,5 @@ +add32 add32_inst ( + .dataa ( dataa_sig ), + .datab ( datab_sig ), + .result ( result_sig ) + ); diff --git a/fpga/megacells/addsub16.bsf b/fpga/megacells/addsub16.bsf new file mode 100755 index 0000000..9ed6b72 --- /dev/null +++ b/fpga/megacells/addsub16.bsf @@ -0,0 +1,96 @@ +/* +WARNING: Do NOT edit the input and output ports in this file in a text +editor if you plan to continue editing the block that represents it in +the Block Editor! File corruption is VERY likely to occur. +*/ +/* +Copyright (C) 1991-2003 Altera Corporation +Any megafunction design, and related netlist (encrypted or decrypted), +support information, device programming or simulation file, and any other +associated documentation or information provided by Altera or a partner +under Altera's Megafunction Partnership Program may be used only +to program PLD devices (but not masked PLD devices) from Altera. Any +other use of such megafunction design, netlist, support information, +device programming or simulation file, or any other related documentation +or information is prohibited for any other purpose, including, but not +limited to modification, reverse engineering, de-compiling, or use with +any other silicon devices, unless such use is explicitly licensed under +a separate agreement with Altera or a megafunction partner. Title to the +intellectual property, including patents, copyrights, trademarks, trade +secrets, or maskworks, embodied in any such megafunction design, netlist, +support information, device programming or simulation file, or any other +related documentation or information provided by Altera or a megafunction +partner, remains with Altera, the megafunction partner, or their respective +licensors. No other licenses, including any licenses needed under any third +party's intellectual property, are provided herein. +*/ +(header "symbol" (version "1.1")) +(symbol + (rect 0 0 160 144) + (text "addsub16" (rect 45 2 128 21)(font "Arial" (font_size 10))) + (text "inst" (rect 8 125 31 140)(font "Arial" )) + (port + (pt 0 56) + (input) + (text "dataa[15..0]" (rect 0 0 81 16)(font "Arial" (font_size 8))) + (text "dataa[15..0]" (rect 4 40 73 56)(font "Arial" (font_size 8))) + (line (pt 0 56)(pt 64 56)(line_width 3)) + ) + (port + (pt 0 88) + (input) + (text "datab[15..0]" (rect 0 0 81 16)(font "Arial" (font_size 8))) + (text "datab[15..0]" (rect 4 72 73 88)(font "Arial" (font_size 8))) + (line (pt 0 88)(pt 64 88)(line_width 3)) + ) + (port + (pt 0 72) + (input) + (text "clock" (rect 0 0 36 16)(font "Arial" (font_size 8))) + (text "clock" (rect 4 56 35 72)(font "Arial" (font_size 8))) + (line (pt 0 72)(pt 64 72)(line_width 1)) + ) + (port + (pt 0 32) + (input) + (text "add_sub" (rect 0 0 57 16)(font "Arial" (font_size 8))) + (text "add_sub" (rect 4 16 53 32)(font "Arial" (font_size 8))) + (line (pt 0 32)(pt 80 32)(line_width 1)) + ) + (port + (pt 0 112) + (input) + (text "clken" (rect 0 0 36 16)(font "Arial" (font_size 8))) + (text "clken" (rect 4 96 35 112)(font "Arial" (font_size 8))) + (line (pt 0 112)(pt 74 112)(line_width 1)) + ) + (port + (pt 0 128) + (input) + (text "aclr" (rect 0 0 24 16)(font "Arial" (font_size 8))) + (text "aclr" (rect 4 112 25 128)(font "Arial" (font_size 8))) + (line (pt 0 128)(pt 85 128)(line_width 1)) + ) + (port + (pt 160 72) + (output) + (text "result[15..0]" (rect 0 0 81 16)(font "Arial" (font_size 8))) + (text "result[15..0]" (rect 88 56 157 72)(font "Arial" (font_size 8))) + (line (pt 160 72)(pt 96 72)(line_width 3)) + ) + (drawing + (text "A" (rect 66 48 75 64)(font "Arial" (font_size 8))) + (text "B" (rect 66 80 75 96)(font "Arial" (font_size 8))) + (text "A+B/A-B" (rect 82 37 134 53)(font "Arial" (font_size 8))) + (line (pt 64 48)(pt 96 56)(line_width 1)) + (line (pt 96 56)(pt 96 88)(line_width 1)) + (line (pt 96 88)(pt 64 96)(line_width 1)) + (line (pt 64 96)(pt 64 48)(line_width 1)) + (line (pt 80 32)(pt 80 52)(line_width 1)) + (line (pt 106 40)(pt 125 40)(line_width 1)) + (line (pt 74 112)(pt 74 93)(line_width 1)) + (line (pt 85 128)(pt 85 90)(line_width 1)) + (line (pt 64 66)(pt 70 72)(line_width 1)) + (line (pt 70 72)(pt 64 78)(line_width 1)) + ) +) diff --git a/fpga/megacells/addsub16.cmp b/fpga/megacells/addsub16.cmp new file mode 100755 index 0000000..e32e01b --- /dev/null +++ b/fpga/megacells/addsub16.cmp @@ -0,0 +1,33 @@ +--Copyright (C) 1991-2003 Altera Corporation +--Any megafunction design, and related netlist (encrypted or decrypted), +--support information, device programming or simulation file, and any other +--associated documentation or information provided by Altera or a partner +--under Altera's Megafunction Partnership Program may be used only +--to program PLD devices (but not masked PLD devices) from Altera. Any +--other use of such megafunction design, netlist, support information, +--device programming or simulation file, or any other related documentation +--or information is prohibited for any other purpose, including, but not +--limited to modification, reverse engineering, de-compiling, or use with +--any other silicon devices, unless such use is explicitly licensed under +--a separate agreement with Altera or a megafunction partner. Title to the +--intellectual property, including patents, copyrights, trademarks, trade +--secrets, or maskworks, embodied in any such megafunction design, netlist, +--support information, device programming or simulation file, or any other +--related documentation or information provided by Altera or a megafunction +--partner, remains with Altera, the megafunction partner, or their respective +--licensors. No other licenses, including any licenses needed under any third +--party's intellectual property, are provided herein. + + +component addsub16 + PORT + ( + add_sub : IN STD_LOGIC ; + dataa : IN STD_LOGIC_VECTOR (15 DOWNTO 0); + datab : IN STD_LOGIC_VECTOR (15 DOWNTO 0); + clock : IN STD_LOGIC ; + aclr : IN STD_LOGIC ; + clken : IN STD_LOGIC ; + result : OUT STD_LOGIC_VECTOR (15 DOWNTO 0) + ); +end component; diff --git a/fpga/megacells/addsub16.inc b/fpga/megacells/addsub16.inc new file mode 100755 index 0000000..846f301 --- /dev/null +++ b/fpga/megacells/addsub16.inc @@ -0,0 +1,34 @@ +--Copyright (C) 1991-2003 Altera Corporation +--Any megafunction design, and related netlist (encrypted or decrypted), +--support information, device programming or simulation file, and any other +--associated documentation or information provided by Altera or a partner +--under Altera's Megafunction Partnership Program may be used only +--to program PLD devices (but not masked PLD devices) from Altera. Any +--other use of such megafunction design, netlist, support information, +--device programming or simulation file, or any other related documentation +--or information is prohibited for any other purpose, including, but not +--limited to modification, reverse engineering, de-compiling, or use with +--any other silicon devices, unless such use is explicitly licensed under +--a separate agreement with Altera or a megafunction partner. Title to the +--intellectual property, including patents, copyrights, trademarks, trade +--secrets, or maskworks, embodied in any such megafunction design, netlist, +--support information, device programming or simulation file, or any other +--related documentation or information provided by Altera or a megafunction +--partner, remains with Altera, the megafunction partner, or their respective +--licensors. No other licenses, including any licenses needed under any third +--party's intellectual property, are provided herein. + + +FUNCTION addsub16 +( + add_sub, + dataa[15..0], + datab[15..0], + clock, + aclr, + clken +) + +RETURNS ( + result[15..0] +); diff --git a/fpga/megacells/addsub16.v b/fpga/megacells/addsub16.v new file mode 100755 index 0000000..431af3e --- /dev/null +++ b/fpga/megacells/addsub16.v @@ -0,0 +1,438 @@ +// megafunction wizard: %LPM_ADD_SUB%CBX% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: lpm_add_sub + +// ============================================================ +// File Name: addsub16.v +// Megafunction Name(s): +// lpm_add_sub +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// ************************************************************ + + +//Copyright (C) 1991-2003 Altera Corporation +//Any megafunction design, and related netlist (encrypted or decrypted), +//support information, device programming or simulation file, and any other +//associated documentation or information provided by Altera or a partner +//under Altera's Megafunction Partnership Program may be used only +//to program PLD devices (but not masked PLD devices) from Altera. Any +//other use of such megafunction design, netlist, support information, +//device programming or simulation file, or any other related documentation +//or information is prohibited for any other purpose, including, but not +//limited to modification, reverse engineering, de-compiling, or use with +//any other silicon devices, unless such use is explicitly licensed under +//a separate agreement with Altera or a megafunction partner. Title to the +//intellectual property, including patents, copyrights, trademarks, trade +//secrets, or maskworks, embodied in any such megafunction design, netlist, +//support information, device programming or simulation file, or any other +//related documentation or information provided by Altera or a megafunction +//partner, remains with Altera, the megafunction partner, or their respective +//licensors. No other licenses, including any licenses needed under any third +//party's intellectual property, are provided herein. + + +//lpm_add_sub DEVICE_FAMILY=Cyclone LPM_PIPELINE=1 LPM_WIDTH=16 aclr add_sub clken clock dataa datab result +//VERSION_BEGIN 3.0 cbx_lpm_add_sub 2003:04:10:18:28:42:SJ cbx_mgl 2003:06:11:11:00:44:SJ cbx_stratix 2003:05:16:10:26:50:SJ VERSION_END + +//synthesis_resources = lut 17 +module addsub16_add_sub_gp9 + ( + aclr, + add_sub, + clken, + clock, + dataa, + datab, + result) /* synthesis synthesis_clearbox=1 */; + input aclr; + input add_sub; + input clken; + input clock; + input [15:0] dataa; + input [15:0] datab; + output [15:0] result; + + wire [0:0] wire_add_sub_cella_0cout; + wire [0:0] wire_add_sub_cella_1cout; + wire [0:0] wire_add_sub_cella_2cout; + wire [0:0] wire_add_sub_cella_3cout; + wire [0:0] wire_add_sub_cella_4cout; + wire [0:0] wire_add_sub_cella_5cout; + wire [0:0] wire_add_sub_cella_6cout; + wire [0:0] wire_add_sub_cella_7cout; + wire [0:0] wire_add_sub_cella_8cout; + wire [0:0] wire_add_sub_cella_9cout; + wire [0:0] wire_add_sub_cella_10cout; + wire [0:0] wire_add_sub_cella_11cout; + wire [0:0] wire_add_sub_cella_12cout; + wire [0:0] wire_add_sub_cella_13cout; + wire [0:0] wire_add_sub_cella_14cout; + wire [15:0] wire_add_sub_cella_dataa; + wire [15:0] wire_add_sub_cella_datab; + wire [15:0] wire_add_sub_cella_regout; + wire wire_strx_lcell1_cout; + + stratix_lcell add_sub_cella_0 + ( + .aclr(aclr), + .cin(wire_strx_lcell1_cout), + .clk(clock), + .cout(wire_add_sub_cella_0cout[0:0]), + .dataa(wire_add_sub_cella_dataa[0:0]), + .datab(wire_add_sub_cella_datab[0:0]), + .ena(clken), + .inverta((~ add_sub)), + .regout(wire_add_sub_cella_regout[0:0])); + defparam + add_sub_cella_0.cin_used = "true", + add_sub_cella_0.lut_mask = "96e8", + add_sub_cella_0.operation_mode = "arithmetic", + add_sub_cella_0.sum_lutc_input = "cin", + add_sub_cella_0.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_1 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_0cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_1cout[0:0]), + .dataa(wire_add_sub_cella_dataa[1:1]), + .datab(wire_add_sub_cella_datab[1:1]), + .ena(clken), + .inverta((~ add_sub)), + .regout(wire_add_sub_cella_regout[1:1])); + defparam + add_sub_cella_1.cin_used = "true", + add_sub_cella_1.lut_mask = "96e8", + add_sub_cella_1.operation_mode = "arithmetic", + add_sub_cella_1.sum_lutc_input = "cin", + add_sub_cella_1.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_2 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_1cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_2cout[0:0]), + .dataa(wire_add_sub_cella_dataa[2:2]), + .datab(wire_add_sub_cella_datab[2:2]), + .ena(clken), + .inverta((~ add_sub)), + .regout(wire_add_sub_cella_regout[2:2])); + defparam + add_sub_cella_2.cin_used = "true", + add_sub_cella_2.lut_mask = "96e8", + add_sub_cella_2.operation_mode = "arithmetic", + add_sub_cella_2.sum_lutc_input = "cin", + add_sub_cella_2.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_3 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_2cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_3cout[0:0]), + .dataa(wire_add_sub_cella_dataa[3:3]), + .datab(wire_add_sub_cella_datab[3:3]), + .ena(clken), + .inverta((~ add_sub)), + .regout(wire_add_sub_cella_regout[3:3])); + defparam + add_sub_cella_3.cin_used = "true", + add_sub_cella_3.lut_mask = "96e8", + add_sub_cella_3.operation_mode = "arithmetic", + add_sub_cella_3.sum_lutc_input = "cin", + add_sub_cella_3.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_4 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_3cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_4cout[0:0]), + .dataa(wire_add_sub_cella_dataa[4:4]), + .datab(wire_add_sub_cella_datab[4:4]), + .ena(clken), + .inverta((~ add_sub)), + .regout(wire_add_sub_cella_regout[4:4])); + defparam + add_sub_cella_4.cin_used = "true", + add_sub_cella_4.lut_mask = "96e8", + add_sub_cella_4.operation_mode = "arithmetic", + add_sub_cella_4.sum_lutc_input = "cin", + add_sub_cella_4.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_5 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_4cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_5cout[0:0]), + .dataa(wire_add_sub_cella_dataa[5:5]), + .datab(wire_add_sub_cella_datab[5:5]), + .ena(clken), + .inverta((~ add_sub)), + .regout(wire_add_sub_cella_regout[5:5])); + defparam + add_sub_cella_5.cin_used = "true", + add_sub_cella_5.lut_mask = "96e8", + add_sub_cella_5.operation_mode = "arithmetic", + add_sub_cella_5.sum_lutc_input = "cin", + add_sub_cella_5.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_6 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_5cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_6cout[0:0]), + .dataa(wire_add_sub_cella_dataa[6:6]), + .datab(wire_add_sub_cella_datab[6:6]), + .ena(clken), + .inverta((~ add_sub)), + .regout(wire_add_sub_cella_regout[6:6])); + defparam + add_sub_cella_6.cin_used = "true", + add_sub_cella_6.lut_mask = "96e8", + add_sub_cella_6.operation_mode = "arithmetic", + add_sub_cella_6.sum_lutc_input = "cin", + add_sub_cella_6.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_7 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_6cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_7cout[0:0]), + .dataa(wire_add_sub_cella_dataa[7:7]), + .datab(wire_add_sub_cella_datab[7:7]), + .ena(clken), + .inverta((~ add_sub)), + .regout(wire_add_sub_cella_regout[7:7])); + defparam + add_sub_cella_7.cin_used = "true", + add_sub_cella_7.lut_mask = "96e8", + add_sub_cella_7.operation_mode = "arithmetic", + add_sub_cella_7.sum_lutc_input = "cin", + add_sub_cella_7.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_8 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_7cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_8cout[0:0]), + .dataa(wire_add_sub_cella_dataa[8:8]), + .datab(wire_add_sub_cella_datab[8:8]), + .ena(clken), + .inverta((~ add_sub)), + .regout(wire_add_sub_cella_regout[8:8])); + defparam + add_sub_cella_8.cin_used = "true", + add_sub_cella_8.lut_mask = "96e8", + add_sub_cella_8.operation_mode = "arithmetic", + add_sub_cella_8.sum_lutc_input = "cin", + add_sub_cella_8.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_9 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_8cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_9cout[0:0]), + .dataa(wire_add_sub_cella_dataa[9:9]), + .datab(wire_add_sub_cella_datab[9:9]), + .ena(clken), + .inverta((~ add_sub)), + .regout(wire_add_sub_cella_regout[9:9])); + defparam + add_sub_cella_9.cin_used = "true", + add_sub_cella_9.lut_mask = "96e8", + add_sub_cella_9.operation_mode = "arithmetic", + add_sub_cella_9.sum_lutc_input = "cin", + add_sub_cella_9.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_10 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_9cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_10cout[0:0]), + .dataa(wire_add_sub_cella_dataa[10:10]), + .datab(wire_add_sub_cella_datab[10:10]), + .ena(clken), + .inverta((~ add_sub)), + .regout(wire_add_sub_cella_regout[10:10])); + defparam + add_sub_cella_10.cin_used = "true", + add_sub_cella_10.lut_mask = "96e8", + add_sub_cella_10.operation_mode = "arithmetic", + add_sub_cella_10.sum_lutc_input = "cin", + add_sub_cella_10.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_11 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_10cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_11cout[0:0]), + .dataa(wire_add_sub_cella_dataa[11:11]), + .datab(wire_add_sub_cella_datab[11:11]), + .ena(clken), + .inverta((~ add_sub)), + .regout(wire_add_sub_cella_regout[11:11])); + defparam + add_sub_cella_11.cin_used = "true", + add_sub_cella_11.lut_mask = "96e8", + add_sub_cella_11.operation_mode = "arithmetic", + add_sub_cella_11.sum_lutc_input = "cin", + add_sub_cella_11.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_12 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_11cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_12cout[0:0]), + .dataa(wire_add_sub_cella_dataa[12:12]), + .datab(wire_add_sub_cella_datab[12:12]), + .ena(clken), + .inverta((~ add_sub)), + .regout(wire_add_sub_cella_regout[12:12])); + defparam + add_sub_cella_12.cin_used = "true", + add_sub_cella_12.lut_mask = "96e8", + add_sub_cella_12.operation_mode = "arithmetic", + add_sub_cella_12.sum_lutc_input = "cin", + add_sub_cella_12.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_13 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_12cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_13cout[0:0]), + .dataa(wire_add_sub_cella_dataa[13:13]), + .datab(wire_add_sub_cella_datab[13:13]), + .ena(clken), + .inverta((~ add_sub)), + .regout(wire_add_sub_cella_regout[13:13])); + defparam + add_sub_cella_13.cin_used = "true", + add_sub_cella_13.lut_mask = "96e8", + add_sub_cella_13.operation_mode = "arithmetic", + add_sub_cella_13.sum_lutc_input = "cin", + add_sub_cella_13.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_14 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_13cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_14cout[0:0]), + .dataa(wire_add_sub_cella_dataa[14:14]), + .datab(wire_add_sub_cella_datab[14:14]), + .ena(clken), + .inverta((~ add_sub)), + .regout(wire_add_sub_cella_regout[14:14])); + defparam + add_sub_cella_14.cin_used = "true", + add_sub_cella_14.lut_mask = "96e8", + add_sub_cella_14.operation_mode = "arithmetic", + add_sub_cella_14.sum_lutc_input = "cin", + add_sub_cella_14.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_15 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_14cout[0:0]), + .clk(clock), + .dataa(wire_add_sub_cella_dataa[15:15]), + .datab(wire_add_sub_cella_datab[15:15]), + .ena(clken), + .inverta((~ add_sub)), + .regout(wire_add_sub_cella_regout[15:15])); + defparam + add_sub_cella_15.cin_used = "true", + add_sub_cella_15.lut_mask = "9696", + add_sub_cella_15.operation_mode = "normal", + add_sub_cella_15.sum_lutc_input = "cin", + add_sub_cella_15.lpm_type = "stratix_lcell"; + assign + wire_add_sub_cella_dataa = datab, + wire_add_sub_cella_datab = dataa; + stratix_lcell strx_lcell1 + ( + .cout(wire_strx_lcell1_cout), + .dataa(1'b0), + .datab((~ add_sub)), + .inverta((~ add_sub))); + defparam + strx_lcell1.cin_used = "false", + strx_lcell1.lut_mask = "00cc", + strx_lcell1.operation_mode = "arithmetic", + strx_lcell1.lpm_type = "stratix_lcell"; + assign + result = wire_add_sub_cella_regout; +endmodule //addsub16_add_sub_gp9 +//VALID FILE + + +module addsub16 ( + add_sub, + dataa, + datab, + clock, + aclr, + clken, + result)/* synthesis synthesis_clearbox = 1 */; + + input add_sub; + input [15:0] dataa; + input [15:0] datab; + input clock; + input aclr; + input clken; + output [15:0] result; + + wire [15:0] sub_wire0; + wire [15:0] result = sub_wire0[15:0]; + + addsub16_add_sub_gp9 addsub16_add_sub_gp9_component ( + .dataa (dataa), + .add_sub (add_sub), + .datab (datab), + .clken (clken), + .aclr (aclr), + .clock (clock), + .result (sub_wire0)); + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: nBit NUMERIC "16" +// Retrieval info: PRIVATE: Function NUMERIC "2" +// Retrieval info: PRIVATE: WhichConstant NUMERIC "0" +// Retrieval info: PRIVATE: ConstantA NUMERIC "0" +// Retrieval info: PRIVATE: ConstantB NUMERIC "0" +// Retrieval info: PRIVATE: ValidCtA NUMERIC "0" +// Retrieval info: PRIVATE: ValidCtB NUMERIC "0" +// Retrieval info: PRIVATE: CarryIn NUMERIC "0" +// Retrieval info: PRIVATE: CarryOut NUMERIC "0" +// Retrieval info: PRIVATE: Overflow NUMERIC "0" +// Retrieval info: PRIVATE: Latency NUMERIC "1" +// Retrieval info: PRIVATE: aclr NUMERIC "1" +// Retrieval info: PRIVATE: clken NUMERIC "1" +// Retrieval info: PRIVATE: LPM_PIPELINE NUMERIC "1" +// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "16" +// Retrieval info: CONSTANT: LPM_DIRECTION STRING "UNUSED" +// Retrieval info: CONSTANT: LPM_TYPE STRING "LPM_ADD_SUB" +// Retrieval info: CONSTANT: LPM_HINT STRING "ONE_INPUT_IS_CONSTANT=NO" +// Retrieval info: CONSTANT: LPM_PIPELINE NUMERIC "1" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: USED_PORT: add_sub 0 0 0 0 INPUT NODEFVAL add_sub +// Retrieval info: USED_PORT: result 0 0 16 0 OUTPUT NODEFVAL result[15..0] +// Retrieval info: USED_PORT: dataa 0 0 16 0 INPUT NODEFVAL dataa[15..0] +// Retrieval info: USED_PORT: datab 0 0 16 0 INPUT NODEFVAL datab[15..0] +// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL clock +// Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT NODEFVAL aclr +// Retrieval info: USED_PORT: clken 0 0 0 0 INPUT NODEFVAL clken +// Retrieval info: CONNECT: @add_sub 0 0 0 0 add_sub 0 0 0 0 +// Retrieval info: CONNECT: result 0 0 16 0 @result 0 0 16 0 +// Retrieval info: CONNECT: @dataa 0 0 16 0 dataa 0 0 16 0 +// Retrieval info: CONNECT: @datab 0 0 16 0 datab 0 0 16 0 +// Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0 +// Retrieval info: CONNECT: @aclr 0 0 0 0 aclr 0 0 0 0 +// Retrieval info: CONNECT: @clken 0 0 0 0 clken 0 0 0 0 +// Retrieval info: LIBRARY: lpm lpm.lpm_components.all diff --git a/fpga/megacells/addsub16_bb.v b/fpga/megacells/addsub16_bb.v new file mode 100755 index 0000000..8e1e7c6 --- /dev/null +++ b/fpga/megacells/addsub16_bb.v @@ -0,0 +1,39 @@ +//Copyright (C) 1991-2003 Altera Corporation +//Any megafunction design, and related netlist (encrypted or decrypted), +//support information, device programming or simulation file, and any other +//associated documentation or information provided by Altera or a partner +//under Altera's Megafunction Partnership Program may be used only +//to program PLD devices (but not masked PLD devices) from Altera. Any +//other use of such megafunction design, netlist, support information, +//device programming or simulation file, or any other related documentation +//or information is prohibited for any other purpose, including, but not +//limited to modification, reverse engineering, de-compiling, or use with +//any other silicon devices, unless such use is explicitly licensed under +//a separate agreement with Altera or a megafunction partner. Title to the +//intellectual property, including patents, copyrights, trademarks, trade +//secrets, or maskworks, embodied in any such megafunction design, netlist, +//support information, device programming or simulation file, or any other +//related documentation or information provided by Altera or a megafunction +//partner, remains with Altera, the megafunction partner, or their respective +//licensors. No other licenses, including any licenses needed under any third +//party's intellectual property, are provided herein. + +module addsub16 ( + add_sub, + dataa, + datab, + clock, + aclr, + clken, + result)/* synthesis synthesis_clearbox = 1 */; + + input add_sub; + input [15:0] dataa; + input [15:0] datab; + input clock; + input aclr; + input clken; + output [15:0] result; + +endmodule + diff --git a/fpga/megacells/addsub16_inst.v b/fpga/megacells/addsub16_inst.v new file mode 100755 index 0000000..4a81ff2 --- /dev/null +++ b/fpga/megacells/addsub16_inst.v @@ -0,0 +1,9 @@ +addsub16 addsub16_inst ( + .add_sub ( add_sub_sig ), + .dataa ( dataa_sig ), + .datab ( datab_sig ), + .clock ( clock_sig ), + .aclr ( aclr_sig ), + .clken ( clken_sig ), + .result ( result_sig ) + ); diff --git a/fpga/megacells/bustri.bsf b/fpga/megacells/bustri.bsf new file mode 100755 index 0000000..f1bc3ca --- /dev/null +++ b/fpga/megacells/bustri.bsf @@ -0,0 +1,62 @@ +/* +WARNING: Do NOT edit the input and output ports in this file in a text +editor if you plan to continue editing the block that represents it in +the Block Editor! File corruption is VERY likely to occur. +*/ +/* +Copyright (C) 1991-2003 Altera Corporation +Any megafunction design, and related netlist (encrypted or decrypted), +support information, device programming or simulation file, and any other +associated documentation or information provided by Altera or a partner +under Altera's Megafunction Partnership Program may be used only +to program PLD devices (but not masked PLD devices) from Altera. Any +other use of such megafunction design, netlist, support information, +device programming or simulation file, or any other related documentation +or information is prohibited for any other purpose, including, but not +limited to modification, reverse engineering, de-compiling, or use with +any other silicon devices, unless such use is explicitly licensed under +a separate agreement with Altera or a megafunction partner. Title to the +intellectual property, including patents, copyrights, trademarks, trade +secrets, or maskworks, embodied in any such megafunction design, netlist, +support information, device programming or simulation file, or any other +related documentation or information provided by Altera or a megafunction +partner, remains with Altera, the megafunction partner, or their respective +licensors. No other licenses, including any licenses needed under any third +party's intellectual property, are provided herein. +*/ +(header "symbol" (version "1.1")) +(symbol + (rect 0 0 80 40) + (text "bustri" (rect 24 1 61 17)(font "Arial" (font_size 10))) + (text "inst" (rect 8 24 25 36)(font "Arial" )) + (port + (pt 40 40) + (input) + (text "enabledt" (rect 0 0 48 14)(font "Arial" (font_size 8))) + (text "enabledt" (rect 40 -6 53 36)(font "Arial" (font_size 8))(invisible)) + (line (pt 40 40)(pt 40 28)(line_width 1)) + ) + (port + (pt 0 24) + (input) + (text "data[15..0]" (rect 0 0 60 14)(font "Arial" (font_size 8))) + (text "data[15..0]" (rect -3 -27 10 24)(font "Arial" (font_size 8))(invisible)) + (line (pt 0 24)(pt 32 24)(line_width 3)) + ) + (port + (pt 80 24) + (bidir) + (text "tridata[15..0]" (rect 0 0 70 14)(font "Arial" (font_size 8))) + (text "tridata[15..0]" (rect 84 -36 97 24)(font "Arial" (font_size 8))(invisible)) + (line (pt 80 24)(pt 48 24)(line_width 3)) + ) + (drawing + (text "16" (rect 61 25 71 37)(font "Arial" )) + (text "16" (rect 13 25 23 37)(font "Arial" )) + (line (pt 32 16)(pt 48 24)(line_width 1)) + (line (pt 48 24)(pt 32 32)(line_width 1)) + (line (pt 32 32)(pt 32 16)(line_width 1)) + (line (pt 56 28)(pt 64 20)(line_width 1)) + (line (pt 8 28)(pt 16 20)(line_width 1)) + ) +) diff --git a/fpga/megacells/bustri.cmp b/fpga/megacells/bustri.cmp new file mode 100755 index 0000000..87599ca --- /dev/null +++ b/fpga/megacells/bustri.cmp @@ -0,0 +1,29 @@ +--Copyright (C) 1991-2003 Altera Corporation +--Any megafunction design, and related netlist (encrypted or decrypted), +--support information, device programming or simulation file, and any other +--associated documentation or information provided by Altera or a partner +--under Altera's Megafunction Partnership Program may be used only +--to program PLD devices (but not masked PLD devices) from Altera. Any +--other use of such megafunction design, netlist, support information, +--device programming or simulation file, or any other related documentation +--or information is prohibited for any other purpose, including, but not +--limited to modification, reverse engineering, de-compiling, or use with +--any other silicon devices, unless such use is explicitly licensed under +--a separate agreement with Altera or a megafunction partner. Title to the +--intellectual property, including patents, copyrights, trademarks, trade +--secrets, or maskworks, embodied in any such megafunction design, netlist, +--support information, device programming or simulation file, or any other +--related documentation or information provided by Altera or a megafunction +--partner, remains with Altera, the megafunction partner, or their respective +--licensors. No other licenses, including any licenses needed under any third +--party's intellectual property, are provided herein. + + +component bustri + PORT + ( + data : IN STD_LOGIC_VECTOR (15 DOWNTO 0); + enabledt : IN STD_LOGIC ; + tridata : INOUT STD_LOGIC_VECTOR (15 DOWNTO 0) + ); +end component; diff --git a/fpga/megacells/bustri.inc b/fpga/megacells/bustri.inc new file mode 100755 index 0000000..3999503 --- /dev/null +++ b/fpga/megacells/bustri.inc @@ -0,0 +1,30 @@ +--Copyright (C) 1991-2003 Altera Corporation +--Any megafunction design, and related netlist (encrypted or decrypted), +--support information, device programming or simulation file, and any other +--associated documentation or information provided by Altera or a partner +--under Altera's Megafunction Partnership Program may be used only +--to program PLD devices (but not masked PLD devices) from Altera. Any +--other use of such megafunction design, netlist, support information, +--device programming or simulation file, or any other related documentation +--or information is prohibited for any other purpose, including, but not +--limited to modification, reverse engineering, de-compiling, or use with +--any other silicon devices, unless such use is explicitly licensed under +--a separate agreement with Altera or a megafunction partner. Title to the +--intellectual property, including patents, copyrights, trademarks, trade +--secrets, or maskworks, embodied in any such megafunction design, netlist, +--support information, device programming or simulation file, or any other +--related documentation or information provided by Altera or a megafunction +--partner, remains with Altera, the megafunction partner, or their respective +--licensors. No other licenses, including any licenses needed under any third +--party's intellectual property, are provided herein. + + +FUNCTION bustri +( + data[15..0], + enabledt +) + +RETURNS ( + tridata[15..0] +); diff --git a/fpga/megacells/bustri.v b/fpga/megacells/bustri.v new file mode 100755 index 0000000..e40c694 --- /dev/null +++ b/fpga/megacells/bustri.v @@ -0,0 +1,71 @@ +// megafunction wizard: %LPM_BUSTRI% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: lpm_bustri + +// ============================================================ +// File Name: bustri.v +// Megafunction Name(s): +// lpm_bustri +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// ************************************************************ + + +//Copyright (C) 1991-2003 Altera Corporation +//Any megafunction design, and related netlist (encrypted or decrypted), +//support information, device programming or simulation file, and any other +//associated documentation or information provided by Altera or a partner +//under Altera's Megafunction Partnership Program may be used only +//to program PLD devices (but not masked PLD devices) from Altera. Any +//other use of such megafunction design, netlist, support information, +//device programming or simulation file, or any other related documentation +//or information is prohibited for any other purpose, including, but not +//limited to modification, reverse engineering, de-compiling, or use with +//any other silicon devices, unless such use is explicitly licensed under +//a separate agreement with Altera or a megafunction partner. Title to the +//intellectual property, including patents, copyrights, trademarks, trade +//secrets, or maskworks, embodied in any such megafunction design, netlist, +//support information, device programming or simulation file, or any other +//related documentation or information provided by Altera or a megafunction +//partner, remains with Altera, the megafunction partner, or their respective +//licensors. No other licenses, including any licenses needed under any third +//party's intellectual property, are provided herein. + + +module bustri ( + data, + enabledt, + tridata); + + input [15:0] data; + input enabledt; + inout [15:0] tridata; + + + lpm_bustri lpm_bustri_component ( + .tridata (tridata), + .enabledt (enabledt), + .data (data)); + defparam + lpm_bustri_component.lpm_width = 16, + lpm_bustri_component.lpm_type = "LPM_BUSTRI"; + + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: nBit NUMERIC "16" +// Retrieval info: PRIVATE: BiDir NUMERIC "0" +// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "16" +// Retrieval info: CONSTANT: LPM_TYPE STRING "LPM_BUSTRI" +// Retrieval info: USED_PORT: tridata 0 0 16 0 BIDIR NODEFVAL tridata[15..0] +// Retrieval info: USED_PORT: data 0 0 16 0 INPUT NODEFVAL data[15..0] +// Retrieval info: USED_PORT: enabledt 0 0 0 0 INPUT NODEFVAL enabledt +// Retrieval info: CONNECT: tridata 0 0 16 0 @tridata 0 0 16 0 +// Retrieval info: CONNECT: @data 0 0 16 0 data 0 0 16 0 +// Retrieval info: CONNECT: @enabledt 0 0 0 0 enabledt 0 0 0 0 +// Retrieval info: LIBRARY: lpm lpm.lpm_components.all diff --git a/fpga/megacells/bustri_bb.v b/fpga/megacells/bustri_bb.v new file mode 100755 index 0000000..4cbc160 --- /dev/null +++ b/fpga/megacells/bustri_bb.v @@ -0,0 +1,31 @@ +//Copyright (C) 1991-2003 Altera Corporation +//Any megafunction design, and related netlist (encrypted or decrypted), +//support information, device programming or simulation file, and any other +//associated documentation or information provided by Altera or a partner +//under Altera's Megafunction Partnership Program may be used only +//to program PLD devices (but not masked PLD devices) from Altera. Any +//other use of such megafunction design, netlist, support information, +//device programming or simulation file, or any other related documentation +//or information is prohibited for any other purpose, including, but not +//limited to modification, reverse engineering, de-compiling, or use with +//any other silicon devices, unless such use is explicitly licensed under +//a separate agreement with Altera or a megafunction partner. Title to the +//intellectual property, including patents, copyrights, trademarks, trade +//secrets, or maskworks, embodied in any such megafunction design, netlist, +//support information, device programming or simulation file, or any other +//related documentation or information provided by Altera or a megafunction +//partner, remains with Altera, the megafunction partner, or their respective +//licensors. No other licenses, including any licenses needed under any third +//party's intellectual property, are provided herein. + +module bustri ( + data, + enabledt, + tridata); + + input [15:0] data; + input enabledt; + inout [15:0] tridata; + +endmodule + diff --git a/fpga/megacells/bustri_inst.v b/fpga/megacells/bustri_inst.v new file mode 100755 index 0000000..2b4e496 --- /dev/null +++ b/fpga/megacells/bustri_inst.v @@ -0,0 +1,5 @@ +bustri bustri_inst ( + .data ( data_sig ), + .enabledt ( enabledt_sig ), + .tridata ( tridata_sig ) + ); diff --git a/fpga/megacells/clk_doubler.v b/fpga/megacells/clk_doubler.v new file mode 100644 index 0000000..b3762a9 --- /dev/null +++ b/fpga/megacells/clk_doubler.v @@ -0,0 +1,198 @@ +// megafunction wizard: %ALTPLL% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: altpll + +// ============================================================ +// File Name: clk_doubler.v +// Megafunction Name(s): +// altpll +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// +// 4.2 Build 156 11/29/2004 SJ Web Edition +// ************************************************************ + + +//Copyright (C) 1991-2004 Altera Corporation +//Any megafunction design, and related netlist (encrypted or decrypted), +//support information, device programming or simulation file, and any other +//associated documentation or information provided by Altera or a partner +//under Altera's Megafunction Partnership Program may be used only +//to program PLD devices (but not masked PLD devices) from Altera. Any +//other use of such megafunction design, netlist, support information, +//device programming or simulation file, or any other related documentation +//or information is prohibited for any other purpose, including, but not +//limited to modification, reverse engineering, de-compiling, or use with +//any other silicon devices, unless such use is explicitly licensed under +//a separate agreement with Altera or a megafunction partner. Title to the +//intellectual property, including patents, copyrights, trademarks, trade +//secrets, or maskworks, embodied in any such megafunction design, netlist, +//support information, device programming or simulation file, or any other +//related documentation or information provided by Altera or a megafunction +//partner, remains with Altera, the megafunction partner, or their respective +//licensors. No other licenses, including any licenses needed under any third +//party's intellectual property, are provided herein. + + +// synopsys translate_off +`timescale 1 ps / 1 ps +// synopsys translate_on +module clk_doubler ( + inclk0, + c0); + + input inclk0; + output c0; + + wire [5:0] sub_wire0; + wire [0:0] sub_wire4 = 1'h0; + wire [0:0] sub_wire1 = sub_wire0[0:0]; + wire c0 = sub_wire1; + wire sub_wire2 = inclk0; + wire [1:0] sub_wire3 = {sub_wire4, sub_wire2}; + + altpll altpll_component ( + .inclk (sub_wire3), + .clk (sub_wire0) + // synopsys translate_off + , + .activeclock (), + .areset (), + .clkbad (), + .clkena (), + .clkloss (), + .clkswitch (), + .enable0 (), + .enable1 (), + .extclk (), + .extclkena (), + .fbin (), + .locked (), + .pfdena (), + .pllena (), + .scanaclr (), + .scanclk (), + .scandata (), + .scandataout (), + .scandone (), + .scanread (), + .scanwrite (), + .sclkout0 (), + .sclkout1 () + // synopsys translate_on + ); + defparam + altpll_component.clk0_duty_cycle = 50, + altpll_component.lpm_type = "altpll", + altpll_component.clk0_multiply_by = 2, + altpll_component.inclk0_input_frequency = 15625, + altpll_component.clk0_divide_by = 1, + altpll_component.pll_type = "AUTO", + altpll_component.intended_device_family = "Cyclone", + altpll_component.operation_mode = "NORMAL", + altpll_component.compensate_clock = "CLK0", + altpll_component.clk0_phase_shift = "0"; + + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0" +// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg" +// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz" +// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz" +// Retrieval info: PRIVATE: SPREAD_USE STRING "0" +// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1" +// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575" +// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0" +// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000" +// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000" +// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "2" +// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0" +// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500" +// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0" +// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0" +// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1" +// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000" +// Retrieval info: PRIVATE: BANDWIDTH_USE_CUSTOM STRING "0" +// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8" +// Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000" +// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1" +// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0" +// Retrieval info: PRIVATE: USE_CLK0 STRING "1" +// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1" +// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0" +// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0" +// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0" +// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000" +// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0" +// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0" +// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz" +// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz" +// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0" +// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1" +// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "e0" +// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1" +// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1" +// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1" +// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0" +// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1" +// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0" +// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1" +// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0" +// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "512.000" +// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0" +// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz" +// Retrieval info: PRIVATE: PLL_ENA_CHECK STRING "0" +// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "64.000" +// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0" +// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1" +// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "100.000" +// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0" +// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0" +// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0" +// Retrieval info: PRIVATE: DEV_FAMILY STRING "Cyclone" +// Retrieval info: PRIVATE: LOCK_LOSS_SWITCHOVER_CHECK STRING "0" +// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1" +// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low" +// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: USE_CLKENA0 STRING "0" +// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg" +// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0" +// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0" +// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: DEVICE_FAMILY NUMERIC "11" +// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all +// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50" +// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll" +// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "2" +// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "15625" +// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "1" +// Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL" +// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0" +// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0" +// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT VCC "c0" +// Retrieval info: USED_PORT: @clk 0 0 6 0 OUTPUT VCC "@clk[5..0]" +// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT GND "inclk0" +// Retrieval info: USED_PORT: @extclk 0 0 4 0 OUTPUT VCC "@extclk[3..0]" +// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0 +// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0 +// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0 +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_doubler.v TRUE FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_doubler.inc FALSE FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_doubler.cmp FALSE FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_doubler.bsf FALSE FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_doubler_inst.v FALSE FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_doubler_bb.v TRUE FALSE diff --git a/fpga/megacells/clk_doubler_bb.v b/fpga/megacells/clk_doubler_bb.v new file mode 100644 index 0000000..48c52e7 --- /dev/null +++ b/fpga/megacells/clk_doubler_bb.v @@ -0,0 +1,143 @@ +// megafunction wizard: %ALTPLL%VBB% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: altpll + +// ============================================================ +// File Name: clk_doubler.v +// Megafunction Name(s): +// altpll +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// +// 4.2 Build 156 11/29/2004 SJ Web Edition +// ************************************************************ + +//Copyright (C) 1991-2004 Altera Corporation +//Any megafunction design, and related netlist (encrypted or decrypted), +//support information, device programming or simulation file, and any other +//associated documentation or information provided by Altera or a partner +//under Altera's Megafunction Partnership Program may be used only +//to program PLD devices (but not masked PLD devices) from Altera. Any +//other use of such megafunction design, netlist, support information, +//device programming or simulation file, or any other related documentation +//or information is prohibited for any other purpose, including, but not +//limited to modification, reverse engineering, de-compiling, or use with +//any other silicon devices, unless such use is explicitly licensed under +//a separate agreement with Altera or a megafunction partner. Title to the +//intellectual property, including patents, copyrights, trademarks, trade +//secrets, or maskworks, embodied in any such megafunction design, netlist, +//support information, device programming or simulation file, or any other +//related documentation or information provided by Altera or a megafunction +//partner, remains with Altera, the megafunction partner, or their respective +//licensors. No other licenses, including any licenses needed under any third +//party's intellectual property, are provided herein. + +module clk_doubler ( + inclk0, + c0); + + input inclk0; + output c0; + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0" +// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg" +// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz" +// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz" +// Retrieval info: PRIVATE: SPREAD_USE STRING "0" +// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1" +// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575" +// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0" +// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000" +// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000" +// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "2" +// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0" +// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500" +// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0" +// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0" +// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1" +// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000" +// Retrieval info: PRIVATE: BANDWIDTH_USE_CUSTOM STRING "0" +// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8" +// Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000" +// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1" +// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0" +// Retrieval info: PRIVATE: USE_CLK0 STRING "1" +// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1" +// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0" +// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0" +// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0" +// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000" +// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0" +// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0" +// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz" +// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz" +// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0" +// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1" +// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "e0" +// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1" +// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1" +// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1" +// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0" +// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1" +// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0" +// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1" +// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0" +// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "512.000" +// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0" +// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz" +// Retrieval info: PRIVATE: PLL_ENA_CHECK STRING "0" +// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "64.000" +// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0" +// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1" +// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "100.000" +// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0" +// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0" +// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0" +// Retrieval info: PRIVATE: DEV_FAMILY STRING "Cyclone" +// Retrieval info: PRIVATE: LOCK_LOSS_SWITCHOVER_CHECK STRING "0" +// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1" +// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low" +// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: USE_CLKENA0 STRING "0" +// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg" +// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0" +// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0" +// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: DEVICE_FAMILY NUMERIC "11" +// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all +// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50" +// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll" +// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "2" +// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "15625" +// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "1" +// Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL" +// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0" +// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0" +// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT VCC "c0" +// Retrieval info: USED_PORT: @clk 0 0 6 0 OUTPUT VCC "@clk[5..0]" +// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT GND "inclk0" +// Retrieval info: USED_PORT: @extclk 0 0 4 0 OUTPUT VCC "@extclk[3..0]" +// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0 +// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0 +// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0 +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_doubler.v TRUE FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_doubler.inc FALSE FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_doubler.cmp FALSE FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_doubler.bsf FALSE FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_doubler_inst.v FALSE FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL clk_doubler_bb.v TRUE FALSE diff --git a/fpga/megacells/dspclkpll.v b/fpga/megacells/dspclkpll.v new file mode 100644 index 0000000..81e6221 --- /dev/null +++ b/fpga/megacells/dspclkpll.v @@ -0,0 +1,237 @@ +// megafunction wizard: %ALTPLL% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: altpll + +// ============================================================ +// File Name: dspclkpll.v +// Megafunction Name(s): +// altpll +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// +// 4.0 Build 214 3/25/2004 SP 1 SJ Web Edition +// ************************************************************ + + +//Copyright (C) 1991-2004 Altera Corporation +//Any megafunction design, and related netlist (encrypted or decrypted), +//support information, device programming or simulation file, and any other +//associated documentation or information provided by Altera or a partner +//under Altera's Megafunction Partnership Program may be used only +//to program PLD devices (but not masked PLD devices) from Altera. Any +//other use of such megafunction design, netlist, support information, +//device programming or simulation file, or any other related documentation +//or information is prohibited for any other purpose, including, but not +//limited to modification, reverse engineering, de-compiling, or use with +//any other silicon devices, unless such use is explicitly licensed under +//a separate agreement with Altera or a megafunction partner. Title to the +//intellectual property, including patents, copyrights, trademarks, trade +//secrets, or maskworks, embodied in any such megafunction design, netlist, +//support information, device programming or simulation file, or any other +//related documentation or information provided by Altera or a megafunction +//partner, remains with Altera, the megafunction partner, or their respective +//licensors. No other licenses, including any licenses needed under any third +//party's intellectual property, are provided herein. + + +// synopsys translate_off +`timescale 1 ps / 1 ps +// synopsys translate_on +module dspclkpll ( + inclk0, + c0, + c1); + + input inclk0; + output c0; + output c1; + + wire [5:0] sub_wire0; + wire [0:0] sub_wire5 = 1'h0; + wire [1:1] sub_wire2 = sub_wire0[1:1]; + wire [0:0] sub_wire1 = sub_wire0[0:0]; + wire c0 = sub_wire1; + wire c1 = sub_wire2; + wire sub_wire3 = inclk0; + wire [1:0] sub_wire4 = {sub_wire5, sub_wire3}; + + altpll altpll_component ( + .inclk (sub_wire4), + .clk (sub_wire0) + // synopsys translate_off +, + .fbin (), + .pllena (), + .clkswitch (), + .areset (), + .pfdena (), + .clkena (), + .extclkena (), + .scanclk (), + .scanaclr (), + .scandata (), + .scanread (), + .scanwrite (), + .extclk (), + .clkbad (), + .activeclock (), + .locked (), + .clkloss (), + .scandataout (), + .scandone (), + .sclkout1 (), + .sclkout0 (), + .enable0 (), + .enable1 () + // synopsys translate_on + +); + defparam + altpll_component.clk1_divide_by = 1, + altpll_component.clk1_phase_shift = "0", + altpll_component.clk0_duty_cycle = 50, + altpll_component.lpm_type = "altpll", + altpll_component.clk0_multiply_by = 1, + altpll_component.inclk0_input_frequency = 15625, + altpll_component.clk0_divide_by = 1, + altpll_component.clk1_duty_cycle = 50, + altpll_component.pll_type = "AUTO", + altpll_component.clk1_multiply_by = 2, + altpll_component.clk0_time_delay = "0", + altpll_component.intended_device_family = "Cyclone", + altpll_component.operation_mode = "NORMAL", + altpll_component.compensate_clock = "CLK0", + altpll_component.clk1_time_delay = "0", + altpll_component.clk0_phase_shift = "0"; + + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0" +// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg" +// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz" +// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz" +// Retrieval info: PRIVATE: SPREAD_USE STRING "0" +// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1" +// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575" +// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0" +// Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0" +// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "deg" +// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz" +// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000" +// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000" +// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1" +// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0" +// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500" +// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0" +// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0" +// Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000" +// Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "0.00000000" +// Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "2" +// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "0" +// Retrieval info: PRIVATE: TIME_SHIFT0 STRING "0.00000000" +// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1" +// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000" +// Retrieval info: PRIVATE: BANDWIDTH_USE_CUSTOM STRING "0" +// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8" +// Retrieval info: PRIVATE: TIME_SHIFT1 STRING "0.00000000" +// Retrieval info: PRIVATE: STICKY_CLK1 STRING "1" +// Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000" +// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1" +// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0" +// Retrieval info: PRIVATE: USE_CLK0 STRING "1" +// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1" +// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0" +// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0" +// Retrieval info: PRIVATE: USE_CLK1 STRING "1" +// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0" +// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000" +// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0" +// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0" +// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz" +// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz" +// Retrieval info: PRIVATE: MEGAFN_PORT_INFO_0 STRING "inclk;fbin;pllena;clkswitch;areset" +// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0" +// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1" +// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "e0" +// Retrieval info: PRIVATE: MEGAFN_PORT_INFO_1 STRING "pfdena;clkena;extclkena;scanclk;scanaclr" +// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1" +// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1" +// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1" +// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0" +// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1" +// Retrieval info: PRIVATE: MEGAFN_PORT_INFO_2 STRING "scandata;scanread;scanwrite;clk;extclk" +// Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "1" +// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0" +// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1" +// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0" +// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "512.000" +// Retrieval info: PRIVATE: MEGAFN_PORT_INFO_3 STRING "clkbad;activeclock;locked;clkloss;scandataout" +// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0" +// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz" +// Retrieval info: PRIVATE: PLL_ENA_CHECK STRING "0" +// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "64.000" +// Retrieval info: PRIVATE: MEGAFN_PORT_INFO_4 STRING "scandone;sclkout1;sclkout0;enable0;enable1" +// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0" +// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1" +// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "100.000" +// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0" +// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0" +// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0" +// Retrieval info: PRIVATE: DEV_FAMILY STRING "Cyclone" +// Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "100.000" +// Retrieval info: PRIVATE: LOCK_LOSS_SWITCHOVER_CHECK STRING "0" +// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1" +// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low" +// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: USE_CLKENA0 STRING "0" +// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg" +// Retrieval info: PRIVATE: USE_CLKENA1 STRING "0" +// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "deg" +// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0" +// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0" +// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: DEVICE_FAMILY NUMERIC "11" +// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all +// Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "1" +// Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0" +// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50" +// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll" +// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "1" +// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "15625" +// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "1" +// Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50" +// Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO" +// Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "2" +// Retrieval info: CONSTANT: CLK0_TIME_DELAY STRING "0" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL" +// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0" +// Retrieval info: CONSTANT: CLK1_TIME_DELAY STRING "0" +// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0" +// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT VCC "c0" +// Retrieval info: USED_PORT: @clk 0 0 6 0 OUTPUT VCC "@clk[5..0]" +// Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT VCC "c1" +// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT GND "inclk0" +// Retrieval info: USED_PORT: @extclk 0 0 4 0 OUTPUT VCC "@extclk[3..0]" +// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0 +// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0 +// Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1 +// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0 +// Retrieval info: GEN_FILE: TYPE_NORMAL dspclkpll.v TRUE FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL dspclkpll.inc FALSE FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL dspclkpll.cmp FALSE FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL dspclkpll.bsf FALSE FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL dspclkpll_inst.v FALSE FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL dspclkpll_bb.v TRUE FALSE diff --git a/fpga/megacells/dspclkpll_bb.v b/fpga/megacells/dspclkpll_bb.v new file mode 100644 index 0000000..489be7b --- /dev/null +++ b/fpga/megacells/dspclkpll_bb.v @@ -0,0 +1,31 @@ +//Copyright (C) 1991-2004 Altera Corporation +//Any megafunction design, and related netlist (encrypted or decrypted), +//support information, device programming or simulation file, and any other +//associated documentation or information provided by Altera or a partner +//under Altera's Megafunction Partnership Program may be used only +//to program PLD devices (but not masked PLD devices) from Altera. Any +//other use of such megafunction design, netlist, support information, +//device programming or simulation file, or any other related documentation +//or information is prohibited for any other purpose, including, but not +//limited to modification, reverse engineering, de-compiling, or use with +//any other silicon devices, unless such use is explicitly licensed under +//a separate agreement with Altera or a megafunction partner. Title to the +//intellectual property, including patents, copyrights, trademarks, trade +//secrets, or maskworks, embodied in any such megafunction design, netlist, +//support information, device programming or simulation file, or any other +//related documentation or information provided by Altera or a megafunction +//partner, remains with Altera, the megafunction partner, or their respective +//licensors. No other licenses, including any licenses needed under any third +//party's intellectual property, are provided herein. + +module dspclkpll ( + inclk0, + c0, + c1); + + input inclk0; + output c0; + output c1; + +endmodule + diff --git a/fpga/megacells/fifo_2k.v b/fpga/megacells/fifo_2k.v new file mode 100644 index 0000000..5e2a385 --- /dev/null +++ b/fpga/megacells/fifo_2k.v @@ -0,0 +1,3343 @@ +// megafunction wizard: %FIFO%CBX% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: dcfifo + +// ============================================================ +// File Name: fifo_2k.v +// Megafunction Name(s): +// dcfifo +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// +// 5.0 Build 168 06/22/2005 SP 1 SJ Web Edition +// ************************************************************ + + +//Copyright (C) 1991-2005 Altera Corporation +//Your use of Altera Corporation's design tools, logic functions +//and other software and tools, and its AMPP partner logic +//functions, and any output files any of the foregoing +//(including device programming or simulation files), and any +//associated documentation or information are expressly subject +//to the terms and conditions of the Altera Program License +//Subscription Agreement, Altera MegaCore Function License +//Agreement, or other applicable license agreement, including, +//without limitation, that your use is for the sole purpose of +//programming logic devices manufactured by Altera and sold by +//Altera or its authorized distributors. Please refer to the +//applicable agreement for further details. + + +//dcfifo ADD_RAM_OUTPUT_REGISTER="OFF" CLOCKS_ARE_SYNCHRONIZED="FALSE" DEVICE_FAMILY="Cyclone" LPM_NUMWORDS=2048 LPM_SHOWAHEAD="ON" LPM_WIDTH=16 LPM_WIDTHU=11 OVERFLOW_CHECKING="OFF" UNDERFLOW_CHECKING="OFF" USE_EAB="ON" aclr data q rdclk rdempty rdreq rdusedw wrclk wrfull wrreq wrusedw +//VERSION_BEGIN 5.0 cbx_a_gray2bin 2004:03:06:00:52:20:SJ cbx_a_graycounter 2004:10:01:12:13:16:SJ cbx_altdpram 2004:11:30:11:29:56:SJ cbx_altsyncram 2005:03:24:13:58:56:SJ cbx_cycloneii 2004:12:20:14:28:52:SJ cbx_dcfifo 2005:03:07:17:11:14:SJ cbx_fifo_common 2004:12:13:14:26:24:SJ cbx_flex10ke 2002:10:18:16:54:38:SJ cbx_lpm_add_sub 2005:04:12:13:30:42:SJ cbx_lpm_compare 2004:11:30:11:30:40:SJ cbx_lpm_counter 2005:02:02:04:37:10:SJ cbx_lpm_decode 2004:12:13:14:19:12:SJ cbx_lpm_mux 2004:12:13:14:16:38:SJ cbx_mgl 2005:05:19:13:51:58:SJ cbx_scfifo 2005:03:10:10:52:20:SJ cbx_stratix 2005:06:02:09:53:04:SJ cbx_stratixii 2004:12:22:13:27:12:SJ cbx_util_mgl 2005:04:04:13:50:06:SJ VERSION_END + + +//a_gray2bin device_family="Cyclone" WIDTH=11 bin gray +//VERSION_BEGIN 5.0 cbx_a_gray2bin 2004:03:06:00:52:20:SJ cbx_mgl 2005:05:19:13:51:58:SJ VERSION_END + +//synthesis_resources = +//synopsys translate_off +`timescale 1 ps / 1 ps +//synopsys translate_on +module fifo_2k_a_gray2bin_8m4 + ( + bin, + gray) /* synthesis synthesis_clearbox=1 */; + output [10:0] bin; + input [10:0] gray; + + wire xor0; + wire xor1; + wire xor2; + wire xor3; + wire xor4; + wire xor5; + wire xor6; + wire xor7; + wire xor8; + wire xor9; + + assign + bin = {gray[10], xor9, xor8, xor7, xor6, xor5, xor4, xor3, xor2, xor1, xor0}, + xor0 = (gray[0] ^ xor1), + xor1 = (gray[1] ^ xor2), + xor2 = (gray[2] ^ xor3), + xor3 = (gray[3] ^ xor4), + xor4 = (gray[4] ^ xor5), + xor5 = (gray[5] ^ xor6), + xor6 = (gray[6] ^ xor7), + xor7 = (gray[7] ^ xor8), + xor8 = (gray[8] ^ xor9), + xor9 = (gray[10] ^ gray[9]); +endmodule //fifo_2k_a_gray2bin_8m4 + + +//a_graycounter DEVICE_FAMILY="Cyclone" WIDTH=11 aclr clock cnt_en q +//VERSION_BEGIN 5.0 cbx_a_gray2bin 2004:03:06:00:52:20:SJ cbx_a_graycounter 2004:10:01:12:13:16:SJ cbx_cycloneii 2004:12:20:14:28:52:SJ cbx_flex10ke 2002:10:18:16:54:38:SJ cbx_mgl 2005:05:19:13:51:58:SJ cbx_stratix 2005:06:02:09:53:04:SJ cbx_stratixii 2004:12:22:13:27:12:SJ VERSION_END + +//synthesis_resources = lut 12 +//synopsys translate_off +`timescale 1 ps / 1 ps +//synopsys translate_on +module fifo_2k_a_graycounter_726 + ( + aclr, + clock, + cnt_en, + q) /* synthesis synthesis_clearbox=1 */; + input aclr; + input clock; + input cnt_en; + output [10:0] q; + + wire [0:0] wire_countera_0cout; + wire [0:0] wire_countera_1cout; + wire [0:0] wire_countera_2cout; + wire [0:0] wire_countera_3cout; + wire [0:0] wire_countera_4cout; + wire [0:0] wire_countera_5cout; + wire [0:0] wire_countera_6cout; + wire [0:0] wire_countera_7cout; + wire [0:0] wire_countera_8cout; + wire [0:0] wire_countera_9cout; + wire [10:0] wire_countera_regout; + wire wire_parity_cout; + wire wire_parity_regout; + wire [10:0] power_modified_counter_values; + wire sclr; + wire updown; + + cyclone_lcell countera_0 + ( + .aclr(aclr), + .cin(wire_parity_cout), + .clk(clock), + .combout(), + .cout(wire_countera_0cout[0:0]), + .dataa(cnt_en), + .datab(wire_countera_regout[0:0]), + .ena(1'b1), + .regout(wire_countera_regout[0:0]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_0.cin_used = "true", + countera_0.lut_mask = "c6a0", + countera_0.operation_mode = "arithmetic", + countera_0.sum_lutc_input = "cin", + countera_0.synch_mode = "on", + countera_0.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_1 + ( + .aclr(aclr), + .cin(wire_countera_0cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_1cout[0:0]), + .dataa(power_modified_counter_values[0]), + .datab(power_modified_counter_values[1]), + .ena(1'b1), + .regout(wire_countera_regout[1:1]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_1.cin_used = "true", + countera_1.lut_mask = "6c50", + countera_1.operation_mode = "arithmetic", + countera_1.sum_lutc_input = "cin", + countera_1.synch_mode = "on", + countera_1.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_2 + ( + .aclr(aclr), + .cin(wire_countera_1cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_2cout[0:0]), + .dataa(power_modified_counter_values[1]), + .datab(power_modified_counter_values[2]), + .ena(1'b1), + .regout(wire_countera_regout[2:2]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_2.cin_used = "true", + countera_2.lut_mask = "6c50", + countera_2.operation_mode = "arithmetic", + countera_2.sum_lutc_input = "cin", + countera_2.synch_mode = "on", + countera_2.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_3 + ( + .aclr(aclr), + .cin(wire_countera_2cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_3cout[0:0]), + .dataa(power_modified_counter_values[2]), + .datab(power_modified_counter_values[3]), + .ena(1'b1), + .regout(wire_countera_regout[3:3]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_3.cin_used = "true", + countera_3.lut_mask = "6c50", + countera_3.operation_mode = "arithmetic", + countera_3.sum_lutc_input = "cin", + countera_3.synch_mode = "on", + countera_3.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_4 + ( + .aclr(aclr), + .cin(wire_countera_3cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_4cout[0:0]), + .dataa(power_modified_counter_values[3]), + .datab(power_modified_counter_values[4]), + .ena(1'b1), + .regout(wire_countera_regout[4:4]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_4.cin_used = "true", + countera_4.lut_mask = "6c50", + countera_4.operation_mode = "arithmetic", + countera_4.sum_lutc_input = "cin", + countera_4.synch_mode = "on", + countera_4.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_5 + ( + .aclr(aclr), + .cin(wire_countera_4cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_5cout[0:0]), + .dataa(power_modified_counter_values[4]), + .datab(power_modified_counter_values[5]), + .ena(1'b1), + .regout(wire_countera_regout[5:5]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_5.cin_used = "true", + countera_5.lut_mask = "6c50", + countera_5.operation_mode = "arithmetic", + countera_5.sum_lutc_input = "cin", + countera_5.synch_mode = "on", + countera_5.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_6 + ( + .aclr(aclr), + .cin(wire_countera_5cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_6cout[0:0]), + .dataa(power_modified_counter_values[5]), + .datab(power_modified_counter_values[6]), + .ena(1'b1), + .regout(wire_countera_regout[6:6]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_6.cin_used = "true", + countera_6.lut_mask = "6c50", + countera_6.operation_mode = "arithmetic", + countera_6.sum_lutc_input = "cin", + countera_6.synch_mode = "on", + countera_6.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_7 + ( + .aclr(aclr), + .cin(wire_countera_6cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_7cout[0:0]), + .dataa(power_modified_counter_values[6]), + .datab(power_modified_counter_values[7]), + .ena(1'b1), + .regout(wire_countera_regout[7:7]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_7.cin_used = "true", + countera_7.lut_mask = "6c50", + countera_7.operation_mode = "arithmetic", + countera_7.sum_lutc_input = "cin", + countera_7.synch_mode = "on", + countera_7.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_8 + ( + .aclr(aclr), + .cin(wire_countera_7cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_8cout[0:0]), + .dataa(power_modified_counter_values[7]), + .datab(power_modified_counter_values[8]), + .ena(1'b1), + .regout(wire_countera_regout[8:8]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_8.cin_used = "true", + countera_8.lut_mask = "6c50", + countera_8.operation_mode = "arithmetic", + countera_8.sum_lutc_input = "cin", + countera_8.synch_mode = "on", + countera_8.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_9 + ( + .aclr(aclr), + .cin(wire_countera_8cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_9cout[0:0]), + .dataa(power_modified_counter_values[8]), + .datab(power_modified_counter_values[9]), + .ena(1'b1), + .regout(wire_countera_regout[9:9]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_9.cin_used = "true", + countera_9.lut_mask = "6c50", + countera_9.operation_mode = "arithmetic", + countera_9.sum_lutc_input = "cin", + countera_9.synch_mode = "on", + countera_9.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_10 + ( + .aclr(aclr), + .cin(wire_countera_9cout[0:0]), + .clk(clock), + .combout(), + .cout(), + .dataa(power_modified_counter_values[10]), + .ena(1'b1), + .regout(wire_countera_regout[10:10]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datab(1'b1), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_10.cin_used = "true", + countera_10.lut_mask = "5a5a", + countera_10.operation_mode = "normal", + countera_10.sum_lutc_input = "cin", + countera_10.synch_mode = "on", + countera_10.lpm_type = "cyclone_lcell"; + cyclone_lcell parity + ( + .aclr(aclr), + .cin(updown), + .clk(clock), + .combout(), + .cout(wire_parity_cout), + .dataa(cnt_en), + .datab(wire_parity_regout), + .ena(1'b1), + .regout(wire_parity_regout), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + parity.cin_used = "true", + parity.lut_mask = "6682", + parity.operation_mode = "arithmetic", + parity.synch_mode = "on", + parity.lpm_type = "cyclone_lcell"; + assign + power_modified_counter_values = {wire_countera_regout[10:0]}, + q = power_modified_counter_values, + sclr = 1'b0, + updown = 1'b1; +endmodule //fifo_2k_a_graycounter_726 + + +//a_graycounter DEVICE_FAMILY="Cyclone" PVALUE=1 WIDTH=11 aclr clock cnt_en q +//VERSION_BEGIN 5.0 cbx_a_gray2bin 2004:03:06:00:52:20:SJ cbx_a_graycounter 2004:10:01:12:13:16:SJ cbx_cycloneii 2004:12:20:14:28:52:SJ cbx_flex10ke 2002:10:18:16:54:38:SJ cbx_mgl 2005:05:19:13:51:58:SJ cbx_stratix 2005:06:02:09:53:04:SJ cbx_stratixii 2004:12:22:13:27:12:SJ VERSION_END + +//synthesis_resources = lut 12 +//synopsys translate_off +`timescale 1 ps / 1 ps +//synopsys translate_on +module fifo_2k_a_graycounter_2r6 + ( + aclr, + clock, + cnt_en, + q) /* synthesis synthesis_clearbox=1 */; + input aclr; + input clock; + input cnt_en; + output [10:0] q; + + wire [0:0] wire_countera_0cout; + wire [0:0] wire_countera_1cout; + wire [0:0] wire_countera_2cout; + wire [0:0] wire_countera_3cout; + wire [0:0] wire_countera_4cout; + wire [0:0] wire_countera_5cout; + wire [0:0] wire_countera_6cout; + wire [0:0] wire_countera_7cout; + wire [0:0] wire_countera_8cout; + wire [0:0] wire_countera_9cout; + wire [10:0] wire_countera_regout; + wire wire_parity_cout; + wire wire_parity_regout; + wire [10:0] power_modified_counter_values; + wire sclr; + wire updown; + + cyclone_lcell countera_0 + ( + .aclr(aclr), + .cin(wire_parity_cout), + .clk(clock), + .combout(), + .cout(wire_countera_0cout[0:0]), + .dataa(cnt_en), + .datab(wire_countera_regout[0:0]), + .ena(1'b1), + .regout(wire_countera_regout[0:0]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_0.cin_used = "true", + countera_0.lut_mask = "c6a0", + countera_0.operation_mode = "arithmetic", + countera_0.sum_lutc_input = "cin", + countera_0.synch_mode = "on", + countera_0.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_1 + ( + .aclr(aclr), + .cin(wire_countera_0cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_1cout[0:0]), + .dataa(power_modified_counter_values[0]), + .datab(power_modified_counter_values[1]), + .ena(1'b1), + .regout(wire_countera_regout[1:1]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_1.cin_used = "true", + countera_1.lut_mask = "6c50", + countera_1.operation_mode = "arithmetic", + countera_1.sum_lutc_input = "cin", + countera_1.synch_mode = "on", + countera_1.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_2 + ( + .aclr(aclr), + .cin(wire_countera_1cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_2cout[0:0]), + .dataa(power_modified_counter_values[1]), + .datab(power_modified_counter_values[2]), + .ena(1'b1), + .regout(wire_countera_regout[2:2]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_2.cin_used = "true", + countera_2.lut_mask = "6c50", + countera_2.operation_mode = "arithmetic", + countera_2.sum_lutc_input = "cin", + countera_2.synch_mode = "on", + countera_2.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_3 + ( + .aclr(aclr), + .cin(wire_countera_2cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_3cout[0:0]), + .dataa(power_modified_counter_values[2]), + .datab(power_modified_counter_values[3]), + .ena(1'b1), + .regout(wire_countera_regout[3:3]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_3.cin_used = "true", + countera_3.lut_mask = "6c50", + countera_3.operation_mode = "arithmetic", + countera_3.sum_lutc_input = "cin", + countera_3.synch_mode = "on", + countera_3.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_4 + ( + .aclr(aclr), + .cin(wire_countera_3cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_4cout[0:0]), + .dataa(power_modified_counter_values[3]), + .datab(power_modified_counter_values[4]), + .ena(1'b1), + .regout(wire_countera_regout[4:4]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_4.cin_used = "true", + countera_4.lut_mask = "6c50", + countera_4.operation_mode = "arithmetic", + countera_4.sum_lutc_input = "cin", + countera_4.synch_mode = "on", + countera_4.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_5 + ( + .aclr(aclr), + .cin(wire_countera_4cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_5cout[0:0]), + .dataa(power_modified_counter_values[4]), + .datab(power_modified_counter_values[5]), + .ena(1'b1), + .regout(wire_countera_regout[5:5]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_5.cin_used = "true", + countera_5.lut_mask = "6c50", + countera_5.operation_mode = "arithmetic", + countera_5.sum_lutc_input = "cin", + countera_5.synch_mode = "on", + countera_5.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_6 + ( + .aclr(aclr), + .cin(wire_countera_5cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_6cout[0:0]), + .dataa(power_modified_counter_values[5]), + .datab(power_modified_counter_values[6]), + .ena(1'b1), + .regout(wire_countera_regout[6:6]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_6.cin_used = "true", + countera_6.lut_mask = "6c50", + countera_6.operation_mode = "arithmetic", + countera_6.sum_lutc_input = "cin", + countera_6.synch_mode = "on", + countera_6.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_7 + ( + .aclr(aclr), + .cin(wire_countera_6cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_7cout[0:0]), + .dataa(power_modified_counter_values[6]), + .datab(power_modified_counter_values[7]), + .ena(1'b1), + .regout(wire_countera_regout[7:7]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_7.cin_used = "true", + countera_7.lut_mask = "6c50", + countera_7.operation_mode = "arithmetic", + countera_7.sum_lutc_input = "cin", + countera_7.synch_mode = "on", + countera_7.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_8 + ( + .aclr(aclr), + .cin(wire_countera_7cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_8cout[0:0]), + .dataa(power_modified_counter_values[7]), + .datab(power_modified_counter_values[8]), + .ena(1'b1), + .regout(wire_countera_regout[8:8]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_8.cin_used = "true", + countera_8.lut_mask = "6c50", + countera_8.operation_mode = "arithmetic", + countera_8.sum_lutc_input = "cin", + countera_8.synch_mode = "on", + countera_8.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_9 + ( + .aclr(aclr), + .cin(wire_countera_8cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_9cout[0:0]), + .dataa(power_modified_counter_values[8]), + .datab(power_modified_counter_values[9]), + .ena(1'b1), + .regout(wire_countera_regout[9:9]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_9.cin_used = "true", + countera_9.lut_mask = "6c50", + countera_9.operation_mode = "arithmetic", + countera_9.sum_lutc_input = "cin", + countera_9.synch_mode = "on", + countera_9.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_10 + ( + .aclr(aclr), + .cin(wire_countera_9cout[0:0]), + .clk(clock), + .combout(), + .cout(), + .dataa(power_modified_counter_values[10]), + .ena(1'b1), + .regout(wire_countera_regout[10:10]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datab(1'b1), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_10.cin_used = "true", + countera_10.lut_mask = "5a5a", + countera_10.operation_mode = "normal", + countera_10.sum_lutc_input = "cin", + countera_10.synch_mode = "on", + countera_10.lpm_type = "cyclone_lcell"; + cyclone_lcell parity + ( + .aclr(aclr), + .cin(updown), + .clk(clock), + .combout(), + .cout(wire_parity_cout), + .dataa(cnt_en), + .datab((~ wire_parity_regout)), + .ena(1'b1), + .regout(wire_parity_regout), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + parity.cin_used = "true", + parity.lut_mask = "9982", + parity.operation_mode = "arithmetic", + parity.synch_mode = "on", + parity.lpm_type = "cyclone_lcell"; + assign + power_modified_counter_values = {wire_countera_regout[10:1], (~ wire_countera_regout[0])}, + q = power_modified_counter_values, + sclr = 1'b0, + updown = 1'b1; +endmodule //fifo_2k_a_graycounter_2r6 + + +//altsyncram ADDRESS_REG_B="CLOCK1" DEVICE_FAMILY="Cyclone" OPERATION_MODE="DUAL_PORT" OUTDATA_REG_B="UNREGISTERED" WIDTH_A=16 WIDTH_B=16 WIDTH_BYTEENA_A=1 WIDTHAD_A=11 WIDTHAD_B=11 address_a address_b clock0 clock1 clocken1 data_a q_b wren_a +//VERSION_BEGIN 5.0 cbx_altsyncram 2005:03:24:13:58:56:SJ cbx_cycloneii 2004:12:20:14:28:52:SJ cbx_lpm_add_sub 2005:04:12:13:30:42:SJ cbx_lpm_compare 2004:11:30:11:30:40:SJ cbx_lpm_decode 2004:12:13:14:19:12:SJ cbx_lpm_mux 2004:12:13:14:16:38:SJ cbx_mgl 2005:05:19:13:51:58:SJ cbx_stratix 2005:06:02:09:53:04:SJ cbx_stratixii 2004:12:22:13:27:12:SJ cbx_util_mgl 2005:04:04:13:50:06:SJ VERSION_END + +//synthesis_resources = M4K 8 +//synopsys translate_off +`timescale 1 ps / 1 ps +//synopsys translate_on +module fifo_2k_altsyncram_6pl + ( + address_a, + address_b, + clock0, + clock1, + clocken1, + data_a, + q_b, + wren_a) /* synthesis synthesis_clearbox=1 */; + input [10:0] address_a; + input [10:0] address_b; + input clock0; + input clock1; + input clocken1; + input [15:0] data_a; + output [15:0] q_b; + input wren_a; + + wire [0:0] wire_ram_block3a_0portbdataout; + wire [0:0] wire_ram_block3a_1portbdataout; + wire [0:0] wire_ram_block3a_2portbdataout; + wire [0:0] wire_ram_block3a_3portbdataout; + wire [0:0] wire_ram_block3a_4portbdataout; + wire [0:0] wire_ram_block3a_5portbdataout; + wire [0:0] wire_ram_block3a_6portbdataout; + wire [0:0] wire_ram_block3a_7portbdataout; + wire [0:0] wire_ram_block3a_8portbdataout; + wire [0:0] wire_ram_block3a_9portbdataout; + wire [0:0] wire_ram_block3a_10portbdataout; + wire [0:0] wire_ram_block3a_11portbdataout; + wire [0:0] wire_ram_block3a_12portbdataout; + wire [0:0] wire_ram_block3a_13portbdataout; + wire [0:0] wire_ram_block3a_14portbdataout; + wire [0:0] wire_ram_block3a_15portbdataout; + wire [10:0] address_a_wire; + wire [10:0] address_b_wire; + + cyclone_ram_block ram_block3a_0 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[10:0]}), + .portadatain({data_a[0]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[10:0]}), + .portbdataout(wire_ram_block3a_0portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_0.connectivity_checking = "OFF", + ram_block3a_0.logical_ram_name = "ALTSYNCRAM", + ram_block3a_0.mixed_port_feed_through_mode = "dont_care", + ram_block3a_0.operation_mode = "dual_port", + ram_block3a_0.port_a_address_width = 11, + ram_block3a_0.port_a_data_width = 1, + ram_block3a_0.port_a_first_address = 0, + ram_block3a_0.port_a_first_bit_number = 0, + ram_block3a_0.port_a_last_address = 2047, + ram_block3a_0.port_a_logical_ram_depth = 2048, + ram_block3a_0.port_a_logical_ram_width = 16, + ram_block3a_0.port_b_address_clear = "none", + ram_block3a_0.port_b_address_clock = "clock1", + ram_block3a_0.port_b_address_width = 11, + ram_block3a_0.port_b_data_out_clear = "none", + ram_block3a_0.port_b_data_out_clock = "none", + ram_block3a_0.port_b_data_width = 1, + ram_block3a_0.port_b_first_address = 0, + ram_block3a_0.port_b_first_bit_number = 0, + ram_block3a_0.port_b_last_address = 2047, + ram_block3a_0.port_b_logical_ram_depth = 2048, + ram_block3a_0.port_b_logical_ram_width = 16, + ram_block3a_0.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_0.ram_block_type = "auto", + ram_block3a_0.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_1 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[10:0]}), + .portadatain({data_a[1]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[10:0]}), + .portbdataout(wire_ram_block3a_1portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_1.connectivity_checking = "OFF", + ram_block3a_1.logical_ram_name = "ALTSYNCRAM", + ram_block3a_1.mixed_port_feed_through_mode = "dont_care", + ram_block3a_1.operation_mode = "dual_port", + ram_block3a_1.port_a_address_width = 11, + ram_block3a_1.port_a_data_width = 1, + ram_block3a_1.port_a_first_address = 0, + ram_block3a_1.port_a_first_bit_number = 1, + ram_block3a_1.port_a_last_address = 2047, + ram_block3a_1.port_a_logical_ram_depth = 2048, + ram_block3a_1.port_a_logical_ram_width = 16, + ram_block3a_1.port_b_address_clear = "none", + ram_block3a_1.port_b_address_clock = "clock1", + ram_block3a_1.port_b_address_width = 11, + ram_block3a_1.port_b_data_out_clear = "none", + ram_block3a_1.port_b_data_out_clock = "none", + ram_block3a_1.port_b_data_width = 1, + ram_block3a_1.port_b_first_address = 0, + ram_block3a_1.port_b_first_bit_number = 1, + ram_block3a_1.port_b_last_address = 2047, + ram_block3a_1.port_b_logical_ram_depth = 2048, + ram_block3a_1.port_b_logical_ram_width = 16, + ram_block3a_1.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_1.ram_block_type = "auto", + ram_block3a_1.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_2 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[10:0]}), + .portadatain({data_a[2]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[10:0]}), + .portbdataout(wire_ram_block3a_2portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_2.connectivity_checking = "OFF", + ram_block3a_2.logical_ram_name = "ALTSYNCRAM", + ram_block3a_2.mixed_port_feed_through_mode = "dont_care", + ram_block3a_2.operation_mode = "dual_port", + ram_block3a_2.port_a_address_width = 11, + ram_block3a_2.port_a_data_width = 1, + ram_block3a_2.port_a_first_address = 0, + ram_block3a_2.port_a_first_bit_number = 2, + ram_block3a_2.port_a_last_address = 2047, + ram_block3a_2.port_a_logical_ram_depth = 2048, + ram_block3a_2.port_a_logical_ram_width = 16, + ram_block3a_2.port_b_address_clear = "none", + ram_block3a_2.port_b_address_clock = "clock1", + ram_block3a_2.port_b_address_width = 11, + ram_block3a_2.port_b_data_out_clear = "none", + ram_block3a_2.port_b_data_out_clock = "none", + ram_block3a_2.port_b_data_width = 1, + ram_block3a_2.port_b_first_address = 0, + ram_block3a_2.port_b_first_bit_number = 2, + ram_block3a_2.port_b_last_address = 2047, + ram_block3a_2.port_b_logical_ram_depth = 2048, + ram_block3a_2.port_b_logical_ram_width = 16, + ram_block3a_2.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_2.ram_block_type = "auto", + ram_block3a_2.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_3 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[10:0]}), + .portadatain({data_a[3]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[10:0]}), + .portbdataout(wire_ram_block3a_3portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_3.connectivity_checking = "OFF", + ram_block3a_3.logical_ram_name = "ALTSYNCRAM", + ram_block3a_3.mixed_port_feed_through_mode = "dont_care", + ram_block3a_3.operation_mode = "dual_port", + ram_block3a_3.port_a_address_width = 11, + ram_block3a_3.port_a_data_width = 1, + ram_block3a_3.port_a_first_address = 0, + ram_block3a_3.port_a_first_bit_number = 3, + ram_block3a_3.port_a_last_address = 2047, + ram_block3a_3.port_a_logical_ram_depth = 2048, + ram_block3a_3.port_a_logical_ram_width = 16, + ram_block3a_3.port_b_address_clear = "none", + ram_block3a_3.port_b_address_clock = "clock1", + ram_block3a_3.port_b_address_width = 11, + ram_block3a_3.port_b_data_out_clear = "none", + ram_block3a_3.port_b_data_out_clock = "none", + ram_block3a_3.port_b_data_width = 1, + ram_block3a_3.port_b_first_address = 0, + ram_block3a_3.port_b_first_bit_number = 3, + ram_block3a_3.port_b_last_address = 2047, + ram_block3a_3.port_b_logical_ram_depth = 2048, + ram_block3a_3.port_b_logical_ram_width = 16, + ram_block3a_3.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_3.ram_block_type = "auto", + ram_block3a_3.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_4 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[10:0]}), + .portadatain({data_a[4]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[10:0]}), + .portbdataout(wire_ram_block3a_4portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_4.connectivity_checking = "OFF", + ram_block3a_4.logical_ram_name = "ALTSYNCRAM", + ram_block3a_4.mixed_port_feed_through_mode = "dont_care", + ram_block3a_4.operation_mode = "dual_port", + ram_block3a_4.port_a_address_width = 11, + ram_block3a_4.port_a_data_width = 1, + ram_block3a_4.port_a_first_address = 0, + ram_block3a_4.port_a_first_bit_number = 4, + ram_block3a_4.port_a_last_address = 2047, + ram_block3a_4.port_a_logical_ram_depth = 2048, + ram_block3a_4.port_a_logical_ram_width = 16, + ram_block3a_4.port_b_address_clear = "none", + ram_block3a_4.port_b_address_clock = "clock1", + ram_block3a_4.port_b_address_width = 11, + ram_block3a_4.port_b_data_out_clear = "none", + ram_block3a_4.port_b_data_out_clock = "none", + ram_block3a_4.port_b_data_width = 1, + ram_block3a_4.port_b_first_address = 0, + ram_block3a_4.port_b_first_bit_number = 4, + ram_block3a_4.port_b_last_address = 2047, + ram_block3a_4.port_b_logical_ram_depth = 2048, + ram_block3a_4.port_b_logical_ram_width = 16, + ram_block3a_4.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_4.ram_block_type = "auto", + ram_block3a_4.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_5 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[10:0]}), + .portadatain({data_a[5]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[10:0]}), + .portbdataout(wire_ram_block3a_5portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_5.connectivity_checking = "OFF", + ram_block3a_5.logical_ram_name = "ALTSYNCRAM", + ram_block3a_5.mixed_port_feed_through_mode = "dont_care", + ram_block3a_5.operation_mode = "dual_port", + ram_block3a_5.port_a_address_width = 11, + ram_block3a_5.port_a_data_width = 1, + ram_block3a_5.port_a_first_address = 0, + ram_block3a_5.port_a_first_bit_number = 5, + ram_block3a_5.port_a_last_address = 2047, + ram_block3a_5.port_a_logical_ram_depth = 2048, + ram_block3a_5.port_a_logical_ram_width = 16, + ram_block3a_5.port_b_address_clear = "none", + ram_block3a_5.port_b_address_clock = "clock1", + ram_block3a_5.port_b_address_width = 11, + ram_block3a_5.port_b_data_out_clear = "none", + ram_block3a_5.port_b_data_out_clock = "none", + ram_block3a_5.port_b_data_width = 1, + ram_block3a_5.port_b_first_address = 0, + ram_block3a_5.port_b_first_bit_number = 5, + ram_block3a_5.port_b_last_address = 2047, + ram_block3a_5.port_b_logical_ram_depth = 2048, + ram_block3a_5.port_b_logical_ram_width = 16, + ram_block3a_5.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_5.ram_block_type = "auto", + ram_block3a_5.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_6 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[10:0]}), + .portadatain({data_a[6]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[10:0]}), + .portbdataout(wire_ram_block3a_6portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_6.connectivity_checking = "OFF", + ram_block3a_6.logical_ram_name = "ALTSYNCRAM", + ram_block3a_6.mixed_port_feed_through_mode = "dont_care", + ram_block3a_6.operation_mode = "dual_port", + ram_block3a_6.port_a_address_width = 11, + ram_block3a_6.port_a_data_width = 1, + ram_block3a_6.port_a_first_address = 0, + ram_block3a_6.port_a_first_bit_number = 6, + ram_block3a_6.port_a_last_address = 2047, + ram_block3a_6.port_a_logical_ram_depth = 2048, + ram_block3a_6.port_a_logical_ram_width = 16, + ram_block3a_6.port_b_address_clear = "none", + ram_block3a_6.port_b_address_clock = "clock1", + ram_block3a_6.port_b_address_width = 11, + ram_block3a_6.port_b_data_out_clear = "none", + ram_block3a_6.port_b_data_out_clock = "none", + ram_block3a_6.port_b_data_width = 1, + ram_block3a_6.port_b_first_address = 0, + ram_block3a_6.port_b_first_bit_number = 6, + ram_block3a_6.port_b_last_address = 2047, + ram_block3a_6.port_b_logical_ram_depth = 2048, + ram_block3a_6.port_b_logical_ram_width = 16, + ram_block3a_6.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_6.ram_block_type = "auto", + ram_block3a_6.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_7 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[10:0]}), + .portadatain({data_a[7]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[10:0]}), + .portbdataout(wire_ram_block3a_7portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_7.connectivity_checking = "OFF", + ram_block3a_7.logical_ram_name = "ALTSYNCRAM", + ram_block3a_7.mixed_port_feed_through_mode = "dont_care", + ram_block3a_7.operation_mode = "dual_port", + ram_block3a_7.port_a_address_width = 11, + ram_block3a_7.port_a_data_width = 1, + ram_block3a_7.port_a_first_address = 0, + ram_block3a_7.port_a_first_bit_number = 7, + ram_block3a_7.port_a_last_address = 2047, + ram_block3a_7.port_a_logical_ram_depth = 2048, + ram_block3a_7.port_a_logical_ram_width = 16, + ram_block3a_7.port_b_address_clear = "none", + ram_block3a_7.port_b_address_clock = "clock1", + ram_block3a_7.port_b_address_width = 11, + ram_block3a_7.port_b_data_out_clear = "none", + ram_block3a_7.port_b_data_out_clock = "none", + ram_block3a_7.port_b_data_width = 1, + ram_block3a_7.port_b_first_address = 0, + ram_block3a_7.port_b_first_bit_number = 7, + ram_block3a_7.port_b_last_address = 2047, + ram_block3a_7.port_b_logical_ram_depth = 2048, + ram_block3a_7.port_b_logical_ram_width = 16, + ram_block3a_7.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_7.ram_block_type = "auto", + ram_block3a_7.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_8 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[10:0]}), + .portadatain({data_a[8]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[10:0]}), + .portbdataout(wire_ram_block3a_8portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_8.connectivity_checking = "OFF", + ram_block3a_8.logical_ram_name = "ALTSYNCRAM", + ram_block3a_8.mixed_port_feed_through_mode = "dont_care", + ram_block3a_8.operation_mode = "dual_port", + ram_block3a_8.port_a_address_width = 11, + ram_block3a_8.port_a_data_width = 1, + ram_block3a_8.port_a_first_address = 0, + ram_block3a_8.port_a_first_bit_number = 8, + ram_block3a_8.port_a_last_address = 2047, + ram_block3a_8.port_a_logical_ram_depth = 2048, + ram_block3a_8.port_a_logical_ram_width = 16, + ram_block3a_8.port_b_address_clear = "none", + ram_block3a_8.port_b_address_clock = "clock1", + ram_block3a_8.port_b_address_width = 11, + ram_block3a_8.port_b_data_out_clear = "none", + ram_block3a_8.port_b_data_out_clock = "none", + ram_block3a_8.port_b_data_width = 1, + ram_block3a_8.port_b_first_address = 0, + ram_block3a_8.port_b_first_bit_number = 8, + ram_block3a_8.port_b_last_address = 2047, + ram_block3a_8.port_b_logical_ram_depth = 2048, + ram_block3a_8.port_b_logical_ram_width = 16, + ram_block3a_8.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_8.ram_block_type = "auto", + ram_block3a_8.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_9 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[10:0]}), + .portadatain({data_a[9]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[10:0]}), + .portbdataout(wire_ram_block3a_9portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_9.connectivity_checking = "OFF", + ram_block3a_9.logical_ram_name = "ALTSYNCRAM", + ram_block3a_9.mixed_port_feed_through_mode = "dont_care", + ram_block3a_9.operation_mode = "dual_port", + ram_block3a_9.port_a_address_width = 11, + ram_block3a_9.port_a_data_width = 1, + ram_block3a_9.port_a_first_address = 0, + ram_block3a_9.port_a_first_bit_number = 9, + ram_block3a_9.port_a_last_address = 2047, + ram_block3a_9.port_a_logical_ram_depth = 2048, + ram_block3a_9.port_a_logical_ram_width = 16, + ram_block3a_9.port_b_address_clear = "none", + ram_block3a_9.port_b_address_clock = "clock1", + ram_block3a_9.port_b_address_width = 11, + ram_block3a_9.port_b_data_out_clear = "none", + ram_block3a_9.port_b_data_out_clock = "none", + ram_block3a_9.port_b_data_width = 1, + ram_block3a_9.port_b_first_address = 0, + ram_block3a_9.port_b_first_bit_number = 9, + ram_block3a_9.port_b_last_address = 2047, + ram_block3a_9.port_b_logical_ram_depth = 2048, + ram_block3a_9.port_b_logical_ram_width = 16, + ram_block3a_9.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_9.ram_block_type = "auto", + ram_block3a_9.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_10 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[10:0]}), + .portadatain({data_a[10]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[10:0]}), + .portbdataout(wire_ram_block3a_10portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_10.connectivity_checking = "OFF", + ram_block3a_10.logical_ram_name = "ALTSYNCRAM", + ram_block3a_10.mixed_port_feed_through_mode = "dont_care", + ram_block3a_10.operation_mode = "dual_port", + ram_block3a_10.port_a_address_width = 11, + ram_block3a_10.port_a_data_width = 1, + ram_block3a_10.port_a_first_address = 0, + ram_block3a_10.port_a_first_bit_number = 10, + ram_block3a_10.port_a_last_address = 2047, + ram_block3a_10.port_a_logical_ram_depth = 2048, + ram_block3a_10.port_a_logical_ram_width = 16, + ram_block3a_10.port_b_address_clear = "none", + ram_block3a_10.port_b_address_clock = "clock1", + ram_block3a_10.port_b_address_width = 11, + ram_block3a_10.port_b_data_out_clear = "none", + ram_block3a_10.port_b_data_out_clock = "none", + ram_block3a_10.port_b_data_width = 1, + ram_block3a_10.port_b_first_address = 0, + ram_block3a_10.port_b_first_bit_number = 10, + ram_block3a_10.port_b_last_address = 2047, + ram_block3a_10.port_b_logical_ram_depth = 2048, + ram_block3a_10.port_b_logical_ram_width = 16, + ram_block3a_10.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_10.ram_block_type = "auto", + ram_block3a_10.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_11 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[10:0]}), + .portadatain({data_a[11]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[10:0]}), + .portbdataout(wire_ram_block3a_11portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_11.connectivity_checking = "OFF", + ram_block3a_11.logical_ram_name = "ALTSYNCRAM", + ram_block3a_11.mixed_port_feed_through_mode = "dont_care", + ram_block3a_11.operation_mode = "dual_port", + ram_block3a_11.port_a_address_width = 11, + ram_block3a_11.port_a_data_width = 1, + ram_block3a_11.port_a_first_address = 0, + ram_block3a_11.port_a_first_bit_number = 11, + ram_block3a_11.port_a_last_address = 2047, + ram_block3a_11.port_a_logical_ram_depth = 2048, + ram_block3a_11.port_a_logical_ram_width = 16, + ram_block3a_11.port_b_address_clear = "none", + ram_block3a_11.port_b_address_clock = "clock1", + ram_block3a_11.port_b_address_width = 11, + ram_block3a_11.port_b_data_out_clear = "none", + ram_block3a_11.port_b_data_out_clock = "none", + ram_block3a_11.port_b_data_width = 1, + ram_block3a_11.port_b_first_address = 0, + ram_block3a_11.port_b_first_bit_number = 11, + ram_block3a_11.port_b_last_address = 2047, + ram_block3a_11.port_b_logical_ram_depth = 2048, + ram_block3a_11.port_b_logical_ram_width = 16, + ram_block3a_11.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_11.ram_block_type = "auto", + ram_block3a_11.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_12 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[10:0]}), + .portadatain({data_a[12]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[10:0]}), + .portbdataout(wire_ram_block3a_12portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_12.connectivity_checking = "OFF", + ram_block3a_12.logical_ram_name = "ALTSYNCRAM", + ram_block3a_12.mixed_port_feed_through_mode = "dont_care", + ram_block3a_12.operation_mode = "dual_port", + ram_block3a_12.port_a_address_width = 11, + ram_block3a_12.port_a_data_width = 1, + ram_block3a_12.port_a_first_address = 0, + ram_block3a_12.port_a_first_bit_number = 12, + ram_block3a_12.port_a_last_address = 2047, + ram_block3a_12.port_a_logical_ram_depth = 2048, + ram_block3a_12.port_a_logical_ram_width = 16, + ram_block3a_12.port_b_address_clear = "none", + ram_block3a_12.port_b_address_clock = "clock1", + ram_block3a_12.port_b_address_width = 11, + ram_block3a_12.port_b_data_out_clear = "none", + ram_block3a_12.port_b_data_out_clock = "none", + ram_block3a_12.port_b_data_width = 1, + ram_block3a_12.port_b_first_address = 0, + ram_block3a_12.port_b_first_bit_number = 12, + ram_block3a_12.port_b_last_address = 2047, + ram_block3a_12.port_b_logical_ram_depth = 2048, + ram_block3a_12.port_b_logical_ram_width = 16, + ram_block3a_12.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_12.ram_block_type = "auto", + ram_block3a_12.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_13 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[10:0]}), + .portadatain({data_a[13]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[10:0]}), + .portbdataout(wire_ram_block3a_13portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_13.connectivity_checking = "OFF", + ram_block3a_13.logical_ram_name = "ALTSYNCRAM", + ram_block3a_13.mixed_port_feed_through_mode = "dont_care", + ram_block3a_13.operation_mode = "dual_port", + ram_block3a_13.port_a_address_width = 11, + ram_block3a_13.port_a_data_width = 1, + ram_block3a_13.port_a_first_address = 0, + ram_block3a_13.port_a_first_bit_number = 13, + ram_block3a_13.port_a_last_address = 2047, + ram_block3a_13.port_a_logical_ram_depth = 2048, + ram_block3a_13.port_a_logical_ram_width = 16, + ram_block3a_13.port_b_address_clear = "none", + ram_block3a_13.port_b_address_clock = "clock1", + ram_block3a_13.port_b_address_width = 11, + ram_block3a_13.port_b_data_out_clear = "none", + ram_block3a_13.port_b_data_out_clock = "none", + ram_block3a_13.port_b_data_width = 1, + ram_block3a_13.port_b_first_address = 0, + ram_block3a_13.port_b_first_bit_number = 13, + ram_block3a_13.port_b_last_address = 2047, + ram_block3a_13.port_b_logical_ram_depth = 2048, + ram_block3a_13.port_b_logical_ram_width = 16, + ram_block3a_13.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_13.ram_block_type = "auto", + ram_block3a_13.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_14 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[10:0]}), + .portadatain({data_a[14]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[10:0]}), + .portbdataout(wire_ram_block3a_14portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_14.connectivity_checking = "OFF", + ram_block3a_14.logical_ram_name = "ALTSYNCRAM", + ram_block3a_14.mixed_port_feed_through_mode = "dont_care", + ram_block3a_14.operation_mode = "dual_port", + ram_block3a_14.port_a_address_width = 11, + ram_block3a_14.port_a_data_width = 1, + ram_block3a_14.port_a_first_address = 0, + ram_block3a_14.port_a_first_bit_number = 14, + ram_block3a_14.port_a_last_address = 2047, + ram_block3a_14.port_a_logical_ram_depth = 2048, + ram_block3a_14.port_a_logical_ram_width = 16, + ram_block3a_14.port_b_address_clear = "none", + ram_block3a_14.port_b_address_clock = "clock1", + ram_block3a_14.port_b_address_width = 11, + ram_block3a_14.port_b_data_out_clear = "none", + ram_block3a_14.port_b_data_out_clock = "none", + ram_block3a_14.port_b_data_width = 1, + ram_block3a_14.port_b_first_address = 0, + ram_block3a_14.port_b_first_bit_number = 14, + ram_block3a_14.port_b_last_address = 2047, + ram_block3a_14.port_b_logical_ram_depth = 2048, + ram_block3a_14.port_b_logical_ram_width = 16, + ram_block3a_14.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_14.ram_block_type = "auto", + ram_block3a_14.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_15 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[10:0]}), + .portadatain({data_a[15]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[10:0]}), + .portbdataout(wire_ram_block3a_15portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_15.connectivity_checking = "OFF", + ram_block3a_15.logical_ram_name = "ALTSYNCRAM", + ram_block3a_15.mixed_port_feed_through_mode = "dont_care", + ram_block3a_15.operation_mode = "dual_port", + ram_block3a_15.port_a_address_width = 11, + ram_block3a_15.port_a_data_width = 1, + ram_block3a_15.port_a_first_address = 0, + ram_block3a_15.port_a_first_bit_number = 15, + ram_block3a_15.port_a_last_address = 2047, + ram_block3a_15.port_a_logical_ram_depth = 2048, + ram_block3a_15.port_a_logical_ram_width = 16, + ram_block3a_15.port_b_address_clear = "none", + ram_block3a_15.port_b_address_clock = "clock1", + ram_block3a_15.port_b_address_width = 11, + ram_block3a_15.port_b_data_out_clear = "none", + ram_block3a_15.port_b_data_out_clock = "none", + ram_block3a_15.port_b_data_width = 1, + ram_block3a_15.port_b_first_address = 0, + ram_block3a_15.port_b_first_bit_number = 15, + ram_block3a_15.port_b_last_address = 2047, + ram_block3a_15.port_b_logical_ram_depth = 2048, + ram_block3a_15.port_b_logical_ram_width = 16, + ram_block3a_15.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_15.ram_block_type = "auto", + ram_block3a_15.lpm_type = "cyclone_ram_block"; + assign + address_a_wire = address_a, + address_b_wire = address_b, + q_b = {wire_ram_block3a_15portbdataout[0], wire_ram_block3a_14portbdataout[0], wire_ram_block3a_13portbdataout[0], wire_ram_block3a_12portbdataout[0], wire_ram_block3a_11portbdataout[0], wire_ram_block3a_10portbdataout[0], wire_ram_block3a_9portbdataout[0], wire_ram_block3a_8portbdataout[0], wire_ram_block3a_7portbdataout[0], wire_ram_block3a_6portbdataout[0], wire_ram_block3a_5portbdataout[0], wire_ram_block3a_4portbdataout[0], wire_ram_block3a_3portbdataout[0], wire_ram_block3a_2portbdataout[0], wire_ram_block3a_1portbdataout[0], wire_ram_block3a_0portbdataout[0]}; +endmodule //fifo_2k_altsyncram_6pl + + +//dffpipe DELAY=1 WIDTH=11 clock clrn d q +//VERSION_BEGIN 5.0 cbx_mgl 2005:05:19:13:51:58:SJ cbx_stratixii 2004:12:22:13:27:12:SJ cbx_util_mgl 2005:04:04:13:50:06:SJ VERSION_END + +//synthesis_resources = lut 11 +//synopsys translate_off +`timescale 1 ps / 1 ps +//synopsys translate_on +module fifo_2k_dffpipe_ab3 + ( + clock, + clrn, + d, + q) /* synthesis synthesis_clearbox=1 */ + /* synthesis ALTERA_ATTRIBUTE="AUTO_SHIFT_REGISTER_RECOGNITION=OFF" */; + input clock; + input clrn; + input [10:0] d; + output [10:0] q; + + wire [10:0] wire_dffe4a_D; + reg [10:0] dffe4a; + wire ena; + wire prn; + wire sclr; + + // synopsys translate_off + initial + dffe4a[0:0] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[0:0] <= 1'b1; + else if (clrn == 1'b0) dffe4a[0:0] <= 1'b0; + else if (ena == 1'b1) dffe4a[0:0] <= wire_dffe4a_D[0:0]; + // synopsys translate_off + initial + dffe4a[1:1] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[1:1] <= 1'b1; + else if (clrn == 1'b0) dffe4a[1:1] <= 1'b0; + else if (ena == 1'b1) dffe4a[1:1] <= wire_dffe4a_D[1:1]; + // synopsys translate_off + initial + dffe4a[2:2] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[2:2] <= 1'b1; + else if (clrn == 1'b0) dffe4a[2:2] <= 1'b0; + else if (ena == 1'b1) dffe4a[2:2] <= wire_dffe4a_D[2:2]; + // synopsys translate_off + initial + dffe4a[3:3] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[3:3] <= 1'b1; + else if (clrn == 1'b0) dffe4a[3:3] <= 1'b0; + else if (ena == 1'b1) dffe4a[3:3] <= wire_dffe4a_D[3:3]; + // synopsys translate_off + initial + dffe4a[4:4] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[4:4] <= 1'b1; + else if (clrn == 1'b0) dffe4a[4:4] <= 1'b0; + else if (ena == 1'b1) dffe4a[4:4] <= wire_dffe4a_D[4:4]; + // synopsys translate_off + initial + dffe4a[5:5] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[5:5] <= 1'b1; + else if (clrn == 1'b0) dffe4a[5:5] <= 1'b0; + else if (ena == 1'b1) dffe4a[5:5] <= wire_dffe4a_D[5:5]; + // synopsys translate_off + initial + dffe4a[6:6] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[6:6] <= 1'b1; + else if (clrn == 1'b0) dffe4a[6:6] <= 1'b0; + else if (ena == 1'b1) dffe4a[6:6] <= wire_dffe4a_D[6:6]; + // synopsys translate_off + initial + dffe4a[7:7] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[7:7] <= 1'b1; + else if (clrn == 1'b0) dffe4a[7:7] <= 1'b0; + else if (ena == 1'b1) dffe4a[7:7] <= wire_dffe4a_D[7:7]; + // synopsys translate_off + initial + dffe4a[8:8] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[8:8] <= 1'b1; + else if (clrn == 1'b0) dffe4a[8:8] <= 1'b0; + else if (ena == 1'b1) dffe4a[8:8] <= wire_dffe4a_D[8:8]; + // synopsys translate_off + initial + dffe4a[9:9] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[9:9] <= 1'b1; + else if (clrn == 1'b0) dffe4a[9:9] <= 1'b0; + else if (ena == 1'b1) dffe4a[9:9] <= wire_dffe4a_D[9:9]; + // synopsys translate_off + initial + dffe4a[10:10] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[10:10] <= 1'b1; + else if (clrn == 1'b0) dffe4a[10:10] <= 1'b0; + else if (ena == 1'b1) dffe4a[10:10] <= wire_dffe4a_D[10:10]; + assign + wire_dffe4a_D = (d & {11{(~ sclr)}}); + assign + ena = 1'b1, + prn = 1'b1, + q = dffe4a, + sclr = 1'b0; +endmodule //fifo_2k_dffpipe_ab3 + + +//dffpipe WIDTH=11 clock clrn d q +//VERSION_BEGIN 5.0 cbx_a_gray2bin 2004:03:06:00:52:20:SJ cbx_a_graycounter 2004:10:01:12:13:16:SJ cbx_altdpram 2004:11:30:11:29:56:SJ cbx_altsyncram 2005:03:24:13:58:56:SJ cbx_cycloneii 2004:12:20:14:28:52:SJ cbx_dcfifo 2005:03:07:17:11:14:SJ cbx_fifo_common 2004:12:13:14:26:24:SJ cbx_flex10ke 2002:10:18:16:54:38:SJ cbx_lpm_add_sub 2005:04:12:13:30:42:SJ cbx_lpm_compare 2004:11:30:11:30:40:SJ cbx_lpm_counter 2005:02:02:04:37:10:SJ cbx_lpm_decode 2004:12:13:14:19:12:SJ cbx_lpm_mux 2004:12:13:14:16:38:SJ cbx_mgl 2005:05:19:13:51:58:SJ cbx_scfifo 2005:03:10:10:52:20:SJ cbx_stratix 2005:06:02:09:53:04:SJ cbx_stratixii 2004:12:22:13:27:12:SJ cbx_util_mgl 2005:04:04:13:50:06:SJ VERSION_END + + +//dffpipe WIDTH=11 clock clrn d q +//VERSION_BEGIN 5.0 cbx_mgl 2005:05:19:13:51:58:SJ cbx_stratixii 2004:12:22:13:27:12:SJ cbx_util_mgl 2005:04:04:13:50:06:SJ VERSION_END + +//synthesis_resources = lut 11 +//synopsys translate_off +`timescale 1 ps / 1 ps +//synopsys translate_on +module fifo_2k_dffpipe_dm2 + ( + clock, + clrn, + d, + q) /* synthesis synthesis_clearbox=1 */ + /* synthesis ALTERA_ATTRIBUTE="AUTO_SHIFT_REGISTER_RECOGNITION=OFF" */; + input clock; + input clrn; + input [10:0] d; + output [10:0] q; + + wire [10:0] wire_dffe6a_D; + reg [10:0] dffe6a; + wire ena; + wire prn; + wire sclr; + + // synopsys translate_off + initial + dffe6a[0:0] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[0:0] <= 1'b1; + else if (clrn == 1'b0) dffe6a[0:0] <= 1'b0; + else if (ena == 1'b1) dffe6a[0:0] <= wire_dffe6a_D[0:0]; + // synopsys translate_off + initial + dffe6a[1:1] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[1:1] <= 1'b1; + else if (clrn == 1'b0) dffe6a[1:1] <= 1'b0; + else if (ena == 1'b1) dffe6a[1:1] <= wire_dffe6a_D[1:1]; + // synopsys translate_off + initial + dffe6a[2:2] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[2:2] <= 1'b1; + else if (clrn == 1'b0) dffe6a[2:2] <= 1'b0; + else if (ena == 1'b1) dffe6a[2:2] <= wire_dffe6a_D[2:2]; + // synopsys translate_off + initial + dffe6a[3:3] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[3:3] <= 1'b1; + else if (clrn == 1'b0) dffe6a[3:3] <= 1'b0; + else if (ena == 1'b1) dffe6a[3:3] <= wire_dffe6a_D[3:3]; + // synopsys translate_off + initial + dffe6a[4:4] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[4:4] <= 1'b1; + else if (clrn == 1'b0) dffe6a[4:4] <= 1'b0; + else if (ena == 1'b1) dffe6a[4:4] <= wire_dffe6a_D[4:4]; + // synopsys translate_off + initial + dffe6a[5:5] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[5:5] <= 1'b1; + else if (clrn == 1'b0) dffe6a[5:5] <= 1'b0; + else if (ena == 1'b1) dffe6a[5:5] <= wire_dffe6a_D[5:5]; + // synopsys translate_off + initial + dffe6a[6:6] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[6:6] <= 1'b1; + else if (clrn == 1'b0) dffe6a[6:6] <= 1'b0; + else if (ena == 1'b1) dffe6a[6:6] <= wire_dffe6a_D[6:6]; + // synopsys translate_off + initial + dffe6a[7:7] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[7:7] <= 1'b1; + else if (clrn == 1'b0) dffe6a[7:7] <= 1'b0; + else if (ena == 1'b1) dffe6a[7:7] <= wire_dffe6a_D[7:7]; + // synopsys translate_off + initial + dffe6a[8:8] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[8:8] <= 1'b1; + else if (clrn == 1'b0) dffe6a[8:8] <= 1'b0; + else if (ena == 1'b1) dffe6a[8:8] <= wire_dffe6a_D[8:8]; + // synopsys translate_off + initial + dffe6a[9:9] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[9:9] <= 1'b1; + else if (clrn == 1'b0) dffe6a[9:9] <= 1'b0; + else if (ena == 1'b1) dffe6a[9:9] <= wire_dffe6a_D[9:9]; + // synopsys translate_off + initial + dffe6a[10:10] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[10:10] <= 1'b1; + else if (clrn == 1'b0) dffe6a[10:10] <= 1'b0; + else if (ena == 1'b1) dffe6a[10:10] <= wire_dffe6a_D[10:10]; + assign + wire_dffe6a_D = (d & {11{(~ sclr)}}); + assign + ena = 1'b1, + prn = 1'b1, + q = dffe6a, + sclr = 1'b0; +endmodule //fifo_2k_dffpipe_dm2 + +//synthesis_resources = lut 11 +//synopsys translate_off +`timescale 1 ps / 1 ps +//synopsys translate_on +module fifo_2k_alt_synch_pipe_dm2 + ( + clock, + clrn, + d, + q) /* synthesis synthesis_clearbox=1 */ + /* synthesis ALTERA_ATTRIBUTE="X_ON_VIOLATION_OPTION=OFF" */; + input clock; + input clrn; + input [10:0] d; + output [10:0] q; + + wire [10:0] wire_dffpipe5_q; + + fifo_2k_dffpipe_dm2 dffpipe5 + ( + .clock(clock), + .clrn(clrn), + .d(d), + .q(wire_dffpipe5_q)); + assign + q = wire_dffpipe5_q; +endmodule //fifo_2k_alt_synch_pipe_dm2 + + +//lpm_add_sub DEVICE_FAMILY="Cyclone" LPM_DIRECTION="SUB" LPM_WIDTH=11 dataa datab result +//VERSION_BEGIN 5.0 cbx_cycloneii 2004:12:20:14:28:52:SJ cbx_lpm_add_sub 2005:04:12:13:30:42:SJ cbx_mgl 2005:05:19:13:51:58:SJ cbx_stratix 2005:06:02:09:53:04:SJ cbx_stratixii 2004:12:22:13:27:12:SJ VERSION_END + +//synthesis_resources = lut 11 +//synopsys translate_off +`timescale 1 ps / 1 ps +//synopsys translate_on +module fifo_2k_add_sub_a18 + ( + dataa, + datab, + result) /* synthesis synthesis_clearbox=1 */; + input [10:0] dataa; + input [10:0] datab; + output [10:0] result; + + wire [10:0] wire_add_sub_cella_combout; + wire [0:0] wire_add_sub_cella_0cout; + wire [0:0] wire_add_sub_cella_1cout; + wire [0:0] wire_add_sub_cella_2cout; + wire [0:0] wire_add_sub_cella_3cout; + wire [0:0] wire_add_sub_cella_4cout; + wire [0:0] wire_add_sub_cella_5cout; + wire [0:0] wire_add_sub_cella_6cout; + wire [0:0] wire_add_sub_cella_7cout; + wire [0:0] wire_add_sub_cella_8cout; + wire [0:0] wire_add_sub_cella_9cout; + wire [10:0] wire_add_sub_cella_dataa; + wire [10:0] wire_add_sub_cella_datab; + + cyclone_lcell add_sub_cella_0 + ( + .cin(1'b1), + .combout(wire_add_sub_cella_combout[0:0]), + .cout(wire_add_sub_cella_0cout[0:0]), + .dataa(wire_add_sub_cella_dataa[0:0]), + .datab(wire_add_sub_cella_datab[0:0]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_0.cin_used = "true", + add_sub_cella_0.lut_mask = "69b2", + add_sub_cella_0.operation_mode = "arithmetic", + add_sub_cella_0.sum_lutc_input = "cin", + add_sub_cella_0.lpm_type = "cyclone_lcell"; + cyclone_lcell add_sub_cella_1 + ( + .cin(wire_add_sub_cella_0cout[0:0]), + .combout(wire_add_sub_cella_combout[1:1]), + .cout(wire_add_sub_cella_1cout[0:0]), + .dataa(wire_add_sub_cella_dataa[1:1]), + .datab(wire_add_sub_cella_datab[1:1]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_1.cin_used = "true", + add_sub_cella_1.lut_mask = "69b2", + add_sub_cella_1.operation_mode = "arithmetic", + add_sub_cella_1.sum_lutc_input = "cin", + add_sub_cella_1.lpm_type = "cyclone_lcell"; + cyclone_lcell add_sub_cella_2 + ( + .cin(wire_add_sub_cella_1cout[0:0]), + .combout(wire_add_sub_cella_combout[2:2]), + .cout(wire_add_sub_cella_2cout[0:0]), + .dataa(wire_add_sub_cella_dataa[2:2]), + .datab(wire_add_sub_cella_datab[2:2]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_2.cin_used = "true", + add_sub_cella_2.lut_mask = "69b2", + add_sub_cella_2.operation_mode = "arithmetic", + add_sub_cella_2.sum_lutc_input = "cin", + add_sub_cella_2.lpm_type = "cyclone_lcell"; + cyclone_lcell add_sub_cella_3 + ( + .cin(wire_add_sub_cella_2cout[0:0]), + .combout(wire_add_sub_cella_combout[3:3]), + .cout(wire_add_sub_cella_3cout[0:0]), + .dataa(wire_add_sub_cella_dataa[3:3]), + .datab(wire_add_sub_cella_datab[3:3]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_3.cin_used = "true", + add_sub_cella_3.lut_mask = "69b2", + add_sub_cella_3.operation_mode = "arithmetic", + add_sub_cella_3.sum_lutc_input = "cin", + add_sub_cella_3.lpm_type = "cyclone_lcell"; + cyclone_lcell add_sub_cella_4 + ( + .cin(wire_add_sub_cella_3cout[0:0]), + .combout(wire_add_sub_cella_combout[4:4]), + .cout(wire_add_sub_cella_4cout[0:0]), + .dataa(wire_add_sub_cella_dataa[4:4]), + .datab(wire_add_sub_cella_datab[4:4]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_4.cin_used = "true", + add_sub_cella_4.lut_mask = "69b2", + add_sub_cella_4.operation_mode = "arithmetic", + add_sub_cella_4.sum_lutc_input = "cin", + add_sub_cella_4.lpm_type = "cyclone_lcell"; + cyclone_lcell add_sub_cella_5 + ( + .cin(wire_add_sub_cella_4cout[0:0]), + .combout(wire_add_sub_cella_combout[5:5]), + .cout(wire_add_sub_cella_5cout[0:0]), + .dataa(wire_add_sub_cella_dataa[5:5]), + .datab(wire_add_sub_cella_datab[5:5]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_5.cin_used = "true", + add_sub_cella_5.lut_mask = "69b2", + add_sub_cella_5.operation_mode = "arithmetic", + add_sub_cella_5.sum_lutc_input = "cin", + add_sub_cella_5.lpm_type = "cyclone_lcell"; + cyclone_lcell add_sub_cella_6 + ( + .cin(wire_add_sub_cella_5cout[0:0]), + .combout(wire_add_sub_cella_combout[6:6]), + .cout(wire_add_sub_cella_6cout[0:0]), + .dataa(wire_add_sub_cella_dataa[6:6]), + .datab(wire_add_sub_cella_datab[6:6]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_6.cin_used = "true", + add_sub_cella_6.lut_mask = "69b2", + add_sub_cella_6.operation_mode = "arithmetic", + add_sub_cella_6.sum_lutc_input = "cin", + add_sub_cella_6.lpm_type = "cyclone_lcell"; + cyclone_lcell add_sub_cella_7 + ( + .cin(wire_add_sub_cella_6cout[0:0]), + .combout(wire_add_sub_cella_combout[7:7]), + .cout(wire_add_sub_cella_7cout[0:0]), + .dataa(wire_add_sub_cella_dataa[7:7]), + .datab(wire_add_sub_cella_datab[7:7]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_7.cin_used = "true", + add_sub_cella_7.lut_mask = "69b2", + add_sub_cella_7.operation_mode = "arithmetic", + add_sub_cella_7.sum_lutc_input = "cin", + add_sub_cella_7.lpm_type = "cyclone_lcell"; + cyclone_lcell add_sub_cella_8 + ( + .cin(wire_add_sub_cella_7cout[0:0]), + .combout(wire_add_sub_cella_combout[8:8]), + .cout(wire_add_sub_cella_8cout[0:0]), + .dataa(wire_add_sub_cella_dataa[8:8]), + .datab(wire_add_sub_cella_datab[8:8]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_8.cin_used = "true", + add_sub_cella_8.lut_mask = "69b2", + add_sub_cella_8.operation_mode = "arithmetic", + add_sub_cella_8.sum_lutc_input = "cin", + add_sub_cella_8.lpm_type = "cyclone_lcell"; + cyclone_lcell add_sub_cella_9 + ( + .cin(wire_add_sub_cella_8cout[0:0]), + .combout(wire_add_sub_cella_combout[9:9]), + .cout(wire_add_sub_cella_9cout[0:0]), + .dataa(wire_add_sub_cella_dataa[9:9]), + .datab(wire_add_sub_cella_datab[9:9]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_9.cin_used = "true", + add_sub_cella_9.lut_mask = "69b2", + add_sub_cella_9.operation_mode = "arithmetic", + add_sub_cella_9.sum_lutc_input = "cin", + add_sub_cella_9.lpm_type = "cyclone_lcell"; + cyclone_lcell add_sub_cella_10 + ( + .cin(wire_add_sub_cella_9cout[0:0]), + .combout(wire_add_sub_cella_combout[10:10]), + .cout(), + .dataa(wire_add_sub_cella_dataa[10:10]), + .datab(wire_add_sub_cella_datab[10:10]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_10.cin_used = "true", + add_sub_cella_10.lut_mask = "6969", + add_sub_cella_10.operation_mode = "normal", + add_sub_cella_10.sum_lutc_input = "cin", + add_sub_cella_10.lpm_type = "cyclone_lcell"; + assign + wire_add_sub_cella_dataa = dataa, + wire_add_sub_cella_datab = datab; + assign + result = wire_add_sub_cella_combout; +endmodule //fifo_2k_add_sub_a18 + + +//lpm_compare DEVICE_FAMILY="Cyclone" LPM_WIDTH=11 aeb dataa datab +//VERSION_BEGIN 5.0 cbx_cycloneii 2004:12:20:14:28:52:SJ cbx_lpm_add_sub 2005:04:12:13:30:42:SJ cbx_lpm_compare 2004:11:30:11:30:40:SJ cbx_mgl 2005:05:19:13:51:58:SJ cbx_stratix 2005:06:02:09:53:04:SJ cbx_stratixii 2004:12:22:13:27:12:SJ VERSION_END + + +//lpm_compare DEVICE_FAMILY="Cyclone" LPM_WIDTH=11 aeb dataa datab +//VERSION_BEGIN 5.0 cbx_cycloneii 2004:12:20:14:28:52:SJ cbx_lpm_add_sub 2005:04:12:13:30:42:SJ cbx_lpm_compare 2004:11:30:11:30:40:SJ cbx_mgl 2005:05:19:13:51:58:SJ cbx_stratix 2005:06:02:09:53:04:SJ cbx_stratixii 2004:12:22:13:27:12:SJ VERSION_END + +//synthesis_resources = lut 97 M4K 8 +//synopsys translate_off +`timescale 1 ps / 1 ps +//synopsys translate_on +module fifo_2k_dcfifo_0cq + ( + aclr, + data, + q, + rdclk, + rdempty, + rdreq, + rdusedw, + wrclk, + wrfull, + wrreq, + wrusedw) /* synthesis synthesis_clearbox=1 */ + /* synthesis ALTERA_ATTRIBUTE="AUTO_SHIFT_REGISTER_RECOGNITION=OFF;{ -from \"rdptr_g|power_modified_counter_values\" -to \"ws_dgrp|dffpipe5|dffe6a\" }CUT=ON;{ -from \"delayed_wrptr_g\" -to \"rs_dgwp|dffpipe5|dffe6a\" }CUT=ON" */; + input aclr; + input [15:0] data; + output [15:0] q; + input rdclk; + output rdempty; + input rdreq; + output [10:0] rdusedw; + input wrclk; + output wrfull; + input wrreq; + output [10:0] wrusedw; + + wire [10:0] wire_rdptr_g_gray2bin_bin; + wire [10:0] wire_rs_dgwp_gray2bin_bin; + wire [10:0] wire_wrptr_g_gray2bin_bin; + wire [10:0] wire_ws_dgrp_gray2bin_bin; + wire [10:0] wire_rdptr_g_q; + wire [10:0] wire_rdptr_g1p_q; + wire [10:0] wire_wrptr_g1p_q; + wire [15:0] wire_fifo_ram_q_b; + reg [10:0] delayed_wrptr_g; + reg [10:0] wrptr_g; + wire [10:0] wire_rs_brp_q; + wire [10:0] wire_rs_bwp_q; + wire [10:0] wire_rs_dgwp_q; + wire [10:0] wire_ws_brp_q; + wire [10:0] wire_ws_bwp_q; + wire [10:0] wire_ws_dgrp_q; + wire [10:0] wire_rdusedw_sub_result; + wire [10:0] wire_wrusedw_sub_result; + reg wire_rdempty_eq_comp_aeb_int; + wire wire_rdempty_eq_comp_aeb; + wire [10:0] wire_rdempty_eq_comp_dataa; + wire [10:0] wire_rdempty_eq_comp_datab; + reg wire_wrfull_eq_comp_aeb_int; + wire wire_wrfull_eq_comp_aeb; + wire [10:0] wire_wrfull_eq_comp_dataa; + wire [10:0] wire_wrfull_eq_comp_datab; + wire int_rdempty; + wire int_wrfull; + wire valid_rdreq; + wire valid_wrreq; + + fifo_2k_a_gray2bin_8m4 rdptr_g_gray2bin + ( + .bin(wire_rdptr_g_gray2bin_bin), + .gray(wire_rdptr_g_q)); + fifo_2k_a_gray2bin_8m4 rs_dgwp_gray2bin + ( + .bin(wire_rs_dgwp_gray2bin_bin), + .gray(wire_rs_dgwp_q)); + fifo_2k_a_gray2bin_8m4 wrptr_g_gray2bin + ( + .bin(wire_wrptr_g_gray2bin_bin), + .gray(wrptr_g)); + fifo_2k_a_gray2bin_8m4 ws_dgrp_gray2bin + ( + .bin(wire_ws_dgrp_gray2bin_bin), + .gray(wire_ws_dgrp_q)); + fifo_2k_a_graycounter_726 rdptr_g + ( + .aclr(aclr), + .clock(rdclk), + .cnt_en(valid_rdreq), + .q(wire_rdptr_g_q)); + fifo_2k_a_graycounter_2r6 rdptr_g1p + ( + .aclr(aclr), + .clock(rdclk), + .cnt_en(valid_rdreq), + .q(wire_rdptr_g1p_q)); + fifo_2k_a_graycounter_2r6 wrptr_g1p + ( + .aclr(aclr), + .clock(wrclk), + .cnt_en(valid_wrreq), + .q(wire_wrptr_g1p_q)); + fifo_2k_altsyncram_6pl fifo_ram + ( + .address_a(wrptr_g), + .address_b(((wire_rdptr_g_q & {11{int_rdempty}}) | (wire_rdptr_g1p_q & {11{(~ int_rdempty)}}))), + .clock0(wrclk), + .clock1(rdclk), + .clocken1((valid_rdreq | int_rdempty)), + .data_a(data), + .q_b(wire_fifo_ram_q_b), + .wren_a(valid_wrreq)); + // synopsys translate_off + initial + delayed_wrptr_g = 0; + // synopsys translate_on + always @ ( posedge wrclk or posedge aclr) + if (aclr == 1'b1) delayed_wrptr_g <= 11'b0; + else delayed_wrptr_g <= wrptr_g; + // synopsys translate_off + initial + wrptr_g = 0; + // synopsys translate_on + always @ ( posedge wrclk or posedge aclr) + if (aclr == 1'b1) wrptr_g <= 11'b0; + else if (valid_wrreq == 1'b1) wrptr_g <= wire_wrptr_g1p_q; + fifo_2k_dffpipe_ab3 rs_brp + ( + .clock(rdclk), + .clrn((~ aclr)), + .d(wire_rdptr_g_gray2bin_bin), + .q(wire_rs_brp_q)); + fifo_2k_dffpipe_ab3 rs_bwp + ( + .clock(rdclk), + .clrn((~ aclr)), + .d(wire_rs_dgwp_gray2bin_bin), + .q(wire_rs_bwp_q)); + fifo_2k_alt_synch_pipe_dm2 rs_dgwp + ( + .clock(rdclk), + .clrn((~ aclr)), + .d(delayed_wrptr_g), + .q(wire_rs_dgwp_q)); + fifo_2k_dffpipe_ab3 ws_brp + ( + .clock(wrclk), + .clrn((~ aclr)), + .d(wire_ws_dgrp_gray2bin_bin), + .q(wire_ws_brp_q)); + fifo_2k_dffpipe_ab3 ws_bwp + ( + .clock(wrclk), + .clrn((~ aclr)), + .d(wire_wrptr_g_gray2bin_bin), + .q(wire_ws_bwp_q)); + fifo_2k_alt_synch_pipe_dm2 ws_dgrp + ( + .clock(wrclk), + .clrn((~ aclr)), + .d(wire_rdptr_g_q), + .q(wire_ws_dgrp_q)); + fifo_2k_add_sub_a18 rdusedw_sub + ( + .dataa(wire_rs_bwp_q), + .datab(wire_rs_brp_q), + .result(wire_rdusedw_sub_result)); + fifo_2k_add_sub_a18 wrusedw_sub + ( + .dataa(wire_ws_bwp_q), + .datab(wire_ws_brp_q), + .result(wire_wrusedw_sub_result)); + always @(wire_rdempty_eq_comp_dataa or wire_rdempty_eq_comp_datab) + if (wire_rdempty_eq_comp_dataa == wire_rdempty_eq_comp_datab) + begin + wire_rdempty_eq_comp_aeb_int = 1'b1; + end + else + begin + wire_rdempty_eq_comp_aeb_int = 1'b0; + end + assign + wire_rdempty_eq_comp_aeb = wire_rdempty_eq_comp_aeb_int; + assign + wire_rdempty_eq_comp_dataa = wire_rs_dgwp_q, + wire_rdempty_eq_comp_datab = wire_rdptr_g_q; + always @(wire_wrfull_eq_comp_dataa or wire_wrfull_eq_comp_datab) + if (wire_wrfull_eq_comp_dataa == wire_wrfull_eq_comp_datab) + begin + wire_wrfull_eq_comp_aeb_int = 1'b1; + end + else + begin + wire_wrfull_eq_comp_aeb_int = 1'b0; + end + assign + wire_wrfull_eq_comp_aeb = wire_wrfull_eq_comp_aeb_int; + assign + wire_wrfull_eq_comp_dataa = wire_ws_dgrp_q, + wire_wrfull_eq_comp_datab = wire_wrptr_g1p_q; + assign + int_rdempty = wire_rdempty_eq_comp_aeb, + int_wrfull = wire_wrfull_eq_comp_aeb, + q = wire_fifo_ram_q_b, + rdempty = int_rdempty, + rdusedw = wire_rdusedw_sub_result, + valid_rdreq = rdreq, + valid_wrreq = wrreq, + wrfull = int_wrfull, + wrusedw = wire_wrusedw_sub_result; +endmodule //fifo_2k_dcfifo_0cq +//VALID FILE + + +// synopsys translate_off +`timescale 1 ps / 1 ps +// synopsys translate_on +module fifo_2k ( + data, + wrreq, + rdreq, + rdclk, + wrclk, + aclr, + q, + rdempty, + rdusedw, + wrfull, + wrusedw)/* synthesis synthesis_clearbox = 1 */; + + input [15:0] data; + input wrreq; + input rdreq; + input rdclk; + input wrclk; + input aclr; + output [15:0] q; + output rdempty; + output [10:0] rdusedw; + output wrfull; + output [10:0] wrusedw; + + wire sub_wire0; + wire [10:0] sub_wire1; + wire sub_wire2; + wire [15:0] sub_wire3; + wire [10:0] sub_wire4; + wire rdempty = sub_wire0; + wire [10:0] wrusedw = sub_wire1[10:0]; + wire wrfull = sub_wire2; + wire [15:0] q = sub_wire3[15:0]; + wire [10:0] rdusedw = sub_wire4[10:0]; + + fifo_2k_dcfifo_0cq fifo_2k_dcfifo_0cq_component ( + .wrclk (wrclk), + .rdreq (rdreq), + .aclr (aclr), + .rdclk (rdclk), + .wrreq (wrreq), + .data (data), + .rdempty (sub_wire0), + .wrusedw (sub_wire1), + .wrfull (sub_wire2), + .q (sub_wire3), + .rdusedw (sub_wire4)); + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: Width NUMERIC "16" +// Retrieval info: PRIVATE: Depth NUMERIC "2048" +// Retrieval info: PRIVATE: Clock NUMERIC "4" +// Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "0" +// Retrieval info: PRIVATE: Full NUMERIC "1" +// Retrieval info: PRIVATE: Empty NUMERIC "1" +// Retrieval info: PRIVATE: UsedW NUMERIC "1" +// Retrieval info: PRIVATE: AlmostFull NUMERIC "0" +// Retrieval info: PRIVATE: AlmostEmpty NUMERIC "0" +// Retrieval info: PRIVATE: AlmostFullThr NUMERIC "-1" +// Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC "-1" +// Retrieval info: PRIVATE: sc_aclr NUMERIC "0" +// Retrieval info: PRIVATE: sc_sclr NUMERIC "0" +// Retrieval info: PRIVATE: rsFull NUMERIC "0" +// Retrieval info: PRIVATE: rsEmpty NUMERIC "1" +// Retrieval info: PRIVATE: rsUsedW NUMERIC "1" +// Retrieval info: PRIVATE: wsFull NUMERIC "1" +// Retrieval info: PRIVATE: wsEmpty NUMERIC "0" +// Retrieval info: PRIVATE: wsUsedW NUMERIC "1" +// Retrieval info: PRIVATE: dc_aclr NUMERIC "1" +// Retrieval info: PRIVATE: LegacyRREQ NUMERIC "0" +// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0" +// Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC "0" +// Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC "0" +// Retrieval info: PRIVATE: Optimize NUMERIC "2" +// Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC "1" +// Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "1" +// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "16" +// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "2048" +// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "11" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: CONSTANT: CLOCKS_ARE_SYNCHRONIZED STRING "FALSE" +// Retrieval info: CONSTANT: LPM_TYPE STRING "dcfifo" +// Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "ON" +// Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "OFF" +// Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "OFF" +// Retrieval info: CONSTANT: USE_EAB STRING "ON" +// Retrieval info: CONSTANT: ADD_RAM_OUTPUT_REGISTER STRING "OFF" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: USED_PORT: data 0 0 16 0 INPUT NODEFVAL data[15..0] +// Retrieval info: USED_PORT: q 0 0 16 0 OUTPUT NODEFVAL q[15..0] +// Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL wrreq +// Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL rdreq +// Retrieval info: USED_PORT: rdclk 0 0 0 0 INPUT NODEFVAL rdclk +// Retrieval info: USED_PORT: wrclk 0 0 0 0 INPUT NODEFVAL wrclk +// Retrieval info: USED_PORT: rdempty 0 0 0 0 OUTPUT NODEFVAL rdempty +// Retrieval info: USED_PORT: rdusedw 0 0 11 0 OUTPUT NODEFVAL rdusedw[10..0] +// Retrieval info: USED_PORT: wrfull 0 0 0 0 OUTPUT NODEFVAL wrfull +// Retrieval info: USED_PORT: wrusedw 0 0 11 0 OUTPUT NODEFVAL wrusedw[10..0] +// Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT GND aclr +// Retrieval info: CONNECT: @data 0 0 16 0 data 0 0 16 0 +// Retrieval info: CONNECT: q 0 0 16 0 @q 0 0 16 0 +// Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0 +// Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0 +// Retrieval info: CONNECT: @rdclk 0 0 0 0 rdclk 0 0 0 0 +// Retrieval info: CONNECT: @wrclk 0 0 0 0 wrclk 0 0 0 0 +// Retrieval info: CONNECT: rdempty 0 0 0 0 @rdempty 0 0 0 0 +// Retrieval info: CONNECT: rdusedw 0 0 11 0 @rdusedw 0 0 11 0 +// Retrieval info: CONNECT: wrfull 0 0 0 0 @wrfull 0 0 0 0 +// Retrieval info: CONNECT: wrusedw 0 0 11 0 @wrusedw 0 0 11 0 +// Retrieval info: CONNECT: @aclr 0 0 0 0 aclr 0 0 0 0 +// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k.inc FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k.cmp FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k.bsf FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k_inst.v FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k_bb.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k_waveforms.html TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k_wave*.jpg FALSE diff --git a/fpga/megacells/fifo_2k_bb.v b/fpga/megacells/fifo_2k_bb.v new file mode 100644 index 0000000..3fcc2a4 --- /dev/null +++ b/fpga/megacells/fifo_2k_bb.v @@ -0,0 +1,131 @@ +// megafunction wizard: %FIFO%VBB% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: dcfifo + +// ============================================================ +// File Name: fifo_2k.v +// Megafunction Name(s): +// dcfifo +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// +// 5.0 Build 168 06/22/2005 SP 1 SJ Web Edition +// ************************************************************ + +//Copyright (C) 1991-2005 Altera Corporation +//Your use of Altera Corporation's design tools, logic functions +//and other software and tools, and its AMPP partner logic +//functions, and any output files any of the foregoing +//(including device programming or simulation files), and any +//associated documentation or information are expressly subject +//to the terms and conditions of the Altera Program License +//Subscription Agreement, Altera MegaCore Function License +//Agreement, or other applicable license agreement, including, +//without limitation, that your use is for the sole purpose of +//programming logic devices manufactured by Altera and sold by +//Altera or its authorized distributors. Please refer to the +//applicable agreement for further details. + +module fifo_2k ( + data, + wrreq, + rdreq, + rdclk, + wrclk, + aclr, + q, + rdempty, + rdusedw, + wrfull, + wrusedw)/* synthesis synthesis_clearbox = 1 */; + + input [15:0] data; + input wrreq; + input rdreq; + input rdclk; + input wrclk; + input aclr; + output [15:0] q; + output rdempty; + output [10:0] rdusedw; + output wrfull; + output [10:0] wrusedw; + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: Width NUMERIC "16" +// Retrieval info: PRIVATE: Depth NUMERIC "2048" +// Retrieval info: PRIVATE: Clock NUMERIC "4" +// Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "0" +// Retrieval info: PRIVATE: Full NUMERIC "1" +// Retrieval info: PRIVATE: Empty NUMERIC "1" +// Retrieval info: PRIVATE: UsedW NUMERIC "1" +// Retrieval info: PRIVATE: AlmostFull NUMERIC "0" +// Retrieval info: PRIVATE: AlmostEmpty NUMERIC "0" +// Retrieval info: PRIVATE: AlmostFullThr NUMERIC "-1" +// Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC "-1" +// Retrieval info: PRIVATE: sc_aclr NUMERIC "0" +// Retrieval info: PRIVATE: sc_sclr NUMERIC "0" +// Retrieval info: PRIVATE: rsFull NUMERIC "0" +// Retrieval info: PRIVATE: rsEmpty NUMERIC "1" +// Retrieval info: PRIVATE: rsUsedW NUMERIC "1" +// Retrieval info: PRIVATE: wsFull NUMERIC "1" +// Retrieval info: PRIVATE: wsEmpty NUMERIC "0" +// Retrieval info: PRIVATE: wsUsedW NUMERIC "1" +// Retrieval info: PRIVATE: dc_aclr NUMERIC "1" +// Retrieval info: PRIVATE: LegacyRREQ NUMERIC "0" +// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0" +// Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC "0" +// Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC "0" +// Retrieval info: PRIVATE: Optimize NUMERIC "2" +// Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC "1" +// Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "1" +// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "16" +// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "2048" +// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "11" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: CONSTANT: CLOCKS_ARE_SYNCHRONIZED STRING "FALSE" +// Retrieval info: CONSTANT: LPM_TYPE STRING "dcfifo" +// Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "ON" +// Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "OFF" +// Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "OFF" +// Retrieval info: CONSTANT: USE_EAB STRING "ON" +// Retrieval info: CONSTANT: ADD_RAM_OUTPUT_REGISTER STRING "OFF" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: USED_PORT: data 0 0 16 0 INPUT NODEFVAL data[15..0] +// Retrieval info: USED_PORT: q 0 0 16 0 OUTPUT NODEFVAL q[15..0] +// Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL wrreq +// Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL rdreq +// Retrieval info: USED_PORT: rdclk 0 0 0 0 INPUT NODEFVAL rdclk +// Retrieval info: USED_PORT: wrclk 0 0 0 0 INPUT NODEFVAL wrclk +// Retrieval info: USED_PORT: rdempty 0 0 0 0 OUTPUT NODEFVAL rdempty +// Retrieval info: USED_PORT: rdusedw 0 0 11 0 OUTPUT NODEFVAL rdusedw[10..0] +// Retrieval info: USED_PORT: wrfull 0 0 0 0 OUTPUT NODEFVAL wrfull +// Retrieval info: USED_PORT: wrusedw 0 0 11 0 OUTPUT NODEFVAL wrusedw[10..0] +// Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT GND aclr +// Retrieval info: CONNECT: @data 0 0 16 0 data 0 0 16 0 +// Retrieval info: CONNECT: q 0 0 16 0 @q 0 0 16 0 +// Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0 +// Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0 +// Retrieval info: CONNECT: @rdclk 0 0 0 0 rdclk 0 0 0 0 +// Retrieval info: CONNECT: @wrclk 0 0 0 0 wrclk 0 0 0 0 +// Retrieval info: CONNECT: rdempty 0 0 0 0 @rdempty 0 0 0 0 +// Retrieval info: CONNECT: rdusedw 0 0 11 0 @rdusedw 0 0 11 0 +// Retrieval info: CONNECT: wrfull 0 0 0 0 @wrfull 0 0 0 0 +// Retrieval info: CONNECT: wrusedw 0 0 11 0 @wrusedw 0 0 11 0 +// Retrieval info: CONNECT: @aclr 0 0 0 0 aclr 0 0 0 0 +// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k.inc FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k.cmp FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k.bsf FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k_inst.v FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k_bb.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k_waveforms.html TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_2k_wave*.jpg FALSE diff --git a/fpga/megacells/fifo_4k.v b/fpga/megacells/fifo_4k.v new file mode 100644 index 0000000..a5ab466 --- /dev/null +++ b/fpga/megacells/fifo_4k.v @@ -0,0 +1,3495 @@ +// megafunction wizard: %FIFO%CBX% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: dcfifo + +// ============================================================ +// File Name: fifo_4k.v +// Megafunction Name(s): +// dcfifo +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// +// 5.0 Build 168 06/22/2005 SP 1 SJ Web Edition +// ************************************************************ + + +//Copyright (C) 1991-2005 Altera Corporation +//Your use of Altera Corporation's design tools, logic functions +//and other software and tools, and its AMPP partner logic +//functions, and any output files any of the foregoing +//(including device programming or simulation files), and any +//associated documentation or information are expressly subject +//to the terms and conditions of the Altera Program License +//Subscription Agreement, Altera MegaCore Function License +//Agreement, or other applicable license agreement, including, +//without limitation, that your use is for the sole purpose of +//programming logic devices manufactured by Altera and sold by +//Altera or its authorized distributors. Please refer to the +//applicable agreement for further details. + + +//dcfifo ADD_RAM_OUTPUT_REGISTER="OFF" CLOCKS_ARE_SYNCHRONIZED="FALSE" DEVICE_FAMILY="Cyclone" LPM_NUMWORDS=4096 LPM_SHOWAHEAD="ON" LPM_WIDTH=16 LPM_WIDTHU=12 OVERFLOW_CHECKING="OFF" UNDERFLOW_CHECKING="OFF" USE_EAB="ON" aclr data q rdclk rdempty rdreq rdusedw wrclk wrfull wrreq wrusedw +//VERSION_BEGIN 5.0 cbx_a_gray2bin 2004:03:06:00:52:20:SJ cbx_a_graycounter 2004:10:01:12:13:16:SJ cbx_altdpram 2004:11:30:11:29:56:SJ cbx_altsyncram 2005:03:24:13:58:56:SJ cbx_cycloneii 2004:12:20:14:28:52:SJ cbx_dcfifo 2005:03:07:17:11:14:SJ cbx_fifo_common 2004:12:13:14:26:24:SJ cbx_flex10ke 2002:10:18:16:54:38:SJ cbx_lpm_add_sub 2005:04:12:13:30:42:SJ cbx_lpm_compare 2004:11:30:11:30:40:SJ cbx_lpm_counter 2005:02:02:04:37:10:SJ cbx_lpm_decode 2004:12:13:14:19:12:SJ cbx_lpm_mux 2004:12:13:14:16:38:SJ cbx_mgl 2005:05:19:13:51:58:SJ cbx_scfifo 2005:03:10:10:52:20:SJ cbx_stratix 2005:06:02:09:53:04:SJ cbx_stratixii 2004:12:22:13:27:12:SJ cbx_util_mgl 2005:04:04:13:50:06:SJ VERSION_END + + +//a_gray2bin device_family="Cyclone" WIDTH=12 bin gray +//VERSION_BEGIN 5.0 cbx_a_gray2bin 2004:03:06:00:52:20:SJ cbx_mgl 2005:05:19:13:51:58:SJ VERSION_END + +//synthesis_resources = +//synopsys translate_off +`timescale 1 ps / 1 ps +//synopsys translate_on +module fifo_4k_a_gray2bin_9m4 + ( + bin, + gray) /* synthesis synthesis_clearbox=1 */; + output [11:0] bin; + input [11:0] gray; + + wire xor0; + wire xor1; + wire xor10; + wire xor2; + wire xor3; + wire xor4; + wire xor5; + wire xor6; + wire xor7; + wire xor8; + wire xor9; + + assign + bin = {gray[11], xor10, xor9, xor8, xor7, xor6, xor5, xor4, xor3, xor2, xor1, xor0}, + xor0 = (gray[0] ^ xor1), + xor1 = (gray[1] ^ xor2), + xor10 = (gray[11] ^ gray[10]), + xor2 = (gray[2] ^ xor3), + xor3 = (gray[3] ^ xor4), + xor4 = (gray[4] ^ xor5), + xor5 = (gray[5] ^ xor6), + xor6 = (gray[6] ^ xor7), + xor7 = (gray[7] ^ xor8), + xor8 = (gray[8] ^ xor9), + xor9 = (gray[9] ^ xor10); +endmodule //fifo_4k_a_gray2bin_9m4 + + +//a_graycounter DEVICE_FAMILY="Cyclone" WIDTH=12 aclr clock cnt_en q +//VERSION_BEGIN 5.0 cbx_a_gray2bin 2004:03:06:00:52:20:SJ cbx_a_graycounter 2004:10:01:12:13:16:SJ cbx_cycloneii 2004:12:20:14:28:52:SJ cbx_flex10ke 2002:10:18:16:54:38:SJ cbx_mgl 2005:05:19:13:51:58:SJ cbx_stratix 2005:06:02:09:53:04:SJ cbx_stratixii 2004:12:22:13:27:12:SJ VERSION_END + +//synthesis_resources = lut 13 +//synopsys translate_off +`timescale 1 ps / 1 ps +//synopsys translate_on +module fifo_4k_a_graycounter_826 + ( + aclr, + clock, + cnt_en, + q) /* synthesis synthesis_clearbox=1 */; + input aclr; + input clock; + input cnt_en; + output [11:0] q; + + wire [0:0] wire_countera_0cout; + wire [0:0] wire_countera_1cout; + wire [0:0] wire_countera_2cout; + wire [0:0] wire_countera_3cout; + wire [0:0] wire_countera_4cout; + wire [0:0] wire_countera_5cout; + wire [0:0] wire_countera_6cout; + wire [0:0] wire_countera_7cout; + wire [0:0] wire_countera_8cout; + wire [0:0] wire_countera_9cout; + wire [0:0] wire_countera_10cout; + wire [11:0] wire_countera_regout; + wire wire_parity_cout; + wire wire_parity_regout; + wire [11:0] power_modified_counter_values; + wire sclr; + wire updown; + + cyclone_lcell countera_0 + ( + .aclr(aclr), + .cin(wire_parity_cout), + .clk(clock), + .combout(), + .cout(wire_countera_0cout[0:0]), + .dataa(cnt_en), + .datab(wire_countera_regout[0:0]), + .ena(1'b1), + .regout(wire_countera_regout[0:0]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_0.cin_used = "true", + countera_0.lut_mask = "c6a0", + countera_0.operation_mode = "arithmetic", + countera_0.sum_lutc_input = "cin", + countera_0.synch_mode = "on", + countera_0.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_1 + ( + .aclr(aclr), + .cin(wire_countera_0cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_1cout[0:0]), + .dataa(power_modified_counter_values[0]), + .datab(power_modified_counter_values[1]), + .ena(1'b1), + .regout(wire_countera_regout[1:1]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_1.cin_used = "true", + countera_1.lut_mask = "6c50", + countera_1.operation_mode = "arithmetic", + countera_1.sum_lutc_input = "cin", + countera_1.synch_mode = "on", + countera_1.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_2 + ( + .aclr(aclr), + .cin(wire_countera_1cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_2cout[0:0]), + .dataa(power_modified_counter_values[1]), + .datab(power_modified_counter_values[2]), + .ena(1'b1), + .regout(wire_countera_regout[2:2]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_2.cin_used = "true", + countera_2.lut_mask = "6c50", + countera_2.operation_mode = "arithmetic", + countera_2.sum_lutc_input = "cin", + countera_2.synch_mode = "on", + countera_2.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_3 + ( + .aclr(aclr), + .cin(wire_countera_2cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_3cout[0:0]), + .dataa(power_modified_counter_values[2]), + .datab(power_modified_counter_values[3]), + .ena(1'b1), + .regout(wire_countera_regout[3:3]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_3.cin_used = "true", + countera_3.lut_mask = "6c50", + countera_3.operation_mode = "arithmetic", + countera_3.sum_lutc_input = "cin", + countera_3.synch_mode = "on", + countera_3.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_4 + ( + .aclr(aclr), + .cin(wire_countera_3cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_4cout[0:0]), + .dataa(power_modified_counter_values[3]), + .datab(power_modified_counter_values[4]), + .ena(1'b1), + .regout(wire_countera_regout[4:4]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_4.cin_used = "true", + countera_4.lut_mask = "6c50", + countera_4.operation_mode = "arithmetic", + countera_4.sum_lutc_input = "cin", + countera_4.synch_mode = "on", + countera_4.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_5 + ( + .aclr(aclr), + .cin(wire_countera_4cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_5cout[0:0]), + .dataa(power_modified_counter_values[4]), + .datab(power_modified_counter_values[5]), + .ena(1'b1), + .regout(wire_countera_regout[5:5]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_5.cin_used = "true", + countera_5.lut_mask = "6c50", + countera_5.operation_mode = "arithmetic", + countera_5.sum_lutc_input = "cin", + countera_5.synch_mode = "on", + countera_5.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_6 + ( + .aclr(aclr), + .cin(wire_countera_5cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_6cout[0:0]), + .dataa(power_modified_counter_values[5]), + .datab(power_modified_counter_values[6]), + .ena(1'b1), + .regout(wire_countera_regout[6:6]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_6.cin_used = "true", + countera_6.lut_mask = "6c50", + countera_6.operation_mode = "arithmetic", + countera_6.sum_lutc_input = "cin", + countera_6.synch_mode = "on", + countera_6.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_7 + ( + .aclr(aclr), + .cin(wire_countera_6cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_7cout[0:0]), + .dataa(power_modified_counter_values[6]), + .datab(power_modified_counter_values[7]), + .ena(1'b1), + .regout(wire_countera_regout[7:7]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_7.cin_used = "true", + countera_7.lut_mask = "6c50", + countera_7.operation_mode = "arithmetic", + countera_7.sum_lutc_input = "cin", + countera_7.synch_mode = "on", + countera_7.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_8 + ( + .aclr(aclr), + .cin(wire_countera_7cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_8cout[0:0]), + .dataa(power_modified_counter_values[7]), + .datab(power_modified_counter_values[8]), + .ena(1'b1), + .regout(wire_countera_regout[8:8]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_8.cin_used = "true", + countera_8.lut_mask = "6c50", + countera_8.operation_mode = "arithmetic", + countera_8.sum_lutc_input = "cin", + countera_8.synch_mode = "on", + countera_8.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_9 + ( + .aclr(aclr), + .cin(wire_countera_8cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_9cout[0:0]), + .dataa(power_modified_counter_values[8]), + .datab(power_modified_counter_values[9]), + .ena(1'b1), + .regout(wire_countera_regout[9:9]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_9.cin_used = "true", + countera_9.lut_mask = "6c50", + countera_9.operation_mode = "arithmetic", + countera_9.sum_lutc_input = "cin", + countera_9.synch_mode = "on", + countera_9.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_10 + ( + .aclr(aclr), + .cin(wire_countera_9cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_10cout[0:0]), + .dataa(power_modified_counter_values[9]), + .datab(power_modified_counter_values[10]), + .ena(1'b1), + .regout(wire_countera_regout[10:10]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_10.cin_used = "true", + countera_10.lut_mask = "6c50", + countera_10.operation_mode = "arithmetic", + countera_10.sum_lutc_input = "cin", + countera_10.synch_mode = "on", + countera_10.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_11 + ( + .aclr(aclr), + .cin(wire_countera_10cout[0:0]), + .clk(clock), + .combout(), + .cout(), + .dataa(power_modified_counter_values[11]), + .ena(1'b1), + .regout(wire_countera_regout[11:11]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datab(1'b1), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_11.cin_used = "true", + countera_11.lut_mask = "5a5a", + countera_11.operation_mode = "normal", + countera_11.sum_lutc_input = "cin", + countera_11.synch_mode = "on", + countera_11.lpm_type = "cyclone_lcell"; + cyclone_lcell parity + ( + .aclr(aclr), + .cin(updown), + .clk(clock), + .combout(), + .cout(wire_parity_cout), + .dataa(cnt_en), + .datab(wire_parity_regout), + .ena(1'b1), + .regout(wire_parity_regout), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + parity.cin_used = "true", + parity.lut_mask = "6682", + parity.operation_mode = "arithmetic", + parity.synch_mode = "on", + parity.lpm_type = "cyclone_lcell"; + assign + power_modified_counter_values = {wire_countera_regout[11:0]}, + q = power_modified_counter_values, + sclr = 1'b0, + updown = 1'b1; +endmodule //fifo_4k_a_graycounter_826 + + +//a_graycounter DEVICE_FAMILY="Cyclone" PVALUE=1 WIDTH=12 aclr clock cnt_en q +//VERSION_BEGIN 5.0 cbx_a_gray2bin 2004:03:06:00:52:20:SJ cbx_a_graycounter 2004:10:01:12:13:16:SJ cbx_cycloneii 2004:12:20:14:28:52:SJ cbx_flex10ke 2002:10:18:16:54:38:SJ cbx_mgl 2005:05:19:13:51:58:SJ cbx_stratix 2005:06:02:09:53:04:SJ cbx_stratixii 2004:12:22:13:27:12:SJ VERSION_END + +//synthesis_resources = lut 13 +//synopsys translate_off +`timescale 1 ps / 1 ps +//synopsys translate_on +module fifo_4k_a_graycounter_3r6 + ( + aclr, + clock, + cnt_en, + q) /* synthesis synthesis_clearbox=1 */; + input aclr; + input clock; + input cnt_en; + output [11:0] q; + + wire [0:0] wire_countera_0cout; + wire [0:0] wire_countera_1cout; + wire [0:0] wire_countera_2cout; + wire [0:0] wire_countera_3cout; + wire [0:0] wire_countera_4cout; + wire [0:0] wire_countera_5cout; + wire [0:0] wire_countera_6cout; + wire [0:0] wire_countera_7cout; + wire [0:0] wire_countera_8cout; + wire [0:0] wire_countera_9cout; + wire [0:0] wire_countera_10cout; + wire [11:0] wire_countera_regout; + wire wire_parity_cout; + wire wire_parity_regout; + wire [11:0] power_modified_counter_values; + wire sclr; + wire updown; + + cyclone_lcell countera_0 + ( + .aclr(aclr), + .cin(wire_parity_cout), + .clk(clock), + .combout(), + .cout(wire_countera_0cout[0:0]), + .dataa(cnt_en), + .datab(wire_countera_regout[0:0]), + .ena(1'b1), + .regout(wire_countera_regout[0:0]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_0.cin_used = "true", + countera_0.lut_mask = "c6a0", + countera_0.operation_mode = "arithmetic", + countera_0.sum_lutc_input = "cin", + countera_0.synch_mode = "on", + countera_0.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_1 + ( + .aclr(aclr), + .cin(wire_countera_0cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_1cout[0:0]), + .dataa(power_modified_counter_values[0]), + .datab(power_modified_counter_values[1]), + .ena(1'b1), + .regout(wire_countera_regout[1:1]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_1.cin_used = "true", + countera_1.lut_mask = "6c50", + countera_1.operation_mode = "arithmetic", + countera_1.sum_lutc_input = "cin", + countera_1.synch_mode = "on", + countera_1.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_2 + ( + .aclr(aclr), + .cin(wire_countera_1cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_2cout[0:0]), + .dataa(power_modified_counter_values[1]), + .datab(power_modified_counter_values[2]), + .ena(1'b1), + .regout(wire_countera_regout[2:2]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_2.cin_used = "true", + countera_2.lut_mask = "6c50", + countera_2.operation_mode = "arithmetic", + countera_2.sum_lutc_input = "cin", + countera_2.synch_mode = "on", + countera_2.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_3 + ( + .aclr(aclr), + .cin(wire_countera_2cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_3cout[0:0]), + .dataa(power_modified_counter_values[2]), + .datab(power_modified_counter_values[3]), + .ena(1'b1), + .regout(wire_countera_regout[3:3]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_3.cin_used = "true", + countera_3.lut_mask = "6c50", + countera_3.operation_mode = "arithmetic", + countera_3.sum_lutc_input = "cin", + countera_3.synch_mode = "on", + countera_3.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_4 + ( + .aclr(aclr), + .cin(wire_countera_3cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_4cout[0:0]), + .dataa(power_modified_counter_values[3]), + .datab(power_modified_counter_values[4]), + .ena(1'b1), + .regout(wire_countera_regout[4:4]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_4.cin_used = "true", + countera_4.lut_mask = "6c50", + countera_4.operation_mode = "arithmetic", + countera_4.sum_lutc_input = "cin", + countera_4.synch_mode = "on", + countera_4.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_5 + ( + .aclr(aclr), + .cin(wire_countera_4cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_5cout[0:0]), + .dataa(power_modified_counter_values[4]), + .datab(power_modified_counter_values[5]), + .ena(1'b1), + .regout(wire_countera_regout[5:5]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_5.cin_used = "true", + countera_5.lut_mask = "6c50", + countera_5.operation_mode = "arithmetic", + countera_5.sum_lutc_input = "cin", + countera_5.synch_mode = "on", + countera_5.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_6 + ( + .aclr(aclr), + .cin(wire_countera_5cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_6cout[0:0]), + .dataa(power_modified_counter_values[5]), + .datab(power_modified_counter_values[6]), + .ena(1'b1), + .regout(wire_countera_regout[6:6]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_6.cin_used = "true", + countera_6.lut_mask = "6c50", + countera_6.operation_mode = "arithmetic", + countera_6.sum_lutc_input = "cin", + countera_6.synch_mode = "on", + countera_6.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_7 + ( + .aclr(aclr), + .cin(wire_countera_6cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_7cout[0:0]), + .dataa(power_modified_counter_values[6]), + .datab(power_modified_counter_values[7]), + .ena(1'b1), + .regout(wire_countera_regout[7:7]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_7.cin_used = "true", + countera_7.lut_mask = "6c50", + countera_7.operation_mode = "arithmetic", + countera_7.sum_lutc_input = "cin", + countera_7.synch_mode = "on", + countera_7.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_8 + ( + .aclr(aclr), + .cin(wire_countera_7cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_8cout[0:0]), + .dataa(power_modified_counter_values[7]), + .datab(power_modified_counter_values[8]), + .ena(1'b1), + .regout(wire_countera_regout[8:8]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_8.cin_used = "true", + countera_8.lut_mask = "6c50", + countera_8.operation_mode = "arithmetic", + countera_8.sum_lutc_input = "cin", + countera_8.synch_mode = "on", + countera_8.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_9 + ( + .aclr(aclr), + .cin(wire_countera_8cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_9cout[0:0]), + .dataa(power_modified_counter_values[8]), + .datab(power_modified_counter_values[9]), + .ena(1'b1), + .regout(wire_countera_regout[9:9]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_9.cin_used = "true", + countera_9.lut_mask = "6c50", + countera_9.operation_mode = "arithmetic", + countera_9.sum_lutc_input = "cin", + countera_9.synch_mode = "on", + countera_9.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_10 + ( + .aclr(aclr), + .cin(wire_countera_9cout[0:0]), + .clk(clock), + .combout(), + .cout(wire_countera_10cout[0:0]), + .dataa(power_modified_counter_values[9]), + .datab(power_modified_counter_values[10]), + .ena(1'b1), + .regout(wire_countera_regout[10:10]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_10.cin_used = "true", + countera_10.lut_mask = "6c50", + countera_10.operation_mode = "arithmetic", + countera_10.sum_lutc_input = "cin", + countera_10.synch_mode = "on", + countera_10.lpm_type = "cyclone_lcell"; + cyclone_lcell countera_11 + ( + .aclr(aclr), + .cin(wire_countera_10cout[0:0]), + .clk(clock), + .combout(), + .cout(), + .dataa(power_modified_counter_values[11]), + .ena(1'b1), + .regout(wire_countera_regout[11:11]), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datab(1'b1), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + countera_11.cin_used = "true", + countera_11.lut_mask = "5a5a", + countera_11.operation_mode = "normal", + countera_11.sum_lutc_input = "cin", + countera_11.synch_mode = "on", + countera_11.lpm_type = "cyclone_lcell"; + cyclone_lcell parity + ( + .aclr(aclr), + .cin(updown), + .clk(clock), + .combout(), + .cout(wire_parity_cout), + .dataa(cnt_en), + .datab((~ wire_parity_regout)), + .ena(1'b1), + .regout(wire_parity_regout), + .sclr(sclr) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aload(1'b0), + .datac(1'b1), + .datad(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + parity.cin_used = "true", + parity.lut_mask = "9982", + parity.operation_mode = "arithmetic", + parity.synch_mode = "on", + parity.lpm_type = "cyclone_lcell"; + assign + power_modified_counter_values = {wire_countera_regout[11:1], (~ wire_countera_regout[0])}, + q = power_modified_counter_values, + sclr = 1'b0, + updown = 1'b1; +endmodule //fifo_4k_a_graycounter_3r6 + + +//altsyncram ADDRESS_REG_B="CLOCK1" DEVICE_FAMILY="Cyclone" OPERATION_MODE="DUAL_PORT" OUTDATA_REG_B="UNREGISTERED" WIDTH_A=16 WIDTH_B=16 WIDTH_BYTEENA_A=1 WIDTHAD_A=12 WIDTHAD_B=12 address_a address_b clock0 clock1 clocken1 data_a q_b wren_a +//VERSION_BEGIN 5.0 cbx_altsyncram 2005:03:24:13:58:56:SJ cbx_cycloneii 2004:12:20:14:28:52:SJ cbx_lpm_add_sub 2005:04:12:13:30:42:SJ cbx_lpm_compare 2004:11:30:11:30:40:SJ cbx_lpm_decode 2004:12:13:14:19:12:SJ cbx_lpm_mux 2004:12:13:14:16:38:SJ cbx_mgl 2005:05:19:13:51:58:SJ cbx_stratix 2005:06:02:09:53:04:SJ cbx_stratixii 2004:12:22:13:27:12:SJ cbx_util_mgl 2005:04:04:13:50:06:SJ VERSION_END + +//synthesis_resources = M4K 16 +//synopsys translate_off +`timescale 1 ps / 1 ps +//synopsys translate_on +module fifo_4k_altsyncram_8pl + ( + address_a, + address_b, + clock0, + clock1, + clocken1, + data_a, + q_b, + wren_a) /* synthesis synthesis_clearbox=1 */; + input [11:0] address_a; + input [11:0] address_b; + input clock0; + input clock1; + input clocken1; + input [15:0] data_a; + output [15:0] q_b; + input wren_a; + + wire [0:0] wire_ram_block3a_0portbdataout; + wire [0:0] wire_ram_block3a_1portbdataout; + wire [0:0] wire_ram_block3a_2portbdataout; + wire [0:0] wire_ram_block3a_3portbdataout; + wire [0:0] wire_ram_block3a_4portbdataout; + wire [0:0] wire_ram_block3a_5portbdataout; + wire [0:0] wire_ram_block3a_6portbdataout; + wire [0:0] wire_ram_block3a_7portbdataout; + wire [0:0] wire_ram_block3a_8portbdataout; + wire [0:0] wire_ram_block3a_9portbdataout; + wire [0:0] wire_ram_block3a_10portbdataout; + wire [0:0] wire_ram_block3a_11portbdataout; + wire [0:0] wire_ram_block3a_12portbdataout; + wire [0:0] wire_ram_block3a_13portbdataout; + wire [0:0] wire_ram_block3a_14portbdataout; + wire [0:0] wire_ram_block3a_15portbdataout; + wire [11:0] address_a_wire; + wire [11:0] address_b_wire; + + cyclone_ram_block ram_block3a_0 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[11:0]}), + .portadatain({data_a[0]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[11:0]}), + .portbdataout(wire_ram_block3a_0portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_0.connectivity_checking = "OFF", + ram_block3a_0.logical_ram_name = "ALTSYNCRAM", + ram_block3a_0.mixed_port_feed_through_mode = "dont_care", + ram_block3a_0.operation_mode = "dual_port", + ram_block3a_0.port_a_address_width = 12, + ram_block3a_0.port_a_data_width = 1, + ram_block3a_0.port_a_first_address = 0, + ram_block3a_0.port_a_first_bit_number = 0, + ram_block3a_0.port_a_last_address = 4095, + ram_block3a_0.port_a_logical_ram_depth = 4096, + ram_block3a_0.port_a_logical_ram_width = 16, + ram_block3a_0.port_b_address_clear = "none", + ram_block3a_0.port_b_address_clock = "clock1", + ram_block3a_0.port_b_address_width = 12, + ram_block3a_0.port_b_data_out_clear = "none", + ram_block3a_0.port_b_data_out_clock = "none", + ram_block3a_0.port_b_data_width = 1, + ram_block3a_0.port_b_first_address = 0, + ram_block3a_0.port_b_first_bit_number = 0, + ram_block3a_0.port_b_last_address = 4095, + ram_block3a_0.port_b_logical_ram_depth = 4096, + ram_block3a_0.port_b_logical_ram_width = 16, + ram_block3a_0.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_0.ram_block_type = "auto", + ram_block3a_0.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_1 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[11:0]}), + .portadatain({data_a[1]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[11:0]}), + .portbdataout(wire_ram_block3a_1portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_1.connectivity_checking = "OFF", + ram_block3a_1.logical_ram_name = "ALTSYNCRAM", + ram_block3a_1.mixed_port_feed_through_mode = "dont_care", + ram_block3a_1.operation_mode = "dual_port", + ram_block3a_1.port_a_address_width = 12, + ram_block3a_1.port_a_data_width = 1, + ram_block3a_1.port_a_first_address = 0, + ram_block3a_1.port_a_first_bit_number = 1, + ram_block3a_1.port_a_last_address = 4095, + ram_block3a_1.port_a_logical_ram_depth = 4096, + ram_block3a_1.port_a_logical_ram_width = 16, + ram_block3a_1.port_b_address_clear = "none", + ram_block3a_1.port_b_address_clock = "clock1", + ram_block3a_1.port_b_address_width = 12, + ram_block3a_1.port_b_data_out_clear = "none", + ram_block3a_1.port_b_data_out_clock = "none", + ram_block3a_1.port_b_data_width = 1, + ram_block3a_1.port_b_first_address = 0, + ram_block3a_1.port_b_first_bit_number = 1, + ram_block3a_1.port_b_last_address = 4095, + ram_block3a_1.port_b_logical_ram_depth = 4096, + ram_block3a_1.port_b_logical_ram_width = 16, + ram_block3a_1.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_1.ram_block_type = "auto", + ram_block3a_1.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_2 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[11:0]}), + .portadatain({data_a[2]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[11:0]}), + .portbdataout(wire_ram_block3a_2portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_2.connectivity_checking = "OFF", + ram_block3a_2.logical_ram_name = "ALTSYNCRAM", + ram_block3a_2.mixed_port_feed_through_mode = "dont_care", + ram_block3a_2.operation_mode = "dual_port", + ram_block3a_2.port_a_address_width = 12, + ram_block3a_2.port_a_data_width = 1, + ram_block3a_2.port_a_first_address = 0, + ram_block3a_2.port_a_first_bit_number = 2, + ram_block3a_2.port_a_last_address = 4095, + ram_block3a_2.port_a_logical_ram_depth = 4096, + ram_block3a_2.port_a_logical_ram_width = 16, + ram_block3a_2.port_b_address_clear = "none", + ram_block3a_2.port_b_address_clock = "clock1", + ram_block3a_2.port_b_address_width = 12, + ram_block3a_2.port_b_data_out_clear = "none", + ram_block3a_2.port_b_data_out_clock = "none", + ram_block3a_2.port_b_data_width = 1, + ram_block3a_2.port_b_first_address = 0, + ram_block3a_2.port_b_first_bit_number = 2, + ram_block3a_2.port_b_last_address = 4095, + ram_block3a_2.port_b_logical_ram_depth = 4096, + ram_block3a_2.port_b_logical_ram_width = 16, + ram_block3a_2.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_2.ram_block_type = "auto", + ram_block3a_2.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_3 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[11:0]}), + .portadatain({data_a[3]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[11:0]}), + .portbdataout(wire_ram_block3a_3portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_3.connectivity_checking = "OFF", + ram_block3a_3.logical_ram_name = "ALTSYNCRAM", + ram_block3a_3.mixed_port_feed_through_mode = "dont_care", + ram_block3a_3.operation_mode = "dual_port", + ram_block3a_3.port_a_address_width = 12, + ram_block3a_3.port_a_data_width = 1, + ram_block3a_3.port_a_first_address = 0, + ram_block3a_3.port_a_first_bit_number = 3, + ram_block3a_3.port_a_last_address = 4095, + ram_block3a_3.port_a_logical_ram_depth = 4096, + ram_block3a_3.port_a_logical_ram_width = 16, + ram_block3a_3.port_b_address_clear = "none", + ram_block3a_3.port_b_address_clock = "clock1", + ram_block3a_3.port_b_address_width = 12, + ram_block3a_3.port_b_data_out_clear = "none", + ram_block3a_3.port_b_data_out_clock = "none", + ram_block3a_3.port_b_data_width = 1, + ram_block3a_3.port_b_first_address = 0, + ram_block3a_3.port_b_first_bit_number = 3, + ram_block3a_3.port_b_last_address = 4095, + ram_block3a_3.port_b_logical_ram_depth = 4096, + ram_block3a_3.port_b_logical_ram_width = 16, + ram_block3a_3.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_3.ram_block_type = "auto", + ram_block3a_3.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_4 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[11:0]}), + .portadatain({data_a[4]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[11:0]}), + .portbdataout(wire_ram_block3a_4portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_4.connectivity_checking = "OFF", + ram_block3a_4.logical_ram_name = "ALTSYNCRAM", + ram_block3a_4.mixed_port_feed_through_mode = "dont_care", + ram_block3a_4.operation_mode = "dual_port", + ram_block3a_4.port_a_address_width = 12, + ram_block3a_4.port_a_data_width = 1, + ram_block3a_4.port_a_first_address = 0, + ram_block3a_4.port_a_first_bit_number = 4, + ram_block3a_4.port_a_last_address = 4095, + ram_block3a_4.port_a_logical_ram_depth = 4096, + ram_block3a_4.port_a_logical_ram_width = 16, + ram_block3a_4.port_b_address_clear = "none", + ram_block3a_4.port_b_address_clock = "clock1", + ram_block3a_4.port_b_address_width = 12, + ram_block3a_4.port_b_data_out_clear = "none", + ram_block3a_4.port_b_data_out_clock = "none", + ram_block3a_4.port_b_data_width = 1, + ram_block3a_4.port_b_first_address = 0, + ram_block3a_4.port_b_first_bit_number = 4, + ram_block3a_4.port_b_last_address = 4095, + ram_block3a_4.port_b_logical_ram_depth = 4096, + ram_block3a_4.port_b_logical_ram_width = 16, + ram_block3a_4.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_4.ram_block_type = "auto", + ram_block3a_4.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_5 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[11:0]}), + .portadatain({data_a[5]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[11:0]}), + .portbdataout(wire_ram_block3a_5portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_5.connectivity_checking = "OFF", + ram_block3a_5.logical_ram_name = "ALTSYNCRAM", + ram_block3a_5.mixed_port_feed_through_mode = "dont_care", + ram_block3a_5.operation_mode = "dual_port", + ram_block3a_5.port_a_address_width = 12, + ram_block3a_5.port_a_data_width = 1, + ram_block3a_5.port_a_first_address = 0, + ram_block3a_5.port_a_first_bit_number = 5, + ram_block3a_5.port_a_last_address = 4095, + ram_block3a_5.port_a_logical_ram_depth = 4096, + ram_block3a_5.port_a_logical_ram_width = 16, + ram_block3a_5.port_b_address_clear = "none", + ram_block3a_5.port_b_address_clock = "clock1", + ram_block3a_5.port_b_address_width = 12, + ram_block3a_5.port_b_data_out_clear = "none", + ram_block3a_5.port_b_data_out_clock = "none", + ram_block3a_5.port_b_data_width = 1, + ram_block3a_5.port_b_first_address = 0, + ram_block3a_5.port_b_first_bit_number = 5, + ram_block3a_5.port_b_last_address = 4095, + ram_block3a_5.port_b_logical_ram_depth = 4096, + ram_block3a_5.port_b_logical_ram_width = 16, + ram_block3a_5.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_5.ram_block_type = "auto", + ram_block3a_5.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_6 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[11:0]}), + .portadatain({data_a[6]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[11:0]}), + .portbdataout(wire_ram_block3a_6portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_6.connectivity_checking = "OFF", + ram_block3a_6.logical_ram_name = "ALTSYNCRAM", + ram_block3a_6.mixed_port_feed_through_mode = "dont_care", + ram_block3a_6.operation_mode = "dual_port", + ram_block3a_6.port_a_address_width = 12, + ram_block3a_6.port_a_data_width = 1, + ram_block3a_6.port_a_first_address = 0, + ram_block3a_6.port_a_first_bit_number = 6, + ram_block3a_6.port_a_last_address = 4095, + ram_block3a_6.port_a_logical_ram_depth = 4096, + ram_block3a_6.port_a_logical_ram_width = 16, + ram_block3a_6.port_b_address_clear = "none", + ram_block3a_6.port_b_address_clock = "clock1", + ram_block3a_6.port_b_address_width = 12, + ram_block3a_6.port_b_data_out_clear = "none", + ram_block3a_6.port_b_data_out_clock = "none", + ram_block3a_6.port_b_data_width = 1, + ram_block3a_6.port_b_first_address = 0, + ram_block3a_6.port_b_first_bit_number = 6, + ram_block3a_6.port_b_last_address = 4095, + ram_block3a_6.port_b_logical_ram_depth = 4096, + ram_block3a_6.port_b_logical_ram_width = 16, + ram_block3a_6.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_6.ram_block_type = "auto", + ram_block3a_6.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_7 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[11:0]}), + .portadatain({data_a[7]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[11:0]}), + .portbdataout(wire_ram_block3a_7portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_7.connectivity_checking = "OFF", + ram_block3a_7.logical_ram_name = "ALTSYNCRAM", + ram_block3a_7.mixed_port_feed_through_mode = "dont_care", + ram_block3a_7.operation_mode = "dual_port", + ram_block3a_7.port_a_address_width = 12, + ram_block3a_7.port_a_data_width = 1, + ram_block3a_7.port_a_first_address = 0, + ram_block3a_7.port_a_first_bit_number = 7, + ram_block3a_7.port_a_last_address = 4095, + ram_block3a_7.port_a_logical_ram_depth = 4096, + ram_block3a_7.port_a_logical_ram_width = 16, + ram_block3a_7.port_b_address_clear = "none", + ram_block3a_7.port_b_address_clock = "clock1", + ram_block3a_7.port_b_address_width = 12, + ram_block3a_7.port_b_data_out_clear = "none", + ram_block3a_7.port_b_data_out_clock = "none", + ram_block3a_7.port_b_data_width = 1, + ram_block3a_7.port_b_first_address = 0, + ram_block3a_7.port_b_first_bit_number = 7, + ram_block3a_7.port_b_last_address = 4095, + ram_block3a_7.port_b_logical_ram_depth = 4096, + ram_block3a_7.port_b_logical_ram_width = 16, + ram_block3a_7.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_7.ram_block_type = "auto", + ram_block3a_7.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_8 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[11:0]}), + .portadatain({data_a[8]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[11:0]}), + .portbdataout(wire_ram_block3a_8portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_8.connectivity_checking = "OFF", + ram_block3a_8.logical_ram_name = "ALTSYNCRAM", + ram_block3a_8.mixed_port_feed_through_mode = "dont_care", + ram_block3a_8.operation_mode = "dual_port", + ram_block3a_8.port_a_address_width = 12, + ram_block3a_8.port_a_data_width = 1, + ram_block3a_8.port_a_first_address = 0, + ram_block3a_8.port_a_first_bit_number = 8, + ram_block3a_8.port_a_last_address = 4095, + ram_block3a_8.port_a_logical_ram_depth = 4096, + ram_block3a_8.port_a_logical_ram_width = 16, + ram_block3a_8.port_b_address_clear = "none", + ram_block3a_8.port_b_address_clock = "clock1", + ram_block3a_8.port_b_address_width = 12, + ram_block3a_8.port_b_data_out_clear = "none", + ram_block3a_8.port_b_data_out_clock = "none", + ram_block3a_8.port_b_data_width = 1, + ram_block3a_8.port_b_first_address = 0, + ram_block3a_8.port_b_first_bit_number = 8, + ram_block3a_8.port_b_last_address = 4095, + ram_block3a_8.port_b_logical_ram_depth = 4096, + ram_block3a_8.port_b_logical_ram_width = 16, + ram_block3a_8.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_8.ram_block_type = "auto", + ram_block3a_8.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_9 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[11:0]}), + .portadatain({data_a[9]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[11:0]}), + .portbdataout(wire_ram_block3a_9portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_9.connectivity_checking = "OFF", + ram_block3a_9.logical_ram_name = "ALTSYNCRAM", + ram_block3a_9.mixed_port_feed_through_mode = "dont_care", + ram_block3a_9.operation_mode = "dual_port", + ram_block3a_9.port_a_address_width = 12, + ram_block3a_9.port_a_data_width = 1, + ram_block3a_9.port_a_first_address = 0, + ram_block3a_9.port_a_first_bit_number = 9, + ram_block3a_9.port_a_last_address = 4095, + ram_block3a_9.port_a_logical_ram_depth = 4096, + ram_block3a_9.port_a_logical_ram_width = 16, + ram_block3a_9.port_b_address_clear = "none", + ram_block3a_9.port_b_address_clock = "clock1", + ram_block3a_9.port_b_address_width = 12, + ram_block3a_9.port_b_data_out_clear = "none", + ram_block3a_9.port_b_data_out_clock = "none", + ram_block3a_9.port_b_data_width = 1, + ram_block3a_9.port_b_first_address = 0, + ram_block3a_9.port_b_first_bit_number = 9, + ram_block3a_9.port_b_last_address = 4095, + ram_block3a_9.port_b_logical_ram_depth = 4096, + ram_block3a_9.port_b_logical_ram_width = 16, + ram_block3a_9.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_9.ram_block_type = "auto", + ram_block3a_9.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_10 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[11:0]}), + .portadatain({data_a[10]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[11:0]}), + .portbdataout(wire_ram_block3a_10portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_10.connectivity_checking = "OFF", + ram_block3a_10.logical_ram_name = "ALTSYNCRAM", + ram_block3a_10.mixed_port_feed_through_mode = "dont_care", + ram_block3a_10.operation_mode = "dual_port", + ram_block3a_10.port_a_address_width = 12, + ram_block3a_10.port_a_data_width = 1, + ram_block3a_10.port_a_first_address = 0, + ram_block3a_10.port_a_first_bit_number = 10, + ram_block3a_10.port_a_last_address = 4095, + ram_block3a_10.port_a_logical_ram_depth = 4096, + ram_block3a_10.port_a_logical_ram_width = 16, + ram_block3a_10.port_b_address_clear = "none", + ram_block3a_10.port_b_address_clock = "clock1", + ram_block3a_10.port_b_address_width = 12, + ram_block3a_10.port_b_data_out_clear = "none", + ram_block3a_10.port_b_data_out_clock = "none", + ram_block3a_10.port_b_data_width = 1, + ram_block3a_10.port_b_first_address = 0, + ram_block3a_10.port_b_first_bit_number = 10, + ram_block3a_10.port_b_last_address = 4095, + ram_block3a_10.port_b_logical_ram_depth = 4096, + ram_block3a_10.port_b_logical_ram_width = 16, + ram_block3a_10.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_10.ram_block_type = "auto", + ram_block3a_10.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_11 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[11:0]}), + .portadatain({data_a[11]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[11:0]}), + .portbdataout(wire_ram_block3a_11portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_11.connectivity_checking = "OFF", + ram_block3a_11.logical_ram_name = "ALTSYNCRAM", + ram_block3a_11.mixed_port_feed_through_mode = "dont_care", + ram_block3a_11.operation_mode = "dual_port", + ram_block3a_11.port_a_address_width = 12, + ram_block3a_11.port_a_data_width = 1, + ram_block3a_11.port_a_first_address = 0, + ram_block3a_11.port_a_first_bit_number = 11, + ram_block3a_11.port_a_last_address = 4095, + ram_block3a_11.port_a_logical_ram_depth = 4096, + ram_block3a_11.port_a_logical_ram_width = 16, + ram_block3a_11.port_b_address_clear = "none", + ram_block3a_11.port_b_address_clock = "clock1", + ram_block3a_11.port_b_address_width = 12, + ram_block3a_11.port_b_data_out_clear = "none", + ram_block3a_11.port_b_data_out_clock = "none", + ram_block3a_11.port_b_data_width = 1, + ram_block3a_11.port_b_first_address = 0, + ram_block3a_11.port_b_first_bit_number = 11, + ram_block3a_11.port_b_last_address = 4095, + ram_block3a_11.port_b_logical_ram_depth = 4096, + ram_block3a_11.port_b_logical_ram_width = 16, + ram_block3a_11.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_11.ram_block_type = "auto", + ram_block3a_11.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_12 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[11:0]}), + .portadatain({data_a[12]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[11:0]}), + .portbdataout(wire_ram_block3a_12portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_12.connectivity_checking = "OFF", + ram_block3a_12.logical_ram_name = "ALTSYNCRAM", + ram_block3a_12.mixed_port_feed_through_mode = "dont_care", + ram_block3a_12.operation_mode = "dual_port", + ram_block3a_12.port_a_address_width = 12, + ram_block3a_12.port_a_data_width = 1, + ram_block3a_12.port_a_first_address = 0, + ram_block3a_12.port_a_first_bit_number = 12, + ram_block3a_12.port_a_last_address = 4095, + ram_block3a_12.port_a_logical_ram_depth = 4096, + ram_block3a_12.port_a_logical_ram_width = 16, + ram_block3a_12.port_b_address_clear = "none", + ram_block3a_12.port_b_address_clock = "clock1", + ram_block3a_12.port_b_address_width = 12, + ram_block3a_12.port_b_data_out_clear = "none", + ram_block3a_12.port_b_data_out_clock = "none", + ram_block3a_12.port_b_data_width = 1, + ram_block3a_12.port_b_first_address = 0, + ram_block3a_12.port_b_first_bit_number = 12, + ram_block3a_12.port_b_last_address = 4095, + ram_block3a_12.port_b_logical_ram_depth = 4096, + ram_block3a_12.port_b_logical_ram_width = 16, + ram_block3a_12.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_12.ram_block_type = "auto", + ram_block3a_12.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_13 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[11:0]}), + .portadatain({data_a[13]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[11:0]}), + .portbdataout(wire_ram_block3a_13portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_13.connectivity_checking = "OFF", + ram_block3a_13.logical_ram_name = "ALTSYNCRAM", + ram_block3a_13.mixed_port_feed_through_mode = "dont_care", + ram_block3a_13.operation_mode = "dual_port", + ram_block3a_13.port_a_address_width = 12, + ram_block3a_13.port_a_data_width = 1, + ram_block3a_13.port_a_first_address = 0, + ram_block3a_13.port_a_first_bit_number = 13, + ram_block3a_13.port_a_last_address = 4095, + ram_block3a_13.port_a_logical_ram_depth = 4096, + ram_block3a_13.port_a_logical_ram_width = 16, + ram_block3a_13.port_b_address_clear = "none", + ram_block3a_13.port_b_address_clock = "clock1", + ram_block3a_13.port_b_address_width = 12, + ram_block3a_13.port_b_data_out_clear = "none", + ram_block3a_13.port_b_data_out_clock = "none", + ram_block3a_13.port_b_data_width = 1, + ram_block3a_13.port_b_first_address = 0, + ram_block3a_13.port_b_first_bit_number = 13, + ram_block3a_13.port_b_last_address = 4095, + ram_block3a_13.port_b_logical_ram_depth = 4096, + ram_block3a_13.port_b_logical_ram_width = 16, + ram_block3a_13.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_13.ram_block_type = "auto", + ram_block3a_13.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_14 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[11:0]}), + .portadatain({data_a[14]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[11:0]}), + .portbdataout(wire_ram_block3a_14portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_14.connectivity_checking = "OFF", + ram_block3a_14.logical_ram_name = "ALTSYNCRAM", + ram_block3a_14.mixed_port_feed_through_mode = "dont_care", + ram_block3a_14.operation_mode = "dual_port", + ram_block3a_14.port_a_address_width = 12, + ram_block3a_14.port_a_data_width = 1, + ram_block3a_14.port_a_first_address = 0, + ram_block3a_14.port_a_first_bit_number = 14, + ram_block3a_14.port_a_last_address = 4095, + ram_block3a_14.port_a_logical_ram_depth = 4096, + ram_block3a_14.port_a_logical_ram_width = 16, + ram_block3a_14.port_b_address_clear = "none", + ram_block3a_14.port_b_address_clock = "clock1", + ram_block3a_14.port_b_address_width = 12, + ram_block3a_14.port_b_data_out_clear = "none", + ram_block3a_14.port_b_data_out_clock = "none", + ram_block3a_14.port_b_data_width = 1, + ram_block3a_14.port_b_first_address = 0, + ram_block3a_14.port_b_first_bit_number = 14, + ram_block3a_14.port_b_last_address = 4095, + ram_block3a_14.port_b_logical_ram_depth = 4096, + ram_block3a_14.port_b_logical_ram_width = 16, + ram_block3a_14.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_14.ram_block_type = "auto", + ram_block3a_14.lpm_type = "cyclone_ram_block"; + cyclone_ram_block ram_block3a_15 + ( + .clk0(clock0), + .clk1(clock1), + .ena0(wren_a), + .ena1(clocken1), + .portaaddr({address_a_wire[11:0]}), + .portadatain({data_a[15]}), + .portadataout(), + .portawe(1'b1), + .portbaddr({address_b_wire[11:0]}), + .portbdataout(wire_ram_block3a_15portbdataout[0:0]), + .portbrewe(1'b1) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .clr0(1'b0), + .clr1(1'b0), + .portabyteenamasks(1'b1), + .portbbyteenamasks(1'b1), + .portbdatain(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + ram_block3a_15.connectivity_checking = "OFF", + ram_block3a_15.logical_ram_name = "ALTSYNCRAM", + ram_block3a_15.mixed_port_feed_through_mode = "dont_care", + ram_block3a_15.operation_mode = "dual_port", + ram_block3a_15.port_a_address_width = 12, + ram_block3a_15.port_a_data_width = 1, + ram_block3a_15.port_a_first_address = 0, + ram_block3a_15.port_a_first_bit_number = 15, + ram_block3a_15.port_a_last_address = 4095, + ram_block3a_15.port_a_logical_ram_depth = 4096, + ram_block3a_15.port_a_logical_ram_width = 16, + ram_block3a_15.port_b_address_clear = "none", + ram_block3a_15.port_b_address_clock = "clock1", + ram_block3a_15.port_b_address_width = 12, + ram_block3a_15.port_b_data_out_clear = "none", + ram_block3a_15.port_b_data_out_clock = "none", + ram_block3a_15.port_b_data_width = 1, + ram_block3a_15.port_b_first_address = 0, + ram_block3a_15.port_b_first_bit_number = 15, + ram_block3a_15.port_b_last_address = 4095, + ram_block3a_15.port_b_logical_ram_depth = 4096, + ram_block3a_15.port_b_logical_ram_width = 16, + ram_block3a_15.port_b_read_enable_write_enable_clock = "clock1", + ram_block3a_15.ram_block_type = "auto", + ram_block3a_15.lpm_type = "cyclone_ram_block"; + assign + address_a_wire = address_a, + address_b_wire = address_b, + q_b = {wire_ram_block3a_15portbdataout[0], wire_ram_block3a_14portbdataout[0], wire_ram_block3a_13portbdataout[0], wire_ram_block3a_12portbdataout[0], wire_ram_block3a_11portbdataout[0], wire_ram_block3a_10portbdataout[0], wire_ram_block3a_9portbdataout[0], wire_ram_block3a_8portbdataout[0], wire_ram_block3a_7portbdataout[0], wire_ram_block3a_6portbdataout[0], wire_ram_block3a_5portbdataout[0], wire_ram_block3a_4portbdataout[0], wire_ram_block3a_3portbdataout[0], wire_ram_block3a_2portbdataout[0], wire_ram_block3a_1portbdataout[0], wire_ram_block3a_0portbdataout[0]}; +endmodule //fifo_4k_altsyncram_8pl + + +//dffpipe DELAY=1 WIDTH=12 clock clrn d q +//VERSION_BEGIN 5.0 cbx_mgl 2005:05:19:13:51:58:SJ cbx_stratixii 2004:12:22:13:27:12:SJ cbx_util_mgl 2005:04:04:13:50:06:SJ VERSION_END + +//synthesis_resources = lut 12 +//synopsys translate_off +`timescale 1 ps / 1 ps +//synopsys translate_on +module fifo_4k_dffpipe_bb3 + ( + clock, + clrn, + d, + q) /* synthesis synthesis_clearbox=1 */ + /* synthesis ALTERA_ATTRIBUTE="AUTO_SHIFT_REGISTER_RECOGNITION=OFF" */; + input clock; + input clrn; + input [11:0] d; + output [11:0] q; + + wire [11:0] wire_dffe4a_D; + reg [11:0] dffe4a; + wire ena; + wire prn; + wire sclr; + + // synopsys translate_off + initial + dffe4a[0:0] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[0:0] <= 1'b1; + else if (clrn == 1'b0) dffe4a[0:0] <= 1'b0; + else if (ena == 1'b1) dffe4a[0:0] <= wire_dffe4a_D[0:0]; + // synopsys translate_off + initial + dffe4a[1:1] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[1:1] <= 1'b1; + else if (clrn == 1'b0) dffe4a[1:1] <= 1'b0; + else if (ena == 1'b1) dffe4a[1:1] <= wire_dffe4a_D[1:1]; + // synopsys translate_off + initial + dffe4a[2:2] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[2:2] <= 1'b1; + else if (clrn == 1'b0) dffe4a[2:2] <= 1'b0; + else if (ena == 1'b1) dffe4a[2:2] <= wire_dffe4a_D[2:2]; + // synopsys translate_off + initial + dffe4a[3:3] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[3:3] <= 1'b1; + else if (clrn == 1'b0) dffe4a[3:3] <= 1'b0; + else if (ena == 1'b1) dffe4a[3:3] <= wire_dffe4a_D[3:3]; + // synopsys translate_off + initial + dffe4a[4:4] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[4:4] <= 1'b1; + else if (clrn == 1'b0) dffe4a[4:4] <= 1'b0; + else if (ena == 1'b1) dffe4a[4:4] <= wire_dffe4a_D[4:4]; + // synopsys translate_off + initial + dffe4a[5:5] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[5:5] <= 1'b1; + else if (clrn == 1'b0) dffe4a[5:5] <= 1'b0; + else if (ena == 1'b1) dffe4a[5:5] <= wire_dffe4a_D[5:5]; + // synopsys translate_off + initial + dffe4a[6:6] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[6:6] <= 1'b1; + else if (clrn == 1'b0) dffe4a[6:6] <= 1'b0; + else if (ena == 1'b1) dffe4a[6:6] <= wire_dffe4a_D[6:6]; + // synopsys translate_off + initial + dffe4a[7:7] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[7:7] <= 1'b1; + else if (clrn == 1'b0) dffe4a[7:7] <= 1'b0; + else if (ena == 1'b1) dffe4a[7:7] <= wire_dffe4a_D[7:7]; + // synopsys translate_off + initial + dffe4a[8:8] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[8:8] <= 1'b1; + else if (clrn == 1'b0) dffe4a[8:8] <= 1'b0; + else if (ena == 1'b1) dffe4a[8:8] <= wire_dffe4a_D[8:8]; + // synopsys translate_off + initial + dffe4a[9:9] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[9:9] <= 1'b1; + else if (clrn == 1'b0) dffe4a[9:9] <= 1'b0; + else if (ena == 1'b1) dffe4a[9:9] <= wire_dffe4a_D[9:9]; + // synopsys translate_off + initial + dffe4a[10:10] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[10:10] <= 1'b1; + else if (clrn == 1'b0) dffe4a[10:10] <= 1'b0; + else if (ena == 1'b1) dffe4a[10:10] <= wire_dffe4a_D[10:10]; + // synopsys translate_off + initial + dffe4a[11:11] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe4a[11:11] <= 1'b1; + else if (clrn == 1'b0) dffe4a[11:11] <= 1'b0; + else if (ena == 1'b1) dffe4a[11:11] <= wire_dffe4a_D[11:11]; + assign + wire_dffe4a_D = (d & {12{(~ sclr)}}); + assign + ena = 1'b1, + prn = 1'b1, + q = dffe4a, + sclr = 1'b0; +endmodule //fifo_4k_dffpipe_bb3 + + +//dffpipe WIDTH=12 clock clrn d q +//VERSION_BEGIN 5.0 cbx_a_gray2bin 2004:03:06:00:52:20:SJ cbx_a_graycounter 2004:10:01:12:13:16:SJ cbx_altdpram 2004:11:30:11:29:56:SJ cbx_altsyncram 2005:03:24:13:58:56:SJ cbx_cycloneii 2004:12:20:14:28:52:SJ cbx_dcfifo 2005:03:07:17:11:14:SJ cbx_fifo_common 2004:12:13:14:26:24:SJ cbx_flex10ke 2002:10:18:16:54:38:SJ cbx_lpm_add_sub 2005:04:12:13:30:42:SJ cbx_lpm_compare 2004:11:30:11:30:40:SJ cbx_lpm_counter 2005:02:02:04:37:10:SJ cbx_lpm_decode 2004:12:13:14:19:12:SJ cbx_lpm_mux 2004:12:13:14:16:38:SJ cbx_mgl 2005:05:19:13:51:58:SJ cbx_scfifo 2005:03:10:10:52:20:SJ cbx_stratix 2005:06:02:09:53:04:SJ cbx_stratixii 2004:12:22:13:27:12:SJ cbx_util_mgl 2005:04:04:13:50:06:SJ VERSION_END + + +//dffpipe WIDTH=12 clock clrn d q +//VERSION_BEGIN 5.0 cbx_mgl 2005:05:19:13:51:58:SJ cbx_stratixii 2004:12:22:13:27:12:SJ cbx_util_mgl 2005:04:04:13:50:06:SJ VERSION_END + +//synthesis_resources = lut 12 +//synopsys translate_off +`timescale 1 ps / 1 ps +//synopsys translate_on +module fifo_4k_dffpipe_em2 + ( + clock, + clrn, + d, + q) /* synthesis synthesis_clearbox=1 */ + /* synthesis ALTERA_ATTRIBUTE="AUTO_SHIFT_REGISTER_RECOGNITION=OFF" */; + input clock; + input clrn; + input [11:0] d; + output [11:0] q; + + wire [11:0] wire_dffe6a_D; + reg [11:0] dffe6a; + wire ena; + wire prn; + wire sclr; + + // synopsys translate_off + initial + dffe6a[0:0] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[0:0] <= 1'b1; + else if (clrn == 1'b0) dffe6a[0:0] <= 1'b0; + else if (ena == 1'b1) dffe6a[0:0] <= wire_dffe6a_D[0:0]; + // synopsys translate_off + initial + dffe6a[1:1] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[1:1] <= 1'b1; + else if (clrn == 1'b0) dffe6a[1:1] <= 1'b0; + else if (ena == 1'b1) dffe6a[1:1] <= wire_dffe6a_D[1:1]; + // synopsys translate_off + initial + dffe6a[2:2] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[2:2] <= 1'b1; + else if (clrn == 1'b0) dffe6a[2:2] <= 1'b0; + else if (ena == 1'b1) dffe6a[2:2] <= wire_dffe6a_D[2:2]; + // synopsys translate_off + initial + dffe6a[3:3] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[3:3] <= 1'b1; + else if (clrn == 1'b0) dffe6a[3:3] <= 1'b0; + else if (ena == 1'b1) dffe6a[3:3] <= wire_dffe6a_D[3:3]; + // synopsys translate_off + initial + dffe6a[4:4] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[4:4] <= 1'b1; + else if (clrn == 1'b0) dffe6a[4:4] <= 1'b0; + else if (ena == 1'b1) dffe6a[4:4] <= wire_dffe6a_D[4:4]; + // synopsys translate_off + initial + dffe6a[5:5] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[5:5] <= 1'b1; + else if (clrn == 1'b0) dffe6a[5:5] <= 1'b0; + else if (ena == 1'b1) dffe6a[5:5] <= wire_dffe6a_D[5:5]; + // synopsys translate_off + initial + dffe6a[6:6] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[6:6] <= 1'b1; + else if (clrn == 1'b0) dffe6a[6:6] <= 1'b0; + else if (ena == 1'b1) dffe6a[6:6] <= wire_dffe6a_D[6:6]; + // synopsys translate_off + initial + dffe6a[7:7] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[7:7] <= 1'b1; + else if (clrn == 1'b0) dffe6a[7:7] <= 1'b0; + else if (ena == 1'b1) dffe6a[7:7] <= wire_dffe6a_D[7:7]; + // synopsys translate_off + initial + dffe6a[8:8] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[8:8] <= 1'b1; + else if (clrn == 1'b0) dffe6a[8:8] <= 1'b0; + else if (ena == 1'b1) dffe6a[8:8] <= wire_dffe6a_D[8:8]; + // synopsys translate_off + initial + dffe6a[9:9] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[9:9] <= 1'b1; + else if (clrn == 1'b0) dffe6a[9:9] <= 1'b0; + else if (ena == 1'b1) dffe6a[9:9] <= wire_dffe6a_D[9:9]; + // synopsys translate_off + initial + dffe6a[10:10] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[10:10] <= 1'b1; + else if (clrn == 1'b0) dffe6a[10:10] <= 1'b0; + else if (ena == 1'b1) dffe6a[10:10] <= wire_dffe6a_D[10:10]; + // synopsys translate_off + initial + dffe6a[11:11] = 0; + // synopsys translate_on + always @ ( posedge clock or negedge prn or negedge clrn) + if (prn == 1'b0) dffe6a[11:11] <= 1'b1; + else if (clrn == 1'b0) dffe6a[11:11] <= 1'b0; + else if (ena == 1'b1) dffe6a[11:11] <= wire_dffe6a_D[11:11]; + assign + wire_dffe6a_D = (d & {12{(~ sclr)}}); + assign + ena = 1'b1, + prn = 1'b1, + q = dffe6a, + sclr = 1'b0; +endmodule //fifo_4k_dffpipe_em2 + +//synthesis_resources = lut 12 +//synopsys translate_off +`timescale 1 ps / 1 ps +//synopsys translate_on +module fifo_4k_alt_synch_pipe_em2 + ( + clock, + clrn, + d, + q) /* synthesis synthesis_clearbox=1 */ + /* synthesis ALTERA_ATTRIBUTE="X_ON_VIOLATION_OPTION=OFF" */; + input clock; + input clrn; + input [11:0] d; + output [11:0] q; + + wire [11:0] wire_dffpipe5_q; + + fifo_4k_dffpipe_em2 dffpipe5 + ( + .clock(clock), + .clrn(clrn), + .d(d), + .q(wire_dffpipe5_q)); + assign + q = wire_dffpipe5_q; +endmodule //fifo_4k_alt_synch_pipe_em2 + + +//lpm_add_sub DEVICE_FAMILY="Cyclone" LPM_DIRECTION="SUB" LPM_WIDTH=12 dataa datab result +//VERSION_BEGIN 5.0 cbx_cycloneii 2004:12:20:14:28:52:SJ cbx_lpm_add_sub 2005:04:12:13:30:42:SJ cbx_mgl 2005:05:19:13:51:58:SJ cbx_stratix 2005:06:02:09:53:04:SJ cbx_stratixii 2004:12:22:13:27:12:SJ VERSION_END + +//synthesis_resources = lut 12 +//synopsys translate_off +`timescale 1 ps / 1 ps +//synopsys translate_on +module fifo_4k_add_sub_b18 + ( + dataa, + datab, + result) /* synthesis synthesis_clearbox=1 */; + input [11:0] dataa; + input [11:0] datab; + output [11:0] result; + + wire [11:0] wire_add_sub_cella_combout; + wire [0:0] wire_add_sub_cella_0cout; + wire [0:0] wire_add_sub_cella_1cout; + wire [0:0] wire_add_sub_cella_2cout; + wire [0:0] wire_add_sub_cella_3cout; + wire [0:0] wire_add_sub_cella_4cout; + wire [0:0] wire_add_sub_cella_5cout; + wire [0:0] wire_add_sub_cella_6cout; + wire [0:0] wire_add_sub_cella_7cout; + wire [0:0] wire_add_sub_cella_8cout; + wire [0:0] wire_add_sub_cella_9cout; + wire [0:0] wire_add_sub_cella_10cout; + wire [11:0] wire_add_sub_cella_dataa; + wire [11:0] wire_add_sub_cella_datab; + + cyclone_lcell add_sub_cella_0 + ( + .cin(1'b1), + .combout(wire_add_sub_cella_combout[0:0]), + .cout(wire_add_sub_cella_0cout[0:0]), + .dataa(wire_add_sub_cella_dataa[0:0]), + .datab(wire_add_sub_cella_datab[0:0]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_0.cin_used = "true", + add_sub_cella_0.lut_mask = "69b2", + add_sub_cella_0.operation_mode = "arithmetic", + add_sub_cella_0.sum_lutc_input = "cin", + add_sub_cella_0.lpm_type = "cyclone_lcell"; + cyclone_lcell add_sub_cella_1 + ( + .cin(wire_add_sub_cella_0cout[0:0]), + .combout(wire_add_sub_cella_combout[1:1]), + .cout(wire_add_sub_cella_1cout[0:0]), + .dataa(wire_add_sub_cella_dataa[1:1]), + .datab(wire_add_sub_cella_datab[1:1]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_1.cin_used = "true", + add_sub_cella_1.lut_mask = "69b2", + add_sub_cella_1.operation_mode = "arithmetic", + add_sub_cella_1.sum_lutc_input = "cin", + add_sub_cella_1.lpm_type = "cyclone_lcell"; + cyclone_lcell add_sub_cella_2 + ( + .cin(wire_add_sub_cella_1cout[0:0]), + .combout(wire_add_sub_cella_combout[2:2]), + .cout(wire_add_sub_cella_2cout[0:0]), + .dataa(wire_add_sub_cella_dataa[2:2]), + .datab(wire_add_sub_cella_datab[2:2]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_2.cin_used = "true", + add_sub_cella_2.lut_mask = "69b2", + add_sub_cella_2.operation_mode = "arithmetic", + add_sub_cella_2.sum_lutc_input = "cin", + add_sub_cella_2.lpm_type = "cyclone_lcell"; + cyclone_lcell add_sub_cella_3 + ( + .cin(wire_add_sub_cella_2cout[0:0]), + .combout(wire_add_sub_cella_combout[3:3]), + .cout(wire_add_sub_cella_3cout[0:0]), + .dataa(wire_add_sub_cella_dataa[3:3]), + .datab(wire_add_sub_cella_datab[3:3]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_3.cin_used = "true", + add_sub_cella_3.lut_mask = "69b2", + add_sub_cella_3.operation_mode = "arithmetic", + add_sub_cella_3.sum_lutc_input = "cin", + add_sub_cella_3.lpm_type = "cyclone_lcell"; + cyclone_lcell add_sub_cella_4 + ( + .cin(wire_add_sub_cella_3cout[0:0]), + .combout(wire_add_sub_cella_combout[4:4]), + .cout(wire_add_sub_cella_4cout[0:0]), + .dataa(wire_add_sub_cella_dataa[4:4]), + .datab(wire_add_sub_cella_datab[4:4]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_4.cin_used = "true", + add_sub_cella_4.lut_mask = "69b2", + add_sub_cella_4.operation_mode = "arithmetic", + add_sub_cella_4.sum_lutc_input = "cin", + add_sub_cella_4.lpm_type = "cyclone_lcell"; + cyclone_lcell add_sub_cella_5 + ( + .cin(wire_add_sub_cella_4cout[0:0]), + .combout(wire_add_sub_cella_combout[5:5]), + .cout(wire_add_sub_cella_5cout[0:0]), + .dataa(wire_add_sub_cella_dataa[5:5]), + .datab(wire_add_sub_cella_datab[5:5]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_5.cin_used = "true", + add_sub_cella_5.lut_mask = "69b2", + add_sub_cella_5.operation_mode = "arithmetic", + add_sub_cella_5.sum_lutc_input = "cin", + add_sub_cella_5.lpm_type = "cyclone_lcell"; + cyclone_lcell add_sub_cella_6 + ( + .cin(wire_add_sub_cella_5cout[0:0]), + .combout(wire_add_sub_cella_combout[6:6]), + .cout(wire_add_sub_cella_6cout[0:0]), + .dataa(wire_add_sub_cella_dataa[6:6]), + .datab(wire_add_sub_cella_datab[6:6]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_6.cin_used = "true", + add_sub_cella_6.lut_mask = "69b2", + add_sub_cella_6.operation_mode = "arithmetic", + add_sub_cella_6.sum_lutc_input = "cin", + add_sub_cella_6.lpm_type = "cyclone_lcell"; + cyclone_lcell add_sub_cella_7 + ( + .cin(wire_add_sub_cella_6cout[0:0]), + .combout(wire_add_sub_cella_combout[7:7]), + .cout(wire_add_sub_cella_7cout[0:0]), + .dataa(wire_add_sub_cella_dataa[7:7]), + .datab(wire_add_sub_cella_datab[7:7]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_7.cin_used = "true", + add_sub_cella_7.lut_mask = "69b2", + add_sub_cella_7.operation_mode = "arithmetic", + add_sub_cella_7.sum_lutc_input = "cin", + add_sub_cella_7.lpm_type = "cyclone_lcell"; + cyclone_lcell add_sub_cella_8 + ( + .cin(wire_add_sub_cella_7cout[0:0]), + .combout(wire_add_sub_cella_combout[8:8]), + .cout(wire_add_sub_cella_8cout[0:0]), + .dataa(wire_add_sub_cella_dataa[8:8]), + .datab(wire_add_sub_cella_datab[8:8]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_8.cin_used = "true", + add_sub_cella_8.lut_mask = "69b2", + add_sub_cella_8.operation_mode = "arithmetic", + add_sub_cella_8.sum_lutc_input = "cin", + add_sub_cella_8.lpm_type = "cyclone_lcell"; + cyclone_lcell add_sub_cella_9 + ( + .cin(wire_add_sub_cella_8cout[0:0]), + .combout(wire_add_sub_cella_combout[9:9]), + .cout(wire_add_sub_cella_9cout[0:0]), + .dataa(wire_add_sub_cella_dataa[9:9]), + .datab(wire_add_sub_cella_datab[9:9]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_9.cin_used = "true", + add_sub_cella_9.lut_mask = "69b2", + add_sub_cella_9.operation_mode = "arithmetic", + add_sub_cella_9.sum_lutc_input = "cin", + add_sub_cella_9.lpm_type = "cyclone_lcell"; + cyclone_lcell add_sub_cella_10 + ( + .cin(wire_add_sub_cella_9cout[0:0]), + .combout(wire_add_sub_cella_combout[10:10]), + .cout(wire_add_sub_cella_10cout[0:0]), + .dataa(wire_add_sub_cella_dataa[10:10]), + .datab(wire_add_sub_cella_datab[10:10]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_10.cin_used = "true", + add_sub_cella_10.lut_mask = "69b2", + add_sub_cella_10.operation_mode = "arithmetic", + add_sub_cella_10.sum_lutc_input = "cin", + add_sub_cella_10.lpm_type = "cyclone_lcell"; + cyclone_lcell add_sub_cella_11 + ( + .cin(wire_add_sub_cella_10cout[0:0]), + .combout(wire_add_sub_cella_combout[11:11]), + .cout(), + .dataa(wire_add_sub_cella_dataa[11:11]), + .datab(wire_add_sub_cella_datab[11:11]), + .regout() + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_off + `endif + , + .aclr(1'b0), + .aload(1'b0), + .clk(1'b1), + .datac(1'b1), + .datad(1'b1), + .ena(1'b1), + .inverta(1'b0), + .regcascin(1'b0), + .sclr(1'b0), + .sload(1'b0) + `ifdef FORMAL_VERIFICATION + `else + // synopsys translate_on + `endif + // synopsys translate_off + , + .cin0(), + .cin1(), + .cout0(), + .cout1(), + .devclrn(), + .devpor() + // synopsys translate_on + ); + defparam + add_sub_cella_11.cin_used = "true", + add_sub_cella_11.lut_mask = "6969", + add_sub_cella_11.operation_mode = "normal", + add_sub_cella_11.sum_lutc_input = "cin", + add_sub_cella_11.lpm_type = "cyclone_lcell"; + assign + wire_add_sub_cella_dataa = dataa, + wire_add_sub_cella_datab = datab; + assign + result = wire_add_sub_cella_combout; +endmodule //fifo_4k_add_sub_b18 + + +//lpm_compare DEVICE_FAMILY="Cyclone" LPM_WIDTH=12 aeb dataa datab +//VERSION_BEGIN 5.0 cbx_cycloneii 2004:12:20:14:28:52:SJ cbx_lpm_add_sub 2005:04:12:13:30:42:SJ cbx_lpm_compare 2004:11:30:11:30:40:SJ cbx_mgl 2005:05:19:13:51:58:SJ cbx_stratix 2005:06:02:09:53:04:SJ cbx_stratixii 2004:12:22:13:27:12:SJ VERSION_END + + +//lpm_compare DEVICE_FAMILY="Cyclone" LPM_WIDTH=12 aeb dataa datab +//VERSION_BEGIN 5.0 cbx_cycloneii 2004:12:20:14:28:52:SJ cbx_lpm_add_sub 2005:04:12:13:30:42:SJ cbx_lpm_compare 2004:11:30:11:30:40:SJ cbx_mgl 2005:05:19:13:51:58:SJ cbx_stratix 2005:06:02:09:53:04:SJ cbx_stratixii 2004:12:22:13:27:12:SJ VERSION_END + +//synthesis_resources = lut 104 M4K 16 +//synopsys translate_off +`timescale 1 ps / 1 ps +//synopsys translate_on +module fifo_4k_dcfifo_6cq + ( + aclr, + data, + q, + rdclk, + rdempty, + rdreq, + rdusedw, + wrclk, + wrfull, + wrreq, + wrusedw) /* synthesis synthesis_clearbox=1 */ + /* synthesis ALTERA_ATTRIBUTE="AUTO_SHIFT_REGISTER_RECOGNITION=OFF;{ -from \"rdptr_g|power_modified_counter_values\" -to \"ws_dgrp|dffpipe5|dffe6a\" }CUT=ON;{ -from \"delayed_wrptr_g\" -to \"rs_dgwp|dffpipe5|dffe6a\" }CUT=ON" */; + input aclr; + input [15:0] data; + output [15:0] q; + input rdclk; + output rdempty; + input rdreq; + output [11:0] rdusedw; + input wrclk; + output wrfull; + input wrreq; + output [11:0] wrusedw; + + wire [11:0] wire_rdptr_g_gray2bin_bin; + wire [11:0] wire_rs_dgwp_gray2bin_bin; + wire [11:0] wire_wrptr_g_gray2bin_bin; + wire [11:0] wire_ws_dgrp_gray2bin_bin; + wire [11:0] wire_rdptr_g_q; + wire [11:0] wire_rdptr_g1p_q; + wire [11:0] wire_wrptr_g1p_q; + wire [15:0] wire_fifo_ram_q_b; + reg [11:0] delayed_wrptr_g; + reg [11:0] wrptr_g; + wire [11:0] wire_rs_brp_q; + wire [11:0] wire_rs_bwp_q; + wire [11:0] wire_rs_dgwp_q; + wire [11:0] wire_ws_brp_q; + wire [11:0] wire_ws_bwp_q; + wire [11:0] wire_ws_dgrp_q; + wire [11:0] wire_rdusedw_sub_result; + wire [11:0] wire_wrusedw_sub_result; + reg wire_rdempty_eq_comp_aeb_int; + wire wire_rdempty_eq_comp_aeb; + wire [11:0] wire_rdempty_eq_comp_dataa; + wire [11:0] wire_rdempty_eq_comp_datab; + reg wire_wrfull_eq_comp_aeb_int; + wire wire_wrfull_eq_comp_aeb; + wire [11:0] wire_wrfull_eq_comp_dataa; + wire [11:0] wire_wrfull_eq_comp_datab; + wire int_rdempty; + wire int_wrfull; + wire valid_rdreq; + wire valid_wrreq; + + fifo_4k_a_gray2bin_9m4 rdptr_g_gray2bin + ( + .bin(wire_rdptr_g_gray2bin_bin), + .gray(wire_rdptr_g_q)); + fifo_4k_a_gray2bin_9m4 rs_dgwp_gray2bin + ( + .bin(wire_rs_dgwp_gray2bin_bin), + .gray(wire_rs_dgwp_q)); + fifo_4k_a_gray2bin_9m4 wrptr_g_gray2bin + ( + .bin(wire_wrptr_g_gray2bin_bin), + .gray(wrptr_g)); + fifo_4k_a_gray2bin_9m4 ws_dgrp_gray2bin + ( + .bin(wire_ws_dgrp_gray2bin_bin), + .gray(wire_ws_dgrp_q)); + fifo_4k_a_graycounter_826 rdptr_g + ( + .aclr(aclr), + .clock(rdclk), + .cnt_en(valid_rdreq), + .q(wire_rdptr_g_q)); + fifo_4k_a_graycounter_3r6 rdptr_g1p + ( + .aclr(aclr), + .clock(rdclk), + .cnt_en(valid_rdreq), + .q(wire_rdptr_g1p_q)); + fifo_4k_a_graycounter_3r6 wrptr_g1p + ( + .aclr(aclr), + .clock(wrclk), + .cnt_en(valid_wrreq), + .q(wire_wrptr_g1p_q)); + fifo_4k_altsyncram_8pl fifo_ram + ( + .address_a(wrptr_g), + .address_b(((wire_rdptr_g_q & {12{int_rdempty}}) | (wire_rdptr_g1p_q & {12{(~ int_rdempty)}}))), + .clock0(wrclk), + .clock1(rdclk), + .clocken1((valid_rdreq | int_rdempty)), + .data_a(data), + .q_b(wire_fifo_ram_q_b), + .wren_a(valid_wrreq)); + // synopsys translate_off + initial + delayed_wrptr_g = 0; + // synopsys translate_on + always @ ( posedge wrclk or posedge aclr) + if (aclr == 1'b1) delayed_wrptr_g <= 12'b0; + else delayed_wrptr_g <= wrptr_g; + // synopsys translate_off + initial + wrptr_g = 0; + // synopsys translate_on + always @ ( posedge wrclk or posedge aclr) + if (aclr == 1'b1) wrptr_g <= 12'b0; + else if (valid_wrreq == 1'b1) wrptr_g <= wire_wrptr_g1p_q; + fifo_4k_dffpipe_bb3 rs_brp + ( + .clock(rdclk), + .clrn((~ aclr)), + .d(wire_rdptr_g_gray2bin_bin), + .q(wire_rs_brp_q)); + fifo_4k_dffpipe_bb3 rs_bwp + ( + .clock(rdclk), + .clrn((~ aclr)), + .d(wire_rs_dgwp_gray2bin_bin), + .q(wire_rs_bwp_q)); + fifo_4k_alt_synch_pipe_em2 rs_dgwp + ( + .clock(rdclk), + .clrn((~ aclr)), + .d(delayed_wrptr_g), + .q(wire_rs_dgwp_q)); + fifo_4k_dffpipe_bb3 ws_brp + ( + .clock(wrclk), + .clrn((~ aclr)), + .d(wire_ws_dgrp_gray2bin_bin), + .q(wire_ws_brp_q)); + fifo_4k_dffpipe_bb3 ws_bwp + ( + .clock(wrclk), + .clrn((~ aclr)), + .d(wire_wrptr_g_gray2bin_bin), + .q(wire_ws_bwp_q)); + fifo_4k_alt_synch_pipe_em2 ws_dgrp + ( + .clock(wrclk), + .clrn((~ aclr)), + .d(wire_rdptr_g_q), + .q(wire_ws_dgrp_q)); + fifo_4k_add_sub_b18 rdusedw_sub + ( + .dataa(wire_rs_bwp_q), + .datab(wire_rs_brp_q), + .result(wire_rdusedw_sub_result)); + fifo_4k_add_sub_b18 wrusedw_sub + ( + .dataa(wire_ws_bwp_q), + .datab(wire_ws_brp_q), + .result(wire_wrusedw_sub_result)); + always @(wire_rdempty_eq_comp_dataa or wire_rdempty_eq_comp_datab) + if (wire_rdempty_eq_comp_dataa == wire_rdempty_eq_comp_datab) + begin + wire_rdempty_eq_comp_aeb_int = 1'b1; + end + else + begin + wire_rdempty_eq_comp_aeb_int = 1'b0; + end + assign + wire_rdempty_eq_comp_aeb = wire_rdempty_eq_comp_aeb_int; + assign + wire_rdempty_eq_comp_dataa = wire_rs_dgwp_q, + wire_rdempty_eq_comp_datab = wire_rdptr_g_q; + always @(wire_wrfull_eq_comp_dataa or wire_wrfull_eq_comp_datab) + if (wire_wrfull_eq_comp_dataa == wire_wrfull_eq_comp_datab) + begin + wire_wrfull_eq_comp_aeb_int = 1'b1; + end + else + begin + wire_wrfull_eq_comp_aeb_int = 1'b0; + end + assign + wire_wrfull_eq_comp_aeb = wire_wrfull_eq_comp_aeb_int; + assign + wire_wrfull_eq_comp_dataa = wire_ws_dgrp_q, + wire_wrfull_eq_comp_datab = wire_wrptr_g1p_q; + assign + int_rdempty = wire_rdempty_eq_comp_aeb, + int_wrfull = wire_wrfull_eq_comp_aeb, + q = wire_fifo_ram_q_b, + rdempty = int_rdempty, + rdusedw = wire_rdusedw_sub_result, + valid_rdreq = rdreq, + valid_wrreq = wrreq, + wrfull = int_wrfull, + wrusedw = wire_wrusedw_sub_result; +endmodule //fifo_4k_dcfifo_6cq +//VALID FILE + + +// synopsys translate_off +`timescale 1 ps / 1 ps +// synopsys translate_on +module fifo_4k ( + data, + wrreq, + rdreq, + rdclk, + wrclk, + aclr, + q, + rdempty, + rdusedw, + wrfull, + wrusedw)/* synthesis synthesis_clearbox = 1 */; + + input [15:0] data; + input wrreq; + input rdreq; + input rdclk; + input wrclk; + input aclr; + output [15:0] q; + output rdempty; + output [11:0] rdusedw; + output wrfull; + output [11:0] wrusedw; + + wire sub_wire0; + wire [11:0] sub_wire1; + wire sub_wire2; + wire [15:0] sub_wire3; + wire [11:0] sub_wire4; + wire rdempty = sub_wire0; + wire [11:0] wrusedw = sub_wire1[11:0]; + wire wrfull = sub_wire2; + wire [15:0] q = sub_wire3[15:0]; + wire [11:0] rdusedw = sub_wire4[11:0]; + + fifo_4k_dcfifo_6cq fifo_4k_dcfifo_6cq_component ( + .wrclk (wrclk), + .rdreq (rdreq), + .aclr (aclr), + .rdclk (rdclk), + .wrreq (wrreq), + .data (data), + .rdempty (sub_wire0), + .wrusedw (sub_wire1), + .wrfull (sub_wire2), + .q (sub_wire3), + .rdusedw (sub_wire4)); + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: Width NUMERIC "16" +// Retrieval info: PRIVATE: Depth NUMERIC "4096" +// Retrieval info: PRIVATE: Clock NUMERIC "4" +// Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "0" +// Retrieval info: PRIVATE: Full NUMERIC "1" +// Retrieval info: PRIVATE: Empty NUMERIC "1" +// Retrieval info: PRIVATE: UsedW NUMERIC "1" +// Retrieval info: PRIVATE: AlmostFull NUMERIC "0" +// Retrieval info: PRIVATE: AlmostEmpty NUMERIC "0" +// Retrieval info: PRIVATE: AlmostFullThr NUMERIC "-1" +// Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC "-1" +// Retrieval info: PRIVATE: sc_aclr NUMERIC "0" +// Retrieval info: PRIVATE: sc_sclr NUMERIC "0" +// Retrieval info: PRIVATE: rsFull NUMERIC "0" +// Retrieval info: PRIVATE: rsEmpty NUMERIC "1" +// Retrieval info: PRIVATE: rsUsedW NUMERIC "1" +// Retrieval info: PRIVATE: wsFull NUMERIC "1" +// Retrieval info: PRIVATE: wsEmpty NUMERIC "0" +// Retrieval info: PRIVATE: wsUsedW NUMERIC "1" +// Retrieval info: PRIVATE: dc_aclr NUMERIC "1" +// Retrieval info: PRIVATE: LegacyRREQ NUMERIC "0" +// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0" +// Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC "0" +// Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC "0" +// Retrieval info: PRIVATE: Optimize NUMERIC "2" +// Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC "1" +// Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "1" +// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "16" +// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "4096" +// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "12" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: CONSTANT: CLOCKS_ARE_SYNCHRONIZED STRING "FALSE" +// Retrieval info: CONSTANT: LPM_TYPE STRING "dcfifo" +// Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "ON" +// Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "OFF" +// Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "OFF" +// Retrieval info: CONSTANT: USE_EAB STRING "ON" +// Retrieval info: CONSTANT: ADD_RAM_OUTPUT_REGISTER STRING "OFF" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: USED_PORT: data 0 0 16 0 INPUT NODEFVAL data[15..0] +// Retrieval info: USED_PORT: q 0 0 16 0 OUTPUT NODEFVAL q[15..0] +// Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL wrreq +// Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL rdreq +// Retrieval info: USED_PORT: rdclk 0 0 0 0 INPUT NODEFVAL rdclk +// Retrieval info: USED_PORT: wrclk 0 0 0 0 INPUT NODEFVAL wrclk +// Retrieval info: USED_PORT: rdempty 0 0 0 0 OUTPUT NODEFVAL rdempty +// Retrieval info: USED_PORT: rdusedw 0 0 12 0 OUTPUT NODEFVAL rdusedw[11..0] +// Retrieval info: USED_PORT: wrfull 0 0 0 0 OUTPUT NODEFVAL wrfull +// Retrieval info: USED_PORT: wrusedw 0 0 12 0 OUTPUT NODEFVAL wrusedw[11..0] +// Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT GND aclr +// Retrieval info: CONNECT: @data 0 0 16 0 data 0 0 16 0 +// Retrieval info: CONNECT: q 0 0 16 0 @q 0 0 16 0 +// Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0 +// Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0 +// Retrieval info: CONNECT: @rdclk 0 0 0 0 rdclk 0 0 0 0 +// Retrieval info: CONNECT: @wrclk 0 0 0 0 wrclk 0 0 0 0 +// Retrieval info: CONNECT: rdempty 0 0 0 0 @rdempty 0 0 0 0 +// Retrieval info: CONNECT: rdusedw 0 0 12 0 @rdusedw 0 0 12 0 +// Retrieval info: CONNECT: wrfull 0 0 0 0 @wrfull 0 0 0 0 +// Retrieval info: CONNECT: wrusedw 0 0 12 0 @wrusedw 0 0 12 0 +// Retrieval info: CONNECT: @aclr 0 0 0 0 aclr 0 0 0 0 +// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4k.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4k.inc FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4k.cmp FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4k.bsf FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4k_inst.v FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4k_bb.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4k_waveforms.html TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4k_wave*.jpg FALSE diff --git a/fpga/megacells/fifo_4k_bb.v b/fpga/megacells/fifo_4k_bb.v new file mode 100644 index 0000000..fc4ca97 --- /dev/null +++ b/fpga/megacells/fifo_4k_bb.v @@ -0,0 +1,131 @@ +// megafunction wizard: %FIFO%VBB% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: dcfifo + +// ============================================================ +// File Name: fifo_4k.v +// Megafunction Name(s): +// dcfifo +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// +// 5.0 Build 168 06/22/2005 SP 1 SJ Web Edition +// ************************************************************ + +//Copyright (C) 1991-2005 Altera Corporation +//Your use of Altera Corporation's design tools, logic functions +//and other software and tools, and its AMPP partner logic +//functions, and any output files any of the foregoing +//(including device programming or simulation files), and any +//associated documentation or information are expressly subject +//to the terms and conditions of the Altera Program License +//Subscription Agreement, Altera MegaCore Function License +//Agreement, or other applicable license agreement, including, +//without limitation, that your use is for the sole purpose of +//programming logic devices manufactured by Altera and sold by +//Altera or its authorized distributors. Please refer to the +//applicable agreement for further details. + +module fifo_4k ( + data, + wrreq, + rdreq, + rdclk, + wrclk, + aclr, + q, + rdempty, + rdusedw, + wrfull, + wrusedw)/* synthesis synthesis_clearbox = 1 */; + + input [15:0] data; + input wrreq; + input rdreq; + input rdclk; + input wrclk; + input aclr; + output [15:0] q; + output rdempty; + output [11:0] rdusedw; + output wrfull; + output [11:0] wrusedw; + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: Width NUMERIC "16" +// Retrieval info: PRIVATE: Depth NUMERIC "4096" +// Retrieval info: PRIVATE: Clock NUMERIC "4" +// Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "0" +// Retrieval info: PRIVATE: Full NUMERIC "1" +// Retrieval info: PRIVATE: Empty NUMERIC "1" +// Retrieval info: PRIVATE: UsedW NUMERIC "1" +// Retrieval info: PRIVATE: AlmostFull NUMERIC "0" +// Retrieval info: PRIVATE: AlmostEmpty NUMERIC "0" +// Retrieval info: PRIVATE: AlmostFullThr NUMERIC "-1" +// Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC "-1" +// Retrieval info: PRIVATE: sc_aclr NUMERIC "0" +// Retrieval info: PRIVATE: sc_sclr NUMERIC "0" +// Retrieval info: PRIVATE: rsFull NUMERIC "0" +// Retrieval info: PRIVATE: rsEmpty NUMERIC "1" +// Retrieval info: PRIVATE: rsUsedW NUMERIC "1" +// Retrieval info: PRIVATE: wsFull NUMERIC "1" +// Retrieval info: PRIVATE: wsEmpty NUMERIC "0" +// Retrieval info: PRIVATE: wsUsedW NUMERIC "1" +// Retrieval info: PRIVATE: dc_aclr NUMERIC "1" +// Retrieval info: PRIVATE: LegacyRREQ NUMERIC "0" +// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0" +// Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC "0" +// Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC "0" +// Retrieval info: PRIVATE: Optimize NUMERIC "2" +// Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC "1" +// Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC "1" +// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "16" +// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "4096" +// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "12" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: CONSTANT: CLOCKS_ARE_SYNCHRONIZED STRING "FALSE" +// Retrieval info: CONSTANT: LPM_TYPE STRING "dcfifo" +// Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "ON" +// Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "OFF" +// Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "OFF" +// Retrieval info: CONSTANT: USE_EAB STRING "ON" +// Retrieval info: CONSTANT: ADD_RAM_OUTPUT_REGISTER STRING "OFF" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: USED_PORT: data 0 0 16 0 INPUT NODEFVAL data[15..0] +// Retrieval info: USED_PORT: q 0 0 16 0 OUTPUT NODEFVAL q[15..0] +// Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL wrreq +// Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL rdreq +// Retrieval info: USED_PORT: rdclk 0 0 0 0 INPUT NODEFVAL rdclk +// Retrieval info: USED_PORT: wrclk 0 0 0 0 INPUT NODEFVAL wrclk +// Retrieval info: USED_PORT: rdempty 0 0 0 0 OUTPUT NODEFVAL rdempty +// Retrieval info: USED_PORT: rdusedw 0 0 12 0 OUTPUT NODEFVAL rdusedw[11..0] +// Retrieval info: USED_PORT: wrfull 0 0 0 0 OUTPUT NODEFVAL wrfull +// Retrieval info: USED_PORT: wrusedw 0 0 12 0 OUTPUT NODEFVAL wrusedw[11..0] +// Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT GND aclr +// Retrieval info: CONNECT: @data 0 0 16 0 data 0 0 16 0 +// Retrieval info: CONNECT: q 0 0 16 0 @q 0 0 16 0 +// Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0 +// Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0 +// Retrieval info: CONNECT: @rdclk 0 0 0 0 rdclk 0 0 0 0 +// Retrieval info: CONNECT: @wrclk 0 0 0 0 wrclk 0 0 0 0 +// Retrieval info: CONNECT: rdempty 0 0 0 0 @rdempty 0 0 0 0 +// Retrieval info: CONNECT: rdusedw 0 0 12 0 @rdusedw 0 0 12 0 +// Retrieval info: CONNECT: wrfull 0 0 0 0 @wrfull 0 0 0 0 +// Retrieval info: CONNECT: wrusedw 0 0 12 0 @wrusedw 0 0 12 0 +// Retrieval info: CONNECT: @aclr 0 0 0 0 aclr 0 0 0 0 +// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4k.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4k.inc FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4k.cmp FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4k.bsf FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4k_inst.v FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4k_bb.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4k_waveforms.html TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL fifo_4k_wave*.jpg FALSE diff --git a/fpga/megacells/mylpm_addsub.bsf b/fpga/megacells/mylpm_addsub.bsf new file mode 100755 index 0000000..e5c1ded --- /dev/null +++ b/fpga/megacells/mylpm_addsub.bsf @@ -0,0 +1,80 @@ +/* +WARNING: Do NOT edit the input and output ports in this file in a text +editor if you plan to continue editing the block that represents it in +the Block Editor! File corruption is VERY likely to occur. +*/ +/* +Copyright (C) 1991-2003 Altera Corporation +Any megafunction design, and related netlist (encrypted or decrypted), +support information, device programming or simulation file, and any other +associated documentation or information provided by Altera or a partner +under Altera's Megafunction Partnership Program may be used only +to program PLD devices (but not masked PLD devices) from Altera. Any +other use of such megafunction design, netlist, support information, +device programming or simulation file, or any other related documentation +or information is prohibited for any other purpose, including, but not +limited to modification, reverse engineering, de-compiling, or use with +any other silicon devices, unless such use is explicitly licensed under +a separate agreement with Altera or a megafunction partner. Title to the +intellectual property, including patents, copyrights, trademarks, trade +secrets, or maskworks, embodied in any such megafunction design, netlist, +support information, device programming or simulation file, or any other +related documentation or information provided by Altera or a megafunction +partner, remains with Altera, the megafunction partner, or their respective +licensors. No other licenses, including any licenses needed under any third +party's intellectual property, are provided herein. +*/ +(header "symbol" (version "1.1")) +(symbol + (rect 0 0 160 112) + (text "mylpm_addsub" (rect 26 2 145 21)(font "Arial" (font_size 10))) + (text "inst" (rect 8 93 30 108)(font "Arial" )) + (port + (pt 0 56) + (input) + (text "dataa[15..0]" (rect 0 0 75 16)(font "Arial" (font_size 8))) + (text "dataa[15..0]" (rect 4 40 73 56)(font "Arial" (font_size 8))) + (line (pt 0 56)(pt 64 56)(line_width 3)) + ) + (port + (pt 0 88) + (input) + (text "datab[15..0]" (rect 0 0 75 16)(font "Arial" (font_size 8))) + (text "datab[15..0]" (rect 4 72 73 88)(font "Arial" (font_size 8))) + (line (pt 0 88)(pt 64 88)(line_width 3)) + ) + (port + (pt 0 72) + (input) + (text "clock" (rect 0 0 34 16)(font "Arial" (font_size 8))) + (text "clock" (rect 4 56 35 72)(font "Arial" (font_size 8))) + (line (pt 0 72)(pt 64 72)(line_width 1)) + ) + (port + (pt 0 32) + (input) + (text "add_sub" (rect 0 0 53 16)(font "Arial" (font_size 8))) + (text "add_sub" (rect 4 16 53 32)(font "Arial" (font_size 8))) + (line (pt 0 32)(pt 80 32)(line_width 1)) + ) + (port + (pt 160 72) + (output) + (text "result[15..0]" (rect 0 0 75 16)(font "Arial" (font_size 8))) + (text "result[15..0]" (rect 88 56 157 72)(font "Arial" (font_size 8))) + (line (pt 160 72)(pt 96 72)(line_width 3)) + ) + (drawing + (text "A" (rect 66 48 75 64)(font "Arial" (font_size 8))) + (text "B" (rect 66 80 75 96)(font "Arial" (font_size 8))) + (text "A+B/A-B" (rect 82 37 134 53)(font "Arial" (font_size 8))) + (line (pt 64 48)(pt 96 56)(line_width 1)) + (line (pt 96 56)(pt 96 88)(line_width 1)) + (line (pt 96 88)(pt 64 96)(line_width 1)) + (line (pt 64 96)(pt 64 48)(line_width 1)) + (line (pt 80 32)(pt 80 52)(line_width 1)) + (line (pt 106 40)(pt 125 40)(line_width 1)) + (line (pt 64 66)(pt 70 72)(line_width 1)) + (line (pt 70 72)(pt 64 78)(line_width 1)) + ) +) diff --git a/fpga/megacells/mylpm_addsub.cmp b/fpga/megacells/mylpm_addsub.cmp new file mode 100755 index 0000000..311c54a --- /dev/null +++ b/fpga/megacells/mylpm_addsub.cmp @@ -0,0 +1,31 @@ +--Copyright (C) 1991-2003 Altera Corporation +--Any megafunction design, and related netlist (encrypted or decrypted), +--support information, device programming or simulation file, and any other +--associated documentation or information provided by Altera or a partner +--under Altera's Megafunction Partnership Program may be used only +--to program PLD devices (but not masked PLD devices) from Altera. Any +--other use of such megafunction design, netlist, support information, +--device programming or simulation file, or any other related documentation +--or information is prohibited for any other purpose, including, but not +--limited to modification, reverse engineering, de-compiling, or use with +--any other silicon devices, unless such use is explicitly licensed under +--a separate agreement with Altera or a megafunction partner. Title to the +--intellectual property, including patents, copyrights, trademarks, trade +--secrets, or maskworks, embodied in any such megafunction design, netlist, +--support information, device programming or simulation file, or any other +--related documentation or information provided by Altera or a megafunction +--partner, remains with Altera, the megafunction partner, or their respective +--licensors. No other licenses, including any licenses needed under any third +--party's intellectual property, are provided herein. + + +component mylpm_addsub + PORT + ( + add_sub : IN STD_LOGIC ; + dataa : IN STD_LOGIC_VECTOR (15 DOWNTO 0); + datab : IN STD_LOGIC_VECTOR (15 DOWNTO 0); + clock : IN STD_LOGIC ; + result : OUT STD_LOGIC_VECTOR (15 DOWNTO 0) + ); +end component; diff --git a/fpga/megacells/mylpm_addsub.inc b/fpga/megacells/mylpm_addsub.inc new file mode 100755 index 0000000..d8b283f --- /dev/null +++ b/fpga/megacells/mylpm_addsub.inc @@ -0,0 +1,32 @@ +--Copyright (C) 1991-2003 Altera Corporation +--Any megafunction design, and related netlist (encrypted or decrypted), +--support information, device programming or simulation file, and any other +--associated documentation or information provided by Altera or a partner +--under Altera's Megafunction Partnership Program may be used only +--to program PLD devices (but not masked PLD devices) from Altera. Any +--other use of such megafunction design, netlist, support information, +--device programming or simulation file, or any other related documentation +--or information is prohibited for any other purpose, including, but not +--limited to modification, reverse engineering, de-compiling, or use with +--any other silicon devices, unless such use is explicitly licensed under +--a separate agreement with Altera or a megafunction partner. Title to the +--intellectual property, including patents, copyrights, trademarks, trade +--secrets, or maskworks, embodied in any such megafunction design, netlist, +--support information, device programming or simulation file, or any other +--related documentation or information provided by Altera or a megafunction +--partner, remains with Altera, the megafunction partner, or their respective +--licensors. No other licenses, including any licenses needed under any third +--party's intellectual property, are provided herein. + + +FUNCTION mylpm_addsub +( + add_sub, + dataa[15..0], + datab[15..0], + clock +) + +RETURNS ( + result[15..0] +); diff --git a/fpga/megacells/mylpm_addsub.v b/fpga/megacells/mylpm_addsub.v new file mode 100755 index 0000000..0566f7e --- /dev/null +++ b/fpga/megacells/mylpm_addsub.v @@ -0,0 +1,102 @@ +// megafunction wizard: %LPM_ADD_SUB% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: lpm_add_sub + +// ============================================================ +// File Name: mylpm_addsub.v +// Megafunction Name(s): +// lpm_add_sub +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// ************************************************************ + + +//Copyright (C) 1991-2003 Altera Corporation +//Any megafunction design, and related netlist (encrypted or decrypted), +//support information, device programming or simulation file, and any other +//associated documentation or information provided by Altera or a partner +//under Altera's Megafunction Partnership Program may be used only +//to program PLD devices (but not masked PLD devices) from Altera. Any +//other use of such megafunction design, netlist, support information, +//device programming or simulation file, or any other related documentation +//or information is prohibited for any other purpose, including, but not +//limited to modification, reverse engineering, de-compiling, or use with +//any other silicon devices, unless such use is explicitly licensed under +//a separate agreement with Altera or a megafunction partner. Title to the +//intellectual property, including patents, copyrights, trademarks, trade +//secrets, or maskworks, embodied in any such megafunction design, netlist, +//support information, device programming or simulation file, or any other +//related documentation or information provided by Altera or a megafunction +//partner, remains with Altera, the megafunction partner, or their respective +//licensors. No other licenses, including any licenses needed under any third +//party's intellectual property, are provided herein. + + +module mylpm_addsub ( + add_sub, + dataa, + datab, + clock, + result); + + input add_sub; + input [15:0] dataa; + input [15:0] datab; + input clock; + output [15:0] result; + + wire [15:0] sub_wire0; + wire [15:0] result = sub_wire0[15:0]; + + lpm_add_sub lpm_add_sub_component ( + .dataa (dataa), + .add_sub (add_sub), + .datab (datab), + .clock (clock), + .result (sub_wire0)); + defparam + lpm_add_sub_component.lpm_width = 16, + lpm_add_sub_component.lpm_direction = "UNUSED", + lpm_add_sub_component.lpm_type = "LPM_ADD_SUB", + lpm_add_sub_component.lpm_hint = "ONE_INPUT_IS_CONSTANT=NO", + lpm_add_sub_component.lpm_pipeline = 1; + + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: nBit NUMERIC "16" +// Retrieval info: PRIVATE: Function NUMERIC "2" +// Retrieval info: PRIVATE: WhichConstant NUMERIC "0" +// Retrieval info: PRIVATE: ConstantA NUMERIC "0" +// Retrieval info: PRIVATE: ConstantB NUMERIC "0" +// Retrieval info: PRIVATE: ValidCtA NUMERIC "0" +// Retrieval info: PRIVATE: ValidCtB NUMERIC "0" +// Retrieval info: PRIVATE: CarryIn NUMERIC "0" +// Retrieval info: PRIVATE: CarryOut NUMERIC "0" +// Retrieval info: PRIVATE: Overflow NUMERIC "0" +// Retrieval info: PRIVATE: Latency NUMERIC "1" +// Retrieval info: PRIVATE: aclr NUMERIC "0" +// Retrieval info: PRIVATE: clken NUMERIC "0" +// Retrieval info: PRIVATE: LPM_PIPELINE NUMERIC "1" +// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "16" +// Retrieval info: CONSTANT: LPM_DIRECTION STRING "UNUSED" +// Retrieval info: CONSTANT: LPM_TYPE STRING "LPM_ADD_SUB" +// Retrieval info: CONSTANT: LPM_HINT STRING "ONE_INPUT_IS_CONSTANT=NO" +// Retrieval info: CONSTANT: LPM_PIPELINE NUMERIC "1" +// Retrieval info: USED_PORT: add_sub 0 0 0 0 INPUT NODEFVAL add_sub +// Retrieval info: USED_PORT: result 0 0 16 0 OUTPUT NODEFVAL result[15..0] +// Retrieval info: USED_PORT: dataa 0 0 16 0 INPUT NODEFVAL dataa[15..0] +// Retrieval info: USED_PORT: datab 0 0 16 0 INPUT NODEFVAL datab[15..0] +// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL clock +// Retrieval info: CONNECT: @add_sub 0 0 0 0 add_sub 0 0 0 0 +// Retrieval info: CONNECT: result 0 0 16 0 @result 0 0 16 0 +// Retrieval info: CONNECT: @dataa 0 0 16 0 dataa 0 0 16 0 +// Retrieval info: CONNECT: @datab 0 0 16 0 datab 0 0 16 0 +// Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0 +// Retrieval info: LIBRARY: lpm lpm.lpm_components.all diff --git a/fpga/megacells/mylpm_addsub_bb.v b/fpga/megacells/mylpm_addsub_bb.v new file mode 100755 index 0000000..598d3da --- /dev/null +++ b/fpga/megacells/mylpm_addsub_bb.v @@ -0,0 +1,35 @@ +//Copyright (C) 1991-2003 Altera Corporation +//Any megafunction design, and related netlist (encrypted or decrypted), +//support information, device programming or simulation file, and any other +//associated documentation or information provided by Altera or a partner +//under Altera's Megafunction Partnership Program may be used only +//to program PLD devices (but not masked PLD devices) from Altera. Any +//other use of such megafunction design, netlist, support information, +//device programming or simulation file, or any other related documentation +//or information is prohibited for any other purpose, including, but not +//limited to modification, reverse engineering, de-compiling, or use with +//any other silicon devices, unless such use is explicitly licensed under +//a separate agreement with Altera or a megafunction partner. Title to the +//intellectual property, including patents, copyrights, trademarks, trade +//secrets, or maskworks, embodied in any such megafunction design, netlist, +//support information, device programming or simulation file, or any other +//related documentation or information provided by Altera or a megafunction +//partner, remains with Altera, the megafunction partner, or their respective +//licensors. No other licenses, including any licenses needed under any third +//party's intellectual property, are provided herein. + +module mylpm_addsub ( + add_sub, + dataa, + datab, + clock, + result); + + input add_sub; + input [15:0] dataa; + input [15:0] datab; + input clock; + output [15:0] result; + +endmodule + diff --git a/fpga/megacells/mylpm_addsub_inst.v b/fpga/megacells/mylpm_addsub_inst.v new file mode 100755 index 0000000..dd732bd --- /dev/null +++ b/fpga/megacells/mylpm_addsub_inst.v @@ -0,0 +1,7 @@ +mylpm_addsub mylpm_addsub_inst ( + .add_sub ( add_sub_sig ), + .dataa ( dataa_sig ), + .datab ( datab_sig ), + .clock ( clock_sig ), + .result ( result_sig ) + ); diff --git a/fpga/megacells/pll.v b/fpga/megacells/pll.v new file mode 100644 index 0000000..dacd11f --- /dev/null +++ b/fpga/megacells/pll.v @@ -0,0 +1,207 @@ +// megafunction wizard: %ALTPLL% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: altpll + +// ============================================================ +// File Name: pll.v +// Megafunction Name(s): +// altpll +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// +// 4.0 Build 214 3/25/2004 SP 1 SJ Web Edition +// ************************************************************ + + +//Copyright (C) 1991-2004 Altera Corporation +//Any megafunction design, and related netlist (encrypted or decrypted), +//support information, device programming or simulation file, and any other +//associated documentation or information provided by Altera or a partner +//under Altera's Megafunction Partnership Program may be used only +//to program PLD devices (but not masked PLD devices) from Altera. Any +//other use of such megafunction design, netlist, support information, +//device programming or simulation file, or any other related documentation +//or information is prohibited for any other purpose, including, but not +//limited to modification, reverse engineering, de-compiling, or use with +//any other silicon devices, unless such use is explicitly licensed under +//a separate agreement with Altera or a megafunction partner. Title to the +//intellectual property, including patents, copyrights, trademarks, trade +//secrets, or maskworks, embodied in any such megafunction design, netlist, +//support information, device programming or simulation file, or any other +//related documentation or information provided by Altera or a megafunction +//partner, remains with Altera, the megafunction partner, or their respective +//licensors. No other licenses, including any licenses needed under any third +//party's intellectual property, are provided herein. + + +// synopsys translate_off +`timescale 1 ps / 1 ps +// synopsys translate_on +module pll ( + inclk0, + c0); + + input inclk0; + output c0; + + wire [5:0] sub_wire0; + wire [0:0] sub_wire4 = 1'h0; + wire [0:0] sub_wire1 = sub_wire0[0:0]; + wire c0 = sub_wire1; + wire sub_wire2 = inclk0; + wire [1:0] sub_wire3 = {sub_wire4, sub_wire2}; + + altpll altpll_component ( + .inclk (sub_wire3), + .clk (sub_wire0) + // synopsys translate_off +, + .fbin (), + .pllena (), + .clkswitch (), + .areset (), + .pfdena (), + .clkena (), + .extclkena (), + .scanclk (), + .scanaclr (), + .scandata (), + .scanread (), + .scanwrite (), + .extclk (), + .clkbad (), + .activeclock (), + .locked (), + .clkloss (), + .scandataout (), + .scandone (), + .sclkout1 (), + .sclkout0 (), + .enable0 (), + .enable1 () + // synopsys translate_on + +); + defparam + altpll_component.clk0_duty_cycle = 50, + altpll_component.lpm_type = "altpll", + altpll_component.clk0_multiply_by = 1, + altpll_component.inclk0_input_frequency = 20833, + altpll_component.clk0_divide_by = 1, + altpll_component.pll_type = "AUTO", + altpll_component.clk0_time_delay = "0", + altpll_component.intended_device_family = "Cyclone", + altpll_component.operation_mode = "NORMAL", + altpll_component.compensate_clock = "CLK0", + altpll_component.clk0_phase_shift = "-3000"; + + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0" +// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "ns" +// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz" +// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz" +// Retrieval info: PRIVATE: SPREAD_USE STRING "0" +// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1" +// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575" +// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0" +// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000" +// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "-3.00000000" +// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1" +// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0" +// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500" +// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0" +// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0" +// Retrieval info: PRIVATE: TIME_SHIFT0 STRING "0.00000000" +// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1" +// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000" +// Retrieval info: PRIVATE: BANDWIDTH_USE_CUSTOM STRING "0" +// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8" +// Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000" +// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1" +// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0" +// Retrieval info: PRIVATE: USE_CLK0 STRING "1" +// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1" +// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0" +// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0" +// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0" +// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000" +// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0" +// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0" +// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz" +// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz" +// Retrieval info: PRIVATE: MEGAFN_PORT_INFO_0 STRING "inclk;fbin;pllena;clkswitch;areset" +// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0" +// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1" +// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "e0" +// Retrieval info: PRIVATE: MEGAFN_PORT_INFO_1 STRING "pfdena;clkena;extclkena;scanclk;scanaclr" +// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1" +// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1" +// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1" +// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0" +// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1" +// Retrieval info: PRIVATE: MEGAFN_PORT_INFO_2 STRING "scandata;scanread;scanwrite;clk;extclk" +// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0" +// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1" +// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0" +// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "528.000" +// Retrieval info: PRIVATE: MEGAFN_PORT_INFO_3 STRING "clkbad;activeclock;locked;clkloss;scandataout" +// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0" +// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz" +// Retrieval info: PRIVATE: PLL_ENA_CHECK STRING "0" +// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "48.000" +// Retrieval info: PRIVATE: MEGAFN_PORT_INFO_4 STRING "scandone;sclkout1;sclkout0;enable0;enable1" +// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0" +// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1" +// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "100.000" +// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0" +// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0" +// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0" +// Retrieval info: PRIVATE: DEV_FAMILY STRING "Cyclone" +// Retrieval info: PRIVATE: LOCK_LOSS_SWITCHOVER_CHECK STRING "0" +// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1" +// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low" +// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: USE_CLKENA0 STRING "0" +// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg" +// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0" +// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0" +// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: DEVICE_FAMILY NUMERIC "11" +// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all +// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50" +// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll" +// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "1" +// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "20833" +// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "1" +// Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO" +// Retrieval info: CONSTANT: CLK0_TIME_DELAY STRING "0" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL" +// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0" +// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "-3000" +// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT VCC "c0" +// Retrieval info: USED_PORT: @clk 0 0 6 0 OUTPUT VCC "@clk[5..0]" +// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT GND "inclk0" +// Retrieval info: USED_PORT: @extclk 0 0 4 0 OUTPUT VCC "@extclk[3..0]" +// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0 +// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0 +// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0 +// Retrieval info: GEN_FILE: TYPE_NORMAL pll.v TRUE FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL pll.inc FALSE FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL pll.cmp FALSE FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL pll.bsf FALSE FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL pll_inst.v TRUE FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL pll_bb.v TRUE FALSE diff --git a/fpga/megacells/pll_bb.v b/fpga/megacells/pll_bb.v new file mode 100644 index 0000000..debadaa --- /dev/null +++ b/fpga/megacells/pll_bb.v @@ -0,0 +1,29 @@ +//Copyright (C) 1991-2004 Altera Corporation +//Any megafunction design, and related netlist (encrypted or decrypted), +//support information, device programming or simulation file, and any other +//associated documentation or information provided by Altera or a partner +//under Altera's Megafunction Partnership Program may be used only +//to program PLD devices (but not masked PLD devices) from Altera. Any +//other use of such megafunction design, netlist, support information, +//device programming or simulation file, or any other related documentation +//or information is prohibited for any other purpose, including, but not +//limited to modification, reverse engineering, de-compiling, or use with +//any other silicon devices, unless such use is explicitly licensed under +//a separate agreement with Altera or a megafunction partner. Title to the +//intellectual property, including patents, copyrights, trademarks, trade +//secrets, or maskworks, embodied in any such megafunction design, netlist, +//support information, device programming or simulation file, or any other +//related documentation or information provided by Altera or a megafunction +//partner, remains with Altera, the megafunction partner, or their respective +//licensors. No other licenses, including any licenses needed under any third +//party's intellectual property, are provided herein. + +module pll ( + inclk0, + c0); + + input inclk0; + output c0; + +endmodule + diff --git a/fpga/megacells/pll_inst.v b/fpga/megacells/pll_inst.v new file mode 100644 index 0000000..97db58b --- /dev/null +++ b/fpga/megacells/pll_inst.v @@ -0,0 +1,4 @@ +pll pll_inst ( + .inclk0 ( inclk0_sig ), + .c0 ( c0_sig ) + ); diff --git a/fpga/megacells/sub32.bsf b/fpga/megacells/sub32.bsf new file mode 100755 index 0000000..753fdc7 --- /dev/null +++ b/fpga/megacells/sub32.bsf @@ -0,0 +1,87 @@ +/* +WARNING: Do NOT edit the input and output ports in this file in a text +editor if you plan to continue editing the block that represents it in +the Block Editor! File corruption is VERY likely to occur. +*/ +/* +Copyright (C) 1991-2003 Altera Corporation +Any megafunction design, and related netlist (encrypted or decrypted), +support information, device programming or simulation file, and any other +associated documentation or information provided by Altera or a partner +under Altera's Megafunction Partnership Program may be used only +to program PLD devices (but not masked PLD devices) from Altera. Any +other use of such megafunction design, netlist, support information, +device programming or simulation file, or any other related documentation +or information is prohibited for any other purpose, including, but not +limited to modification, reverse engineering, de-compiling, or use with +any other silicon devices, unless such use is explicitly licensed under +a separate agreement with Altera or a megafunction partner. Title to the +intellectual property, including patents, copyrights, trademarks, trade +secrets, or maskworks, embodied in any such megafunction design, netlist, +support information, device programming or simulation file, or any other +related documentation or information provided by Altera or a megafunction +partner, remains with Altera, the megafunction partner, or their respective +licensors. No other licenses, including any licenses needed under any third +party's intellectual property, are provided herein. +*/ +(header "symbol" (version "1.1")) +(symbol + (rect 0 0 160 128) + (text "sub32" (rect 58 2 109 21)(font "Arial" (font_size 10))) + (text "inst" (rect 8 109 31 124)(font "Arial" )) + (port + (pt 0 40) + (input) + (text "dataa[31..0]" (rect 0 0 81 16)(font "Arial" (font_size 8))) + (text "dataa[31..0]" (rect 4 24 73 40)(font "Arial" (font_size 8))) + (line (pt 0 40)(pt 64 40)(line_width 3)) + ) + (port + (pt 0 72) + (input) + (text "datab[31..0]" (rect 0 0 81 16)(font "Arial" (font_size 8))) + (text "datab[31..0]" (rect 4 56 73 72)(font "Arial" (font_size 8))) + (line (pt 0 72)(pt 64 72)(line_width 3)) + ) + (port + (pt 0 56) + (input) + (text "clock" (rect 0 0 36 16)(font "Arial" (font_size 8))) + (text "clock" (rect 4 40 35 56)(font "Arial" (font_size 8))) + (line (pt 0 56)(pt 64 56)(line_width 1)) + ) + (port + (pt 0 96) + (input) + (text "clken" (rect 0 0 36 16)(font "Arial" (font_size 8))) + (text "clken" (rect 4 80 35 96)(font "Arial" (font_size 8))) + (line (pt 0 96)(pt 74 96)(line_width 1)) + ) + (port + (pt 0 112) + (input) + (text "aclr" (rect 0 0 24 16)(font "Arial" (font_size 8))) + (text "aclr" (rect 4 96 25 112)(font "Arial" (font_size 8))) + (line (pt 0 112)(pt 85 112)(line_width 1)) + ) + (port + (pt 160 56) + (output) + (text "result[31..0]" (rect 0 0 81 16)(font "Arial" (font_size 8))) + (text "result[31..0]" (rect 88 40 157 56)(font "Arial" (font_size 8))) + (line (pt 160 56)(pt 96 56)(line_width 3)) + ) + (drawing + (text "A" (rect 66 32 75 48)(font "Arial" (font_size 8))) + (text "B" (rect 66 64 75 80)(font "Arial" (font_size 8))) + (text "A-B" (rect 72 48 94 64)(font "Arial" (font_size 8))) + (line (pt 64 32)(pt 96 40)(line_width 1)) + (line (pt 96 40)(pt 96 72)(line_width 1)) + (line (pt 96 72)(pt 64 80)(line_width 1)) + (line (pt 64 80)(pt 64 32)(line_width 1)) + (line (pt 74 96)(pt 74 77)(line_width 1)) + (line (pt 85 112)(pt 85 74)(line_width 1)) + (line (pt 64 50)(pt 70 56)(line_width 1)) + (line (pt 70 56)(pt 64 62)(line_width 1)) + ) +) diff --git a/fpga/megacells/sub32.cmp b/fpga/megacells/sub32.cmp new file mode 100755 index 0000000..0d5b62e --- /dev/null +++ b/fpga/megacells/sub32.cmp @@ -0,0 +1,32 @@ +--Copyright (C) 1991-2003 Altera Corporation +--Any megafunction design, and related netlist (encrypted or decrypted), +--support information, device programming or simulation file, and any other +--associated documentation or information provided by Altera or a partner +--under Altera's Megafunction Partnership Program may be used only +--to program PLD devices (but not masked PLD devices) from Altera. Any +--other use of such megafunction design, netlist, support information, +--device programming or simulation file, or any other related documentation +--or information is prohibited for any other purpose, including, but not +--limited to modification, reverse engineering, de-compiling, or use with +--any other silicon devices, unless such use is explicitly licensed under +--a separate agreement with Altera or a megafunction partner. Title to the +--intellectual property, including patents, copyrights, trademarks, trade +--secrets, or maskworks, embodied in any such megafunction design, netlist, +--support information, device programming or simulation file, or any other +--related documentation or information provided by Altera or a megafunction +--partner, remains with Altera, the megafunction partner, or their respective +--licensors. No other licenses, including any licenses needed under any third +--party's intellectual property, are provided herein. + + +component sub32 + PORT + ( + dataa : IN STD_LOGIC_VECTOR (31 DOWNTO 0); + datab : IN STD_LOGIC_VECTOR (31 DOWNTO 0); + clock : IN STD_LOGIC ; + aclr : IN STD_LOGIC ; + clken : IN STD_LOGIC ; + result : OUT STD_LOGIC_VECTOR (31 DOWNTO 0) + ); +end component; diff --git a/fpga/megacells/sub32.inc b/fpga/megacells/sub32.inc new file mode 100755 index 0000000..3c64e21 --- /dev/null +++ b/fpga/megacells/sub32.inc @@ -0,0 +1,33 @@ +--Copyright (C) 1991-2003 Altera Corporation +--Any megafunction design, and related netlist (encrypted or decrypted), +--support information, device programming or simulation file, and any other +--associated documentation or information provided by Altera or a partner +--under Altera's Megafunction Partnership Program may be used only +--to program PLD devices (but not masked PLD devices) from Altera. Any +--other use of such megafunction design, netlist, support information, +--device programming or simulation file, or any other related documentation +--or information is prohibited for any other purpose, including, but not +--limited to modification, reverse engineering, de-compiling, or use with +--any other silicon devices, unless such use is explicitly licensed under +--a separate agreement with Altera or a megafunction partner. Title to the +--intellectual property, including patents, copyrights, trademarks, trade +--secrets, or maskworks, embodied in any such megafunction design, netlist, +--support information, device programming or simulation file, or any other +--related documentation or information provided by Altera or a megafunction +--partner, remains with Altera, the megafunction partner, or their respective +--licensors. No other licenses, including any licenses needed under any third +--party's intellectual property, are provided herein. + + +FUNCTION sub32 +( + dataa[31..0], + datab[31..0], + clock, + aclr, + clken +) + +RETURNS ( + result[31..0] +); diff --git a/fpga/megacells/sub32.v b/fpga/megacells/sub32.v new file mode 100755 index 0000000..dd825d9 --- /dev/null +++ b/fpga/megacells/sub32.v @@ -0,0 +1,675 @@ +// megafunction wizard: %LPM_ADD_SUB%CBX% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: lpm_add_sub + +// ============================================================ +// File Name: sub32.v +// Megafunction Name(s): +// lpm_add_sub +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// ************************************************************ + + +//Copyright (C) 1991-2003 Altera Corporation +//Any megafunction design, and related netlist (encrypted or decrypted), +//support information, device programming or simulation file, and any other +//associated documentation or information provided by Altera or a partner +//under Altera's Megafunction Partnership Program may be used only +//to program PLD devices (but not masked PLD devices) from Altera. Any +//other use of such megafunction design, netlist, support information, +//device programming or simulation file, or any other related documentation +//or information is prohibited for any other purpose, including, but not +//limited to modification, reverse engineering, de-compiling, or use with +//any other silicon devices, unless such use is explicitly licensed under +//a separate agreement with Altera or a megafunction partner. Title to the +//intellectual property, including patents, copyrights, trademarks, trade +//secrets, or maskworks, embodied in any such megafunction design, netlist, +//support information, device programming or simulation file, or any other +//related documentation or information provided by Altera or a megafunction +//partner, remains with Altera, the megafunction partner, or their respective +//licensors. No other licenses, including any licenses needed under any third +//party's intellectual property, are provided herein. + + +//lpm_add_sub DEVICE_FAMILY=Cyclone LPM_DIRECTION=SUB LPM_PIPELINE=1 LPM_WIDTH=32 aclr clken clock dataa datab result +//VERSION_BEGIN 3.0 cbx_lpm_add_sub 2003:04:10:18:28:42:SJ cbx_mgl 2003:06:11:11:00:44:SJ cbx_stratix 2003:05:16:10:26:50:SJ VERSION_END + +//synthesis_resources = lut 32 +module sub32_add_sub_cqa + ( + aclr, + clken, + clock, + dataa, + datab, + result) /* synthesis synthesis_clearbox=1 */; + input aclr; + input clken; + input clock; + input [31:0] dataa; + input [31:0] datab; + output [31:0] result; + + wire [0:0] wire_add_sub_cella_0cout; + wire [0:0] wire_add_sub_cella_1cout; + wire [0:0] wire_add_sub_cella_2cout; + wire [0:0] wire_add_sub_cella_3cout; + wire [0:0] wire_add_sub_cella_4cout; + wire [0:0] wire_add_sub_cella_5cout; + wire [0:0] wire_add_sub_cella_6cout; + wire [0:0] wire_add_sub_cella_7cout; + wire [0:0] wire_add_sub_cella_8cout; + wire [0:0] wire_add_sub_cella_9cout; + wire [0:0] wire_add_sub_cella_10cout; + wire [0:0] wire_add_sub_cella_11cout; + wire [0:0] wire_add_sub_cella_12cout; + wire [0:0] wire_add_sub_cella_13cout; + wire [0:0] wire_add_sub_cella_14cout; + wire [0:0] wire_add_sub_cella_15cout; + wire [0:0] wire_add_sub_cella_16cout; + wire [0:0] wire_add_sub_cella_17cout; + wire [0:0] wire_add_sub_cella_18cout; + wire [0:0] wire_add_sub_cella_19cout; + wire [0:0] wire_add_sub_cella_20cout; + wire [0:0] wire_add_sub_cella_21cout; + wire [0:0] wire_add_sub_cella_22cout; + wire [0:0] wire_add_sub_cella_23cout; + wire [0:0] wire_add_sub_cella_24cout; + wire [0:0] wire_add_sub_cella_25cout; + wire [0:0] wire_add_sub_cella_26cout; + wire [0:0] wire_add_sub_cella_27cout; + wire [0:0] wire_add_sub_cella_28cout; + wire [0:0] wire_add_sub_cella_29cout; + wire [0:0] wire_add_sub_cella_30cout; + wire [31:0] wire_add_sub_cella_dataa; + wire [31:0] wire_add_sub_cella_datab; + wire [31:0] wire_add_sub_cella_regout; + + stratix_lcell add_sub_cella_0 + ( + .aclr(aclr), + .cin(1'b1), + .clk(clock), + .cout(wire_add_sub_cella_0cout[0:0]), + .dataa(wire_add_sub_cella_dataa[0:0]), + .datab(wire_add_sub_cella_datab[0:0]), + .ena(clken), + .regout(wire_add_sub_cella_regout[0:0])); + defparam + add_sub_cella_0.cin_used = "true", + add_sub_cella_0.lut_mask = "69b2", + add_sub_cella_0.operation_mode = "arithmetic", + add_sub_cella_0.sum_lutc_input = "cin", + add_sub_cella_0.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_1 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_0cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_1cout[0:0]), + .dataa(wire_add_sub_cella_dataa[1:1]), + .datab(wire_add_sub_cella_datab[1:1]), + .ena(clken), + .regout(wire_add_sub_cella_regout[1:1])); + defparam + add_sub_cella_1.cin_used = "true", + add_sub_cella_1.lut_mask = "69b2", + add_sub_cella_1.operation_mode = "arithmetic", + add_sub_cella_1.sum_lutc_input = "cin", + add_sub_cella_1.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_2 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_1cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_2cout[0:0]), + .dataa(wire_add_sub_cella_dataa[2:2]), + .datab(wire_add_sub_cella_datab[2:2]), + .ena(clken), + .regout(wire_add_sub_cella_regout[2:2])); + defparam + add_sub_cella_2.cin_used = "true", + add_sub_cella_2.lut_mask = "69b2", + add_sub_cella_2.operation_mode = "arithmetic", + add_sub_cella_2.sum_lutc_input = "cin", + add_sub_cella_2.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_3 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_2cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_3cout[0:0]), + .dataa(wire_add_sub_cella_dataa[3:3]), + .datab(wire_add_sub_cella_datab[3:3]), + .ena(clken), + .regout(wire_add_sub_cella_regout[3:3])); + defparam + add_sub_cella_3.cin_used = "true", + add_sub_cella_3.lut_mask = "69b2", + add_sub_cella_3.operation_mode = "arithmetic", + add_sub_cella_3.sum_lutc_input = "cin", + add_sub_cella_3.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_4 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_3cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_4cout[0:0]), + .dataa(wire_add_sub_cella_dataa[4:4]), + .datab(wire_add_sub_cella_datab[4:4]), + .ena(clken), + .regout(wire_add_sub_cella_regout[4:4])); + defparam + add_sub_cella_4.cin_used = "true", + add_sub_cella_4.lut_mask = "69b2", + add_sub_cella_4.operation_mode = "arithmetic", + add_sub_cella_4.sum_lutc_input = "cin", + add_sub_cella_4.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_5 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_4cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_5cout[0:0]), + .dataa(wire_add_sub_cella_dataa[5:5]), + .datab(wire_add_sub_cella_datab[5:5]), + .ena(clken), + .regout(wire_add_sub_cella_regout[5:5])); + defparam + add_sub_cella_5.cin_used = "true", + add_sub_cella_5.lut_mask = "69b2", + add_sub_cella_5.operation_mode = "arithmetic", + add_sub_cella_5.sum_lutc_input = "cin", + add_sub_cella_5.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_6 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_5cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_6cout[0:0]), + .dataa(wire_add_sub_cella_dataa[6:6]), + .datab(wire_add_sub_cella_datab[6:6]), + .ena(clken), + .regout(wire_add_sub_cella_regout[6:6])); + defparam + add_sub_cella_6.cin_used = "true", + add_sub_cella_6.lut_mask = "69b2", + add_sub_cella_6.operation_mode = "arithmetic", + add_sub_cella_6.sum_lutc_input = "cin", + add_sub_cella_6.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_7 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_6cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_7cout[0:0]), + .dataa(wire_add_sub_cella_dataa[7:7]), + .datab(wire_add_sub_cella_datab[7:7]), + .ena(clken), + .regout(wire_add_sub_cella_regout[7:7])); + defparam + add_sub_cella_7.cin_used = "true", + add_sub_cella_7.lut_mask = "69b2", + add_sub_cella_7.operation_mode = "arithmetic", + add_sub_cella_7.sum_lutc_input = "cin", + add_sub_cella_7.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_8 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_7cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_8cout[0:0]), + .dataa(wire_add_sub_cella_dataa[8:8]), + .datab(wire_add_sub_cella_datab[8:8]), + .ena(clken), + .regout(wire_add_sub_cella_regout[8:8])); + defparam + add_sub_cella_8.cin_used = "true", + add_sub_cella_8.lut_mask = "69b2", + add_sub_cella_8.operation_mode = "arithmetic", + add_sub_cella_8.sum_lutc_input = "cin", + add_sub_cella_8.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_9 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_8cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_9cout[0:0]), + .dataa(wire_add_sub_cella_dataa[9:9]), + .datab(wire_add_sub_cella_datab[9:9]), + .ena(clken), + .regout(wire_add_sub_cella_regout[9:9])); + defparam + add_sub_cella_9.cin_used = "true", + add_sub_cella_9.lut_mask = "69b2", + add_sub_cella_9.operation_mode = "arithmetic", + add_sub_cella_9.sum_lutc_input = "cin", + add_sub_cella_9.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_10 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_9cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_10cout[0:0]), + .dataa(wire_add_sub_cella_dataa[10:10]), + .datab(wire_add_sub_cella_datab[10:10]), + .ena(clken), + .regout(wire_add_sub_cella_regout[10:10])); + defparam + add_sub_cella_10.cin_used = "true", + add_sub_cella_10.lut_mask = "69b2", + add_sub_cella_10.operation_mode = "arithmetic", + add_sub_cella_10.sum_lutc_input = "cin", + add_sub_cella_10.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_11 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_10cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_11cout[0:0]), + .dataa(wire_add_sub_cella_dataa[11:11]), + .datab(wire_add_sub_cella_datab[11:11]), + .ena(clken), + .regout(wire_add_sub_cella_regout[11:11])); + defparam + add_sub_cella_11.cin_used = "true", + add_sub_cella_11.lut_mask = "69b2", + add_sub_cella_11.operation_mode = "arithmetic", + add_sub_cella_11.sum_lutc_input = "cin", + add_sub_cella_11.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_12 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_11cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_12cout[0:0]), + .dataa(wire_add_sub_cella_dataa[12:12]), + .datab(wire_add_sub_cella_datab[12:12]), + .ena(clken), + .regout(wire_add_sub_cella_regout[12:12])); + defparam + add_sub_cella_12.cin_used = "true", + add_sub_cella_12.lut_mask = "69b2", + add_sub_cella_12.operation_mode = "arithmetic", + add_sub_cella_12.sum_lutc_input = "cin", + add_sub_cella_12.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_13 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_12cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_13cout[0:0]), + .dataa(wire_add_sub_cella_dataa[13:13]), + .datab(wire_add_sub_cella_datab[13:13]), + .ena(clken), + .regout(wire_add_sub_cella_regout[13:13])); + defparam + add_sub_cella_13.cin_used = "true", + add_sub_cella_13.lut_mask = "69b2", + add_sub_cella_13.operation_mode = "arithmetic", + add_sub_cella_13.sum_lutc_input = "cin", + add_sub_cella_13.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_14 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_13cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_14cout[0:0]), + .dataa(wire_add_sub_cella_dataa[14:14]), + .datab(wire_add_sub_cella_datab[14:14]), + .ena(clken), + .regout(wire_add_sub_cella_regout[14:14])); + defparam + add_sub_cella_14.cin_used = "true", + add_sub_cella_14.lut_mask = "69b2", + add_sub_cella_14.operation_mode = "arithmetic", + add_sub_cella_14.sum_lutc_input = "cin", + add_sub_cella_14.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_15 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_14cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_15cout[0:0]), + .dataa(wire_add_sub_cella_dataa[15:15]), + .datab(wire_add_sub_cella_datab[15:15]), + .ena(clken), + .regout(wire_add_sub_cella_regout[15:15])); + defparam + add_sub_cella_15.cin_used = "true", + add_sub_cella_15.lut_mask = "69b2", + add_sub_cella_15.operation_mode = "arithmetic", + add_sub_cella_15.sum_lutc_input = "cin", + add_sub_cella_15.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_16 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_15cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_16cout[0:0]), + .dataa(wire_add_sub_cella_dataa[16:16]), + .datab(wire_add_sub_cella_datab[16:16]), + .ena(clken), + .regout(wire_add_sub_cella_regout[16:16])); + defparam + add_sub_cella_16.cin_used = "true", + add_sub_cella_16.lut_mask = "69b2", + add_sub_cella_16.operation_mode = "arithmetic", + add_sub_cella_16.sum_lutc_input = "cin", + add_sub_cella_16.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_17 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_16cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_17cout[0:0]), + .dataa(wire_add_sub_cella_dataa[17:17]), + .datab(wire_add_sub_cella_datab[17:17]), + .ena(clken), + .regout(wire_add_sub_cella_regout[17:17])); + defparam + add_sub_cella_17.cin_used = "true", + add_sub_cella_17.lut_mask = "69b2", + add_sub_cella_17.operation_mode = "arithmetic", + add_sub_cella_17.sum_lutc_input = "cin", + add_sub_cella_17.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_18 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_17cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_18cout[0:0]), + .dataa(wire_add_sub_cella_dataa[18:18]), + .datab(wire_add_sub_cella_datab[18:18]), + .ena(clken), + .regout(wire_add_sub_cella_regout[18:18])); + defparam + add_sub_cella_18.cin_used = "true", + add_sub_cella_18.lut_mask = "69b2", + add_sub_cella_18.operation_mode = "arithmetic", + add_sub_cella_18.sum_lutc_input = "cin", + add_sub_cella_18.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_19 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_18cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_19cout[0:0]), + .dataa(wire_add_sub_cella_dataa[19:19]), + .datab(wire_add_sub_cella_datab[19:19]), + .ena(clken), + .regout(wire_add_sub_cella_regout[19:19])); + defparam + add_sub_cella_19.cin_used = "true", + add_sub_cella_19.lut_mask = "69b2", + add_sub_cella_19.operation_mode = "arithmetic", + add_sub_cella_19.sum_lutc_input = "cin", + add_sub_cella_19.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_20 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_19cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_20cout[0:0]), + .dataa(wire_add_sub_cella_dataa[20:20]), + .datab(wire_add_sub_cella_datab[20:20]), + .ena(clken), + .regout(wire_add_sub_cella_regout[20:20])); + defparam + add_sub_cella_20.cin_used = "true", + add_sub_cella_20.lut_mask = "69b2", + add_sub_cella_20.operation_mode = "arithmetic", + add_sub_cella_20.sum_lutc_input = "cin", + add_sub_cella_20.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_21 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_20cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_21cout[0:0]), + .dataa(wire_add_sub_cella_dataa[21:21]), + .datab(wire_add_sub_cella_datab[21:21]), + .ena(clken), + .regout(wire_add_sub_cella_regout[21:21])); + defparam + add_sub_cella_21.cin_used = "true", + add_sub_cella_21.lut_mask = "69b2", + add_sub_cella_21.operation_mode = "arithmetic", + add_sub_cella_21.sum_lutc_input = "cin", + add_sub_cella_21.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_22 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_21cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_22cout[0:0]), + .dataa(wire_add_sub_cella_dataa[22:22]), + .datab(wire_add_sub_cella_datab[22:22]), + .ena(clken), + .regout(wire_add_sub_cella_regout[22:22])); + defparam + add_sub_cella_22.cin_used = "true", + add_sub_cella_22.lut_mask = "69b2", + add_sub_cella_22.operation_mode = "arithmetic", + add_sub_cella_22.sum_lutc_input = "cin", + add_sub_cella_22.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_23 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_22cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_23cout[0:0]), + .dataa(wire_add_sub_cella_dataa[23:23]), + .datab(wire_add_sub_cella_datab[23:23]), + .ena(clken), + .regout(wire_add_sub_cella_regout[23:23])); + defparam + add_sub_cella_23.cin_used = "true", + add_sub_cella_23.lut_mask = "69b2", + add_sub_cella_23.operation_mode = "arithmetic", + add_sub_cella_23.sum_lutc_input = "cin", + add_sub_cella_23.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_24 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_23cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_24cout[0:0]), + .dataa(wire_add_sub_cella_dataa[24:24]), + .datab(wire_add_sub_cella_datab[24:24]), + .ena(clken), + .regout(wire_add_sub_cella_regout[24:24])); + defparam + add_sub_cella_24.cin_used = "true", + add_sub_cella_24.lut_mask = "69b2", + add_sub_cella_24.operation_mode = "arithmetic", + add_sub_cella_24.sum_lutc_input = "cin", + add_sub_cella_24.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_25 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_24cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_25cout[0:0]), + .dataa(wire_add_sub_cella_dataa[25:25]), + .datab(wire_add_sub_cella_datab[25:25]), + .ena(clken), + .regout(wire_add_sub_cella_regout[25:25])); + defparam + add_sub_cella_25.cin_used = "true", + add_sub_cella_25.lut_mask = "69b2", + add_sub_cella_25.operation_mode = "arithmetic", + add_sub_cella_25.sum_lutc_input = "cin", + add_sub_cella_25.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_26 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_25cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_26cout[0:0]), + .dataa(wire_add_sub_cella_dataa[26:26]), + .datab(wire_add_sub_cella_datab[26:26]), + .ena(clken), + .regout(wire_add_sub_cella_regout[26:26])); + defparam + add_sub_cella_26.cin_used = "true", + add_sub_cella_26.lut_mask = "69b2", + add_sub_cella_26.operation_mode = "arithmetic", + add_sub_cella_26.sum_lutc_input = "cin", + add_sub_cella_26.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_27 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_26cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_27cout[0:0]), + .dataa(wire_add_sub_cella_dataa[27:27]), + .datab(wire_add_sub_cella_datab[27:27]), + .ena(clken), + .regout(wire_add_sub_cella_regout[27:27])); + defparam + add_sub_cella_27.cin_used = "true", + add_sub_cella_27.lut_mask = "69b2", + add_sub_cella_27.operation_mode = "arithmetic", + add_sub_cella_27.sum_lutc_input = "cin", + add_sub_cella_27.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_28 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_27cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_28cout[0:0]), + .dataa(wire_add_sub_cella_dataa[28:28]), + .datab(wire_add_sub_cella_datab[28:28]), + .ena(clken), + .regout(wire_add_sub_cella_regout[28:28])); + defparam + add_sub_cella_28.cin_used = "true", + add_sub_cella_28.lut_mask = "69b2", + add_sub_cella_28.operation_mode = "arithmetic", + add_sub_cella_28.sum_lutc_input = "cin", + add_sub_cella_28.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_29 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_28cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_29cout[0:0]), + .dataa(wire_add_sub_cella_dataa[29:29]), + .datab(wire_add_sub_cella_datab[29:29]), + .ena(clken), + .regout(wire_add_sub_cella_regout[29:29])); + defparam + add_sub_cella_29.cin_used = "true", + add_sub_cella_29.lut_mask = "69b2", + add_sub_cella_29.operation_mode = "arithmetic", + add_sub_cella_29.sum_lutc_input = "cin", + add_sub_cella_29.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_30 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_29cout[0:0]), + .clk(clock), + .cout(wire_add_sub_cella_30cout[0:0]), + .dataa(wire_add_sub_cella_dataa[30:30]), + .datab(wire_add_sub_cella_datab[30:30]), + .ena(clken), + .regout(wire_add_sub_cella_regout[30:30])); + defparam + add_sub_cella_30.cin_used = "true", + add_sub_cella_30.lut_mask = "69b2", + add_sub_cella_30.operation_mode = "arithmetic", + add_sub_cella_30.sum_lutc_input = "cin", + add_sub_cella_30.lpm_type = "stratix_lcell"; + stratix_lcell add_sub_cella_31 + ( + .aclr(aclr), + .cin(wire_add_sub_cella_30cout[0:0]), + .clk(clock), + .dataa(wire_add_sub_cella_dataa[31:31]), + .datab(wire_add_sub_cella_datab[31:31]), + .ena(clken), + .regout(wire_add_sub_cella_regout[31:31])); + defparam + add_sub_cella_31.cin_used = "true", + add_sub_cella_31.lut_mask = "6969", + add_sub_cella_31.operation_mode = "normal", + add_sub_cella_31.sum_lutc_input = "cin", + add_sub_cella_31.lpm_type = "stratix_lcell"; + assign + wire_add_sub_cella_dataa = dataa, + wire_add_sub_cella_datab = datab; + assign + result = wire_add_sub_cella_regout; +endmodule //sub32_add_sub_cqa +//VALID FILE + + +module sub32 ( + dataa, + datab, + clock, + aclr, + clken, + result)/* synthesis synthesis_clearbox = 1 */; + + input [31:0] dataa; + input [31:0] datab; + input clock; + input aclr; + input clken; + output [31:0] result; + + wire [31:0] sub_wire0; + wire [31:0] result = sub_wire0[31:0]; + + sub32_add_sub_cqa sub32_add_sub_cqa_component ( + .dataa (dataa), + .datab (datab), + .clken (clken), + .aclr (aclr), + .clock (clock), + .result (sub_wire0)); + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: nBit NUMERIC "32" +// Retrieval info: PRIVATE: Function NUMERIC "1" +// Retrieval info: PRIVATE: WhichConstant NUMERIC "0" +// Retrieval info: PRIVATE: ConstantA NUMERIC "0" +// Retrieval info: PRIVATE: ConstantB NUMERIC "0" +// Retrieval info: PRIVATE: ValidCtA NUMERIC "0" +// Retrieval info: PRIVATE: ValidCtB NUMERIC "0" +// Retrieval info: PRIVATE: CarryIn NUMERIC "0" +// Retrieval info: PRIVATE: CarryOut NUMERIC "0" +// Retrieval info: PRIVATE: Overflow NUMERIC "0" +// Retrieval info: PRIVATE: Latency NUMERIC "1" +// Retrieval info: PRIVATE: aclr NUMERIC "1" +// Retrieval info: PRIVATE: clken NUMERIC "1" +// Retrieval info: PRIVATE: LPM_PIPELINE NUMERIC "1" +// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "32" +// Retrieval info: CONSTANT: LPM_DIRECTION STRING "SUB" +// Retrieval info: CONSTANT: LPM_TYPE STRING "LPM_ADD_SUB" +// Retrieval info: CONSTANT: LPM_HINT STRING "ONE_INPUT_IS_CONSTANT=NO" +// Retrieval info: CONSTANT: LPM_PIPELINE NUMERIC "1" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone" +// Retrieval info: USED_PORT: result 0 0 32 0 OUTPUT NODEFVAL result[31..0] +// Retrieval info: USED_PORT: dataa 0 0 32 0 INPUT NODEFVAL dataa[31..0] +// Retrieval info: USED_PORT: datab 0 0 32 0 INPUT NODEFVAL datab[31..0] +// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL clock +// Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT NODEFVAL aclr +// Retrieval info: USED_PORT: clken 0 0 0 0 INPUT NODEFVAL clken +// Retrieval info: CONNECT: result 0 0 32 0 @result 0 0 32 0 +// Retrieval info: CONNECT: @dataa 0 0 32 0 dataa 0 0 32 0 +// Retrieval info: CONNECT: @datab 0 0 32 0 datab 0 0 32 0 +// Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0 +// Retrieval info: CONNECT: @aclr 0 0 0 0 aclr 0 0 0 0 +// Retrieval info: CONNECT: @clken 0 0 0 0 clken 0 0 0 0 +// Retrieval info: LIBRARY: lpm lpm.lpm_components.all diff --git a/fpga/megacells/sub32_bb.v b/fpga/megacells/sub32_bb.v new file mode 100755 index 0000000..488ab51 --- /dev/null +++ b/fpga/megacells/sub32_bb.v @@ -0,0 +1,37 @@ +//Copyright (C) 1991-2003 Altera Corporation +//Any megafunction design, and related netlist (encrypted or decrypted), +//support information, device programming or simulation file, and any other +//associated documentation or information provided by Altera or a partner +//under Altera's Megafunction Partnership Program may be used only +//to program PLD devices (but not masked PLD devices) from Altera. Any +//other use of such megafunction design, netlist, support information, +//device programming or simulation file, or any other related documentation +//or information is prohibited for any other purpose, including, but not +//limited to modification, reverse engineering, de-compiling, or use with +//any other silicon devices, unless such use is explicitly licensed under +//a separate agreement with Altera or a megafunction partner. Title to the +//intellectual property, including patents, copyrights, trademarks, trade +//secrets, or maskworks, embodied in any such megafunction design, netlist, +//support information, device programming or simulation file, or any other +//related documentation or information provided by Altera or a megafunction +//partner, remains with Altera, the megafunction partner, or their respective +//licensors. No other licenses, including any licenses needed under any third +//party's intellectual property, are provided herein. + +module sub32 ( + dataa, + datab, + clock, + aclr, + clken, + result)/* synthesis synthesis_clearbox = 1 */; + + input [31:0] dataa; + input [31:0] datab; + input clock; + input aclr; + input clken; + output [31:0] result; + +endmodule + diff --git a/fpga/megacells/sub32_inst.v b/fpga/megacells/sub32_inst.v new file mode 100755 index 0000000..1916fc5 --- /dev/null +++ b/fpga/megacells/sub32_inst.v @@ -0,0 +1,8 @@ +sub32 sub32_inst ( + .dataa ( dataa_sig ), + .datab ( datab_sig ), + .clock ( clock_sig ), + .aclr ( aclr_sig ), + .clken ( clken_sig ), + .result ( result_sig ) + ); diff --git a/fpga/models/bustri.v b/fpga/models/bustri.v new file mode 100644 index 0000000..6e5a0f7 --- /dev/null +++ b/fpga/models/bustri.v @@ -0,0 +1,17 @@ + +// Model for tristate bus on altera +// FIXME do we really need to use a megacell for this? + +module bustri (data, + enabledt, + tridata); + + input [15:0] data; + input enabledt; + inout [15:0] tridata; + + assign tridata = enabledt ? data :16'bz; + +endmodule // bustri + + diff --git a/fpga/models/fifo.v b/fpga/models/fifo.v new file mode 100644 index 0000000..a04e7da --- /dev/null +++ b/fpga/models/fifo.v @@ -0,0 +1,81 @@ +// Model of FIFO in Altera + +module fifo( data, wrreq, rdreq, rdclk, wrclk, aclr, q, + rdfull, rdempty, rdusedw, wrfull, wrempty, wrusedw); + + parameter width = 16; + parameter depth = 1024; + parameter addr_bits = 10; + + //`define rd_req 0; // Set this to 0 for rd_ack, 1 for rd_req + + input [width-1:0] data; + input wrreq; + input rdreq; + input rdclk; + input wrclk; + input aclr; + output [width-1:0] q; + output rdfull; + output rdempty; + output reg [addr_bits-1:0] rdusedw; + output wrfull; + output wrempty; + output reg [addr_bits-1:0] wrusedw; + + reg [width-1:0] mem [0:depth-1]; + reg [addr_bits-1:0] rdptr; + reg [addr_bits-1:0] wrptr; + +`ifdef rd_req + reg [width-1:0] q; +`else + wire [width-1:0] q; +`endif + + integer i; + + always @( aclr) + begin + wrptr <= #1 0; + rdptr <= #1 0; + for(i=0;iYoWEWth-m+5ZH<=FSWX?>(wR{wz6ChL}gunE3K79)u4MpV&-@xzwV>syLFL@19nMrO!PjzTUXeS286Mn{&Ud zXqe}>C6sdpuPj|!zcL{*|D@ZWH2Mz}RgKJ>S2HE1>a|YBuQ1wTey|uC}z89~!pVR*=NMsq^c9{Kro| zOo(44ny`*5idFwVtlZ?0BZW_1`|!if|CkWBCpH&hF?U8n7AAE0E3fi@prRAQ4#z3i zlnU40d#~{JDKWK)#djJd`oO>K34ieh{mlqP^SVA>sT$T;`zrM!*OGO2@eLAJs7n3JXemN!nvSRKUgLkU#&1X7#J+u}j!%iHkvH`q`X8(4ujvQ> z(dzNPsL|9@;ZJ7%4->+-J#+R6Y@FVs_nkQU@rm)Krc-@b{HpKh#~Gu7V4xD0^y}F1 zeJB3)| z1R}#2M7T7O;`r_WP+L{bK!yIae;<(&PZR*XJl07icmZrzxi=SFsS{E>Tv3d%92K}C zA%Hqd+|90HU1MBm4+>_FiDa?zXEHKKwlQ%KHG_&;K7;Za2l27}^cKCWg}yuIeE!@I`R}Ux^N%G_2-kyur0;&GcGUR)0ZpwW z+L)^O+jfYAUWul1@$b}S1RIKx#mXIEASoGgDBWVc(YnvA(%!n5y#6zrcLK#B&wt9;mStLCX=J7tP zOo&nvMc%ya`gcaKkW8X2OXB#qOGszYPZ|ABJBY9L7yNns|FmM!f3avFL=r4V+-YS9 zjt%7@B3Vb!biTwANhBm_B1vb^-=pJ9EWTO0Nj&tDrWffUfselACBHMbHq}UZk)b+ZnUO?>NDGPZ)es@ro9Uim!sQ9Vp~EdWppGVrR8g1NAriPs z!A%0rK=PJ2YvE`lYc2&v3EU!~CJJ%VyPw`n0D>iorcL$hBpqV0HHvhOsT)T3(YXmr zDn(fRc2G1uL}BwHVv+T46IzCJ3bqxnkReJ+q6o<2eI^1~sCI=2@iIxw_{m8p>5eRFYo8H)wG09Ro#N zL?A-A0!~sCo#SN~LL{)Ll*S8TMqwzzt2@_@EaV<4ivhe08Lg2da^s?g@U6#{@O{5r zo6!3IzVw_r((pH_I+I5x&k(mslo1MDB1h4o6sv>QA>J4l@HGbv@nw(*kvR+>#~m(B zQCpO34qF2c21}U&Ba((foAUo5M0z_|o(P#pO(M?o*n*HK(wQt|s;bWdw2mP{K+{=n zb|fxZ0d_sn&L=?%cjQJu)m8m%2FWlPQ4WMI@}N^Lm05LXr9Y`d4E-&l=~`P62leOa zX{ntoBzT~ORC}lF%?AV=Xat&ql|c%TrT)EEj)=SaEDeyVw8#{;fmauzat#n$#>9Xg ze~5|Ti_sCGJQvo20r+;~L5wG5$YSfYYdtfo)Ha&NeOT_?6!C#+z}5k69j0bLHJUQW|_WsUTJF2Ily&xKUdp)W_8X8<Z=2Z2Ts znq()XB#sIL#YPcvZ+wZ6%Vs<+M`_EhW9d>{R=)J8AejU)CdhC-mWUs z16f#60yH04p$7zm#~%|SO?dhu0k1Jc826BN0pEipD@g<_dJ83K%Pjax`KgIKq#!+^ zeyPq#qAWT_{2k^>MCdMRc)?_WiQ+t4a74TZI9@fu}$ezwI)YYtvg^QAD}s- z+`)SNbXugrrObkS-%Moa%3CC-;wF_tEz!yl*OwRf)^QQO^l!uArsh2`!1Li~td;QU z!$9R*l_C&{mZKcR?`>2XyCRLi(7)ASkU4|y+}Sk@C0nj7r!_qOg~SP`ab&@ulZ!EKDeRkQ|4bdcQn)IzLJ-BX;;<5FVqD0cAAa* z78Mrk|E-zbg$>sE#-86gogI%jvtM4h_M|!sj}_99RfT!`=Q?xt{yzJ+zw2_3wkpo-SKiFNur>k;_eAWMqF>C3uU;R!`p`Qa z-U(&E-lbfy4+oAv1KpjD)nBZ-{qx|18#g24yb5&3Mjt)g51h8ID~(Iw!(rPY;q&}A zcGVlwkzI}M-SpN-Vfv_lLm}NA`{T?jv3Pdp-Z4KalqR69p6^ecP%6r;3*UIaz0l)1 zu8V=jXIw(LkVuyzLG4wsTKnN|8cKL8JdOK_t$zIXKj zRfCc?Yx_5^9geEmKVDevoWHNXaAC(sg~@w@W@B`u zaN#Q%PTS?|iMH0`*W$_xSL3ei6WOZ^_eb`2UYZ1PMKSN3T>Q{hH9Qtk_D9OW<+?BT zy{UD=OTlo%v60(dPGh7xz54vpSMQ46JwB_^7dYI#*S`PA!oIf-rO$baOJC)UytQ}t z$n|*k<`2O;)a6X>7A`Qa`#*KP{px3q z*8{(dU#&co-FxZt*;l&)o$xUA|#W}@J_Xlh~lkvE5i1nBD7d%lsthxj<+;DU_#-tm~YYH}`cmfMb?j3g( zI}IPBF(#HB%ecch$G^ndY^Z^8R|#+CD>KcGA&xNz3#w93pit~oX1krt$KDAxw(B(W z)~s@#M3+-0@x~J%~mP z6*;0ac}K85MIF0P#rq1jOnkpGgn;czpKiJYm1l%#OR%!g-&f@k(JE8fV;CRQlhUFbdD`^^3Z-;i&tW z&b#-So1RjKW7?j_g}T*dbsVUL>P56Oz73rNlf0Vs;=X!j@((tPK=N)s!VgX%oy|~5 zVv4JTcx6UnH$#{n6?z4pu&42yS~T~AK6h5D z7*^$O7^`N*TFI3R8+TNuk{H*_h_hiG!&-G|iXS*KNr#-zCCQEfp2{{!*>Y_vUj+1u zSBu~oS5IrQ*!BA6ryQRjp4SDOr|Nt1Pu;WM+hEWt;)(p?gTJkmp52AsPHQ10W8K$Eiz}x z^Ar4B_#;Tn9a{CICUh|?f}Hg|Hokg6}hAl22#>GCYPJbbSNx)w^fp#>FTjIk^zC8?whBf8_y&vL9*Tc_`&;~Wnz)nZty>uo>$2$c6qKaPsN=#)fxyiYI1`cPVhBD< z63JZ7(z0%L>#IW;R_Qq*rs+Oj#Td z`E#%jRk?)iiYO&h9`YfoRL?m@W69yf$mMrN7X zv?9~w zP=wBHC0^KR$l~Gde2=dE*y;;yE%N7 zM*J+MNLf#Vd`3ic!0u-jqpY2ZlyQ!^lfKD-^EYF zzo~wJs}9F#cpo>IQJ0zxvb8d~K(0(@;|7(%5BMJ$%9sv~HglF28w9?xhiq;0Gb09bN;fmixC-yOl3&c14hu)?7k*Z;BkFv3!~4S(6=_#n zZ8eVJ(J1;TukW2){smi@ z|6XwPt|vCLSKNjNDrc^DE}b~C{$4Q z(=)Ri$a}T?%8AEfs3Ju>dOwEIbT(7!D+>Ckl(29!s4ZkG(u^b-ngR1Gwcs8@!vBR++DbKeeXoyh0mWnzNxS4(u?t$qm;9%S8!Ghv%+k8 zmcO3v_4`bN1wSwD=Uu898Xk+eIP=i+|`#E-G{iceJB8%u|e+Dq5RZZTgr ztrwccS2Ss}QQradLT|^#&yUCD%u$z6k47s6Cl)KS#*F?)0=|Ox;jmh@1k^Z&iX*

)yXUFMc46z4X+R z-}w(YhND+a2;A3ybViRKsyWW3cD(XQ)~8Lf_@9Rh@&UxKY&h&1Nee&x*x1(Afs3=F z5!qjk*L;$nSWqw;SQ$S(LJkg$&jv;Y9k_>#mi?M?F8b_9*ZC^^vy_P+4hB6jjdcy2 zpLqRb^p;_3t>yWD#!Yq?>?jX9JpBpYbD=e8XnRTzGWzv&&(fKhr+&CSdw17cLu%DK z*x`!tg7$wLk3TlN_1*mEj~$PX`o(YhgM&RkOnx~qo3<-zBK%nNx!Hd-lxKIQPS1Q` z2|t@P&1F@U+^K)VNcdv1O; zdvm1e=-%t2rY(mLc&P?Z!}!a=_>ZT)Gq;wUJjt{cD0gn`!^x^DR}D>EvhpCJ%Du>&kb(!R23&g&8%w zSAfiy4Q}h*3)TyR!jdnAXi7DDeg!}WvYqHFNP`V{xcUL#Pq1NUfn!)KsMu)%utpCyR_uR(hX2V`R~{=} zpMw>k&nK6k>w7FFPE$-Z704gQD>Ep~Pom(aRsu_kE1@6R!fSUT;3W&})j*dw zAdZH)y;NXC*d;Y!U^+WTfryJ2-bMM?NTlAUkKMn>Pl*V~mH9zZ90)L?V5cJ7$YW<| zNpIq#5uN0d$B+$9xfXMij2P}FArTclF}p+pm|2gspT+|e8ib=I5cRSTvuuC3id%u1 z(**Jq+uP6%-f?RfyK-@W9p$V-40k64a|1iP>XsPQy3~ zVOi-S>>m_n7vM`Z9$#j@D8K?*pF)>&eyUpbIE|WRWD*C)$g+e-#5N8uL$N0I{?Z`> zxs#I_U^B;|avE++Bw>fnB>IX9jh=%lXd}IzPxgJdEsiaD)Je-SVZ0s#5nMht{5(ig z0y8%i4s%Mb%nio;98!|Y7r9?F%0oNI0N}y#Q3zo)#DN8hBMml$w_pl?o>N{7W@ zV*L2uiob%7C=5GcE=^)_$j(}+aMs20<}8r+f+jR}80ZeIzi3x+3IS&g$ubl&(4g@N zA&ubM#)D-D4|oodMc&`+_Er48Zo37c-2_PxcNq%1Xkxt zFvtCWe)z~>6h#+)c=u7zMFklizJ~1<8CXXfC07legXT0sRE8o{W|D!G1BA38KuPDr zm0@v|@gX&=EZWJ%B9P0>d(aSNa5~Nh$Du`v{5&P}DP6*gh`LrfgcEQ}yBsS;SMv)Q zpPk4pV-}ha{#02Q%&Qd_Z0oitN&9trX9gwh#xBwloFo#d;K3vZpSTI6GRKmzKGs}bwyg;)`cJroGj5Kv$7rQupu$*aI3Jw)cj$5#$Qo&eArr)6x|d4AqD z3FMeXVQjG?2S-bj7ZMJ)Ib4Q`Q7+W3P%D$II^e=U8GCgT=ik7IY9&!c$^3FdApFgH zu`bFlSEQ+$dgg>2f;O&t!xv@%v}5voTWCx#7~<#>6jS)zq7|Z3&#b{5oJ?F}4+eQw zs07a!CE9SggbU_eTpbUYvq+$-i#0+}8&f3XAhze(|E6AGktW&&`lhfN5}=86n%}4- z!E-B7wua|U0nw{c&=qI$Mo|WZ@=6FQk%h>>gr75_3J8E>SZ-MI`#!?7g4<_CXtoNq ziP9YeRcn-HgjJ*n5)R1M7|Z~SFB$~Hl*K#g4z3!cg4EK>l>p&O5Nl_+BO(^e0_GB9 zLUQ!^IvbkjsS{}PS@a(GwIe=kUZzO zbh8ojLARJ-$r0&0qMU(GArY>lpiB61o;spPZOEYOsf1l+nN}nB0Y?fafYFFO%Qm5U zHldwBPe}*`b7$ZWc%$q-EReKdVw9D5@GY2;g{P+p2q1D&M+#D8)y1+?z%%uj)VRiG z000*f{V)))n~txE;6qs#K^NtU6bO*G!1>4w?G7S=v*JZHOp&|{?ChfhPdrj$#S(AI z+BLfZ(sDzu6SA<}1b8#T<}hT50!Do(1*omm$WtgoFT(W-N-;@*_zLi32xMKDzm&uB z3~zRs6HikQ1L^}Z%`HB^q?DAwMG8M-dma%kug7pa1dyNF zd43Fo+=|uF+scTCfcFN-^ooE#M?*6>t|-()MQ0@?j)1U*V7U}5hp4^3{TGD?NHo?C zniYvi!cEh`X;wHn-OOx6Sz3fcT&#fvZhx{DA$g?(yj{xm;IHZrH*J{#go`6-|HGG;78|~Zw*cn6u{n78$;~{P$0j{A!I^r->XBwHv8n>L$ zekW4hBo#-Ne1qBT1naSe)>9Phi!?~!+Jy|4Ad8t7$Ue0TiRi}L$wRETOSqTS$1Raq zMu=f8Dl7l;L^&IvrT7>CsE4(Q4OQ?P_yzLy0ro@|pK>??nt zt+2C;{Sw&Svbq1yh~-n&zQ@9q70^rUX@bCb(T zUh>X%4BpJ&`=ocnh8_Lc*GE}TYxwxi#ORaW3s24Np5Bu2+= zNntAv2hLpX3$hmy4If;dEU0NcGjcB~zVWlw04a7R%x);KTzb&d(Q{yY$Bxc_O<}cF zZ;og*hi^`QKn?sfnqL|AeE##3!j7t{!DE+ZXND~Q8MrXIjm=IUz4%MYPx*I8rd;_y zPo}ni%~gr7Ij6Q|pZ_6!B7mLk>Uwh|2|f&aUs<_s zU!|RRwfoZ_ET0S|MIL5%g-%5dwO$=Q)U@M5Ugz1ta;)m@!GM*W`$t}jXzqA5e&(nE zzH$4Jfuqwa%9{V2im*jzcEc}P?=2f;-uwDYbLUUtKYnnIk-S`g>4C$Ok36<%F<_@^ z*!N>?vv|9;D_Z}Q6QD&vIRPX{d+)yc7(K^Ly}wWl+q7|Ng*L_A9O{_^j0ZINU{@fn z%RaFm_PNUJKE;VHccHk8;3zk6aJ?F(t>P(e9mDIAlmmSe+iD*ISL?|406nS#Jk zWkE)8R8aa*O0^{9At{ zoQs>HJd4~_%(?V;|Hy}DxcAoZn6o|B)SsTlYnHyb$1 z0j~syitKA~55<6+59lI7L5fx+eG8k6y$tm6)sP+j+r9*z#%Wcav;fUB6@rjcGQrBT zK9aM>sk#mp>P6VYroL)c!MK3x?jDlH2nY}jadhoIkxY=>)uae;*&3##x>gLqZ#}cb z8k*ObfT3_WT;%(_gk+ZQN+v!$j{5NY%VmOO?OluGWpia<-QaPR=&C*8_k4{eqt$f^K6(2r3Ry7AcDSXdOpG zF``omV#={R5X@C1$wZX#k;mBiIn>xl+nRl7a7}8XN9ie zN|q0E0g%-i_uoMAs@VzG0v|5=0>vrgB5;_3sp@U)SA+wEb~_oHQ$te>$DP#zKL&eV zUO}9qkaHl@n5b*y?eenaTC`1AL|_r!G%hdtzwEtxd=q8*H#~`>PxQy`lbKG-G?X?o znTBbaoPEYxdz73~+6v)`pRbw3HOhSAk=?>RT8Uf|u9%PfEQsxl=+y6fHNKiWkCc{y7|@ zugo;=@F{xRA{9?gESUK z6YS!OaIjut)piwJ)`IpP5m1bRs!wZGv>hqgauf{^GB1gXN-hX_`lOY9vN4L057;D@ zFbNbyYtf|uos8EV9R2GuLRqG9YapIFj7t4D2#F3R$|iw~qM@2)Z!^vaW~;~+vPO*6?&q~&;o-PDN!4#DJ5~=Cj*fM6e5;uBzKU8t^y$j3yWg$ zR6dqZNGidG;aY|{$q-pKM6gp@C6d>vCO;d+gRX;Jgs32*p1}p2(IVD?;inNE)EoGG z!l-ERFtoyjg(a$CS`tyJFvwGX6J^#?kto9up;{!0r*-zpg^?N&1`-%|Zd}t&A$pGX zZE@U^OjRp-v^4aysO%2eLN(U}9Z?{dz`=f#C`Oe3EY*1(4RV<#tcG3BvdOqJm!3eC z-&0;L=5S_ll1~Z!YI~>btx@8LR)HTqLeE_swNgGjm(C>|)v8f$uIZ#=)C2yym~8JC zzJYryh|ms;w*U`2T%Ev#nl?9Ndzc1ts<-@ONjudu}~zAhd2wRmRylu zp*WwTCsIqBs-M_Qm7UwnT5%M=lPF9|Tjo?2`H1Z_f1WNlWV?wBEu^C45;>Qq{BqTi z)f|{N7v&G$1effIu#k$;GmogToto`EGzg=8- zFjM&Kq5dC_dF!Y=;q`+(FLYmcleHy3i(P)ArS;ewt;(pFx@+ger~{*Q;oJWDW#Kn( zjI5hK^U^b(jDq6a^RqrYFgh)`#q#=H2iA}OuI1T*F7tfXy6)Xk-vk}Wx>&O%y0Ex& zpn~o@doIbaZR75WBm3V>|a`k*W^YVy_CNGr`+|#L{BCE?tzh?vAp;DF?BY(;5>8J zw%w!qqw>gsji+y)7yM3Wt9S6NiIe;J?N?qu_his})lL40$3HxEWyi(B6Su#-+?Kgu z)V!~ycW7hr@`cN9|9-RcFgCESwb<0VZ0O*U756W#Zt*<0^}J<8pa1+_YnYkz@VZ%* z>j#rD&ue!NJsOth{JUk{=C$WWYum^P8#8AQ-S>6nH{bf-j(8~QQql6_pU`U-pW#C=15|7e}^ch6c+zo$3i*u}+r zFGS5s%}nj(&zG;h^4FnV<+0w_U-A?Xri;A9nxA>Q@9^c9GFqO#nDXU&Wl7Q45S)Osjh`GoAgbR`p58o*F1f&MUl9yCyT`eC#J5q%FAESy%bo zrLD0o6+^=(R@!=S5FAJkaCbm#?Kjk&fRX?;+Wo8vG@_N;!OP^h27LqSPDerard6K- zL~f*GdO^fatiStN@I{5LU42l#nr!*|+Yj3w4?m2DT$EOQ&{Q#I*o;{#*Qr274&dy7 z{Xv4ys^r`K$pP~Nd{)=Zj|eb7P6X&P0rO+f55i{wBF+B(?(p&Z1D1q$CfFa|h)+ii z0m=?+u5oX$%U-Gv=sE-CtGmdN@&IQ?nLhuMI51m&37i%O2FS)(f81&?CgOs@YynUm zh)Dy{M;Rmfob^)0I|n<8GOdFJ;#C6#Bn?VHOuF})1+uS_zlfhY@NUTE&;F9X3A{*P zSi~ke)x~9&qOyqcUM!I{w6U#3ZS(Aom!8XHcZ;pcDzTaLwkmU#9WG^;64}dx2?8rc zl{`7X?%+IIm6sYa!EBkuva`j|0flzBmhijE_*jLH*xw1sbg}eFreaU_sibOv#8uSN z6?ji78u8{3h1~`V?we>S*;*t@ zf*QjpLv9Z#i&746$C)}X4B~mC)+uI_lTI{_?G!qj*qg_np~;;pyKXk(K414 zij+BAWD%cE#><{g$$e9~2B0;{db%`Mv7-;DY|q`S#;OCIAQKv+AQPlm-Y(OGj%ko7 zfca0HzWF2m155-&!iU14!}3I5O^Q5Coi|yCtr0c|!AVNQb3P$l+L2?B!@5=O)OU)w zsW~V{NlazeGDYP=X=2&tg={6}Y$eCtFIoLkDcR%Ia#nRoLy+Ga%OxM@2=$AmI&o7l zqLOjK`Qfk6sI)=X5QIu@lmT@*MUch|AY5CjLmE2mOm+&l37?~I^g)WalbR#ql{{J| z+*D^r-&b@HJ%;CG=@kZj3CA30R1zu5&r}9|%tYg5PF*D-dTXf+?hx(Ko@Ccxt_n%W z5Q85*+$?8eMTNEA^!Ld$fm@`+Q5_6}?{Fryy}w3COxdXXE%+6~QS3#|+lw_QIjL)u zHdWSH>)4RB9&`Es73yKiScPF?N zn-efU*k%{ZEd=4XFpU=!gmc%7ccZR)Y(3!?wT%0287akO9lcQ2slrMrF$LtRG-(Mi zt0j?-yXhnx!BqJ~~{~RO(1Y z?K*w7h?odlLh|V42!sY{4)6wJQ6vi9TDPF?FGB#kqk^&ks>TwpG~H~3Rd^X7UaCXm zxfOAvGzCD&NLA}W!E8Y#A!+c|v>Nc2iLAaB3~6?jI8ihT8YQEMQIT|2R`s1iy;8G7 z+h|dmr3#IsiDA^J!@R$)o;-t*?ILN!waK}P9(-)KA#U9r_eTrEo~JoiE5fIRZ}m}^^%aL1JQ14kRK28;YVgM`C>aR z>1j;cphmR{N&HC(9|trRyNKFZ1trBQzKW0gG_y2|K|GjWuxcWOgcQ2~V;+I{hV4N{ z)Ys@NFL0{DK?${SB&;uigPg%-BfEqVR|rm2&?nMd10_iaQ~}EKvCB7OCAbE$W3m>} zD+v#QiHXtv+F^CyOcngMW8!3d{cK8o&tu+hG28kzZ zxLa$YR2l3Ii`ELj1iQ{;1GsOLj%7i090}noU>z!+2KNk7#n^FGYv;A?PrVv;iYMe8 z!oC|nVg_Z7BTRxaF=PU5EMoE<>eL?2zjKm<4OSHy-9V)@gfi(^xNSDbLWbpvCVXv@ z;;rLVqlQ;9DO||5av7|{B{)I!x=@)UPg2A~qNc#J#rpOX0wlcm2nnpG8cVA^Jb{bu z0AKd@Gd8RDVn{)Yw1rMdlaDdVcPup|8Uzq~6_>El+G)7*1n6B@nzD^r=IJ}v3&hmBaTB(MMjT0urJ4l= zZ}BMSS%z5k9$`8&RC!-U7q%x#QIjE=_IB`~G}uVzGE(@~&+Sm)CvOa^y8n>>mEDqi1&<>*{}e z_rU(F_nLc|(azYojG-6T_Ib|7Zp|!wvvpug|2oqp>o=2Tx19Yn_{hg4%n-Y?OC8)Y z(zW2x52Tv;fwb19j2RXIFx+1Uzn%-& zmzKFhpvDZFf>Z_Q5&KFoisAMep#m4^Ud4dQ$(*3* z5YKT4-XN)oWU@l33q(AX#tKr#cjhZ6MZU8lpEru8bUXIlAbUvl%MeTk% zYeLJC|HUyxswPNN#dGmZCbiaU(aqryfNz)fGPx=amWKPLidzll4hiRi$2rAbQCqRf zu(Q)m0>G@y#&7^%&|6SrP^!-E!z&11sskm`u`*g=xc$N%a(j~*&7flTmHy31b9Cwf zdX{y(&yYh^2RwTDxW;^JmOzv-N#RsF zGa;&cI=B6_+V2or$eOf-*+J$Z+HbC_*x9B^*tZ16 zgtindRVFN>8%fB>jUok4p?Xv@X5(eTZHy49f`f+O%OZQnIw|RJ6%OCf{-~ zL(Y}lx{bAie|Vq6nuGP)^+G#uSNLASNAk&P35({t{Gw!BizlVIw-yzIzj3eOAd%(&Y^HGw5pOD+raBOo-97;ssl zD3CoT)f^laY~2>h(Mz)m2HIxA6x9dKL%1<^E0dxePq_Z%Gc{D>dYScr_ z^jE7G%BWNFB^Fm}EDelDZ4^Kwk8Dox0PBIqYEl-+cGRQwawvugdQF^!b% z$T%t2t%b4$V!B3By9Gig^J16tj}&GOas(})LS@oXgS+AkRH84w5K#f2MYpF$a(E#X zOF7!)0a7+`B{aZ!A{j#B0sRw$ZQ`SPXpNaHVQTOlwnn{-?`L>6xrSv}CQ88h?+R}} zO>j952z<;4u5b(@8p*S0nQX5y3qBsHIE4YL0|{P50f)X`s-&7#w-|!u0^CO}x2ioH zH*QNge@jX#trN^Qxj7x(OX^vb9=$MAPsx~u1Fxbso~D(k28ssZUu|klwSvL3z=Soh z)JfoUXuJ}ZMY5t&suheH9EYWu1UZQ{fnQ4`6_t5_VC8THDcVRowo$R-92uDRCPfSC z*RbSIl3ux*)&~bq>L5&1HBH+YTANnQszzrcj=MFHtR_lJLDSe3xycf#&22yqIT(}@ z<3KhbgO==C+S**iC07F>@xwx;oPr2EsSq($Dgy{tp~;P-Zj?Nk-H1~($*2rs)g-N_ zWzM3dNpGNQFd}2jVeS65Z^LjI<-svwq$#R^4z&S=pLP?n7L0`nSP~8#zC!3&d{lLz zLB81y&oNrYX^BZijbKLTX$ZHYt{WKVZc1iCRV|N!>;skB06w95n$D+jqsEG|(A{uK zk4D`B8VvPxs*eP%m{I{)V*WbB}(3RIyv^Xs#-(lZ-Xa$L=G>(-VY=*%e$im3oA# z4WgpypjKsoX6d+KoLZ8Nsjyc?BBO`>P`9^cw0o!@(JWy6u?{?w!{|EE6>cw_qxy!LE= zFab~-&z0DNAMdREb!hqQt`9F4iQdsK9$DX58QbRjb;IeN$2~QTnZ9qtJ7(NF!Z0o0 zoejpHtQ99M$}1c?{ds2I#Rn4?_n&=t_S+|(+;*hpweIN4OW4_kvt3KhX7j%eXO2Jn z>e&-*{h_3xpPoEEVf^IrK{INXZjLi;zfigFnJq2d-!HxpvG|#&2@5AAwrn46PWmRN zrSD3ZVPoz+!_#MUeLraZB-45B(Y>^g=9Y%xgQ;EJZ*Lmn4V6tp>>~iWE+PAV=s!23n0vEzFuNu_1Insg z{&-(p=}?+bHhRzTmW?MYJ=WeA219aRmN&`imcG4r?D$jRGb^?Y^xq%)M$<$d#M0>G zzdkf`-pE7dbiCMskNj%cw&T)=Pql1+sOYPMuM0bJ9vLZ|l=;|W$!~0V)ZxQpC!2Op zZVl?+Zcg8_^lejrMaIY9^c`F`{fbbqf}5~tLP=%W@Qa4WzpMQI>^F6jBJbzdH?{10 z?YqJ3+P;SKP324XM9+;Y9*u*CcR2SOUg`xhLr2^d_L_cXa$8(r7wnYBgpPX&Fct3a*xpUd2+shCu{#62|A2KeAD~qf#DoFo zhj(;!nq{r6Np5k}__s^%hId|c%uFHx>e~p8GM+ z($7^u2ulTQ1AxARB=P|5pBV~s{F$Ii2406PyNWRoQVxWJ37k3dTtJiz)Qy`?K_Ho4 zP&iiOu1g}HUE+@m9fA$^ddB6cTnjVOG`Er&XbJ*F!#N3>Be#3IWz+OdAC;EMa+zh9EA1FF9N`3~(Z-A>)N&!H0F_rf&9DtImpMvLKdx zs3Q>M)=Hf4a+85I-krBeU4_SN@YP`vyHEHuDH|W5oa)_8jmcw!{@roIfLlupI zE#&HB1+1RN@@WBn9${v~qd2Vxzkj(wt|h%J(}8UxC%+_wa(qLr(}AWQW3Z$)IlPc? zv~I4&*)(*v4`(N((AKC#JVP-zHZ3az2TpYuN%?I_B4#H_O@}6Y%Wtp5DXULr|idN zU4+Onw^s3$rJZyYD>HT69IHZdPFO9h(AhQMGw`_h?e8n~#7aSH!Ez*;f|--XjeTXB zK_qd(*%(7i5~>|Xtlfe^E=+P@13|&os6zgvSQzEqgZENz5llkv{zVlfnd}Ejv|$dB zG9VL^l!FG{fu82OByUam_;6DPep1QalA?{VS{q9pMafZnCZ3{6DJQHv+d4;a9%n#m zwo-5mJ=zOS9Z*nGHCBQrdPS;%Nv2Rcg_aT^x?m)Iw4GPA&A6;*6F9DrGy8o=J4ie0 ztS$v2i9m~>28K|yl1i&U4L_7Hb!w+k!3h>k$Mc!ZIShf6>c}XV`s+crAfC2s%}FV^ zYS+1^@vttg<7o#PE#_0mQ-aLGsvqxcu8z`*5@2dbl6Un?i{orkR~+H3^?JJ(t3jB^J;#xhA=w zG=Vf~ws$@q_Aomj;O!aKZl6Z<)TVicSU{$!AOU8p5Kpp$)Ad7-jD3R@~u}M6nXfSAw z9ofnnDXoGMF}4-ci5yF^{41gckyY|8)`l~_(i+^O$zaw4z9w5brPo3LlNT3!QeGaz zV4WltT;7wQ-o&WM)v4S*SSc6V_lg%TDTNlIdh%r}6 zrXb*h(WlyNk{u1rWpM*MD=0FDl+r*5U^{2gq@P~U)tJ1{kHwITKT_lQLp_8mQZk!z zSg4>l9Tw_h3Rkw~2ty7ePf65jGk5GVvRsisK0N5$I8e)kvY*BBCOP=GNJ|?fmMS5+ZbzM3+D%|Oh9T==!p#@*?TVp@+rWENw6xkg zV+-?v*$BiZE#_AcN`Hh`4wFjt68E^GcrKrz_$f4MdP2>v=ZqLr&FGuR6d&nOO~(~Y z#o-RJP~+1p2{j{SL_7Dl+<$Z3Ynr!XUY2rS@tuEf*5VM5Q+7JS{j+92na*dLirSt zUa4wW3UP}!xtH*&n{5OgXp1PR2PridVTd^t??nM4MdNc+3=d0U(GXe9EC-vEZ? zNjmnwLNtJ$l4@wZKky&J3iX2MwQd}1;6)^!q9Q3pXRoG<_R|WjW3YT! zkT3$n5<$eMfxCT(qK0CeE*_)spe0;LURx<<)?A<~Z{$0xd`i5eAL# z&Y_@-WA4O&{~}6Ps%RNNOaYXweM@y{4xi>{B7-|AjylASa;5sC3twc+7NJlHGClM{ zlEc$RC&}fj)Q(2^6*Uqj{ngZjq|#F=#wO78CVHnYb)p#2>EabRv@M~Qqm+7SQjjUA z)kzaXGs$+bK0}6OmRe7y{ou0g`sxUYP6{nuC0AFxz#p;7K2`!AjAJ1kbUP(slt`qx zvSWCwqP#9A`;sE85aTnI>JbZ^%Z4Z-_$Vj#WQnICXe(ZpfTz4g9A#<}(;u0gl*t}Z z)+o7Uje;qgub0n|`vgNGJ-51oeX=I;d5{PGc;CD@qHXpufWF?@&qgfWKFgXO5-~7* zc}mylk?tWptjl(y?nuYQy6`UB*?Xg|beu0PkKHoqo%b5PDE_8!*#Eb_E$>V(bj_~I z3;8AJyQ3oq?giQ2oj+}ioT$V_^*2p^wq<7W$a105(qFgX4(b`Ea@pxUmljp`1@S%X zxd#sPJ^5YEcWe8Pr)F0CD10Ye+!~(w;0PYaLjK0BS;Hzc~Y?YUz4bMiT->-(Sb zV){F_7c)a|t(ciI*bua+KfNN8d%KYuNbbnwE~s}#l5uZE=jS% zKT+d~2M#_oYsR5(hq27Q;MUB$UJCxR;SK&u=|D(p-mm?1NU>ue==Bq)hR#OxjUNoV z^j>nw;^AdcA76SeePCwpiPlTgADAB#Azj+=?U{<0P12@;zk(qBD& zZsFg%o*d~sJ#*hfF~dwl%xg2b^KXQlcz1a3OY6!m{te%@2kQ5)A6$68W%=MQ&n~T5 zx_#!dv%eg>QhsS_)WP%jxPUL>>RrCKg**T5ysp^(i*FT|UEF%4a_6~R!_xOAfA;>R z@flA}X(8^~Fy)JfODx0D)^)oFo4`lWU@9*7e#!8Zk5+{C%|AQWx-I7+*STfI+W--; zWZi<{19ulE?9CdgKJwn)!IF+Yf4eU0!i!-`w=UhD$^Detf4aJB^Jv?`yyTIT7;`@p zd0!KVkG+|F;?7Iio;RXELCy0<+~$kxcCP#E!YMJKmc=7`vb%PUW~(icpnF`oY{Yh;I1K&o-i-h);DUI{g2H6^8LpkJ^Z@FL*hWa4xnf6I0HINYRj18c>2Jf{)`ce6ZcsyCh56wdHmx)_=PMg@GI9 z$2O0IR5ve`t`bBt*?tjD=mv)e(57RzID3!W{5@-u|zrrucoSi zB~!bnU0^OhEp67kJ+)?JetL@=(>qA0FvFm60>HBwWhrwhC^nr zS4pNG=R!KI;j+HENKbY@VW2hHiDX9e-1XVYeKZ6i<I##~&8Mb8=OCh~Fs9nt@e$i198UQZ?{?w+J~B@E z!T+Yzp*qevSW^+dNuWb^QZGC@@i1A-)O|*c`ls(F=@*DMto)UjaSbA@xpZdntg|Tf zBn#ZqAT(72z8+R401ML2aV({0_y#3}LwQ71Qi{sTHFp*&tfKehxY;n&A>)iuPE3ur z*-^yN@uZ1+K?O?}i6nHJQKN>0StB5RbgV-|ArkX9hH+~E#}=tUVpuoTDxg53)!!PH zs2~t6Q@aUfH?%{eobhHL z1J5!+t*QuF6Qx~geWa~G6@*FBmLi7SvIWP&7H|#-7uiFB(+ww^Q#UY7rHVF*6FVw* z*uJhJg24^In=}(Zp9}CWNfQYXCQPDYtP}I2+(CrSoXfxjeiNamaZDYhLj^y1h$hrq zf6zpN9#nn|g821Cn?$n=0=J$WQs3|`2;$b@vLF|bgk7W82oMKDoy2!aNEMhW`5K&c?wtEMWOLzn#PMta%r6*NYsKZ7zh&^{Tx!uBO7^A*6RpKil`U|oSgtCT5_JaujDLd-c;ckWHnn)R! zK@u3L2ROcmh1lkvB$ATDCA>6=Gyr_1Gz~;vNwS9Y>O?3A%!5SQ) z$ONWsvOj3@8U`(tfPbawie4MrOY9#*xJ%qb3v?mVF5o)#lPqApLx9e5u%Yv z=S}w}nbxrTi%XL+upy7;q8?!&jAQUk7$eW?P34yG<*9`}19xjIX!ac@Zxub91VA&6 zWgv2lpo??f8m^Lyk{MSPuR8gDQAQ^6o!%b4x1opMC!XXLl_=oB-8$|}!zw+6LZp?O z3+iT-QQqe2h05Ou7zY)2BIplbsWQfqG==$8)m`JoqwsMan=nyyCvp%a9auE+G6MW2 zLGpwsN{LWJz#|A&=9N1?!oWjVMLQEA%quJ)Ni>QXiE0^pB`kqP3-5->-a|;phaHR>q6= zUb<7HtAc5J0!v6@nZ_ebR+|)~$oBGL5g(>A6Zl%2u$$KrCPu`Hn2H7}UsdNhi=6t0 zDYUGBC+xhW6PY*s_ zm`4NVa}r0oHCC(|vunbLf^0ki+$IKe=G^}!Ay!P2s>4KM4Gu08SWtnKCQ1y^0KCgw zUVz!P`9vx%$W7BY`y&|5_{bm)4l6Q74P}>b!H2Oa8f$_;wr4xgcmqiL=a5usvvmWB zg~%PTHA+wl>++qUy!BXA!{#uQP^;MVEV=1WV@a8K>VS*Q=g*i9nv}ZK@Wk*{>PGA( z%AnLJPvx?QsBq;gOuPph@7N@n6M1`cYRWi~x>6zbr{LH`Ty&OjHNt#mwT)j|qi)z7 z&Es*|Z-*QqY)Y7)a&)fBd#*&vZO9XY0e)8zl zu#w7 z&mbq_k!vZJ;-xwcgmaIVZS2@y%SSiO79IYqQooJMiTB5X;EMLQ+Pzp@WtDId1syUD1IvY zd|1?dVzei2{z&eFK>D8Y$qZ)(_cu0A*{W0~_Ag0~d*pSY4xjnZ@QVw7`S!8nam?vQ zF5gSdSK?xRUVT1n!G$04-v6bbC*hq9mxD($siR55mit;9(+^tv7u?m7H}X|MX4@}& zhl|dhs2xc^(DGV;@64{(2Ev=Wd>4zhZj0Q5*SON-Uj5p3nAJ?oeJ^oH zE%S#?glBTEChlqN|8o9EQHBfiFJyk6D6)BbFPNWs`N_(~gLl^EJ$Ejp`lHZF$2Vo? zBR{YF^YGuvXKm|%m@xchCxl4aPyy4@P z6=y$tB=0Z7Makop=r@Z`b@M|h2VOc|{MyLTpRUXwO5s{+M-D!GW#qAxW~Q&NC#qj% zeQ|#o2`=diOB?%&VvOs-c$u8R+FI@4h`Tk1p^IdJ1 z=NHXCRyps;(*tEMMw}Y`OGnGR!LNPK)I|h;MXveb;!BSfThA{Ho3u1;>A(k#>%Lnx zc%|`yUw+Dy1{S8rPU@>3T;IIzr_q8BD*yUw*U^{G9e#g(!h4?#-C-?$?n+O19N%w? zTo-vIGJIy&#nve&%C1CEC*}=NF&7?P_te0Q`zyaYw>GwK<3&UEC-}Sp+d$UDdu}g# zFJVXwdg8o8d}qP>k`ucI%4Qa?e;7bz^rl82D}4X=xC=u`!zYv@PmD0>mG_)I@krh; zmlr(!Ufm_HW1IJ4R^7I`^FJqVOC9{+hvIKXTWfbsEoLvr?w@(#(u)x-e>tDW-naOJ zW0m&|K2x-=>B@uOY-_vp1^3>|7Y~22ZSUE~KYMT1$oz+kSNu@eZ)27w^sN}CHnp6% zH2wCxC$_}o%^QmPC6BnAwKA74AtA5jmNDbUl|JT=`7N|-Gx1xN z$G<|h;*uU3^J?j}o= zPd&hK29u_6zO+jS?oG`tjXiq160!dPSTrg9Y+G{mp5I8Sy$luE{9h(GwcSfSD>ZYV5a^iu({Wt<^w<`l)ynLE)GrMJtva$xEY2V~tO9Kf3 zfw+oxm_u`JjT4pK8rrRK!?YQJDfXGK*Xj2J5s$15B69hun)P*QQ>A=Sb$r^4Z)d^S z79GlAUbneMVabD8GFKFWh5^07+RRGq1mywzg*q!4l|&eBOKV8!0*j1rw)(Oo527+B zn0gqEb6m8_DUP4_B)-Mq3@){^4vy1J;K6r+kE0MJDj7$)QcAZV1&oap6u~7dS!XZW z!#c!2l6Ev)$yR{-ONo}c`$1$cxv>MWlH=U$@QP_G@dD*e6ggDTC<`1)2 zLXn+yGG4B6Yd27EyGSesBf`j20G_4|MVzmNAM{4X08qf0*60fFp{V~|G{=b5gHC712QI%>>0kI6wD>xY?B|#Vt;88@g97iJ)Q>5{V zkw?!Q!8;dd5O*QZa)C*G;4l~|HMqKfLlu=ZDK1q0}ba z-Y8T0Y$jF#+e`=}bVigr$rcDuN}U-BV?4-72#1_xIn;?(sU0g6{*W?tCeqG81JEkC z=D-cuA)7P^?>;Kvr~skZQ5JD`DscCl9Yn%_UgJhpH(U)IK(POAv0m{}9LotvJf}cd zBAuX`PbyPJ0gO zg`vk%aqV0@T+PTP(U6QzgPOWp5&^CUIgj-wsLafV{unq3uEc^kKGYvX_Y{$QaKs@< zCbXCks8KPHT1H^V*wK1;uAqpl_nYR93qm2UcpQ3d0q52t!BER~S%h51F6D!ZGzad+ z4K)|YMhV^ z3ba66)VZ1(80c;obAjQ7oK%KHaXozX^pvN9b@1#!;_;I#B*2w!UV}gw=CE3bW2%}o z5MlzFCeRPYEA8+=aVK3%h?>zrIuQEysM0lp6d#SR3n z`P%~$f}CugaSV!yAXaz)2a3a{zy-qycqYL$H{o!LkbyEbGRB_0C)w)>Imi@55g`w@ zKm8qIBiuc51|KViy979OP!6bnI1IN8RSaHmsH#~!)C&?(dz6Gqg+}>D^1#z8#dGy& z+yWGyV{lK`E?)yW7*Mn2^Iyy996NO4=zj%T4zSmOnt^)=6setC$#n*b zRKOYnh@xv>Ko`3jHbhoUfr8otsmBgN0~*y){KWPHoCNI#m&#`Y^+d+PvoQ?TBB8oA z;epmO!%sxu$XKEq2LK%c^^*7FAFj7wpaTHVG|*W8;|ruiuOA<4^{XA=`k{Y%kIlKU zJC@(otZy9q%?G#bM$&)Zp>ACNKSd3+(tm38KYjH#L+Q64|1+%q^RT+!AO7=P4a`yg z^K12gn5q5ehxPhk`OkFaKa;@!yP4JXp7Y<{AMo5bG&WE9-N{P(3y%MFJ?YpW{oRp@ zY)ie7(imu{vCZ{!|LOhd>1(d}pr^Z)aL)?g`x3;pO1OB(h3nPfZomTdL>k7drt3$4`+nxV8;P&wdF=wfO?3Tp`+Kkc@9Uqh z=6US`*AM>F`<1tEB>w+sp#xpK9{b&nzHIWB*KgQO1#0-}_WH4ZdOtJuMq0!GMlZDB z*!G_iUE67&`sxjP7XaRH^y>D1N{bZ#Bkk3q{=Z#da;(5(+yAk^eV_f~hkUFP8-Kqm z|2*Zs>v_1Pu^JxRUO)Cv?`Q76kru(n#>my}KP9@h(|-S_Hwr=i-xPSP&G6st5s&`q zvFn!ucocjDCd%~#|MGt3^BYN#u?&sB-yc5z^u_~qEW@jL|4W8fch`M=Bk8~GlRGEC zV$0RnzwJ8D&%U1YT4((IF4_JTcO&i9PX7B9_Hpiwr2pp5+9x}-*VA6Ds^8Cb=0B2N zT`KzhMTosq8n5Sib(!$@r{HJ){Ewvn=ii|ABPLkUy7n6DEWg`h;$m*3y!I^p{k5&y ztm}FH+YWvv9WZ;>UiD+Y0av%zkNx(&J@VDtZtP$EarwPYi$pB>M{xs*e!pVdCvU#d zUjKe2PT#@tL4KY=R4TpP+(tLjf(7?4w8#R(0QyXuA#aUpQ1xw$j@IXZr#8(m@bv-+ zN}+0nsV8IudjW&uP zc%~wW$9ZNeAhBwi;u#06O<}+jhSsNnjECxm$WeMiK;0;x%%D79K{N|+t2 zClOSnHu4n9PL~Cvc8QHkzDvjp@pD8f!}M62$jCyLs(4YA)7T`&%-{k+ps6VGA^PDs zq)IXBIK4{{lWPT@Z&xdoL{)*fJe@;9e^|+B^_bSm-o~vA2&?4?SgMvIMBv2qu$a~e zDudw4v!gJ=c(v25t6+7YISt<2rhsoihIR0WZ*L(ItO|ox$!=}rEl8SdqujubQFbaK zV@-l+MTmoCX)P!40%v4UfJ(~X#aZT+bXQf^&jl1o614laXJaG%_wCNYL7~ z(JC^D6`(StY(aoauavb$00pG!SUvbM#57c_S43V7c$mRw2lozZ*dj<&pIn>Z0Ptu6 zbPqvLD`YLm3$x>S5!`A@b8?kzWm%n`U}#)m&@|M|z*9{|%E4P@S3uBQQBX;(7d)!& zy*0Xx9GQ<9C0-#2T#Fn2IDrQhI0WQ6IF0_e)Gc6?8B>l=l^dg+noyd^l03V!ZYeJ< zQn3jxyT(jQHA*t4p-Z)dxv@qs3N>>YZW|Lbx6b#aSesx65(^A!8QG#T&JPT>x=C zPa`L#gXTer(#o9zZlwjIvZa-rdK_m?VM-_G`H*9YcARyPz!9}*Xd`aYrjfX+v;tUk zf-yu;2$|@nfw`yMfm(Ddj61m=DjC%`$@SKH6_jeA*`Q0b3kWoT9Xc%{s62Q^ByZA} zk+s~N+Asln{A|CRDKs}&J00|Vb~cs4-HT$2}~A{K!Xw~ z=XYG9X{%3JN$>Ne?cw=qK`(qO`f50cc?Kcs8o{}1ZelqfxE}QiYGfG}Rh@o81)7?o z<3%9hBC?U`Rdnj3i5rPo(6^by6d%Y%HrhFct`Icz@hBc|O5>2iX*$k0E?#k><+^fa=!xU;E|BaeQe_6TJ0>g9Opd)!AcS~VSWzM6 zu7yFb1u^(WrxFmpQ2BNR+`8j9kOJa(MBwwG*9M*k8#)g$fBG_Tr)XL&4Z)!yyl%xB znZO#$O@1oA%&c9&hWhb(KY05Z1sL;4ynv*Fi?|(}-;PA^yurvq0TF;mspQ2k9|YH~ zR;;3|Ad2s{DJcMirpf#q#Celoi_#edoT*h<#Axmm5Y>sM0kjzkBtk>WP$0QoP?4%M zRaEtzGvEK3xA9mghI42mQ%U`ooaB*<048d@ZO2VpHC2+SIz%=C_U06sNT~FzU^k<3 zg`~sT2=SklG($CD*lXEb72+1Vx5#EXL9Fo0NXV)GhpV>_i=yn`|997|@7mq{`!LrI z%j^m)GdnD^uz5oTqNGQ;dL;PSADhTfKfR8$l~R#ujP zsAzf{NJe#=g4T^`*)E`nsK1Nu&+q&Fe19GX^9Rgu9J0GJ*Ll6q^L+jA2=_K3C_g9p zd?6(YQ8*NduKb{fnANm{$m1bP%j!uxft%b@567b_24mojO~#cq(XtYS%vx8h4C=}_|6h~y z;-D!=3A~fQ=`$Jx@47Oak}XC{Sfz)R!|&OkgCG9V>7YbeEdT52DM1^|#$yqh%@$Y? zBy@>kx?}~ts}na9YpG}jO53|5Lp3n#AkqhX#5Z+Rc}gdWRkP3wF+x!$N9rJZ3Mr8@ zB+OH!C^9?C6?BP}Wa&80Q@}^jELV0FH@Ym(O>qdw6nwg)-4nvol1Xk5I0Z~Sk`1_+ zBFF7y852rupiL6|AHk$+I%8JAu2Lnrn$-Y`QA$?6nq(s|v>O~#RXdCQf$MPA42{O{ zp(8^GEET#*Ff=JgknN{E%2bLkpf$=w7E#g>y*dS+l*MDv;h(4^gH(i!CZ=-{NWK_B zUJ>UlG%LfXER7=E7UUvJ>D9EP6YHeM<%{uB#?0L?)l$1Wv{hQMFvpg*fe%u$)2V)V z1Ha?eF=U4hqE6(@EagFxS4GigTm;gL#&S2Cr#Q z^E3WlkmUfD6e2tl<-$X$py7{%RB7!?@Q8#5aPjfY6DR%FZYX+g zblkKZXE^mBvXq-)rMaMiPOG`vs2;Hsh+((71}6S)Xj zv8t456vdE5Dl6U$RPEG$kaifzF}$4jAJdVEayC`&xWaV6j1*q)L%XBv@Cq@DrOBXl zHj=?pTtYj#3Q`i#{)J3Q4-BW{mnp%<72~Ri{9{;910rH&_4Iy9O@WC4??2q!LY znN73@???W`kVv_P>&8mqB?8u&s8lPYP)u&+c@qWwR!Ize$~2*n*=W`dWL!Zd`lqNC z(8n2hhK2GQc$x;m^4UD-E@9AcBvDyRKwKqlBUYPPT@H~JKw;lo5Hl#qqj4=zZfUdN zJc1phebFh8lklEpX1ZZQK5=a?ZrFig#ofX02~J#=*oQORh9nen8(w%*Z3>g*#kJHT zsw0yK0s$6V1s6iHRpw%dB`l^i&nkn;@g;nXxd$eGy>iEIA}&v)aqTgR2kUI zQqdjEblbWd;WF%Iihlii(l?lHi(MJTRHugW0~FarrVQdthh3dd1m|?&xq{@P`;WEF z`b78Whhnk?=nGoi1Fo7-T?3XyFVIYb)`#Fbc<3`e?|WI>h3SCf%4y;U%8wH3T{x|4 z)m)*aJde0|uX#;JJdw?re!+PkqY0c%`__AlHDtU{wCF6hI4=Vq)}M;Ss!ohH%{t0z z1OA-*FPn}!?&vl9KKeTQ@ugqxzIlEadFf|E?hALKwHZEt$C~up_s%~3WbXOV=5=$u zYe$~X$r$eiM?)r_Q183&MfT=o|4;nUlL6LV*|wmw^zBu3271Xqs6_kBDP^s!Of?%-&_4zFXtW`)n?6~ zk=r`zdNsp$yU=~~r!7DImNHm!$C`EYE5FaQFZjOx~MnP-m-nUH*QB> z{K=PqZ|k{>AKAC`?izQ(CI2N&20d)^7OwE`$<<#BEN{Iz@4?JuZ{M_A6~nLeKK<6u zb6(G>!r$BdbKU)kQ@6?5_|7{z5c7{hdSLy%AElp9U(Y%hGp->Q7i?$FML)Oe>PN!? zd*QhUd!WJSCFgkHXNWUDhmaXh`8TG=55AcFBULmlr!C~yj|%TLzvzkD@KHm2SOU?q zVC22=jQVjM`HiD$*DZE^RqTUTg%-~Q@p5kS7Gn(1xVg8*Gd4(Nd|2CE>Rl{-bf${=c<;++CkW9~>&f6I z>bgpA6pBZ}`_e`Vnlr>tnt$Fj@}u{UBZb~R>b3qMap=`~i^2wPE_r^@^|!xk9a)ie zwDETA!m7gIi+5oS)uKCXM5Q5K`0Dz^-Dw%$KUnU%#J;fp-rG+fjUBH0wPne@bLBrT zsx1Gqr{%`|PgeZ#auxN(ESS7#nDtiMwjFoA?)z-~^?Tpsf0KXm!bh(?c=}fVuOA$1 z5wA55R2-2eID5vq->MkH&guAf1*7B5@xOjH?^E-wH1i*eulv7Q^!rGu z=kald`{0MFcZM(QD}4QL|0C7>ZzTMGmbS7X&0(nikJ(GsK^}x>#a8QNu=xTyp`$}z z5ASeQApa?3P4RckfnPcXo(k6ep9pj>I!_lqiHXTCF8wDjC$ zTDrL;Dk*xxPOd+qlfDi=z3;hxX42cwz<~3+%u!@l+)dHe6+(w&5Wx%d+kb2@G^6VoQkTXnF!HGH6jx^?Eos!4A@JRD!3Z=UR7{R767 zFTj}ch5y8qi8C$g|CF~w6BBz_NTk~{LUn!MI(0vs$vBZR$oJZ=!mk&y3-TO8n_(sE&M0Wr{{b8_Y1`IM zt9j2f2{Z5E@~8@PWm34g(y)+!=S6gA&XYnM|CFfrz%$otKQ-xg9fp4g*zmd?&!9$f zD9@l9TKZupYrfma4&}Mv?}WT*4d>p)RuR6g1H+>800at_(vR1X3*GRnSLfZ=7Sydq zcry<*1zIgM0kvv67C~6Mn57*xbO_mA!~LT~ih>lY!zkhPvyEB^BtvAg>^1v4prfve zQfeG|Df?lC6S&GCio_w3t^Rc!Y+_edt!IcK%$&gFN>={|MX0;Tg^g(zuvju{& zfDBglOx-WIB?SdhVo|l88qwX4%995vdD>JxNvn|d?pV@9DdBpLC(C;BEa&n32Bstr5}V;x zVP{R5xRt~004Ig6~WR^LIsnsvpDU;iGrNKM6Q_iD#aLvBV|&>%Sn#_ z2QLqmYf!kxTu4XMcciG2m11Z&%A;N{PrF37a=H}Jja1ha!#J@N!kgAhKuytgW$gq4 zjgwe0M`NleJ z&*2`U6Xjk?QI330%VG4ox(=HT(2`c41yl7&6pA&Sn!H z&tC;KY#h0gD}SV^gE8BVAHq*&4{g6#mAQ*&CYZT-$7$+C3=B@aDU1pRz82czwm9cUX z=Cgwg+&XO^jIU0^rFPcM)N+`?U!Qs~&7x&WJUQ!kp z83quoJVm8#O|5Z&7>v$D)mBEh+}Mp630f%Qsd_9PaVSWrSb);Fj@$0k$+2hc(DI&x z71N5xg$|r-7c^aHH12~#%Hfr^OVkN)&6U zaC{LLtVm=AM3;!I24S${w5#~jXk6Z&$H(9JFE3CYN|Yly7q&Vz3PL07ya@~T8BeKn zQcW#t=9+xbFc)pKS)swcnu4Jl1*X|dtMsWfO(~6)@Mob74Bw$ci5Y0bRgsqh#N6RG zmxTB@Ul<;S=!PBKv8()-Y&}n=4Al>(l~sm0nRij+TJK{?YO}qjqGOt_Yyb;{;Iy{Q zjc|F$;usk9Ay@YX7g?K=F;mX+oFB^mK%O8Iw2yh>8(Vcn;5jBoMCQhRi#R)iulza~ znNR3iF)8?l34LMSl$Fux+H_(&>Smls9C#xMIq*KxX6QiTJH8hJynSg;vk3ZN@6Vhi zMaUJp12hltL$xniZBD}pDLMy)^D)G=2KX-GtzB;!F10d6S;W*3Q8OeK;ZN4YGg1zt zare=CV_#!vE_%zMJj*%Be~2*LzalQ5m}Cs6`w>x^XP+~ot6z;|P2=_l zQ%Ph2wx=HV4(!-)!srt8NR!pn$8|ENqPncH*Pe120qi=`-ghp;CL{evUR)vw@p7E2{Y(tJU?{5XSZ%g{-xc& zG~KaWEX~U`44CfF`}AG@U?jtI`+euWzLy_sjXd(f=&AU^svnHQvm8|wgWmU=Hm*1) z&fYm+tv_@-a%HLSs}=glks=t*z5POH!Z#C7==Qv98)-Y<^3}l3@s%&#oc+rD*HZ4J ztiN>l!DHF+_B&Z~GJd?LMG{Qc8-Mxf%ay|q(8rb~L=Mr{xBIQg(NAvhU-XZ!A{H(Q z{z2C}|G}-L38Vh3FZETUyFnPDcMtvZ_THl0)RE2lFWoUEg{S;r>Cv4-JMX=jb#w0c zW0Cq@wXV!1z}d?9q-!pFX$E&OWuhQ1!+m5yU-}5=&1n28^nP=8>6w2X$q?zoi`WV8me1W9$#^&?lo@w*4~WtzeO$iKX3|P!KqQ{uefp2*k6rHlSI22 z|0!^S<*nTtz4GqNl5q6pNHsb^Lpc=AHVk}PT{>m?t>tTNRI{vR&&9Pna=SQO1c;Dm!N}O%Tg}8BujA)n) z6bE3RQsej;YwoXOLl87k^^D);ZCSW=cp|Us=n_~a+cMcG+oIj|$4%|6%Dl-ErvINX z`r|sxA^!%iil5}=#dktsG^vR?s^GzY>b~Cp4RvV}mnSZPndcAv$0s$;@rl9kkgh+% z^<86|y$Q#MPE6?fpvcidWZqvQhtBvltsyeGAu`>Nv^LLa)NF7b7;%Nh()$=6qi1$F zygN?Jg_`9Pq?f$vc9N^8^hw#W&K>75Ty?(0jJfv0kh1`x6MGzG|L{!KFttMJ9aAOd z+5ekQk?I&q<%aUs{}pk5Q{>(hQ$|cRDf6afP%~o|aqoJPwr)NwZq6QJwmQ4*AG_H) zhueijz->m~B0QqA9Ee$&biryK(O~kAeRL>B$ioC{MA>gJUYY1ZLAesqQm3##1x~_f z9qg~EbR`esd7KUw(y9mDeS(Fo3F-tw%ZKuq?w~Wv)$$;!i>gK=tdfaNVIPWCRv-}; z9nT=U5QRiWPff)Ol4PslIy{7`umQcM&Oo#r*1#>yY$^99(TWXGb? zBJnGTy;IX<3#GQAh8(gTd_ye;yBm)Cs`2WN{{-E|Q%h93k)QI=M5Cb0!Q>gC4yo!U<0vn(uYVX~N6e9UHRBXA2YHin5*h4elPIT=1Incp(aN0hV? zeu-H`y#?4x5GDx!5EpJ&J25_tJ5W|s`3bQVl#m^VJw+hjPJ4t7kRkpWy_7F3vCS4k z811wx{1?skMo^+ClN&`!Veqj8C)+RK1TKNefea02 zW8K9MNw7^fh=d#hK~_z{AmT%bRxYe}hgX5{F1V;5nIu6GgyK#?mN-?mRxT^14s(nL zhSgNVTYac3;AD}Uz6AwS5WB3M%EbqWRqT1n3 zvD&xC`hH43KQ#sy+2VR2(_(VGB#&`-NN~j`psLU&+Q@aI3&<1&p3-Y_(Pl=OXhTcs zOtBp!zr8UJ;E6!B+L{6h5Re;XBsQbncm$&=E)wh(IQgDU!zisp_=xGeh@Vje<#43L zd{CQ67;Q+Vr~^vTFeQl=6^R9OvC^&Z+OVp@zfA)?7OBGF2m_Id|0cC#NRUzorq+09 zN<~Omgd!7#1xE@fcM_o@tcR=6Y7!768;b-H3OH&>tv?zJm>aY}80iQ{^05HF7q zsA*df$;k^Mpwv@~sonT$Vm}oD+tH}HVnDa?ZLFyF@j4L)^^xT`1&AV-!kP}p+8dMw z5KD}cO_4&&$fGhN?VKD7@z(u7CPfrcbiD|xm?r0ricm};ATlr=FD{qM)P{M2npZHH zRGQo{C8CIjvF&JDK`{X5s7-TYFC(3}CW%&|fAWX~iU|RscAJ8iV-7n8P@-5)K}K~G zE=3@SiD2+fVLv`=0FWvz27%n$F>{`4KZD3J0Ue~oV;G}AHqp_leP{lkBmyPbHpb;j zMDy}C0?h>tdq_}ibh3+>Gzj&wql=~FKx!S?BBuO`DjX^Uw=0h~k*%Jr{v>Dj6KDz7 z)t%H+=fcaLqP_X37_k-9+T2|`4!9id!}(4rudJ1%?b#KW!`T#hwdOIKRvE(R5f+Ms z4uM*y07h$;#>J9)+DV0=Z14d8B*wmh6xW($L!@+>f?&pv3~b_>6aJ-t?)Oq3KkQxZIQ_H6#3t@4%Ttf>AXse)5w%!0g2q^yqlB_6G zB(4#{F?hELwh?%87s?z7je8xs*$G%;1cJ20@{kOl-B zjvC|fUR zcd$j=JnQF6pZ~9P;t5-b%~6E)@~w6!-qPQ;qMfFH-T1BB;g%t}TFT)eKq7eZ*A=OcQN z2B3aA$vsoIp4Wokbr!vV755>o(w@Q-A-ps=RwA561v~+P_D}FCee00h z?$myq@yh75_w>8hk{S4eD&zzI*IO1`IGT3YI#_m#em^1flYftXFr&h|WH^#Pstf4$ ze!Wt^d4de78XNa54}DN;xmebGt94sdUSOFOkG~pl9x0@DlP#w6-CxY=4IaDediU5< z{Kk^PB>#^E@%3+C-DtYG)6zEIs-Jl~a?6{`zgm%dXmtJjb32AZ!jAs<;Fahv#t+%z zvtFA!e#e)qzP0PXxvT(ZN&vUSj~~$f>##KR-rG0c%u1MjvDM!?aSq&$Uz_m6{pY~f zwO@Q}op@!gzVeQpe_*|9iwrYW;FspyeQajJwY&7(+<)F)*{ctGDQnC>aVhxLFJ%0M z&tC};pzz9-=Wfq^MgPH(pKonyE2KNADiEmf=e{sZyd3||?OzvE;lGo9Cg+d0&Jm-p zILY*dv26Scy<``tk0*NkL$B^C-F7AbJe$TeJ%!yP&I|fYfu+Z;(;4gtO=g7L^D-F) zBOg2+KQdmMT1Ae1!^JmV-#RfA_0r4#?$7IPFpZTIwM0&=e_Z~?5V>enAdctP5m=3M^XKZ&z!)z#s) zXBK+h&hqfXl@HdO9(*l3A!;~_+1FSE#?-_~e^tT6t8)suJ5cd#3^W=ZoW4JYOnCj; zLI$!Ur7+gB7`x*vY~S!);FlGGb&(^Vlag!f?R z4g2l0a1b-8c@|Nyk7@j`Im}*ul8wQ1L!t1$Yin)Z{~qoPG=r^@7}5AwckK}!oS1DYItFJuU~;yj zrY8@sYmlPxdqeKm-8;qBjRIcTO1S9)% zb6vZiK>wbXJNrBHI3#H_z$p#=LB@xEx)M%yy5MA|Z*sD8Hb8h=CaD`owXhNts-@B{^Wv;_x#Ce@z>#K=eNnx&atucp>f_88lL_^3ha#4Z9etIfGAFC54+G?=~8`BH{3- z>pZBXOlX~BJ6Lar8pbj^c{9eX5z^u4CoWmTvE7fulRD_Cd_`$KT~Z@{JS>6|u*F`- zMwO&I?lEow-9IL6r|jsraOWLL1D%3Maltj0aXvr@o>6ZJm4i%>Q;mlbJi#jtz9Scc zTms@<1Kp3Z9WG}$#60N~$xIQcK(q{24+t^(QMlDuw$(EH{zmx}G#n#9r04`JEW|X*3GX9t zrxb|9uKD*a6Bhb1iULtWS`VW}jDvUqgJzIhv7G|1*C>rSV7rhGpeZ3D-{k0D`8RAa!k@por|^!kK4tK(<&T zTLff@h@>P+Nn;lmmCA^)tSRi}=YAq~u-Z=Wry9fJSg>r9x=oO?t3<8R)S9fQwoMnq zIc*1md;9o0#v35H8D*QT*|2voYlXp&)l<8LUhEoy_6TimmpJpcMnA7{^rokLiYR7v zxfz=##lnQH6G}k~(X}qzXolOQ!sCjM&L(0?t{s=bVMPRGsYiKepiOqQax} zkkAMRcdr!?)&eDoD2s5x{oiLLuTqx6HA%coYDbr(DrAe0Ok{OIqBTW^?^P7%2((!a zpi`(elaxI66lhRWN)ZYf9VEg29WoKkVNpzsV6z39lr+!}t4x!h)wf&Ls&=YmJt4ws zgkFfV24EvHIixxtukfU-5W}T#0qxpgx0!jQMzBTkwnX~T%SZtoC6ct627;foP}LZY z&&tO(K#K^eh!$)l-Y#j-P7v9&d&WYakp++~F!jBhqSZKEN}CmC2qSnF69kU5ND;ud zH%PFfIKM_7q)LLFVM%?_@-kErJ==^2k$jt{m*II%hrg2O+@X85#M+czj5W4)KAE}PW3J&36RR^E= zC=l{#q_duY#LX?>PcTRn@&HQtX!kK2Cd%TnGEn}(-iGQ64!?EupWGvbkl0SYrDtBj{nN4+nO zCqrT7Tv`rF!)NRiikT50khFDbF1oK{0|@2o@b2IM!tmy`>KGC+D9}s>b)`B*xD}Q| zrTmKbvJD6mR6r;E_Fu_zQkLjGgwv$x!#OqILy=j@X{4fIAs`k)iL2&*kvc8kiaBPw zt^zT2ENwsjEmDiVYbO?Cy9i|n8KF3h7jO|x8)K+VcJL;;%>JvRFYv<18 zJcmqIKvBq8&kVgaK!-e&90K&>Am|C)jhy{@O(@dERN0QR6+*_W&A?@NO2`m|Upt3i za6Lh+_itIRXY)1XgFHgKw`8(+580wf7_I9kLnC3;{|>>v9ZBiBc1hZDNUu4M~t``c?VRcFuIPE zc(B=WihGA7e&g~m%XaC2t$+<-j3a2WKCM6PtY=}T$eo^(pB|SK)``CXN1^bkzZoBR zo1klq@9-`X^AzFvoyHrT)RoRJ@$b{@NT`oL7`B=Jj=qJV8N?DsSUlq(7$`9gbirO} zS}OjRek3+O-ty8SUy0!kU}JJ}^J=%}N3!mJx%>>WSeTjL5SF$$C9RWaVT!n3!pEfe zuA+NT?kG~$LKiO7)XU(p!zQ}dA`o36tXa0x!cZLUE{$|6?wRer0`L8_oRzmze z*Rg%i+)nu&w&1dBk5Xd^^AmR1Fv9L{t zoh(HE<|wYMT6TA>d)e&=8IY`1cx>GB;)A1steBRfy9=%qhK%H|zm$FJ_s_yVUhrVs z*TeMui@gcvJLgX){C;nnHQ}-0;kO<<6%ag6F&Vo1>oW?EzMgyQ!R>7!fwk-J=AF|$ zc)lq2g9nb63qQQO*co$iRnGmrRSR!@wUS)9^v$Oe`p$obZpFrElfEx->}28RfWN}jQ3u2_fs!P*XqYRcDF=dFmL_l zXR;tQWvg&u-o$BLdgTM!`Q$}&#`kx;CKp4&7AAG6ax4XAzSnvA&@r&zo-+J!L;j*je zX52CFP56AIv-_xaY;2dv{gxC1y+dJ@L#% z_V}&)CvN^4sFmWqv$3kK;lAdUeUJRd`<9E?bfL5UGr~D14o*TiqSJ~0QEOWoE*g$? zd`SMq7(C!dU1tH*JfdH;ri0vOcsgX3|2O`lpMf?xzAC9#Gfx+KB>XC(8L~fj3XYFR zee)z|us$>cy5# zc~pf3x~A#9ffKqA?;rXQ5zcDF$ytqia#r)#Z0E1Tz^VHSI<^;_vwtGNi?&lxQ*}%Z zcshol(iwtEM=CrvwnTzT2f0s)M`0DN*b=;}`9apsrgJatq@X%#np9M#jQ1u_FQTta zUNR|;usH7rE325px=Dfb(y8&U>D+UQ7qBfZ=sXkSNKLoce#kLKH;2~Nab;zPsIqx; zDxD<_T&Y`lp_y9fekWfn-yoV_X2Q3<^rgU-d@Ym z-7eVZm`-meY2Wk$>EnM>7SpqoN-RhoV%YA_*Yxn>6bvtu%QTTg1fs0fb<#=lJP2D} z!i7t?Q(~HGW7em@&ENH>LAeb}r$R{0S^>R`XZzyWqye)WH@_&#qbDodSZ$*&WlAV| z2H#KWJM6?FF`^bk+#h>ye={({)uQTK+F~<615gc;)`(J>7%b6s7vLDv{bxO(D$sIr zFhx2qH1Z*=(J6&G(M(|)y^2^)btJV5>P|Ld3czyB(R3qlU|A@EWz>+}M2gBRe_@!9 zuR+f!)wCkjX7rTH!v(XPO06SuQI1mvck_|;yi2=PV(Ms<7A^r)(*CP8X>xrw3mp!Q z6FdOI^nw)beF}2YSZs(kTBTZ)&S$7}fyV@qd5hgPe_@^gAPR$rXz?yAjKIu5_?wAG zI93HWTR_E;6N{}B^CW;T93ShDX7|hx;^#tGdZ&_2gpoi@si9OPE~}KL zOB_oZM63a(wk1Yyo!yGas+s)=ubxUyBiAa(V2+VTrm##G;LUQH$I1v*jXFF3+1hNr zor;FRmUb$U&moKD25{JeSYSx|AlffHTrA0>#Oc|W^TqL>KiUu07Fn|}61AlfJCRvR z%qyRbV+vXl!+%S$YmBGRgJ6|iliDVNM`Q={$5O?#ESiN`BsHFOEOQ9di!X=-?FNHM z{kTt8#hx!wW>d3Uqg$yyu7eXHO+38$iWe~1It~PF@in1DENYf#mIyd6qs_q+0?K2) zDE?bm-b{Z>sv^Z+H#d^Xv&I5}MKr3Y0z@RsmUyVHa(OlRp@8V}=|t5*&`%kAxMWqa zuOVR-x5JJ=t0I#HFhYwM1zI&vP6jIxPXXcSvbMvm{u)D#1lRXT^7gcH$X`@Wo~MGF z^?)%DKEMJ3Yg~kz`%;*CQVavnU^3>wLzh|ODwTXwL>VzDhS4K zszyt~%xrV?^b4}-LKUij;#AR;Tn8Efl^zgenKN>*h^%aH55%D22a<^0L{_M#0Ir53 z*Hp+`eD}%4X zsAD|Wz@(HTpa4$`0P0y_qur0bO`$3tGU&qCbQn0$)xps%-6cdQ%{V`^j&V?ELrJ@p z_7Jo}M7sn$Vt|?l-B?RuYF5{6ld1&=W8tO~5IZ7NQJfV^OSp}ulV#7N65EQAFQ5UI zx}2xbF(dGHQ)EkK=}mx0cK2crndI*x;he|NRwr)=DlnId#A0(WLxGws#2!R+Nl0lE ze;QX19B3?&u5MtJ9qFvePof)9jw#OCQ;j*Gh||$EXz)BVB8Le_o~^|3{%fFjd3WQR zk}WkSCqnrK5Y<-a;(EMJGOA1kWm@J*K@3M0J8B)u?TChVLclvd2ZjnG>v&xqu@Jz> z8wAe6J8MHC9B!YVaTYbv-AJS=QssV6?frYw0D;)?Dv<+!Kd7JVWqV z`H+Nd<&xT<@bGS>t|D!OYI_Htx*6t%k#qtqGQ7ovgLf#Fr4CUS#D;gU5@m&0=WP{Q ziNN_H$oOW}3a$+Fa6kZqv=xW0$#lvPAZdc0(`WM|-q0)@b@xg_M}4Ac%6^@Z~80*jc__&XtK~|9;y%Rkx@?Fy6@?oa{sXxWEg^7^E zD%Kzz7Zh+ikE-J3ER_hW#VMHxik0wQ(P_DFuq5s7y`<+yw&TOnxL{ zK!j;hzL*)I;&uc#SkO}z;EYkfj--A{T_J?BLBpUcfH$mygnH^RGPI39fLDgT=*yLy z`mmfuh&O<1k5Z#{tvXL_99%DVZ!j+2acOBSUe<}|8B6Gy&yY4}SX=Vg^5xUeS$E9T zr@!HCBx9AzN2twdSCLx0%HuhU-4Qo;N zA*gEc44*N}n?Vnj_{g)HI?~PQuZIY6bN<9YV{%S?gj0xdNAThY!P_lV)rMZKhAIiX zM=V5u#i?fb5e-6O`-uV}+QnbYSzWY{b|lGd0nczOJ=B-WD^;c-zj zGD5G?^>k=0)x~+TK z$UsvxwVkTqGC8~q+tcxn(ilOkz+$yc@qFjzw-`I7uE$rcDIp5VV9ozx7#GN?yjk+Y z2_Kr)ifMO&_x;}^W;a(Lg&OF2Kkb_-)aDA=bxyK!HLf4l3bZhZM@2I0@27xTIP)1NJy zxx@bqT;cS+L&y8NCPu;wy@THISDjBKwVZ0J8|y!P@|(gJBKyvtf7@@Ke`%+G#qy({ zTYv`%*P9!-cJ$JY+jqZ$XusXB zJ@DO`hH1tr?Y=igzceN67=7t|-B_zFe$8#_{i=8F^&f8e?)J9zP#6fk_Pe`dxAop$ zb~m@`_6027?O!77d+YXjQ^L=Ir*bd-`!`q2U2D<4&+b`%tg0Hmf4k+o0JRCu6U?`6 zrr%!hYT<#KXNSExF}3m3y|IZF*L=+?E0j?PW)pM)(*!^?s&%p$bu85{~U_0-Ph1CK?H>tOb|^T z;APE$S`gA)wGm3A4Nw-fB#kXO91rn=aBTM92miHk%?~Y;Q277rvPKYc1Crsp{vyNA zfn@keTKg~XDrYxDwu4X6+CWnKwbGqTo$&F&3E*jbRvWI*j$t z^uHa3!piwbId5UZAdTUmL!N1io`S9>bc_?#(y$?OYtTcLZilg>(||Pb>8FbjCyCgwVxGYU^C)UF;S*6j z9p@e7R-_jV0I@Szp{5?K-ob3zkV=+!Fu~C5w-|4)EANd=s^LrEpZ6f;69h83O9&Nn z(3p}4AP=REFbpgN`SY2>WC-O}npsSdN0;#~0&HxA&_5-l4)|y!Qt4Iz{CEdiYKMqt z*J`?1UcsWtm{o*X1XGSQ!)N5v;I5@;@i68BIw)H*vYl*MK2I{$9ImyNq2fX^=s5sz z_Y$gNR=8jvr)M(Vok?hS_8m9@RC?h6&-zixl z%<`o31_hiIW(ws~1R%qL>R3Wn3FV}iStcbuT#3r?6Od|xKSIzjk50qFe(#Ja2h{+Y z-1zJuTMB%^Q5H4jl*m>iye(xjst8tjBw(f4OiqlVt7~Fm%9%`TrRvzADH_E_6tPxA zTp6r$$6-|q8BB^B&c2@n~Q=O zC#_QmyFLNjCje7rXO;u$L)7ytQj4{VanWEkgUe{Nf~|+dwb|Xs)#wXMj?m7OcYSU+ zZ6m3HOgzu+rfoDEC$L1CpYYUXip9uQp3Olb_=CF*&V8hK0upYZPDTs`3>*u1_%578BNRp+3uZb5 z#Jv?DjJ(()hH!7-0%=6$BA!WV`zfWCR=)Qzkq(F;b}FgO#$>^}7>dR#nBwj&GtMDF zsuI+$Rx|i^MLSWlf{yIt6?%s2Lm;G`SV>8eiLv97Ka|05? zOnqmH+ldA}OeQI!@YHn(@n-?uD1gYXF=~XtJVyUJl`=XL4;CECpt3zEsaDCVX%U5R zL{tvrM&Dvr33*Z-WIN)}2*w_e%gh5_JAxC_p=D{kk8G4-C*%$ne8*6L3=)L7AIgHK zrozYpm9<+1Gw#n4Yq9z#^UzdOscxDb6#OeCj_}YPg-k+5u||XGnL_X*{`~I7Tm|lI7*~ z*dp@G+Z?N9m16Q$_ zv`$9bBjz&|41E8jdGqLlx-CpM%2ZsNj?!v{3`9#lp*XcpaP$36rX#v22E8N9>Qg^L*#2d%n$mcdvuh9L z+&o^A=4vMEn!_8*Z@O39EPu#2Vtz!ozHvqv?j}3Am%kzn-j2?TJ@>_bL84Uh6E?Bp zE?0v0!BYs4c0!*6!%Q-F+hZnwXgkF?*lSKQ17I!mD5caXRPwF!v$CQT%L;1GM=mB- z9YGf>ze3Fu9GqL(B{bQS%hZNBN~nOjFBH(e9OixIP_*gWpwhdD@-A@@$r1?D9s8V6 zwZk6iLhc|~qxu6lav5?gfp2P(eC=so zQsi9Qv2GWWNio%JwWX1{H&lH{4_c{Lnr_z4XH3gL+nCXhq3ivaJuqjcNeG9x1{Z3i z>`_0=?o9CH6{HV@I;}?kvvRHeq@n>*j%Hr?^b_MJO+N3b&4{-4;eR<><40dUym>)y z+Uu((oLJ(~vFFU&9oEq?P3Ma-d+#)ly?DubXC!gcH><49p&t)wRa@!7>ec-(PA+;U zZ}Z2d$)${S+3>~BA6{1s-CZ)ZXJY=wR^->_q7##^rnN44RKBW{^xa*MXB@kmSfB7) z-B3|g(Ud>^o6hTZl#d3VDf-56=jx-pFHQx2R_8|tI;n5p*TpSd(3?3}P-Mjp+rkxh zmk%x|upSv3T>Fex>7RWh@3rBngnD8);o4??iu0_S^4ukFRs1z-s=siVKA+mSd8+eK!Tjp4 z9;LCdhd@HdI`reF=c4u1wSBezz^&W$i-92&OAFkqop*p4EvFup;dv9ozwXce`{?##d6vOOSQ|4r z=a-`29+rKaxOQZY`Z@J;MED*5y-$j4W6Q55=0Ch3Pt=WguqkL<_#}J&(Chn(E)CRv zY>gS5bE7qAAm5Wcb}hLue5q+~SHt9mK&_+jd%tqn+T6u|`o?HvX6Nhkvf|RKq2X7E zM12puPBCLvFEZ3TOG}>K_5y2-_BFnv{b^?&>0zp)C~-?~Efh3wi^52U5(1kwM{iz*8f z9;b*NOG{wTY1_4JxiH--ulb*sjU+H36F>lNi>0a_GZjYM+m?g+`DrWP@nTlwe8D=#nUwoTYy>9m82^)kB_x)B0gcR)>Q0_u?U6(AFV!KQKm%tO2U zK4o~RA9Ti-PP`^0mW^(_pxpzi6197$mzwWG9x404a5s%p0G;tWr#s`@3VX@HK6JV> zegt&Jmri%amx0cBtsKQ_Uf#*c2{>yTZj{yW}Z3 zXiy^?)JWRiXP|c%$YU0)3@^P8og$r3d~+DptcA|NcMKQEU3T!R{0pKAE0Bhe0id@f;c8H6DveaTc#F3CD;~NRn+OIB(5f=h= z@ZR|3uTi9(EyebyK$I1n&GAltS2XC^lDF4A!^cHaTDKI6#V*d{t@w3})Cr(Umd&|? z0(T!KjfXh3tbvYl{ZQ%il1PPRzyb#V^ZD+wVl=^Y*?@=WITzCA7BFK0v5lrW*dO2? zUL5Mhm8FgDat|g{h>=ttJ&r{?J>~^GthfW`lH~=b;5#hWpux&*AQTeG^tDs@xGaMw z%J1#HiOu!aF7}Bo&;dRN^lV_g@@pcOo-$e1Yq)Zf#XT4IFp0dxEWwt zL!V-I2h$nu057v9=5Q@56t{i5mMTOt@zr47U{11`$p=l5pTd$*;yptsY;C5bk-0hY z)9}{$eV{WFqT3KXbrm7fh3JYK4s+Ovge*A?mA;);^0%(GeP%4HhABCXvEXFFz3!qi z$pgjmavf`H3}yIgm0qA#X{_Y zwE?B9I2qrK>>*^yEE&b_uERtO%pkbQT?omPGPFh%2lTY!Ah6GhAhsefnTft8pUJ4Z z>|$tdH&Q@!aWzH^6!(S`GG!w!~6(&LIZrZj* zR2emsr@Ux`rY>$KL4_1}nqe;#MSe}$u+l70HP7p&N5H#L z5ruxlIB|v*A~UftglXhpwJe_LpZpI7%0-hXgi?9=zwqlQx~++z0$8yr7?U-viCF^a zaS^Ew%CV7D2KvA~BMGNurNK7NB+&u?p4{#+1EMFzNRo*pUZ0ZGzOgG*csG-zHDX14 zE*nBie@5GNyVpab-7Ov%`Y49?A_yXP@yd9j7pbO|gW6`1m1C!=XLq2;x~rA$l* zlZ5cLG=SIOAgUx&6Lf+lJ7BH>Quu1$6eax!3I0%Eo-j%QQG<#=4V*|w5@bn$ zhltWF$-u=j1zgw;&=UYOl_ZNmZ3oW@N=Z_)nzZleTIH`U6& z1o|0gp(G4s1b-aZ)_n=2pwxys20R}jLP)r4x{r~ZtsyI_`69{~DuJg{oy%FsW>UF| zGF!F@r(v?sjdjpX0@gYBpL~Ey2P5YQ1VPh4o9AwLH^YE$MXK)LA|Qcb0WAbfLFd>c z8J#3Z-#}!TsH1r|kOl(8oDr54XYv80EHrSISB*i6tS)mQhQWJnau4DT!92RzZBW`$ z$V?HO0jhy(<&X}tC6m>fr>If~YAY6l%+iXQ4la#IfOb=yja^QXYqEsWwd@Zd)Fp@< zG+lyA`-vxKvoNqbuE9!EB7xxv^QavtK?S?(1SlFkMb~lV=n7|5imN@!l|s{E4LIHT z8WJcUI9W1NjT$t^9c3n>*^lv#(iRvz?^Bq4EN#3_JBacg0-|HGgk*R6we$ZgcMXOy zN_P)Xgd5co(^kAI_m5zVU^AmLSu6uJ!xgzaikc*JlUV?c+!U5TB;}~*G7Rx2n03s) zMP|jtAWZat5Y&=Q3!Lmx>0g*u-=B7`ay2swx2f6gs%5#1HuLk9=1c<6-acT&^f68* zP|+P((M~E_7ANd>!yC__9W+%e$71w1Df8K5l=iAcbKtS%Cf zExJE}3zHDB4p(6iNH>C6DnNp1z=fg+Oq>Srq9kVouTwxZ0-sTd0i2qQkWOP_58@QF zxmIVU9Ej4#R4jByHAP>6Hy%86woSp^Ho9`587yDgZVcS0(YsxR<*zcYUM;+M@}j>H zdJkQvyEN0Qez`r@uY83%>IyS&^3pp?$`1-oxv!48m&2+rA=qLfiZK<^$51+<@@|8S zaIckcS!z;B%rEvu)R zu)j4#gA7#$a-fH7g98mJZxA>NNQrcql|Tj56ZO>TgfWFHj+mK}PNYW~-ZNPCF&CR@ zklq_1_RPA7?a8#b@`KPF(Ko9yq4Xtt1_*d|hdllTjct9L9La>3;Jda$xHctFVhRoouQlaoJ=qz5bByyL0JE?fZ*a)l1c2?s? zPNuvbW+zp(0-fspDuqb&_*T4wBVW>0kHYKvY6{Dyn3dY*$>1ORRR!jOQcq&v#B&zY#QNcu zUkC5rHjgqF>Z^Pgp40w1sWeaN{Xfg=E6+m14pZ;5zF!_?-z!wUylMEz$JU{dXRYg} ze%xN|{9EO3f}dz=Nq@)(Ynw-N?fp6azqeOc9&@H%?EH5A-nghksZ&E;vtLTR1^Hju z(d!vBt?V5c`6b4x8dJi%E`9QG?|(g74i^>fSaRK#DPQ^JYGju=v1wxejl8B46#zD!U;F7q{od)6|_}tLW>=t3_MoReJ$;-A@|Kyux{S71EKRfl0akwx%QKf}1~L^Bncqwm zOs3lV<0gV_^#>;{D_g%CnX#+CVd8c|-t#|WBg*sHK|@!2toMd*eE#C5OPSd{1*S>U z)!y`>E6e%~lglbvLx(Qg>Tmvb;n9vuQ`<*|7HP?GeW`ZV$k6tw*TFu$C?Z+Mta{yvu&C)$E} zkQ}oA%kDPKkNXzb-9kPO`|`hm=KklT^E+m48ov+%unPaAFMvztQ$Y7g{BP#D(rNet z$QCUMtDGOnXl(_C=^4kUg+2}$c$xY_XI-%OjCKCr1z_SZ8NkqITJ`?#B8+z;0R)Q{ zd0STa4S@Rw7H!bSA!ADFi+NVVN0oz3OTGZ(jqifNddzn(n1`%}PuznS=7(1fdgq7l>YK*X0SZG0FwbpsFRFa+5-`s_3+#4) zr|{Y8VbvAjVX(;W(&99XB0vZU$^>Bqqd1jQ`2>*i6f9Jo-Z=f`=nKNK5vnqbsuJMx zn40EbL+~z`tFXB%+Q^C}!uyEu?nW-g$^Aa~kSECLYo>8?HDpB>*veEklE65}-fz@R zbi9e;=@h6BPBYdalqh`{DKI)$ZY@R5^YToH9<8FjKIQdLyHG003pG*6$7X6ocrsU7 zbA^NXD$a}Wl}?P$)y#HhP??+=Vx7!x0OKvOK`oq&45JQ6v4AJJmrz2S1{-*RadlCd zLWqZtmMYf?a>R)^4ikWf8_*Mcg2@t^NTwLCsZ`tCZ~QSJuFeg)qoE`2ESH@UAcdC| zEK=~+iE_mY>NSv!)g`U1O~NwqHAaCrgL3LL)CwfYj#6Y4MU-Qi?6HBqS0e7K5Cs?s=L({9 z{#+yqj)&XIZA6t??sWtAJ5gc7bmi<*SP2{Xv`Mzs4K`*VEIv;{2`cf?V=yzThh-(D zk|3;*<>^1Vje@-c?5&D36XoJ$<`bxIHeUcckc@;>0oBqN0Loh0SmpH;_%bDEsSZSK zr-E#=lv%N*Uiamj0BZ2E@D8aqGqYh+5QD$LVbAg0Tx>UId=)8ZTXm;2#}a)D+K8&} z>z#D1iTSX(2M~X7p&ZL4%81S`_9QG3(TIzc1kh5AOkr1Ypa+^3MaV>Yi~zaf2OaJR zz6qZR5paOa+<_Ov?clIf63`7|B>{|#5s_`LC*Be=Qj9v{%*3{kgp7z6ILyO|QrWObj!$M6NH~=@ zJVH+(V3S}O+hdSQOgux^5<|W$PPy_0hFT2h%sde6jqLaXdD4k z8k(`I%XQpg69Aph0)ZKZ&VmD$kggs=l0hp#mAqPyL2HD35fhzDBy~H3Z8@1GdRjCy z7ZAknJ84RyLA<2GA!N`^Zr+%SRtm_v4)z@~gLoj&CI`Wra`}L+9wLjJ;eylvQlE=v zFuZ$a2`2ECOa#E+^*qxdqRZX>YndWkFA5|;S9+4fgo7PF4SFs_o1_SlB;^1Ry|k8{ z$&*F_k@87iJ^--M18M{jB?1zViIZW)>>qd2ROKQUiJAXONTD>Iap;RlI}_w()e?v- zL7+Ey2W7(RC`A^tr4mNx@DwX(i4MLz2d2!qm8A&)oDf&R?&c|ECP$qsg-Si{v_Gyu z5Wo@F3sqcFj+@EbE={9dSOc<*7e~~k!2!h4gndm3Fb+rK4LB5Yhv_3FB*W6IvE6e1KU}qrVz=~b zHPpp8a8r9tG7OR{DPl?hOv5eiI#yjrqdx!{yhKb~BI+P8)G_kAxrHnVaMbQE(EUV( zm_pf0LW~#2%d*n^B%eVa&c#azghwZS3QMZ3Qfwt5ic;vHzY5LbRMMe5O{*P*)SYlMT!rfF%#DoLGmY6`CELYGc=CD!$bJd3z;=?oC< zB=+LaQB={u9<3p`TN1X)IO`8`F~CU%Jf@d}v7>%E zevX;JE$!M_*;7{#7&OAA9%A_w)U^|~1J|#*N?%FAFL25oXciQhUsa-5kq|Tx^7i#l zE4K3NiAt)g+~_3Kwl9>0(LKJxSvPQyDo6Qxd?bY=qCJ|{Drr2j{B9LwZifL-v_=81 zbif->E)RmS28t&rjxh}|uzN*=0O;Mq;@T)vSQA_+3uaHjpTV^_RU$!32RJ*mYe{^{ zW@r~Y*Pt0qpx&ew32W#@jNh-1AqUtP z>LMqskMSZ&323tS?Skp-@?isVSeCJe1L6!}G^DlD^}Nm!NHJ-(DGI?r3#knvA%o~L zL^QJ{s8{(xGFgz@v#)FMchFEz*<9hjP9M)Ii`(zrabQPQec$jI+N!C8 zSDUKm`71Byy>;z{!J`+-PciGRuuhJg59dn-?BPy-?)IIiPJ9@7TrlX0q z%jSmLd?rQFsv&E2_TL8({w-v4N&TYXAom+Sb9XFd%B-+9`NLM_u{|3`_A0V#N6)jz z?sxeX2Tj#Z?o6+LANL`38w%^s6oig1gr-6!gVU?qPttzxrIzcrJ{u`9X1~<6f6};f zxgjxsQ1#}HH>XBk{>5-Ao4dTOKKRr^zrH(tPphqa#hlkV3rC<&7UHqb_8<9{c>T&} z{0Og}k&?Y^@xb!LsTRaZwGNYKqOjTO?;#Yc|9bt$mborln%y zN=i%9Y5p|tXOH#n6$9TIP#e0D--AE@95SZ!IUfoGzYi_HXLQPcpGF=JE&uN{0%n`v zF9RO5-_@D7+or`CAmV)USj72nTFXrw`0K3qGj?vdr|nGkBrUN)Fze9+EBsr`pBo zyDr@~jwE=&=mLY$B^Hb>%Z9U8673qyn*f*ym={((sd|YTfhjJQ`amgtp-t6CKB-ZA zVLJWy3-+ll2&y3fSb%!i)3CSc1*#cb1ZEuCN{X!{cT$kwO%cCe3&#t98F?Q9@gg|B z$;f?%oQ4Mkm`p_<|01b);Q{vYlGWUMo+KV*!n|xxGiv(fDUlr zlx`-1Ra-(BnD$p<#B!de1kq9!3_>pQrqaj#EO)od%Q8Oz=jt}i7UU#lBXYy23}+x0 z#e@<96w`yy7vK_egGtTh<4?X;LSp>JwuCo@padp}K1JEtKv$eHB&Dx`g|=p?b#9aD z1dqwAP?sjFfnJH3DA{JNnr=J7b(90^2drJTIH5F^s*OcQnm zoZa@3dXk#iT@z4nGM~Yz1U+FPZO$YH`2)OGrYiw(WnHfygB3lA6e_nW zoZfJXW^RTQ;@--rsLRh2I}vpw9fsx!DXJ6+5yi3R5PH><3>AP&nJt(!rrlohL|JJm zEdGJjW$pso+r{pg9aMmH4R{RIEUwCO6D5F&mGqPlu}VqIj83Y=B;F($7V6)P0~f)tliEu*-Ui;sZUj#9L-6;(H?G{fvM=m z>{-N4PUFNN4K(8hAy!G#XLOf!Bq^M>d7mca%3aU^%6e+3t0@X3WFIjTxwny1FJLai zONEL?j4}&i)YX3R!)%<>fK3v)Rftr$bwql5!j_P`7^^@p=K`H09|s%lrxmpTV?Z$~ zQcPIC6bDdJRSl&+W>g<#u`+5mWrEq0f<%y?3hAazvSc`oRh$IgF=`Dbn(=l9VGEEz zNK`2jOPeGCH`KLQ28}aFZt3NnR3P}v#YSLvW6mR3QX`_{+j<}q+J{{Uwn0tDAkOYo zv! z$l+ne5CDeLgY-9w2ZWFCxF^?&Q1M*D=h%L#$ zXJHkRHfJ+~8|^qJm#P^|>QK@QsQp7Mb}pU!nr6L3aTcnwDX*?8-YPH*@YvkMWEAC9 ztQQ#AWUk}hMxHfu79z{cD>JzZw9EwE3_?~lF##b@tLLL?|MK-Ba~F%b96F1R;*^}& z(%?YCLA#Zatzy`$V(b*4^4UKKzm@Z)b=yn2qj6n*hHKb!hk+4Mv1B7{Hq_@st-3 z;u&K%*@x~c+{J0!mINX444B`52X+k`BW1Eo2iQYT!p^%kia!Q8HH<%?_sEO?3FH77Moz7B8 zSzHpDkJbS~r3A!)fSqu66Cz4-X9-NmJS`@u!PA_@sX`d_;vt#v7AhE(270*|9R&_7 zKwQUlbfemURAvbjNj(z@W@~J(0D&MQ1}8bWWVF1){RO#2@Q^DyVlrwnpp2SW4#HR- z2y9$l=by~&D6MEj2s-W{9VFATg?Qynx(DsZspvs@>282WY@5gHyiDUPX#h+!G&v_z%AS{aDq>ERCCe0jO!jS zpJL=r$9v6I5FUOv)ji{M#fg$}j?Y`{T->n!c^aa_mA_^=b!^8j_pUoHlt*z3QY6RW z=sGAmE6toh(aKCpWuw%(Z)tND8cUx4ndmv40`~}4zIISC?l1aVP!Ud<`oUx`|Z;gN8CQ|_0RO5@};CG?rihX z&*W83t`iPbVw-xL1u z(Tsmg-I-V&UBApvG1<@gdyLxWhAKj*Dz_gR^vq~Q2U8zazcMzF+N&DPTkzJAWK~}5 z=#NA7Ki}~Us49yBZ(Qx}dUf{1N2-3ujg-m7q*Ze}#$VxVX}UPI$2+@!c+g_6uko*( zq1F3nd+VTo<>Azgo%aTh?9*Zc`x-hw9Q?=k;cNXLe$!ezkeilG`?1_?WWc|-dYRAi zY?01?t)?33`^V%n>8+Ckx1aCdIoLEuyK!ueD({uSiv{&R55HMdzi(^WZIhoW4K1H$GLi+oF1{JKc<0l)1y=3C3j&0n2DNzkmFtywqOyo@PgJhYyjyU|MW5( z0*0dDkbJ9Q|AOfcFs7Ic*_y$1A>l9PJ0^fz?c&HbVQy#m@`(gf^%5`?O)rj4=#kRV zsRM4ct6(Uaz70q~*&5%vga5kC3(RVBuO==T`PS3|778pLM?W-n!_luB_ddSu8x7EN zvYQ^d=4b!d2eh0tfR_VPQRUoA+Vd0hnHB)Z_QwD~HfS4iw4y1qsC0Nnq-B;V9s$CR z&K9Y+1zrrJ%IGjEp0Gl~0MZtVSq)X)$VZf?b_Vf(u3QqSUlQmA3J>sTfx9}uu0F`{>1M3PRjB5*XFkD?No1Gr{}63swx zp!W!w!V2k3Ho$#~ZF_dlO-Gto{{f8XG|>q(dgBl%5r*jg%w=AzlB z=L|(3j)2#8u}M70*;CX50yf>@5+GAMBT6TkO4x{iz9m>tZetmy9n35gCI_CXuPF&K zCzm~#04w$FTv&7}QX&gIq7get&<+FN7IOI?sP?oZeU^|Bto)2Hq+mhFOH{NEree{< z`9vR)Pv{dI%v@smhsjh3oInKSG%j6A$5EzkjSVZ$)K%x&EOAKOt~r@>>D~nW1$-b- z%^>O6IfAjl9iB~HjN^_RT$>(4ZJ}?HvbnU- z@{z@s0xWA0!jp&y7(G}z3AxKjID!+Qpyvm~ds4E%P9#Y37f?RaTnGF=9RkIl1K2*w zB?%xn3KX)S!pvvm2TRUV?~!-_lLVjIwa&Vh6n#Q{n*{3#+PYAeKP zL6QuHtrA2gz7Q^JvD23`ec%tSv?Gyesn>{n2sP)s zQJXuIK28Qwxw{GM5ZtD%w5b)VgvF$JX{i-I6XGGG1kD1pjEze*x^ojsY^6b_Ec*v| zrT~8s2}z;jNPr!pT+*ZB9;|}O+DZblG(fKBS4&n+~>Fzghs0D{M5r2VA zeRss~1EfcYjxhhRg?))+BozV`Jkig5O~D9d=P-zpXVK}r=s8}^P^HizjDiF4x75i* z6-T&en*)x9i6DXgUM)_4Q?N*EYSu=TIS{PMtq1khKjUH({S?&zaCx>Y{3;DyYNS*i zR=_rP#J_z*ca5QK06JVl@mkLlqCgtPz=I0F ziX$-bFe6$2?XIkMjD~#XYxzLNxTC=M0`Lkr(xh4Qgome=COT@TLw(Dl$#?0 z9IBKoQuL*P-A$~3^^m*^e4bHob{vgF{&NpgAh)5#wgx=SLqR(!h2`lWFPGvT!9BSM zPY@6U0#GFBBibrX@m)ZkCVNswIQWNH8$lC?_(;%$}$aFfO-31bTqsl!7>&~0=`Tb9Ni>!z;43L z1T=G@2(+G+{sm`C|5z;3JhK%uNs_S==5LvjDAr5~ZHOCa6d)&cu0fsYMqGa=(Pgc`Qdb(iqZaHpTRqa+np8Tah+C z7Axss`j7s{Tw%8vkV0#X!g^^42rI2u=y%e@%QS)HM9%AR+h~`)gkLwZk{ia;`XDHaPpcy~y5C@fmEYQGo0m`jST!BWEmWE~nV>eQ z(hA^wk`d2Dsb}F#l5zzz@HI>TBLe{$VZi{KLF?7q;$krt0OWhP2Koy>5B*9Ikg7^m zO=Z&0W+<0z3s~V00@%+;S-g7-{>O5GHSqOKDSMbr5`~2LAW{cW#8TvBt_SA`^DVD~ zM_h$Gltlnk~DFkx1A`F?nF#~3YbSjrnD{(3J&WQfIXyU zK7Zak%N+zaBh@hWv~_zA(z91D0tl%z-Jhyx@M;&Nb; z1DXl4vG^QX2~jkl)dhox8wL~vaj_Id*(h^4E zf;kSnL_SueU=dD=kV*-P3g_0&O5H(hSdvU2W$H5UY@jW)vM0BOc`hsR3cWkad#lz` zeg>vT=}HrO*=?Rc$g(e!ksncCNk}@=%KFmTYPOrHHMH=j44#gi4L>Q49|wDBBqzDd0d zo9Bzn3hhXDD|LFo_y=V^>QH*4r7r5`QJaudv6NGc2*@*BGN;0*9O`JHQlAwCmoQ6E z7x;mib2Jy9XXR;)A@TT37s0JO598*_rx+B-U>JzlHIOu$^hL`n`B zU{{^3+lX>fg&(V==DZTp2O%S%g4Q{>HSa_Dx4|Deue)B`T*!`QWgVK| z+UUDswchM_CbX{l>_o?J)qlVBg>S{?lJRzavvNcJRJ#A_m;H5vFWBGoylHm%4!kjS zacE;m=YLI*myge@7kqWURC{h;8Giw-=UzVZ(AyLXf1kI%rCL7{In>fIxT(CeXF!wQ zGCKa^!s;7?XBJmo)$)^6UG>qiV{Bfd{&1+dH+ML5Zu&~|xAX39zxLz9i>rFg{;Tij zIR-xYJa6mphL~2&zhp^E=*G`cJJ@VD>zUrpSco#!2` zUflbB0vxt4udtx=QTXEi>%L=;`d!`S!_MgHcON}_da`-y*MX27n{URs=N?fw&3W+y3r2pcd&jNSOw>)b zw!gH29o*Vm^yp#g%Rimaesulh3F}az)>{8)slQ0`%E!aX#=KvA^lRbo3~!^)zMJ<= zf#o~SKjU3(tN+`-PVR5LzpZ}o*_CJaOdTuweCl>;@5a&8&rWWLw*EY7{_E7}!1k}E zM#k)xde4BvS-)qXr?dasl=b@5SA&PXXsMY@y*2ga;F;v=Plr!`J0-k!YPj}D-Y?(1 z@o@b4&dIUORa0HVn>T%PqxYwQk2?F$PrZ1%|Dx|U-BLdJZehQ7{NPK2-2;P>;hR@K zoZWh2h@O#n=cS^DVaKhP2Nul9dwz6Iq;=&OvPApw;4HjV=ZoFk=|x_$jH}kR?47(4 z-qJi8zO&`i$t!!bcLu|)Q#<^(OY^v&W43vI44PP7-_q=B{juntPiv_by375SQ}+Ma zIyx2q-R6&{&iZd&JAUixSyJGm~d z_xs^{8+w19jQ98def;~B>V~rwlPO{Szdic6`9T5#I*1C=srPIlABX*pHAufd4V;^A z1QamJWfk68(AzxNCME-KAp09awVLUsG&3f0ob;?wVNx?ix6 zeVYHHK21aCIB;Ps_Sk_pO-h(f2EENKTC_=TR!qK1l`Uz33JgQRU}73r?WhhK2UfPz z(^j@|kP8w9U0@jk(H_A+y-eqOs>XCKZP0|_U(2JAhCI2yZWfT9+zHnC9{~>>2ow#v zV9?gopbQkk0V?5sB0wd$6Tx8C*8-Nd=>-_)9x2;e<~^LID*(qGSndJD!r%os{QW*K z+TDL~nmm^b?$aipfhXpJI8%%94E%A}=gQ&gV@SQ5@8b9+u6RVz37&1fY<~HV=&bm`&iA|Wd|vhlsn`sCVn3sZlCozQXW|Y?M6e^V^oZkH08)OHZ}lc z8Pdd+4F1GC=|W1G1%th4g*XWXohi^v4KsHi{q{Du4Q?Ql2@Qk*eDHs2+=C{#k+mVk zvRTp${A-pOd42o=*ObzQivNQB1hElMMGB5aH9-MSJ>`aGzaYxTVL^T7$p4tGsqNZ^*aFe7^Hp(qh0at{8gd<_$&^?_VIVVp;pl(>l zSU8XzO_TeGV90`q)%m#;jl?Q+c4HUJTVQFNAQ#(Gg69$tz~s)v_G7F%AN3(_gL<7C zkdkRf$6SzGvEhn866f!53vfyl#i!-Z`;R?ndl)-QipEoWg-jxWB2+p}@To|9TL%05 zlJ>9pTslO7egR*g3|M52CP>VoJ|RqfnCsU*m%l~)l^jG6Zl>M!~-11ULtHM zuvgwr1~Z%B+!B2qMyqbr%#R1#wCBuWL5Q-;UVxvr_2~Nu0I6c)=;ho`@^o^MGL$%2 z3$_tBGiPh=br5}nK0q^}C@vK%ZSz>{G(YbIqkM8MowLG=E<{Ks5j%z2NTm;UCzte6 zIeII1UsXt$ZAU86{5@GrB>H4p&SEW9fEzjj=+80-KME8P=V%pxC;)4Iag8}iOo5HP zOkhtC6ak))Nm3Ny);UrT&cx*yxQHB37`ldh%#X{>p~CSeDrwsl)Foq3S|bVl0$1D9 zLIgX(ArHU~d8P$Rl49o&l~jSU5`r|zN-NtD65He72RP?oCQX}17t>9-6(Qb$m0avosYi~D93gtQwU$jRtTxC&1;m>Od?4swy|Al=K??d5@V zDz8>-6?}`hYOf8ReG`M|wJ~LoNwOv%(^;`@HI+prm!?DNEPBb3js=DAX=rN&S4P}zY+BK*Sr^{k895FO=yT`Fd!jj5rIq`ri^JP zz<`noQp8&dA014BoK-DmdlRRmUkf|b?2Ya`5A z1n3n0z}03j+4wY&DEdGkwu1dN3={&|K?UX>RX~)7{g6k$q1}8I9R+7**vSjxWD;rH zPbLR7DeCwPW8_vSlSa45|M+?v5e0#s&Q-WgACNx4!NLM(dt4CZ2mpyGgEBoDGhN06 zlkt8|7i$I&fXiDw*u^hL)pQnyf^TalMF1W`R+|Ohituy?bKoL;D3=517AQ(kP)}pT z?ph1ML-{d!15JJ1BUzI=3j#c|H;@@X*8XAM0>D2`G>_9e13KU&uLZNa#70Rai1YvFMjIC)b5T7ZxQv{Ml)`l=Nzp-Q z0+L3_+$a{w)@V@R9y0>43A|hXx3YH1WJ8tcRvfjXXQZ2WJ5vVeCBVtTRx%y0P-I#y zdja#)EEGit$S8Me4G_2X+|Pk-auQp*8&7M;--5U@NZ0_UJ1931EbnQj=c7tJ>B?jw zBJvd6&3p!t4K*l}K4T_4GsTQ!dIT3?0gXg}yFCYy^O?MclFp)oImn6Z6wIH&&KxYK z-2Eiz+lA{aYbg}KPB%8UD0vLbPLx&mH zs7ZK@LRgmN2;3ViDH-8=?%h|S&RaQRN{Oa0yQYx5}>Qt zDyEx~q#_ZFSbju^ykF~XsL9k)2hcpI9La*WRCy3yJ|Gxu0oa$^Oek9RfD$rbazjmX z751PC)6_%*D1$qnZNDtfG^!F%NT()hf`U$>HB_)T6@oNRgh3)j0kiR16aue15n_X$ zu_5vrtwpSPA}QbT1)`v+%fS5lirjS?eik*i3vRM}T1k(?$#wWmyvu9DMaOE~Y7eUh zaPO3o{2BaHXA1~JGLuB3R3X6trk~PDmxGsgMCbvh84HAEy#27^4MgMMW`ftNVrjrl zP=Xb~P$kS0r!o@KY~4wYwn|x+NtruYsL1zbk$j6M`U&901CBioXkOsa z22Mfn0bImVkx2r6N+MANB`(&xK}b>-ApvE}7$7h_=>G(K9b5)1r37&EQ6jh)T*)L6 zFf1v4DnvpS!?H?ogd1}35fXf6LIfDaM8K(9ESs49410-QWJ<-s zs%wIe0=pqI)gz}gTVEc9*iKsy3=B1U9MI8^LDegbcg!kvLh@h3^SQgrElWRCP&c{z zT?4_c!)+W=-poCqAU>8T?c&>P+B)%uobYFt(hweqyTh?2E^IM(thVEw<|=*$@-^Y` zHig$xI_gDedF=y=qA{13(gE_-St_U}>jspm2xF+*-Cmfv0x5uuQX_#ae0Dz@a?)NINV6)lc4-<2zSlkq1wIdiYkTeIAy+14t9j3 z)u6@m-<>VPAl8Ak5z3RO4xOP>g8n0?91x%IuLa7FL(jm$HBg*wg{vmB1=Rhz@GM~K zONOXr##e15bC+fn{1GCSu2wstD#v+HHklc{8LqHL(s99|sQTS~fXVu0;ru&%Vay_& zz-IHqN@w^O)y2P5@bZSC8M?D8R?phL{Na+sJulnFQMxQD&p42|xc-D+X9W1_8QRdx z=}h*rfzY`{UDr#7)&=&OeX;t`tZ-uR1w}tRI^X&0U2Ym@`qslP= zuZH*d*Ew3wjwhtg^;->7d0fl3)gSKquy_5$LcXm>J_i?Q}VID z##Mc{can&%A00=_s{8zRJ$dhp%#W#VnCO__^3%x2zg)X<{$*lp0o02Ccv^UaFKBlC zGG8i`xc8whczz${Q_k+4JERK=-{Z@+X>B)Zx6YbOUtZMpFmQ+UL!WN;l)|^tmUzMk z>Hiw|+J(H!+wXs-uQ{xJZD92I&>73+Q=t>`&7q()$$#~mP*>t7k7|OmUmgzSKbf6a z-nDJune#=nCzM)H1l0)d;PYM?eovnGxi5a_lx}i{roJ{Iy4P^)moa%x%e%h#_|7JP z)dPtu{{5ehXjhm9SI_BZhO|Z5ALXwcT$w-R8#c|YpX+;JMq=4Dd{D0}TJL*J*V^wfO5ar9GmNe7HB1$~Q~z+}udzi7M&B%HJu&vz&DxQ{{yn{|qub+m z&B=@Lebha*ZMZx!v2Z-DvuMwa?|^8e4W0UI{QEO4_a@$Wwf~s!*}9hF!@*-M6LYMg z`hI5c#pkpQLs?KO0{DQNU+ny3$Y7s82q!Fp7s<2bgDbaI`yN8C2kx(5cH_GnhqpT) z?U>!abnvz1MJI+<%xDEa`K5`zhoj2Q_(}blJm=qHe5XDf9qr$qI64LG*uSrLS^K8& z+XMHW0XeK^eyWBh_pdzuW-BxjyeDz=;V;Yk=MP0S=4~85smz-{y1sF0^Z1*IXQO64 z+#GjEQ$I5BUhveNv1i|JDVuo9uGNfuThWp}f$pep{nNh@4UWJ4|4n=U*1P_@j`h!p zZ90$iZwKJ-ae_-yKFnD7fUjVD&jYMXE zB{hA3{*pZ1@EW-l;F;+{$4yvIMxP=*=5o))_b`B4Xb0`C^c^6dZ)Kc0=KDE?_WPi^ zb;MB_M^!a}R%y@#`Rq zlpBat14u_j-}M+$E6>!xVNb*5xnTdCK@$l=vg-B|Bo{)D&}0}$g~7mg$Q+<&JrPe+ z6bKnt=U_KoVo|CPWvYomzJip$h!itW|9mR*(5}8g%;nP zhYv9LGV#BOdmE@G?zC?>iK#ccckkz6CX)~lgqi#k1_)we5Ug7A|7Q{c@|6$;TP-F8 z#jheCer#(OW*jh5zd&kjx7!M3t=-$!YHhc>&+Zmdq}1-Ng4DXZ-Bv7X-EOxwe2LbN z=c3*FeeU}_&pGdT-}9dHDl>9m#>|<_Os?Pc`?$QkUiJj+KU^8*{7S=dCe zy9W7gW(1BITPu5c9sM&RuSDTIe?iP;!ga(QjP;Hr=%A0@%?YMoHRG0{X7%!@{SU42 z=Ck^0+k3-29s)&yK9>)rYX2zra9lIP98FD_sdC)g3 z#y&Y4m66!ff=A3k33`{tC$5$u=PWG$tXtAv6>oEef_zL|8$vC>N4l4+(UUaoDx%A@q%wx4===^kir?I|K`xw=!5Ia!Yi~^ zeJlk7V453BHxVNcy1)LlNNMmq#Dt@e~|OLt9e6MPz$zQo=1v}^ox8EdT-d)uK!@+s@+6?VsmFg z^8DYgsoW)SjJ2G7)KSKYI8~{4;h)>UR?sacfqUGaTdkn&N(;3@0@4T4IU((! zAi#uloR_*%r%pG;Pw+IwFuXgD^MOrkz!;A#IGx%Ai#LjmTJ%vB1oyQN^FX%RaC~y zs!nrMXtxZKv%S{O<86%F&!sQlB!nH=E7UsKgVPvOHfX1jsT`u;LJ6T=K3Uww{6^MWL;Ky5aeb(- zb@axAv7Gu5y~wNAfU!r5*j|mUkJ3ZtCDl!p5yJz?tY*T&;5k}-8a1CTH}o=dsbze$ ze3j{=|8$W+asT)jEGXxH=f6&i=>7O9tF z4dSe$teKmop^RSk0`NbDRD3(bF6j*-nh(WaWtBxO1yZ&v;L&oU?lY)6R4fJc>24;T z6o^FwvLgx_K0)q~Ow3#dJD+P(8@$pD^smuAgXB_a7b4EW;ph&Mr^Zc;Iv%NG&%p$6 zl_Dw1E=nDQF|v@5!c#)D+pOY}X$8x~M-A?xHTu3?vR&imgMB;o{|4#^1rJX!8qc4> zT1_wu?mLv#q@si*B?mG=VCxh;ND&R60(O;RuUcfpgQ3rEJ}|Q#04*%5s+&}1z+O#C zj^zMUC8-2EU@)DaS7OLS0ij|PYX=afP+UNnh5AClJgDpUumxaL9Hd7DUo8p%5d@A#HyQW+(KzdRt|r=vk%tGe)J1IjT@&9@<7mV6^%rfr>B;u5k|H zPOSobnP~}Ea3`MYHAZNPO{3DOxKX%X4uOHoLLl6HE!H9{n;K!jc1XWgt{bEydcM$d zzRf)lhWP+jkp6gR_tjEnQQiSB=&4(dljKlyq$RXZ&K>x45vqXX18vRrL2gVllwljI z(J~8HAnnw_jp~x$#5j? zdd!l-FN%v!ca4oyCUST7_}BSv)+LM_pr?f9^MT8nub-cCx9)y1We5y1Kflpm{@Y!{ zj$iz2+O}Yww#d7nH*4MYbtnhjT)-4NA`B|_j&EJjSQ%MJEnB|K9~&qw-gNib{zh_B z%M?HP?WOh%UuWAGFInm+&G=30exXia5bvXjhcVs89UVQ z@xPz{$&;&YJyQPhsRM)cJD+-N`ortbUM)_2Ud*6xS8sUfo$2HIZhZ3TixYgxvqPWV znc9sPf0^91|M)BN$-Q?%tq1;8_xn3_5TETEcP@WwZB1q^885AeZ?=xtX>yVyTWy85 zVm#hptJxaay1fG5%={=LW(@mRk2Y?+dnv29Y<%lSjd}M!)?{QxO6wc_Q)O8{)+8E! zIsQ324ql3^TT@w$RrjCWR#AC(n=w&1ji)T_#f|q@wl95{!8`L%w~k`nBulPfVX{ zJ-PRjucy9p7%tLRmyb2LmU^->Gnj~1SiQ9|Ytrh?a9k9|Y)oSjzs1>U~3 zb8SMfqWu2kTN&Dsvhm?djf?JjXAT@(ZtH5YMoe#={xkQvAp*y}_*-v%uH`CsJGAHIv8lA; z1JcC$l$SatQVL)C)r9}$7<6*~^agVB_)d3repjyVCmST+~apE_N+7v|I+51%B@_q`gL`-k5y81hV5@jMU; zjzX8ewh+XE{r=+Y-D7e+UtvCl$IjB4sS(}GGN&acH@iM@1xN(vot@bpWP*hNX!->_9gzdT)B@cJCWF3 zcXkZ7UfYJN9|wvoAm_+qfxZ+_27b33{(576qQiZvS2YLmr9q+rT7=Ws{PA)a^RNO< z;Qms6Kh~({m|Cq)lMQnVkkz5-$6S0j7cURdGZ}Uwc@vY*o`nx&zGpxvj-sd9#8xHVl=0d3`q8E_WI5;PmdTy5Ee_6mO9r622<3u<(M5<6JX zudgu(I^2OZqQEj1GCwT14vECnj!XQ4S*bZh+btYr@-e9@dnicRXKBbgoC-=y%__(% zV`O!5d!9=A07f6$2MyUL(kWJej`yHWT?xrjP*yoPFH2y8Y!D$mD7;|ACvk%GAj}-c zMQo50Tn|vI0<4fu?dHI3~vtHoE6o?8rElpVoNUBWjHsKqpj}m$WD8FWLv7K_tbJS6Kmya-9iz@GO zSZ(9xxeJK9q023ELe!q9L}78pe9+iP)M?G&wyRnXokp2GXdcm)BJJmzVIn9CUHp71 zO`id$h+z$*!h3Mcwv^NICG2IvnKq0e49#o!qt`=ol{@uH_j{ET`@s>DQ69!Wmd+Wt z-?_?rO*^{X5AI=;H0yTlcEkFUl*ddaaiWX?hDSPBN0jdEpOf^w% zRjU#%buQW;c=Z^Y8^r`Hpss*v>fN{j~?jk&1Dq7ps%fBT<^i+V zPV8rJfRFca@pTeu>oB130%wP}xq)zF3@O3xm=*9tC?QAn)8=P z4CIg%TRSM9CAyS$uN++zHWfozm~PYxjE}|C8a*;Igo30a8W)MCZ9YRg(}d9}XFHk0 zc?5TAJE(<*>27hK+p>Zx2L{a=+(mmsF0M}S$S%^}lJ4Hr=ROgluSrWX2bKh8lA;LP zA^1`(rV^xus?eqO2rf=?s+bgt>)NG_vK4pwmm_ig=zB4La>+G`nLD)w#RwIMAbSsOqDFRn&ZTT{K zksQDm*fv*eE!^F_)`m2roL^YVJk40xx%gQmh?x%tQ^;`k6yA$j_ii5+6G(H5tpGI- zaE`w7Z|+Iq88!2W+9|6YAnJ6-F<4Z`s)Js)Kr9L~BLrC*+i`=nk3{>0rqKWsrOhTU zs2#zVWhos+qq&HQ5?lfw^V3o#Mg{F7G26)kwuu=*h85heEwjw7 z(LOn<2cccyG7mW;&q+y=pr*_nOth$uMuH514jQ!=E?EUDG*QGxYt^WSb3={l?t!^G zlv<9y%17m^nnDukV};gywU`iULRY)2i<5ed#@R-WR>d=fRvB5rhT-`ks1T)X8D<}V zOm_MWO6;b9ZkWrsSf!vhj#8TI_*Cp!{ZY?SJ^d7GR)H2Y%?!Nd4_uo#7xD1|3ZXq6 zp_iVD!um9(1d?R}%UOnwhB>IweKeEDSTJNhs3^r6c8%pAy$0guR82M}$s=pB1bEiy z9&x7weuGOLA%^M8X@aNE4>)O05!Q z;UzZOX25UKK4f94RQMZ#P71J;32|y-XQSL=AwfBILRKbF-CV0;kiZ~Sw2@aT6G>J<6 zLFyo2ZistOM5`fcdxjQb0bKA32hj%vq=428Wgq*^LInxUfDU-%Q@|7{6k7P75CL%| zQu0kIzGnv9D3Ww_tSXrk3@UiUvkK9vLJ+tTtqSg3xPFn`w@x=?m4_ER$2>(D{j9Nz zs;Xsbv0u64F4q=8X`Pkk^ zGTN3ii6N%$X)kJdLaIHhua|~MH8?II%-#47e|f`Y9x~HIL+H19^&1F4(5fSB5ep9e zfF(b`@^dSBVGgDt@-Ty9&kzr@n8~$eKuU^5GeH=pgzF)0voy?xao)dd=E_~K(odB4 zR)OiPuI>{tyRzBJ3x?C&L@E+9cS#+5hIw`&S>H#BrBPluNA@nR7Yx*xgz4mzP&(m@ z*)woGlyN#0roeKk?Gw@&VNoZw2)AjX4{4Ut#i)%2GlDsyqs?u!3!c0IT_4gZ=XmD2 z4a#T544{+qOh=MSXh*fMwz|VrO@zLA67YC~MUr?=WRjB$>l*7OG~2T>b1XM4WveS2 zwPTK|48w$rs~j)g8lzht(PEP5(?^^*aqCC5wfJJ@t!GvwY)do_vV*lg^yKm!e}txM zjBpH_CRWg!tu^eVSMzxDhIYXG)#iV%t}*MU z3~TSdFeV@0=>CQ6>wS;&%Y>7!U%xusHP(N%u=zmHb=`a~_1ZsNrJq$^1=&ZS#uCwh zK`63d+jh2*i`45DXKkcv3`2F33)nK|QD3pAmYT%Q4DE!oG;8b9n4HYXXD@EIEY;*> z4%ZK74QEBDvc=ks)RR;Oe#>j|ZroZ^TDxE?mZuP%Q916_CO&iOH}{_jy~IXVJ#yf4 zDD>~2y8U@^)`>!H{g+QPocorfZVaA(Vu#_YK6&bQ{Tbx?wP|U?4b#xPJNZ(^@rJ-u zQP*d6j&bX@AG_c*mX$8`z#%x;ob5Mb$||xVW!8+!h;CuUf{(P@{F5GSqVsMH*1{1t zdLm_|Ii5-SeT-5N!Oj!mK!IgTBMWclb`SSa=Po(d!OKY3)jxoJm$%q{;B!?hp#H+>DRC2ns{|Ml?nhM6pf{FxZK z(GPAHjU2GLI0*ddK#m~s3Pd0=LcAagkgU{an8|3s@HY=I1rp$I1Mb6uyP#d*^L`E4 z3|>AjC}X%gdDxlEli|w+><%<5W%mK{ys!r#TAh5_ZI$;y&k{CsR_DvF|3VWMm*tr| znwxgewl{@2D2&VG{(fNQ8W_hYzMkVJ^=Q3M_S*tm*5OTao2kn!Z zg>X08El_*ZzsK_nU_fayp|sh8OpL26cQ+<=P(3)#Erm5+O%#_(9fsaotU3w0oo=ui zAqWeCe|Uu((2*_0t9P@gsW&WBC@GuMs3GXAx`%T-*rbL;vYku5HS3*-@1uFAgsC9( zQZZBMe4vS?%{e_us%uC3W;B1qqK+Xr_zZh}TeQP`9$9ERhFU9xIXIkQ2Ir94=^= z^66Rne3h25`U`QT=#!3$$xLrcTerQR%hN|eO+QawBg9S<`Cxtz+07l;vE+UUqLvBi zv_`$LWj@NqDRJPS)?qdh!(vc8q-dBiiv0$I3*|kuAZlwrsIBAQlUcfeGpz8LYHg>` z9W5n~SW?<7+It~HZ8i%g^{q$bU(&R?KnjE$hvmNJaK3Dk#t!UZEbswu2S*Xz6m+po zg4*td26?w$p^+)2f(^P&0XXeF!lfn16;UQv!#9VOj}e1l$pnW(7s1*#I7DG9(6$EIUQ zybV#MT`*hBeU<_QLMhz3iFU5QOQI3xRE~g~NP=9#%@^kvfbU9bcU6VdQf@d#!n;)S zM0->+&%A6!HT^CkpTKO~Xf`b{vcWBZmx;9sNrIZbK%y4+^3dl_a-$GYvL=S{FpzV> zEZrL~MkNL0P^TdA?rsRuJ1!Z7Fj~|1hC8a~)A4;awtT5()u170nSW>w&g0sAX)IIP z2GMBt2jY93sUnP=Mq;Ply)1=}tCg=(R2S7^#APYVh(`|8ChF?LI4@!tN zmXenG0L&G$+Gnr~+pM~8c#y=y+yhc5LQM5l8qa2a^d>geJX`lL=i32{;IkPHDDaY-U<)yg5H5)>OQ zi$~nhL2)1d=}S#s2!>3dFtoswT^tyQD29)ptyA)LHXE1&qDbXcO}vul6-QZ;bOHtx zAx6b<>_MrmX;?q|ef|QcO0tC&FDzNY#12z$u@S9C)5}({UfUe^93ID!5vC4%oH3r{ z@)$bCo9G)5W5HfU$)R1UME#j|)y5Q@W^~ljfxKj#%1h6+nT56^dwO>iwatB}n5jIm zYiD2732s8*a^;B@v#Y^BEFPDQ^ba**;(xWBe@plr&8qTpFe;^%K8>%ht)=?CFXkGr zS_VmktFxq8-q6WI)(8`LGG)6Zk@YV~n`0Q}MmA4Z>U1BGHb;7UGLKgXloZGMkX7_dJvy`^paPXYS$hzLpF8WxA-8epdfXdrBdDmwnot66iK=2pL>s z;fLPL7c#ALds90Yw|+5YzRLE(z&v)XUa&WCqc{@RXAP}rFFL?h?;n2VKTqBB9L z(EaMr_^z_VAKhutG-gFa&5J{iSu=7Y$LPj6_cb5aun`kollHCWW2jwCq$cgAXl!|4 zSy#@F#@k|YetEY_b3XU4Pe(p{`mrY(Z%&?xt9kv?4Mz$bW5>FR`d`a$v`&1%zI$Y7 zP@bsje7AgTSMmOVTvP7C-5U}^U!l6-#ECZl(senhw~Py()Fx)$q^ZQ(`ug$rOP|^X zWJOmyyt*!HaaqiQMonaSDG1f5I%~xF@r&yc*_(#;#wY7Pj(EHo?5*~Nxf#VvC#mf@ z$+xUhBbbacbF%Jcwb!Ig9zK+V!-y+9l(TYNvn}J$JHHrzq5QGZciZm%x$)hXCO^wR zIXV>xrDn_N=;X0Grl+_6>i*78N-qsQ!QLu-Z-32KQ(Wtf4RwDQ%O~lrCwJ8SeeBEM z*>aYT;j%`{RG9`qVdhQE_KdCHZa-A9II{ii7Z=tTB2}8k?c=4}VCGNq$DlQHRwev3 zr~dBtHyc-vUo6X6bbrMm!`-2}jFkJ{w;Q+LI;Lr?`Mdwyg@+sGMQ*-X^mc~-rt#TE zO&As2&T45~@a@H{ckfQVaQwrMa(*-Mr}}sA-iy0={27fxzCGb{-O z(2HK1v;Ee(i#2I~UOR5pmyacgsOyXjakz-lXIRLAHP_`?z}h_ zrZYC*rLO@K)DUh=9Y1_#UVDvUx;v|}@bCWn?O9ox3Nj>wlhfeM8UNJyKhEdhI`Zhd z&rSaM!*_@8KY8wa%dfv4le_0hHQe;;rt<}#etB=#Jn^D4zOl^GnK7^Q?PQL!h zv7P6hI5&3gT>94;_mnfzG^?!;r%~~5>;B&YnEwTHihx@g6MA3%XF6Ra1UqmbU(-$W z=6^Ht2R5-^o~|tTPY~wUS?%dUM(HT1pzyr!Aq@4lJSEpJ1AOr;K$15Bl34!>B+1FW z?z&?=JA+@o0w6Pz2lIlKRfCmC1~O(DurY6*o!O-b^kpuHmvha;%jI4tcOE)>fXu{c z!wl7t4`wpyzDF=KPzH2tXZhk2b${LTbxi-Yd;Yx{{lEY{{yP}c%J;oGv%L7#-|nsa z7M&YHo#;EDGD>*(YVh}AlRQe=h2#IkD$CsYRvDCIR^b>L&7aw3!Y{{FXQns_3JWxYRQTH1NZ<5P4L}$9mn%tNG;}J?4J9;KR3&jj|Jt#FSDzu zot#ZW<`Z@qTA9)(OUvj`g3#m>+_6%hK}bhKNe}i1X;+uz=;%1w%jo)o19tU1c|Iya zyB3k8O_x)HwHw?6@ZTFCI*zOo#E;zb%9l; z<6$@iX6A54KFNho;tKK6s zQ3LT4hRn*d4D{P(86VIqqR}u?rg(5P_R;g9!Ipw8j9m-y1omNe5Og)UwEYaHJSf=n zExg#}1YRL1+qRfN;X(^;##+F3H>nao|L-k6FI2km(B<+|A#<3~(Tt6wGi7yjz->kD zH2np70TFtDbKtedPy&Pa0!FDfm{qzZQVMk(Wcv@~kuF{+;sqbI7a(ADIGH4sXXm#I znU-b72lCWLYRJ>T)iRwFDj;Kw077SHH+iAf^a`U58_v z)C$S2+D|KpN$rEKG}Y7&NQiD#W1&?UKTGPB?6Xa3lc019J-q#QBq^KluFI#EE{lIq z1Ca?y%4EG_j%-~+m0iv1(1&r zHOC#w3LNqg-l#H=BOz93DHmd|l4`VTNS33RiWLu<+f4~Nie3_CR>=)kt!{|azO3GF z+Q>xPj3$wu3R;Z~qAS2N#X6$7>g|+_=y?W8z^iWHcfdzn1R!{ygV~+_653%=<#J?? zz<5PPhC3K2CI7ZIE`ZonnwEyDhpw9Cg5+6?+6cm}#D))YI2pJ_lga7B`E-D!EJ296 zd<9f6g~VKaSm-Xn1IdBtP(grB)T=D> zZAN7*TaVQ-?BUsY)z-XsIH)+ijIafrqQ^ubCG?C01E36pjH+cJrw8%IC`+GZu{VLs z_ja>C5jD&C#d=QDaKcMC7N3Gt?q2?EZ*|LQqO$++ReGo)I~-fBUxKhI$Ww-1;K+cW zn`3UOW_oav6&enJ9I9kcV3`>QOG$4r> z921z`?^d8USoK~tYp2vAx?;^<7b;<4JZKX1j+^u|o|*qZl z=iHhu(ayXF&~z5RyjNrkcuKB5{&a5|Jzv=Co}I$+K^_VFpf~+SwK^RMCb}BE5!k^+ zJ}@hq)F})#yN6~EauDvoa&Rds-k{V2W=b91#hWGQai}v!P6fi9< z9LrW#b3zg)I#Uc%Z+RNCx61666fHEP++F>?8~XZOkMIrfI|G7IKk?98Nx~>AvCmMt z)A$EqiIK46bqR&Kf_$M5Xi8nGCM*_@O0PWi)jN<$B)wLl}8K$>#&G1*O@-EPjuo< zsoN!IugsRo)V@MZ7`HJZE4D(!{_bwR*-O3tlb2&zWfCj)adF&n%1#Rs2V~w+X%1j! zyC}ELfSOKVP~b@#b#5K8>B9>rKWB+jr|79il&e(DzpjOr!pU?#;{&?#Iq9?cr`qj1xjV0}q)* zUiu>q8ouSZyN=q@sf@lq3r~_dc^jyurUm2>>ey|2iO&_-vx7jsI8I#x65WC@IzP0m z)AkK*(#QQ0+#JlKOohvji@lSQPza!!`J!|i-CZjf$_0IK?KQJwG^LY%sFN{A&K}kr zmTC4OeZRQu>OmPOie9$I@CW|N3DtoCRyZ!NoyP71u5y|)ez5m|w0HP&OZjzPG>`Qm zQIrqd4sk&PW~BzI8(iTzmYB&Vh4j^F1W=ZZ1daL$C)`TI=P(0ucAXK@#;d3 z-_N?}3E8>~q^v$?E?K_ZSK-*f4DK#pRv3B>C(7@{Hh6c$-vzoDuIymT$aEcE-Vx(% zS+rgzsZlBVKS}W<6hAio0g9arGV8WKOwZ|kq<-q=LfzuOC)WNWCBiW^hB4pr9Cp&; ztJ(fJd$Fnm7q7V8W^F8=JTwRi4z*NTY+~#`GRNzwnq`rfM^?W-m*&#`M{&a)s0OTUO1=$nM`4-;7ijywdvaPro`f{^Nq04T>hmv+?KpAw{0INoy!!b2(t++fQZPMuzH9n8|H|Hz z^6>HLkU6*L$^Ev+*ka$LW?N0>h;~E^Dyy2U-!?o8lY6$GfeEJzb;au<+p;RQ-i+Cn z^PT?7cgcCr@=?WhfG9PqCl5^)XWqI<`U`CD6i&Et`qrz*Do zdFxbib7Sd{b7=YP%;t*vZ$Hie)!6Fx6)_cwp|*}aLACkl@h2X=mO z|BKf?oA`8cD&zO}FO3y!+WTAnPViXGSEtWSv<{r_-f<4(V>kHU3X5-~vqhPSrimC& zmi94fjx*76bNjQ!>+YU;yVwt&p_=;0!mOI$rF9=~-@bJ+7+f7(y{%&Vt;x*B)nhk5 zZnWGP)MO=OtiBubMaA~%s{UmUfz;4?xVZk-nasw`f8Ktt*%(7AykWFDD={$rR_42_ z$M5~&2D*M^;?JIwzrXXy*!i1xQa-$~f2`$LO<)?eeD?g<`LFMOQ8BP>{oSffd-^v# z-tsm2yE)_aPkz30V8^-XbHCgC#eqXV{Qn=;B!HZ2Ml1H6XzUU*rStCx0oWJ(_lmJM zK{00i&x)~k>ZdDVk2@R)z`k33ssmh;kquC2KbUl2zq8gvGpu6fL5je&4X6BoYZmX$ zAa|_208=3AUdlpzgLct`~VN}1ORMIqp8^hzUH)~=j7rF3_t$j^sUuJZC#z8kf4q5YgAxPiPr{O0?z zH0R8GJipiH3bzGNYA-g2F6;HYre8J3tc}d06(9rf%mz1{en1e$_? z8)OwKg-&I_Y7k573n<`bkiy6)X+c5fV>P_8CaC492jIu3uY@F75mN&Ei{0Hq*Rg6* z!Q|}!Z!8o)tYDZ0PH{5h7CYh*z zNP<0_Ajt_r32Usy>=K6n+AyqL39s&Q!C<3ga@>ypXj7%M^SuYjX1*#wkc@c*yoazR^?X{es|5v$W*o|B2`bPem7;)BH>qf}3p8HFC_4kQT_v@B#-F=JhOdc> zf2O-av7#3x0cV9YYQ~`w4z{OoVd#L%BCS3)D^BwxAyuR_0Ag|7Vr&u_8qw%#EQ8|u zG@2jeYG3DA9i=ivL^)2CCeFj0Af$1R>W#-k9<$sl_0H4R@@xU^qk9)~uL@^a-<~Vn zkiNqdVr4r&8csRO<_aLEV!RAmsREh;1wa58Ey_OIJFH?skbyqIX-4JOHE^9YUdosO zO4M!&13ZXUWvUZ6XFMcY@1}igy0NFn&1|CGw9O57!&LncOdwVsBnmeLsyFRyuoQTN zXjQa;U&eM>mTF}JFcpSEl@MCti&M)Az`M8viP6NZ-V4ewd{B}R4!*3Vg=W|YrqPN~ z{)5P)B|hkiyV>N_Xqf?ZhaaOAD467-`69{~&WctGY=*(@%O*%vaL#2wIz?Rk2ZEkv z)Py7lO3ZnT{zuS5Nh?I|@3L3T{54 z?CKs$;b*95cRQz`N?5LW32K{h-X!V!KWt~VaF^gbFf8kKD)oqUs!ZzSREU3O1%Y$3 zkkl*+r#jRxQft^)f4<%-pn1#%+Cx$!7WobO2xSo|;IX2TNHytZOu{o{KDUQyBjT2` z#j^;E-Ccu>NR13wxJ1)L6x~!Gi=Ys;Ulop1-_XoaZD_7GzKe>cY}A$5O0+Ci+eI~Z zQ9|OYlu8s7!XCOq!Xk5l45Hs#mDMNr(2eslv?q6=;FV|sTEDK#6>l!j{>T&t5g3-g&05@d*Nq_q!8R5 z3hJTIajbxmxV$7KMM3i{V4i^=MUZvv7DF$XYh3?gRwW@ASV{?9@H|yD$+PWJI~D6U zhZSoCDm25W{2NfmD&BrPza6mhaml1^ifWQ|%n$NZGvMPZ(>`^wmq`z>K*NZfMKGLl zSeCO7)0*cgO-r@2pqpAaOb?P_T6~Bxer`F%Y-_W&Nu|nMJf?YGv?g@qcm~O!K9Vw+ zz@_5L!Jdc>Ge-ONViBH1~Q+h0w;P!2P^3Lwwo49`5@HIn1al{9Y=s|y|##Ko-> zd@UN9oaR=T%nWkltL!yiMFO1Jf)j;mkhfz&pC+bvq&`kXJ89*9%N%p-p!}XEruWyq zx&!(jrClCy3(WJJRUiF88D$YUVoLY{-SS=jSP%wzxyK zVpck(t;Ioht!vbEik+sYRiDtWipA8cz50~2&g!Pm(IJ#Sj%jT;Mi=mc=Z*VDBe3Zr zH+RnkJw2)?SNSfqjNj`;Yrg7Ry91lI`33zTIU=nJ?Ul!P_JUzDs9Cqo^s!-r7;;yv z;}-utp>J7i4HvO;Ak&E>045ae#yL-Z zn{a8ax0pM1`tQr{Qr-&9W_Smk%jDelOx=ppM6QO}3?tRydR?Cv5 zYZJK$GE|NtpK)hh;LZNYnC&siX-^l=kR%z&lMCpY1reV&10QCyG{xxdp@tlM({iYI z&YQ!hypu8QFJ{&xp1L%lsY*$yjxGUMRQq@4rhAeo_Y%$@@72m!xZ5)7|Lv zUz1D6uDh*YW>ha5_r8+2^P}W#x%Fh+QMojj(Qv!rP;uG}KVk!Zq(M`&ecS^q1Mnko zcAde5(F(_%hBq^w8XH>Pm~wylp^Svc#oEPxd+Zm*+i$&1KlyHkA8{ z-n2Z^s2TDMd2VNRRD4H}{AKbdzdWCL_fYJ+&yD}&-2=7Xra%4hukPdLpxC^_$~&H5WhCz(EgP zTKYvIa3ez%%f=7C{qW)91-Fi6)@=G#bMr;p_8D$u`B3fWhFfoC-Y6WueX%j~)^l_I zJ@({tx8}V2()hG_*Zp$cb<2(81R{u}5U3(WFU+M&677}PYzE`Wy%qo-H)TK(u!2bI zv#_fF>$MHF{?QGvTZRL61031eO=S{@cBM&)DXeA)Fd0k{N@^JbA$=$#%rJ;vtV~lngQQpL8>du2Ogeoxz~l z!eBxz4Q|kkZpe1P#=w-M!%nbtZ^p;hf6tZV@?1ANgTqj=z8i)hJWUZW-y7Xs0UBAVSiE^_Ao4D%%rM?WIN0E@oNFAtv z5~mp!gsSs#3aRae-ZV&fa)YrBC>mp>1`T@0MPj}D1$P_QvcsgBCqayVuX(uF)luEU z`&d_)mr3Z~5qio0FE7ekFQd?sLr942m6|NXvf_dD3=Rr(Y&HW4XheaESdZNlW%S_{ z6i_R^`Aj{->3!MJ^c_9d@*tWorv$tDRx-r>UR;bwF!h~Q%Zo2fnn9n2$jG*)v?C4AIV2!rSFDBEXO2~wZki=rPK zmVx?_6>d4fG7_ys3~i~Z^fRnKs4zCLYP;G_tJy-0n?i*;8_pXNNEl_XVTR*rj$!B$ z%0NdYb<(mzXc2~4uUY1jNcqU#aOy$+pxe#E=L&*OHhlgkfmTJKfWvD7@SvDUQC&kR zN}#SD1}uajA9%MY_-70$ei@56T5T4h6wb??)~OWYqj>-X8r4=f8w#U*yp0tYfsYog z!WE*1;toc$D2}iS$5oyl=0MQZwT6_yC!DHT7St(vB16^NjF8uqq$<9ir;LBV4k9#k zP|}eV$lgacP)?_rT`d44(wLkD@B%-Qv7 zdz3(s9jQFKR2Vl4O5BVvPfFhT+r0T;q0ilDk8Itubs)qrO4z#`kxU! z(W^>uC-nbCsyXUMoItyEQDRZiu36C#iB&>3sgAM`nWYpwtW)V!rm(aZu4O(N-f1ct z(;{>*l+j9~-W|8<#9mjsE6>~3ObdaIwrBj^C9KgMAgrC9h+~_uLuFT*Y^YZ6v{6;E z#i%cZgQD;SW`NZ>tjrb*`<}K*NzFGzKZ7WX1_vlg)5+*SdvkE>>1$Q$%))WwN0XIIMqQVH=WY9sNo4{uddMJe=pMx8pBceS@ zbnh8E_EnSWyKOlR>>Mm?(L^g_DRmD6BX0?31pkpTUd1%2*aDz16iFPs^#ddi=miCF zDSLjlAcooo^Kphj!s2v#g8D)m9b7WVj#%+*ZaL*+s%*%yfT7dbxvY~?>SzEv9-D@v zSqLJk`0s+WgiF7<)R?KP4tH4n9__j>uy1{{(@ zr6DxvZB<;A(!h=o70>G!AA%OXR;3M8+ME3jEp(3p48_EH8M8#hY0e?1$Dz^P zYrV!k>S66%UmT=ZW>CFM9H!O0 z+YD!vrq&8u{Id@QO;n$FY!gXv?_tKi*vLGkou^qqmr_gWObw=qWTSQ~v#sH6>wAo@ z&N7k3E@l&UEuSra@ysYW!6S|NHbJh z?x~=M77Ud}s1-0g<%`~&Y>)Jsb=}qXyG}~pFJB|M+%hh4c=)A>d1Rw$Y1&VJ|I@_J?$11s7pi?V!eMNI5A(kHVO<5v~e|?TT?!E-g>(t<*vtizB8hqXYlU-{k&JCO1j^8;Bb(u920V1+Znk|q5o$x&c=mfWZucqJNv)<;>2$GfPCra+w!xoC9q2^$#iC^C6gNB z>dmR|J?$WH|C1@djI#8 z_je8a1vfbvT;H&wzFQqW2EkV*sP7A5myZz?`4wnPwwA5^PhzI5TqxFI2F;9#V@Ay6 z2QicX1E|%%U!YQ#q2piH4;}wakAov4AZPVI-j_kZzmYPt9R6yvKPRqG3e&uq4hGh6 zEXQgtLG!VT^Yc)2Lm!_=L>fXfzYKshxz0aK2MIe5efR4z8Egt&=zmsr{lQIKcYb%- z5SQt-+NYHz5`q0zyJGFwV9CbV7d+m#S{cchSh5WqEew`0HgF}z!oXddoF%a~hC&O* zC7Djr@WY*Craw}*3Hhsu4YcE4J5w-$W~MVq$R*Rx+_gnErD-xf?z1wP(7XO|eIu>3 z`}Y0Vw{Q1-zTfxxejh%dFM*LF2GzmTFW3!6@|k7z2%Ph}F3SUpxFv z0j|S2R+3ukN!3)W1Z!i`65^6S8zF>P9Wmo`7PF=9R{3ZNU6=POvx>xc%C#}KY>89_ zL5MBA=3bPNplyE?nr#W@tFSPk@k=UbSj%MFo5SF&n{`lVYCY*;ey@_SPpb0qIa|fV z@`yPy_slkDOqDS7aTqJXQwUQPmxtFo^u30h7qS>x%X5HZQ~?U-Y@-AT?5D!Vm!2Oz zsY355tdv3AlW4gxMdLnGWXHfgZ~(Vdqq!jfz#FZ`yDTDJ&O}Rsp9_laaGb%Gmd1|y zgxIjiR!k^R8vbDJ;c6MS!TSijo>EwI4$v-(>ym0@!lGlj1dYPIk7SN3ZD8u`A_3lo zF>G2V)TrcDTN72L$&oJev{0iC^HpT6#U+v(D&5OXsQ)zH=UQAUCRD6+$1}n(Jt0&j z85+ss$gkmgO=10=#5#@s5#lIVQAkY7fCH5Ff(a%3yv10uMFL zDYBK6fJ@F|5y4RzOIS=RsVNnd54i%+$F(?`iIhxmXqlBkL(s06t!B!Wpg=y-V>6(1 zdu#o14(Jl*2myGxQ5&KVPB>O6Sp=reoYXcO5$ILImz%s|OlJTpa~^q&;P zgjkNeVhQMAx3{D?ht?w)f=@Tlk%IiYCaFUg<>a_2O8BjTbQIHaEJiE}V{ym;-aO!W ziJTR|l9A00Q24?B(eeXQE<}7}nM8c0)O|pUo&r(7Z8CI9ek4a>(JXf;%w?Sc0+WE< zh+H3|jmnf{%Q*-@uFvH5QSq=4RZU2MtZcpo&sWIBQ_E#a5FvHCP012F&EkT};VmU+ zl!x#$L9d!Q$(k+&_B!QJxGgN!rTk2^Ap&q#LeW=Po=umuZzwtKzs767V+F-1!($1nlJV z1fowC?+7PW0bJL)lPYH(wo0CRB)W0X+eueHv`pPSR$qFWuA}QirIXSQx{|=R7~Cee z-68|hVCaKn;etdOZ?Ws1z_pP1W{`|w><{iIU3E`KnU`!NEy;}=zjD~kw{=RMEkg&| zY_kv#R99XQyj>gX^kBx^)KlHE^J3+jFP&*U(fhlWw>7mvrHbMrSoeOXDH#8OJ48G` z)vj6@sfST5v?e4)2Lm00iD;z5@@-J7N!(0o@vyvHS+714vX-Zrv9@l9&|-N?{I)$_ z5d$YJx9bU2Z}A9p>R)zjp&_<$k%u=4 zBcxIi>o3X$U+k-7J=Orq{rNFt0Z0Ds24P?Oxo|6^b}TqqwKMNot%^0%LCgxQ=MN? z4s7o2y`!pDf9h6bvL4Fdc6n=8JDDTl{?xS_uRQhVKi*hX!RyNE4HT#THrv3JGm^_ zm)`4c4$aq=_6H`twt*h6dEv_l=+Jlm7=p4IK0g;!r2YW%a?Jwyxc)n9aP zPCk`caWL4iE}l^j*3Z?;?E|lFzRR@Do!d(LQ?r}?)U@=4k3W9q^5ZJoI$yo)#@m_9 zV^67dmVa*d`q$3CnE(3to9w2QS@~hCwYqn2Z(q89&zGP0sI~Qj*^e^)|9$X}bb!Sy-)=C9iM%@bs&F zjm=WQ9dK%`9m*Wa3_0jq9aQhs*MrjnD0}cPhjwm5qW(yszJB|Sxve+uZTa|SXLioh z^vmS_RYTSH_Ev3B74Jy%#kts?<992jhc?YwUpjuV@=kBC-1&_Vj#dcyE3Gz@HAm9r8kwyW!9aH|GEH&QMc> z+bAq;{MGz#GWRacT46OA|!99%c7;A2+R4?jGP~=X*x& zmqzBs_v`JAMPEtq+FF}>{ZrD5cO@|M2SC0_{E^N~^h-w^Qq6tOO2xB3rO4F&24ERD z`9ZJ@Rq>96FX%B2SoV&5N{?AH^5hlxur{A_zUiNRtM|Ewj^%TCAmDOAsR1iSs1)>3 zP-2MVKjPS5AD<~6KdYWq??;&45r3T?tIXT^=ajFRdaPAw%{#F84*lUdj|6=YmneVBYP_{`O+RhHfaBwU)6|5;F)p8i|5R{l z1j7<)+!0_1hhO6iTcak!W#%{oDy1A}bM*GFf9q7s0=QeKp@FQpavqI_AuP`4?JBVC zZRVg^rnX`l50l46Btq|Ip-!_~KodnJ;Lhi*>oP?HF4PG5b#6k+dIh-*R z`aF&l1J?gTa8eb2f&GeATiC^R>d=K^Ar2HSR>%WqtWK=tY^lN9C=cC1D0UI#^TwkO zqcX))iQ_LsfewB(1!SWJpd5&Ah9FH{04i=`B!(V{4M zs^c&~S(saYs*Jq{$7&xUHW!J*q0JnxQd@*G%NR* z+}Fag4SxZ1={o@K2=NqLXis%>JSJ)3&iN6Q?-YVqDWwH7b93LRYmVayOx%c&41Myb- cmkD_bP*T79DI-rpDg2YJIv-T(jq literal 0 HcmV?d00001 diff --git a/fpga/rbf/rev2/multi_4rx_0tx.rbf b/fpga/rbf/rev2/multi_4rx_0tx.rbf new file mode 100755 index 0000000000000000000000000000000000000000..b7e4eb39305c1b958e5cf55a5f8b32ec37f36a94 GIT binary patch literal 180537 zcmd434O|r0xj#NTnfTl0dT)1Thh@N3c4iODfD0?jiX<^%XLfcO-dtITnwJ(9S4E?) z0=_gaWoH=H5s3mJ#-?ebgcy?A*brm9Y1#myA=bu7jIlPYV$hg0Rap>F5r1b%(xxxB zxA%Vf`+xrX^33eaIcLr}bIzRa^E}^YZ{7OK*NT(3oXCN18IZr-LH;u3fBj3iuSB@- zzUp-gH>_K@eo}5&vS8_w1(~ybOk&?B8$T+-WB%nIT*Ia?D4WvC{P|PPBogot+`tR} z=|i9(v6=b*YvOavFwdK@hM}yiZDzP@1Ai;bm^FG(hydV13!wD!lVT(g@Omai^rwBS zwl+gMSy0BX%avU{oRd>CDIC$CQIUbojqVCV4u|Wu0w}$%NikYo?ai4K(VrP#78GIG zZPCiv0#_F-2rh|=#INi2b&dY2pyHv~vr8w%WVzV`@}pN9*!Ww(?(4(9ww1ddxmqg_|FI zkbTdjnEVOFS2c=`fp3n4zk37!R|So(TUWX;DsrMj>dVgl|Fod!#SWsAm+X%AMEA(b zmB$WGiph?d9ORRuBRaZl*1r|zsgno)se&da(_}$=#*ZA?J1PED~Wwj|7BuOtF?d&}hpMSphm8eMjy6^v@qrOp}NLt$Eb5SvQCyDW{F8$Ph zrl9ETu0<#3xEy^7wMJ4>_D+h)pZ|P8(YkzdFilqGe^aA>s-UBTM&q%`KC(`nJ7-Iq z6#tt(`X3flKJ4)<>p5hcI@$Gqw~hb962F{z*Z1r>c4Sga&b-Nm=wDXQKQj*gy4Sn^ zZjB~ag|EB$uO0|rj?AQ^uycA2J#_TY$4AE+8jkfs@lNldkB!3|r^ljA`c>DFJxBli zu}&O=k;d2`tJZjsaGGd$^n18Q>B;B1�)IOsTCBx->dk(*qacjOjxmuwS zcJCM|-5;PPi6lk;m=87f!}z+T+vJX z>Gja`Z-2E9ulhGH4=MXP%U3;C`duuV7FPMoOGYaRUtexiMEbfdaCiGNL}2jBPIy_JM8YY~!K#$82&qRq2}#GH2#7W) zj0#^?k^01_Aq!w_J2@SOaAhn3E8YbV5*{#VDWt3dhm|A>P?LssM(0QvMFbitAW-D( z!Kv^{CU6^kAk6Y1vpA>54ioV33J5L0ttr|G(e^vBSpp)7aIZ7ih3E(k8;>D{1j0wZ zxQ?b#1V=<1_TKwIL-HIl3s6XigO`i;1}`Xp7vL_q^2|+G#$UW(TmIgw;O?9BSsbI@ zXX*$I9D8wSJ>R=j|4 zRtcjxMC76u;RM7P0EhuKVF(RdBMK$3jUnyiNdzh5VN11AXQsJ9V{#M|49W9O%*diU zDG$7ZiL8XB(`GaUL%=M~g*g=;7lVe-MhP|zha&>s5FtzmSS_L5C0sE^5RRNrP-YH8 zLa-zCQ;K-R)kkQJJvagTJr_mfM$UvHPMlAdo!D6xML1bTSOj6jWQ9V<)Ax{0jrq7w zL0O|Bw}24pM0t2a9>QR&0V%@!jaV2h;_sHPsBuo>=jsUD}yuw99~>6XE6e9LQ^Odc1tdUH3Fpb z;A{UD!Ylxm1m?Do$WG!4O$z!c%uYF^sAxrqQSC|`qm^SY0f#d`Sxdv-&V@IwjJIHB z)Pn7DlIXTkFD;;Y)YM7}l{iv{Tj2er;h+ROjx1HQ3{K++L&E!z1>{+YIw1f@J>ujf z)U2gt&?dunygX-d`b=0aql4hQtfWD#>2AG%A!mgH`U3>UAjYYjON$^b2VAz0E3}eK zp-891E{Bt_td;5UzJ+Y%GiDG^&kX#KUI`+MY{bFzHr)6N}8f)8br9>=M&BWHBCwGnLajgtH)> z+hIAuWmOVnQc4Gf9SWOOf?cr!~wG z;7wLLyV4FBMO={3`bZs<&&p*ienpb!@C8|ni9k~&n$0B?^oqc^NGl;Ev_p3sNJIhUQ)wGhemS$qwJYvchFq=_s23vVHcY7k6iwYKHBaJyR zUH2|p)e%7JWeKnd$d>9|7@`)a)Q)=frDqhCelC9A!Qzb9xn5%K>&2Bz2Fm*%xn<}| zin9!q4=vsZ}`|A;9qGg zC697x?u5MkiqByfq}zgQrSeJEMsqbCsMuP2XJukw#Vaqak`n!gU)lXQ-1uHe^0Gc~ zmcJfma@eiiFCJd{Ma8fxCs%@jNA9_1#BB5+M-uncOlB6Yh|Mxa5)~W2u~v>G*1>J-r|b?U_Yt7L)43y7n0S3d zxuV+G%C?bJFJCDp5*&xBs;)-2A35GwczuIndw9^l|Ka3iuIy!l{>++~5rg0B8?OST zsf-P|=Tf`MuOH-Pe~XNh=cOowi&DO6$3SpkH4DcPg za97YbW^SutE9*YVdS=rcHX$pbJpaAxNzp8qp4lDbH$FeIYxnm~8=@`Yn?de%3*25m zoZ{Uxte*SqvHEjtL}^|1LH9k)31E;bw&BCDvS03vY*4Znj(6-Yv@dfdxonGv+*Lt* z#89=+ld#|oNC+u;NciFiFt0rOfokXlhos*-& zRO2vJm$|F|ze#l$O!a(M|0iAkuC0qdQnoT&!XBc!>yCs=RHeUR= z#&tvgWq6+#AA{MV;!sNI9@wi3FYR9MU%4XTFzm%_D0=qt<0(Baji)HdKYnFZf8h>? zzK56w3hl)M<>_47_KfpJy$C@;9V%+xSI9TH6xo znQ(HYB3CNsl;{^G<91JZ#r@1mvl{@_!iI!biCghC)Dy9_b!g3ie~UQulI9K z@}Q;Nf%L`*n)zgfFyB9)#sOy~NRH%j0*gs!5I58|cv(cjLh9DKZ->%-h%;PgAOV3+ zQ!)e@)d4BMafB6%hs&S9S!BE1$;kq#!$cR4A-FILz%{~&!G)7UmaAH1ma_8B4OT5g z1}vi@i73Y}7BCJ`7i$pFq*k_S1T{nr2=Jkas1Tn}aD7n~9oD52vRI^1bp{j(3HQ=9 z-_cT}3IQ3gXq-F=7hod_7eyV)01~1$lZHb|Oqvo(LMX{vLaI(wS1tgH7Eu}jge7%C z_M7ybnvj-uHq-FjiNr}Pf+L7kl9U= z;M6u~v*%8Ywj%`bvEKtRj9I zaT7!m1*jAM-h*PRBE!2NG%4^pjKJb?nCP4Wd!`d&I07#35aKn4buc|yplxzui4ZAA z(XEy?Q3D6=O)7w>&50JX@NTg&gg|2)4>2x{%rYPW7I5=vWIpFa1qoi?uh-VW0%KZI zAga~DQ4vz9^*^72AfZ?Z%2~7tA{zh;4-va2!8js9oFc;xz@vc0N5GU?SPsH9%zhGX z5QsVuBSS%n=;194VR8s=AkxukO&o_p#OKuNZkKRHf+_}LrN-(qU{W}?ptkVU%Ly|i zaq%MdrM?68Q>Z36wTJ{2sj{$B+qrirdIQe#m?|I^5Z#9*Xb@Ai+(rpR^kPUz1G|TX z`6LoiT69{0EmL$X6}ft!6Pugvv(EOV89YL|FU@Z5FaLQgW|le(1D<9f!4pw@Y)G-dZgD1Z+{3Q3k9-MFIqM5gIi9}eqOJQgw>#RCL4cbOKahlr?|Q7P&AU;p4K1or+mAi+~mlf|Ln>nJ|;0rFD#=H4=)dpJMfq zz$tSmP-!Jj8`2t4E}Ax=gvu49^V7vf4QKZAvxr$lh!C0p%OM_=%A*)eB|};jj_VM_ zJkc)QEKdKNppK|@{3(_YYJJLPUz=2CR~08Lm42duR`!14=6VQ$v1$aX#zJZsk+jrd zp{dkX7c|`mG{uDKv9i1*h;oTe&Nzu zu7hgr{KtCZhip`ppU!@kINE+*yT_-1SQh+{JubB=o75NihK(tL zs-?LXdfQj2&mH6;_)P$?Tjvq#yyiJMGo>V#%$RSpx%L~H1DsgF8Ap2TE=QM%h4^>1 z5_i!jmh+67c0RWmxEaY#vJm_==-;Knm6A3=-8i!c)&W8bON+YKce=itmJpi%ALQc`VHSB2p7$?R@WvPd+fznuHF4UEv@yF%~JA4g7fni3-~T>zQZcW1bnpX zS%`u0yEf{%wakD-!F7xEZ=!ax(WgqRXszINDkVEoQg$%huFa7bmpTfIt7f~cUB!1N zMv>zr61K$!_%w*-AR>U+cIgM;1IHm~M7zG-?#()%b<=N%^~m2u!pvVH;Yx*@M8c64 z{njmSbU)p_?Xy93%P-iEx_3{s?~Q_C&mWk?kuV=!Y8=F!- zIEflue-4G+gFL9-RyLqi&*;u7)wD)w`Tz%wR!g#O2Xc)+vxv3_;CdQY;=;Q`LT)A%OibCHy2$ZJ*FZ(Ljq1fHK9o#EQ#sHt?O7K9090kg!N#(TR0L0UJ zHYY2tQfa24dc9-?{z^DKO-WBUe2N%mmBfDj0Ym%p9ZxZM4r&E4 z{Ax1>%>yjLInxgHu zsHp1H7ODvk-mz5?l5jqR6{skLTxMLD2G<|3W>+~b5;(L<;TSR<7_|aUBD`fs6Virr z$V<^BhSSWVN$1q$9V()z?&In93-kHIC~#uJblCzIWIyl5Sa{uhk#_R37+_f)ro$+R zqe2v>f`=KU`st_QQl_NkfYgh=51t;o<*4U7y zgbwi}nv(@BNdiyuB5KfpIDstZomkxhG6bMyuLUAQNr;s{5Ya>om?*4}F5tVFMv`Wn z8dC|dYRx2%(j2q`hfsPujyZ9`C+PS)oMJcZo8)GIxWzaH5L1D>jdyqRh*SvPegO+B zBm@m~c#19nI2{Bx9PK1A6&mB%A|Yyxq!9tS5*CTN%^FdH#z`ZODbOm3%opPpsbr`3 zlOIY*K{o`U8gUlsMBRj6gy53v1V}30NJ9H4#D`_9K|>;;E`aDLl&pogHH(43L5E45 zAQ44uxHbfEbQVt=>|n9Rsev{{r^2I@frEBa0M~y*qrQ=x&xN$p4SUjwkF}c}gj)k7 zB!DrB}2$bOw0a}d18qN(>3X;^(8XTb#rSBg={6V!B?F>*r;=P){?O z8M)iG`;~_N=6#FSivB$ffoGAeyyp~Lb%)#Yw(wG&gO!w74D6GSjvV zhH)?pPe+71HOW#tZkFRZ$ZxqNG*@XBaIOs6<2C7m@`M7h>#3|o(sPd7KJKEm$kBZgrgNAa#n^~oH-yM$WA$))j;GfqalrnZG)o|Pf@jv zA`;rpNC4T%B6y5e*(s}{j@O1NUqg}5E~QK~37XcZb}zEfbzovK1X_k$Wg7Ms!Xkk6 zpj-JePzFSPryRn1Ll_H<+ep2j?d+}X=I(QlX4P zLYgDj9c@VbxSkMBwLYNysOx>eMFbL1d0ZR0et@fR$vM1Th#!F({!*@>C$OX^kWf&? zRUgFk>_hG&V;dCWVPg4JON(oWc*Fe{p5>Z&KE7ErjPW$_ zYpB%ld?nYXL^w~Z*qf$0dlhjrkasYMH4<9@3VqAm^OSq^seReAE6YFi_2=EvzvIoV zHjjYJgmuHDC!umU;COsaVM(gs^;~~)j#s=Ye^lyOyV!DFJ~$0*@GQ#<=HH6>&`S>{ z8iM)P-G{tI!c{Us_rhpRfi3^)xj!Cj zc_=HEx8+@T|7zR5;fkE>c_Z(o9BV0g=DEJ>PcX}A9J;T@KUy8WSMlZ!8Zt{a+_bm+Qb@RSjG%KX!HM*1&FQwH(e-`X zwheVr*)3Q3zHJRde>A@R>@fdu=>_OMQIkhj9b4VA?Y-e&z57%DyOpUQ-Z@s!-mExw zZmivUnXS${{W1jipB~BnjWAdoTU!0$x(y2=#d;ffdR=hc^$oS&{J~}Wy}1z1R~u>; z43#XcSvvxHY8FP^OTKg7>l)wiVrgOIorT^-6FIVe{NUmsHR0Y}I_KIxLyh-_VZYaW z?W&|>@so)^d~s{v^@4{lpB#U9zT^jNN;APse-1_3fA29)ns5b4)$`{ktpf z+3pPt3JbI8VIK}{-u!)D|Hy_-H96z^_Ajq;WIBRXuenDJ%WAk~3ranQ1BHRrn`*p~ zuFRV69zB@xSXboW!G|W6HLrf>(Yu1nZ#bIo-Tv_1rH|h*3+#?>Edgz zSN{CYx1YQDz;B;Ref@`nzx~bL*Ka-k-gA+$&p{Ak`f%FeZAT*S{NdL>Iri+xl7i<> z_OR)X5uB`nnA2octqK0qRu->2VufcbJ&ztpPRxoSR&^z{N4zG2{ zk6$vx8ZH^8g>BH_Er0)zP5-sYJ3VUh{$wiz^Pfg7-dh=HBkzKus(<+TzX9`;IR3u_ z^WWdK-v8LHZ=m_8)%)4*D4Kuwv|*x}1H5$?$Z`$v>3mA^3$jmt0SB#IN-NhM{}yqM zt!rI04b;ENwNBc(+v+pgE-^N5~*CjI@X% z@VahXIwbihnx*Mk+}*s67f#UZ;jjelgY@Q-;?nc~-sz)57(%~{`e~$*hyK>|FgA^X z&<;4s0lnI#xNu2RprB3-LB*=1LdA&x{xh1;I_=y%8qo=LZEQiM3ba6XsV(#V%9hQy0hH$+lS2D$-`YefsP&^S0GwA?{!+VJWM&r2B!Xvc~z$S?}r-Wq) zKN*Ma9I2$+Q#3lw{n8HHge}K0g9gdOv9myyGj_^8BVBrNDh}($i{!U2UxL;JdAT@xar;|F(JO(mZP<%eY(N5G(hEeD` zHxacCHiV-{ag*#(D*+sp+)^#VBcWyc4zg!}h(LaVlYutti3raFn{d8vUT8AwbK+6n{_ry$%G2r`SGFH5#JzdZ{ekg0*IgbOW(cZPLK z1O||wHDz&>6A1V|CW}nLoD5V(2v*<|R868*C?jWCI7FhMH$|t_6#+$eM?>x7bMmtzCiFM%%0Xlm^AsEmz2RixsGT9xoxC=NAqIy z39f>)iQi(TL;ukoDa0;@&I&O?y9zoQ)t|}Qmscn$;*M4&g$F=I8(LMXquyg@$M3oM z5cZHjbaROsTFlinLUs_@Dwt65EP;_CF!lQKp)EdaCxL4*t9ONW5j2(TU}tg-unEu8 zZxsNFs#X|msfD$)3l?h$Zz8mtu`7?XfPBj=hSz2CD=WD4xVccRV|DO3Arp44jHco= z)1W(siW}fGQNlr#Da8Wou&^lp1zy}7cuM6rD_UWiBHDyjfuF~@T7-G!yc5k)=CLMa z&ZrKxTTx;SNpv%Q>s_)nYtwW&xt%nv_=qD6J)eX0%I$H_O4P64s8Ve(MN|;n3ji&)6%2yPg zuE!4px{Q6FPfw?4LMWgQ7J0h4UUxb-Z4tMfuEujOIy9TU_rhbehK77DW*4rz1L3+m znR;xdxbmJ~nrPG{D{?Cw`l=a#J8&eWU4j#k>W!CC#MB0XCVcKfRlq4o8WxUylcU6DqfTh)9;fSD?00VH(*Sdn!?JMYLZk2&R8JJ zJ9!Ez*vGO2s&XM2t<`SksR0oa88O{>&UY@OoH0%@UZ8!B_u3(Vtvp_$0j#1ZdgQalER8@h2v5y^4K$i_P8IRJpj_{tgrE1;d#xK zs@|-P7YAIKLHTW!fr_ zoBx;?S-Qz&UC-)9-Wke)3LNhPA!@MaU-PCMnz9ITH0u|6UB zkBL>4qx*=vZ%jWtqqw+Z{~y-fjN$WL!D$y(jc|fZ7+%t!{rFH{Np{0cpg*%la7%%MZtRH(vjwyJqItoF{|e zCJ~qpV)fp@c=P&umS!{8c4q`r2YtR8i2vsVXS~{THFjM>(ltkO{&ZW>(AvHP^R?HD z^M8}=9^w26hGF*y3Av-hy6>NUu;%iQt`@KT?&*YIk4B1aJu%D&6Lw!@HujvV99iDI zx;KB`<%h;yE9b3TEgl2o-2t0&q4hvp$JXIIzVL|cvCPXq`M$%p;gj`mnAa^F^671k zj~0&>zZgs!dtF~+`NQ(-`{khR+J)B=R!uy4q4bgArF4QYA`N6$jjw;+_ITvr!bh*w z%>G{AU|&^s@-5#R-Z|HH6OaCUj{Ay`1;bN*Vg;JLWDc-T{gaMD0|h& z4cXH6>%PtzJ+*Fe^zJLF! zOxwd_`)h-b-Z(s(y?o-ykvRtMf|Kr(+{hBiTN61v$CmbS#(1ATX>RtaoBGl04cDss zO7n-d@3)z+fm-jhp_6Z9bGM#cH%AY%6-Bt})dx#UM}NO=ukEJqgXey9^+@jCU)-Fw zf7^@WE4SRLkA!#Im@!cM=!(lLFAZG!cx07$%+q)D!oY>y<6nTi1(DCYZEa(!xR)J1 z(lhVUi})IQ4+QFcq=PVKW*YZ{i+8@U9&;>HEWKeJ`lO|oUGzGBO?K^)#8MCme* zFaFp!Ot|lbj(`D3nelt0Y#DDHWXt4dd9$8&K-P;p>I?Avl^Y=8AGiUaF950zhoY*( z`H?^Q0c=q}05t30b!aa?HmwT^qW`lfS>`LA%%90JN(v;)eBZzF^C(%SAxf4x`X{o? zOF!Q8*~AtF=s$)JwPr^#R2{gq7Cj`(6vcXGaF&56SBB);ysMnzf;BUPEr-%VQ z`aNy<$_+q3A3!%W@Hc$Lf(g@UO5)g;WEm>Lw)rgyS0nd zCfq}IZhD^}HN_X1wRMb!1A4le2|x}Gv_Q4=#GHbQZxfYQDRm10C+Xvn6b8cKrdi?5 z3;2eDJ7~rIJ!y8)8j|i1C^?HyrRM>?NVZb56!t6-Fr>)5!vpQRNa6q+5Fx8tH1)F@ zv1pdk&23>1(dz9fPZb0hl~eO&w^rhmS}auvQ^L`Pf$ zv(d^4s-Uqoln*pYlIjE}3vZA0mhp@5ik%glF2J}ngp*bTOi<%^Ucp^xl;=S~%%$=4 zNP-%ph({&pDq%RJb*IWnA?UCVX?5%(O4qx`^@J93!OQTFBr6bzP-|s|CNvNg7lQQp zct~SZ7!76O{mD=T@tF<*JqB&^uZra?w0_rWorD%CY=cNDedZcM!a6yTEu-q)gp$5g zpAKB%2Cz?HZ({^|d>i*O(xI;pJ9sxFfN?v?tvoM!G)AGPLa<23RY=XxQAKF~l(^Pf zLl4JnwgLtXH84G&>kmpMjS+OwWfW@weLOmiF2v5ifay=;`rnK`2BZt@??${rvSZNHZCGjj|*~6FsUSws8 zVT+{}JXA!Q6r9HhG30LI8abo_=OIPLg{dr}Ky)7eEvK%6Pvhiac{GEW7N=9SU2 zd#7ARIF%NLzB2SxEwPaLlLpIKN_$nH)-*sQv{tR8AGJG_71BEN}zI;%DK~(WKAwl7Lh!S#Cq@;hVB5$XCz$# zRdezjtrcc+R`$GkIYht?u8cDZzoB{w)171-y17|l6Ukm#Cf(FNu8qY3mm+klQXM~d z?}$m0i$M~(jIy+BLQUz8axQO&45{ThS>co^Yh>jh$qPis;CP43Afkeh zDMSg3n<>yHt5dAA&B>5%E7LNnmY_z0Ebirt{j4t^1_0ca zlWXt^vKt&PAy4&SV(lk}`w9*}Rshy3?qNlcJk-sB0><0351dd=2j{nKXtw900}$_@D!iG zK;tf5?&<>j2bhi)wS5bZl*gqLRHxJ^J0%T8}SxTRJS2N<>!DV;;(H8*{*)7BN;e&Up0c-85KlU&H7si-Iso}HL)Z2h z;QcyIYVS+AxKgPsDCeKx-?t7cqfh=j0$FM%En@u^@0lVXTtT~%CO~^cZvh&83$mvT z(0O5u&3((Ir3sp(RoaOnatPgw@$k7c6+zfFr~f@yliy^*!k7niDU``CQjJ8t0-v24 z$kSoiJdFyypIV_)&|!jJ0PW&@!3o{UBF3qb3r#^86TgxOXUTl|7kAai9S`isV@}c} zG{Qv^Gj06IrLQvA42D!Dxbj+S^Wy)M?>4aR{`C(e2I&oC*J5{sIh@#6F7}o0S~SB@ zNbJWhfku1%C@EKb2jqPrbaTJH^SfLjzPGM7ZiX?l!oPb_o4#^SIa69rerwxNxrOC7 zza0Ka`4&%5F)TW_MMttAzf{FPWdyp z*DDKvoWsU104bm6wbNeV9Pw!2Q@(s z>o7PR6~(PW?yLBZG7EM%8hUZ{r(Hs)hY5QGu&Bpv*p(8?zsocyamKsY@ATFl7NwNo z`_mmk|LC&Vpm03nI1>QDm64>R;KR3)J_;@$N!lHpdE-;KH?jLd&^z{GqL*(g_j<-& z%M3nxb@!(=OV=*0lq2%NIbZ__u88dKE3LX|AWB`YwcJ>8-iwb~mX+p@Mk>AQN6P)* z8St(iIk{otrJD0qRb!_g*!H9G2P@y+G&pi^aAF)>{%aw+HXdlU0kAL|)DlDF;Ik6R76}Tw0PYh zZ3(WAd@2Nshc`Ha`8P6w?ZNA#!@&n{JpD$^@-uNh^rsmcg8-BSSdPn?AN*|cW{4}`X#*m|?X0-Lw8nE$T1iD8anOL^FX2Xr$ znKcjJ0Q-ZBZ+x0r8oaUW^JJ~i z{Psll$gK+#msa1pbltLh)$W>0k#{~nGcvI>c=_b@V8NM_BddOW?BvAi%X=@4T=Hy# z-QT^fVYt5h*w%@(;*1aNH`W2$oY7ccQeqOYt=~_Nc;3iPy0s4~FheZ_bbIWZ6aBe9 zXueem>2RH8cJB_FZ)EO&`0kpT z8;;Rsi%N4w+-~oJf%QY{PSylRZhiOGnTZ*{%}yQuVf@>rx8_~G_34E7lVg`)M1du| z>fAdozdb&&dfVlXhf}Sk@Sh7-K@q%^y>;Z$QrpYFPaBi-_BIS(ytLOa@#xZTDnAC} zc4ceTgUXl8rmK_8ri>{6X-L`F0r^k)klEC1ym$NG@Sjea2mOMYoij<3`ez7Gy?goQ z9>{-s_O3Yv<9aSl$cE|ybd}_e#B%i`b;b2jdVMKm7)5%BSn?927_A=UB%4RZ^jsBy+srfC=MSSAgeL_}2Gu&m8h|Z~M|WqUx0_Zkm$HsqkY|P7zr!&ZvySWxSqPl84t*5;X`w;@ zmrdGwB9M1BYtBkFmMvF#vRnTxYl^~XV+ha&39wi`zf#ret+?jyHiMJ}GJ0fIxRZO8 zhq28u{XE9bQ#LzZ;Pu~%gT57iNbQysx70_84v~$^;-27t1ms%5hs&=IzB;T+LJ^W8 zS-`5uTApB?Bsj;4SO}L7;Hc{kCnTK^dC+LO69@&?=89ZJ6AGh{KcXWkwpd!SE32u;Zmkt?KN`c?r7k?^m$5Jz1U zlyZ4fqZ+sSv&^xO4E6r%fIoN9Xl2crM_kq~INH5fCziF}O}vd+>C)o))n` zlkqk#q?reFn2)JIwk$%3Ezsq{Kx6O}7BYyHPO%X@C1bi?DWeX1AFd68d4Z5PC7ysb z^a5zcXSNDXg|sV9G=(E~DU1KjMei%oxOxMKoKly_9}qdM+kUTYezzT_+cW=$u9n=~Bd-$61EEG9Al>j{Ky(sgSKsWEy2X%!F=1Ln5x1S*IGqiM~q;k&N>SX~^ZGc`=j&SA9riShisrB>#9+6?x1A`%X zkjg)`o*um=LC`n=8o@ZWfLgwDWFEF#mvL79?g7orxq9 zhlaaprJ)4Q=UpnQq%y4A4)n~T+F7)cqG-d)lpKZTH*2#KxK?|khgjt7q308Dy0OqB z*9`IqMV7;Y+>k+#Oog0+LNDo3sEX_A_?AFX!!Cul^te4eoJ-rPo67R6=LA*Bk=l02 zBeD)A?XBZ+LK}3ch-Q4BUWTaGP7*qjzAcQM_1(URH16V4@mWft53j$?r80ikOiC04 z-8q8pA~z96sQ%H37s&w@Wy1`{%N{MGEBENoL_sbAzkPCz&_&F^$?Z*K<_n53ok?C2 zu+!6sR8n6ALuC?+=;Bv-rU+10+Fzdctpd$7JP*hfe5eV~E=^|^AE(Kas;Rdsj9J`M zQ<;JjKCRfuLRCdaOmS8S4`t6LX(E|^o?t1fhDz)v5+!{%nPd)w0g^_|MU3GD^BFI; z($;hW(v2AMc3cmbaD{-I(SifM9sK5I{t)D5xwXi5SVquSFl9Z;d@)7Y(F=!4!lv8c z|3P?sAn`b}gCLB%B+A(a%>whuM!?pulVmuWVSxA!oGIXV@*IAG86k1n*f2oK<;LPH z(j-;JX!XgwYQ+#}a4GE4-6?HhJz_gBV`tyY-h?2~c`HMjqX*6zM9pJSlSYK0%sSF8 zLxmm&UWbe-^ucPO55=X8ffPeT?S+v(J&c__jO>K2N?F0oFc_c7>V^gc z0{UJM)dW~94@2PC2x$ZpWLIsDUlfh27Tp{w!)V_x?)^?^nBi^ooA`&!ar1GeIMF(1 z`zrgA2!RJdgeS}qhA{t!;Y0eGT}~V!Jl3N`s>e`8l+(%mEGb3846kni%V?XpkAZ%( zwr-}tU%cZ5W%i71E$A_&T8%U$ZvisUlSN#ZUBoTzRmzl2O!5x;P_qDC4Hu^i9YPby zU11bTnAiLOw+rvKLvJx>##_KvhAoOunv4I8<{0jr_cNiNZ*PhQhNSjq8HWXCk(hge ztdz>@?q7>j>G%I^?0#;GM=)c|Pr9E_8Uw#BuT{e>tV_$Afl#ijURI3FA*i_N`<*RwLq2J%8Wl1g zj>%3x&Rpd(yh}frJ+!?$yXqI)J7R|jB4NWQQC>>Fv2c(eUlA(umF!0cTNiBoq!hfi zVX&F7QR6OqcFxdt`@_FU@V&D3aVE%)Eq-Ul+QO=utaeQ;?!)n5UaWQ$-%tyr+tru>(lE2gS#*7P>zBmo~ zGWXRFcd6{<@{tDjCosFzQCdD!qEAS?O5oXx2Yneesl&{|?8J!N5lkG+jLA+sVHh%G z1m|4MaL4+l)1{7^uX${hSBZ|`@}WaSw&N<<3lFqUmD)r zKKj%LwuJ+pJ%Q5dFTOuu=vQup9k;9>#$6Rp?R{_b%p+%hv3}*v+?R77>G_;L@t@Z{ z?OyB1Pd6p?Ej{Z0-KN+hNxN-r6R#}&l&y>KM{Fzh)t@5^A{z{=7iOoAEFk90wk5(U z*_Ped@P;>eXyNu>W(Lhe3+y#>2CEj>s;zg2w$=Gn?yHqB*7{`9RiFOu7~AZt84GN)f4=b6zK-DHK_YV% zQ#hw)!}-Nm%}Zwj_!oUZNGtj7Yc;{4QA76hal;39Pmfmmkgf8q;u{NwN|z7qZ;3w* zu0w^V=Ck5IKKiOYvSbNV6Bg`qPkb79`{AoUI2dgD#Se#n>r1G)`N;3yeg|p^-n__e zB^ky^?+KiFWW4+d+wUXZiZgs=;Bo)>yw7gsjlAsHw&%LgyRCg+{l4C@@}tu|f2kvU zBlrQT2sn%*)=$O}Lq6323HemeJ3>J3NdJH39chuH0mpYi-qrKRiN6Vx0AI%vKMVgM z;A=JE=v}R;LN@d<41cLBY!B4n`<0P87!3@4BOvMO!AM2lh5fX=Cgv9EoXM}}e#PIv$FFu<%U+Xy1 z2X=v6yI=tWJPSY7{vOVvz-VouJvSOZ>|^uAX~1>h&w&vzkRl7lL;a0Q1V%;A!DlCE-FZx2-(-Jx#W>uj+a!qVPZHP=-b58kq+p!YYM|6`rwO59k;A zK%UGNFazbvL8ZKamWu!kh-u;&QP?Rb0)K%ay_?`y`De%+zav?i0nV+LrV9Fi$S>cx z(a(}$GkHq<3CKObL$YXrv0PqdnXWdvEmISqt|1ju2c!}?6d`{C|9=6}*b{-pPUdR3 zc%H0uXjmucwNSc1I;DHfQLUg9O9-sK8af4vJW7vT5R=Sn;pw*iZy{P%}< zx3&M))9)N+7?xpKff$YmBhh{;l>vq>l`4F5j$L8G8R ziFhD8mf{!*Bv@3K>?9OL$xxs+_LJivJH;O?|H6RaLXg;j-ikUvpTsCO3YN3}Jj~ov zl-02Oo^>)x60VY`KzC&!K`8Rd{`|)9H_$?hQVP9HjxG|M$&&FL{uh~RF58D zaqluuk&Usln)^rwXG!KEnv18yjxv*3?}R;2B#nm-!?G}#*8@HvOok&2AxQ!zO+B!I z;6Ps#CTG|(Mv}{s2gop)U?N~gJF7tpFsB?S%Mfnv&~k;uLQ5fXA=eIMSG-bQ+DK7I ze4XC~20)K_i1-MYc8EA#s=;IjSYSh5vph@@&k|&j!k9yb;SZE51Pcf~`K$0L0t-%N z{bW?KP|xJxBpXFRP&=c+@cWH9;b9IGp-kdEbT|)4C+Kl%P9{`Mom8jQa%xIM6;2-P zL_8yw@PL_87G;U1Wo%K0dsn3tXoOA@1Wv(`xQvVs3}fVEJdA}#$Rq*s`TT4MPMFl+ z&L|m7Ry2pB;CM71<2iCC5KT1`k`$g60*I(ts4*Iqon%KO5E01CqM{BGv6V8yZ zK(~^aEWVQoYZu68W>q(=o^081pC6G7g-a!*g_9)%KW~ye4a4AgBCHlFqUC<>I$TM} zi|j}`5dcJQOdY*5I!RHaVt_d~pLNhYI3j_M^X3xF0wplP6aw2QOP@Z+XaOaE5PTNx zL3TR8rNX4etq?2_3OR5l2WPwbM2mWc08)K&lP?FHw z<0*+B)QAL;6wlyxEP+@?BuhLAEI_Bnx@wK6KWjX<_H1^KOC4_Mg3lO~FfE-2;q%Rh>y%MjlaX3DNZS~OZ-;<_ zi=9vTwNpj%inmB3u4SNP$J%zBVc(`1pn*CIgH$k_(NLD0^ z1PVJ^k|aMMNF+r9fDK^^TI)ZH$t6K@XeS29UTSP7W z63Ck=K!#!a2kspd)u4FQPxsR&XqSkw zm2T7M?+d;SA7>uiuzeo(Fcqg8Surm!{OD_U@$cdmjm?ASg@h)5=((_F!XBQtbTnc8Qq9Pr z#-}xT%SY__h4{t9;qCNNYCF~s4>QAYPme#ie(8f#hr&0+#6@&J^nByQ8T{$Zg~?;d zMKT7Ka>Kztlbq~-^dontG^7T`@38@=iA@6#5Io61J>xoZz`Gejz5{oO?Q_PanB8J z-SFbtJl&AZf9Znp2Mgl1Pp$vh`tZnOjb9{gPRL6fSpjzQSon(UwRcxwp_$`Yf1&N} z`dx9^!^0^r{!ysA-37%x()!`d+K=;)sj`G@(TE0iAF+MgFN?f|UB zUB~r8WMGGBxMMzaB{SR$2hc82CE2C;9Y88=iY5KNNa4d7Ev-W)EFHk$kjJ z<9quM$nC}x^YD?xc_6p@!4*sMx33*?Fxm7twqj}G)S1A%!r_tOrP`O}~wIXwE>QhMg#yliBaIH8vh@o_5TWL{1+eblIjBdN{A=t^tJ!VlKr1hqxm6o%;~s{Sq&C7 zE5;f}fFXO-wH0Lj2q3V_1c2^pAjTS6hx}(~5i@J6HcV~>qi%x4BhL~*P~1gk{n)N; zd9ya|S-1hDTdNlXG1jlhzfy}5W{unlLd!NlGqeGMLWqOjd_PZnw;Im_R%|c~_^}IT z{n&X;`M>7<9(d`{-JGhpc7Qg310SFb0iX>5=&){Gi(}Ihs5IE$^-mp^WnqQ|$gr3Y z3Op?TRADWKt@=4ubODu$g1jRA@_w_HdjFq#EfAmtJlo*a`{_G>ryI?>vEhYB1rM2u z#*ni%4f*@RRXUdoJp<4Nt*D_@-Q+)2SW(G6;;dc^|7>81kNJYo;oN&`cgHcc#jK}0K8Q&sDcM-IsKwHkq-x(H(95AyEml>fw zvCCX8Hl;jM!Yu=p@0$x=`IIbt zu#+TJqS(n4-&@A9#r^!lXOW5y$but^Fr*_H6jk|BZha)2q=-XhyrnBaS|Lw`#kmxh zBn1JLJdC$X!a4|vMP9@{2#5l19*vYHg4qbJDD5EN1N2`ZEeCLaId+mxCo+ST%M%GA zs*fUS1qz{zbJn7Q7TXE=<K6chba6suryp6 z;2_YQs02o@^6ITR!2!4_sUM&Ya@}kZY{!dncO6h*QIZWj36}@qm^_dAN09sg#U^Q) zAYO+v`XYgkU?4ALO5m>sq0&eX7T^{m9q<|q6QNC8X)UmoM-t*d;|{u3WR(|a5d}t% zNL~euP!xhlz9E@vaTyt{u-{zT@C){WAmI3!7<1v3Um zn7~9ZkV_s&1`|MJqmY$!mZSx~+yxm?Es+lJJA7Yca**I95i~LZjm8xbVja@E@xGme zq$D2#A3sFM3<@zEsC2-Y2S}W%cqj?P_2^H6+$c2=gA0ukKP1S5nq&gK6ZeycdDzVL zltN<2Ddh>jj-KW6$b9Ask3gTm)T5}xlt9E2CgM1pnfa|?i-2$g0>vJI2)G;42_Q+V z_QF+|I?tx?PE5`&w{cb6J}s**ARU5$G328x-v9^F#ST{u;m_em2z9cJbV8#Ok4e;x z)J~SfSPDqvilik9Ck9J3a+Qp(aDkl&1ZsQ**YCt~KtK>pDnRlStdZw}ObM_zfYePw zLM5aq%G8gjvA^Jz&%mq}0^$NhY_(- z8Fdu=bO^FE`dc*Zx&EbYD2?_PnTCuHfWs&FQQ8a~45P2oNMx->I}hJVU=Jg6m2@R6 z5kN#0UY?Bp!t40=N&jbwe1GBsCku|-i3K#{nhtCYWTH8l+J=_PO!r6(B;T<1kt~f{ zt04-Att{n2GA-c2NC1}1!6b1q$RAWkW*HaoS<`0O zUz8c_qgSAND-r@!o{3i;|P5oBOOISBI ziittDc;OvSy?VDx)q~t-{cD1*A$_K6sYiv@hGBtCQ(H~`nWvMxypy{67{SnO`5fWY zJ!}s%{9P@Qx?puekVmJWW^KG2wssaww+GIt`4 zbSQHy7n}^NQS2ugjo;i#?uEO=?@D;8up`wi{7C!<5Osy=3IMkP`P zJ+(j|#T-SpM#G!vG)tf{m`G=rfNZh!j2HrbXAvE_Bj3f-2ZvWZPt1MA+B))ts(C1Q zRoq)cn?tOPL!Vs^?P}ZiVFdQeW24ZH&bo=mwfiqz{9!yYH(R)~XK~w(iTWF>7knS_ zW=PGR&rMrjo^D00mDAeuo&LHE0ECKmGFRZ)LvGf*+sQAMk6*%w)mqFZO0nw35Q#x~`h8F&2Inf~$5t@Jo^?$33;^l|mCy1eg) zU(9aVHIc1)`_-0@CRCf-ew%vov)*?{UOw@KE>&wS9m!m{|H}#e6TR)e!pQw+#>w-( zi@w6w_ghD9Khg5KFS{>ud*II`s3oSm)f2i z-MG2t(x2ad@vLvgvH!=h$s4OLyq>l{XrkvX(CQew_P7&_x^rOGt-F&O_ z`-y_j3sXin#`IpgdHv41FI%>Zzt6OE`jE>l(W4c)gU-9ewyv0mTAmwu;l)Ai=<47y zr0wI0MbEWOOuaHZSUIKBEzw#1M;1Q1>?!@sn@{wX4W}8bm-;SEynMXZI&nL5 z|6E_@5BsY=`eE$$4=~nN=%bR+Qt8D=~OuOUl9(sMlDYy$zVAi}B{SXWm4b?r?MbmiQ!%{d!%_1_d+|I_9= zT9WI$2e~C7FNI&u0M3;fU|*qT7dhu=5tB0qASU49Sblc+v??3qQNfRS0X+l0L%V0` znbUxtQJt=tC0f7&zIGk}rs@A0^c9)iJaif?ww|7D2nqCt{ys!Gm!6tj?hNgkoE)^7#7~C9}_`<6EhqfLQMWzsqseoA3YO zS!>dID8ODXcK|JyF#9N=zNSjN6q81YCIFYnIjL-*ki3IB{?Fj5>e-dRCcPb0m7wls zdk~kH#vL3I{J9kLRlN{!T(FfK%H*nr1s%eI$yotdIgmdi%<8=tpb`x2`%!v+IS8s(n&?32VFQV=eJOs+@Nns{2 zg!KmP7Fmxm2UMwwks&u4P3_}ASPW9Kj)s@1OBik&Qy*Tgn8%&$;FiYzd&T2Ajt)YO zgL`DVBjEm69hJM2Tr1X+jDd6cm!1efxmtD&6$$TyQb87JEtRs1w9NSq=%Lw@gprcc zVi{cy*{O0=M=V1)DoX01%*l`QA|5Rjk^RCWB8$L?a}Edtq-szQMX1|}kQS@}d!Phl z3-xoVqgiqRPc0@=C|)J?oGZWx5OmeS1lN8`)>@J{Ws`rJIZTmCmNyYaxF@=pM-mXc zBd3@nThV+E2<`Hea*zU{l4NxzUX-ov;_g{4KR|+tJrqglYlA!tQ9&^cx)d=?&d^2% zt!3znEKzb8xx(piiY%3bc@oVSrIqSfKErg6h;mU^k{_I!iy%f%kN~H1m}z)coJVvq zjXW8G8<Pz($YG(1<2;6*Y(X!w=u z(0B+u`SpF!8Xn|-fzScDkVMiQ2p1)*Cc_j0E5wuRP8Tk6Bphm6n9?D!*o9@#2PHxm z1QcOK1dByseFAnA#~-Ns>r<2!2+9ju!(NiIi7DB!PoTI!LYR z4Zc782xfqaYjYiuUW5iT6cd%tA$FQUp6QdX{81#Fq7G8^l(ZAU2$h00#zL{_DMDJu z7K}CqIDk@}cjF~$PQ4M`wSo+#o3P{#eDS5qb680}kwtMI@Lts3@Ge^=!f;jA*V=c) zRG8NJu{H{?PbVa%4v<+Y%2H`y$*66j*{~9z`ng|80G;6>%_X2_E6QZ5StloRx1WhZHyND62y7|3kgr= zH;Oc6EOzh#tyxMz%BRu+q#l%F9k5wuvS=MDQeYJ2M?nAr$*d8QoA|PTawfvtR7H`( za(StACw2-a-DEPI32Y_YIYwd}pcUo3LP_RQb3fd_mzFVqQ7WKVVI&6ps^L7%ldUQj9U-}61%Bx&Luz~ znoeQf0}3T#duk*g-8Ko4H`r^8(Q!%OL5B(zs0<7>kAtv_Zb~{IAvv{NMF1M05{F?} z(qU-;?>$Ib&!U;erX296L>7z4;&Qn)rA4QxO2m8?rO~GnSe48I^Kz9OCyT0uYcyV< zZ`xPv7OvX#fN50$;Ihn#o@bq2C|6R{PFRKkZx&U-9|El%lCZUKRC7ga{oy7)>K%Ud zUf!aJCxV?RA$xZS1L6y=0Wo?~tl~qWV~{d7k`^Xe-GZEs`N%w;DRCfWj`_)z{2E-$ z5>2D_X9-gVW)&bfi!d_zdjQ7SyTc`~W+*lNkF$bG=(8xQkYHz!!h?oV3Mxv^7*GM^ z=C%@y3t=ggs^DlUy3fGoP)Rx@)=M(ECeB6pAv+i}SF9w;#B$Hu+vrIpl|mb&NF0@E zQ+gv}-FT{s%QkaIPooHwNzq*fmuRRJ;Tl?AW4a<_bR-23sKdLfPpDM~o;ewFlBlFK zE*2M5$_LU|ER7M9JNT52@=228D%H4C0SF0ieKAB{5QnM){1RwwH00_?P&%u5Q4U>Rt1Uk&h>acPqYVS)cR2AY zPsOH;YLs&}5;R(zTX0gnmO*a{`dF2oa2}7iAf6MwXJMJ~Lo#lZP<2PsuExeAVljmKrdVWcB3aa|l)q#D*hKQZ$ z9fT?GX6kaE@LDcrD$+{IJ)C-oD6v~Jn@X)zyG3uch_-uKXut(Kd zx+993Yzol4L|$`efy=k*S@bgf5qbpujT??wPqc05N*qZ{dmDR*h}o9+*?7qH$7*`N znQ|6no2PU{_KInPE*s3+*M$(--r;n@YP;)b1vyq3q_xKtn-Y(~KTWwy-q-Ak$$M;vJ$@-dChw3Lg z+kf7-n0046zT9v=wX7jD;#z+9mo#^ek+q$p! z^zgc>&Wq!3eGW#Ax;wAje(z@Ip6NZ}H?{lEO~29H>$y{q;`@52RJU%r^>k;?)Hm!wigeRt@PNuklPhR6z`G8+&L&;jb5$jH!~B zE*O0-WN^E$`KR8mre>O~sZ;J&>nfk?T6Xr-udeKG?j)uG#IO#)pS$kwzL@Flot|m# zte>g>q2`UdKQ(t=_BmhfG*A5$Z8d);Ou1(|e;B`YrT3fLH<|}8jI*12FHPpUvscY% zXF5CYKL1{)I1}_kP1W?vV&~5jHB+5uUo4z-A4~l-`>gLxQ|I8!U|Z)mcS6&?Jkxt= z`1i%VlQSp2?mRQ|mLhM-Tl1(iz7e&^o{5Bvo$~5 zp6uzp^Ks>f<^4~GcI&E-bpC$#llsBCw|}#Aem5SmY5mx`^v)|2anm)YW}K}xRUc*T z>rmaEej;?_-q~be(C>me=*jtIw%^5n!X*H$RR0%nX;$&}ujU#5)5Zj_mT9qS;1^Hc zsZJ0HHmU~{)ZdG7H9%G4DBz)91$h9k>H*H7^niz=P{2b`lh>5Mwz5rls00)x01TV$ zyfM4T>4feosTycPSY8g;tMZZ4s!+g1!J(zIF#@F^O&GwVlpV_lQh*DmCiy=WIbU4^ z`nvjwvTcm9Kc`pQ-^_XYDog3HZ&MdC)83 zoL~a*OMqSiaR5=;4BY=&Y5+n8AbALN6#FKDTMu7LW_`OoKtJ_tO(3N|Q< zM$P<#Oe~PA%tny~mWEKpjsGo+%-o31(k~7({r+_FIl+H`_M#|M(Hc+(ET=_^^l~^I zgV$3W&Rk>au^NitTzlB%q!v0!sBn*#OHo(p)b}DrZ_pO+K51}?pVWC6Gt`o$GC0L` z(tXt*aTCrSTc6NFw?c|wDB`}*j8Xf=QuQZ;^G6`9G0)4~N*{((CmbZMx;(?1bh zumuEd=Cd6ec74MmN`(?sraOSsSp~Z@{7NB~d7#7{09-{ez`hafg*l_lP`Z_ssW@=Q zW(8?F$-N*C_lQ8;5E4L|xddXT&O9281cb{da~-z=EmyXpgtV&R^O|@%kS>x-EOYR% z`_()_$}I9VwEF)jrJ%XlVP!+PB#g;Hi+51+q#Wd1N*0Ftlk2%4m(wH*LlVSOhd~Gw zn9ougf=~qH3e`UrOBcW~21S?-A#s#62|bu}4QD7I<>`?sDV$uQ_h%a`j$qdWK>dW6 z!j8vySsY>0Or(D}(If06Y{?l6V+cUl>_5m|&p5V+6_L7fGTMEK#@+R3l zE4)}d%PSRhMPxgBSYd(hQOdT7?Gz^|5gH-mR<}K14YCFj13bh|G4VbY+|J8!MG~ec z&4;9*YJQTSi=d{JAO=YysYZZNhce2d=YS(g4*#XT7?wbR=MbM#Y7Omf(n*| z=nBD>b$~so6{;DKg8-}{)KyBcM;>-W1pQ;s3PFm-{dNz~{7C$YIa(@t2AD21b3r;X z1%X^&2;So&Au$(90t(9jM1epQ$d-mM;AqBJS_X88;QyeK@LWu!(F4fzgAqwP?4<;j zBLu^M6C**JjQS1AQXEh|MY(QxuK9yK&;T;3L8AbOr5f8`?Z+~6{qfyYF`pIfKga5t zgJGe?mN~`1R?eff>6G4kRlt!WrgE2yJHVXuqS>i3iOCS@Lf6nia?Av39`djpFXS{M zvan=c%X$1bjaJwTd#SJiggQh zKCaZ0Pt@iB-fSgA9W18EM|0^!hTm#HS8`+umqsDQi%}*ajonFCvwNj2h&&nA!C4`E zRvCrNvcU{*0&!EIyAETr3q&gB=cQpboYM%v_QCfP()F_BQb#E`8!EYG-EzMHn_KV$ zQ+0(|LB|swe|LQm)4}or^^z7)GfUJZecTXhbB>~VXMe3HSIPM!FTm&vXh9T{#cGa| zl+}TSK(2DGJwrTDZfHCb_6{PJI1K)D6Fk58ap00F?}yk1jtlVscN7oKaW@%D#saOd zowih5VvpiT7R`n8!z-49N>44}wtUyn;BEdWr@L{0$+T;1c-`APzY%2>RZURLQ-*qQ zY04KA0(~X+MrO)7+x0=v2P;eQ_uM4JlUZLm6AUf6Z{M2sFZEJ;9S7 zAkpoOMfm-+sIe@D0(wwGmu(|Hua=1L;O)0ykTeo-l<6b2cF2gy{UN;0?0%;Sq?}xE zbEC0ZEJ7C3q}|XIocNZQ&vs+Bchd1g?RcpRt_J%-sM8nU)}g7Uz2P~We^Wpp>lC7aI|94TioV!8)8q^U`SMibP?@E5U9JT$3sp@K1)dj(C zAn1obvf8c~&|v{xqK*6&gw=@jJ3Ev&h$BcN6!=z<7J-XD6wv|pIF2`&t2xVPJ$C?5 zjuqmVSRtAR8k@ueqWQt27zO|lC<;A*@<|FwQ4_%Tz@4O!@Us^@0Dooy6F$2}k}M3I zuK*5BX8i_G5@46W7YQ!d5-v&R6#@2|ZQG(q;sJHVgP(yBPa;A56dYvGGHQyU6(=6% zBf8-s6_u&U(XOJ8WVS<36G2DlcgO_^6oL4kQO~m>{+={MxizY%PO(pBtuKA0p#gkU zhX#~l9BJXa{@6C!^f-XR7@7fT;DbPhPI(H4jUt}tS{mD z<#FNK*YYZdcEgvNP}PwmBelev0{%W>X(ZXwTK22dQ+33baMUs3c;qp1ptMhDB1N;k z(UPz#$jfLh<1fG=T}LxD@3CEFrlI%ObF8}Gb81{8GsTgl_eHT-A-ND}FT$}CwzwLNxar#M8ds??jF z=k!8dMMeX^ULH!-^GoR+e5-#!MF4+7H+}iFzg}F_sofSkWqz{dqnY4EEfW(@4!3+h z_WNUl*!T0McJoVLoW8iocYNx#)oq({F73B<3DXbralWCA`pqv4UL0NY`u?ip^+Wp2 zose%T=+6@^!AIWy?AR|qzg&1H_VD1IiOI!*XKLDqiL*6>cZNdtzYQ9voHx|uj;%y% z#EU)S?&EDW!#94di9Gt&odiBE|E05&-N&uL-ah?9?8|9->*2}mU$(W}Q8wnypG^3& zt@5*xsooz44^9OWue;ljap%#t+^MgQEq&j2Xk>8VCwp)IaJJ_1OzVZt%BknR2yFqW zY}S^k-QTxWO&aR6gWA-8qzvc06T7i@(MZ?laaDcqf7;yk<|lP`ycIR(wi8qD?$fo5 zj4do|E13xKZz~xKUfxzVw#ese@xA$i@7JM(V<2*%^s~HAW^V6q^WC2I<<)NAG@bKa zi*IW8i!B#NUnumwH4^$`P3=tm%Karn&(93LJJa@=ujP-wGYa1Iz3FQkoErJU_or{k z#@;i-8=HNdzAvU)R{K5!FEMrLV$GhJ`l0Z|$V>Caj}Y`rab_Mi9N zK9Su!wIrwW(s)i)cIQ;<$lz0VfAul?PdZ6E*9yWp!Uqp{YSh@rVFmqv`P z%v!qc+2?0oAMgEqYDt21?ND8U74v=J8~p0l;O#pnz&?+$lwI2Y=S=UUZ)9vqb{jXe zdU@R3G4zN1Uk*M0M9pnqn`&@yYIkB>S(Jq*thR=XV%criO|lmt)|m}W(ytn zP2TBEo<7{)a(Jria^=}~JKj^r-SWNu)Bhh;<^P{l)&CAG{f|V|d;j9SfGO!;m}+|M z&&xrpmA{#)GFu#UNjplF>mOf zv!g=5sC?%`r{m5{tC$x0glaU(`)cie{9B}eLJO$+zu7KEm&`mQ z1bSm;*{+gq1nE&OR$0k_9-@E+_0S#y7>De}9!mR5#9}r`rXr5a&tsj%>u_>D(`U2)dZYvE+lS zQ=80McrP)Rw~SB~Z(s!fy7yb0$lqvetSFa*zN{P_;Uc181w|sMz-P@e>-C&cM=G^V z2wL31#`D0zAm?jMa;1xnXW%q85GQMuz_|Sjn$tms*(tVct_06C@xRm~t)g8N2{t5h zu6JlYKNMJS+DQbWrK)hXgZ}{L z9l&@i4dm98Xb=`@hEJA)_=oa#N+U1Qp@s~W5R!87q976K=M^05l;Q_)zJ`|N^H<3Q z%-pdfz)WPJWzf##zc7HVlBDKLLU~^>Q$)xtjZ{2TB($42-cKY3kl6@mBcu?aG(zGp zUn$t2Vn)y?7^KwBC56Kr+fEdr^w4D8wjkvycVY<&?=>Ajv3~4L{TjZGbeNX6yh?}k9a^M;F)yM4v@MA z?&TF{V4;HJ(GKrPB?oeqkC1|b73OoadURKc#OPr_YwTsps|a@lBt~asEF+8%24k5( z83+}@QbFQp$fZ`n4g`|8R*L8x$e2a>of5A z4JhB>4+v>WIO7k~S{n zPYG1mDcU7bwX;`T1Oe|P4mcM8FZ#}AEFSk$EWC%=cdvwuJ`IG3d^_wB!&XGvK#xE; zfW?dNQRg!hZ9L0TmdxUl1X)|`@#iRux16TXNE{&rZ*Ga34$1|dX(}i?GzoEr8n9MGFb}ZX^x|pyf#cE9_5j4FJY=Tf55momQjt{u78lr zH6lfI`F1qn>+OUq`sr}sJ3W?(BYW8cQ~yqd5qbVScjcOmk^%E@Fbt zWd^jThfAY9Ow8WYd!6ksZVr~vI$A?L%;Vku}NPjV=EKOcHgo&@p| zK! zoS0md8PP>SHa-rNU}Ml&ei0c2gaMjsK;~CRB4<^tmbY}NU(fqJ;q+Ud4tG_c73x-)3;dXilLQVcILuU_Ju7(CbEvU zJ2p{$cn-70%se{GAawR=d{h}dp8=}8gWasoX33{pg$rblwVnU9n;0@8h3?@}`jOoW zbr+lk{loA%!}5eL)ivP*L_R!>;_n5{*OuN}O_*|7Qvqj7F1>tar~x*dAa-c_*&U2< z{Cpov-emhtM<+}p$xr2JCSEz!^6cnpb4-3)-uNr_wlBxA&3U$w7-BvKQozz*&R#M8 zn4#A&YM2f+jvE}knG=~$S-Z#A<$s@2Hm~K?(PW!%!|>yW25(LN(sJwAv)e&KnGJ)j z-;aI~c;du#jjoP2RD^eKfY**1KVZ9dCJK;O9a8RQc|>$lD{n z!5LrINa4nrpP#f2j~O;Uak}^AnenfGzL~wr_p|ri^XX^5>9QK{?yLB)r*C-M!+G2D z(}!(zVe61xcjiw#v?Xq2 ze8nqqj&Upf&;qOb+WK*;Bm3p)iOYF6ZWG%=$!}cjC--U*Sxm$$5evzwua} zZ+d%Z+AG#ABm2AB7L2V}6}Mp|)V}nI$zz?pH*X8A*4(LMmwYeJT)Go?>rUI38y>T^ zPp^pRePQOeuk&iA&)l`9fARH+%cGYr*K8TTa=mj=>hKHeS|&zc+)>y%wko6Lqw!VG zFTFmIzO8Nj#A8u;_7P2D;rfZ^?7s1#4cSYt-`#HL^^QBz;;xTxc+9t9d}-d`#P@HH zt+us&H2UP~!am>NbDaZ)6L;K+n-jAg6VDladSlJSkymNe_Quk)^N{Wy5{1-?r^w!PJA8hZG#you4? z?Y#vPXQDv_gj<(JSaT=xsG7TD`Ojy2k8K2dD*I5^q;K>37VB}<_=>$%m)|XK`DJGK zht1^w0#F6**tQR}ll{LyRMR|Qsp5c?@YEvE3-e!`*PGnDwH+;M>%4Dc1HWO56ME)W zwPY0N$5d3=@)l@ZjSWJhYHjC#OOcGE}>8v6Uz9H8V2EuDPO`A}Kt#mPkgQBBUms!3JOtoZMee#E)0 zYPMA-=rn9+3+aLMTpIOM-`LRx6LcV%7fT?a&(} zI+vWS1qYD%{@}3#G{(`9NF|Px55u!7!R7666&dXzqn8V@N+EXXFQ>$LLELSu!&6+I zp)nQ1@(2LW4iQd|Cq;#Ijs3+1Z0{y*+g~_U0@1}}vP=}JsocmsFJYEG6$_rvE#P(4MFojdg zlG&2=C3Xf^>&OzMJs?sFDS1OsV_i~XWDFDG(pOVe1j{{>#wS?b(+Z%wONG{4$rm+{ zL~a!kSL+ay7Blo)*XUu0mB7KQvd6o4uUKNVb8BknvEj9(E8HW%;k8IZ6s6aAgd~|W z+`&oWIPoYP^fa3ggT&jNp7LA{ ze1}WLp&Z!ZzTc#vfqSGJvzu6?XBa)8Y~+n(yHqv=Hc2ZNZD5qq6v< zuE;Lb|0vvZs-2imn%bM3)DE48C51raJc7xBw-#L5GUo76jX?9Jeb(JNh<0-G-)>@sUjq6go;d>Ed~-z zn_AzbmbaGIbgcD4jv%TYTZc{dlfTFX@7iym@C1GkI+FNs1?B1#c~iu zNSR>_1QyU*Xs=L!DR6T=n$!ThL}e|ulR60>XkgU$sAWd!dTF9O@j@{vEvapQHFl^J z;c+cpLPb$1*2P)8Xt<)7TS*eukF>^KH6piyciYMz34*mdxlmyW(d>C;d zQH1JQix(!!=aZ*+6fM=KV+ov)k{CrbVd4AK;qs6b0zyULQY((>S?GO~1oBZc{4Om- zW4bz`k|<2Qe<$H&4k93n&{z*2A~FaG29tYmf|LR&=)>GIkgSOLgy-y7n4HIGngT)A zfTV-Z@UoR`DyrvJRwQ&TQTQX#JgAjHZV6{yzEIS z-K3H*>zae~mCZswUuTLKghZiOp~0Cgn+5qDroOGHeR5IgvyT2N1;!C!Dzg0d$8+wKQZyuwe);SyK`U=M`n z$pKK406pStNM2Y6%mXj29Fc@IaID|#-*JkN!i)8lkK5shpHMIRC8wMY$!YFJjFS{z zG;BiB(5et?cSf%9xya0(cg39VJ!wo8JFi&fVjnF~w=cG`lp9Y$sZKJ3scF5<2oXC7 zc`8@N4f1H0QwN`(gqo|!SFecQ8QNhlUv{%P{Ll!?ZW<*`W&Y=Z*l>yS_2L@lRq~Ha z@tu;Px&k5{HjuU^+*r}RBx;g(#!-_OK>4WDTOP-r5lah#9%cVu;@&;1iF0rNC9JeN z?c4YFl3|ELILa_a3gj-@X6aUR=-RCG!X-Af6lO~mg<-kGl^kst^8KO2dgMOiEUImP%Oc(kE)Z0 zbP*an5~;}T??5@JHPdjc-%`<;|se9uuSpztq9q)K> zJ)>`6-O=pM;eb~&1_zQOeqCo99k>@^DRh*LWLzHH4W>+^f@jD1!Ildnmo9BqjvZ*q z){X~1)DJt?9kms2`ocj+{T!0q({j}LuA;WkVRqIQOhA`+6_%f=y)gwnJyrO8eg$!x zoC5_s9BiLe+tuPf;p1N$Ih4GvgP!ilak$-`O6#cKS`F z>#ug@DqCf)d^FLg;>K{~D$CXJ?&jL(zpr*0j;KCzHJt1|>uh*nbB^aLJ8q57Th}q} zoIIMZAAj1?eRpqc%jb@ZO9QS<9Xy(UbNtgywa=Y+i2jH1oj-LvAA45Y-9B}4hwYLh zxy;r!d~|+C+xW)^veyqptXq}mGuD<`+cxNbz|}drk?wwK=VvGL*~^AZ^D-uGl}(*& zwcH-eB3t-j>%xw>iHtPc(~+c2Hg zpd9HKciB$5u8*5f0wrj6+5R^53<#Go@GajQT(>Uc*66xp-Q$yITsHlL>$~oT$uI7- z6i;=3-|>8;Y|6FT=^{Y>$~-%J+<9_c$MeZ&0k(VN^O7sN0OIdye#iLa{0Y~k3D?~2 zBhwq%O|G%0o4cR5YR`^b(ytx>`$k><$sM+#Lm941c$#*Z40s%5`^b zN5tgaE7MN_Q(<}S#Kg$FWZQ28%a#R156a_TGq_HTfN!?J`CY>_IlNK7+IjMs?JMU< zOU2%)HEU}*hatFjuj{cZIejWPZmb2LO(T{Z6>P z>~HzXIaLdySMMZsw>j1+!A$Sj=8W;FdDm_B@q5e4u39Q5mhQFX50wGkIgoTDd(GI+ z+2A32^J)I?K(c~Y6=MX0G-Y!4#i8q)yB|(${zZjPlrLSn=dQ&zad`0uQU7lO?*D|h zfPM@9pX`Hs*y)Vd!vFCyfb#xF!s|aKV&7_iowf>ErfC<`ivh?m8EJ_Ee!*!?^%F5| z7&K2C2F*QSz}5dxzu;(&b-r|Pjun^_=YZdx^q-nRS`;IN3o8g(zDUYv%uLdshp*YlzCdASuf1`GYKdbtV${dAK|UjSZ-yo6{3{D zNhqU~ucrz@|F|NY1igO^|G1(&l`4l4dWl)|F&TBND(C7o5V{izkgs@aGLcM%QvSkzS!KF_ zdR8+5XnplUV-Ojkt1+F#@1*x|JPuiN;_oQTL{w_1;KTbwA64^j_fu>?#&??6Vu@^0 zwSuW&dev$C6}61pz6#LmY8#jnH8uE51o@CwBWPHS4CBIsjs%%fjH%P=Q5pW?IXV)Gp^hNlt-V|39Ajog6^pO|X?9XUd z79hz4c250vVH*~rVfj#$1trW34CKBZ?TzO;(-`9G`si7}Bh~hfqBxWKTn!iWv0V&z zgLXhrn1n7lZ;Itl;Ap0-HF@PcBoczdHt_vC8)ZyfZmIs4B5^3lpm~6t3?@QD0GC(j zqbU~3g~UOHq7Olv2yiZ%!K3q5JL3_Jlw`3uH~_~}OQe$fnNkk3qXXanbfuyd38!vug|&~6M1B~@uzPtkk=9;HZD&T@bb0ETNaQLF@w zD=*vtX3*Ek54uJ*xtrdOwj)o&ZQR#b7VhL zC10CT0SE@|SBr7R%bh-_n@4}uE^p(RQr;xAYJ}ATb>n^NOCdmnr*RUOgg`0yCa9c7ho;*KsT`lbzUND5cnBN4qa z4Z+EMG{2fZ$yk-8X~bru0^;0dl8^?}cI;)TUYCMygnNQvI}Ljob)dC}j!LRXd7m!R z&4`t~%H)Q0k?*f&D8I}lnc8YL{v_`^Tc&M-qmm9CB4;wiO;*V}@Jv3^*JL2Pilk^S zn@$P-{5iCgBI7tVlKK2bLn~4MLC8)dVs6>k*HSx8woXVP6c!FW>PZhsefz_94?0y$F_ zC~_kM#fTdKoP(*|eHsko+*F_ZTg*#arYCj~z&wH}T>3ev4WXw;Zy;|N!vd^_Tko_v zl3y_`^WI_v)NKncp+I_-=l0AqMxS%k zTky`bQOhv-uwo%@sb|gC?8nkxP7V1f1KOUD z<3==TPQo+R;?=N!=_tOvBIGe9Z{`_p6M2I_s`jB2^;%GCBs?t%IktY6GEr9$af*L( z)7_8MM=g$eSH94m0%Zt|WXhs|!W}Sjxh`$!gnW^wMf#I>b()tQ*3OXLJ;2IwyEOes z5BXkjlCqT#!X&rS&P-$IXD|rw^h_vK?@g=p^z>O!91IoPi8bNAYV+D`9V5q3jNO9FeNl_9&0YD|C)hpZRT-c%DbC$!+AxW-S0TNOnc}2(8kXK;zs<*7Ipt!r=s{*l_N|fO(fntwUpCl$zgar8Xlccgq4kSw z$rHD)bUz#b$*rWZs@omwCOd!0@cMqUYa#CU6p#elhqIF>MxJI&xY{3Fz5dm+j3bl% zg%#1{WD*p%9W&_YW>z-!Z8-F@t`Pg;#0VpOaylHuL@{699OSUQ3wE>&THKJ6l z8RKR8xns9wdFam>8Mj9^tm|GpOeO~m z4*n&-JAdlQknPdb&7W&`OwT4C4Zk+Odu%8vHU9@7^Yp|Re=*x{^4{$X+ob(30lOS) z-wU`nY}lMJJo)s2En~|0OaAwh?UyZn6XQ?jJ6(@QI>JUC0A=|**m%R{H*xRwe4Fd> zgN&VywaGxHKEBs+*0t^j%bM}L_Kvd2EA8MpxZ7N@?Dux}|KH5#%L;CBb>*9SBsoB2W#tzlV@A zsl~WgJGRJ}>BZ!DN?rq}V-X}9EKQfO*-|jV^JM3y6f0BMWc8x{%oKL*22Uo}Gmiv< zw=fq?4CUpgiS!s0>eXFGVBZ5Xg*{!G~J$ z6`YPx6G1{$udW&D;zUW?!&EHY7OkwreRGg3PHRZRVil?IS2M_)?y|geHdET+`cq6j z%euunG{FXeh?jDvKPfWl0*=ye*bSSepv@-$CQn-|$DabaM3u zT1B=(NL)_I_TU0Tm3AcuM|yol%!9G8D88Tvt=5_Gmwbf+I*)OiNtfST zSVa{;olG0adbu+!fExm2b|7R3gJ?i5bOVJ@TT)}$WG!1ykWwvY1jSD*ik-uwSm}qH zWKk58BytPEvsTG5ih+Bnezc3JqGBYrV38lBeGpxlx(`i?q7F+b4n0I^7c+a4-k^-e z!e&xbfzAWQ!w8afM2;9!f2Qg~&F~7a#!%rxuzI9Lgi0omeu7 zeAIwO#jt5))oxJRi+_d8*t2Kesfd&x&2cr-LIb`JVJQ@3-C`Yxt_XlX`XJg$@Cwk5 zvMu#PLLAh~{|$G?eA8)S|6y1sF04j9>UlL3q(NvV*bEM}k7Hyi%|P*5@o{4-uc+h0 z(s(qezmOjN)^{5jR0pF#xN6S_Z4tR;l1iu!=P6&jQi>|YQigg9)$&Uz(85y(2lZ31 zXhoF|gGxO_e&A+@Jwmx}!H5w-kE|)-&-Z}|!8O_1z z`l!MUd>`O?GD_|xZ6%fr4o@1mWYE*_qMJVjQkU*-Jhz6!5g^40iljhKaT?0Uu##1@=nsm3bsHEQ^lSEUA~0xLtLdZ}>mLwP z43~DX)F{GnGK@6x+Y4#_#UoiPr`FXlM;`jq7qYj&aEk^Q)ulMN^leo<=qevOvCO|FM}f?k2WPk zhQZ?CEO-{hHsB}|$KwSetpO*unpe;a{T73Vl4KnvP54u$merH&MZ_U2EsScw_0qbKY^fQ$-g=Hb-3w0MmLidL z`|7Vk0R@TmtUn}+MsaF}5GvzB25U%|lV>3XHI%NB+a}|~;dNY?0Z?}^I;f4R(1P3{ zawRiA+G7pV1>;`ZgNp2 zd_fjhHfQ@CDi??4;%!DU0$2VS#WS^Gv+%@dYAvcWGRTkIONBTqEfJw5uo=-Bh?&-~ zoYtqjdq_1aZ?h5>l(~i7!T39v8V@-^pjG_gdcqSkS`S6ByZEGZHZ=wSV_Hkp*|muu zA(F)gsXP;p3reV~32LNXGQD*9rP0sDpu~d+>_@TJ)5;rU7!fK?V1!os0LtYNQJl73 zdkpebMCDP1bMFSe#j@QYm6GG~kFn27jA&3G(v1<1Htl5vHZWu_XZL0=y z%8hqBjx%Bpu|mA%4lY`OxlPaLc%a`rB>oTqO6tV8Ta;T2c$iQjxSnz=?Tq2vr-3mh zk((66*BCb}kY~g(oFw=aw`nsb#k#wdLq!r$PaQ}R?pP5}H&wtVFA2oOfs*o@D@!UF z6?sC+zP7hC>LYtGSIT@5UO!Ittj@tPqinVjOI?5@vSC9ZY&e%(SQEh#7HK!;5bFNs z;CCl$b~o=>sr=M#7Xr=)4I1!(@;lt&s}XFEXg5ILc*!4%Z(vg`n$WqMTS{CF_&BOX%|F_~3Fa>hWGHfsk4k2?}lLk3+1ntva z7Og!!Cl}38HW4@QDU=T2h=)bY?#d%==A(db=k-# zPmZRt_NVH_VlU)IgEUg$8+Oje=D6x3{4|KWU>wE;oh1#dH_b zMGe6x*Y+5$`uaEdBmPYbdWT!i9c4o6@)so7)0BF{Nc5r>A3LZr8wq(Z`Av4m=+LD8GuP3R*@=#!UoSn= zcbwTdR2mgKK?9HP#G9wGJDeMjW~>_9(Pd%A?iL3qCU>R%zB}~GfQK&gN6YrFc_U!q znK>3m`&{Gly;e6vC|H4tWZg`Ga> z_|0Y6>3si;^RneoZ{7Sa;JJTyHeGb!7ThD}i!Knk523Oegj#<&AZz9>|?VDWE zZ+v>ZTzjh5GCnx!TINiRSkMq@?4I-cy>W*{WpN(q z?N&@w7G#$_UVXM@>ec=4>gON(8MlXU^Def`8S5+g{Ym#{&QF7Z#0g)OaoYLm5fI38 zXtL|?9UO&9RHh!s@N4~LXtYf`v^m#yVE|reL4ji2?63dG_5G5LZ0E>aFwtr{sbAx2 z8S1dPM$b-tm+v{e*4S}zeDFxdXRelEAk;R0pK)l?=SGX4YrG|3jq7NROXVCD1&b&6fZr%E$U^05(MvHc8?2_%&_}05E=)}*zTTYGd-wa5TXHVx_ z9N5Y1)y`86SNO2gW!XIN#NsL#UbVLNmSept`?TxqbIYTt%^KU0N%>vNfvLM;mhm?m z{5D#&fA*iE5^4*-kq^mzv;R8utFwEheP?s_%7N-CJ*cc2a)l2JpPkxdyFIMH*DLi8 zUHu(jbhaeA^5?6*|NiZ7zL-4ot!iXy%+)c+$=75Xom`ckID2-aWyIoo{L92&jJH#_ z-umHs?J?KUVb_|eZ@*Q2KY8`WnaeGojNO=Qi5w}LmHob>`Xq?8nH#f>Q{SHgub$P9 z^0y90M0DJ8^lS!~gicw`Po1u>C>ttiv#=9$c3Q6A)=K`XMgy$)f3go#{((~bM?MWi z%KjgdXaAMB`2Wpx`5)7`)3a{34bCAg)S&$Di{bIGzu_o&UH%u9c4Pzj{P_m*>GNro zb_wXM%@v*Q7g-q_k zJn|R7CkHXKE*U&3YuyimYHaetU3@Y$gOC46*H3LA+pA|3Cgr8%kx!**j6Yd82$RL5 z@N}jv^*A5g#G_3-7~a8D0HW@yPLII(S(`{TQh|NRhi$;}I4ic(4DIiOl${XB#4n)y z58+|2GiIN{ro}-A5Ml|hRT0-za>5Noj7GQmxC>hA>u~U7Uwi%agbb0Op^-Nhju#`%ta>)k4KA ze5=mn9>*`gcU zf^5-JmiGzvsA8cl&2%0?3cy&%G$0|;27b${AdU8Uf>4LxLV`A)V`Y+k@!GF3BkRfY zYQ(SnYbuMfs@PmPmQs*iAWfeuze8i4cwKdp1__A_xxu&bP-NO4Nbto5FE-({*G(jK zc4@GVdt$UVkXteN%KAhqM0|YQ4x(Mi2PO(iS}9aeT?nwHz;ejJRHqlG0K7X#8L0qk z8;*a0h9kvMz|&6{BQJe9NK`j7!3}`_Ne}Tk z{`!u8WT%{atV=F zgAj-k8z6(=hyMuoaqZ~hCz)rwiCI)}4Wo2|Gl?(LNjWFoQGH*?jK)&7vD?}eWHb`a zLTl~md9yfztU*8?GO3;c2i1h*Y@;4TpW00@4Zv zxvSDEQ7DM^5`lg+l2wWzJs%xp`mO{RJS!1j_u1$Lh&~PzZM1@f5pfv}t+F=KF`|mN zXaR&~2-+Wn*(!7zB5h{U3hPYi@lpzL_krn9q*YFV-hfQnWQC6>QSGtd@QGqg5(=~t z=->ZeZYeW8DKbzj%nUJ+B6O#eP&4Nsx0RjZbL0EpsH1LI+3 z;N#Iy8_m0M_bCVmXdgpDr(jT?!?Y!mf>;)akWA8>W7{Dl=rCHTEN&&(eQ-Ejf?`cN zNojn5poU^uNsznNlW1VWy4W<{MAfk|t(^H>D+uN7@gqF&IdlRqyrAXWRs8E%;5ZE( zXI}6p_0Ruxr4*h4k(4;r8c)vT>DE|xI+lE;44kLIIDop)X#$v&NqfN@ks!rjBFa}n zWPy8um;|R1+Cz|Gy13z*yH#t2W8gHwqrX9t^!no@8qDK@&|J!lD+=q$L=+drGjd{UwA^l#Mj#JU zxCPQe39_x#xAj%t8*gOkY7#9a=_I&en*EgjnMfN=XtU~PWudQkQPr8{39t7PQBYA; zTREnTu2;%<|F$-LV<$8h`>v*B?wet%E@ z9g0rm1B8E58rWiR7+49F1_QV;50$j?KSa+IWSfLhDO4z7mq8_scK{AP>Y7Qt`*@83 zyfH#q;jAAgV|v+_D+I_6H((~HzA2~+{)FN-V02HyX(%%RIi^v*?BB<#!#LTI{pn$< zx>CFb4}gA8m%cpR;q3uFz^l#!6$gr^ZJArZN)P}@!hqMm;5HLsNH-h=bwQnA47h}L z%c!H=!RLXf3&c{^0D5*M>2=!f=ur^iBEQuLAp4eG2~;9`3DFI^M5QG^!`F2-Tz0IrS@JAI3h6 z?qwdtjT|~{sk_-agg_}3m|YRJ-!WT$EKG$)MSl=6qaUeLt=U2zEV(-JdRl%qE2~vHwZNbuGJu?nQGM*1g@;m!}c+S+je2NpA ztj#x$1*?RYO?@agD#y^HkZ0H79&;5!*AUBTBlDwgSK$q$v$zq?ML(w!dU@Uq!njAQ z;R)-L%5kCIbC}^1PEj=mMa2PWco$tkeqU;f9ZYr6kBl%Mc!s_MW{%10{Oz$S;~uj4tx*|VI%joCrtIgj$eoxIa_YU-2K zwbtQPt1|erdjj?J~FTz!sw)nv)8+9Q*~tlCH86JK{%jC^|gk>cn2!vnK+ zc6>QG;>?bm`fAR4{TtY__gm_pOg;K5m=oI5Cb=1{83BVu3x)#~s(~(-|)VEWXT9<3w z_Wk6~cP-yfI;U*kJ6+?JDd)gxRhaW+efDQlXKq-|e(!QUb%D^K@mX!ra9@7Qf|33y zRm+s?V_U@F)rG2~Lj$htW3ESMR2@$H>F_g&Uu7?IjgQW+Z5f%Gc%;$|lk3*6>e%dZ z49@RxImWNLuKrs3>$`U?*{*9hR9^al&o%h>mWi8)~Ec>iw#MS*-hsD)B zPqhXRJ@m(1_guBlUE}%SYiqbl2#24c&g|0JGu4f~* z@$Qa+#*>Le_Pp`IKUp7Z5D;=)A6&L zJb&(V&3i2%Xe7YfQa6|o-}2jF!nzjQhQ-l^t^S zdO+Xc2SzYFT$>c|baLo!_qxeryyfU*)o#ntFH0&OjWmAm^8D9-s>HuaeK&$ivHwJd z9Qscwx&INQFSYmV{f8U#zi0C<^a9cOgxC%T9QiMx$?5B+iTfA#SN8tay8oljg`=Lj zX@*HIF$AC_XtuP=_wPWG{{tl{1i<}cK)N0K=X@=apPw>F@W8h@z3e=aFRfN)Xm$Yf z$qs-%vFj9iVuSAKYM?Av+sQJOHgDlmYSc$p0TvQ0o`%cgGsx>$#x%fW`m6jT&!~3r z@+Dno{bzK6U|-jCuc%Y7NH%ybSu>86`PLo4d2)= zUkFU&1FaOOKE~y*2ytj=f{DU95%8^1lK51HYhGwDM=)@ZRC!r>-;js#LontIm4mNC zB_Zu!@Hhb0qY)Z~A-(uz>{gqU!j@7}iKeJh0QVAZCS(2b*@Y28awuC9!IVM77^~*4 zLtH#)W5ZzXV4*c(#>_nFQgZ@Y3KJPirDI)m(D@OI3(dd z#M`+*aTyu-V!7d*VD^AISxkr~6j6Lb0>HbmLA118I7fcLhPeAvz>9iZ$mF-QLV!Ja z|9}LGrwOzfm%ikKlt_inn)!`h39V7+5zzwV1Adl+C+gxgYEp&DUrD&l!7ove4-T1D z60s;btJ?b(-g^jYf`wk86MDPev{;VC)@WuR>kH=m6mJDgK7RXY-zc&I{~DFzRgmcy zx`!VviHhUmC{q`+5nZd50~e=Td3qUkc`)gnm{$s~L0jArR&ZN!s(=+rAP;^!&7OmqLb27uNT}VAEpjo7XjzP`2UCkcMj-0b!JUidCWQbT3DCIr ziwpZ906u>O2DVW`4%7l^YEtI4w&P&z#r?>N{ZfjJnX>2d_D_0`r zHsI$4#EU?(++dBnze*1~W+8(XmLKf;i5z;(bV17R_TEv8^Z-%sL_; z7l3z&^g~wAr6KVYM+hJY8J2$Wh*+M+g6wd-xQKUL!;siJpxvsJV#DW#;1a(q1Tw9|IHLErKDO`c5mvC(h%cB#1$t-ptq_ir+%18>!Lpg8+kyg=iiuJv zBqf;WK4>~Kdh>wxN~c`J826P|mwWD_Kz7W%0?n#qjavzYLy(12C0*3{lKE6mgEY19 z4;sKDBMwL6dd+Yoe!T##m?aGIL7~j`R4?&5{u1FQ=#_O`QFJWlO)d|aL4ClL`DNEF zYVfZqi`CbqFnmS38m7q|S*$dI0iB@4pn_q)pjDi*NZ?Ja^dHpreOM^(xe*MLQsW~K z2si7fB3y9 zBrY|vlD=x(Mwi0c4a|3N+fu09sH|fu_P@5*4fO!dTQHBq-3kbIgo0y4Zf+oOhi(zM zf!sL=9K%Y$=%4<@5wYT6@Lx9&crg-M|Kwjt4_rX2i#%f6cvK64yju(<0!mJV#xm}q zSfD770)i0ybqMDn3KDZbIpSb?D5Bj0B`n}l`p$U}K_@xpgvhHC%E$^bI@$uTW6z2V z$wh0_@A&G*<7#v{*qsXwinx74|Lv#mckk@|Ew?;APxx8gb&uOvQemf}iHM@DN!JgW z>`K9NXK}$TQ}e96<)bp;x>R-I6XY>Fg!uX+6&oCTk}nu_dO8P6yZ$B~XH7kIek*s$ zT0FYick!scx(vCxqk?Z{(o0I=j2}cQ4q7VIwW6mug*}s~tdI^vZ3X8O`s3Jj#0Bp@ z0UE-X`$c4Az5HXW4Oy`FKwp+7JUCh|1BepSI&ElcNf%T}MG- zjq`656{T?@Odd-Az{2zBbE)ynd0lck;Xf;pfCv>a>z7?YwG2F1K%euAzr%R-#PxGc zP+Y^S*G5(T(XNM%$fdU4L3zTi!lUvQ$Kae}EtkeuegEuaK<4P|q728>4{vtd9rwT9 zeaW6Qx8tHCBH8t~0ar!$h4CXZI_~7w-oq* zo9)|)-6a{yvBUc8<`Jkx^@07WziQP0cQX64iH@f3qt22M+p5<$Zy!!v*U>+gzti=> z*zMUiyUYKorOtkn0$fSiu&vekiEr(*ft|Cn4bFp0T-OKQ-rRDcJ9Ba#^X2vHt7`8| zZoXT4Y4Vpm%LCWDyFrHSPI|@dN$){@Yl34Qz@QB0t6WV(^0zHf!|#UKdR^t8xqf%L zB7wRoQs+N$o_gYXKK2|q4yR@(bpV8l$@b8B@Ser#YUyZsG+utwa$@r5t1jEv*?ilW z>xUNCBm2RV*$U^*v$nBGTer*R{M}-y%w0A5p0eekV{f-*U?Shu@?c=^P0P2FK0kx$ znsa2&q-(7+L!Q0*>*|4>XZ4+v&z5&zb>+LVe;Qt!oN;S-Q-pqUa`QEt*7fdsTg2qj zE2W(sj|QiHD!AP{GCynnO8dJhZ&EFFgCD)-S~6n0=gM^=R03dg`>zrgHxLbIYEI-RCWjM_oU=R3l$Tch@> z@FTXb^N+b)%LCf%@2uMjItm6KFYmrS;+*PO`S{uQ_Z}2aGHt4|$+L^I5C6B>-+vNy z{~3MqKZ?5lfKGz4wf{c)GnY?St^MChx_^|Y&93v)0cocB$D#rQIYYK|5ZM3}+JE8w z8@xfHuIS$rb*~j}24&M=fcNhUnBrwihigDdz$pO)>HzK^5K%z&^nc*~4Fc$#{zw2V z0qWLip5@<{o@uD%l(15-8JTWTJ0(n$R7{Qw>KWz0q6zpbGQeK}ZPkAr#duZFe-7fI z_dfVvZ3v~&_NAg$Y3j_BX^2XtoUbPde~`h`yx{vPfc5>e4?shPX~-ExfI8x9#(eoJ ztsq>t5VRfn;G7R$qShUZCJ$@KNX~Q60Ls%!xd<}sF2vu3nxS3-=n$+1D}mlm_@l1! zw{|9}o9tg44R-qQ!l>szDU=|diGJBpoT_Hz{2P(Y+rFg zuR%k0)V|Nv^G$x=Jj7F+iUD1+&vcL3C4r2=ob=TU#>!l`E#}0i^K_s<2b}vIo^b zshC!VXE2fjMO)yA85WQln)Q`z<5S_|0)7E?3kvP0npmukDRh_BGsRYcR)|b@K=T4X z{xW3%l5Zf1K;{suXS-To`|hdx+7nDJf{{`0=7M|WW?Y1rHsCc2uuv{!Idj}6l}1C< z=}-ZwzVk<+H24~HxRbt+j1&>wpoop-zOT!T?(yvFjbavKt;p|mXhAab6zwOu?~s8a zCJ_pUJl%_}v`n0cZhsBX`+x8)8nu0j-;%KS7N{Rf72G_y-4yZ`!?=Z*nb{0b=Pc0* zNS-gd`C%)FA1}MdibLC!MjC+NfC?h`f1$Ss;pF}a3jcF>d<6Qo--0LBm=>>+4qD2^fIvAu+Q0gAzRkQt6?U;+(69pAgdsZ!=g z^Z@kvHB_mr;uKV6Z_F$b+XhIc#C`8-IDilb2$dMX1og_=Wf&HqXu!R*ig8~n+3=P| z*Dpu@#1=_KAF{nvI~M`|SY6HrxrdNmN8&-d;9AdKQw_Am&QJC1gRI^nJccj@nW1>D z!FOw_sTC^)=z1l0L)xS?f}e1YJK7$zI~B>Px6#wLKnK8&J=B1{PY2=cz|*Z%tl+kkY0S=dy}9 zaiUZR=YXrwh%SyFB?+q=bhB5<3er|uYO02m31&){UTNM2+>BX5l$)MTMZIgFdWcEh zjmvl{8Y%Vlfn$s`Oa_TiGFYH%1ZZpSIs8LJ%&eedo(f=YOD`a{Rqn$mt(x|%7b0TAZe215a(&~#LTF!*^BET=}|LX)Efp56 z)-dg5&L=paZYjX-KzszB@Hu4q2CGaDhrDM9l_5u=()1-pL{F|X%)hV!+5zqC1f7Gk z`}oJy(KJ8Vn+q@ZNWV?DQ&8%{z6eKG^t;dxuy0Raqi3V+L_w5{eE*l~G0ZPp+ew}9 z-IL>we^psvhhU#sZ{Y~;-75Dc8@48(zopj2uOJVY$>O@6;u5|JVf2Eu9zjbCQY0YB z7@`7*s%&g9fs+klyhUqjL~eq5O7OHEaFocYawtL@nycbB&;!G}L1;Dv2j^?Wdoqjt zf5F*{^a_D8ks$L=|By1U94qe2tRp*sALq!Doyiaxks5TT{>;us?)A1cU$oH+;1K5F z!#wp3a?`Axm-km*s6g*2&?v9skBUG6MiH8IQ%`5XYoAtk(Yd+}(M@>XTr&rNKk{oi z$#7u~KNpFM*N)LMLN>uKs)`WW%r0OO3sh7kUtCEh)e_xh$phYb+4$E>M&V`e@_3=ZOQ}h=Hb?@oviH_Ke=R+5d{pGb& zYD?tM-Q6nGzIk@{C-z&{^be;Hbp|<5Rh9k7l@XCmJ9g3C+l!D$ieffBJeLa(0Hu#S7mTkMXMIt zmv*dc$&VlY?n1_;!K~zbe%N?ByLKqYKYPfvYoqN=yXV6B-%Ji{w7oOZotwS&!GkgQ zr2ese_7az2Z1I`-henQ7eQ-YRqMjZmc4b_(Z$$JDoO^OQh#iRD{A~5eo{g8@#4Stg ztCv_#j4Y9>yzHq9=Nkq;JC*&hbE`VvX0Jb)y~=r^(WM%jyr=)!W#05i*Ku*sd@cL8 zsl_{6^6gU_UEjJE@80DHe28CM1H1B1+4=`g?bT;GWhe934Giz#X(f8 zwkWmMUbYC*O1BrvML5 z&CHiiZL7LU9ZY&Xm7nbRr04RDCqhy$&uF=l<2}cx3T|fQftoX%I{C$W8_u?xt~{67 z^U73g@XjyCu07@7Q9BvDykq`Ix-YOHEX<0U{|3bKMfJ4KSOp-Pkj_MFrD?zjO!*?5CQx0U~b;^7h?NTug3m0 z>(pdm#Pe%QdP62AgAaFXn|wE8c+*wv(~gKYy2r15w4`|Yshd5-_1c)+^;6pRl)YK& zCg0mRbNTAmi-(U*m|Y3SH!teBGV^XhYtoe$UWh8X@mc1}547f9UHd^4_Fq36;`ZEP zXmbo%CsXAArDly)Y;7CFrr!=t#h!c)sIOlD>g%XQw;el={t&9l(*@xt0%ln)^7s+ z^%kJNUf`v_UU2{MAAIzGMd7?7s{k2UQ2Pu>jaKb6zx)xD%GRq0?H2Q2Iy*9{3(+yCsBGS zQw-nAPTf}EZe@C|^Hx;@^f*rg1IqxN&*iMQ59#jRdU|VJ8&~67h?7`8onLL`9J19I zSfgEAXD3feHM~DjE*keF>(>#561KY?yi?rWXh_$PBvz^_Vu<3cjEmW0MT+S>{=f?K zf_08mhnc$ZRJt?SBy$`;h_q9u$-rQaL&4I>x{!o@ zu5cEYYUqW6u!y`v(u%d_RZJnFvS+3z7J6|COU)UW5GMFZ0#j$GEI`{Ch1ry!dFL^b zQ=jzohcOk#H2R`Mo}IEjzke&up)|6diJ)~Y#P=8t5m41sEcZvN+6cHMF{tqZTg_HP zCjvm86qsJTj`UcV6gv4FozP8jrIwsv_5`a_7lLQyN5HwAAVgw>QC;G@!i6R@Ye9`O zu93p~rI`KvYq-tBSBCbLa%f$65GII<48~2$2bgZ0X|`pHjBv4tWn~OUG@b}yhfZ-u zyfcD})A)4qQVWj)V#G3$1`TD68R)eXP87Fks0M*p8?-_!Arn}Cp-5GVo|o8t0)RMz z%hE&5C&)kxt#3*zM5oE*P`bdkyCqE6m{{7T71&Ptn*r(^r!G=+Y*9PuViW(2&&_dQ z_z&=r+liDXCseN(^37YDiP`BUzokNQ=m3GWq$LlK)9K~QSf4UN>8oVQP))qYis45B znXWVMs|dYP;2Ex(5-0$AlrAVIP&hMyPy2sqpKj{8ZvHQGgJ; zBSKs?itTG+j_?iCToLFDj{l~r$L6#oVD5Iu0oD_fXbm^iiHw|z3?8>K0iCNuFEH3u zA)PQLD)~9Qou>zza>!IlnIwk!>EtdUgi|pr|LFU*+~Z_3KkpbhJ9JJ_Xp3Ot&oxUG z#fL~W!xyg>qIgvTQAXsL{JzSc-wsysK&8R%qL(p*k4s{91W2ThLnSFtJ;swLxDd|8 z=7t)j7(yYj9ItOjE$EpXf>Ju}ZU7!#iM8htbOSCLJk)FJ?he3Im5j-SmG#Yc$Dq#>{zgP6l>b9jHF;DGuW2iBET8i`r#N zp=8iJD!KxToWYd+4qgsgYv!dKLXMK~QSQN`0i%(aS-D%?o_wqu^%hgnpi2>)x~UvNk%`U!?EZ! z9FBk;TEP>2W;M-Gf?n+-V40M|q!P>md(u^bW1?!itKwahLm$f8yK$$7x#t6 ztXzg^+XN-4K&-T!Dk*_qo7yciDms`ewq)vin}7El=Lw-Smfk6Qs4Co95o(&xbGvJKgxt6ujiCIVt!dyG{u4Y2C*nt3&*73-l0#N6 z&yg&$8SD`eSER^wYv!bI|Zb9EC4t zPkLBgwv#SA>I?xV!@@n$bTHoF3*V<4#OJ{$df%qiPLFTQNgl`PwawYa3UwmaUNCOHd?avfvo9bN zCvG8Yo5MOIIEcy3HK606#xq0>9*)*n&d4NZA>7M}Ih1U?%fd!VOyL$fL$WJNux8dB z4SIyY1{^}reMEN4Iv%@o4omB^Nj~!TiOuPi$!uvXU)f#wTfg*`eq@@7NF(MKm}^iQ znodRAJ}GwA#*@7myCpUUNg^u+;vt!RI@b0EEwsB>s@J1RZs&SWwy)_-j=#Ut!M0<# zSVzXMcBLSKqjLol6q6uI36v34rv+jd@^&DPw-A-mskf=4od$-AOWKO5Cx|BO{4XFAFEDR`dpbS!-P2NU7rGQ|YDm{+4uw3Oy^x=&k_2~7#S z5mpsIhewQ7JjGEsf|Zs&Bo!4%cNN8O?oRw7{kwLz+DFB^35`O4h&P44SppDC)O|P1 z-wKgU1iP8+(1Zdxfdar$Xic~hQMl{ioUC}_Rj{q?!x{uET_JLSdE)+#0hdh4U{2QH ztQ$a6fJR$I@=iogw@^5|d4L@9PMKDaG+s)|DpAyTZrE~e;2FO#B47kfe5j0WPq2(d9$VuoKQ?L(V%BO3)0?a8M2gK0`bHz<- zXh_k7xtaD9M&l*o`q7f`BRbP3Prv)8jTvr5t2JPVxSzP?n!z=aweQ+ z=4kOUA)lOfQepPf3(#O!;aAKkEd(E{1plNiiVy6v8%JfXgzgc!Q6||uLT6SDwXbat zvXUuM7_(;FUYeRV#g?urO2X~kT+vH>rL{a690#QS7EAO+XFD~DvZPHF#UfK;dTD;= z-J#8fFcu9pujw+lxMoQ=n0_I05q&Znqv@Ki=}MuKvhcn{C0DD^x;k8 zmh4l+?;X7$a`p))Q z*Z74$QMr32p73v-e|EtLng}FmPaT}uGIsC>Ft-`8B}t@_3o0?ZzlGC-)GNz&vawjLao|`w#x}M{%(yGeuq)E=4Iuq0X-6XXn%em$EqmKN; zBSh@*6Js-Lb3d9Kj?5*lu8qyzGWOKA+_5o#%kca+@ADzP?IH3F{wOJ+tD5xvq*IfAoj>xRFCf5#Y{-4&dg|-L>&GS| zQ#XuiEm@C@t(ezyd2-3N)JrqlLZJ=j?{Yh5ay$BZMsKVc{`_X@bI(-P2Ti7<;oNclA5e^(!%bJ=Zq9+tWLl^UAgp6PqCJY&xek>+2iWH}_qixHi+*eB<+# z^>0nw{I>7wnN8PvzMY)e4+V|aFE5^{y18wpXJT^mD>G2g+;{%wrg!@$W^Qim*)TEv z-3J$dqq+_bde%~3rjKol9ln23yRzfykq6OM|BpQrPt|u&GcoVwlGlye+`O@1?aU*S zvD>y?n#_-=w@*+TQwJuT9Wx(}T{Q!bTj1yK1Va1kZ!VgdIe2~JOl}#tT&A+usrJ;w z(Hn22el)XxQ(wZwnoU*b2WuxceObSM^2X-A`kO01s&5(plnu$6SumEhc4pJeFkq>G zzIfd@4#NnHkrOlDZK{XXL&1r4kv#)5Lr?YeOiYZQ`nam1;KJ0Q>7J4qX2m~XUwZv0 zkNq5OcXR=0WnK?S!_Rn?pua6Jrece9OZzYNW7_Y2Qr|rPLwy7I%l~C{lm3@FxCKmj ze-F4b>^yP01N# zUf@exJbNJAt|b%T6MdV3XFD;PDZ6*MJnsrb3nI00Fys9n1-K{MeJ@%OKvC(ZeZN`{ z`+I%mdESsh$P|Wn|KG}lBHPi6w6e^1Fj2X^@}u~`yGqr2l&5g>YRT#&d1%U!2d}ci zc7_$U(zU!6=)OTEG~+fBR|iIO#k-K%ltRxOkex_rk(7qU3-<+5w2ykbHI+jMfCUkn zk#auXuwO_w(c@)T8e{~zVXnrx!oj9$3dNVvsbVLhka%CJlPHeC`JKu)AxzFercol$ zRWrr&Ft`Ffx0)_N_`)tU4QB%Vf3r+-kn6A{Y*nuh({@2s;^^khC)55s=9`2LX0v&? zCG*EX^3lM;UdkgT5oV{y*cs>qNM?S|Q7o)?2e>-U5jGIQ2PCQkuS9^LNno_3)=E`k zp*idvfNqNc;}Wgy&Q1`Lh$HzY$+MCG{-_{^C)3`K3F9g{!4^l9cO{{H=HCdgWGf;? zYP~XCS*s{gOL`Bb5Cp)p)+4;?2u9E@MJ)*{xQK=z(Kr<=FtiY-;a0Knv|8Fh?Kg5c z45wA1<)9CGZ1eCGlujXy$y?Fy25bOI+S$siW*b8~(?p!uPOtXR$2!9q9eR#l?lShe zVsMg<#6pJ>5etnwPeYiVf)@(FRg2UsJem;4jh-s2WrLm+Oi`I8_ zk0(&gEG2k-HvjGfCJSt(|gsd#gW-2Kez5+!(O zDd1+ncI)U?Opf<2aJW*q3Fya9n_Kf7qB3aIiUiinKj=;NmlTSYC|a;upb_3=g?r>yGWttyeSx=< z)G8&4)2rg4^1xc}#kQkvzw*Y5Bnw~EFc&{go%-O9ja8w9{O)k88QF4bN7t-{?#!Rgy&;Ov}g zZ$0AwOQM2KA{m9kTaWjGhtPYy-STFfa|ne0%MF2kyOlKTVS`>kZ}jBt(|YI~0HrMO zQ_$WszuXybPRQmh0~P(__G9o5J~0gAtA+(EBcR6+sCWVOPTZyG7^eWmul;g>Y z-)%rJmPO(U>|`O|B`OR9_&m8ZgP{ZL(IRFDtrivulqw7}(3&|s1-PNMx13cPx5a2swYgXFQ}-Sd*dF|4|$Ylitj*HF(*)f7yPtc6pE8f4|n> zJ9S$?KWC+ngf9P&+kcQh_04-xXv6Ii_|Hx7)`ct1w8P*u@G&}wSD4-cG3W#O6nXT_GnigN)(2Oc@-nU{UlMi!8=_IkDbOFZ4I;3KW6i?pv$R!v!MK~TXXA9!7=pzAMU@m zCqMP@$ZqdY_;T!hFad65ODN2 z-r4iW?J3phooFGeHwg+`p_8k;(i>Uxe(UW$1dMyHOVW(DHU84A zG}++2s$PWf9`Ec3->2}9!*}ODW`u^gg(-B`miK>>nfC@6)gZ*5gzBB%SFv!HeirI4 z8Q^0Vy7*cBzjMz(=sic_W&Q7LGpGN}jMIx2{X6wRBYXbMjK4PWUkLP9N&X7~{W>Q9 zg@As2y8pR=ew~8;xqN<|%>RXa6u(YE|3X5)PC@@%K)+5w|6D%5PC@@dKEF;u|4Kl= zPC@@%LcdNy|6D%5PC@@dKEF;u|4Kl=PC@@%LjRwpAXv`R!AhBhwCYv2mvr5Yh)y6H z5z>OwG#xGiFdJ-oC8`5@=5SGLBHb!jA70rEApGb&@p@>Si?{BuRtO2A1o*tK9CwCV&zr z0Syi^Hy}7{DEurWG?Hv0NvOar2!bcJ@HgINbO3CDg11)k^-AcDeimGi6jg93T%iXG z5DM10TZ`FxNtv$rasA6s2-dCLh0rGGHLOj0HypB}a7fodE+uh3hqFUFkrZbk!dK(J!{d7!S4g^SmJF8A_)+IWVEaj}1={LD zzunz#zoDYu7|Q15L@_80)%0rQLd;HJ@)Po%u0qfv}+H0-;c;Cq{UZ5q^b>)0!6G#v7& zyhkMMeI}J#6};Z_-OrV64&L^$c;zk{>ULs74ER)mjh{+%wXzjY32xQ3N61R`7F8 zM1)!HJM|jUy%U!hU$VYnish6~?Q^yQynv3e z8e{0~=GTwLo=HZo@#qfgH%)|XPqc%niMhw98x7SJuZ=g>dO^_g`NdomGT2!ZgD+$X z4`3ELi8_uq6OMtRotSYb?Qxnr$26m<;<-d&+?p{rv0}U~rgSvuGWcc2X<#V$z|i4T ziXE83SEY#a+L3I6(qDwR#k;w|^1%9NN<>US0&_Y0&^?Py8ldNaQ%e~|&JhM*6%NNo zC~Pje%0e$?XoaBY4ue6fZ*nBVFrer1R1PpM&~Wn%U6iQL#J2_g#u6Vxva7Jw2mJOC zPm)5Tut?Mtj>@G-09CVEyO9letgV3Wmz$|#i%IqywAID5;1?H(S4=T(sbE7lZ8%AU zN})25!^jmDOq3}guWb}c$na5yk{06rjdK?Jbn>QlG!}oz^6Xp;f(+(jR_J56GOh&; zQ0WH%-&(l?H)II35MSdDeGnu&j2%mtDITvw3kJU^>6kf4J{ z1zJnh#^`&K13L>OjwD5647;?M5auwC))hELD&ME*9ex#*#Hx>!S{*Wbr^1&==N%MT zS|crM1W&CvHCiKQL8O28})w=0A>#-Rvx4 zEi}&mXbxzgm^h3<8wHc{WxoaqTXmMEkCaN%{w9n{A>)Pg(2M(Uq#N_4Y*Hr9>tB+Yt&&WaNc5wBy?tN>D3iZ)Z}dX66|ns*EnTvSmL8bSK3kOZ2p zYd$6T*2-+rdg(}=ZXLjO>2eU0ya%DI&CCihy_vSvFo|7!**Ndu!#FL~B!+bGsM%GfNK`inndODnqa#_H&$J-fLJ;ZWB*N^zPKHw~t}r)?IyL4%%{ac7 zmXIB|Z#NbeU!f#cp%Fa5aPdbN=?wjq%=QPc%A#m|yR9@2Pa%mWEr*ma)jMoLKnyxN zbCrxsZa}cOx%{pO9!>V(ZgnLt!aD@@1w-yCyMmB#p&KJaa8CCfEP@w<(BdKB6|K?V zrBlt7d>L0EeCm{Hcw8a>n0h}%6%{sP0Nhj!|H5{MfzP#Lrrao2>C8oVD>8 zcIUZLJe#}NH4=|kiQpF*b~G~r5B#*YO-#eJ^5{8I=QIb5Ab2^O=#uK$alZPC+Vt0J zJPR4^RQxI3g})Tn`1>AU+jbp5vvEv2pL|$2owIXkbf@q&fCx)F5_ed zn|wIDqB?drdH0Ft=g3Scg*NmjH!|h^+s~~WBwGaZB0GY2m3vCt5f#5UlKe+wo_IdO}At{QmNJ$cyi;9C6K0eX*@-n&|sB z`uEoDHBsmPTJk0~S)26CruwhjeS3qRd}rp6y{h%P-|7ua)Jx;tryl-O)#ZtglYlYN zFjF4=-L+G)$!Q3+g#J}L`ql3!jZwisQsUD6Os1vfG_KGlM4!l11yh3 zJRCId`z5LKM>1DVHnwgVOP@DfIbpoN{*}f9six~q&%AtN#&rFK1E>C4e>BGQXQJo$ zjkh1J@4Pbmou22$zQkY7sIQ)Cy64MzJr!3B8TCc)px1Vxsmn(m80rwNKeMIh~u>kmI181?k^)+hSjx`H@6C`cIo-DHpT@yQ44Qi*H3@WuDH`d!UYKl{ zbF4clBxgE*Z|dXMo*}b_rYy}H_T-v@yL5^D>YU`P`){srY_`>}xcT_t40iK%Th-?A zQ}5h3x}@StSyIOfHx~Rbb7kg>tuw9P#9xm+_~5-gvu|wNJu^Axnx07;&q>ZY|F;v@ z{XeNn9RFc+PvtdjZ}|fdqkOF{bv5zPN7o+r?`Zz`p794~hrJOMcEym|@x(RTwQn19 zoiDzebg1X^>l0n|?@u=#tH(xNYhauZuB_VYU*D7a@W`owcR&Bo_x$y5Iy*kPk@QYa z^UUG!)b*dTpKGt}Go(H>HScuC`bj3+>+GKrV*jf4=H>hQ635G4%B5~Rm(&_D@_b*% z+NtpCGet9}7w0COY|BMvY76?3ZWPpS>*@b^B7!<`KI{0EhlXd8CidIEtpmj5%656Y zu6XkYt+eKsaN)CfthO@yL>J$tjk$NLrMB}Hg0HYRIC=i%2wT+haoPsRO|YvzA2^}S?y*itTY7+z za|^)i?jN(!S>`Qkrh$Luc*y3F>&j1`%lq7#VDWh#v32=Mh<`V9YhWT zvrKlSH*&aQ^Xb-jh&O&2Vw53r_`6}^rfK9grUrYSa#(Ce;LDWe4YKzpg&aSNj?;k= zOynXURQ^mmjY7>|38PZ{?9c>yc4#UM*iNx&uNJ?4JNKuMdpG26-ozZ*B+MaF>9e3} z4gk!-KvA27x)LuYY9b~3RCYxmU=`nvG(HTG#!u7m(xk z5i)X!igzKgtlC(-++plSdBIkV`n8luVempnUrk=LShU)lgSDs?y;v{BoRI>lsW zA5rSGtsT*EJIp1h{oK|fcF0!P;PlpIE@RLpAmLfUstL9>qT^mlf>6|t3gW7S7 z)ul;E=nk|3cp`4-9$Y2OP16f#1u914iv8%>Cs?+UFd z)Z_&0ijR~xgwDajP!q%#ib%Kk8epdm7@udVtY0-Y(W|uNJX3yWJ0Ma~#G>^0Deh_~ z1fw6}6zHLU zQmPDXx5(@sUV;DuH!G7)qO=8zBk$l&ncP$~gPuWai6nuDJeyqI#HAme-AHwkY^0DV z$W0#hNV-@`o+X-i6Dc_9%Ct`XY)vG?`W>9p$j=U@0!p!LTBOa5@{wLcbT(NN7|X~< z{E4z%U1nM8b_GYT4moQkGKx{{-#Fwf>*4j*T4n_Rq+&bFzUfq5DcZuM1>+EGUG0g$ zq>JoXR@uddA7Us1m9}Em#`w{*nQ1;lpt<_V(^J;T>ktih zm{3LR*4Onx{U+*q)`j z4ACfR%ftJN8u{%yTN>vtl_qx9nvQWr1T`my+EMKg{ut9Ql|{$vGI%n9dmm7~@hLTSTbyR8i)0uG=swYXcgDUDmc_N;@ThC%@0b(2UHL_7dF5{O8m|KlA zkr>%U%I;Z}6yry09!2hkHyer|iUl>KVwbW)B_V&o^d#5KN|Z2dZSet$)#sQJVwF(V zD>vheDWOKHA}{b;X%@SHd(6vvNin#aMbP#|WbmD`(;WT&_ab zZnnhv$=&AXYX#EeWXcB81{`EdDRY#O(IGTlisw|%qP*1+u+?g0$vm=CAdZj@4-r>* zzW7dq+R(*^Nfr0(hEZ=~bA=s-qA?>1u^glm5Wa$NdtQ7FN@Bi5KF%pa5nfn{d2ojq ziWjNk#(6nFAkT{80HPs_?m$zBbxa+Zs74rx4B#~OZeB~Z@prB4XVvAzFk-L4V@wQy zL6OPXe1kUvn{IianG`k{c2E_Aq;Inrfb6!);o>OZ5Qd|qI9Q{WiU9^&I#3#~$~z+x z12n?(YKh~k((O$}fwjC|U5>N1GNBe-FfP^~Rq^0c3(A>KI@-w?Gzzv*4XPt7(Phi9 z4iv+Q3jH`Q1&QUX!XU^MDiIbGX^1o?-7>Aj-7Nwhsa5!>6P1c`Nvjmy60Q;fCr?m_ zPPB8{ z6#lK<=~PnAeJ|15n_5oECwuv4pM6I1jTu==`xhoRWd}>T&(OLL52J%ZUIlXJrgX>A z1&Mh?yHH^GLSP29E+))CRk>a~@Ni9V&BG-A=0U37FtK^wuJ zQq^az`P-V>Vn14_ zkD0kVT8qE%Y1HTpo_B-HHC@gAYftqj8Iw77h&!(rRHg0=m!SGMkN9s9@n{?M~!JP9_0-=@)K3-kLIDt&QnO7~5js zW|&COEtx;E(zzsiV)el+^E(~aKY8iZn3R|e2ebZqt$+O0E3aN2_8)b*>eIi@pWGZB zk}#I{ebl_0$IvCABM)ART6nYn;DZMrTre{{3UE;2W0P%JsiT+rT2~IQjLiyJ@pbQa zqc_*o_@~zYb>i?hS<=1nNF zlYjg3@ZlM$I5+8K-xN#Fvr{uqRGpf6F?n0b=%!?VEFw0}?Ax+t;t6BNJy%}%^v&jb zib8J8ynSQI`fgNR|9<88eRS4}adS%LW7l_W+qk7~{OVY1 z^zTl+`AU7zwDqs`m#=4y^bCz1tkqq|+BPic%erdr%l&*JW#cFIlHRO|E2+~xsS{Hx zh9hpGb>%4~=9fQTynWjXcl@lK{ROGaUJcQ}qw<#fL62fW%(p>vcirYoISo<15uVog z-oQn=K+v~#RaD)Eeex+RLZu)#sRs4&c+Q z03=@Bv8v@>9H`~fXnzlKQ`_GYFez<01tG|9R*aokkacVK;m96RMp~& z*42Ol6{}ar5&nlm7CeS~#VEJ>CpJK=q7oD9U z*wd)Bz@_KgZ^|H0WRB_CbnyWhS&OWT-@{{}t{OY#U(|?D4i8z8P1?Gw<KK%kbD*Gj-D8WX!4xrCG(r?GK%&6wo*1(k38DAaJ94|Ev%P zn$xckjItq3^s%B1*be$MLROPIP_l5)9?$XF%+h_070hXt52i0>SVE~~#Yt(D5JsLr zQ;GD0 zYWY9nDs~QHvINqVdB-wH%bebdvoW40EAIEOB^gqPw2ycpFf;~bqlD(P6uNIkLUvM| zrcj6p@Y$~;Xw*mTR!OUbOhpNB)ms}#fj*keDwsGA_8P5wJfbER=Ks!0k1J00DAJL^cB4j$sQ*t zIjmSz<6N=k2<1=2sq^T-Xr7U`qpO^Wt~tJ;ES@8iY;qH`O29fEOc^DS@@!i-`r=vK z-n;Ig)E|ggM0~s1G*X1J1Ay9CwEs7PNbd?ugK01N$YE!X~o-@ zhZOg3Mjj(#Z1a8~$AQXj#n$}qD7mX2&8a-^S5skHPAxR@A7W^+guW=viP=Dy0o-v; zx2byluHJO3FSeg)!_{E|ke|rQ5wZs3N~7Pm`rS=Sv@V)63J2usM642(OO4S@ic%qi z4WhM}a4uV2&L*(UyjH_fNhnLahKaRe5);}6rZXe$lwMn~)kO;)w2;F_|5y@7-ortV zJ@ccJkV6=WuMydD(Olb@#1utyh53>vCw}~pfMcE5QY4c6QS<=zb_mf`OGRPN+vv0$ z;!A?rzB+{Or!tu@y&3_S?L{@1SD(qsnH=BUWbZLvJAB#N~B#A+R z2lO$x{XQ`P)L@~SdfLec=3{s!!|9`wi;+VJSBD;<45u+738!*C5FF_yNBk5MDmeyf zJeYBW zAP6P{;?wBTT1wBTI1>0z={O2Y?C{C$g6!CqSpN6O? ztfc}aMg=^eEDPNWwEXo^sv0+Wcpdkj_G&D7R#G&>oV}MhM!Q8UMl@Cj?tYpFRAL7@ zZmZKbnShvNwiMu*zjo`oT1QGCqUEaTC~S?K{x%b{u7|SXjy<$?ACV<(WjZq|>~*dj zB8t7s<8aZ5X>>5v6MVNw2PMZKW`cc;1|JC35>dGeZ$cd_0DPb z{v1<;vnm=hY8I1@0?_Ixk0KCNWlM1o9!#;(KnlY?EK?ULRY+IBN<<1jfHR)-!v1RE z8~{Tho#ZkSH(KbY)y~+5z(|qfTPdunK7#Oo5ho+mH{u%dLvAfVVA;P&Z)UM5AY?Xi zo^*STl@~;bDO1{c7prG?vm`GFnZlBZyI5MF@MG+`J(+^MmQsdFgJ^LzSXdcU6w1K4 z#~dyESt83jQTfQ}*RVvKyGyJf`K`rhTj2z-L*c9+rKQmUBoCJ09KE#4gZf0{Y&_@O ziyzs$bA?!Xj?J)aR7Rk}rtl(-L$zamT;Mv|uHkT@h-PY8cQxHWoP-yfyM{sle*y86 zqiJ__U0g-CB{2_E(n%OB2PQ5je4WkyBp5Occa#fr(e63Kk8eMV74-_pd0{7E*MQ5C zk4(g?DVtCu13@y9(2PEQn>f$Xv;ah`CfwMNa~!S9 z46c2#v4+$AHc-AJu$J~WC8deMy5b?wfwQ*<=dD)4vXEN>Esa;CufBs&GyonH;4E~{ z#YCM_Q4E?}9Ib&UcJMM0G(;JCH{e2PDUBYosTFQbNMZ^&3MdLmt{LF2;=pYQO6w6M zX6m>~4_Y6g2nBsjfyN&rSqUw=47XcuD4 z%NUb{%_g$v@)h(Tx|Qv(9ian>lI4|5`~d)Fdjv4vR{$#gD(SD*Dl(6M($vmd=@2f* zwlt%#mjnnSY+#db)ZQ1g4=*p8;!t~ym0HfB*{-mnAQ=ro>CiM56-pRWZTH1CWqgLb z`l|%yNwgdPOOd~z9rDk17)U3nOXxOy6@Zx0%gGd?w1(w@RTC>XmlIk{66Wkn zi_4d1`0iC}yYqt`=H*zb+$I@il@`t8(mhKq6DDID(L`$2qC-rEf~RAu?fk~BD)9jM2Lymm1h8Ua!Hs33(&{Q%3_T=WDm}pDoofm3=Z!9w zjjGv7wiH&e&7L_xo@{9Je4Yz>+~kS{VE@sfK$o#{!SKYWc0tyQH%t?`^qYQdX#a`{ zB!5$WYWv6nZT+3h(eyHlXo4>byj#d3_MD_q@${!Y8HdWP4TdxcgzE_IH zkWW5XH+*2SKJhQ#Z%%FfWYpH(S~)Uwf7G9!5Boels%8Ab*(G}?x4Aa_J}T(@k7n?B zS;XtRu4Z4ZdSi@=*p_(ZP;A1@B^jfk$Lil2n+ODQ%9z-1**#O;a&UfC{N#IAc7DDZ zka`y{8LsW8KAtzSAf)w;u`e?_J{o@zo%2?T?vdpSx&O9oLq;E7*>N=E*&re-=EjQ; zSB+dj-_AWX_5r@c@4S5Vkhu@2B{mF?ji=Y?-tM{-KazH7Sh%)(Yt}+9jH*HOW z<@ZsK_wT(at(|%C+`KC*-*5fljiZwvXFoC-viA^n?HnEze+EQE!Z_e6VBncz#Fj zifh}+tm9Xkj2p-#DnT3a$hfH>%X#x*BGo=le3jZcV|%${^T?%yDEz%tt0yGrig>F2 z__frRh7XOtQW3TKGw!`(qdnr1C%#D^UpqWg1Ugw2U_4FsHBUEk^`A|=|Kg3#g~=V( z!KbDTgIS?7=kfub*K#m*_4ShcKV9#exV|web>jLxT;KVLHI+{t?%Oi+-s8ikCf|Q4 z<^7i(tzc?9lH~b8W-p}O#4fuzUVej>Rf&>0! z%IP(=0Z8xJ+aSH)_P0LFA7B7#_8%a6i+u~SzX01Apz%e3D4l?ZfSGNSp_AyeeKE+Z#nF+{n^MT} z3s9{T!IXMIL?S$U06}VqF5q(j2jnNX-k}9mfkSfbT1=Z06Q02ble2NNFGZ#m#rM$5 z&k7`!!3VVQSav*H$_N?3XzD>_0wFs*bhdM68Y4ZLQ-BoU{Ub(BA#8;g%NXWxtE=_zQ_g1PDN**Xnx3ppAqpitQ=k8M2iMV7W6aD zbe6^>N=5NPCAwdu!}-DV1%6UVHciE`Ul2zt?h%8V^#N-?BGBg4G~h)M?t2v_mr;W5 zA^ugg#6GVGkeKM$0#-xVi#kngLcdSHVDT%V5bcu)J^+vo`ZlTnt;+z;g21l*mZiys zEuEEUrdV<3Dc@B&_qCwB*+U~*9ae)I?=1#HfQP=}d7RNjxB!W})}tog|~J z={n8i1QoYxJXCYm^jHfyFVk=9@)|Im5lI0; zgiuuN1Xhh=f!i4WY*Shg>i1bA(JSPKS~-J39H){i3Q#K=dzy*l%LYms=`xpGo>8h< zKf<%QH~&jvP=WVn5ZPa*ip0Rw5UxySqjQd!R|yQ~qhaW5t^sAh510eJP>&UaS1742 zA5DUUD}=ci31}XAl#?>L9nqFmMPPG?{7-NcGpH2_enJ$cCR&c1Bm#42g_+}=EZFk| zMY_PtCLuxzfytY|mpKo*L zWm?lJwN;kq4r|+iuQZdjjgW}rkY&J=fd#e`PTc&tER2ZAQr~j^eW&$=MK_ggp&f8y z13J6VSjPp?0n*z+_6yX3M%PP#2IgPsAG!Ng;dh5z*>jpq524+2!;cWGcAhnobso=u zA*Z5w-(a?HDOH2m%3^R@n=c(kdU;iG7nzLQE1G8Ar!+g6itJ8I3%8elhSm|zPVoLM z2?tYm7b0L4s_+2*5F%)h_=@Ztg~=kP8SYJ1gmVXQ)lu@8SZH$=;mPrNoYGy3mtdyq z59VM=qDj;+_r4@W0u?CW1pB(e#b7p|07yl;=ZRmSQZ!l9a;7l$;|R*Pg+-iU$-zbQ zDBrK~4B`de)b_#FYzrR7mZ^#@Y%#HxR`|(h_ddrefcFuXKWmQN7#HJ^SZy@@MH;ys zGpfa8TQ?`$G!KYfQgSt`t)l{>`Qn!7LCU7#IJ7bGg2cK6{tQ1Ln!3pVn?@}3;D$jU zy}%vC*j z)qYvY?Vzb-4}}XyP$`FVV5D*`RT1s$1J+!Uu)=q>K`A*@gj>Z0v%+@kk+t)Flf-(Y zLTn1rW)uPJi1eC-#PDf_YNL?PQC*_$EO(9<)s;0yJI7_R1a6K_cGTenY2V5ZF7==- zVJuxbjw2FbVauqyk_C+CUo!c7e7YM?5V9o+%+LRauy>DZ+TQ=i+pgz)>OMQ4A4x+A z6@i3MLMfNl9<9y^NmB?=Kngl^7c8Q~%Z8wHZgZ2QDWq6HkU88uB8ZBc6GgVUyDfF% zreok`?sAR;*<@F3xmXeP_vW0>_xIoL_v4Q|c=$+CY?Ji;d_8Y1qNAN|$d{%KP)s-E z!?`5_P`YBr5D6TXX>JB(tdwLwwdfQocSyOEmU##v<9_r)@-#(S8z=UmZC2O~sIM3i z;3F^#!BX&BtU#zl>642WmF-`JL?^`5LJR z7l>vnt?n?g50?E`HZlk2ge<8qTeT7p=2YzfYDeqPTAS`XE9iAz0gRf&-6MkHpd4N4 zRf+h3Q%34Dr6uS*9p+o0>1IbEuWo-^TC*74XymMl)3^op6>(J6aPLAZgHlx6N=j0j zulqW-G&8+aw91wtn88!q=ybAHQM$l{hCD(=+l6Qv2i>YB;#?&<9!q9(OE?z_^p{@Z z7D8++Via8ULK373DRNNDRcj{{E27%*m|qdDhNoz^jGV(K;BX|Nm1=|l?AvG@@@~dY zkfkehjM11BZsXKVq>f(&WjiSeW|ea(1lw3^6bYBUPmP0YK|Nmef0>7KGbW5`l{V`Vc}yQJe^`ph#9KIX(=_Bvpm{XR(`~X%Zr4qPjA4E%+#D~I)jTS`E^H?A5Zp0Z0 zq(Xs?K8=DQ2-#RoXHp>IfI9>%W|fcGsTQ#Aebw@pDE z0=k|l+NEdBgVn)H|5{0$D`?}QpC?SKqjF8n3w+e<+Bmjfz#1?Xzqw{#CO$jQ><5%>k?P^;cWc}&GMG4GT)PT;Zrg%LF; zw0A+QzIovRWew*n>nOHVW?kh5g_k`8g4cMB-^IpX=KTp5A&$Jm+E_d)1~34hCmFU%wJGD|Zvpr!`KCZ_+aw6$=zbYO(#*ztLe zxXP$XxV&(9Z{GE>`7b}tIHw}AKMMW+?|CJo{@V-v<>(mEx!91Z`sd)}qHh}(2O4L$ z!jqwvs4G+NH?*1_99&cW^ogwl3j%X&T}a?Xa^Ku*l9+JZn&?;rj@j8Tr^vb)dtpDinH z8W|n`hq`#QQtu~@e)e|7!KvQ^&qnNc{9h#vx*uu-g_|29{(kX?+lx$H!hr4to>tzjCksrSCTt zJEj^I_kZH2iW(a4e6+CP!Prk*u6ZY3aj)MMR}K`JFaG|H^Ru#vmN&b04Hkhg=?nk3 z`SRfTiOrX8{yBMmMT2vq=xSH;?H^w4e?kg4QM);5)uzqa0c!oC_cu+Q?d;P2dhDb2 zsp^i@@DKi&pYMub7&?)iFhV zxXOf=6BW;%q%Y5&L}4d&+*!?_Bk`8&Gw{i!KWO zGqZ0E?Th2WK6h{3^gF*5A16Is1%n{FH)65+g8kgE>G>RB8@u&yb)=o2kz8)JpTf49 zKh|$GjDr@>g29Mw>LKV;^J*_1&7pX^| zp(4MTdkJu7nO&fLg__ye|FDB9-G!6F6Lmlod6^7cR!4ON&cI{FDm_Fbg`9=^z~J zqEEs1v_dks?^t=`wt?Ka`NZpt&ahN7FQ1qz9~-C8XQ?_gk@^}Q;Tyeiz4bQDd3qUx ze~$P5RAMO7Eu>pk{bwgryZ~xM_ITsCdYiAFUQm=tHdpYF=bha*zdxBU*`rbp6&gj}X z>&O9XA;%mVz(J|3~nV{4WA-f3<7E8^W9e2ex#0o zu~^ZA0<85liw$EkH?C)NK#gRk#aKO_2`SXJPE{!m;j4xy-T;GUz#_y+R>I6E-Az*h zbP63U9K=#v2{+ZOMx8WKsrJDfqw&G#F|;pEFas@Qkc25F5)CipW1voqdnZE}r@UOG>%1uGjDa*5;f1xlCCx}=F{P}uS55*qJ? zDA_hW*?|IUh>hQ!54v+gfXozALO$3z3dz!KLO6tTz3XC)kZPR7LRy3xL1*Wbl`ukP zz6tDd9gsstb!JJ=pJ zNFgs-0$K`exCEFkah8EmM4(i1G83U?sFVFG$t3}YBe_yoBCd2qbCg1ezMMbrpL6&n zO467nS2l`8X);Dxhzr$!O#$x3Fl0aTwNf4`3^s;dr8$x6gqshO?!V57$3qoiND7n& z@~K6HHbl@q3R_7E;Ow3i)JU6DmydoLPZ*vvIs;|!akInE;&rx&-JKbrh9ibm^_8_m z(Ts<62Vg2Gv>|(|v1HZ9dYC@+UIY_h5%)rbh)P$Q7;YZ}g#-m#o$5V!T2up-(I@e-R==lc!quQvBvmwI0(J=qOnpp6hLW> zAjOkIsXh{p{mU-7s-mM4Nz^DQT>d5n7BE0;r)fesD>MqhibkSFNeQJ&idBT!9n}=^ z5NRIb3fZ(40(TOP?KaN52W2_u*td&_b@px=JQLO!pT(IzB^?}i%4=KSgsqIMuN2Gx$zE^!xM zm@E{jjuQk!8hd^`%2)KsVm`r#OmnA?lFJ1`$l@+xyE*|drDQo!Zj!qUNATsKPHBK_ zHrClFB7y>SpN?HPsxxz*&c_)vb^wuCFQHH1NS=I&N zvgj#<%N!QsW$GT@UOOlI+FSB80w$XmrZK1ouP0graQO&NHVJJKJZ%>rUcgGoRp5^E zLObCl6qKR`N=tk}(LeAIxd04X_S{BEh&$bgV*7cOk7eO=eCW5h2`Q~QlZ7V6HZX%+ zS!W*2eLxU{0yT=l^d7=pc?nGGFOkY2aAkWjoCxEhPr`=9E-Sr?f;9HNxPv5?iyR$2 z!Qdvi_pfWtcZiEED~0qvhS@=r**X>fWvOeGn@@mp#W-c^yZ@twFNt6X!vObgRZ&|S z-iDb=`3xi$G;LZ7$@mdeuK@@(#!iRiBjIfrLx<5c;NT*f*oYBMRBnJRA~uUMS)|7? zh>gh4MnRr-u1KEl?)8>HH@NV3AtaxNuqZFmXcSLFUn4T4+S&#vG&YH3<3trFPtK>f zW<72#6sqzWoQlhuja&7214VGiD97a6Hty>!ZOWlQS!oFNXsMeqVd-{>K_W?_`3Gt!DT0SSPW9R!_H1P8wxwg8e8z05Cpo)-jis}~) z0^^p3DA*7ZmG6hDI|SMh4?Js~0vDp#`2_`9f?-Jw=NJ)yV^EOfiXjLBv=g&HZa^Hx zpCpzt@isQPnRfx@W!l5KpzE?kU}zi2&lS}mRKJL*$8mNJTkVz#J5kXya$W)q z**oYQDviWrC_MfVNtPZJJ4uAfEW;&fML^JrkqUC;WZrlb zXpVt4>)BWn)RsZU^mv1-G;=FyfjJ2+y4x9m_5)v~kQuX`K#Ohvj0O8+_iBywWm zaOMa#2;0zXn#w$>ZDNn3p4C?jNCsOY%z?x8NL1n}>rihel#PMBf*pKLAWs=!uAbK{ z>+3o+LJ?Qbfg#L~temYsGv?FB24TFeD7-zt3wzR<+3n^72%No}=v;5G=Q%H)FDvzF z4ia%dD?5lh1t*B?Gkw)Rw+ueTe6F(&W0hr7u#rf&SvUwi-X&Hk@m!apRZ=UW<>U~1h>^XJdD{u#U%nam9$ z+dN=>dQ%+x)c@3_{+C`?uE(NYpVSq1K@$bW^7b*}ndHXtwMVj)gW(vbN{yS&_1NN&R_6EB!6i0z3H*?{;}H?ALr4(tRGVu zwu7RVPv3s|+6VVuUE5!MC3G_J?)HY;jJo{5gZtzS@tqY79j^rMAI*BT6$uNCYMzW) ze4=r^x_P&rO(i?@A<2d|59@s>b(N9y!jU!|U!=7#2njRsf?$Y}f89zm3y1*N&+I?LEose`SN!HFy84 z@BQq{SD7GdZ5Z60lRR%Kv;O4t&F>rZYoNys)VWC&)u08)4q!Claj-d~j;aov zhr^naXJFl*GhHh$&49G$fC_UuX=VfXJLq44zq51!d)>c}o56OV+C^Iou-%kj6(+RK z91HAq1tPH5{l{5%?*G{9py^uBJIv-SAn z!l5nsqa;Y`2bZDgKM>G005`WJdSb@-0zy&k_fvd*xyp183`)=+o|8EILx{QM}XY;Js8aA80(r#jj95LHTNqxFl!5kJW| z_(ICzQ5PTyn<1RwK)8&u88)*u6?j=`U4BOrSoD;^sr)EkaYlL|;-RGU*;r$i=Mbtb zLJ~3e5b_nlt%1&m;t8>4MGd;_1X&pR*}ZH7tl6wo2x=Keh7F1H`C`H4&^VO$e3s>qojaulUYS7HW$d_5#u`^g9Qd^uP)N}=;SsP|JD;3XpbcfwIte&URL5;Dip7#o1pKXQeR({P>Y{N*+v1EOM?!h*<{ z8Y8!p{HNxqjfD?WLKV~q<>*YWfp)-d_~WBKvbS*kgOC4&b_ctqK}plEA6K# z2^*i^2>dTF)xoBrtU_2)vXbC(pA<`1nm3aC8WLnHwUayHoe=1?BV*c#7!D`_P+8nM z0k2N5;dnL8z-9JZXC_b2YXET-C+rpIhm@UKUMMcW^@PS7jwcqX0;HP!XPJ=ER%FNp zYxvc%NP7cqryn%|b!&Bny6=n|vi0T0hAwKpfWk$wqIKE{O!kWS&>kNdi;TW#K!rLy+5sstrCfXyLZsyvEuKp3~HELwV+h?n`Yyd?8A-i@>i5}Uv`wB$6JGaR>I>K%yH zRWSKw5wg>87_U1-Y5X*bTjIwBG=Yc?jYqaZ!y9B9{se;Hzjm7KHfP@|TGPyG&Y*lr zQ*0Xr0k7kFazQ7BnNRSIfR%TK57QpZLpuCz^ts>dBGVq>lwEiQ#xz3|q=+T;Fh|Am z(nO-{Yx}SOwGaZ;MN{;%gal4vmqV4NL12S38e`j=l`34X!%-}&yOV-vanXJns=@c8 zM7CXsH~byeNEw%b=K$NNNP#s|-&!P$3fLt`2Od>yk1 zZAZ=gMV77w@gY2?`vQ$GqckjPf?<2{{Y+dMMI(A8*Qvq$FQy=l9Tmfeh?M7_Hr`6n@4kLPs!2@Q@%G10qQIGq3{^2x((% z2Xut@>r}P!4~GxX7^dLTL_42kibtD7Ndo;D^tTuz@%R5(!lAi@QcvIzK+x<7BA*QL zk*8tv2yMq*luMe+$4DI>1az7*LK2DXhmshSFos}MlTb(0p<2+N=n=UxXqgc^O`c`y z0r3eFE;&jadwbVE@SN;;KWau;XB&0e=4?SEVZt+1i5o{sg^lznv@kqY9xjjKaCmhK zTT9y*B@cPRLrtYn5{HV;mg=2NRU$86Nn4r_l*uc}2U3b!xEXg55GhS$Dw*;>vy{{u zs3fF_3mK#lBYfJTCP31}K{>?=BqMQx8C)CgO8_IL0A92+OR}6UZRfoL)vTk+gqkcZ zPXu}c9wk9TkBw9*ByQi~lYf!KDkM8e4T;N`OsRu{TS#1Dk%!ERhFMVayB{k} zC*-FIt1Mmc7Q!C4T>BTIS}utO`pIaz1K+`kG)+r7UH+uYAY;iPCq3zMaECKq5^%VT zkOnJgIs`GXRJ2$LA)*uonL%MqA@pF6`VzdFn2ZNr{#(@mPmT2Ut7fq!gJ$$6lmQ6~4j4iC{7vBwM1Wt^=@B0Z96Ky!{Qr zUbZ!ouCKWGFQ_SftskLk8eK>*BD100yViNhqB0WcoycLKB%K`bl_2wdOQ1SpF0>U@ zMCxu}4GY^#Y8_rp_;5u&_H=02NX^qv5V;)@!4*AqJ~8}TQT&A53uo{dZ(03B2|Q13 zVNW0NciJ z!t=IFCNkwi6YJvhhIak3y?67o{#13p|8mpj=bkSc4}bKR@ob>%yZGW*-EiK?YgxCQ zCf(Rl`j1zxQO_6NRxYY5|I9qHZ0q|E_CDQpZkug`rS*f8`yQk7o~hu2yM12{YzXMJ z$?RPwn1|nn3d*x4t}m}A4?8X#J@n~!6D`4pj&Ajd@80A8Ag()J_{yYxY|VrA0G^t0 zFxgqiH4Khz)8*Y5pR@Yf*@89C;dzx~uav!xeO58HZS#ZP@x<8v!NBU5`-ghwT)uEJ zt}^}Z@}j-|1YOs-|6E>P@9lew%1eHUyIwF>x?%g6A5mTFnTRa=Hb^X|V-Oako!xP)?=h1H`m6wcd`!jFXo!2&(Kau))15ZyAzn0hg z4Mkmt9`ut811y#FlWyAVx|ukn8+Q!-);xbv)S^RIbNPmjt$PE#?q_*ja75d6{!T7m zylH~=y{{DV=&Q^f)|>3^`C|OL;T%4h?BRQ^++lJr{!kexiM#pv?Xc{_q3L(Zwnpum z+!k7{c|Ls7s7W@D8R8lOV^8Nt4c&gs{CeS+>2q?PV%`i*E%dL@Mm_(HV}gd}$2Pow zC1ZkiCcppZs;k5vI1Xzq39Qa~nfj#gGa+DS!+T?9OBgU~ zKwzo9_0#7dq2wsP{qqhk+0x-nrkc)Uqu1N?%FFq{6$V^?@N%#*P#0#XGSh9LxNgR$ zMgpH&ln^)z18f5@5&3UmlnnfBcU}Ti*Z5*zYU9L0K!3dl@YMgql?gL=>Q6tFkO%P8 z-5`Kqfsq*;wna#NZE77j?%s3YkbCRE!Jp>dR}FOOCWV3q9pKm+$jO5%qK*c9wy=+n zsiK;P{|}x5Y#C^~)Cvhe4tWZ0JyyPJy0spON|(KE0i}lY#aKgjN?sUP8rAR-OdqAW z1aE^uaj&2wEG6kWgEdLh>ubL*EXbYN$F++_<9*HXi{NB(wYi>7F9i-|5}>4cOnv(* z;ZXq1zE?G$iWgewq?Y*qrON1Pe29cMtoyNZap+Dh+bcat8TGCTVirY$X|Z8-jGf^$ zND($~uPL5EVLOy8;C_(CwU$@~Lxu;YdQ3P>s$0u$jJGIjNr zrWf2`6yzB?i$&azB%%b;GWvGIJf(8VP;?Z^>afv zsQ}fvY9<^u>Zlp$w9iegz@89hN@nMu=}i7*j5_hmfA&2a|DW?N1alR<_;)aKI$@oH z%Q8;^MRLq*o!7GEwW6rtqyPWjR49Z3maKt=$8>T%NDy|(ZdoWvL?IL1$0hO-zDhP5 z+gKt46||^tc+iWYPI| z_F8x^50QV;!_W;pR&`hzH_;@(pR4 zlV(bfTo}?~(h?lO$>?aA#G+ual&vapm=l;Fb}8gZlU)hv)d>jb=;iAK6<-oxN9CD@ z$R31=2TzK6G#f+A%#IT~tPc?x;qmP*4c=y}_LbS!pdP~AM(5zQ(1vh=UleD;BRNL_ z5eL5d0Mu*(EtHu>a5k)KtEXTcX<1{vZnl~bG_((mUsW$Gz|asC98JQ0@EK_#29m?d3X%~A2&56C*UF>0Z)@ck2a;sr z3}_>TGGqziD9fT_8M2X$H=(WwJn&UH;*=4M1WN26Kn_(iu13N78?y#sOAcAX-vaH# z<7B}~ovQ+(6&x=*J5`t@!k2@R7pN*`)Ksd~N<(?M%TB_#Fd>G+&G{{wU<8V1B27p= zeO4PSKnS~8oSz@sX$xT$brmWGSA-A>T6xF>s+_Iu&TvtlrbzNg-jV@mYP3Wz6}i(b zZ~9^tLRFs=jcK#y0v5PhW20z^WC!PJDFN~8isVWFWQ`OYZJ@~gBrpcT+J_>1fF9&H znb#Zr&}^jYDxsh#F`6htoMZ>?lBtQU+{5hg%to~8D$`hqix^TVANjfj@+QsmES-8?!H%7f3Lxm28xELb;}ZDm$1G@o#u?5MoZydblJ{GxqFb;-I; zXG|%_3H_Wn!0%yxdlArZ%(70%)fle&G-qoz+l-q}HIXge`lT^zzc@=r44$WdHl1j! z>@YBM)Vo=Q^4;}qTr1me8!KYl^v}?FZx2y{OYm$ggPOP5 zSjxX<@U#l2*b?6!JdAb^lb$PWf^W!&$@=Vh`{_XW+ok{&ulZ$h%`GWOHU9*3F^j?KJ zY|TCp;4!_Hd~<$-%YXEC;+>mwzwrfnI*KpfH@?`=)U&7b!gJYq-%Q%icOCVQztHgE z{YRhNGjw$FyyKIyYc)6C4s<$hHh!g zeYkKw*>GfRZ|&O!{nVz9_2$HkJj{<6pFmQ3CQx-G`udse|C)@<*aOlRKwVv?F|=izj!M0(E5ey zu~#Pg9d||M+MatxOFw;oLs{{%>3uKs@0v6PZyxdQS@C*vZeQ20fg>fYpAHZBUp!S# z-PsLiZ)*MK{^FLdj{-l`-n1Y=lI-WF>LV8u4gB2?7uK(+L+e_Se;e!3Zhw=iToou- zy=aT2(i|wrPbw%r7|cA>r496&*1L}J+mk=)4O|>(SoomBe*0{3;kbA%aVYBWOVFxdor@S}&OB-fLmE`m>1RH=@xrmz z561h(?sBQ*IJfH9fz;|xV}iQ@WcfgKl@7jcXifSkG`=|c6mL6Dbue0abCf9%1nzZR+@cV&9k9lU#Y2EjG(}N1(!If=?0_`2yy!LJf z85Q+w<8;eYPh_;JuCxH+&+@~A4P)nCYCSb=+XMby7ajHC{gSqi+Eep`?Md~!lc`hq zt8YzSu1~&lpI>&?X&&F8b52`Z%GVDk+(@_!UyV!LM>mjnRTr)`&WfX-9A8M}P;C+O z;E3IOK@5vUte+8f0;J0Mhw5WCQJwt!uhd(+N04oAje`^x5T$wjmoU}uizhSDWB9G1 zmn^|ESs+Ri(1gGV=o4eSXATTRELs6_T_WwSadA^)Jq(1O|IUAz;Rh-AR`c)NOSrI2 z+w42gIC_0x6#J%N+Cbg>U*V@=IS_v4Pt<}q%zuk9f%5ZAoSrUII;B^6|D z4t3drGaO;C((^}K`M`8-Ox`R1tNkn~e#`IC7AIDC{sib*H7|aO-`SN`+&%F zX7jOO@1Nz+y`M2-n1xXK@Pg73rH`L0m@=XS!1)37C%~*pLZS!AKMT$en~YR-<#K>m zEyoDu!MDab+E0$#J0p6?J}Rjt!q=S0#ZmQ2O_>Qe_6n(baJqH7hP3Do^%&KXNHqw{ zRkoI9;i|v}UU)oCRfO%}!ie6)PWWYD zL`b66dXd;a5ItVU?A%JWL6&Zo!UxC-yT5KnbR!cZ*ZqadCD6=u7zqME@HtP$(24Ro zkOCuQqg9tlMV`>c?*}o|27a9$0b^M*eH?kqE!7xNxSHJC>=>eJrB32Y|6t#OXHO!4ky8nxMaO0zO;vrqxp6>4N#_a05u@O%0@;A zk%eQhR5^eSd5I>ai{te~9VOX;%^^})oOZ?ZF(~WiMxo&Yj|inrk|TD_IS=84+F_JH zvvFrWkpyx=9hEB4+>G+{k%!%XNpz!TS%|)Kr!L(@IXjRf5##o=SZ!sI%oSe0i~n&o zEt(bX4xHgKxR+Q1<&dhyanw2XH=iDM0$Jhjj{GxWJemM&rEe?o3;50?_aF-UA`Uby z${4Ao$__f$2(6UN<*Gy&YHKW8ghrP6nlp$pZnpuWq3Wr4BzHwpt!jKO8sFQIXmLO- zc4>k zRKlTx1bh-2N&$)@D10XtEz`=<08>+C?mKg`7_Z`KSriSK1~!_dKrk9l4Pgo<7uNXT zG_ZPYBV!(lF;WtBBc>sUZ#ZBT!>{U7+jX#lP zpIyVme?vW#-h^z90m{slvj($`wUl*|tt8iJQ`*F>5r>JaN>S^QJ%_1YMu64qePURU z)o{;=MOpmbq9P&8_SNf-|H(mI1~ftz33FnkmLZQ5Kluy?!p!v4lSuWO~q(1!y75QszdwaW_X}X+eXuMgiiT^V9_-7?Nld_{m5bx z-3vY?Ac#JVItc)KziwR4h)X;i<7zRhm<4DocP1<4C};Kx`>EcoP=^;5LLxYSpZ$md zNm;(}jZ(;ALNq!lnn$eT*cuAJCwB+uo<*ebcF~ZSB}rSu&2W0$Do_EyNr)sy(hJE} z@*?&%E0a)?WrZ9tCq;NcwuOXJWr@->5r=wU_K_-}{}ZAiSq_GFMC(aws!LL5aBWqx zBqit6O8LBeJ_U+nU#G$S(vpMj$3}LBSI2DD$f@(PC56oAWFzdb<)^TMy2u7@iF~b# zA}F62iC8_m(Hzosl^5-Tz@e5?a3&+eV%lKxn(DvI`G`e|ggoNesbwUTLs2CUhiMtB zn$^4$z&(ED3>OR{NyvwtsJ<}8$Tk;6aw3Otq!X9X`w`eG!$pUjOcN!Afsh&ssiDd6Kp95a9q{h1S5jR8jTG^94f*ghJ=Ph&IDn#`78?K@die61^^LC?p6r5Ol;l!lds`B)gdwr zP_6PzS%`ckH-{xcq&ux{W6?_NM-NipjHoaz_AUbVApnkqH;K{002>b(@DL%0L^u?k zu;?CQK0tqEXu4FW7BJEyCa9A|X>CAXi3lhT9aR8TBq*_muzWNRZp2kq>1ntI%`URE zBS0jQZL1cY-9Qrn=OI@R7V(jiTSQJxnOm+T!5b{v`9BH+VL@hUBzloVtX1}8Za3~|7ze9Y`j=cI!Lm+-Ef2m{Q}hl zT3}+A-^4d6ZGzHO{C5r-?i*huAB=il{_v+aYexV~O#*ZM`F_|MxFOojY zT!?7cqN|~k7@N_ygnW~0pqi;vT92$fL9}t{!3}8gU{hAMo;`c0Bs=z&4$KLfm{!b) z*3h}5WB>BBvVP0mAP|zr5{lNZ!?BxN&afB5;KNJzA@P)-6`z7B6#y63rbi? z@5g2%xzF`q-KrX(rgksx+T%Z86IR;#^Z3=uep4`Bdl$+3^S1B(uF(77;oBSN>4}2x z8&~Hwj(uYM^>*oR83j@N)EDa-KK=RSsZHCy-`zmo+k5e|x~Y4G8-_Lq-^;u{>K@Wg zjJ>Qds-{R&tE1x03d6myH?%>4NT$c$jQX;v-!qoFzW0=8pXyC^wJrTgX$t-^*Q? zmvvxHa>ACrDe-E9F!9}I#rW-~#)-dID*tJ;#Xbgqf<-F-(H^zx&WCX7SEp3J#oT#c zoyu<7b%%_}YYINGVGb5Cg*&70;Kj<+Jrh^%6%*5q@Mqye+o#ulmzw_I^Q_kMSMjTi zX<+uB#mbk+JB6M{EunWvS6B1>RU_MzZXZeh^T2j@@Jl}IvAUCw{`u(En{D^)N$cN^ z_aA7FdTuhNud8U%IC8V5oA{X?-*RcaSWXP-&g13oaoYRUx(k7>r)OUt@+X_NR|e48 zp_R&Df^u;}RQp}5^|$zhx65OGTNTuHJb=Fq1Wd85{FZ0WVR^QI^1b49?_Zp}I8e7M zs4Icvi*^FeJZwu= zUXBc?>|LfYVS58PCTs$m%L@T@=QM;JiUJWR04POO2j>f^HNm;gWaYh=oIrZH)tS6& zI${PS^~K}`C;I-ap`4-o{w<$$7q0`D?8ppNIM)X-SU0FVkAA>n7TDr(Uk;kT)l9LlvENoqmdR{@ha zV)BsHC!rD&(iswyK8FZBdSZr1bOHnPY7e^BR0+rp(t=a`AOQrP8b9Xi&3oi^79^#+ zp++sG4d*zJ$X(|E-b>JE#0YS;JnW13#>_}wiIPpCUfl;<(U#^KCZddL)(~WcFIa}m zCuz3Y1jWogaak7PMbPR15mDWUbI3Upq zPAm951%)?i{m|peOrU@Y0m7Pj10H#Q{5qUCi2hH@ZJ9CR%TT50r$Y+J3v&XZ}Q>2#US zT4q!!)SbkfNQWXD;shc^TZ6d=%RHb9@LUC+#h_V=FPmzIfO#k>yjP*3&KQ4cI7B52Et z?tp)U0r3yKqG$MOyeyh}7UCI7s{MEisB!xLorvL#it%6Cz3^)rjmU z(w8M+lu|*&mT-V^Q$_HN98XsBCA1FOfK~CsqP$ua{N%|rWN9Bz)0V&u{JPQx++(Om zez4I8hqytzRMSWvhK?Hxi3~>)7Y8k{pUYvt9{uZaqQW?Zh|~6_U-jhczI4K~TP2U< zZ-Ef?*sY=BUyc=~^`w{aIqEHYX+RUgSA}jtHy3rCc_XWB-jl|kq6fUP$g&iaT-E|+ zo0|k#Z<{@~#o&+$nSz%NXXSNxxYV~($HG)Lj5?7<(nkvEMs)~5c#2ZQ-#LL3Oh_g@ z)F<6>kfLhn6x1xXfxN#mj;`(_58_NDPS4O@@R3ze5 zHxcTGfhHABFBBuwwbINXZ42z|i60V~(&p%;K$^%a=_c51YYXv+Is-yvZZN1s8t>7; zeZ~z%wb9*d8xmtGY^a@E%x)y}g|yC6vmItVNzKvHYP5%;7f~9wp!|Sjm4#?6RY{J7 z%i#UtK$0vdy|q;`WQRazEksCzkn!4C zVj-cUXc~bl)*PkXLa75qsX2wUQj|*LW~CtL&Tzm*;NkLU8H1`j&?;sY0mynzPDsGJ zAl-;|MsQW0A1bU~_DQ*$nPrw`pw)=Hi8teoB3b1HbdgtACx-Naa2q}cGQh`0>Afyx*WnNQ4sB5oT3%?Er{A7v9>BN8EmE5z5 z7CxM&>?(|C?dR(B?gbdt!BKz(HK$8<(JD#lHB8YKnol5P8(aD;ni*Tf@#qztqdhfc zjpAa_u1diqwWmh(+7GaTl3*h4VL3*7VZlZe*D(&mOW*oR~>3wm8na=xySz zJYhAPV#%u?5X3xu^m%%QUvYL@r{Fx|{sj#LtfWTb#H?p^bfmIr&ehDb^`)w64giSyhg2&eKZ zHa%)g*c-XEnrY^|E9e$wMx#TvkOo_ON)27a3o6RfLf*7tQgGuA<i{Q`T8%|%XlAeC5n1sF;7T<#ZFmYP*=>VyQ%AZKbg+6 zn>~HRoLSLrUoIDdo*q(j}<;^1eLV&-tNG4e4wMH)`1cN2fkPU-Ed>Pq(!`#9TD zaxd3Oout0=)w=d7=@b$sH#-8hDn5}OBpE`a9F4PG&S-yc-ce#S33VTtx1svf$hG%# zAN?S7)H*-tgJ|sDs|&+wMuJAy1g8A?UOt&|=HA4gyXTFxyzzN_+p1eTv2NnT<3}w& zRE-^I8@x2N$ZawGc5{Z?bnxoxy3ubU2OHZ9y# zidx&)Q^6p>4Wi}_Jcy} z(OXx}zm;8{?K7&Rx9%A%X-y8>H=cgJTAomZ*5(n@mnpL~Pb~FL`&FV)3=5_j(cr>nBq>W+b`2 zRz34W_MXr2)_{>8m9wC?V34 z^SiOI&{?P5cQ4Cu8Ck(Lh;@&9Umn@?iucp^X60IH4fm$-_65l^JR5dT3+EcnPKK3+y)|4bhaO#g_-&zK#y#Pi z>c5OUnFJ9tp7p$CxiJ0A@FzC-%0)u`Eqi^jv zAEqDw5)we0vz{4d3aZP-hKId6s(k=C+gnz7eu>mdjQw@dI`C*B=L1Xm zLh=A}1d_w3cq!xUM$G$H6XtT}z}&Nm1=I}}r}J}y>vZx!egZztrE83l_70v!yS*Li zTTPNnhw^@MSQO`cevl(;Fs zxwAF4PIl5pdY!rSxdjlC-Af_)ta|CF(E>2Zno-4;QUEz%^3s0A2D7kHH!vc35c_*pkV)~%%#ydTBMDgrU3-@uanKYlQ0_X*rZ1A?*1AkP*! zj|~JONclcrf3xJ-36%ZVH4~Xlppt7d04WoW{PCu4!w&|cm*T1vViS#ZDwH~?@cdRW<7PR0zfz|v%%OxQpmREU9y23@}eWuLYKIKdoqfoSx|efUOGt3U`=5i)!@tTF%fblU{t)%3x~p zB=}eenjGLo#YQj~XQesLyG`pRv7MPBO~!Pgc3=d@!Xf&G(xOdFRSc@vDOpFUJIPX& z2$MvHwv#H3$)tQ_Qgt#CB&=gpuriGxNkLskeu)vL7rvTcRg@+{Wv3o?x}|n3X9xc_ zD6qedrDAb}#w-D>%?F73gie9dchFpndNHc-y9lWOlUgu*FQqD@hHIGb#Ga%kLX>WP zusyXj6caP#e6$7kGsV6p@9#+{<@#!ml0EYC*e%bTkYHY{F2L`Vro|RVBsrK!YNStj zl|3K@Y^n7;=0356Tr9T(>xsa<`NvTG>L!A%#5_9)!I5pQsKFCr@nhLNbdDUs!5Z%~ ztON))T9y3tmj4b#8(Gf|j~FZ+D`Jg!ChMMmXd7{oF>A%O=sQX39kE*0_lo=!dr}|M z!+g%yFq@Nf+S143C<<9eXx;%MO6X@ax0j?qUMkdGNOCcm1WeSAmWE^kF(Va*_Cb=8 zn6#n;lM*n{H+11HRSeso2Wmd{%fo!Nf!gfou5h z$d>?@rN1usQ}uj3Va9F*C^h`+LXG`FAaL|(2EMuPT4uc!;`bfT1K!qO4|JiiS|qNX zm8H$3Yaer-FE@#9IK(h2x5f1HU34n9PN+j=9iC9{aM(qK6o!&QXfr`@8qW7z~PcOWMd5XF_(W-2&qK@e{U z1*eNh47*neR^f;@qhfJzclp48Y|eB3Dc?Gdjx%v_13Um9Ia#MUh4;&(a)x2L`UB6| z8A^-zkb4ukwJ_k5QmwrlH2$)it> zP(qeVSi-Qe$G{1iJz@lr7E`3wsSq?(jEi7maGX_RB!aUDYGxI+r&Ua_vdm^0MGO+w zi4x&{^hpfCVcg&^avD3{^_I_r73u&-nk<^@1%ra80sAN+>(Ugl2vgILSO%$Mc%V#` z0cNqCDmId0C4rE5DsB*2u?AmA*Di(#jhMwsBrdvgX)NuaNR_n$ow#Auy#%_J9I;WT zl^vJ@HU%(hybW>H7}5xslOs_AtAEzdb9tj%E$#krjD}40zye70Db}|}GN@gfMU;-A ztvr&)Wv^Bh9l}&zX|qm|yolg9jU!2%*nvfOphlvj!%UcjI=hlCnuT-*iP6Le76oZ9 z>1fZ8)LzU?rIg@tweA5}*O}c#@+bnJJbJUFP(0Rp8KB<2>KK)u`5~I7ojHuX>@1=N zX$%6OSsLd+AEsulNLrSK)4DB!857(T0nJywz}R#SC5aGJBEo^xBEp9)0d^CSK+QJc zqM{;cHn@ox!E55&RW$mnzJ{t6EF#TA+Eye3V{PDocsv3}6H)2!thx$KrD?v5q%}Yq z)ZXYpaJU)^P_ocsHA#od31l9y%^L(s@l=CCwfWAKtBA~Ya0tp#nTxSHKz-WJa129V zz}ObgPYJXRPsF4TAh7XpKro8ckf|Y=j0>0LUaY1q=tZtxp>f$=i{LzJU@Ylnk&>?C zv6XTfLj=@tCCpZyAr=>O)aq9>;nl0wW5<&6h!xFpa#2u82+KN7CCudL0sVT#m9`oZ zQg&r0M(fo9JMbBMQ=co5{P{$y)g?PFZb6P?b!_aj&~u8;V5RzYCgws;xv4EZ zzsrToOIYDvtv8wj2H09k@dWYgcKzcD&U|f^S6oxjh=UmYj&GiLlo~>7utlyR#Tn>; zPrYn514iA~f`5wnzEmYeMi2>E%$DusO!M$gE-Bn zhHO!0$$-J1zkStn z;LYJV#^__WJRi*%-ne+mWkyEtEi~ckqm!)*!%9bs&xVcWJ#(j&e5=cQd)}+#ZT_tb zzKyu&mz7NAuDKom>)pqmd^P(0TU))omHfGPgT=y~Lm!0>J~83q6Mbo@%qM6^2#m|? zOGb*fW#liQ7vqcHUm$HXM$gLIGydM91}T4DpJigZey%BKe{THnbB}JD__E{AIfL;} z&!5%XI7(9)#`VvSuvy2ZfE^mKmjhZBEYaP|Em7tE_R?B$_jZgUd~EyHfxa#v2(dgkW!y!zFGsapTs zf~n|`?pkZwliN4G_)1*&-s$7dteIKec+7fdqVVNK-lreR$R1w3x^Vrt1@(`tmM??6 z-2TF+ZtwHXZ5^tOd^&&b3s1jLxNOvCP2u`Yj}O^wGy600?>w_JckS?3i&IulTX%ko zwcQ!p_Icsh)ROJdrjbiK!^kh5n&_P|T{!XR?pEXFjgt$Q3~R44;ZyX=w%nY&?bFpq zJ}e7k@}yy@w$M01zft)3aQ}ham0fiy6T_loaOHAK^pU9r%vo%vBP`+z%fy+$UvsJh zCm-!9Px>^cdT^RiXq?kq)gmiac?O2c)FSNcrK5-zVxBB3%UaqzE-mA^I^ON%Des0-d z?6iR1*~)RB*KC)D#q~e@EjMR9J=z|fiw&LfNErHlx4yu3g)i9nspKE~N&Dc+j#K-{ zCPcTpbbTyOl^zkvF+b5r0AI?5yXRj(@(rX*n7V5_-X*wTNpZLBIU z$TxR!5-HNM$D}MrVyo#M%`TGXq?-<*=WA9)eSI6Ele*7^=pPi^5 zZ(dq%N|}F58TlS4Ge&M;-c|k2jK~P?)c|(_yUW}NY6qGP4_wh)vYrZB+Wutel4qbwci&s8(@4#Wf!h$R_u*u$QwEH(vp~4@Fn}2?9s=z zu!@IiMiquGCj2HKI8a5hdo@+!$vW1%^9tT4xc3S~N0V}-pHam#7bxN<#u&Hv1$?40 zd6vePT>pEjea znVz&?r#^^Kf@?~Bdu-9y7&H0^Qd*mSlXekfRfY}^im+2wQy^NuwS-Dg!E$Oua0H`Q zCqd4GKv@YnLCrKXNR&ozP4`jzJWwWbHjr&#>_#QaBeD(ze0jar_}2}zbg0TTl_@RF zV}Q~QZ6;z>ikM6wAV(I7H}ceemB$N&pvkR;47S=>EAuuQXbBcwwZ83m%^SD`Es{f& zqW%)Og<`kV5ZSC~X2e?RT!f{9pvb%&oT5-~%&RyOH-|_RP0Jr0yA6o7Sz(>tO%C>G~k)nzL3I~(gRJ?st%{tV^-sxUG5 z6ipzwca}yBqHIq)T(#9rkyx3H+1y@t9opio5Au^R-eX&j;_LMz6zWm(!GmFjm@MMqf`KWc}gY8xc}QjdTS*f?C#&Tghr{fQ0ZTck~%;+Ga`#=Sp9Cs!s64h`yRm zKl}ivks4#tj0z7ijv}gF0=ja9l;cB#6Q z3F8DoNq=0%+e?^dTevb~S-6nc#pZscW>Q%LtbXt~Ml<0U>qf_5yvki<*a%F598f}l zjG-p!b!MILuv-U?>Sm~QjS8t_)Ws@YGn2{C2;!?kPI98|4B?_l<=oRE62!PTQr%?` zY>dI3(CD;wjONjF7rUg!{TYPEU&qWQ=Ed|~>wHfuvsF?|zC_pit&;+Thiy7dn&_U- zXUPI0kloM!S2Df4o%T_C9>N}8d6ev+DfA?(PnYQuG4;GpdRHiy(orWwgd`X`D+2mh zoYPnm0b(W!cIeW50$kim`qqeBMMy;)u(@4{$);yxNl_fHgBT)z!|7u_{06FF){*LUjFQ8#w6Erd zPSTwG#BZB zG8tt-m zX<1X2F(oz-wKclE;cYJPd)HOv;71po$-Xqk!*-^FmK_?q@V_`;w>_)Ait=fER73OY)$*#bTiGG2xWYkQ)Fdvn0TD5 zI}jj!$s9Fz1(%E6@}EeXc?X5gifnH7ADw*!OEYB#U{JM2TV)c2r%ReDvG!ELpTQmV zvhPk{+E_>C`ONe3YD&S=U1`y=9HKmI;*$Z2xSIH{WkW{UR~1fTJ~km1E{=`-pX10Zr942lxKe z8*Ie34v?d<$|0he#;f8)(y^Q|#2@8_k;Jl99ubn;Q1J0u!crOx(Oo)>P`3iL2PU>sN0$z{tj}%#Jnr82bjJ1(&=wxF zP+|M;F5fwW7)-o-Y+=T?FQ(ne;d9RpEt#`%Y1?aK`yFk^K3gy<{y6>RaLBQYD(bXpVDocc%!<(IMFuu({?x1yLV#l!s)M{-!k^z8}H>rqf2Kk+%tH7GU)J= zvtM!RUVP|A7uEdUjs{}l4Lapizw}bX<2}<~+@|LGuk^0I!*o?Q-V)ePe;VxgcD`}r ziII&9Gp;}Czi<{X6wdqe+4Ya*502ehPw%dE&bu$Qg$(uX2>brtw)e(AyV}`zVeG=a z?w{{PMPD7BUbScX_-L##ckAuE=eqA~+BiNpe*E-WIyZ47a^v(jUtAroUJ!lz)u%sO zHfmmb_0D);P8?`O9v+pb1T&K@4TFrE}T*gTQ=L0G`8mqNSuPOP4NGh%thXXDRN-gTqy%d5AJ z=em`f8yY|J9H>A$ME}Ou&Uw3DOB=aSIn4q9th;kGdt3FnvGLDed%xOyZiRQqZLB9_ z?VY~W8BdSSiCl6ZCE@y-skt9kCry{k_I~k5^YQ#q+p31Tu||DZ!)T;wp?i1fS2HJS zcI>YIyuZ38|Jc0`-p`<0X6zi=xwEpqff$MSp!@s>^RqbDFK!<>J{eWJWTJZU$b~MC z{fEMS9=@}B{rMlJEz5pst?NTaU6wZV4nOvUcm4E{k_B(4kcVpf=Y6wfRD8lMzVPYk z!nNkn?4)jfOz+j5_R8nuTRYn7-bY{AIrZa-!QqkCTZNmZj_-PUWePW0?3S@|bi5>E z%S6EU8F=rq{E*uLKQ=hN;$MD$Xl6x2{m=}LBSS3x>ri8oXfb30qfvMyT^*5>kV^W1m9-;+p_=46?f*}@VtYGQ6G7A+SUlw z%*G4AJ#Wi6F{`uifU59b!1Jr*iH#MB1#>=aAH3etzE2Ez)$7yMrzgrbe$Iz67C-L; zODo$Bprb$UE)mb3DJ>|hDp<6wYw&unvdN1ZaI^Mq zEH`DmJ<@LKerBZK1e_SffONAB0Mc!JAb3nJV{kytC~Vx{g`-yg<0z-E$K1m$ry|`WcH-c1UOB z$*tW_L-?lIC_J_<3+2jlBH5YJVgT9;W%vdq3#*iva4K#%M3h78;U|6S3&kC;pTnN!dIx6Jr_`%oW!Lx6`gt z8lK3Bni?DJ0$k<~S0*X`k|$G3krnx7b!DUhPfw@)fJV)=Lutlm(sT*u+fGR&gCA7B zqp(Lh8Ju%yx&&I^@#om`0SWjoP%ZhG6reSzeAqfk7fJCVWb12mWDP;nj6JrQe4TXE z!P389f=$AGxSS67F;y`q$&0i^sRGfwK$XtMd9i-?SoLw+cz$iF>{t-F~`Bs4XKCzaNm663mxFS#3+h7zfa2>E=LKvePQp;i6~ zMUP`<4aGau{=G~d7DCMKpo%(;-koAT-b{M*IJi!035HYE*arGznsUvFT|&&(&by}c zU|e0Jt%VP*4eVj(&nNMuVW47cDn8zccEaRr4PvLY^@zt8?+Q+f7qeEp!U;% z2pIe`KwOH7ML{)=MPqUpkOF{UTP7rvKq{21tKpF(=`%sf%Tatq6Y=%@)>PgTrnx84 za974RmeH~X;m0iDAy}KutZ`^SK)dK74wIJ6BvRH>#A$e1j2V@L?<^{ya;s~?a1mdP z4goPp7r{24^hnAg0a6rcwzkaDN2a-v2bML*WhseyL?l5iU|c_N!Qb_(qvEuK<(<8o zYTBt6uP`+=j(nkyi`bLgSX5(tf=KbnVXLp@$?GH45PEJ8le_9>6lKVe=0aS99OUGB z{jU~cS2OR@uLws^Z1B%XWB2+D2$5;=W$}_!I_z+%r1t!m5BG?h=u4uDYAV#hHUV)p zm1Um{mT`YxuhOf06^qok7^7KJvYyFyxlXa07@X`7Sl{Dx0f8DJzQfO?Hq+(gJ9rJf z*>wxZ)pD|f7L-3gG*cwn8^$?Xwx6$twwB`?mJq=G80=xAJo_oW)8@jDnxqmuwqSh@ z#M@>?oNEjb*`yXwf^PAuNR4HX_?9Fa5l@!YC^S(UQV{~a3R{MKCS4J)vGv?KK9A|d z+=QIss)#bqr+{f*?P9LCk)=Q(I7@XPn?>l@7cFT(DE~emnq5{FVfb;f%1Ihxr;Puq;~KvfcRuk!^596$2GCV1ClblY=9=> zvHVJj)~S;qXaw`-I@zGMZ}3#qcuBo`#Ew!GRjM_dmy=Db`yn7vq*#*nhX(HIAZZ_! zYnRcka(zU?cr!}SlBo98p5(9<3(oNl4J`zt64pYR`?#HW6~hLZW=ip(;}+8{JD#U3 z^3&FEEER&{$8ncNbe*IMB8by$guE`er6#a{CEJL8=gy9$M`a3hnW%Qu>>&a@#WYkA zoI(3aApnwoybFYDxO#EpB4sm?Uu0=9W^x28pCnHPUc|G|m5d~$ZL6nX6vx?7gMQ1qw3L&nGT};Of03C{ShC2a) z`p)Mr;S$cTM#J%$oSP--4@fv<0Otgdb?h<1#GV@dS?@n+wnnVdfs$HFW-mA%Qz$ajrh zX&$QPigZgRe-c1%E~JWQy%o|TDNc$@}ulL_Fpvis%KZ3$^UiN9Loa zX;(sxX6w|MWm1Y1J&V9|bOdV?U;zL^Zb_onz^%t0j=}zbWMhzPnTq;YStQ1adPbJb z;0=$E#az#WnS)7y1 z1b=42zlylapl`E&hnO4Ibi7;&?Oa=2sVs5WugC*!|5xkyXU5_6OXtpQz`w@E9-A&4 z8clgDdd{7_)Lc4@yuJP}(eF(cE$IIG?pg1vf4;YDt>?t&GpnzD_2ra1Ie2NPbpOHf zwuoVu52oMG^BS5pqdRu$vR=w4za713dT2zc>g(?P^2uKOwu{H~Pg4z1ZKjdGx-9%_ zL+S0s>w{kTv@c~~H0RTwgJSEk8ILYH?ET@m=dOmCqs<4ees-A{>iMR+YJB+{K?ig5 zfw{c&c-KAtO7)W2ks&V?`j3UJFPz;o>xGo5fWqn7BX3=uo}T!)YOP;x*2LknZ3}OG zwWqD~-sQpROQUA<6rEBq9oGB9#MK=m3%&0C<-Ox=$A@OkT|2k!%iG7cPoKMu&ndh< z;kUi@#UZcgX>qd3XT0~bZ_LB;+`*CCyLWdFP2Jj^J8$T#udaT0YwBL^C(~oQ2CHv< zxjV$q-!E*|=o3Qgu6v7L9sF>5qxovzX!6>O71MVwbiZ-C^KkrAxd$eePoz}-^4Rc) z7s9?0hL^WO&mQMmN0d@Zp~i;C$}!>{&?tvEsLlp z544K;%n-x0zCW@ns{7}mdAq`9jkwk~IF6;ivFz0=)!pM?PF!8Gf9D62SB7RR3EOt( zc1~;a^q<#upBa7DmXbDDdC%0lcz5o{1C=L;A5-ogt*HKT&R|Gx;fB#Aj~31zvRWFB zj=C2XZoC!!bm1#6`H$@_&dr)Ees6H!t*OOrez#t2Yuh@O9MZszW{*$*IQ(gAE_ZvI z9%wUarI6Z?Sz#|v1T9QiJ+;Uq<(c;n4@>VxU%DOqmjyElt-a@Zzs?Vt2>z(hGBxwW z;E|!%w&l7H)jtl((&-)?Uu3FYZEL4OT1O;3H*Huu==y9KYdem0i;Z1?5S z?^k6cPgPEYt(kbVuDjx{QeRyZC^Y2M8x!vRKLdT?>CvK%U(sPXE~B3> z==Z*36EgyIX{qKW4*%Q@$hvdz4(mTRx$VbtCS?-BQu6xp7N>j0 zq=0+Y5(Y=WJBVmG{WB(14s#oWU>00Uj*i%NAos|-%1HBi2!laHYvlX+-tttl5nRAG z|KZi$KdPlV_Jna7e6ybF*a>Xl*w>oL3ioYF zLIG%a!Eb*Sn=Hw}%Voa@=}dujyWoivSvgpJg2|(*Rs>cvvWkK*7R;ZW_&->M-cc_f z8G-|mgzQcxHk*sBYmZGaht>k(O{jGBDKK?X2_l;&`b3;IGkhf5xkM~s4?ILT+Of?M zrwEirBaP-9vT3CaYfn=9W8dLi9;fgRRHAq}V^*^}JGj{MbPO z)wiev7KeQ#y@llV^R^mbTmlS;5;(g!kgInU`CXD8-^tM1>SNalJwuUaQ)P;EZO5om zi>tnt0l#XqyKA=OCulOU&4dn9dc+PFevT-q825-Kv^^$`m5CAzW?}{sB_jgOTEAuz zBcyN)fjJ9^5sMg_Lfz_}X}H3vkV;HWLYqh=phm8s*jd3$ox&n|EEsaiFi5w81ag`? zjWG_DF`Nk~AUXw5xn&T&mSE&`Mg$Ols-OoB<`@v{%@|tL4XUn)K9ADWL{@ZAf$d_u z-|ACtT#H+Y*8p@8Y2s?$w!&jb3%_vySYl6)vApeP@2 zfyoTxQKMi1DqRHaORLxzt#J*RVb+!;CRhXzBeID}5g1IM6(B&=!h&ytDh8(AEa3F~ ztbn^hidaq)186XjK?Ek1@pLZB+c=v&0?ialTzeZNv*X4JwPSWR< z_7Qs&yfw+?tB!iAp5?6d?o}64wiV6jPaZYra^A938EXE+gaWMyW8_R`5bg~+o4xZ>pNH&Cl=BADArDSP0kRZ9UN=H2j=`$H zjl*XKp$8q5FfXW@F;ih8>*n#Y<3AMQY#-NGb`A5Wzv1*zNl~LY)1#6bzAyJuCk{r*Vl1nz@vWh{K z2!(`|yrkt==@lH7`QDK=@NI%>9SW&|LLDhH*YS!BL7`C71 z2(!kHdh!|sIX%4f;BR$@+xf@+I&InHY`z#q<-8xK0bt|2Im|w{<9{r24u~PZ zdXSO&TX&OX5qAE6zIC1$h!vxvIjE)qb~iYaS{*>e0)L<_?tg@Lb`=HRInM`wph4dm z{u4~26B4$Aft9d;+qJdMCm$B;Q@G!Tgoe5e@O;=OY9T!1d~6se4;=Wc$iF%4J9$(9 zxi18HcEOOV))OAqaO^wi9PrcYr-6s`ei4jFRnGIVnH&Po8;l!>-Sn@!0p#31F}l!c zSG%(jpz8OZpa1g*=PhlDmYje7^Xq1J6fS}ZPr~mf{9Mvt5SV4bg{uDd0{HwLBt0TX zCI{Ds!453;x@qZuI|ql8zm2JWGS~?!?<|6Sonukv{bAMn+UG0b1=GsdKDPQ**yQcGw=;TY0$ar>i_@s z`IEDii17Q@r5F}!qbp#YlS@0?lCv`ZrVv`s*;3*J_SVwVP6A~xgbK`>$w5a1)BL{* zz~WVyvk{%Y7>FPWaFdO2r~i}J$?j7R{7?2nkm(Em!yWHLMg7mt2%YACw&U-W{10~e z-ID*oK)?6N|6rispYDHepx=j}e{Ub;_aW#%80hyQ=sy_f_aW%t8|e2T=-=Dt_aW#% z*a!K22>K5e`h5uc_XhfX2>SQ-`F#lb5BB+e2>MS3`h5uc_ZIs9Gz7&ktUv&%d=p7g z9z_z>0qh?jFO;qzdO={wMwDPMgPLL}Bo)}IV5zVX^-y_;l-k2b4NJ)kf>^QFc@MJj z&~>(+2#5SN(Bvk?MwDTIw-5>B2(4V9ipdd?*D;3hAk~l}$WVdm814O)Wy}P7!O3A& zj!UFzQibh1h={OGih*V{tmxT|3?jw|^+c(PAPk~NN{z5P!-&AOpmnb3K~0YSLeF@#_!SpTO$QU}hD8B}l*xIr)}9E=Q} zd(gmYL6k^Ty^aQ|?3^M=7#Kq&9I(nQs$nm+SOlxt1{Gl-MW_@)*(s+P?4m zC6Q7gB9$r0BGey)(3cwGB6ep4K(K4To=1Sch#Ms%nIE5ulg zmP6)}@EwNeG%+2p#32lLOBc7<)j>=H9=jW1f!tI zDd+;q@qMaErSG#D(IvSU<6bTniYAS zMbgvl*U};nGC;N}8z`Vxr4W!9fD0jBCg`d0}@EW zB6`ku?a>Qpv=ftK>Y-;)>>qt`lu()3D*-A8=-%Z-==d(2WMgXRW---~rt5=@E^Qbp zvrSSk$~TgHI2NNSVR05Ex>wud5ttchZ0;*N)1xJTY$04eH$*Hfjayi7Xi>JBv;@bB9M7tMaajjy80=A_ z*nSZ6j09QNDhea2)A~7;-9@wY44R;J-3`u}6GsDWj|vJEQp2T6NGN&gPe_tlv^PNt zVnr5*Fn-0oG{f>-Hfd<5=}fC#g~tgX7fv%xzJd(tdN&|p5y3?nsWbB`$eN1})IWsC z_D&j+PIkqN26Mjk{2m*2jn$9bX6uJVt>p}Li5_|B)-dh$@dX2*1t5A z&y4y7eTyL1c+8Z!@J~^*SileQMq1uhnjj^NQIYRR*2Hp#q`bWb12+#7ROB0JRVCG#%y@(r`@cCwniU?#cLS}@ z5yxW{Mpqe*TBgl5aFC0znAAm)otX|(hruSpGgrM#ZNRfYP*AqfEu3_+*_AtvK1%Pv zCrCb_i>2ck&OeKq-}P6za{f>QJ7N! zn^)61jW1x=k(Eac4-D0iY*D|ORObcnL;>OLG-$$Q=YYSX&!eR)a6dq?qL7mvVlA& zJ97n;;`555gKj(iN5oz8njk;|t^^|vf|wgAM8~x!*fk)gJ9nbHn<~6 zFLcHE3byolzUeeCp>|t~!PLZ?wOjT;&iZBy{Z?>SN#Rm58!HZroM)Xt<8+0UUrYvQ zu$T=Q+Bl6Kr!>nNW%(VTma-b*5L*>(K(lLI`WRFbr)^#$>O5ub#l2m$L$=P~Q;ABZ zLR}$~&tq3;5hggBd4+U95(&sJupkdFlBMl0ak8tVh6EC19;()5WizNR8_Bxir2?x$ zL!?rzXxYrT*J3gGyojY+bsA+W)r;eOSbZtFU0lKT$Q`s<9m*B?Y!HaF)tU8*8Hi(p zl`iN3T-YakKB>hyUsYkJITi! z)f4KAtSMHAc@Q81+0+>c?L0O#lM&M$ENe+;ONYg@Fd>h#`mD2LiJ>!GtY-Zm_NN29 z`^lt*{L_uV5OufN^?PN5qZ2pB{SB`T;eSYv&7#a_~g@)y|;|6CUF zDM(YMoz0<3<+`Ml7TVRlQ(UEuZ4a*C2gD0X7=7o_sZ8D{4NawNexTRO%4r>DD-}5E z!qFl5-b_cDdln|0v2rDf%vT&D4{=OYk-ENvf~)%dwe|QcKqfU&v`Wsq-0r zGnp3Q#-^mPrqi=Gm~W*~J)VK$*V5N5eI2}|DP(SrKT&q1BERx7hYt9$7J)Kb>Mbcv z$9+4M50$#0cKU}yGhGtZ;d>u*&vVCaD}nL+hlvj25O#wy%?T2NihQk!b4Dju+zg9r zrH5beUPvwE%IVyrR-Z!QZphU&3!2yZMen;6`dIX=ThHkah9>mMqd5nrzZik!$mPF| z2Wl zmXw#GTzNk~YUJC5!7uMJ17~e(AXRqi`5P%e+;<=Mw}r6VUp$!~vMKaVaKm)zaOjMy!*_oP$?zPCwN@X!^W(yXuf{)KScs3TsY+pQ zzY(0fbR>7W;j_E%ubrNper0vTsI1V zk4Dp@-Y>itS#op%|6$zp3lp1KQ(hdgRi&%}TF$Ve`AepsdHKWTxl~kP%9+bQep^3X z@Mibm$Yeol(7iP2TP*0w!Zr6SZ&iOk@quaTqmaX1wb2bD=Ra(1{+S#LmS$b=0Food z5h|s;HPY=m_~VzeUlb>$fa#Zh_L-d5+FCL6bA8C+l$DcXs|vgC&Y0}JHoW0p+vj7e z*d^`XR8}8)>BN{6HF$6;{ru(0vQ1$@Kc8Coc1ZQpN84`P^5)*F^FP|q+?P9+@?q|o zyYGT7;;`SGlv(*cr%HHY&5ns06`R2s* z>c3tcyZaX=Xn)wsNqT!*`S8^Pt+w36$FS~>-iqPig@r3`ADi3u#aKgYM&v8vNO?lr zi3!)wyum=C zyPd)o7;n^UT66=A@~B2X^6FUiNo3W_S39o*&(TQx{7)ji5A;hz{h$PB`@2-I{+FT& zBVX-u2R7&lk5QukXIsVPig6|XE4&Jz;io}}@IXIE(eHjS-*!RSc-E^WH}+cWrulb> zu6?4{!1e3xk>ActZUwZq`L~TrpXZp@Y7jE4cp1`ZP1_-*c7$b84ghP>uK@JUea;E= z1~os}+yMbVAUrzf-1Pt4pKF=knV(`BSB&>Ja9sQRl;Dwm4`%}JuoLg?WG^b2G(raN zo%v4Uqd?f~emfVvSN7W>Df4bA#*BkN^4gt~*Zvb^?+UH3aYDr5da)<4JM%k(?q74_ z=f+(2PTzIhCC+FIHpT<((X%EHS7zNhJ@Ell;~^i{M`2ag(qS0}4=1aMF=?;gjRI4m z;xozuGH^#drv%9L5+wMliq-KZvC4(|euO9}~68Tz9+CalGlxU<;bT!p#jfLntJX@G#7t&UAM z1)0MQhdAfh<_5*0==4?)oqEqX)NSs_%0Y{Qygzn7@BjV3UYN@Zo2G4=_V@XIPSeoP z8Q~m=5JD=PvDo|lR4rN|*QC-luuCW1g!kvhVuBI^Rq$|U+G3Q@zRmsx=L{#;&!iBn z5++RIG-?SQ^A1RBq1=#?;;r>+B8%Rng@EgqM$&|R@=oF{TC9X32_NYtQtAs6*%ZNO zDCs6r=6iv`8IDvjvI;4lHzqHyL!5*_pr$}6%9uFN0)}%drMq)6jZ_H4O%!O7t5I29 z_8Me%-K;G7SpZ(UaXBPmmC%f$Sf)mca;6YQzAhtCFF7oIal0m<4u94kxKn|l6|5^I z12Z9vnnfV-Zp5F;aD+5MAsKuarGzuc)VU1NdwOeZKI6~R)Q*-B_l3hW<(qUR&f>L>D8Flykl$V$RbjNyEQ41AwVjD#%;Iw9AT zgLWG@s$AGC$g0@CHk1X|qRg6I^g&=kJ`A0N;5x(<(53oF%WzRbLPJghCOLz1s#+49 zrxgYmGlB@uyS4`W*>Fal>>o{U^>;&5MH3d5uDcm<--^4e5`74n zF4#FWKk&-@on#jGmzw5?AE;EI8b8tS$ zcSp1?)MbI(C};6)3=|T(U{f2DFFcii=zW+rLh3RZ=>rfp(&?*Z`q3Q3$H|gB01&6+ zL!JCg1R&URyyc>CmZ6XplX&e@aXCJnl7QS$SIH_6UhNhJS66X({t;wMl4CB z93@7=feg46mE3x_Ac%ra{87K?DoQS9BtRIbBVj>`BZ<=0GD~;vCEW;SspNF>GKMZ- zU{tAC0>c(NuYz(I0kYi#Xy1h8LVxjCh)#z6&_`)tkkWNs?#oQg!05cso{|9Umw|!7 zB0*w|#H3_^3SScZ1b|5<2$kn>MUXUD&P##?Uxj1|OX#LS!BQtcACii-oFuu@TzQIN znh0On%0_~(fx-P3KM{_kAqmcXNQK(KW(fc`I(?=Q3|8zy1JaQt9IaMRz6utBH(~uK zs;*O!h`}LsIw`lr?vu+^JkR{~4n~;B)2vBR!+`U{&|Hn$B()lFAG(bO-e1_pC^+UQ zC6$Cr8BtQSmEl0|h71AiGFT7?%V8WmdGPv!aZeE?x*~=do=2t~&cWCk+L0Q138&KO zNDRZ!^3)s^oWp5zu%jqr=RyPn2_n8wnS^_;%j8Th))QblMlsK^*i2NDjWED%C$U>p z%xaDRxdFLU%hvnTEJA9IB%yIrdWNv7PDP_N;Ft^$P8ZP2m6ec#Mll4qGrB`o?gQtBv0a2SrUo|>%o*p6n#i} zQ3exz>>rXWfkq`X9DplOU}ABzCbkEW(6qId2*8+H0i1g_gOvd3K9Ysnz9!j{OC@3+qZw#_RR7)!|;~b9iI%hjTH_( z{x~!mAHwx$jf& zZozl9?ThX^g}CG2Js1U%H4E;476bzNFAotd+kgA^`NG$)ZSQ^Hc_*U7cy0D@m|x+J zA?K07p@&g(qgM@`D0$=Jt@Pn}(UUtycFp{@@7Cr1o3HPmd^aR-<73^{!PW04N9)ED zUmaXMx@XPo8*TT)w3)|-Q z6S~$14-21}NLqif|HjS!i5>eV=4{J5{pk0NFWX*9%WIlAw>WR((Dyb&$DHAplL|ef zX8+ITbnF>bzE=2P%-YZ~bGYE^yztw=lRW#@HqY{v?^8fZo!N2u(f1{JtFF(x@?gwgdo%Ku{$XhK z&9^%WM)z0>Cni&FbetURTN(H0`nE^JS3mzYxWTL1lb1dAR@BAikGH%xxXrVA@>ci# z4I!C*kHf2Ow&nf#V4NJx>tH6j(mv4UZJ1omo?5zPa_(?uW?b9WrH_)79nR6&g@wDv z-nbJN{%G#s?~~ab!$X-%JL>wcZ-3FtCf{U}6AI^yol-q`xB8Epb0^NJKd1y5u~8GZ z++)n;)^CQ6AIhVy6Fc@kzFLx({|3Koe`(jPz9AxX(DkT!!Q>x94?ml@(Ry<9G96d= z@9kq@pJw8(z4v%eNuK@R+s3}sUF>)q__(lOTi#ft4wSD)Mh*6ky}vE*;{B74U+(`` zTG)~3wG)=BDQo``W{$FdU=E}X_A0k6>RNf~wsE`d*IanSwSWp5=Ro-C%KTL~L8$9@ zB?WUwRNX(DqXFIlo#%P*o`9+?w**fKKrgQO)`6A*8lWA$-|1Pxyr07hX8#DVLr4nr z`pjW;;OAKNo`sq14{Ss7-;#*QvzT4P6yOl$31>jyo@#RpZHQ;Dm)$-)*7Mdqys5kJ5SE2M0k!X8st zCk0@gQy|wB1|dQq=JlI9d0RlZE2zNuPq=IMRJf}f4yy1pgWUk!`A<&kn86*rd)(-r zia7!skZ|O80b~_{T%=*=|6~>INLlY0C;$htTR||=p2t)1u3p3c4J(S~z+S4cR()cu zJ;q92zDw&V-2zH9zheI#+Dd}O%3Vlk2MvfRWQa$g=mgZ#Oqy3EntxR13e5?^lw zo~{(Mf;i<)c#GzJb4WMnv^ex+Rbvr4M2Q=yvZusVTn~59BPe}y&WWjdQ#r?U9 z(*IH$!llK%s1&&n8|81;HDjR-TABdnQYqyRSyFLAz?2#DE7NAF;|m1-6vBmsm@_!a zudWj5^bfULwH&J*#UV0TQw686IEqM%`v|~f(e-*GmB5+iXJ}JTS2sSzFQGv_feWTZ zPU4eYQR5Gq&eV!ZQi7;@XeB4bO~{il#}ZkL1kAi0JYtoxN)8cY;T#EEOPK&Oic9!Q zwTq5Jl1c&qF)o3=ga9{m3{gb6ct4JkNLoPolY{fAM=n8j5Nac*5MD#c!$}2*iHzZv zlyrjYgF-j~&042Y_~Z&j{R~(+UhMww;`s?W15*swu8hp6Ap6ZQiwrTCpDXp~Y7TKT zK0S;Np>1PeFtwzqt~v~Q3lCwse0RwbuxQT0An6Mw_P1;4&=1MojpR`-NB=Wl1FDf% zage+Mw3W}g&33OJUXInU_9oNk8EF=w#u#Fung}R;t`WEa6(%Q*n(A{Y9Yj(zR;x2D zb%PQ*ot}vam&70;xuI1WD~EeUu-w+4p>RCIq+mgcrC>mB9r~v~z`g(xY+}1|_$&aT z&3cG4)iO+x+?K8tf~`;Z^1xXL$OeNCMu+s$GM<4TBBVf&65W7zHqnq`3DOiVtzozW zXcEWHR=J?VzVaFtj-olGGz>#c*JwLIUZNQMH7niF#v!y#+NPD&lmISy{Xz&d3sPct zEHBhq(;N8`Cmloc41oU{JLgI2=WF?)nSHRSo=JsD|}{p$uFn1A#E|nL=2Bij7S7T^q}r>fJpd zxG0~=V9A0QiLuEXVS}?la|DlRWrs<$r{ssmcv(EIK;C=hhTIglK{c2{z<}^B3S_fntKY&P?o-{D( z;MRu<05)I)V6}*?Mr{T@9aD7?KAVj)iv0nauG99x&9u({Hu4Y5WDtF`ISpdRfX%B6 zumSQ?sFP-pq_ycvQD!2b-o^|7>?@IQFk|7T7t1aGTntm7`Uj@to1Cb@MxlM!U2cni z7kQMHRgqXA_5(FgYk*AphPMk?5|@ih9KLRG76E-g5fqmS`=P;XU0n@tj%5Pjy|gM_ z$wQ=xZ$gPW&S5peLbX+YUJ^-%im9;}Tvn&#)DCd9sW}%*uHuKS1sJreiy` zs(j81bR&G0Nc#y4qZ%O2*2gzA$TjL&z<6@0sb~Q@emA^^8V@c643r2A*g^x2q_b!F%}Hi zNwwa^IFNPtORZ8U7^i@B-3Ml65Ca>Fw7*? zG^m!)6*3=0PL%LT~y}_LBqlzQ$O1UX$f>yv_f3xM0xu zwuPkb-3$2NW`~F3lea!SEQUMUP&yIMbz-GuSJK+!bC&s~M(~kXxXb$9uJU#P?OmD= zJzW~i@bu^D`B;1GUTgsqksa>EiSRb0uVf*76!wyaHQ2@Y8FOk;2#U{U%+PEIJ;hU4 zY)B-;?W8J+GNc=AQ*Ew(W!6tKbEy4LueCRO0J(`AM`m{QjtXBTx>3n#1 zz*0URn%PJBjqv&iHV&;N*7I#Mmm1fE@<$-uaiX42a;V$j0;m^0sdkoE_j@VdFvIC~ znumBhHxp5j`Tl6PaWV3j?;0(NDAj$$asIY_E0?SaIto-)hE#(r-N)txJ2eE^qDF2g`omy8qDq%=8rI zfx99zeUB?n^v>ItX}*6Qzx7~T-N5cQ-hXCKhu?VNv(-U`+YU_mPgl4E_*jG z-y_@!;zy_>aks|O7JeQ7ebvPc$M=3AzV5obwg0W})FX3Vy!i6)RcFNKLHl1J9)_`T zb>ly!REif*-`Cj&FO0p4q$GHb->5z~F~5E1v(=H40mt%E@!kQ?a~VONPgPf%M}6V_ zLk|M+$UkqTy>kELA_g{Im@IpubjnW5OKDNG78|^>3d}okzY{$*Xv9V_&zwN)Z=YH|>Np5297n!Rk zk9_r_e_XS-=bQaq!>`Plyy87GXY!9>1G4<>X#cU9Ye1d(TC8K^<2T6auKVkC7k{4! z90%M*|J;kG9t2!#Z5Zu;q58}n^CS2+av}3YX7cW^zqR!Ee)mX9VB!7y?hh^&c=Mw2 za{IPzRy~L+jGHsE(UP~uJ6D&?JV$5V7}|FzWutfXk8gxl>wYK4)JNV3%^Vx5D2Xl~ z`l)42cFFK%sAHd(POM(=?cK-guysG_M_p9);fZHwwpNV4^TowxFI(QRZzO5KtnOzT)a^!?Vs?1y`fMQ0Bqt8Q(+dT4ld(BPeIp(8rN z{1ZJ~Ixi)AVo~qp#F+Di{hxjXd%wAw^2X{nZy6sv)V>#?K}mIokn(iI(p_dH+cDWY?E_hV}YI`p z!Ya^>w>^2JWG)qVWHaJDHIs`Q%;5d5CJTjEYe9Eka`&M5CkPZ-cm}E7bk*-qZ@2vp zB7%Asm`8fm3Cv?a1+DsyDcEv^%QM%y2A7_4eMAL34)m>DdjYE2e(El`Eg)hjPp^7r zK+xmomCu0;S5S#QR{;GOfCQ?%_p@vKnKx#|Pet}5Pi?@zt_Iv!0TSpwi25NjjUSNz zA%Q?h(7kn_^rG?qa5-Mw9ql(B?*4zc96ZH1D&i>xU^5lR8lIxdANX}6*zNYzZlEip z*qaUZxIeWU=q!)k<@~b{x?i51^7;d?TQ1m49c>-hjr#3X0L8%3{)4B$(E$4c$}hkX zBL;qXsOov^1fm2KCrN$_CQ!<|*-x9JoXQb?FjXmrLH_6owjC}=1BpVGToSKJ>)cF%9K_2FD~vQKzkm@VjDj=? z*GE_i>3fePR+AgaDm+0rWV!e1?2XS9M~krxbg-BrmHLB;b?^^K^5}P5tj-w{v(`kN z)dw_FCUhtpx^w2Vb7COLhVA>@pb_nS;8ogy$I zoDEsQ35Qgu)E70P$@nQuuX13*sTCLbX-YYUNKSDODFcRn`}$f-IMsk7K1~>S7;?eK zjyt60d`#vKUPK9Qr9|lx(a@ZM5Qlgw%0%A&aKn9HI{7=ujv$WAf%R!1eNdsw| zD6NE>88X^#1S>#NGlR9^(?d9!XwIidX*|#xVg;~5NTAChxs8_jK7nzumgg;-kftVP z(;-}1BP2@8udp=CKGo4GHOu|`5#KsEnKe`jm6Wd=(V|oXreY0vaVnx*ml{L)H7`Y` zMX+P!>6K5n0U5P|wBu@C5isIFlOY^gBZP8t)MW+= zK8<{_xMI#Pk&FaZZbfC<%|Kp*AwdZa!XQzIM$W>!Y0!^;Ow|O(_uwjq>m|T5 zUcwaPy}8pQew>J4Ss;dJi@?;9ivKAaqT`&2V$>Pcg@kjSR<7Jny977h8Ecyye z6M8^=TN>(wJFz94rUw*dQsoLP1e+0o=9Ft|n;>x)mrhMh4(ymxp|y5FCL}uzlh~f7 zRLE{{qA0mat_oFzu>6A426K+RLRtf~U39z=Sz>TUz~#t4irr*97f$J&YzQQ?5oak9 zJqq`5R=0pK0$B_%6oQRFk93sbu34Uf^pWSxQltGDtHnCM%@r;;cnSYeWyWH>nScTq@g5?KN$T5AbO0tx7&3QqAu zBl2Gn6dGHK9e}KI`m_--ry}Rm(8Z!UBazNxm*6U)ewm^E=~{+LY^M};Cx(2Po=(oS z1Tj5DU4sOFYZ_xQh?;f*uxs#9P=G@OI|V--nbqjhaH0_}y!KB9aTAGBNxTBo7RYpv zY)OyJ5F0~uqRM83mbgiioJB;idJdySQbL2^jiPB1mf|JgS3YtZw2*C|FS9&;SN-O_vRBBF#cJy9}_$7-NxI6@b(z;y3}qo9b=eQ$`D_ zs0|bZ1`lq41oGlp1&z{K2xYmK`ioGD>!!zpu8K$@0dqLDw8R%wdk_Yg)x46*0S4;&Tb2&)OoV@cNHF&S_ac!{!7xcP zZng-}*_>ok+;mCVRHh1uJJbIyd>4R;z{d^(a^w;T4q}fGil@LF4XOdcTgD`3IK~8I z2l5Ijc$jnD#~LEp1*t5zfGTsPFUrU$A;@1z59b>QhuOl)qfpnIR(p!j<2dqe5;PNV zIJFVG+rtJ9FLPHdJSFH$p1&>PX|#l}T;u9Fypm_RV3Yv7TNjEZx@E0N-=-td89Pns$PqfVC>gRDOYPS)>Y(Q94Mieq8q zEND+Y%R;BAGaN3?6{8>EFEqKXe>T}Kle zRWGKtGYLQl+;A zvWXF&^Re-fNW4I&Q)>eDkpJxm3fY#egjBfQtkczsf%v;rZ)};As`2e`H_*AevgzXU z>#AKm|NOm6Vml~U={V19esR0Ot7UUXc+qx@BcU%&FsP*PQN z?%21df@(*0F7CKD`jh%r;Nw&_sB7f@qrBr|xVrlM)=Wg|lY|vdCn!J_r z)k`V)W5o%X3rCkPFPt;++e;TGws${Pt?an_@6bo3s=V0Ym;OjT7*{ZS`Es0Nt1dtK z=I7o|)E{h{_yq7gSG^gIxO#8f@`=x$;r6#}J+rOuK1fwEzJBrdSG=!ww1!U3&rMN{ zEDovGJ$~)RWaH4+w(6gUReYp6n)KAo&r2E_QeP?@^*1lZbLTey2j zyJ4yO*-XgmKt4FR|NOQ6pVz+9H6-rK(|aTK!Yq^aXDipb!+U=`6GK@%rw5z zG4$NAysK%?-x7w7y!>-++?~md;>9~V>W0)j2VKX5{Y*zqOp-RZv|4Zh9qSd_Ixv`Tz@fGstD{1t`gOkDLNCOGi$rmEJq=&BTJ- zb=3!3hd(&8!Zrcy|vY@kY_;vvFC0Qe!T zN_E5vWsOFFK2{fldJirf;1;0B1F%gzaA*zGob>nYKsGDM-6mZ`lF=1)r8a8Mt^xY> zG%r;V4N3uFi$PV^j+|5jWW=SA&x%RtUjoQUeX>OVVSi;h>EoqfXrj6{uD-=wbtXx)3q>?kOL=d+Ru4q!De0gnXS&l!R z3~{09Y)oT3`J_Zhr0@Pap>dy+;bsezOI3!>u!FS>oV~A`h+%yzpkm0#`$OlD@{`Oo zoU%zvVL>A^HSt9_@ir_Rh4;a1xkDh^nqp~D%~SGFrw|iWM92hEb)B0nN;tunYR2eF zco$D)19XJMvWPW}i-C#^Wdd6R^gt|8OQ4~B+yKrTp<)HZ0^Jtkr@3HDEg6}L;7f>3 zs63y};MU4_(j@B)5gI8h2CjhzA1VCPSV;rNzKeh|K%fV+iFLjv1ts_rWvbBWmfYC1 zgT|0DsS%|JU*TCoFjYvGrRTz2T7}FO;P%&xMcOt>aZsw1OHMqA@pVVV?$fhpRM4mh z6=<57Q^TlUsKKMtgl6nAl1ddL)^-SLAnu5{T+{qm@!(bv8mTpJ#xmfS0%oRrKtgG` zhgK&-Ib5O#%ZOYR5Dw*F2Pg;jxpJSmNa)8->uQ{srXJRk4aI}?|7#a2M}V}?hsFRU zA^|CPa=sI+-UI`SLZQIt7loKqG9T1nwE{1cLSQ8VLWL{*6#`uRU$~DH4(1sJHf!_~ z8YWzXgyBl$iz%TBzLZO03UJnG2DlO#e<{eI3_I(K%BfsX0?)~S1}47AP7+xwiv)bF zv*ZWi@r*Jl5NwItpXpll#O(h|L59Y={#Gz7}3$*s6R5aU?D zitk{9i>?;$#oo2mvdsbRPe?83)AN!QIzTZR2n%aV!=OOEhT8t>QOk0Xj$|nqk94_lLjMSqKZp|gLR~`qT7En%h=6j{g{HC1(zutph^Na zH$yq4cqdT|B{%I}A9Z0pshURE(<8GDR>!(VR?zbb_L~GC`zdzG61UO9)ZW z5;C>|hb)bVL@QdJ2z^2$C1K4BqS$>``CpU+_E3}#D{(Rvso|lwaq zvKGU`%*s9@6@^1}vQ4lI$U5m*z)xbKu5+TgkwQDm)BL3|JsKWGjui-;2#A9|1TRR$ z=fhltP{}tDW)Jx>p@k_ClVXUElrh1~bl}k=7zJa(reQm;@k$l znkrDjdaGcQs>bT+q9$K0QojoJHxNE<*dnFhOCy!Ho4BT0!0F82%|-)jGR-5p+er=D z95wbL8^NP*bvbASi)Z1Sw)mhq^NXh(cJ7jh0g^IN8&2HA6q?~Otu8~r2uYF<$?vK| z>c#pH7Z8SO6lCyO*r7+2C~!cEfqEKBR3!ShSzJ!#T^_&^wNRg(#Lv%xah#9Zd^?Kh zLV2y7+<0~PzkRcD<sgH0NRKp5~v6Be=|fPgWTo73BX zn@gU6rwDbv+^T7v2nw`azVgr}hzXhg5=@xWEs0(NQF{YaM^)fb;XD)n_8GC_F*I_R zT8~H0a!@&Z71GJDr4ZzgoFtp!1YXt1$EeB}aV5u8a|6xvT^1kVi8S!Jaw()47efTC zf)6#{)9^VVMKYB@?E~GXAq@3;Kp()}Kn5H6z9R_?7$lvLga9U9NG1Wq5Ectew%|ko zo2LtwU`qr<5&|^>%OZ%QCOC;nX7ZoW3HffJQ5h@24|{E|7D<<2pi^S1IiA2ki9K5+ zFOm}k_@a{_8gQptSpYrNN&y^L!7Nn^z>`dZ`ACI$z&p{h&iNknqovUr)BF(qvwjibU6*AnecM zOZb5H?6x{#bXIDR{s@Hvj_4OM>~KIxwl?IaW;>D;aUt>|vMa=8ySDh>XRi`A=V?^k zPVVlTEKJHzOcnhvH@ct?1b7zgN5944p|GacH3HF*kb^=M2|{JLuikK5prlOT&(*;tjlSUn^fMLdhD-HVh;+5O|M0Ud@8ZdI8)}oFwS86ZI4;)a)0@p( z&HQa~Ah!#hNzTqDBf$Gl|9%+OGCgkr*Wl1Kz@+wG)3Ffdf3@I^8r%my#t#|kEWP!F zk#Crt7J(Lf;kpuXwXhNLJMluhF?Q}w=x{p75hsU!T(D{BHlvqZx?i(7b4b0eb$BFN z{pGxl{@w58Reho#*1S3Be0b4+!wah0?j2~m?agE3X}|B9)ODR{?MR(;vioBn_r^`u zjwEqG*B`XNgXcfN$GUxIohn?>K6muCD(d#P%U%RaxORBrt7rGm9eO<|S~-ODe6P>k z{>X9o$kU+D?&P+P%10{0;*6@a$!lNz>4^)x_3Iy}=B}UI`+3yJ!rYX+v8{VP(p=>3 zM*bS&osX})Y#)A&4Vrx)exbD?f4LXho~IdkuYU68tJy=x>I$`E$A9iP;ThUBd3a*a z?s@(D-NzG0ejjS>_B1{SY8$@t`vw2F$X`D74BUK9Iq4kP|8BZ*j_+kNY;;gvs52IlYmnz&>B;*jUY zvSk1L4$siw#k%9VA)PK|d?N0A-tEcbQQgOFV`+VRzA%20@xl(|^*z=F#AI8)ek3V- zf#I2-Q|6C9<_iD3V}E$4F>k@cl7u(UM6Vy~DkWntdS_sF5JALHJ65O?un9ThePeLD8@g;wL6 zH;37})`}73qi@HnqaIWV9m1<6KZOrn6+RLs$NQTnD!wUvZirzn;o@}k%wq?ki7We6>+8Sr~q^|GS_R2!IPyrIYQa>s~y zg)e#&ppHKVUL0B*at85pzO`a<_1Fqc$4ie=UI=Qt+v26s*2r;e`?rr%nkUl4=%g)& zZs(4v_T}vx{qn}5_1~taSVoBTDH)@;0#p7Rd$XyvXfstfYGTOa;fQ{Nh9s&uJEqhw^)cX_jI>Xd(R&}>v{kMsK&XaXM_|0n1Bf=vqc*8 zrxEr$Ezau(lv2+T!n#m>?~Y3~+@Ct4r>fINK;t>s*e}@gpsNc3?{jvjc+1&`-RewX z$PGW|{!``Wjs|+T7U0FXY>TG7>J6>5_XdDj-a7j)53f>xG^QA@=m5gH(3ttLhYC+= z_E6<1zXJZ|P+*WSKDT0CacdW-32deRXS4Q~$L}S#lJ_f~+fRbss>va@I;dsnJnYv3 z4kk<;?0<|#mXm70_}lmC|&KqCa85GA}1v>E<=X1&LmJ zeKh0*uAp|1DIVcEI50)_{3zTe2f*JgOzyg6_X-v^&*DyOW}l!pv9XKjddG-f=o|^* zSGc13AQy7F3+l4m!Rq~k2?ea$$D_%0ox7OkWqQJA4r$$rjqp^_6Pg??JFDP;rPKvXkO0Y&tY@Y`?_ZNiZ* zdc}erh(OL_H^ERdWkpMYI>{^-jPWS+#91h{Se?-X9T4`lSy+_FAhHC0xxGx9UQv<* z+4S0oXHB<7X$eRI?L`YGLBNb9B&*c;R zX6LkE83nDRr6BbL-bvc}NU2qcOG#glS`Sk*bkZQ#lfewilMKsKgxE{eqXcPDRPdOb z`AD?nVtc$8w$dzi<;GB|bF3qu5zvDe9F2ps1>d9dF;>omE~92*e)o#g0H^Sa@|q4i zrw&)JOhn)A;zlgkxi$#1XTL=FIes8Wdk>;v8!$Tt}k8KFRU3S$QTB}4*Ieqf~SBV8pTa*BbQK(d4{D7D~NI13c?350`FSO_Ur z229w?7b$;c~Tnf#nj}2p~o-XMqdooQ4=E zht~;xWMpkltSw#C%595SRjf6JWgQlUisC&GGs}%}82HG^Qlphjyej~qeR4E`B7;yi z#ZeTIb1Z(g-JB{0vdJQdSvNiHV46V*(Hc@g1vh|!m)Kf6avpdBiRHl+I&1t5z9Ak)&;Cr) z(S(2tEZavxGZf2F=YT}5zGZ%OQJWc)hj0Xi&f$G>V#|BkC#gz`Di(ln6yh%NwPJWJ zmq=v`2Oug`ROBASHj}`eL4~rpNLJM*Vx2IPM5%BWO}Z0}sHuq&FXC7o3llIKSdsae zO;%(l9Ktjz7-?52ObQGZpwI$DMoLZ};{+*C)QOOAjgS`AYN#R$E~Wa4?F7VuJel%o zAlAKx2`-TqHCl_Lol#3~;sD@Sni(xLV0N?JweVW9M;Y29zEDd;F}mI9je!Q7jpVDS zx-Te78dh8)}iUA%+4!lV-I5Y7N6KLU3aI6KG-JK=cCyH{L;v2FLupm>RA!EPD!h$RS z)L_Ug!1*S~XbH$hKs&!5eut_Fhl8d5$B!chjtxc^353N!qs1T-q>>i2OdTsmP(kHR z^qe#v)Kn(|mJbTEuBQIUv}_?6>aJrq3-c*lD!H-?w(HtLY4x&Z?Kvz8VWMzdKMk~U zbu^)+ht7DBQYajl&jt|63zKO&8L1D%{Xu^SKE;J3!P)dC)!T4DtUBa4?Q(vE1tOyM z7}5ll83}a(`GQbpfR>6vI;Cof4&s-9qBgLgMnHPX`=fr<$XMuKH(L|goI-uv)zP- z48X5-$#jhZ=||xLs5p^>DO;}~175`tVWAZhSOE}r5(yBSqQNNpcZUY>`G8>$_~Vf3 z5SKs{VR$pftMz9TOn8$D)Zq(6|hh8K79lQH*k&y`olS)JJH*RHizJmKj}{KCR

    *GjDo)s4`1UxpTB}Xc)K}PP5IdqwnVc_$*`TJ4beC9Sx+umZKzl8g!Ta-^HH5H zwLBX83~m$BdGp(_rdDrFC11Tv58=dt&?r2rtJ1KHA0TcM1H?GWZ^Q>PpIVG=A{87Q z(j9;uPaHKnz3lvhNdBuH}bn2;(~7Y{d*jw>jA4#h+N`;kJZztmJP?J0KyZ+pVq~OMS9PPvn{FCFJ@NDz*nE7EBp0GE5QL|;hLKoZa z@h!(%@$z=K8Pe`@M<-KTc6>YYm~jNsd~4`vdk`0&89Vgro{o_THJsNp)L0UiKUm^P zP)^1cwmxzd`$3t`$3G{vt{wjJ)Ps4SZI2rps{W>9&XzatzZKDOV8(+C8%1)#|pb{$oiqM-PI<$6e zhjV1ZoyiTJ`CH=J9`29pc-NDf^zPoEm$!UBHX7G4GCKQMwX^$(iYwkqaz+|3vK=2vGIkxygO@$^~V+|C;#=+ z4$t02)t`N@90|cP)9(*tw>CYRyE*UTX!h5?xuOYA9~#}{d9&%3hW2Q-@Bid3(f3xr za%8zV(=Z%+al=oOi-vB09i4q`+r!V4Rlmn=dwj>QaO=Z3JAi5S3vYZd7&d-J)A9Pq zC&Pt?f>Xnnlk&*PE!C4-U;XjX=`W&J-q4Q?Xrf!ZtIibaue|d5^3izfH(hUBXoLbuT@)@R^aSw8Db%r6JEDnaI|X zk-mTB=_Xz}*V^=;q&!*&io*w6hD)B_^6i%Uv0H+gJTFiHF8ME?<0;$_mopLd<@UAF zYrSwuo_?}&MfIzXUW@K{WBf(xMeD7r_pN?~jg$XUZl8?%>ifOp-#{H-c}{iZEq$Ey z?c}k-w}u)|L}!nwJ}6x0IX@QHHu2Tk?aTIGy&saBY`)b!))h9`F?8m1UV%&Dq2Bs!TBh6bSfa0fJSa=^WN`y(8-GXQ@8({lA7`k0fgmuehOg$50HCG zA=iD+G7fiFgQK~oHukfR_fX(KfLHp@fm)^xr2GFJXeuG0B1&kD2jta9V4wCE-fJ0z zPFj=o6ydl+=;MJr&Mj!b&nQ(9(9f2+g=DH?s^A=$el`huDuLW}T+qjVjL=nrpJ3ZT z1Fk5LDiei=2qmUKf2-(@3QZviWa2SF&x8_p>2UXPAdmYM>Sx8fUGFg9RseVz!Kzs> z-{X%7n~~f^q3UT4WvYRR77imEcaXcy(gc!V4U5=NXJ04^_?aldA&;*`S+!!-B3Gsb~%XK2q9E(0gbb=EjQZXp#zQh>*qWg}ES=$yWwdG{LjdmLMF9)obOhEEWr3P+39sg`IMf@Fpv0q*8B1 z38uN2h2y*I)tDj)F2_?#NU+2NNT}$EM9?%J_~Iw0_0MO+hoy5ks3J`$n-4gIx~6~` zoWyopq^VT62soZ$?l(wKG6b|$z+=&b65!{VWp%=#$1?6xOe}hsXou~{KzT1-E`8gc zz0S1)lkf{56x&Iej%66pXs)el2G24GST`V`2}r}qazK~3&sJ6_&=X{_yc`i^5)h`< zNF_>r2(SPR26JtaK`Ioh5ne$`4&Xk`JsJ?OaA{!P9Ic|lMfh>xz9OF&crh9N0mxc# z$VSqvleWoB($liPD3O=Y$tocxO>%$%1K>nCdX&otDwi5WEWxFcFp}zQA~+1$-~E*8 zGZizFH^Ba%t{dR$86pB+D{b~iGLn?MtVCWVaC_teT0NyhvomFBM4<4z9pXyiigbed zt1NLAVUFEa#RiB%E~ODZB$6EzQ*w8)BG^NRP_}xag4j&zGit<5=lX{hHTW;Z(lyjQ zEC&uNMj1yJT*D_|#uiS5rJ*9-Bie(7RJ20RSf2;@DY+Kdo!{PyF+e)`7o!T73oH@* zq>A@P+*7`7KV}I*m*TiX1i@|S$f-|$V5suc1_`RQg*)Nk9#H;N2KmX)Dny1lfcl6S zP?H|zdk{q8W3)+{QUZ8EsuY{V42GRaX0al80p;bjgbzW|>&f6$k;o}ufG=!Di;hF- zDC_w<}{Q6SHN=GsVS>Nv~plgf)Zdy9a198%7!&% z^6&I77%?iSK|TvAtEFp85iW%V%jhATHRVF9<8y&@57zc0r=J%pq*}Tckw);Ba%K=a z0~p_oj7!9ENWnhGE)dG0wG|tf;Bih(z>J#ks_Vji^&xaheJv8+Y`5y+h~h*q%>Q+B zesB-g3DGRDT}gt6C?wtmnMC^C9AL+h5)h(?LKO~bwPqh>M>}CeU;*=FQkZZ%{H#K< z(!Pg6Kz0Zniq<%J3wp=o{qw}5|h>YO9i16 zO0x=(6NObh0w9^F6>MUOk?&0Nr|Kvk+f*@41vAV5-av#;3vbfoMj>pl2L*I>X8x1v zEw)^!5)G!F#}w(~n1Kiz$JTdU9N_WArchr>8bWIKlg9$+w;h-f98v%@$WLu8PVS}?>yE%6T}b-T$q9Pohr z5hO(`6`Dpyk!a>EOF^`$B}%52-3-z~vj`YC5#jryd%xe`r{taHhBCIZ_w)UHJ|C}5 zM7bA11W5==2GCK#_bqNmAh(caDz8TC|MIDgu@g?|Fs%xJ%pw_%%IPxEhz<@Kbr(n*D?9R$Zd ztVMl7N|V&S3SI0_$X4=L=-0sk&FE>5@eUX1>@o|O=KMs zo+0o7!bMqC!LY`=d#`lqNRFxZ_FGnNc>zllx=eEyE(%pTN_v1zsdYZgHeUhS7q3ggXH$03uP zph!aMg5c=KUx{%BC3c(v6G}vaR3M88P}d9D!VCXHAbyBafhd5H3N%`PnTDAw5rhqg zN##)c^b;B8VHiXXx6vsPyE2SrOO-@9NG?SZt3qF!{rb@n+PO)Lwr+|Iac(APU4qsS z;0}7?y+!;B<#Wm4P*uIPhvB+4hz~qwp`i#)6QTY>L<#C93fJ@FMR}_MO+=Nu;(a&U-9&9{-9VjPm zEER@O5~Yvhx_wO{sN=4=Ct?sqBla_G{*NTi*jm(f!5fvoVee+7JM-}LQCq{YiTmPg zQ`h@Q;{H3SM@;g)ZA%tR-+k&XYD{k!A9{NCGT()`0oUlf6US_iJ+s+Xn|bVwS5J(E zUNZ#^FKCGv{&{@k2g8eY4&WnbkiP5HgdZBb=ytv1@9QVF?N5Kq8}!`9z5Ojd^r>s~ zL@KR+>EMSWUp1zo8*je!)#r70D~f8l-hI9}YO{49ZPMJbn*JhW{;BturIhX3pT6vV zOwqC{p@U24Yl9o`SMhes$lQONCAvEXZ|-gj>s#@D(EJmL)ZppQYCpbnSPu8Du+=t< zcKx_1<=FnaOUPrsAHzo)aebNZpZB|kORXcvcDL;v-qyY`axnbPC+{3P<_k$JTv6=w zu83%B@Jc(|x(08~)9)Ssc=A^Q5^9;*iT6I4KlZqI?b(r`dC_R03%-WQe+^~@)y}^2 zVf(V5PaR%8+JC7q`EGbj`iFP0D`y20ar1-g&@^&Kuf)<(@3Pg8#a)}-mGOjq38sH) zV&8`DfUz&}`TI=d{wCAT8*_?pj>Aywx*}?1#S8j%V;3#y&ZC2)DTi|K>-flb{4_~_ zb>hQig$E|S)Wv{W8KZ6u6npc&oO4@WbZ5qG?B9dOAAjnJNPXG2Te~tp*>o+%TQTr^LOR)J_tl%DR_GHZ=%*7;4Gz9*!bXiR z>Q8xH0fjpzR&Q)uGG1M|TN-)#bV!H(%-yw)-9^Kvng^Z-#D;0b@ILd#S>EzbKDlx1 zANQYgeVrEArGIUF-78<8Y+L_&>e%HoiAVmW^De1LyfOY+a$&{2MRMWFVG&Kw_6D4; z<-K2jp15!Db?$6lZP#d50vIR7oo$xM?{}tuaQ!_nNbH|ZELlBkjk$|yv-D`OPS?*J zQ%dQnsv0w+H=3m>RkQjp2PpB&MlhBs!qYn12v6?-ac1hXLLl%jzY4siX=LIbbN{cg#CqD8dJs$VLvF_| zhDOo)k*PA#)Dk<@C~|$>TbQujn3Hgs9yz=uwn^}qOfwSlMfKtQNUv=px&Cr+9& zz4S>_(9{AwqzSl}EB&u~!9711Or~>;Ym>)&K`9MQExz^AoRj)R7<#LfCcqu7?Clg@3@2df^FQrl+tI9=MqQ-&s15^K0q>8w!OY z+q&d_HkJWn3A_a`m;M0QLMKy84q=RONITU8O6Y~LveT$E^i3+w45_{C;6;HE_4L1u zsA#4dOGhveSU^?CJdeHfG+x9sQcsn^XY@48Itdy}-*pq*rgZq=EB*=n$vztCrw4gJ zn=Y7Y7nSXMPO2GSFBDWo)H7j3Q9?#18T`0Wr_n`rH3pScHV|tB&(oF7jAI)jR?Ti& z!fX~##5E~Wkn`d)NzagKdV1A@C_b9zf~mS7Hl+dG#gZw6!6lWfeXam?h>nqL=|jZNnS+#oI&jx+ub259_~<$UHRM3OFCX_C%MlI9~UuPK1O z&ZvV>k0X$dA*;DyLaqIdiNklXxeSER1S{P`F|!Fe$c@TIl~&~Qa%dARDDU6rPzUF!p*z@wA1((@quB53~QDgKHuMe>aXYgGU&Git2zpeVAT;9sQ=2KY`~mLAxhK{L>5hl zsriUA)IuzLTWmxFhd^`3Mc~XnUhH72-XKeGxn4rq3Ma!dn;?HuU(w8@GEs6#1O3#M zZz?$_mCUnwuEp#4izFkdBDy%8Gd3ZOE1+SEYh#gYDxje37z=hTd6B)s=2;@W6c*-> zF-=qfP1MsN^bA~LwXABNs7VNqrSRa+@CsDAXgnY=?OESQMWPuRAJV@5aeH5f7>8hQ zXp*R26wTw&O0+YWVf~bfMd}iWs0cvj#v->`ktALj=g09R*cpKMFVU35$xI365hPiV zA#8|u1r9fog0+Lf4N^099_wnMmFgp`ql4i=TH!On=xbqxGt!XvsV(;WpC|#VLYXg#xpn-(r(Ar`h#sx?j7)a`wRFKH`*9dH%EnhOUF!r_90!mg`g?Qb3G8km&)ayJ^bm@m;($YDb-H5mZ3Y)4|j zlXI8I!XpYGYpdI{ERPfQ7#_Tw?@(|h!ODevQj?o6RUI$WVH%uYL1{!o9Wx`SU<>T( ziAXnX*I4Bi>WBH+1{6SQW+Vtz+v-GzU1e8=<6O2>DT*Dg8jNbCaQT3wWJ2qt^ZBX@ z^hp#np8(F99TQc@>39{B#*&RR*eDFicGi%NJgH1Ytd>)#oOzEVQ4ejQIS{xc2Xz+@ zZWHr3lu*P7B>=rwm&07{IDb}HSUQss#0WuE-o;WVX=s4gTx2W@96D95=qIYuaF!K? z^!B*U2$)6yHIg+TUevnc_%6wWs;lU&6w_g;LHdxqc*}|waB-%U1Xk)O*Yz3eU*F=OK z!18gOTE|g@a)uz!Y7%uSR`yfn<9qNDMvM>-P_)uK(;VRrTZ76fYd=N61uKEIPKDaO z4Rs`|NkK4TngCTAsk=atU8IZhe^_DaR1?BpYY&ouHn07hU>B&vM^s($e@$cXFMViRk2oy&?bO-Myobjy8KdKL;>nwM zp0GyJH0;k7$rwq&onI_ov6C4*T_UP0Ig#>oZeb# z1@u4}_K76s;cR(qSb5koCl@UDJ0FhR(UgK|>mv-0o*0)%MR*?iR5J(O9Wd zqfM0}(N80uI6T|YsS96cY+(e?PfSsyyCZZhE?gm{Ar~=|*%F!@%oNXB-Zc%2LL=)c z9fPD;9T0ILcu*9RJBZ+(xIE*aJ3d5v!5;0j}=qPfyA`ayv;o}dM)ip`S^eT|R3#J#bM*&W-(z9C*rXreJl zKH|?1RZjG|>^iH**4mNgjwvhSRMQ3f5v<2(5rq!4#+(|Q265G}CYFgzFh`X-=e2Wm zQx|G4+WCw78@Z2vz$n|BS;iP=Oo8Y?wP!_3$BFumV5zI>w)fbJ=Z7~0yt3?0#O#d+ zMvzxFZpeIk5+8qQIASOxWL0C%;mOnp{Y!Vwp4`25aBoFoz^Luyv7C_`sfjy&^N!9z zjx8PCR{3nf#>}DbQa0}Jz0_N6-qf|~y`1f1EA;8q;H}VWOGhi}CZF^YO&k9)r#{_t zbKhm|Q2iI>_vN8(yVuMQoNdqk!MOItv3U0`xx3}=?aue#AGm#)_C4!}p=y7>v$Lv} zyGuLU#E+Xl=U?tcyP&bAT|)l#;_~gy?Sy!Gw|^b z7w_rbt<}A>Zjef=%^KyunP3Wk8ANU;jt{>LzRQKJ_j~obv+tZB5)XQxsZZOtf5^P- z+VHhE?tj4SE*?)I-d_HccKYQd(I)1bn2r5K=X{Itb34zqE_?a=@m(ul-?b0afHrU9 z(jQ%a$fncx7tmkDzW{lzAL#*Mc=fh)c0$VDJ7hl-{ro+<{)S_CZNOyvNc1Zk4|p?> zV;_%1q-~rvne%bt(xE$ztC|a$u@g^hoOZwP^yJpNGxmOxvHOzu#hW=VPdt6OcD48O zdB@(G2zc{Hrmbc0Zg)=mz2rN)Um3n5r-xq2zc;8)44PQ^#n&$+w)-|L-;G^*axAtq z{kh4W;zHZdnIm6+-}b>jcOGW%RZXm3-2L0&ByC!8D{`>t(y9T|&9Sc0wo2dYFI3a% z(k~}``D1OT?_Bz7VEOmP`!e4~f7tr_WAF6%52tNtyLbmlo$5^`I8}oyUyk`+})bJ{qbWv?k}s@ zcyKc9lSJFlVX-h22-tJJJGSxK-LX>+MrcTiA&B zMR)l9{#^s9L-oz+p}i~be$m?Y-q>5C=~ZL2BfY$bAN7!+YzxK;D-M6^v-i}x$3?bH z>c2j*{kuQST=ZXRCQcXa`gss+kluvL)xC5krEi`3=s@-Vksee#m8qMrO>>>)(*eKWlgt+1$$1v&ApO}J zG6VWb3#2(;I*QE_eAd6Rau>ducgo?N$8=k~im5m# z^P$%r5?KCMA1NL%+2er84ji8^wIP48vJZ!hEpoL*+>_SV(*IsSK)Hvd`TBh$Zs;&w zhcc54cGIv2IN6_$&+mHwG{oh0g4+}^;SBsq7CUHLCe+HM80jaL_qnQqy|nZv?Pe-= zN>f~eH|SKpnzmdK+9juyVh`xI7yI|K(7bd(W#}URDtdv})wh_CBf7o>p>L{NR7cmC zll${*{bVdk&JY62|LP!x_KNdR8ZiDu4N4n(rA|;YMhMTbtiEs7Q(+!JQ}KoeQ)XLS zl&w=NXmNBke?_rfOjmfUHbz<_e~eNvH%GK|l3OH~vA9@r_OrG8M3) zodOhDRtAKx5U~nu9g!EoqtT4Ep4f$330YW4P=INowaPMO90Qzizeg0Cc2M<69IHCb zbtd@rv80l6FbK~`8q`X~MjD6)6TS%clQf}n^a*OlDkl&r#7|NJSb_;PhR&}vyzM~|=K?(dDebhz1u7FGvOZwalc>!P4kSiHo@{~bQa4csh<@;Le2SA z$gQS)*~AR#>`AIkBxdbos9+2#Z%G`YnyoHX1w0a|^5@nu@Eq)jGeA6!QzfmXH3ko* zFoG0{RKb>5rEvQ_>Qc;fC~z)#_UyTFk&3#7;=(e3T&Qy6stQCZchM;~OOSOA|0ojE zw4CWcOAd(qj(UA_taP4IdbUWFagxm~S7xyVm8u1NnHqQ81UjKQNlk4Eg^7Z)_q$>& zw@C^Ck_+ri$ttA6i4oU102dah#t2LunD{* zlqgG=N$AXQU9+eVLzOn^zr-ZSuW|WJ2SH9i-3KCXNoo)(Qxt3#geM;=sgfiKPKl;| z556f$BEOEN)e4jYZ${oY?{6Sfl0d64YWN8qqz+a?N>gEgz?=iFU{o9no{k8gPY@Ja zB!!{^gWrLl6D6@Cx-@=oKrH$JB0vrCi4_sfcuO5!pPUyPz81TQ_WRSz>sLGU+Ol5p z0E>KYIcROf0c}%pggYRW9^{1E(vIto;W6@`W?4~%H?z%~Z6#hDE@Y@!Lsh5@G3o`7 z3TIhj(RCt@L|w>yXM~qZq>d9aIZ9F1Bt~O^FFBqS(ZeEdk%UEK8 z!W32Zlb&)D<;AJeLnuvoJER(n-6T~oX4)R4IYF9@rC~}-EKIICaiK=z7hGgtEQNBK z&Qc$`{hPmSc5X2r2omZrsUYBy3KVo^Ue`r7$;WaLKAM{z$G?q)UZe-5yui54{eoD- zro{%cE-D=_dM^9P@c#PzMX8%Zzk|I+qfAtxW4NOtmd}4dsPr6K;BMaR&U1*(@0P4& zsyjp2GSp06^K!#TYLrDEc%gp?Tl~2zCvb$S+}%Fv#NOqv)%KD@>;GZu9Df5zC&zZI zuU@b!IY&FO)BMI{*5Zx96Gazydq>}xW`a0T&$V6S%kKT?sC5&ve($)AL5<&v@SSoKH?DJn(V$@XOkoEKB*%+Xk1tx+ylu6>#kO`ndJg z6Z}j1(j(+uZFtN}yEhGWem6P8`_Q$B=0 zKCo|)|KY5AQ|I%cA=<*ov0Hz1SM=NNu|u`OHh1#%m=D(%Movf{ntBh~dyV5_ecL<3 zi=<SGfpX%S5=y`qjQ%7GLF&*6%K3_`p&v6bfe!lzL zUp^e!=&Gi!UAa~3{l|^&8^a5-+FI@`72BfkdR~owwR`zkv8Vg&;Ho2qE5_Q%!e0mZ zPrC<3Lpx+-(AEvz6>e^q&CfWyDe?N04OWyqUk5_*0D@>Vt>xoyZmu-L7)G(Nt z`u5^y*@270vn~$!``Y4n?K9c`d3em4vwPLVna>k%jv1M2XwTQDqOYO@j}3jjsP?ll z%N5gJugCw`j`5QdGkzUN^v*e46K7gge0V7SiQNU0OKxxcd~y}HIsEJBXKuC4KXh-{ zKEHe4eI4KS!QIZrHfluo!mn*@tHvijec|A?{$=g)!)#Vz=%I!U`QvVnmDRlUH z8V14#7rbtIZ@fpYbr1Hirg!N#qzMx%X{9ke$evOF_PBjsxj4pun8Tc-Jx|Y zQNsHmLn@l__o>PQ>=ZO124f?Mu)MOseIZQseqEQG%E+ra-USLma$}aY5h5@Yh?P8c zeBRZFgvMy1RJ}FM+!1cRP^yYSbBzo@7fL$Acm!-NKBC8_t_ww_L89xO`bG=+3U?&F z#a#uQwv@^!?5tf%p(`k*ePzdENv2}H|@b1*d$fBfT$J$jLx`ZZqjCEhrB=({4Bh>ekLlul+Ck#6eT!G z1$*4`$?9BzOzIUll}(*ZluJ%F?6gsrB_vU7HujeIpjdSQ#njT3;}niCm3hf!8tbEM zl0={_LPY}WU}Yv;Q-c`QQYyruAIjxXMiO-ptE+kD#3NO+m{@z4ZfiCh#F>$Db}Hk( zD8SiJ+Szel`mRnW0A!w=#p*Hy4i8@j8J>8|pToQAcSvL>YT)~+0+=r8v_R?!=@S|~ zH(B+}1}01bdx2`+UG_H;-s~k(z&kObd?^a-f+Wt(7v@F!A&!YV(ikdssu2&CC? ztP?5Yk$y-?CE#+Cj2>qK%vgyeQtA@m;bp^2q~NB?2$oY4=iwxs)6AqKCa6;kp}C+8 z&WcKl94L55Iw=7Rzx4cmWomDG^jG1=~9(f1Fax5dS>(F-7E3 zAq>IdrD3?5E*Br<%eQePzlVjh=oy?LAF`ao>3I{Gf$}t8H z9IP@55FTL(oT9=lE`1_i3PK|pIhOphlx9jE=0dyn>)o`_=5f`n*#~1OuOYCbcJFAsqf!sSyCb zlM(zCQ3EXLG_|C?(j12yRe@rFW?lhdjHAKI71y!(SW=dNp2xGKC$2>Ep~yvCtrrlA zo)wI3A|jb00x!;Q6n9};Fk2C#41I*2-iUDZEm*qTE73~HnuUm@u9L3e*FYg|IAj4p zJ78bS)GI8sGBCoRBufa5f={Z$gC$&)RUq+5LW<+S){A6|2{w{uoeo1s1A-Dt|ePY4&5Ti%Kij!lsb<^5(Lc^N)i^qN#Fm zsBj6>pijo3GtC{OY;h9JX?Uu=GD8S-FiZ$VX=%%&$LsKj=m!5SsIh*L z{@6o?hZHOd_A`l~QUkq*1Frd_3HCS}MN&M^J9@j+Vd~J{taZGTjSAaCog}aX56uLr z{9+L!eu3xQB7o!+5#=gTLDwt9yZ?Eim>Ju1hM4k}(Bk3i$7Em6c^w;F5ABIB4ijLmj9WyLu0;khcheTv9;D z3RaOzBQOov@CfJ>c!tb`_^6+nk^J)Px8tuw)Dw>pK@FDJC?u#z94EwT-AV6tZR6_F zs*6}&aZR-LcZ|L7yt$~${VZpC@=@WP_PB(~6Me>53arHg&1=Jo%jTDcx3WnWnQZ^p z%c7)L8>Iym+ClEUa$gp0Q10xbUq(D!;IbIbew~$Wa^H#yib6g-J!u4Xau%4dFN04#ce$<^6fOce0bBIsy__U4?V-?jQF5p6?=Hya00M@zE zLwuY>Q+C9|o83V?Jw#$0E2l$GD+7hmM(rY*!QxT;@k0k65h}8Hv`pBBzP--jCTl9! zP?_Ayjs+_#+>*qeug7<`2!yt&Ecj49=S0M_+J%t(3%$Of}<>@9-a(uppS75MIz_Sm9-%^Eo2%?wMyLLO@q?xgG; zczcL@sk>nCgU3UMlRxOryZ`kwrf%;YOL|PvW2akl=FDAmaL}`%_NosJTaw&nymRzx z)7sZ#FSiaiZ~gp>cyCJ7o4abe2EHA?Zo$UU7SYNz* z_E_s8Q;OGR(_=$>uO(V;M~>7-ntmBxB%VXx&o;e064;XdJv*eoKcoBDOT!N5=X_hh zddt0{*Pr<@{ocrW`3p3yJ$>cKw41NLdM)n$#O=gyy%c>J?e4nMyRq=IdmBz4vkh1K z*S>wm9E*!RuX@pp%|9gfzf zubfvEwt3#iy?H(U&nlN4W z#kUvoz4n18eQ}>{tQm=RUAx%V^YU_E^o46nhg*If2=u+RT0eL2^i|XBe}3xi^)I}7 z$FtAW@majDJl<3=7T>#i)8v_v^~U=|w{wU{+x^@`dF-|BiO5Uc?~Tg%_xD-3*5=)x zRXF{D8JSS92}@(zkS^B%avf4vfMrYjw;IX#j~ZF;dJ6{X1pQl$Tmm%$!+NG_Gk4O! z2LQnskTv8rBrDqOY|)3-7{m|*%6OeBRFJ!Qq_1}NDa z4hDvN|IZijpo^?mx4g~b1y}$qAY0;XZS)=Yl4^7Myl?5@8#*vP+&caBpMfrL`_>?H z+XP{*R?|1Woj2MteLFi~(e-vCWAi(@=iY10?56LPXP!MW)y_GRvw!eLupV^Fc+-?W zGpj0bz&ES9?eF9B%G##GVw(OV7%hVX2}4~|Dye*GxjawbI#D)H|Ht?N@OAXJrr2*M ze8W{SRc-0_p>A^;>NY!fxBhlt|4#BU*_iyp6qi8DnbAtHPk^{qcL?Z1)zY#$d6fWZ zuzDd4-7ck}0avIcWibtNB*)qe{^g8fW*oJZ0fwQPdLF45(t>nJPpG5QkRA2dj{3Nl z3fS2NY(PO?z*N9&lbGB~I>+m<1jZRID}piU5m8SF9~E34LPV<{2?4+{h9=;+5Og|AAuV% zw=tmEY9 zzq}X;Wt6y|lhrYJ2N*zDFJu@N`YVVhm3}ITgTgpbd+0%t+TNO)ica75b83MYYh6aXrKHi5O1vZ!g=wSB!MPY+ww88MZ>iv&8;K4@QyO$U zCBPI5_gvCX8A@DWg$!vkvI$$rqMM+%V=FKx{g2j6a6#%QC`X@Vm?pc1n5@>oc_(Gn zpt2%V$xEnz796S8AkLXcWo(9lNI(<@1nJbmkPX;oze5ZS3DU)WW zLSfS|R#myW9>&Lnt5HR6L6VwO*pt<=v25tASE!hHh;40n!%?ao67lBZVAh!U~^-8AWHryzqFCC(e)g= zz8E>g!H7S;Qpo2YpXaFpZQ-QYihU6o6yTt0QFWxUiY3gBC^{5Dih3du;<`um0d`y> z{zT{iIe})Auofd_o4jR@8sL5mm{OX(W3{3r=dQCF;_sw?T8ii);4B$b247pHa&^Y74Y%ur4u! z&E*1j<0L?bt(=q{iM8(MVa@wY2&?bpyqkUGg+$3qOm!Rf!RrcmW_C zw30>6@!C?XK`d3uqTzal3J=v-)PWHY4htfw3(WsS;jn?M^bQ*pq%m0;M639K7PLmB z3D%&YF^h_#;k&LSR7o^R6p#p1XoA%Z3O|g2=%hNSfGrnMRf&z~lr{~rMY66m(j7m< z{+PT;vxMqSL9QfK+2!(eIJMv5A^iGq z2Gz)hL-GaM6Bi~%g32jyaU_yS%2!y4>l8M3Mf5Y?;^_t?HW_&bGFQkO8C<01IXpjZ zp>UiCc7hD^x4@7oQH7zQXpg`kvrq*x6G>{|WZ9t6vnqqiqAFDx@C1G)pd`CwZ9x?! zQ8A1B|LZtY!YQ#z<#d0s+RW9UHqs;dlklWL%$PYHRb$#%46_p+=W(orkcn~(3WC7; zz}lVg4JxIN$jVZ%2&kob$#ho|aPg5YXOdX-{v&$m!x2stWdoNH0a>gJP;E`M6xKyp zALMB69GMDgfPFe&%m~ZoLRGp$n3*prLIw2#$df%#gXSjSaau&mmRfRoaWfuH#1S)z zH3UM(WX-VR&Bll)x*Z)15eA?LR7AnT%&@Bct*l!1BQX+DSw(m(DpaC>K1~F1*bNa2 zz>&B#Xr>@7Gf1r_UZu?oMX?YW#J0Srhw|v;CXxB@b`r`xLIu#u(*H8UVaD2KWl2Me zqS_z&T)4Xm5tM-4Ca6WIWe86WS1Uv=@_`Z=my4uEks)j_r_zdJC?G|Ue43#w1yFtI z`sc77(UhtLqC(;xf+GrzgiA22N+bAbnvB^rcq`KJg5v;-fFC6qi8QdXiZp~X5mE-4 z9Z`DHl0pMxbP?6*m=~6uKmKa}oVFU3@&%&$Niz+ZlNoA*~Ue#>QyM(N#1PD^Zf&yZ(pzlR*9RVeoTc zUg_GnSgMVo*T=asbUfpx%efBhr><`(w%naH4Ns8~3)*Zkv2G#!0!Ed$a7(#CKEL72 z4Ra?~!=1-H6=i3^J&I^V;kicaCF+HR2&i6MEa%PjokY!LOAcJEuwuG_C(4j|nvbhg z9gi$u>Hbh`ZQ=sOR5nnIzk<^4jxeMzu8(3nk>u@o3E@Ty7U0v#uO!in5=5%&ohF8e zmZM^uXB#_dpuY`a@PaZLId#c*!Xs_u#k}gQ$f(X2*~EV==-qmUuy06ivy5U-2Yk9d z^V}+1PU4S6!%XD!jQ;W{|Jmc)&;FX1-afc)`3~O?i=Mw4GdJh@C(Dk0dTHCBW%0)F z(JP$k4R6tn>RI1TYzt33_QN=H@Vki@vTE1ee>F{y`X+ze9Wj>w*7VFmenj-0{C?}u z(jtA_=!d~oR~HO@mk=YGs_(3JY(~=`Yq%HBw>J_%qkiJ)b$o&YpaJQPm;G z(0i8)1AX=XDr_C-icd>?;`i43d8DXb% zXqrp^!{oE66Ga2_hFw%@a9h>g#=2v_jl5>reQw>ZAwWZ*rd8i_BjdLVgJ1C<-a9#` zqgJ~(=-T4HZ@m+7Wb>gH?$qGMyNl1X^}Sp(#1_QOu}*$_XWptD_iW3tx^F-A&YsZ6 z-Rm*WsWnC2T6yonyhMw4U`hArP;=8g;@Y+%6u7m{uRC5`S}MBK?`}Vt@ZxshXd|^ z?f35dzRftcvj68L#J!i{@7i93e40A)_p|}?$ldsJ2XmOQ`0{k(8|n_)GP&`7L3jGj zaT~SUSyXVJ`fYdg@O#^aho?<1JaS)X{De66=Ae7p#=ha|gC@9}`03B~ds&{{YsV*^ zNVDm!UK{bH^BR6D^zsxRSAHPF>k@hLfTQWpdwW!47JJzYyx^2QUs^>X4j zzIiaD$EW*$G9{$9cJ95Z4gbk?K^_c-iSC8vZWEMMa#l{2RiNEJwdhU{SpLmiLxH)b zO>U!y8lI{JGY1y|89tI>7`EdQ{bJY{AR3 zSvYUqk5@ee2h=+|MS?6>Z$X=@N0(L8W(0zD3DbbLefCjLD(O}L?`JVh9at&7C+4vCP~Jqhl~%FEKW!im7xsLN5nzK$stxL z2^dS=vTQv59tlHzk z1C&7z>7Q0VJKe5|l6VrcpCS~58Q~<1=4r)8+-Wm-7rwx)C7lSWFhU2mLBZgtzd8uP zl>T`%iYFnR47`gQ>X0xcqfnG64Po?2a0pNZmrIp^X~N-@nzpHV_Q>%i7C{A5ASlH` z_?kmyl|fTTCcwzQ5>%Z=@$x+NHnkrCg$r373SoNMrm3b%=u%RZd_^E15EU#1<3B{h zMUGU9f9|%Nk9d$mlWvh+eDhBvq2f1%l6#f*bv!Ph&IGKr3kV7gGoi2trkZ377@kjNEF`wLpe0nmGGZ>eh4uqdm*1g+W}FjB zfWN$e-a|lcDnLVWC8CCRcz8wgYx7znM6-X1GE8)la5s8SgjP@yByT%Oh_(yp!}xiB zJdTYKNJ|2`=AzIbBr$H5F~f_zLg18a2C9JZpABxuTSU?UO3l%1m0Ix;-skvlMVO?_ zHmJ6UauPi06;`!D6CQ^qJ)l5xSz{An;Xu4TfY{9vPUj*5Di}}!=2N1nY>8%ip5!0_ zi^lM>0zVpY4&@M|#%W;GtikRk%6kbH2@r73-`GOflqMpBFluPTSnpo87VAYI%BGpl z(a*%mG+FVDKy}zq+OG-s!>`st_@Z zdYCVvG`W~TIfIpcwdmn zN%;vB9NzQgf?0a&u{LgvKZNjfShz4-z&(|H1g{RKhG1iibxLc@bzHcTP3~ZA52T@6 zFp)v_bz$TlG1t;$7Qk!3sNg)xz_SHZasdry&>BLL!5tDj75|f{RU1`QrH0DYhN(#i zpv7QeO*p#+UJlcE;0UY{!AOwfF;y_Mp|+qlRYJMHGBSe@5l&BM2=8Ufp)g!UULl*U z*lAS?O3IUe3$HI1DG122h2f~FS61)HUErW2t~HL<~(rRoqV)ZIZx z7zz5(Jq6RSNH@lBVYnb{h!I#A%yd$6?x8}7M^m9XvW=Mzp;k(~ZhecD6gFD5kSeTu zn6(K?JFleBJjTTku00e3Q;QO8>I4yxCwNd66R$*cGMkSm?5Y&ZPs*Sw#e50}SDI}Q z6yXer9u=~Oc8gK~t&UlH5D+061x=OUYJ=1w;j9AT;YtJl(0{Ga7g6wxf`N3_l(Lwr zl>E7G8n8ql5NFV!WU38kdB{Z~Q&kla?!qac0jW^r%2Pd+sZRlFW$J@a7(7Ro?P8zc zW}*J55{ZZv(&Eyv7kZ2Hvh01c9oI8~co0(-&4kY;qr@ne9PDF7TmSR}KqQQ_G;*2p zpoIDNk%I(=gkNWi;VsOB=AnB8UE{v;JiHwJ7o|$4dI&BiuQR|wLBvpWTqL0`Smhxr zCXDM!M8N`M2ATuHk-X`Cq{?p_rR`wtaU9@u_TrsPI$cIcYneDQiU~u=(qE9uhf*-s z&JvEErf;Q-?k?>DHlRLZx|V;REfwV}XaZl|v_LpPNo1T{8s`wL4@=fOE_iMX2XC94 zP90QlwVfi3Ep)16^I^@Yr!7MrqP;AEFd(ceAem8y5D_Z+=}=9j5?)w1xUe%bBQ?4f zp%&B7d@ve(omSC*N>maW3vY}|8%k%=rS&(;lodQ`>zmP&`7`4koRJ>p^GDJxqs%Ai z`GdcXtcrMwPbt`#GgzLVZd$APfSHM=sR+IelbN9b)?xucp`Ucn>@rY%}R-F_6TKJ$n%0v&feii+k#ap?u@YcEI zrONcIVas#L2a#TEaQ(Wp8TyD`K;r@@|7za7xRW{DkBcU^f1)>!uVc~!yxj707ZSri zzkaA}=;h}_>dzDj!|Rr%GoP`OWNFR|eXgI$yX4P>_MwcdrSC6Yw}eg4>Z3m==YE-U z#=AJI8~MD`dzx?CKAg2Tsw|Ow?dx-t@s@MEZ1vmu`iq}d7UlWEY-!8&M~<#cXiNX< z5_Jgz@bBC%N!N&pv4VcGius!DRncFK=8jx@|P)xxw(bRR;Ot;6E{x8 zU9NdKG00or5%SGrixa1L4?nM8F-aaOB=2sczBshtjnu=Li7(}3{9oadpnHR=coZd+Idba_gSt?%dmQ0o@pW{c61z-KA zNWTp92?_cn(o)p%i2e_JovT%vbIM*!O5>4k+gp|WH$9iOUSPeml1&z`KLZQuS~0rF zRY>2F)*GP{VjPBAJT=r{)<1WB)mqn7vjhGZ-}*9Brf=OzSkMkwoW1GD*rK1)=faGd z^rz@RB|;@cO3d_qda~{RX^sK7WADJ+p{`|+0h3@EIvJ^N z9V?5}|M6PWgv$|l3#<{cD)F2Tw1XX}Wgm3bvOh%by8U~f{*bMiPIJ;}>zMFxS6*l@ zn}ALOHQ+8MB6a1TPT3I+^>i8<)I-$~Y3&&?4M+?I`T`zTur?fdh+`clfVmMxq|X(4 z;w}h1)YM02S&SBm(SpM<8=_ul9KHMi?bKHEXd5F_=p9a~7W|C`P|AlMiPcARE}JeA z;)Ad$A`xx7L?YqsU9qGMios-!C4}^M6KNKsyqv_FvtcO8)HrfWla2{y)O2PGoWt4D zkQVWz3#q1#yJZHpgE8W9*w9dvraJ#8nj?&!$eeLod&46z-Opd8L*Y<2mGE=3q3we3 zP>cX}ffK-GIw*ni^$yr!cLhL2m4T6Vh!PRAlP+Wv#WaT$uzyMg$ElxaD?@QWP-4ia zs*)^JkIuf4#3&U3LMKAw^p{qrETbk&{fwqAwX52 zP(D|8B{Ln$(5*mgWm%6$+t}?^7v)2AJ)T`{OTo&rqKL@4uF_HzT~}=hrC^2s6VS7J z{?~iG@Aan1G#@jQ$xJ4{`?;U{xu5BLW1p~12Lp$TBN@K#Ni|~ z9|Rq9RAXRKyKmF?;bM!n^2PQ+%c)R6utcb+rwK} z#K(E4?8xJ}bm9PyONB*bl-)uxxDSzph&8GGA_rfcCUqJnG~r;Ng+=Xpkv8|~v22#@ z6VeIIN-#;3qH07^Im3VjN>>7I_pSy{>?SaZiUZ$8ZsJw{$Q#9kt>b2#?xPT~Zs; zxTuEi;INXtj0U8>_v)kDECef25bo|4yf`B%CF~u$MW)t+rA0hg3Bh=YENBv`>=p%5 z)I`8Ld~>S`{Hl-0gAM6OP_hbN<}qk?ZkhlM@T4cVQL?-JfLms9EE*EiV(n?2P}b2~ z0p4M9kK9pSDjQ9B@wBul#Yfe&WL^5JeN%gRA1-2oQao+3C`DC0ZxvBhdClJm%#b+f z3T??4aAQe|JdMr-&u5dX9AH_8aV@D5QC?Rx&4}4LX}Vt)4Qd;tOh^ga&333V)+@S5 ztmV$@THWq)hD!5+PgxHWWQI7TE2Atp%_l3y_IIoILXC|PvRdLde$r_2GvR=pFmlyo z`fNE(CdiB~1Zfr>cwqx9^iO573A*5++kCi>(s{c8|D+PVVA)kmNwj6ETOut3q*X^c zjT}h#vvrCEC#4jnsGpBKRdRfgP4kj9UkGpaGL`Q#Cq74IsGk!>Kn{l20@mn zGpWAL2u%VU1s5TMu7jhC#7z1HAnSP9a5OYkg`V-|-|v{-Qo(`kle4No=Z889oH z{64*(!F$huY_!X(3#^bNCHr>KTFrwLNG)e+sVA%%1{gx&hfFm#;7ij z7sOf-Ruw6tvLGHSDQOjrQN32Ymn<=~G8Q}=xjefAqJ?P_Vl2`YDXgKNjiLw?piAP5 zu_t0sEv4*;cO8xjZkpr05WzN~o@R(zOq>v+YT;-N7u}X$+-O(R+dI#ZcIA$A;vBd+ z^5O2=oB0@R>g3icArWIF>{;U-vLBbb1WZltoAvm=-a_??hNbC1y`)G9*lv^cdo2*| z6CE0a^>8PV6o4dw0*L_$!?rHFO@PzOatAEcp;dQCpk-5uW+Dop9w0xMzv-}Sy#^;H zEC`{s_omHj&CVCH_05hx zIfm@)4yv<%4Q1AbyGG@fvbH;W*ydK0Bjs>V;z1qas6%!SyNhZQcbqa+IgZw;E1NPw zepn|)d^%fsMN*gKNLMeiIsx|00?kgT=nR9pLOyLce}GS4C1giX%zoD2sTd70a7J!A z&6D!0efiX~gDTx6S!FdQEu-4SzGm%Jf4=Aw(FWlxk7pU1FB z(G@gK9y#>Lo*CWFj4zGX)iW8pV3G4jc8>}LxYA9~)oWpZC* z@cLPQy!(ZM(_{YZ`^ME5oD&lx+?tY;-0M3hHD#CM%i_tFt~Z*5hV}7fn@iVkW!F`X z`6}sxl~)Q6Z{;_wk3H_>{(E%dy+h_1<0;F6AS|Uum3uE^|eRt z`$J{U1@r2wpT7T-^T7uvkG=>=1l3j(zP_{XhYN? z{{HDnC~g*B7~FY$`_ACUx$lL4x^lddce)N&x_I;EcsSWS>$CjxnQr%Mf3v?vjjmhf zthn&-cgt9F)c`+pSwZ2YzV?FP#QJxkC;XAN1&^7Nzw2JNmAyK&K8LA);5GNNd*@$! zmw$a@=}~iFlRwV-Ya(Nwxi!Y`=8HGxeJlLx@&8)J}H@8Rq`k1&A=!3T|05&hA_^FCwE@#nmm3SLX?(k;@_W}b_?>uHG=2O9J7w-r`X|Y=BhRTZ+!2xX>vp@)+%kS7L$k08lzZ0O|PGLKA z6VPsAduh(EHHF#fGwJCwN?U)2%pc%86)tINaf3{UrRm`&5pCgP%1Q%?mbP(18g~#?5XM{w^tj}^}OTXFcj4rVnU{dV@-853`@Qd zbf+UNKU1kl)?s#Cnv8HGZS?983~L61n_NrkC?ni=GLU+Q9DvYS-g^&e-2G!{gwA?# z3w=l+lD3Gr)GI|rMI3ehk!GTruJ|_NlLX5p9Rbo)hKK~0I1gqt>5K?59Tf2FT$+x< zc07b|LKfbtin7<);K!KPEuDIn6q4Kl-%x)gns!0gb8f>nv#2`VmW zxY?Bqh>Q*3FrMe$jY-DA-8{6eBhrYJDMCq@wh&8n#RqwOFsheg2@He*-j}1$jY6-G zF>i`a@ZpFNG3*&}n$|W0TAo>Ww|fSkr06UPfYuTL;VFbk!Z{K8#bbOvuO|ixrOLqIQoQz5T~T6C(g^i}j*!R+%hBpp}9T$ueG5 z*U`UQj1rPn@j$clJV6mGtR7&E!bS%~Z>z{DQ4oUY2Qj25#l}RzKGFkxDdF4~EQcV6 zMW@?Q8E8 zN<;)lh_?`ngf||#-J^{!58zaKn~;VVJ=W^>J}zc4 z4kDXH>g|p}+BA)dB7u!T4#qShM;J3R6%KbbpUG0gA|5qP5m+A~N;?wzL zrW2y)5@RFRrrP@CEV`EL1u=;NDnllXna7YW%2H0%(u;Yi%8PsT?Ey&-ElctcCR=H) ztpptzeS?5>KjDLJfgBGSDtp{X)`Ud$+ZzW@Aws!;%&c znacGefu!8o6wWhVa3L=*4oPG&Pt6kgU5Gjd)PqmQt3XU|)5)?$|0{*YcMxRx zQJf5vtCl+TOAi3Bbe-5t_%5|A;_C$3{cAizY8LcLG86F;!1%H$5<$CfH`Tb83aQW5S5oG zI+zPC@C_5-AG~Za!iFU)4)ts zf(ANOh~3hauZ~Fh<3sTBAeY`ykUyrmY)s%cLS$?+`2@6pb-7 zhdCPMkg9&fPw^sSe%G=#wdk;Hd}7evUX=8Etz=l0CXlAK408RsJ&i?jxp3BWSW#bT zdKZo4x4MkcR=KxnCRJgeJ?v6(ft;m8SCP}h zn|;p0$xX}ej;p_{3B2UK*17B}L(`?XBRTnHtt-njhU+7bEZHbt?rhsy9H-dA zZ-hm^a29-V-_bKQGdrz6IU4-gPlqqfUNOTRq<>a1x_rp&`0vN#bZKzYPcOvtnP6+Y zdck{}-8W{QFMR4x$DVm{teeePbK`himg?_p`0bg{^&IKmrZ>V9=*?ZRNinvjrQ}q1 zT!_`LI6H&>q~g5oWp-}rLNY6JOHIJlSm63>#RCsEzv{jcda3xiB?b8t6-*hsC}7?) z+Rixd9@}&#C>(y`XNF5cTkfX?zR6bkWiz9leu!f)w$-XO_=L)-rXGmQ=-0i zoj-l8YMe2?@$kdDd35B1{)d`#n}XD}y01$gE1Fn+{snLk?PpHj zIo=$3M%tuIK95%JbME`HXQC(TrAfPqEeKt2yt|$rySrjuymDRr>@%5{E}W?eU)|gl zeBf{POIB*ZP{Ew@p7SYJ=SIx*Fg-jc-r2C=^8#{m?AaRb<<{>i&)?4!)ZOSjUGE&- z-1YPv`>3_8X3_Pdo6B5}$_0gI_;LQiy~l$OUs>vbHssH&*~%VVG+MFF+&5lyIQ8wX z=S-aER(H=t=9v>>*8ZojbEP%Xqie46s~-DPeZ%;P9nQem#bYn5IN8$E@{1FXt@^6E zq2zCN$zWmBaP1?5=bAwf{tc)*bg7o;& zm%q5WEbHX*vG4xkY~3jREpxQI^6wAT7fjkEv;DYjrBq)rf9D&v>z!*Bp4{Iw<}VHQ z$K_SebWglF^N-zM?`wa1yZRe;*SP-6WXG8a(#ellfJTlT>| zuvX>F`x?}SzWJTN&fhF+IF_Mg33h0-c$1z#{?V*c6>+!U2`IfhF;ll^Ydh8%5tkO#^xl2hI*HD7CP7nal*p7`>as?(#YM z%S#Z`#uo`sP?5ADkz(4ZfSbMF17)PGsOUmPt6=K!`TJO5Iy?V#n3#czM3-ix2NjMl zLAYIShf-cyU<;-2FC_LY+NE?zHA{5OJpyP)SYW4(tli~?D!eJ2$QsK_bTpOSPjel> zUgsre>r71gyR_I2LnkeDs9sXi!gW48sxK}kREv68E#}w(jn!x~?dmk)GZ-FA>ty{p z-sl$@-69ea$$4Z4$&hqK1F3NVS20VOqtcq{ATugFY^s4=vp0 z&0*Q#!yV8I&okVwn$eAI$6VSz7Rf@hncFS`JI< zVnJhK5k}Ad8KWGu;PyEPB|1f6Br?MYh>4B1(A)fBvMoi1VgrQ&lHJX(W!RUf7CnH= zfg%y!sR?QVY9+CZ#b$d{yV0Yt+B=8c_h#QFB?*XO^+p7t5N*|vj9U~=)sgUodKViuFEVB}UxG}dMr;1#G* zfs&Iptd@;gjdYs`-O;%`wrE6yjE15~`5Nah|8pJ?$4Rh9aWC7Ccw-c@B{+mZBv8x& zaNr4qRmrk+#}JJh?no5UOL8u-46XAB6wnK`UA3O`WmP`6%jhCW zKgA3Py|ihHshlw>0u!d{=sj@On{4H59g97nvkpV0G9Ygq*j~#-drP}SAJM9$CZ8|> z6&xjAmWZ;7S}jR7C9b{38VJh75fH602W2OO}MeBd5RzR3#>$7T{)t}YNqmV?$5@zb#AQFp z0Mo3`CZgI21&Z+bY`x<)O3(~CsS1*OM|dRJVy29AuyfKo(3s3=*)fId1*c%1%c9<5 z@#iCwjc7t1@OjAH)!0NxNQx4$)sX1ng*?!oc|?qtux#kouGDfJ&_58orh9r-NE@h{ zw?q#yHB;oARl40H^I@vDGias%?p(8_yNlV-= z%4HTw%EhFcVhp5DTLyppmOq^CdzG&cfftB5L<3tzmThaf9Tm~kbHXBN*H3>`MtOw@ z!-|lxu`oPg?=fVHG))pk>%w%hQh}@lH^ZMTpm&i<f9khQp!OJv;Sd^0+!lp#Cam98im=@~}X+wE4oV<7ER`Ces)s%bRn zrTQebt2xXW9A{-b4d*mY%I)Nn+e8OfhrWL4U$gvo1@5XUpbjnhvupg&-76_);M-Qe z6RId#P=Tyl`Ovn?>x~=cK2#HVZGBr`%_Elr?OWH3QnC7n2VUOFJ~y=bsI%cx-%B~a zwqEkFLHkwuyx~fr&3VsX!!He8O=Zja3Y?d>yUq6RDjaX_*;@9kEA+F zuKE4JN1j>I)No|zk;`gBuy}MuVU6tzX5z3X*T10KoH;?g7qqWmdU*M#OXA|E^`!@y zGygqtc=oQRI>rBdeE+xW&tCd+&3FD!hM!csPj4D~U~pm2+*iMzc^yF*Q1R|3ORhgw zyubg<&TES8O-Grqzh@%Wy|U{W%0HI6aw~n=2WiOnXC1D%;zKj8)GQcT_T7*>r}Oo0 zXU=z>l?y&AoV&I3nwzf?Kc&a2y3F&&sY}lJm;Hyg&ij(Q-2Yy|iqYSlujeO!ms;b1 z+FQB{IuWXu&8e?%oG9$7uRMMCn15vJx-XVao+>!``pY|RRPETmaP-u@1$AFtxhg#C zd_Laye2(&vlJ%nV>4{}uyb(VAlj|#(HLISXKGLq&@7muocB1STUz}7Y`kQyPoPPeR z7w0=mJ_u}bU-DJl&(GUPjS3AlTeqwm8$VP!CyNPMhkyFX#!KUK%vFDgEGhSmhlH<= zm@6-Ljb_m1g_Ebs@BFUOy>;XDhBs@NYo}=EgMZ^EJm>4@U5>r7xzxP%il3huxi^p+ zsBvFEW2nFX(jPx8aQ*Br-}aNwI6pRjSF<)JHa#POJ&QlmYcd8_AOKM(=+!z{(&$FvKt{GyMYPFZc;+4 z$7;5`2@XYX9!jA4SwY~_e;Hge%4b3^J{o%Q&H4^BH))@K&%w`2aPVZjeSLlYWz`+r z^0IpALdv~&!lFlkg&*aCx*z4cKy*_%QcyXW{@K?sIkGj5g!?0jlzh2b;{Tzmr3SE}>w)(kI0|6C{>AXWHR0*WE)P=2|vlS~zx zT}6xXuc+M{Dtok4wPXuF!S6Jkt{dbXXKD3pifK$0)Ml2=mx7#IoY~YkaHerUDKwT@ zdqHtc9gO6I>M^^A$x)~rb%w~;)GXUczMz`eS~nb41qkvT=~ zY)K)w9}jfVM)%HjE8AXyhRWFgP z@BP_Jpf_c)^iDR4bLl$XwTQIhK$1~wNiqgW_%!(Q%6uOU!-KnJAaOi$yi4lC|69l05OgcDb!->_-#fQDRtQ#jG5Sc zoYqos;ItHPjBTQE329<>gt8bLHN40@iLqdzs8~nXX+78?S5jst$%s;IhB0kQ8wr{W zO=m39N1-)5hJiw6I&Y+(mC8AKhaR)9s@RQkSd8z+y%#xR@Eat4{3Zs1*hJF8xLfw( zc0mVRJc(1#!_feiMic}tl$fL=v1&|io(cng5~UL`$v_CeutlkXP3J$RrW!%yp_6(A zizX<r}yl8-=K-ii!dFM{8=i_PgA|sbbclW;kAgaaCLCfC2cxg$D9nnJ zQGJ?z&`N@q>kdDz)B@-f?JRC1?4So&`z;YA6&-ZJn1*>{f};xXm1rj-*@T6Tu~EXJ z3#d&RYGoiCK9zMNuQ}lz;)aBn1*rp zSxXU_$wVONWpSw9#Lh5M)R9y=+KH-`bN}nZgC)zk|G2*tEyEuS|HUgS5z`lf&22wR}?l6lf zK9^*(=w3#k0Z~gB)W%u~kx9Ck=q{chaHlH?L;T@qWe;O*1(W{)-hj^(L^~v{c)aI6 zT@p*iA(KPFH*ZljOExJwl&#BY679Mwl*NN!J6GD>vxxI^RqQ(uCrjN`uwRg6Ko%M! zth}8Kf&hXpO6Y(T#hOh|%Yq&y?KBuRtL zNMBh;_mT$D4NV_}GPS2e#*B>E0;>+--eUbZC12p}MtX$O=WyTr`4cY+K(~<)a}SaU zY*DC#N7Yt^ZG#=t>rlQ>Q+{0HF>goE=XI9iYe#W0D19|&dZ<=gGL#Oq#A z(j}I=xq_%(yLp8}s{r7aIEd#d0$Snd61J&WQvcuIdmMpz6(Xq$Y9%U)grP0xs-ehG z_|Fme!Gui3mNvGNC!>Uay;4DU55ozWVKN>&O}TiAT*GI`IgQ1dmQQIpWYK>q)CTQU zRjBev`@#}!i-;Wx3M$4nwG?67aPw7tsR5is#pn=;IvIxJ7Xe#gX%l84grh(w0$CFm z=ibNs&a;nNe;D&v5VSa!Fb3~(k2(OO!1hCYElGdJTo(9c@OBJu)jke+;(a^4$%r6*|HNFToT z%884eFaPX{HuGy~BJ$;*Y#$8NOB2ig^js{mY|C%IxIQUFO4ZNSyjXnl+Q-}`+be_P zyP9)OIKLPJy8Q{{oc#g6DdnJHDD#4EZt{X~efC6T&Z51xaZvhfdghKWu)zf2`?GzX|+@P{x*? zSZNO&4qWTE)oUYN6V3f!{pRZUv%F_3`FdM?JriW#M~A7)g|_`nGVod$wYy0KYD^O&xky%|~CgT-CLFOgvnd##omiVB{8UAB?FnzTB zLNM^%d2-FO&hix%YmNq~Pdqoqm+UVZyEa+c_U!LZ4Xv7VA3nL_ddtkMZ%?q@rQN~0 zvA#d2>sR;I84|7vqB$S2zE5pmCzOfB$?}&-A5G{kvrD*34}$ zQyVKr!<%Xz_}q5sm|AZ=?|V0JWzRsp^|P`^mW)T1r)`MDMO)DJrvKhQ-ap%%d08ko zGaIO()GOk9!G=fL;;$T9^mu99{6PG7hn$;7FN{30{9fVSK+TFV{uOgse4ML)Zu0)N zo%ihDarw38hfdXBxGp~bwKUeP)Q3N0uXQhjY=QmQuCjP3SJQup^VIDcxb{`?_Tvwo z*u_pX7r(8|EOWj+@!T70-A8{Q-Z!NTktuOCp>|K`UW&&0ChDGIO%vez0|m=!LKJ_t zdC$JD)$vdMgY9>O#8Njvbf4(1$g4<5VZ_4}T#1}M>!@1s4x4$JW!gQy5y2(ywQkF= z$WVc6e>FvYp6|&4Y987pe1CQO>mE$GXs=e_YHm79#W{_c*%Rt{;H&~aJ)i+;g6`VX zmtlQITV-QNFlG+XWIvhc?kZNety(w9`6M@8CZa_7=P*m8w<>`yrdZWE!aVmhl_54M zY)C-G@?P3TMCC4{)PtSl@E$+DldTm3M6NnrYQmfFXC3aHCx=RgBzNDr9XlxMYtFxglIyCqAbHp^jr}we$G`35~G~s zs;bRK&q|<@z_15KEx=+hO2NoPu@X4jcy%n)dnK(Ci74S^`gj?5VO1og#zg-n02Nz5 z|CeTkz`)4fT`mIDp(QeV8?dQ#tw6y#!A1z~IP_4VN`g0D3T_!tdcm_)A{Zn}0fb8e zpg_T)Pn(kggye1#1fm#2MLiS%TOp|(iXp*4=OE8fRVYpG#UU^di+Q3$tfs$_co}1a z5|vh_wW!K8DfMkeQIfz)E5%JxEU}=o87CcNBb2#gDQBA0;(V~xb zaYm3?gXOAZY=Yg0nsJNJ0Ad^1o-nA(vEJlMrJ!{&+NY9>8H?U1C?>>AGbxDXNftyu zRwL3v9JB#u^hr88PwA+t)q16bh2a6H5dcCEb_zTSrs^QGVI{0=7!E9(4jF@K0vqU5 zycAxGa#VXd&LBp}ehzi8UbzjaUJB{$w_}Jw7y`N+#}FUAL+bqx>#i6*Pos4mLUMZu zVT_+w)-k%M=n`mS65^43n%C8Gu)`G@#{$ZZ2$+u3O~Q_05Y@kfaLZo6^Q5;=XjV)b zp?xDifN3ago2U~dx`;w;JjR-)BFhvk&zB38%M#e1L`B_BN=haKjN2_>JEmBOBsUu+ z7)t~`E_l>SnpgMxyFTWCD)*34Wgt^90Mu{uk+X*>nd)RMEYJG{H))l{U((h(q{%jwAPw!ZA}Il5kEDDv*?oY*fsFNvQ@Kn4`+`MR zhq*Y4s{l^kCNfkA!Xpl&R#K8*W_29h2kiJcMGz?gUq!&4m%VMs0_VrR{FmUX=osLs z-UK-0ECh&|a0qHmhX7UKrW8nXB=srq5)(MgB<~e=(9Bt84?A5HlJG!zdw{8Hr)kwx z0a+VKO48!5|B}wggl3TN=lAd?njwrP(2x|V{m=)IUCgsWDroBz`Cv!~B6*{cG5U3D zlkxkJKYOT)^P`oWUL@!va#B7c+dUkTS4d$cDaNX0a}9d$G%*TRPR2q?{jZzTBP zB+5HUywnP?)&jyGH!nO7ai@Z?WZgEYe}L6kEEB=^i9N^CdS(Z3@e?cNVHEhg?xv72 z(dP?6vpnbkj@6deGCmgs$%x5Ux;;m%7o|?gNyVy*2#(e=p!6b51yd-bSo9h8Y=uyy zC^y)rX-u)cMgP?Nzb0Tb&w3RBXBWfw8Dn^>E=s`f6X@Sqcr9`95_}0I0=QOhJ&rlM z;S^0Q31>YX6`(Z20`vq1zjz>|QaI+;Y#^K=nusWV^U(>zTjj=?l_*FqCrwYVCL%SN zqk55HgUEUqLAaMbz>DNG@WyEiKr>ZPRF$C_l=cmY3jJVU$$Z0*f>Y8}AK1IC)$M;z zP|olJU79JqOAQszMl6AEvr0R{Imdv?e+B%0ke zN(0Y=V{tlaOkdEoC9FrF#e z#v{+xPd`Zg^umbs+eY3=PsCw~uX4}RTb5o94HYbWkNxt6QEOkYIG+E?*Dt*L-`9R$ zZu@RcS55xuz~sMMaRPz&!X33r@2SVKIg9WNV&%v z-y#<+52CrL)5+ql^)>t{*P+aptJ>U7Ypfx4sZ+evApSfxNXFO)PbZJ2WPt`l+)y9h zn0$)tq;ogbST`nrc3;7|oF}tFL22v8gTq(dftoE>Q!*DtX8LRH`!3aX{GktS*l!qx z=Bw3<-ne*UR`Jivg4GW%d!?&-Mev^MPRHB33Z6f0obOwcZC2ww&pt8ww^)|C%RXa^ zGOSLKB6Hx$?}@2aoa$_y&tT<{?U?MUDx(h|KW%;`--pIdG(63FXwo{+ikHNdycU1{H~qX zea|`7YdQQbwIOtsKmW{Y>h&)KSZ1Jj7Z=xxf6=x7c~4r&cxIJ3`TXp5Uk0C=x~9Cw zccp^aik4Y(+&Rl~8*0{#3$yOestLq1mj|oH#LRn_6j-k?Lh9yv`m&*7x{&IsuNpsp zdb6Q^=J7f8i(a)|J~U=tH+JlxbK{}qafSt13(p2;T;06v6YfTSy7RHgV&2UCykc}< z;)BiRnHOh%$PRN8tnD%XCl5aS)we^%WkvrH-nD0}Put&gCU*Gw`!#3FQ^%kCS@GBx zL*~!)xAf<$A%7oQ))y)o`e#*(_|JUyjDN^lO#fiWzZbtG2y#%KCv0d2kM0MFdO~{s zH945*8?fn5UvLeeXSe$s`qD>-cDhoJrA;h@rtqk}f4}hLKxg*TJD-}b-8bpJdnSm_ zFC-K#AU-EQ@Qg#T=~z45-lw48^nEIIg}MHwo+YEHpzzi8qsxvu4RLf7IyfgLAEaDQ z*|-`iPCsC;wXZLY)#P6C$7)tzTHbVXDbSw>z=Efsa1;%^QF+-uu%Ap!(ti16J^9PJ zVE!I1aRWI^d&9srz9;J|vkH0^74$3x?Zd}@-#iY|b0MK=+4JSs?s$QEfTs@gZER&k zFhqn|aP@?8c`lbPIYp_bsNaL{WhGbY%V7QgP`$Vd5!iRF=20$hKLyrmxi@ij8OxSA zpaw9}D!{fOz@dl`xYeau+6I0drY~R|*dXb@m!NBNukCHdY0zBr(H|k3Lb4Ss;^9x4 z<@V=QU|D|C>5Ai2V46c2U~~8$M-^>vXQj$l(FU41)Itia&+lT?O-d_>9ED;*!GSxY z`+!!FwX(5POjkbPRNF?TdNa7*1nNROczy z_=FL?P3_m(c(mJQ*@Lh|85_qcQGNeMTw`LSxjCSCK}wKF%mQ%;Dh_DoiFv^#oXX~) z1QhpbKrfcdiFxVneUBc_E%gl!zGs_UNKhdZ{!Vz81Iv5(_DusH<43 z;-c2%<`oN~@37}XGhfc6wa4n4ra`#mm>TUb*BB;ft zwX~^rL5XP)*y$bV3gBxNI6+=R36{B8e`3~7y10=So;8*D6%_%O1F3Y47!$ypw#09D2TDjEMAu#eP~rQxtoaKp4DHNp*M#-AL-EYJrW zWFA~E3;a6I!?zH0&rlmcV%hvO=n)5OBnI}D3c*94FkXxjib2K6?Qm3!_X^m|*ZVA; z0p=Xj35GKW3b*TuhS{lzG~jl^-pcZpQHo^gq;(XYsfaR-Go+W|r=<~$(=|Yq5arJq z@!eukzM{Z+*UA;=qh6kGLK~Er5ImyeX&+QBhyx)JOWH#wF)op}s5&oHD#&ioK2w}` z8q_3uUEnv8d|GBieHu<`C3qGslLtT(PA_I^^Ho+or_lq*XG9ec&r(d%6ffYyFw|%! z!qH@%&qW7xkjp44XNpj($I(uc)fiaKES&pT86!ozlB;VO0do*!U|OJG zj1G&f;HghwNfA4gaRAV|81tIFsEjOs{~B&|aLi4@G>RioR_z z5j6QTGOZhE8U*dWah5W8Jlvv+dxb?*Z^Ldr1N4vPiZLT^Li{?4Y-2NJw^#(tAyGs_ zBZjabtdKQG@j(%>@YdPAclc<+!GPaX3bG=X8`?ZdU}uBQQMz8*K*_p1GMnFkcz7=w zVqqGZ5C{*85A(NEP}R)rR*UqjvBLKhI&S=WfmlIML%(1+yE%@hn4q_)2nN z7PG+SM3>fu3#{$@R`!xLx#Y%r9vI=xRSVqAK9($P|MmX6XW6z&*Om{IhL<)y z)DztE(Q~Ie!5iiUR5SR|k$9-{nfx(Da%!t=)>oPjZJR8%XRSDS&t1RGjW{2km^Hh` zbI@1iF5oXk3|ravsZAj$2BMtQ@SIK5dDrNQ^#%M$#VI}>Sy?~(AUfrWH*8*Q$Pvxt z(9+*n7ulTaHmn9_Z=PL{3^I*{>z&IRHeZ>OQeeA8A*Xe0J>~SkZgs9dEk3$=2pm%Q48}P( zUa{WkKFF_MvMl+2mpL%DE;$IUEwdg;o@px#6KZk{`?m~cFW*I|AV`<>p+K}U4N<2T_3ni3C`K0KFV2j*{~vOZb8KF= zj^8Cf)_-`8JW_pD>`JX_CApzhMf zEaQI1q`ao)?55SzN~%D6DPiUW7h2n-};1|i?uJ| z=JHRV`SMN0I55!(GncfRL^RCTm%~F{XMX~O|IR;jOEdn@q7vY@6J{=BbV60~H|ADd zCwH^1llsBSrR9GlB}Jy@8E;=X0%r9f760DJ#SnT3fc1DvLrwmhp!t6DmQp;SDVYm$ z5^*>o4srTktsHl6bCQWk@(9?ugi1T>lTUlbMk-4YINY;im#G?d{AH>pGJX)2ig&`~ z`Yg4;f7yC;fB6;r(fwpRG5KJ|^_23j^T)e<3BnpC2|0;<>Auvj;O|)KSK#6T;JRrd zeB!qd2t0KhZeP6h@yti5A03AlLTw2ynt|(bp~CPfNu(2t_yZuT4{|yqSwyya%55G} zbcwE1F_#xJ`Kpw6QlO|aU*}&BZjPytxC5K}IsB@8U&$69_}u66k0mNQKcw1wa{HbG z8Og7PxwynN4XcnAD^$B9s`(yf$~=XTphu9bxLC^(9?>a8nD%uGmIz-)9sq8vRVc@> zE&OyuNvXng5pz}1)r`gE&=8NB5OsmA;8E={!FIYI5q8xWQ?tdf-`ePm=UIyi*+`2b zsLa6-UP~5D`$l90u2@%I9Z+;2mN5~Sz!e=a7~0uhenXNjaEvr^NvEYAt8uLwvt{aR zLj#GLA(7oK0L9(~?(xYBuiPA6{y!(*oV?Q_=|Ev2k|@FQ6uTI}a{*BYxpJPi>lg~2 z2I!sP!}5%#b^&VT4+&-&LSjZRz_0;U=3yxG(tyTqUJzqo zd3^?Lp%Dz$kdu#6EY*y|63(Ch8_eOQ85l#cC@`o31-lmfNkQiUKvAN6jxyEMVK~=$RvQ7m#`#K!c%YwhGYb515y$fU^vCL)+bcoASJ+| z2sViXQDq$_N>C&PjtsqY)L70#7{PmWrBt4(8HMC&4!w=g0F}1T;C{j;^7B~pu}|fj z>FOkijWC){Y(|m_;Q+vX8r~cbfQ(U5S_j)`X_qhn;KlI4&^ODTO?-e3nBSu5{kkF? z2^Ln5nb^3rBx=6%r4LBlZ0&HyVii z10kRO0H06YNjCK12Y8Jd3Ad@vN+g^<86D?Tv#wwrQxRr z^j^mPS?Bd@Lj>=3K(x&uiMJ8wI77szz>ijHfa9s16lO93a~}~fP(#|ffPcqUv>1q+ z&leAdY6Yx`BANyvOJ(cguqM3hH@zX+Fim0^*xKnn22OH~$>Iz^+ZzU;s$Or3aM{L& zzWyT&q=xb-C+C9TE{~VwGA%m7wJO$ief{q-lp^v))k0QXWnw{s_Y<{T_SsXT)*Ju- GF8>F-LkMXA literal 0 HcmV?d00001 diff --git a/fpga/rbf/rev2/std_2rxhb_2tx.rbf b/fpga/rbf/rev2/std_2rxhb_2tx.rbf new file mode 100755 index 0000000000000000000000000000000000000000..80f336c9d8e8d574363701f5b6b23c30f21355a7 GIT binary patch literal 175896 zcmd433w#t+o;F-nmP|YA?)Is!?o^;5eX6UIO6br@NFZn+eX6TFl^aQ#aB;kZ4gsSg z;Sw;TXu2wuP(*|fBW8SO6k-OM8Ab)s;dNan9hw*&MoDCpor@ZX3_6UE(1d^i-_t?e zncexmZ+3tCeZQ~h{--XdPM>q?T%P~)e~PcZ`s?lf55DpeFE?0;|GY!|b;|$iBYAP9 zym)c_#-$H!T)Jt}KD2Vls+CLTliqeQH+P2Q=^$>zlHDQ=C(oH zag*~ON))}Amv`i*W7xiTByQfnIDh`flVpTG2C+|2r>?fp zM(*pUPI+ccn*UB4{TDN;js*huMvvNWooxEQS;zlkjyFc$)&2Y5duP&2j=af*=zlDu zzo#Gk$5!wCnapawI+a~(^cf`%(lehoBc;jTt13ZS3?El$VZjGO` z+)Dh7?bzkbo8Nn3ytVatlcg^tn1R%bV1htEVmo7`0KyVQ8OTnzsm>uW5`hWsFh?yH z4Hp?dD=Atym)XwP?GF#Ms*@L>x)!~SRM|`$u;n06_k@tlWiSNJGC>kixFJh#*P#WU zFKpmx!%419F2t+# zL4RbAcbyTxQQFS?O@f_0jHqOpl3TRHr@#9*TIp|`n#jxh`fOMvZ|phfu<7e_8u9Hx z{M_1{?^fe0O8lxqI85Pg4xe`5D-MGuG(u`8h#rF=%qDFz4MBu6562VZEuM-{G;DAJ zyiFcY?uF^eKZNq-v+*72#z_+qzEPfV{6?HcBZ}gC@hzT%dv2>Td4RK;Oc*xdMEHsW zXXl95MgRJj;;Ake?AM9oS^bR-7y0Y6?gh=0g^2&iWLk~DMc^i{N`F!8$rBfT_lq01 zF<~mcajyaRw8=pe0hS`tl`y?6HhT?WC*vRfMmrE*a*ZtDaHFurx)$okI4~H>#oa;DQlfCSoehDMT9znVI>9a>SwaEcUQO`Pf&fZrSrUlZv;>JBNkBp| zZo(o7cRT_*c509igi_5+3-Kpvrl4w`dWy+^m-UjBVT#KZ7+hUJ4hE)tBC9Le9+q3q zW<&%-&;)I_VXYBmqQn%IXgIQ#r}6OaQylCkV$9Gy&< z77A(HB#0m?%oPmKpcm|9e7ABLk{8fs8b5+CMVJ|Z;(4M#;|X09^KyOwrmEc_wHqin z14JN3Aczdj3__Ivg0?0zpjpIvLoC7KPGimi$F*k7@ooz$2tdeY%1jXmS4}9#Jsea*$b54G_isTeVHgTGms;2O zk6}%*LE22RvI}2E0sQ3GC(0$90uqx6f&x*JcZo~WcS`o7z`m0$ z90mv?h8=Q&^-N$&3gTw6-gT&(wN$c}Z2z75Gmyx`(}gC&*zXyynq&oxrs< z3QYy^K7%w41$_|rn+qDd;#R^eR|o|HkxVgyiyf4hUR^QLh5NL zJ5{~lVOTi8)Nm{5Fs+no*+@VYLPkY`EcM6`*axI#j0Bw~sQ|Vx-AYC?tFhJ&DN(tZ z;au4gf`sPdIay-pB9mOi_X=T+Yj54kQXg}sJ1g$Vdd!jpUjaYPDYG8PIbgX27H>ZM z0T@McQs`CN#=r;zHvdpAj?SE(B3H4M*=6gl^wxZmy}9|7K!=ue_sZHww!!UsQhn^h ziVY1%j`S7FcN~`Ln_gvOtW>sgvE&_Pnb1t5ayzCJL2|!_gGE!AD?;u#EMIqSxI2XwP*32AZgKo%8Qki`4t<3U7bsj z>s8++i=`m5PPkweW1#E za?V|gli2!-5#85VdD1x~jL4Nim(}&6>#Lj}4;~D)j0s(J zMWfaH!k?DCd$7NfU)cJEyR3EerzzQGb6#1|v0-WULNHC97ED;OK9fmU>AJd<%@ zER%<&H|24;t6=p@?~e7pSk}F{fAk&2^V75Jf?1o#gWz_565LoZWIa$ZX01=!I3i1R zg;y9hCFCD`XsA90D)U1dD-XygJuJ!`ggMN?uT7@Mkv)(tr$D&)38m=v7?k!B$ zQ)iFy3()psX&p+RPZvUay*gK!Ux9aM_*0ou~mROch2C|tM zp$FiM5Zba|2SkVJz_CynH=H~7==Ln% zcqD7lM1-+S4DFh|F?0wuZ0JxuzG&nn-v?~oRQrM%cH6n!O(kbVCKgFU3Hz&)zR0ak z=)1pR#r_tL)ZP1%v@7}({n<6g<`2z3>aoOlzXuElV@#+tR0mFEkLim_`Lf*K2%|@t zs<>GyC#_kBhS!WB-Q#Om6ytTz;o?jZ{ zqn?UbTGRt#Y4Mw0tOK#__*Y`vZkVO}tM+e-u0OhFO+xg{7~19ujQgdR!Tt5lrt0LbR@e_C41bK%an<*QYaUW3rtP5*Ct`d;sjHPpd14C z#V?Y6%1@Q@D0xZ^lwm?N9W}EOJLN$Y7Kr77?w3vqK|MLp4=s;3v<&ksY2_i;4rH7Y zHAiP>SK@iMR05Lyuw20iY>(?I${u+p$f!I)v43aB9lGVR5Bcb zqQlfG^Cl-P0jEJ>@TG(miZ8j1v70b%48UwQquoo-tY~8c7|{hHc$vJ1*)0*7lI1`jK=dYs!cWVM1bn=QPegAFO`OOnH8@yG;AeVCp4w2 zQ101@1TMS`uQKFrjyG#SwVhH(!>5TxfK+8)Jt)xsyep=?^I2R|PaFY-h1RW;RZPJCu zjZ&WYE5ys2+ga39*544bw zWz1xlEY3CqN(O|WB?_{IGLtQ;X|1er6ki#ph247CFieEg6oU6*ELG{%_4p9zLGN1u zQ0Xvk<5bcf667Q?6P2ilR*r}8H#3`Q%?9{3D?BE=Bh|3V>Zc^JD8{!e7qZ3On#e=R z6;ZoO8u)5yIU{Slv|V^y$*5NQ^9TQ-5K^Up=-FvOpi32wJwp8PcrYH|EcD@F4)runXPJxidB7y?7m%PxFjx#wWf47sga8v_ zYXEPL$|bbnKw2f5hQhMS4vB~G=+9JVvX)w~P!HHt6I2A*@M5rIaEpsWaY$@paE9EyE0KJ$mUBmL4YeXd7wq8uMR2JN_DxB zE)}s2+MH^nip8}r)s<8T35-3I4KBb;yE2C%QbLLaFIUz<>rQL90~81=1mV`1>Z~Ab-mt>Qo2%@KqX4{PX~-~B5jq>oTdD( z-~w7XeZyl?()Uk+{>);v_^l)`tX$HtTTly=?uzwRHVWg5rTo+p6x|T>M{e)*EPg|d zZ2@&P6BTi_|yAFmbTkQ2NLq{>Ug0l`LUtX@*4&0rT0hjtFNp| zJI{@#Z1FT-oBGUiTW8N|WJXn|=l)SX`Juh8;AldBnK;^9{L&k-RK1QFY@Ya)Z;N!k zWh_~{cl8#{qo3dpCtokwv*F~5*hu@d>V-bb0J{$U#yYlm%iN9m?jdm?FwQK^&%G3} zG;*;eO^u7|(N0vBH?rid{G8bPi|+2rca2+uWqH5ZaILbbaox4SgxjZkQb%mNHeVX_ zrQ|i*uHQTKpnoA+GNQj<_Rv*k#oV;2^}HQ7}y*u zKC(kNX}fxFQ)94RISEETZK@lrmx``-f6**SSGznPyT|&QgvSCi3p@!Qx<0kOx~_X^ zQgEo`%C5nsevdMwTxl6B^W(NnD!KFtk*?AyBsW&FCigiL;~p7iC7J_=FMo{G+_Prf>3C zU$cx=EGind9;z6t%t=x%wOFd;v-e$TXUoJ9+tH*)KU@6g$~OY_@`ztvSXpJiBoEg4 z_x~Yj{)p7;vHol1+6Vq;7njXH>A%vhZ?~1@jx3G7+xJDy+?qzVULIIHTr%>DP+7|O z>R&(i%vS@J9qRbj|MkmP2Jbzkj0(?hjPc2`fBlxXw*T^@Sn8j@(zAs3K8U40_?7)? zigJF{CS|<0b)oVzdB^rx^1B~f|0%_1k7c<^kuwsy7uanWMEkeLvGyX@4ZJ;jU8qBy zTVSO4(jy+KFKV}L#lZYs=E5W{@7CuQ6g6a>;3jSp-p-r)#L(#hW=Y=m z6(8!DZ61xJEw0^vVQ9Onwr^X*ir;IsQvXZRGtoU~hwSsZ(q)Xav*dhm#uu}MieaPm zP{+l-Ma8*wxv%OM-(v2}D|3$=Wxv3n`HMJcUa#jbK3gzhIl2I2=5xLY%TVEUTcj8} zC$H)lY!{1F?gK|hqs-E~JaKS-|0FmcU(_-y`qH`yG5Qji5cQY9uKkUP9sA32JKSY? z9c~P=^@sbeuH3fei-f*2*F#Tu`WjB33rwU1c1S-g+9CZuZP&R!)iypXcZqpqX%?Dg z{UivH3ug~15o4Xh3dO2(L}y?jSqfljW@r|Ref;kv)YvPL*T(MDXXA?iNyvGEWmW~f zbmdy~E^5|KgxY0ydo*=a$B}?xor&Q;>jSk?ik{S-d(wOwYGmTpTF!ZZRRo`YmIdv= zfRc|!Q%}N`T!_g-JGI@qoT}*D5Km@j=W0h@atWnl_(@_mj#4YllxVKOOc-9-Jm)g?fTFroVrrv=@aFNrOmc)-hB( zV4(nat(Zn8s;G(1(|0li-=nq)9B85y42lT1P9{q^Qd^goxeFIfB(`SpZBQ%6sO8Q8 zX5Lwqw%;5lk)e@+2uCwXv|yYJNX&W?MHJ?mGL#m|ftP5aO$}3FnT7&hY|mvCB_?*m zPb50Q-y;*scGke)+Gmg&QCQ2#$!ab4i9-6dVTB}KWOj27%4`{Cr=MTikZ}sWm6G-`BaY-zF7!IneFX89cF5t7UC_rs0aUZhM)u9f;|AlQZF+UATU3; zEtlENZtG-NcR%)+1QB={u0rKi-k*gZv`aZQX!#wwl~EMOPU+bou{+V+bg+wr7JO$hX^nIXN$FJ z$Q{RUhHhcI4dfsTO)QatN62o&L2Anj5k$D92pLJ3nD^4jn8!?``LMiGX_MQeZH7QM z_doJvtN1zqWGZdVVr@F9v0S(p%#s~~k%?@B5bCP1Pk2NscZQ7vD$tJViX{t$cd|HU zcL%xFqTa@oI~|;atkpGa29y;IdjaJZ|34FnH$#H3oRE0a9EKF^7??A}>~1xTX=ywR zM7qb~RWTrU+yV)QEU^M*l*3vKy|p+UEFO%Bg%O|!v0dg_Q)@iIICXu__8Ea1%4Fp$%^mTc8E!0>W&ODB$pd8KOR zy$>a-5||m4LW!iAxj7Xhbe08X$tp=2j?&p^Z8z)1EIu4(gc7C3Fn*ZDuu?V@G9VIE zxtRqDjjE2qn z7Lbu-hdlUbzy^=xvEeiDVDMvDumzkzNUPssiBK zv5$b(`l-Hp9t_FM*}Qg9EEmnDCMv(RK%ykpTmx1K(q0v|AzKBqVXv5DTj4rW)(4xj`z7xre&l#n5rgCKoI(_+SnXDX4{ z%|ij0N!*vL?GoE2;SP;q`C>db5-xtgFg0@(t)RJ6M^9+Sd2a9-?)Pw+;i@pojh2{# z<4a1ogKtdmkro!ah3&Eir1#==FJxVuFTIDW2KPeIykVp#cZwCJFV^$#TA zMG^TiDU`wmSX7TtHiPlL%QBEt58C~fix6e_Hr}=+rL*^`pBO)yI^7mEQ#IMm;<7m} z9jtd%Y%9-0Z*_;dy%bEn?FS|B059y6*u>kc$6f7K|DdoznB7te5=5>I#{|~<)Xy`| zfS40if%>fW-kggn^T5*P&YHdE#}C;`BT0#WlD}L9>!yt*_e~#2$$2Jb8>(VH%O2YNY2oOn z8kfH0gR!GsRm@i#W+yFqJ$ZEHkZ0Df*?V18TgQ{4^Amq5ObncT?`Icl9)2n7)RHsR z4}bcOw!L7X-negcNA)jX9IfrH(+;|?pBA4BtY337xn5pkr0BK9!h72M2j|aCS~;3i zfA^wkAc-BxTwDdl*bj4ZPQS_2Nmux#DY+@r%d)NsuQV<>Wot)Oxg)Ed_9Tyv@Kr0W zgZAmpxq103uDdQi+L2Iy`>X|74|aGO>W_>pvOG9Yb=$)U!?v+?p{fO!mp(mT%YP%5 zRQATTt-osg*NHEGdF{@xu3vrr)1L;ov8R|u=}-4>Xg{>;4@<9U*14sRy>O>oTwN77Babxu%F-vM|KX+X z@!u8hc;ZUu|Juhh&8Toz2B(86dQ60jFFkQ)6I#6{>BM-oJ~z51`g8dPuK(fvZ-2BP_Q&&r_oh-ON~SBB zdR*lhC|N*r*q7N{OPL5TocI>gmq3)f4xIsVGQMs-IGF%;e4PM$1@JDiUQLMFE6;ju zm9UW8fKh*?hV;TgrHu zhMr2gRq=hcRq$3+)RE-z1JEmad zO_jqUYMKBDD2R~Y9l>0J@G_!Ed2h`ma3CG-NLFsLlhd^@IgQ1DoFUwMkcc%3ayS>5 zG4;k6VE0r5t1UQUIS_!GKVZ}f4y(y3U||Q==oC`r-8^QOdm1iQGRtHu)k*@w&>ZV3 z_)HX(9P*GXlHr?`9x2VBr?zVZlfa6zF&7S8YCHck&PzSc@>Z~of`;HQm5QRUv|7g` zC?T95xS7Cm8J%=s{N9GwbHW_rfO+LqV1zOCja>yC<|iE8Vw^uCbi#|32o96jv+jsW zil0a%hv{~OaUdMC=XlPn8c5JYljhZEgJY9%IUR~lN-~dqxeN?=Rfnl3^s-9TVu;Dp z$zWvRzVKmPjR3-RGw-$W3fLbLRjW8tY}w5$Q+bpH`lIVp-foA{N`T85`hd3 z7sD46u_Y+!ptXcG)gnSaWq9{(>zOutip)4jF9|VrH`5DsM<(JCyPaVj>s6KXYMe}^ zns%w3Ji&W2**&a7F)E>(>%?A*21*o#ltrS+_-=+lH2#tlG0_|*)3XVthH(sW;!Qx} z!>U1YjKRqQk**6^M?mnqx!d|N9}Psov>nS7aOt!tREj83!L?S17aw1A3oNoC)Qij# z&`fYDZYh~X*+`x%1Y&?`L)lYLun{27WX<{y?oF3lqDWSb15*)NfmwCRu5vOoLFkV} z1=&nybf?I!eLCUXR}1ss_-Eocj0CZJIMw7(b%nnf1u)@R(!m(%2JWx%S^-_Wa=sU(1xH*J%LPvy-Mp~OIsPyt!5dJD%nYN74s0(POC?bk?u zb&hQ?v!omO<@I2SoKkCf+Mn9ldk2k*a*>O2-vSJ6Dsyw_YUb6FGlwW*~XN~qEWsm!Wa&VTZ9GXdQ5G)7F zA>$}ya1d`Xh+qx_d?K`~E;gb`M%d_-WUsbPP-$Pb4?5)t%qFl}(nS?^sP0|7T~_N= zjmFNj;M3;6n^?(P5PtyZ>lqR&PK@2`EN8fjB}%9oX1=TdFpo?~%;In#%<4(HtNlpH6;FWS8ECvn81Y^pHsLMZVBKQ2f`>oj#A z4yP<^A&TA>(ixZ3VR2t#Br9o&Am&c?kh39y8)y!~s8e~W6{@MGz`O(I~EOP21)Uq-=L6VoRoBo2e zIx{iGNQ*0Y#%GcOM_khdkE{j3T_^aH44vB1^nGR#%mGt!#KCB_l(R8%(}ui&rP8`; zBO0x4d3%|-^@PYQ6Mt3v)&DNMm=#!KEm-BL7-i5xkiX|WQ;phq1 z(Lho`!z=Hz*PU3Eakyz@ZXD3~o+_|=)*WVke(2tXIiDt8vt2B9KLasQDS6-l8> z1Bdcg?EKUdh@ohH`l}ryy-m%RX52aL4o}`hk?+TA`s>7#Pd)68`Ghj%x0g4UoOpXw zEh@;n|77dnz~eB8EPkJAdO?VP8`1rKhGnmwBjcbL62d zjZNRn`l|Q0)eT*-3=ggPayTo0(WAdPk$gpGk}9v9&>QVvb+4cGsi$DH zMlOt=`QlJn-Qf?1Gv7S=nQP?8x&&z?Ln{MsR^80s22KXXo7l4SH(nTfVPk&5sU_{GOdet1O4=OTQvBt%ud*NQ{J!?3q5r7q zZsQL-cC?P}-J5om|FltwHUFyawefQ)&vl#`+*EVrKG$>l_3n}v*Sxp=YEf^~c(1W# z+n@UGeJc*@7YL;Y1NJ$#Zz%f$aatZG*}taZCnYi-Uw>plcWGp%YJYQ1f5<=d4Y!Zw zG+1@8=6^HmL)Zh*8?ugmjqL4@&4`4Kp32?y;OAnNkhDK2B*ZCuxC%4&+pr-0jkHN% zzaPFOdo~RFVvKJA#`UkUW42K7NLlVvhwwKWQ}6ySF|3zATeAUuy5=I*#S}Cw8ZNlb z_~UH-un+qLh1V0%BwOG8HCsP&6vi2T;ai3u%VJiZl_sVh-GNOcZie2zI^)Q%#H!pw z+c2tsTwJ<8>4)p14-Yk*dMwm1d_A<)(>K1Nb?`! zTk7#btuw7ow}+e}TES?pL6q9t?k25W%@u4&jU6)<6pU{~(b!>0V_ zZ)!EMsW}?(T8=V3j7^F#Ji{Xk4P~c>&TyQzQYZmGb{`kGE*|;;%aFeIkOp77IRz7! zpm3S=LmKNRq^O2IVJNp|BDyuhHGt;Y%9&uHUaHb1Hxn`=NNE6c$-EIRA_3MC2T@St z@oNleH6l-}Hp#*fV36tzC})HSufZtUyc}l6dCXLqC1bQUKOS#()C$CM4C)0?bW^w= zQ{V{m_G}BqW$+BZDS=W!Sw^To77p&TYyauVJCcxnYxE_?#q2CFrj zWXC_|U~-@4TMs%FQiDVbA7q8D-N;(Ouhl55n1(eLpqQA)nHI8GF61??H_fZa0;2~t znVl&RP&dZDt6>ktK_kq{K}RIZfpsM$j&x(rcUc(gVX%M$WB-tBRw%-baXm&?1g^H$ z!}m;UYW^pnH3eZa8YRLk{?k@Cd*#;Y4 zU5h2wEu_W3s-kN4xxRny@y{V0d(c#R>M&Grj3!w9B39T)!7xA()T)F)E&lBXIwd1f z73X9JhNWRXmv5;BR=J;>m(2!{q47q0vW0_Lsa|wQF{zJhHANgH4j)l(blbehD)HycT98YeDuzWM3G}MB^&7h)!7DvMeSV*i&1XkcY$r4MqwO2Ys+q^ z;ZTu6@IBgIYA*x-F?9-@R3MAGGz9>olus~txLgPa!TBZMApnOTQKGD2P)xLHEcuB@ zB9`;s#K%!R4#$`&uQ0V&vri$~Lmw5$`dq?(_BTUpEy(_S%Xl<$M*GDC_Ni^b@$#!|T9t+?;dKt7&D%VC2~v>yaD zIHsd5M;6@oaM+|7J*7bNG9LS^qJiTE)n**`kkYa-8!o6u(z1V;hX$~#41u7ecE-m8 z@b~fnEeD8LTV08DM7f9%4KKj2D{+WG9bgt*Y|>^K1TUzLY9=*^Ty!}rL+n9sGfDol z2gRg4TX`3Yv~~bzaxd$U^a+`jY|sn4n=HC<#7ZRaW`H>mp7qH<;APmQr_n~bCYTRs zL91q=k-FA*lBW#UEtcwj-AknkT@tMI=zd?5M6yDPM3kt;GRdv<>eC_5rtz6@ws=OA z)~hgA;-~XHyZD(PdCGKcMzTAKAId$9)3l1Otw{|stE0%;8+A&QqAJ3_VS$vI+NW)i zv6zaJ)}w*-w=MNj>~i3(V37c!>n1!kVZ~UwWI*U;VmfyDiRB#OC1o$=CC&X!DACXq z&6I8k7M`UwL33s64$~IJv*lI^8FCTItYBHzOCJZUMk}BcLAMOPQ_e3}h*U}r(>P*) zLq;^Eyi=D0|iEAG}CA7n(ZZ~BlWP5~% z;pJ72vzB@&)^vN^QK=1SPe`flO4%c27yZCj??WRpW{^;t=Ybf7|;KBZWY3XF}PYm{ZM-DLe8!Y>sl z5}xXnMT$}`9^cn1rs%x4LF=`j5(L@Vz)Z3C!-v@U$i@Vd1<-DZ@F`ZAH;?cdNI!H} zr7u%yt4W2u>e>DB_T=YkzEd1(%-*mh#<-?llV;bYTym+KMh-6B6{>9m|lY&3I*EhEFKvM8ha;R>`)lD5qp?~9J5%|E~M&@r__e)P^&gwo4xUNk9%a!-js&?yc4rW5}vPfPbAB$Mk+#8vo39FnW-hcIF{1*%gphn zBaQnfhIU-5{sX#E(5>#)r9rMBh)#up$e;g1RksDreD&tcM@ER8gG|RtovnJ(Z0c zFCJK0$6dDW+P-VoSc~@P)1C)oO}|;N@{#1?RaL<=_g}v3EXyAc==sUln<|oW4*Sk7 zxV|Oex$ENP>N4r`+L41oUG7Q$+0~a07I>sL~?$JK*>Z_0S5V*akL*Q97_lli)DG=ifkrf`?{mU-*WKOVjqMwxQUmyDZ@MHKpiS!#zkJlV~iI2IXKZ%LapX@sK=arZ1h*EHzwVa9L_{}ud z-N>{x&cIJH_!tkfgDg`M#G0HN*H$xnyFL?^i7F#6W48@rj6bW{RU2GhttXtZXQy6B z<&W2Doikeov6@6Yu4&i@sMM0@+Kg7Uv;6{)#FC#VX=ED5N?CH7Mu;G>u$pBTGCi8O zP;+;~)?VhYun*ap-cV0yx5Ce^Vcum}?GugIl>2B!|%5~1hs`yc- z`qIDpRJ9gn1X;1f=>`H7V5VU9%&w@UJsY_JpIfcDwH*;noCyu9J_zxPK)dRNfb2ThF1SnqO1wKp?8k_6VsZ@&R(+wW*YlWQ#uUjZ0tc;vM7+oh?NmoeW z-E=Ee#5H|qDkb*!_)4MSCHuYYOa_x?GDD5RuU5KmmbvXx9=TSfEFwcmQM{N@zlO4a zX-{fD7Riq$Qwlr7XQM8#5-Ju9FTGIPoh?=G76PXP_Ej)t8cI}Y#npxX@Fr>cB2g?7 zsATO`9?`8}5UR7A5~nuvSv>LkT#Zkz(V7M6HbLZdsA(4Zbs`ocGc= zj-W|qfx~hMH_6A@YeF(Gy>F&^M5UY|rVAL5{rDww@=?K%67g>H1iAb7|jCH zjNm@T+r={hi<1}FJz7a3wYxL57o(+}-9q6$b%vVh=B5y#PZU8g{Yd3lQ9fr4KfkXv{LX*A5xF8nqk;I{-5=@~FJH)w=2vFZRxq(WrdYD9w3 zoEin-c3tj-0QwYK7TV+%@^M3WA_9`7EWJhG+jZ7@82bbUqmQamGyh!!Dm_W3DJWsF zhlQLr-F%aqi8_9GR+5nfBF{9P$LbRoC1qL;N+uwK zKt%Im2%OQCpM+6;#c}3l>{*kXmvnF>7XI&Mm2BMfSo=i?ML5_+h~@*55!XvYH;xxo zgXRetgF39Qh6*!0nE$w$XP;+bDw)7KNC%nNtr|9!Rk0L^_L304XOA%;X1#T3h~;|$ z)|Cm%IX4NyLG0rwIj3?d>)XOkONUl2yP$ZM?-%kD{}E-#oMo6pGTpKQA-R;n0jd!8 z1S+`r6)CY6v0<6T(p0Hl&0_o#E33y+>@ z_n#8%T0diC3o{LCkb#|oVmJA#nIb@2g2^*w7Z=pbHHO;+do<|QO*Ns#ep2(xCaD8@ zYqirAyd#sbPRY=UB*^L!)gO`kIOIWE0roseZw&y`AOk~KwC}_1-G*FP*OV7!O!}$SnM{H*hgViH-ahQOGXcP;y=WfGY9d0q zsRXm(E*dI!7Ibkf6)+=Wr)oi>9M$#+<*A9$JDRAd z9XrS@vy9|`*FRfvM|G786Z`0`h4Q1mJKspk8j{}#bac;txNB^$QOAzeS3ce8F(xEf z$B(_}+rj<5;tOg0ibLAC)UQvIzX5VYRR^~ijmExxb<((d z^D8GaV@=vaE0cr~9TTC~*fcbo_w@?BweHs(wmaz0eSCV|+> zi;bn1D^@Igyz27}&n%j~@K;G!N6$GwTs^n`_Pw6!hqdoz{p+vt4>kO3Q62Ue5?qcz2Y#eb^ve_HZqbTIm9=3(t$+CQ)TQ)v7JP*r+` z=~(?nG}h5^Pi(3r!TFYTk@XUcIJoUq3Dhp{Mzf$ zR*z(C)(%7_icat79)nw-KPV0wpKF~z*-cK-MR_rHW&Q&ba~9PV|E_vS8K1MhYSl%4ZvOw_>RsTXsQ16|nQiS^`}O?(%exyVg@J5tqAt*{;1g}%&KliqNOb(&ec3R)eMRcicl|R{i|%A|PGaCmX4!%VtfFXNvYF5~yrI?X9u$h`kYtOIKOP!QomwSNf*!|U?Ue~R!ytn;6a z{(fopnHXs4kH;1`LMy|+O!>+_fTztGz&UuhL4hCiJ~4J&D&Mo1FaQlE+xiXb&VILe z==7TD^1szMZ3Lc;2MOU^U{sddh8_F2TqmNQ0GYkMfWI%ZKLY}S0tY~WdC=1j+$BUS zX`A@VM6polidM4u0ww4MwDrZka?e`%a(X^n%`8#d;#nXda%7WtPFMUIY@E&mn4UwHTXttEs@k}Se zs8v0jE|x8!QX*yg*#>3lf5#~la$xAcDoF(n=Fpe0w1gtWlDp2n$PXoO`0dRavVe`ctHH#s~SnIUlar+`M<fd(_-1-3Lx<^x&T%U2aQ<*-%-XOrdWydIu}7E_;jSSHi}4UaTfL3XbJ zqiJ3Wm{QR^(FR0-j`l!PpG8O@8XiQT!1rjEh+s-%K%1nycxm=~2r_N?Mp_fBjm8dQ zkd+dkpja(#tWu}Q`peCn+;l7rgQGzE?jG-5QUCP4%AI5w@mqJL%aUOkB?X~0F zGMuV9y>KUQD30ATD%POeh*{Zv*UAsg0ERD3s-c zX-$xjhsU5Ij@`!jYY}LhjFZafLD%w=Fiqv)l zXks2tWv1p4Z5U2rfAF^9;R@@SqSt|7m#788CR8t@Kgi2b5e00pPJ9=C zIA#@bP-61*5jxOJcvjPVCE>*nit$xopRUx%`ev3jHwg!MIziaU0E&=R_M=viv`8po zl{ig=tVKNVKzNEoFwv$%L?no%%>)Rq6^n!*9+pn#kv7{wS^!|@(Oj8-jHIB1KS-Ii zMwBVUcmP84{`)W?^PXe8&VE{wRorro(ZzgDA&YrD;yYd&@g&(`CRSaUnxnQ|`0U|4p~S*?G%>V~2HwHN(*jL`QC3E? z&5f)Fm@))6GxYHC;8x3ONw3 zVdfaRq7%a_`xLrT!j;NP#9=aqKBBlt?+lGKi=t}zTBeY6XlofmC(UQZM|9%N`glg; z(Y57s2y&3!8EY1Fa+NyoZ4Yw{*Ydo0jfI{He_W`_W^%wki^emuc9qb5C7?jbQ$R7}@o)YG!P>GtXtEepBGuth293a*1=NH0 zG9r$9Wq!ldM7~-Q+ht2e0}t;@0w?n`bmej~@6koxfS{&!-wv?ntd;SH?8zcz*O=SM z{wV}v=Fo+}XpjLoh;8U495nB79!;A;fPf62j$sBZa?yr@%FvUAzwRQ^G!g>>Iw>#* z_@e;)L6GWiuSpK++GJnhLq+>tCSnZ-o5%fXi;y>cpD$1UMDQg*4C5A8{A2ER+B zm$#Kjn(3UakO`6X+c{8{+3WcD96VurwPf&aNR#WCa$Xapu)^$0vv!FbkPTOLU2SZt z<^OXe2^hTX;M?OZ*Q1&%qs|D?^p}yGGagsul=^oK$>qVlqHex7qO~-OOTY^lH31h_ zX=(xDS(Nx^dUBK?xt&++{?f`IJ01DDtg3VZCq12CA>$`ien5>~3^ZIGL}$%Df)PSA z6&=Y$Hew(#Gd_yjq!aiQqZSY1aXo(ggwW?DBIUZM(9&e(Rca@_09(ke-lP=k^BvJ? z6ol32kLN#1P1}`_ow18ea3wS%@PD#>ZeI{z~#ES6UMTuixJatXq()vYzC`$VKyuWY_QJGRWW?Ix2 zHP9s z{xrU&a=7E{m+kM+Zx5c>!-ZhECE0XhWZeqW^7n|%Jp-%%6dj!yI}${E`gv-^;EAt_ zW}bL|d^rv*AWY5V*- z=bX_st|D7D7EU>%?lvz^r3dwD?&#*r*O|eGM=$p7-(?}saj|Gaop_Li)HtXbQL-oV|M{*L>- zm)>(G-5s2j$o;zLMD}p&mQ}-j+1vEP&$!dJPy_EJIp_41>^3?7;-2^#TP%fa3%+-0 zau-wIU~@u!_@4D)MPO~cdn|j~jEUuxbNK+(0rL0kx}t4;-@cIg>%_9XE%W=n%}G5x z?tZxwsV+16#rqnzg=oEjK^eblkcTdpWAE7e=Glvy?2y{Fq<=PW}d5Iw^m+m zy18%0h0wc1S_qd)eVsJm($5);6iko4uk;T!XZ*IydtZxx-(w5qJ@oR^ z{r{BWLn}X;&lrzo?w9x1H-DQo>`I$8=(5ck#8+ohMc6llA8PwiWwXP7I{C4JZBX9} zCaCT2FG{LyYySXs8e~4Maj$#Y=|tH6o&jQZAOPoIt^Cta;pfJ0`e~ro5M(z^w(?UK z4sR|uEgzqIy2drB+JU9_Lhmi?Ue#)6%Ftw(%^j77cD^q*_h@nN@K51Ev&;(kTXrd=w zt@7>h@srs$H|YhT39^1F7C}-;7`sfqNlU6vnstbo(@SWGjmeDy6Pv=}Asi*A9cP+J z%51}~lY#A=HM0G6Tz{Ake8|M0@zuvmp(>7flL1?LgF$1(zE}-`a@}%@#N5WX^(_o- zz&MQoYosDOsJs|C#n9Ig(N;`Ay*Z7G(1wJYeV+vo*ZF3NG28UL?3B=Y>YC`I9QkCB zLS4iIo3^U+9%QY_?TFu z!0HorwHZgqC7_e#JX+-4ST`x9~}_p5V1! zeEXVmNmJ3D)`q8d;%)jG78Szr{xENLeVh;gE&?_j59z+3@=9q(>tzZ6_le>)VV{Iqge- zWC%nb9Ias76o?s2mjtck&;}HeP>5=S0PsOK&#sA56o3l4QdE&8;#xk2wn0s@ofheL zSq)`|#va=iwE3(H;ez-joRkox5)}%{<(< zYiLGf|CDADzY0ZzZ}5JF+lW)3Pm^%W7E^q^-b+WdEAi@0+J~_iozZG=$?N6B_Uo*h zJkl4!u3o#(kj&aP$-2byo09OFWIr5bR~wXcZ+>FgP1?xslTF<>dS>IHQv#|`hLxUH z^*>P>#%8;$9A9{tLuif+tAfu1Gq$HUWL0W#_qlxDL?qF6u9=CJ+YR+i<|&DQd+U=k zN!6T;e@RAlkl^-6Q)61iVqDhMrb`Fr{MSXM4lI=VC$SA=FAv)Lbc`yn5k&e)W_5O6 zjH46BjD^+#V3^-3 z-=MXh<+E0A!S+sDW*yKr3cA6a5l$-(Ql3GrnhFU|HH3ESk6wx7RXHPnKOW5r<<0Jx zEUv*G5AN?{9r<_}fYI%Nd9-7hRIUw3;f$P?usW_sG8JqAa6g z0{|i0BRvm6+|a`S8~4`J;mtfEldGDU+E649Jed^AnH82Rpg;v;FO%y-;S5s)I^8pN zbQ@@G`jqMTAB3`EvV*3{VEGsal|QzF5d-PthSsX4GTy8y?U9a2b<8_ND9GnKRU<*s z@j?d!aXFx$z_VE=6Ziq4Uc$ACD&QEFz8h0xl!x1oXsO&^bV$!m+=^=nIfBv!Fgg&? zu{y$|Q#quZ&o8{T4kaO=i@_~q0}Yp_s*?~k9-KHNQ!7;A#6!3l#Up}+`6(h7rDWq` zq}JX{2$gOzgJ&Xa$rQstNypZnbS$eBs}6JfJMapc)RvMYnbT-xuS`;{$wO#UP@NzCc9`Vr3 zb8I%R>VXqb8J1&|HWK+VIUTe3)bi{0tdJ;%DwOj;HAo|#dLoZWM|t_$K*G zMOHkJV>IRtfdW7mfM*jd(uQX($%4=|E5IfA;<(*fVAk?MZaYp*fnX+FBi8b5TqfmE zWG%)88o-Q;kH8j(a1 z35_BZ60`akc9>n%oOyg&1I)pAPUy{UkODVl*|jr1;hV+nl71^=IUakgd@ymgC5SO8 z#aT3EaqI|W^qM&Npe$DW1^4oDCZ8f2yO|P!?gmycr6SoR&BGOItj=M?XKpA{Ez4VghXm1Ei$!} zVipHo-1I;}84YbV#(;SxJeV&l@8KWZe^jd4?u%KXkY{~#O}aZBAauU4!`@l7RbPVj z=-Vr(!wFOvh5_sIXg5{STawR^1Z12UkISuiiBZa~RJPrldbOjw*&n*%kxfBL+3394 z+k_W`2DWT*uJwP@`ZSZP7#F{Y;E#SJGnjGsH%lD2i#$lHJH`tb$hxTqdD zIXLh9Q!k%-#b5DsP5uXeJBIt+FC2Jgor%(b zNFJT|c;&6t$!llc%UpAy`_IHC+@G0#p!-fXQ^bwEv8?FnOG5ulrD)~Qtp&MX_myx( zv6qEncdubU@fLBzn-BeI!&UE{P%k9RTo7Tmd1{w$_^**IN2%|GVegY*r2RFdYtQ)6 zhOSFLD+95j^PR!)-=beT@ad)Rf7m#+f7LYAR#;$m4&P{}Fbxv^o?4oV*fHNw0=IKQr z3@ml!7XLVZXwQ48+lSvbyh9hA8#eacddbg~=PnqZ#W|PzIVLw~Q0bp`E4BRIEjIU) z?;G}?HC6YY-SSRu(SfmT@ri4HTzBmK3B%JZt2X<_U%Y%PXefR|jZpI2@X_wBUnf@n zqh+wa$`yY8qs+wD$E1nsCw?7$wkvV<-wVgyAGx(?;Q4R9oRu2|uHu3;`#_q{$qo|t zTDpdccRG*WZ8(=$b!YvKn!nDk`FJQc?bHo_n#+{bvu|KEZdyGsxcSTX*B?tv@7qJa z^Yh(r6aPB&`61JCe*v5yLuriZiN2xL&gaHsf0}3?J?lEK_e#UZ?vd{|n4Y_H)ccR4 ziHd5f7kD21{?(0m98(#J7 zf#3T#yu2-QG?_@u?`M*4eRoekFZG2HH?!!eMf3_`ap1Q2@0o#5e`|^8zuaBD@~tcw zBk{$(M7w4(3uvw-lY7nQ{uQ!-eoJ{a^X8;scrG9d)bu+zfzPP3KL_x!>YwDozre?4 z2>5~4!%^7Mc)R!2h)wRQt(&Vrm~^%Ugh~I&+?;&@(m8M5-%9?U2kU&p=9p)^`J*jq z?))@}0g8pd&HKwY;ovK1N%41Vu3`Pk@7o1YIS1A#F5+wdIE#T@f8VZvW#Vimev#4N$VUTb z7H-sQ0kBLBq8%1s(`V5+7TXz_W!v1>NKIXarh-XfYt=_UQV>BI{j3ztg?@}{paRLb zp3+M|8~q^1yh~x0r0WqB6qXU!0a_t;s{NY^HIRQG4A-}&_r1`4yFrP>{+BiQ4H`rv z`J&xL#K~4oNED>o@xg>{r&z1H%4Xn|Iwm?xAAgg$odVeoq5Q&_ zbe9OB5};XLnZnxFO9o9QeqIDUanvwDlt+2jEy<#nl^+&fv(YHSm@=oI$^Jo~5+gip^x4tp%Id0ZYBe1k>lc$=1f1YEYb6vx$a6{J=Y z1=V`FV3VYSX04H-b#k>-^tXo%pWxkU9kyKel!V9EfmC3c49Uc*{u1>io>r(}JHjKs zz+$wSHzTs-S%uzddLXCp_~7~mY?|>ge0s)4u^xYOrug|gAY(C+O4asWbkzLQQwvM`h*gA5$X!NVg1AO#OJWnC**_1&n0q5@* zm!O_S-qmZW@n8+J0d2#6lQc?{&d~0%@eTY@w2I*AJ^_l!x#Hp0YC6y@MfGs)s*5(% z%hScuI{M1^@9$Z*Q&F85Wt>dB;i&(epv07>aF0p!JQR39W^I}pSTD}8Gz2HH*TO*y z#5ODhlxP!xjY3#cu1Tng(P;ypbffo5Tkb2351X4 zA~;${+ew`y;v#H!o5jN%iS;@pO{YYn93QYBK4nqD8R;M+QAiY*BOx0(9o@!|0W5}k zl1XGbU)!J{)+`n-FvR*W^ro#kL?}F_rV%<4E9)kR0!4^G!wKCwAm$*o z3iV`5Mqv)bid}QtGIX)-dN9QsIUm7bEy0|~Ws%hkW5t^@6uL|+NiI@cA|Xn2)~&y4 zqGZ7#ikc;%W)X7Ft?-MJNN5Qw=145!K|$q>!1??dD%=)T1(IGx(5z89@BsM;E&!55x`elD+4}^elybWSK!s3vSX zMbWinm7B0msp2;Y={nqup^%a)#gYmNshI&N|7fR0B|RXOufQGvp;+Ve3QXp}7Jb7p z_b8G8;z0t;5BZQl>sDC1cvz{Dbw*ZVy_E<{7I<(8C71NVJgjk3ubbcy((C z5K9#eh8O?B1d7jRX_Pil=LQM(9-c1bZbKt5%}8ubF%aZoSJ^t3UCRZ#>(f)*CZ&O% z&W1L~alRHjn>3VXWrb3ODb90lJnzGuq;q?Ih4tIYZUK$)HqA+)Y3#I%I6Y-&dKPz0 zg>e4MGnR4*X&1>XF$M^EraC0{QcMy@a{6o;F*U!&@KvN-fK^K^*l|46mL0nj$0{W^ zspJPj%cm!-MG)Q%$qx)ub||kmGc!ukwn&?O$*nfsJ6Wa%;j&av2#m5`={QR{8dUX& z*B4W#-g;A$DwpsBPhcM6=HXbZ?yxw$T>#{+j4BwpPz@{h>ey#tTo7rr_WJ~-$|eZn98 z;>1(m2_LljlijCge;0hWFQI7krL;>q1D3TW|4V0#-^ObqhdT-9*^*Zs zo5VX#@s+~d-J8S{i+U=Co|c@gBm2T8F8JTaL8c}2Ju$Q8o1vtwrqYR*B4IQidvn@w zP1M*hJ&`-~>6f{!BbV`0HSmAV8)KrkWncfDqec1Wy{X|RMn~6uc=h_|Aqpm{Ifii|6$F7{;|l3TN8nQ-9GP)u$FBTfmg3a zjfnlJi~R4m7Db#r@krcTrxJghXl8>hb@Belgf7=t&x{=XW8!)L#J#S_5j8#WmA3?qbX?Vwz_qQ8Xl5PI~z?!8&XF{51e-6>5$_sPrJKo}M z{^;vmdO2&{m{#K&Fxn=U)fe2iW(-tqcBTwgB|GQ-3mo+SWDHVFzi;Ah{@%x_iJuQI zg=IVh+|@X?OTJPB-e;W+6MWA1O@aCI`uBzv-4 z*+1t8b*F=alofSrK^$4Fo6t?ZFP}Jy!1A9yPd@TjMuElq_U-j76fKb z(A7i|!{S01z7U5gCWInW3*^0pP#Eoh2x2GQ6hc-xAhkm+VW)iHV)knzxi`rf53B?q z2Pn@E8y=>xsKCQSWEN{Ll&IFqDK*~t=Tu7ZaB=}#TY+%aW&v*Ml4^xqPDOf`CABf$ z^68Uzy2GSJfien_A*)nC19U_+F-<~P+#`y8y`L}@1}rB9DGS!pr4X*@afw_txe!N| zlt<|T3n^uZj7OJxI1NRFQ=TW~4r>!7nYeb6;hAQGg_@o$;1q}xnwgEFfI2R*hY3$o zR+~DH;jSy1-F&`uu{1@fa!F5W>5HNUXSqOKz=LJJ5Jai+#eTMntfd2RH;xx70lL@Q zDQl&mIf{aPPO0Nzh(Qv!gskWRX04QtFNNTaHudd=OdV)P5HrLv@f^=VZKJYFzy|?V zZkY;LQw4qnEi^jyy9fztPyqp_u2oy*6+Ald5TJ+@pZeEO2!@RM-!qhAN)xBA5M-hq zVnEB=$&Db^0e+|epI$6w>dobZ4zCilui{V_WJ{CqV;z<fmpYIwBFgFcGtpX`k%3UOga{udosbs<%Vd#KmwExO9pl>WgW zX^l9_P>U0Rv%DH=TrU}RI7ZS$ks#yYQrM`6K`}!T5F4s`bO=U+ z6J0^1pvXX97D?-w`eZI1wbBm*J%`>FX}d_X*g*e>Z47^;fOv#U$JYs*J(;LgGPKpk zHo-121CqFe=i@s0I5C3AU!E1jK;S&Mh8*A&5CnzMMGD7c-8r4iW~yW*dqPRcb~Iqd zt(Z_COqZEi+I?cOT1$RB<4T4FW^O!+i2=G`LBq}C-MDo%*A_^$32Ze4B}oPy5f8c? zyqt%`-10TufVDf=S`Jii;zjCxDT_KsX||K#`r=JuK8FZQgup9MP-^j4Up>euiYraW z@6Q3Xl4}*8jn_>Fl$K@3&^6kFAZY^!yN=4j7;_`FgyZ#S8U>>vnO;eEP@)2qWJzDg zi413_l}18od+Rzcv6C0h=wE30A8{qAIm1I7>l%beh)Vr5O0uf*-~| z6iWgLKyvQsG|%#g;W(*01j9&DM;jAm&1f@$z^an?@CYV~C=V4DEc51O-$ZTZy@vW!ipo>w+XI5AvN7>QgXrj{OPeSz?V)Gfio@L;*clzh z20zF9sEp3QgB;blNM2DF7OZgPnxITD?Yl50uwJ6X9X_#|t97UscuX?U=uVhtMcU8d zrbBQa6T;NENX6JGd?HXrdB0Hf^g{=jd<$P5=qAEK7FX+gupBvJoeit-+LD6P2b)hbqxLwWr%z}%_`ohJn%CE|% zGq&pMsf$ZP}-k~T`cSUVA$gD=Z6&LO{~_7>n5^a=Q9B~`ex z3HU%IqEHT*6QtNXcE$Ksh>Omh*|#sLy3^jjHM%9M|G?$kU3aVK zPnh*dxrQM&J)t0VMgJqF#|x(w*4Uqa>+Y*tYmD~_qp!Zvw~GkrJYey^nA)=F#G#4E zk*<9I49ogAbN}@H(*q%o7O6u`^fac+>yJDf7ZNRA4I2)&)f{^=B{BYT@X)k%&(2Lu zxH9%jeqScO?{fdRXt>(kzvubXx%u{=E-T~R$%#e&dri0KOZN&KAypM$D+Bd|uYG%c zKziqZ>%`-IOKr=>D9cr$|0^!hJGdftXLD>{a?-?~mw#>Q_OIUzmI>zVQ!fA7{!@Dg zQ~yv?JlZ&O#Ve;Q-^?3soN3DS|5});AKLcLwAOn}qO1S0&o9)$3;t+qX2Jn{G=g$A zjlIv_%I|l0P2^zRqTT*<$+T|h(E2-KOV;4}4-@343KKUCF7mcmhTq_~?Hk(?Ut<`} z;vV1U{KdbOerw3NZpfQndMsx|P0Otq==_=4zUEhZOXHno#_h~0rRUATl8?Hc8rwH- zTgTQze#@+A`+DZqp&`rj&L1cK$Q<})&lg?%Z$FLQoL01R=)>-=$mcpoe=KZSKT+~w z*H0rK&Y!q2lKj4N_1F+`>%z$LR}Z-F%=_qBDR&awb(M};K6Jh{*qzf7HWJp|a&q9u zbuFR8F=wjxFM1)jYczS!h7Zd7_J5i9^@PZDZ6BK@F6=oV3}*~G<%!l8KFw%(y5UMq zMYD59b@gSvFY0fGiRL@RW7}uGHn84qIx+Zo)76qw$LB^po$Oq_**I9_o@g3kUU(^? z#y%A3xKNU~Wn?6A+pGRt{;NqZbUxoc@{7Ob#JwlISAUxLh%9o9!K>apwujjE{YcQ& zn#VTJzg+K+jIZJQ7kv8ZOR0O`+c%QaUGw%p>7tg{;mn^}dhRZKIrseaMd#}?FXcWu zQ1^=I%*fbNSN9A>u3gcwUAT2`S*v%V6Up5Dh3)Fy3+2}zj7aXEdA-}L`xO73G1;6Ns~gU0>g*^^XB=nHdu?r(Qr zr}aM%hnc?o7o!4)`!@-~&2CA^XjwWCE3^O!0?VF1OkhJh^MTHolu!L79)Lh@v%kZ* z;>PdcK^?z`L!2oLLpVL0KWU(jot$hixxD)OEo^*e{v=v~y#^;mSAD)X=h02R-+uuz z5>Q7~BA|z=#P&&`!UJUaXTs7wlkfc2t10hQ^_MR_pR(;}-{};*?5MGQY=o@Uw|dX_{_0Dd>nv7tEK25#w8CPgAX3bhCufLNGt?`LTUwi9gb39~ znJO1-5s_AyuS5m$%kFPcisQkCz2zT)3meN}%0$~`3!sTKu|O&?Y~_B#vPHaX7O@*b zR^bqJv5u@tN0#gW&_XC-3zFL6AdVx4DlO(7vY`PM`ZEZoj1=cE0i6OJfn6xYF)~93 z(;f>z<>JGjm+B^#5ZCw;Te-)IHm^laHs)qC2$*qK0+Y1%tlwe#8XI9 zDDmJDCRXxdF-=^&i@+oZMJcQbCRlDAexMnj8bIktGj|di`nVYyeMle(kq}kk!MOnK zu_{<`Fq#PHI;&kqfsUfUV-iayTcP~>V?7{j7G=O7iEez3}sq>U( zi5`7BagfH#8Yz%nq>!`~SAFz$DnQ)?ny7Y`3T>pU8|2t#D!!+IE5=1|Rw$+)Q$mzi zD9_YV)Z~*O?+^6N5(4wkFwre3ft9+_x|DQH45fiY&{-G~z$TH@k|th?sG}n|O$;c( z-=y+!TFO(x@=N)-Nn~fZNR=M1eprUKFl^4E2Z;#OEMPhW{*DMZSS8I#kj(>H5cm~2 zXt<&QXdPsJYCLe4=Os<>f~5T-$QW`OE0QVeZs>sH@8We-xr~NB$d?HsgX>tP!i9+y zC{iZ$#(+%2j9M9kZb`BfiI&L<2kut9QoGfv$>XCbs5CNk2dMx|vNJ;8ex8LMxj^Bl zzFSgCyGcp;mZT{OEu|CTN(l5L>>?%Jkg;BkSvu?SD*(eGmHx{p&f%5QeK?1U1{Yy&r?7*o zF_#jGdVG*Gi^fA6I)&IlId}}ksdVu3x)$rL$xM3;%3Nc7YG5n4%b_P7VS$7wo3@>a z?Ht+FALNE09@BS1rhh*Of`|k!c7r3Z6@^L#hDIQdZQeEdvM55+Q^#Q#{~nnx;j9tOYwz z9-T+gq`V~SAY(?&lz1Iq1eiwQMYdLJkmQgpnygx7L|aHV>;Npc-e`voL7^^nntNW@yc)8GbPv z(IKYyJ^Kwvdw3*BK(1xMSP6yXe!LMkhS4!fe_5O8}?BCOPP6;;gMP>2%<@YZ>h zN;F+Z@f&5F)!0x;0^%n=?19Ru31mIh0j`l!GzCt2{dT^XgPS~J?LMu1_tlY`M4phaUA ziPI(eETsz}%d`T}Z-Qv37Yrzybgj=myui)iexm% z6!5#`=-v+zP7N&PGyygGe!G`qC7IU3^sl@uFMbrR=&PvW7g z6r%)_9LbPS2iMB!M^vV)N6g_2WgG0F*`XCT zO^sZ2PH9uuwvOwVXOgpOReoJPt(&a1{9|B9+%L4$Lq8q6@gVbaFZb`F5}OM`HY(j&^lR*P^sJ) zj#4{TlrFas@0JI)2PZU_DLXh2m?24?1-S6s2x%pN0x6AbkpHK zkR;sLxO*!}H7d!R1!+A>|;4d8x`}_7sVs<5)lsj`=M+WRv;*5SOdlBy>hGi^Oywlk6MC|rI zAGmp};%KC^-v2iF^5wA8hTTNv2zSF|Yh?zNO`it8VtGowAnlxU;9UPd)blo{Yp^0G zuUogZRe#_M2xbyMl?~51a zCw?)YLi>AYp6gc3tP}H}&vp0BocVcKOY>l`@lRiUe&*KB!MLoJpZ)d9V+Jrr9Qvlt zjTJ@Ru@ri1wGbP)BnY)ux06orCiY$81l0T8&$Fv zz4^J%gg;O2t?xSDA5$38nEUvT)yKp;!K&${JA25k3tK|&K7TxRY&Vgx>=ZTP_{wSO zKQvsl)L(crF4{>?>1-0;Xs$k2^JRYzS@ejbf9s4#R-`uGd0hWQ$VXe| zryrR0%X`C3!Kak5Tn-G!Q zw&s;%-}d)=P0Rj1IPycx#AIC`UcUa(qDRNcKOZVH;)cfvMq_fu3qr-$797wsgZ-hD@`-|RtBd&)${hy+8s5K6Z`hBPmZR;lRpVg z{L?ouxOs~+2qaFA3t`KOEW-n{TVCn=^`?m$zl8mOg^cIg?q!uN`r7H}70)V*>T)0Z zan%@g!}ORxKBmj-y6{Sv6CZ8e)b-apM}}XnJFx$!;K2_@w{dr|zjQU;eP>=``WU_^ z)4T2QzV-vA&+eX`b?Z;Z3;ZDFI@AAz*V*#ytK*};ES75ymz*1Z(+{}e>HSdIr?uGr zUD@x6-?{m!;)g51baWR`29p0jx+S0$dMDY3|LB(f2m3I&*(9wnse*!;!o6?UGJS7x z_h$-^tN*U;X9)i~UWvPEcys6^tuQ`U0Ett@rwe>P|Jbv19Cx?CKw)ljasR_zv~-|y zl2@1{2)<^4QZO~cl!KrflVgP^HBKFq8mH64nb0?P+Snh@P7GdN2H$kRSRlfqY zIu!V)Q*t3fHPo~Y_G_HnZ^q<)No4>GQp#Ea$Jw$L&_<0e_jQ4$YH8Obu>i{j91Iy{ z#@sIkUIRe!PPnOKJQ<4oVOmK{8;5Dc5-f2){e5)#*@@@V^=EOAIsKH6amo7W`XI1< z6I*fgNwf&NZ^_8iWAWG}X40|YBlOT}4C)By$_g-HA$FUPU^p6xn=s6Q)mcCZ#Sx2$ z&0xvM7AJ=kvrkKtSxjgqM1Mk4lZ!HRUjK3D3zAn2q}`$Hd_@j|RBoe-H&AW@EEFQA zNZ(5GB?`J%M57rslKB|ROUtJQ=wh!(5?WQqDVZcWM}Tl2KBkyRItL*fpG(sgIhrMc zx%i$xX@=!!hZKxyLJE@vZYRcMKnYui6)p%s0e#m?{YaPN_E9p(9lft5Xo#EMF#6EgvQ#q5ebP5h+mIc`_c@C~F;P z7*dm+zDXvNRo6nC@1(hSWuSsLPc37Y&#wAB2-Le*L) za$*;cO8on0Qs^8yT~o>5z){>P6?0MvtD&v3A5uhvBV?2nrsV{nB( zM5&8RnJ$CZLhX-9t2D743=*U9Ku}ZsgIVA@7qAE(^f-KSoM4qgHSrxO4shNu?aE>n zG#=)N<3_DPY~aEFhX%`9h!QS?;bN3#uBPy!n9NnDAf7T!a;ffRiLHz2V|k+V0X$0V zm1%9@QQFKkM*`_}EK7Akn=~a&vlus6IFK_T({qd!R!m>WR(f`Lk3iAThLGA_|C|?R-z?s)6BH4O<~EKcE8A_`Q&_2-*BJ^_!CJ^q zgQTq>J~Z1QVigvtnh%Oc_T&==u7EA!H)2yfm&A4m7#-eyeFr0}2_ZC~OF=!=;Oi(DoW7NQ0I2I?;bmhE8 zn3vo@r4jq!bF3C3a>Ve+3z0@%vtmt9hmqy@oX^5llbx(P*(gxz1LKyjV&E@XXD=+hVLr%73R}t4`_V~JtzO>j7 zCWyh()-fF>=H%*=#+-JD#A{~~$vshyKgElc5dXDen!cnr8I$e0ke#U=C+SD|MEM3^ z$XAThr!P?F2^jdMUC2Jh$Szr5V5xa~IJP=bd6cIz#2)O5%NUd$Xu%xBrjF!{QYRZL zUS|p2MWIe?Btox?c)ehKCc9HnmMB5ZSWpI}JVff+I;abEgwH4|`N0lBGo6-$RL?5i(NteW9` zw(sSn9Y8&7nQ^P4?=9a;yTc8C42)BsxKeH3h7JCO{PW4*dIASBq*HtQ_O0sLdp9Gt z>#0q0bLV1u;h|gVBS+`2`AdGTYjgH+I{$TdR&l}jnT&0ho_Xe8bA2x7KlJ*<&qLL_ zoqI=r{?2LZ3BKv|7yMEr4#YikfExKA=?CM=_ku@0nCYzU?-4%P((?L|V=K-kM4nQv zJTg}Ac2>Ul!tTzR?E}Jhx4H&hkC~{k-4@d;eM=XG$)=V4U(cEN-oNODQ;kRJ7M@KA zOr3dU@5p;eMX5hz_K;*>=2sKn4u-4@m!0VmcX>YkW_s}#!+T~}oUMMFc!~nBu)Q@^ z`KD+n^R1U&Zh5(H+sBD(zbbhC=K=ohqKUi5zPb9*oy9TEZw92E@BiNQ{>{55`rmtb z;_;WE@W1rl-n-9zQgdhI{iJQ@fe4sZzJ6NK55vW;9Iy?(IQ$O^luP13SNXkF{;s0F z{uf$CCbIW!KYFTaptAk{Q1v!oQ51Ur_wKlPZ{6Mhvokv^!-}vo%q{~iFT1WvX0bCn z3$whqupm-du!xGOA!tf3=VoUZU_cZhG%`y?EbLgOnc6v>1VqEsP@;~f(~FRql_z3B zL`8jmbl?Byxt{CN(F++|c9)so%lGsB{`b*^H7`Y0p1*}{kJw&0bL6X?2Y-6cEv){NeM`QWO%xjRnZ{-q@0oqHu6AABBN+7c|y`<{IMiI=!r=_%hX zFBre|@^=T%-Z3~hgyZ=PL z3)|Ir_pyOp8z+jtECo?L7G2B>j)b72h1W|0bT`fyeE&-Fg*I$h>R6+4!#wnYY}+)BNV#;SX*dPBFoCh?$)4Nbh=Ey!OM%iP3)oqQDM=25G8cFhavHjE>g> zPYozFECl{g2DJxIMTA}jAre3l5mQjaQ~|&A{J|+G0uBru0E&nJC}O+;pa_5|;4lS6 zz+v&{k-wDruLJnq02-uq4GG-j{PVC9_+u|%9Q^rS=+DEMXR2R-!<)aAHoe^I%@OI4UTRTEQHX#|n^VDFG7JbltS;Xm zt`YY_J0QAq>a5vfrhU;hE?ea12vcIEKU#up!Hr%rOpW~?$mA|K)S0upECwNz10-T< zvw)Mle`^hN6c_*zRoOI_Nx@>F({u760`7)QYdIlE5`buP3S6yVjy;pY5yI7_y{uwK{2Sh-#l{^o+vo=%*!^x{rlK@9nr)h@Cmrw~!?IIx$xX*@(ostBe; zl1WuGUXX9AcE;pkX%FP9taOu%natRLpmYoDZrRc*i6|#XPH87&>|hMY*)+)-!fGsX zzM;xPFN%e&Hm~IaAV=V;NJL;&<#h}~tM+VOLT{A~Y!Rtb!&sb%Y9@68!?lvClsyzy z^+1#sg?a%r;QM%O%4O-miv`$Rd~;TFw@ zgjSyLaEKiQ-nC4X)Whcrppi*rY81Sxh3fmai)!Ux>-7P|Xo3nb7OB#5ic_5^2%Qqj z7c!Rx(l4pNV@|b}k_C-fqjDM$jK^Y005Xv}fGAqQsa>A=?=Ma&7bFn1fj+xl6K|~J zr(>NMBPH>K_zW-tl!gdAV5oO65Rl4kGG+-}C&hE%I5-3U9fsUE%z0^%Z|7H&kj-XX z%5l^}qE3q^%$y!_ngwe~9Zsb5QcT!%7fzNjdss2m5Or9%XmrqcEd+zjVXD>cHiAhf zo5Bu<6pQHlL+G?<)ZWP|_|HcezKrgUr%4ZbmBC1|#)tJNjiO>Vn%2{|`D0aE2+*ii ztNF`}NNE=6fJP_d45afaa)zFiIRV_YvNg9*%&Vp>R-9~bZ~#6qZ{qOjs9J&#l1PJ;;4BYU_8l5q&wLT1g1u8h@8 zmq3FxhC3>@mXDVkg1_GLfRu)oH=95=mqP7vj|DdMO_I zOByytpbdl7l&ISI=&dr)E075OMgtPsL|$+q9v>Qpcxj)QN*M$I7bHP0;Z(CER+q+K;uSruI25bK zbcsH4pp|D?C*9mG>osYE96WX%r|qPESX8t{j3$>M*9n)1d~sL!LyIV% z!^yIEiY7zNyHE0+E*gw|*--EdGNVSH(H3Qw++`MhF74)n3?D~%dSXNHGBj5|(-KD) zFV&FH=uvzpuH!3US>V=6F7jaR36Rpw3%AODWix0 zU}pki<^4>`N}6(N1Fe$Ih$AstGlKoJ;p0n6&u93|tA5%`a^=|i{(S6F z`k+{jy;zh#qsor228@cd6j5#;MMFdeOb29UJE%=9J*2=KuM>Om&T28`w!p|$8~BN! zo-WRPMvmgC^-V{4hVL=B@_EB0US7lsd^p>L^AehxhnafN^esgNgZTnq%5_Lj_k{1P zW^!Qyw}na-T+D-#1VFU*Ik}L9jbg?bn&q7ioKF?uSErDrY+*;ale}Xdfrp@Knog#W z747D)+I?k{8}sSMd3HrTL@Mx0Q##&j{-0rYn`>-<=tcTo);<-@7j6Rs#8Sb?KvrJ{*zS z&K3{*2bJI!Nggf=_GI*V{(bTUad^?7aNF^5qd5BX6W>2IxNzWHFy89zo@l|}#CO~Z z3oj){y3@R^$At~niF0#Le(k%7qfgEDCC~%Z2&P~Bd};WAZS1O{l)Pgwct-yGRAtvF zPDkQnjOWxp-9v`Ehf-Iu8P{GM{hrwMA!O;b*=EFfHVu7ByuSWj`~OZOMQ(w%G_ z+xBHa-kq|KPJA?acSot~4&7GyP4L$1Cqi$LODmhd-eHd`@cp{<>y%qp(pIGPt+}7l zTgyZ%jn^mR51jqbd*9sos>Ftha=HM@r&utl&PT+UGS@6!!uG{pHzOy5( z`*-!y5dWY}$mJLEjh{u(JER{BNTrQ0yPe z9E#D8^~`@Fc#7a7e|sW*`A#wP(~Knh=2OrW7^YH{e?mQZ4ULb?%Y4)B20G!15lCtK z?akR`E5892A4~x4J?9U)zJgB$;Ng zdk?y{Pmv6NVHY@l&X~lq8zF_6ojNQ%Gj3SCsiZXNLnTDzdgWurB z1bU*kucb`dr!+y>nW@9z86c`Rl~g7jgLBqxVhXO0b}_@&b%PV{z)6kJJ4`_g>*~P= zcHSfdTY*WYA;I=t!|lAE8}i5g;iQPA2&+IN}!2^-~{bRlM@S zAk1@B0j!vVRX7_dcd>PF`L@VO*cPmoEo8Ftq&HW@hNzHH^;}Q7rg`HJv#}|@w3fn7TW|OSf4E9JzT6S zrowtrQ#0A(nvRm91u<(GvmfqmQ;sv;yuhe7XRuI(f=Kq0y{ARGp4HNjEzH$`i9N5V zxN7nU$`IOiqo{Sh2+lH?38`5P>K0LeB?2a^+D*9(4Bl9EsN}@ii$qh0E(s6IP_)$} ze-C#qqa>BVPVmt#oyLr#niy6iu<_JZ3e%BLQ!fU76w^2z1Rp^7C=LUkL0pB^LPr$U zjNz^wc1V-r4c&WaQrJq88IM8gJ%u{!)x>4c5tTp$g1ZMs@O$X=mQYGzA_%mhwF!)< z_Rv&TPoY?AgN;36z%-&Pn~FK8!PeWmFuXC}Zb#kO;a)tSVT?xV2m}vXCa$6IKRX4A z#U-c#agODjT9p$+fTP%)fe=yP?aHdsn&nQoC!;i3D8i5szPbt{0{H^1>STN|YSrWD zZY&E{O2CI;paiIq)lLT&P{*oaSY4uWGVHaL|0BVoOtPJKN{A4Ps&}K3Nvleu?Y>Sn zEV%j3Zt1W^z?4OFnvZKT2y!>$WYtuxB!Lg?W&#*Zs#H=_u(RrBlEB^NHK~WesvWe| zkG1GnrMW6%1;*3Z`+Prb7pv?ZFD}^})MDwM9Vk*Y;ev^tB<(6p*iG%= zSz%9iV35=lscM+7<;Q;|+Esgil16y2&Yev)>w0O5Ae~iEgJ-j|Fq$Hv+-5Rqc=o$! zP^76AsO!*ftB$&uS%m8HB@;KvgG@c zS_gRu{9H|wO2wu;KqS(T?l%~0Q-+xJERxnO z>yOAnyAoa_hytDqG2L4BeOVb)v^AOxB?5Q6^w{X5AnZC4bWUH-2O!)zl}2^ zLL4T`5f#KT38}-Tp*<9&7g&qI97xws@#^}+INd?6l@T|x9m3SJs(5FvT_uJOf!@v= zqo$>dGVB(PM#ns=S9vayq`yeONLnxlPyQ`2WhIh=*!1lpy0s;hGC@ckYbF&=O?*l- zF=Z@5Xw_2_1A;Bh!gafDUnjh0NCz&kT9QTp(O@IOx*?Re4Hwr z1Q{J90f-3gC1*wBbJ`89Sj{*RC{X+!{9-=oB zWK%6IQ!+=Jv;u%C4H^+HJrWlHxF4}<=>SneI@M7iJ;EfAxf#^P2hrW4h&dmKL!o6O zACy`A1GTxAY=4)9OkAI}jWJ5iG`AbjYqGWmg3iL^g@(}b$3>nNwhlQGK%=u#4{p{y z*)e5YIGPQzR?llnQ&w1~81RuV_{peCj$jSd5|XnQUzE*1Ey69Sx3Op&7SqD4P8)Z8 zKyxW}PM@#n2liAvQSRz*zC@SFPf}*jXWXeT-Wu51FUxtyH>cHFeQ#U!Hfi>fsNdu? zMe(O3aF?j=!~35xn44)9Gy9kt^@=2OQLDa$d#@pxy+tZf-FN~e4B9@TeqmX|KzK8` zhPs1-v#g~Rn_bb(UH#6oa3iykIAVN&25PKPSwvYyiR+G~b^Zp6CYE8#W1D)S(HOD` z$1}4NWg_aLNaj`_w)84y;bk-rmj9bYRns>0e)3SwH0QUxzw13bvWiUWC1!}WF8}LY zx@JMV|4GWI{>c+Rt}DB@gF1ia;E`a(E61c0uYdQ>WCQjRmOuqvo;QSp&0|Fg@5X*B z3^$Ff-ru-?^z~=n|}-@*mkv!)Y_g# zkFkBtw_lA8eWCC8%gdj$%zEUd-h=Js%Wt=h&fc~3{%4ek{paoP);9MI+--jD??B;Bd}99WP|kzY%!@zUGOO0rIQT2O zipdxnns~JO&FJ^)cCr0SUNm1EytT#l+SQ?nw;YX|NAlA)OIxDn{r2uVj?y`!l{s*PIio=6_G8spWSinZ(uMaJEEz1Z#8ZYru+X~)Ym-uV%+xwUwQ6ReZxm@pGz)y zV{BXSscqk(ku#4q-Cuk-VZ+Mw%HhA^zp{5m!@ZNYH@^O_oI7pDx)%3;D}LL&`HjVw zQd@VGe7&Pf`1vNCf|*|YmIEio?bJ2v7))6`j))uql)?paYC&7=k2(TO7YGC$EqFa zRSDd+`N8d<+{Y$P*k0|9>~4vFCzIdo(L@X6S=@xeEv+0fH7<a}}cEKk%%=`3Qg?)gSoNxYj*Iw8oG!>s2Y52dwqZ~Q1;i5SB z+Y5m5o&$*z_$==Kcz$!w-lkuExEMcYc*&T33TVcrfM(2p-d~E2D`no}#}qJ0f<9nA z^Z}>rp{J+3mF|xGzurpE!z24ca`gY{j_!f(sNxvtjy8hs=sM_*DzA_H7`_YE2zL)n ztsiDLB;UB!Ju%}{A2$ImuyFYK%P|3 z8Uw%T{w8 zg2Cj>P8+e~FnZU7)s#SBo5ZRuKiWhNaj7#!J1XNTgugrM3DOP1qWw{qVi7t39SB!K z=30beNuJq7kOB@Vy71W~H(h7` z42501;O};Zg)B#PSchb8rF00xi?l)L4@WEyHwjS>axr*GNQh(PLd~=YNkyfJU3E@O zQ|NYb+7N+dU^r^jii#X)qI7$OeI$|+uC3G7XS0gwfs?HwrlOq!G*HD-B>8Zm6d~Zd znYCa~C2@SBXrNGkH%L^9*bKz4N8~Ivg+Nk4V{1|yz_l_&qcZ?f!L&bu@VaSWwuxBn zI0^HvJ*>$A4v21q#sZi2&o5rh_FE|rI}|nzi?ek(5tmG%c^F8QS{5ph#%{K*(%J{Rq5cl=48c<* z)sw~P$Iv7}r-Ee+ZW7B> zvpgLoO}C<}$ttV|8mL&_LFp(P-65z%wnwLxFN<=oaJhWmj+sj8H621z7bvX@0aegy zibVxYwuS4#SQxN6X^iJ`#kF{k9-vw)G1S&1Z7teBSDhByBE;Y79$1Sooqe!BkQfPgr*vYfze;fb~GYr+C{ zhl7>$E#g!ka76A+QNpW*?To4!bMD`S*9(kLtxZ?nm$h|7s{*0U!o$vv1{1*Vk635& zTUjVjRr$1^j^UaqwAjfIsKkpJax;t5QLTKNsg2O# z5TIf3HB=26lcFX}jD|320$P<~0)7cRwQ96R7!&M96<*cK!a7RWjTScGrgJ~P5>`eH zu&m^eVzyJTg~6^;ogt%_84MQrV*9mrB9}G~SVKPJtgYSOuYPdp75Xrj zPm@uag;bhkY)>+>>Uh=_q}k16Bhl`=j5$uFjrI^`yLh^lnkCPAE3B1TJx0~+?v6Oc z)MDWr%r5r+)okDXNU;*y5n8jQZB~s!F&RpKTCZHaU8rv1*^CjKlb%AO2~$Z2pV^#~ zgVFCxu$Aei5}3u7PpO3z$;{H5gE`n{I)xt~%SnUJNP8ZRV*iN~-5eFobYl9vn$=}h zyxdEpGix%ksZD&ZNMi|laU{c)xRa*!&$AD8^ELT$3f`UZZr7O>NjQ{|%Y6TBMv!zZ zq@OWl^jlV2PQ!w3JZ^l|j4ywq4zpvVZn{QlG#$t9!5Um4y$W{-?y z4p&d4J?p)3bX)Lb&91z!lY;5igxE=RVsmO^>c}_7uP^fJpBzw<2BJP{$bZLs=uq=9 z`O-VNa%qR7KP)#lnVX%PK<84{@|5u*F2O%uJ~zQLL17WL8L6Rq!v`D2iIQ()a-SRf zWW%HDcKPqTLZ&u6llGXh>(TPl!7IMVoF7-zPqbr8g8t7>*zUBuyd5vi9|-f|Ug@R! zqmLeY`gZla6?F;n$c+Bv$dUH^()UK5n%7u+%hB?QC2n!#v2TQ5SB?zqJj&SF^(2Bn+2gE2QGy`^v)d;-H(2D0ev^)vbkFShK1&VbzH1K7xm>GHGjMA-i8lKzaRbLnO*7ko~}#yc;t(;mu@9*xShMLbjC>6fdtnrx@ARU z!u^Tz6MtWRzwAy#OlHh3?w^%+;$JV=yivUSx5IZgMITQ-Fn+#&*B29(zS75or<8PQ z&0D2+My}K)eELSlF#qy1le|zjk1v@ZSy`feP(ZFIq3N^gxE@kU<% z+l-028E-z7+&B?7zH970c6``-X!{*QO(}N&Rr2$X54vA&SikUPenG~mV1BE&V{reC zuj)5<*LG}4OSpDv$<9@4?Wb741`G~koFC*p=P5vk+qc*~Fv!o2JYXXM_62r$rabS{ zN5#24e^mPm2pHsd`MdrXMeu+zP>!BKypLQfr7=8Gj2BKOd2o3Va8}5dT;KRePK60TzobO&TSa|F`}Sh z^d_JJBX0vLQ1C09R|ypHfr9=?KDC%<=C`pyQ zVAu)P4vf2mBUQBgYCAaMi8^I!BOqqg2_axV3Pdn;2%$}{%Ha+HuhLY>Q~z2mXZI3+ zoF_Y)m3mHAgk~k4mn_pQ(_IvoOIm0M??o*CVHH@4d>yw;qgYS3LZhkT5-uMma&pN4 zm}$or8@l*fIs;q|@y&S+J~~A^lUJQ00PA5SU2RR=Jd9xB0j#D(G690jvY zl8mo*Vo`(KgGL`_(Rh%m{3=hj$Yk@nXZe~xar9cI$KwR=pfWliHxx;$aiWWt6M0pA zi@2Lu{n!%?!hwN`1 zPCdvk1XnnFU6Zs>#w0yN&qgr6V+yA14tYvSv0G(|2@np6;$C6!{+5YsW-GN*OM^1E z8Xh_0L^5Ef9>6qUFl1KIHEJsREsAW0+l!Xe@q~;lWKv0-2+;~js7PX$IX#6Eb{blR z*e~B&gXJxcEr~Q?VRU0*v?$^@Owy05vgFtm;9EB{Gzr@E48&fmISZ8_XX`j{CEBo zEju+3#^eMyC&`4<8qT9tU<55(#)$OkRN;_QOG7!DqM+&!EtXXWCX_r7009KbSyfiE z(uqa==TunobX9I0F2m~wzLZ;85Xd9pYQIy&Gt`VrUC%NS5+^vbg(wZwHX;JW9H_qx z5^v&!cAnubqb)I&zKp@QVu==trb8C!tJkv@wn&I^%zmsm0lm$M=~T9?U&_5_D9$8w z+IS|cEG8+3ndc#Unc^+PWwafS<%B?WfC_v?4j);GVxHrkks!D3ux58*pi?N33Wz9f^UJt~Qj@73Jo&*wM3xPk@G&~Wai|6MG`_5+%$fjRgt>cJ zzgYu30llEe3gWwPcxKY2I2@+^;jU}8>97^DvmVG{c@UJs4xe(8!eeI}Dp)jotMU4vVUde<8?+y&afO6+0pk>q)GA(=A>=}rQHbgU070EeyoCV! zU$u^Z0v03aBCgl2iV`^mj3xtUE(zScT8J8*WmFXs-~wN-3cwCPr)WbSvgB5)oP2L{ zidxjEDVF9@5QoStK{AObM4vdd76&u~BC(Yg!&?9Wo>oPxKX!Ckk@oCrbu_6{Z=;|Y z5SU(kGkM0>gQ{5BU4aeCS{;jN-N-4mOtMZ#uc3%_UXrq_FoO{`R)#hkKra|0Umj2! zQK^d%Ovv!d|HY>aipBT=cvmW1TcDS9qTMbooE}p$Rj&44uIfQkOI=mFLe-ZzJOV^1 zIMsLnnW5}fa4B5U*7sU=2#O*qs0Np|((jAfdd1fK&3v1{l&CffS$LagJ!7L`O+I1MQjW!6gsg@o;@>3bPF1SU^7XZ z&Znqi{Cw<4-D!LwfzfHApN!^>`BBxUC2-W|X*NC9sWy`ux{k$S$3Qy9DZf;urOt4Q;TKiKG)z#V61H)K*P^;u8dEq@@a()h+7eae6m^WCPC&KJA~X@B_t2~kb~%=SzSjlVuLW@f1yck_M(al@cv_LoH#;Uer zq0B10KG*TSbR>*zBXEvjsoiK6ztHSHr(D2UX``$uWIFNB|MAM73P}^%<`Rw5U@}10 z%FC57Ox>x(^jbtS60m|N4>+jS7s;VAz&m1x_zVvcHuHmA1*h6gn2_aK=N0K^Hpu}S zhIDe6o(5ahYrruSf~Qs|XZ243O9X&Sx}t`K#BL0bjTtb5Pzq&PaT2Ik>RlWj%QaWj5`P`I3K-iNVY9sL4{r+FH4tJUaRG< zH4#309J}YB?HdIP7qE45Qc7wA8{!k4ng}^Urdt@^|q6I+RyYqnO|76S=vm+b;tE=rdG(Jn8w**LKjuGDVv;?zbVW- z$Xvo&!6#*_(r)}2E$Po)Czaug9Fg3JTt2s$plhfS-h1}3$~Xw8G;a3SZ9;3qR$y^u z9(A;A$tPbWBk)a!L#5gVUN-0XHdCAFUQCW1pmV4r8razzCt}#B~Y=4P+oeCUgK8*6Q^ABS`qtqcg7914uM%#@i=Fh8% z3F6r&-X4A4n2vt(!@EDeT~SF*NNth##$$i%n?JVZ_^hNQV~_j4uQ@LL@Y2|plVBmg z;+{m6Cf!|0R94S^D$jVAcTQ|eipaUj-1VJ#RUgmnsvrG#Qe<#L)IXQp9(^(L@tfE0 zm8Nd6{>Y5T&9hc`Q?7nJ|3=)pgE6=4RA_s0%MBxz;2K>-RNlWCyKL86Bh80PSKXFs zl8+wy>)+;%e0gU$`zWI=IC^jA;zs*du@gt%^2zBsn3{&?yd z^Z3%Ub+_fEXRm#lBBYJ;g9Vw-b0ci;@U4-0Vsm;VJvs6CaPN(4PrWKN_Do>yvmQ;L z#)bVe_B5Uy-G6JBD_BBqo1}j{QTfy9@zqyKheu^BFd3Xz5PNgGfll5RT=&#L+ql;_ zZ(s6(BR{_RPS>t06FFPb!wNo|u(!mW?rRA4yqnzfH9r1a&(hK2;)P=c^Cok< z3SPLOEK0a`C$fIm-*0^O)WK`Fp8V~^E0ceHY1j2ThW1%|lN)c=H9fw+wyICM_b9u# z`TV}h)O(euhD&c=&+B{kZ-$9x?DKN(>icsKegZe<1kXoD?l|bk@9rCyHCFuhnu%qe^X|s-@zQrH-yQjBLFC7GjVF&aL>?G9 zd1ko$Uiy}TZIf?0-fWMnStFGS!IKB#PaRA<$~PB#Q?BHVFB>X|yjlHBBy-DHzw4tL zXP-Lp+nwa!cD;IU#WmE?0WL>%_}c@ zfBPE-k9&*nx1+0mXxud|+7$;)%0}^Z%e4pq)4{N@I}+x(omjVCz{R z8?Lh@=?Ni|f2F-43tAIG9)Hstl4tcUSiE@(f;jaeTX5ik$lqSDR{#Y8VGrd!U|u@4 z!1yTblZbxIaGiNI4(Nu@UxWr|DimUNS;@Kfd9`&F_AC69$?9J5@ra%A-(CD)dsP-z z67yZ)v5Jm0l=c0=G(UA_Dt`f15)q4grYu&c$cCPYjZ}rRVUUR@Pf_i`99YKcCzv01UA?w-Zl)v zhH&3H__3Qxm$><^eb-KSf9`4+e74MUZPke9f1FuMT@%LMVb^hNa=tuk@Yg-1?Boyo z@MFqaRLKF0RS@39V<98#4yY*bD$d4)C(YlY--B<{&VjZBELhi~+E6qU3SuFfac46g zAf=g*syQ4XXF5`+oQz`Q+98h1nmym<>Rbu49~w;F(_6019On!h%~0ubz*o0T#WC7NL>H7aSBY zy^l!ig1IzXw^WEiq#QDd>MysscNXcB6DNaT;GoYQ5q z$k9;CM^%-lX`;%+d|K7cM!iE=kf<-@K?Z5yG`eQ15O|6O66=e)c(wt5>R7k6KEKtIaj|YUN1`3Zern5pYnA z9h#~%w2M^*z^Ye8@;Y^uM#U&jM5q>!B_Mo)=NLoT&k%-Hb#mYbFX+@*Jccpvlj?eP z7`So@1dhNfJ2N-OtCr75YO|WswFnuYZ%ULJ)Kfezs7N4pK&aA^at-nxCMSYE0tFY+ zPA*Fdh!(Y~s}rvQIdh0sW!47zW2V>5!5p?2nIAK-=}aTqOl7c#xqe0y?!)Ua4Qkk) z5n>l+H*riYJEJIFa6fV+p+}m{r&0r;1GI|!EWZj!nc@`qx`htIL}s%(HNB_W>Oh`I!k0zriUcaPDvv* z3?==aM7)|EA~pOBnh&c|(;f%ooJ)!>1k7VZJc|_L@f6nray1eo_0V_~;`Gq1OnaD= zEgm8GIVD)M42c`lL#1%P=wRIH1VWuf*R*1sS-bObzd%zYs1IGVUSn2+!I+9i(Rc_W zFD6a-QZ{dwV1Jl)QzRT0Hg-RgCuU6SumU=e*lt1u z*<^<{T9YGTK0d^TZRJ8yU9Ez>MVWjdZcPUo(4et)1``t@ivg7Vr~}g>b2I`UHAQ7G zk_ud&A=k48M>5u1rSE1By}?ITB&(cGiM27 zv?dwsyb#*dl9Zx>tQ>eaxPVDQfF}{yHH9Hr0-AyFf@G@GWELlU$|5v)ehDgyG9eiv zcttQ_Kx-O35fO~mgl8Rk|5DWfIWIMeZpFz!_;Wg8-N&E#?DoHW5VM2;Jom|*( zQpn$7C0EWdvu(6nI)i0ORv&%74P7MpS=6GTa(5PY?PJ55sT7+%k#_oIx{o@9Ge6|` zzKDbYL-ZnlI+=yVSbF_bgn2Q?UgpvD^cc^xS>dSy7=U6K^dSYqDG?pNcNMbiEl+yD z)Bv^M6oMJp>Nj>a&R?GYn?(`+YI)C9?wA^@f?EHsdI!y(V24= zHL>DMH#(D?9c(COG3-(NAU~8cRx;oyb&RiA9vO9<%X1`4!P1mc%hip)z1$)d{AIA{ zV)oBT6GsnK#(XsJQ|@}K$?P>>eg5OBjKRz?b;h?T)~!mHP(xrzn9UZM_rVIo z$SYrb{>2Px`FQ*2qbJJa>2&-2pIn9;blHsa3;FNm>v`ipj+Mq;_ulDgO?dVmZ>)bK z|KN(}t--KTx{@DXy436Yz>QyQ3TCj$#p5dmN)yJiKS@}*Ztj@5Ia#<}Rr|?@rIml* zI1tip_U0W~are`AKJQDeyVLi?M}c7@Z)b*2jd_X-4EL@MtonE9np@}Y^{ospymauuGV`Zb69yjp_OYRY<>M=&B633M zkYG%D!iMps#mUKci!I(~e|81!SZUhrx2qE>?i?O@YFR;Ef9{a|sC)e8k^5`zUwSnm z?B%C!>wS@i@gjF}%J|aRkcZyV<`r%o9qMblF>x;;sB;eU+#mwEHXt3NFWxe;Af zxp92`#sbGk*DJ|0Kh6m*+fYz&dvJTQYs3La!w~mF=tg|R>@SG8myyxeGPcZJ@XWn| zFH4`h_04JTaO*P%t=IRB2=Oag?*I9}=AL5T&iNxP?kCVVoq{6z%U`Ad>G|&4r;J48 zZ#FPN1)}*IuEPFf%ggg`r2HXS>hgc;fHvY?=ne`F919;Ed2;^XaLA}XBX(k)5L02l z!42;HfPdLIh(A96IsbX`^YT|EZ!CP-7hOYBDRgDn>Y9v-b?0PgW_k{~ntT4jLtex6 z+5OoQSn8*~1QcunX0zwX(z34>z(ay4w~BvQM?ZbM;7G9AzIeRy*>(QA`{sfjY;^m) zeN*v>c3}u7eKy4`{MKEmG6u!i!EJU#@@ba2$cbjkS8|C z^Qse4C-v;GYf|rmjEC9muY;x8V?=pr(zYaT(zc3%juAG=TQb6iy$2_~X8>6pgw5>> z+ItR)lAD`7o`DbKsmfc2|O5BFr{G9NV^$V5yzS2 zhazQ|^3li|adTHe`(QSpXO>;kEtMFIlw z$015>!%*=;xH=Mc;9>)8Tf_QJ{Z|M-UDt#ec(e&)Er|1h+>|28gIJMbUQDsEq#K;) z!E(}1f}n)A3`w{qibUcKQR)k1lRXh*8LJKBJM}O-G_ij0`;YT`#Se&tCZz+j zjD7YdNd@BJT1M|??+E^f(2X3p;2vMxGq{= zgNUz~+-D`fM8`9y(Jrhrl#EY_LYMbI)gMP!+ms7QnrLNzjnOVG+Oc`P+9&6<`nKPLvZ$)^M9d)t< z(GIS)5mYA@!t@F_FBUdO;7*|&Ro9TgJl4Q#UEOlEJ*1%tVggX5JSK#g4g|_7Ll0dT zRcIrunpzgd&IGUGod4(k%hMTClYrr8kQN;^#B%=$rKSj-p$d(;NV>H;bzQTBp>iR( z;S>0OsdR&~&`daGT0`?3Dio-QA2^UaYG$!GwyNNX+ zB1M{-*=h%SnLuTO8uo)0Syt0f`m!;!1!uhc!XR1H}Z86wtiA@|s__9UV?*?cDx zPs||q7yFiK3a^ko;iS5dM5_^+4XLndoKU!-W_1Wmt3sZ`&9C4AHkkT~r&(W}hw^$E zUtuonf}BKB)pv!H_##r}e#k1R{Z@<{B)cgQzd&f~$n8d&v^j-lj-X++$g7iZsR!Ve zkbW)~z6B^-@j25(gD<6h9-6I6fi1ZCq6@<4<1sF#8S^w9)~A(_xRu3xN&6762`J=Z zkt>9gfv5&^I}QZcS{x(LFTg>BbqOa6oUu&<>2G_GE+jGNeQjW3;kUAVBXYtH?A5r;?Jpv^+zp7)q`= zOlc^%tN8s=nx9j2NS>_jgaH)w78Z+8PGJwtY;7mQFvI{$V52B+Wk@Cs(HvpTy0YblOX6YCw`>NPQt?d}Va;ap z)TfrSaa+ts@}zC?O!VL*=!`NOzmX{-Bf=sKZp_ET%})7v?nT8$#Wh#8@uu8%`gkIxUhn#q$WGF zvoIhCyP%?3Jcxx4MIe=x<<2m`fQtyC(xZZ?WEP25c6xwCOgdQxQBfyTOv^fz@*vlLj5cv0kHO~S$k2^7)q`w?i`-w z#0o}6^70njJ_y%cA&Hc*-}V>$^~%xfCstkAHMhVvwD_|dS1smCy0S;t+A= z+TsgOj?CR~fx9uvwi&;Adtg;=(2)ZLBac43q4@fyvY@1XkgMb8HqVK8F?IjB_>9_5 zUq4mx^!7n#R)O*Q$WhDdi(YOK#}0oxo;5!9*|>WoympQ$bU6Okpextv2+Q)p@Yqw% z!6GK*_}+WVS6nzWoa8LnbIF->Zjc?ctQsF2{^8r9ktfz~IF@c9boo8UoT*P=DgXUK z>R+U>7%X+|=!MIc4?leRV9WK~74aYV559UfwRrTo!V~2K{UdQrk2{A9{Eo7rdwI+7 z@Iwg&zl}AO1%^lFY>(M@88NmPZmhB=jnNS&UKp!qU3u%s8d1nCzqc1`r5J9f|ZRvuf^{W-h1&t$dyZ9 zv~4{U(bIcn-}ccfr!qzsd{O{wl%%cQ)2|#maq9ak=lgb4jXYCnF-@nyt*4=(#cwFw z@a%izUksYsZ)Ih_m1EpUy7ZKyT zD_fo!|LM@`=O4~3SU&R8w{7#T&$kp@`S8KvmBy11n@$wujb_DX4G;Ww?8NTjbhNGJ z((0hH}9A+?InyhPD157>kmxyFa@y4Wi}5YNv)cvc=0PR#ZFjoyL6zx&T2e9PonCro3}RQUSXy3cmiocUoC{Wbk) zRZG;9Yc3gV<<1tLUjM;);Lv$u-CI03RaK0XF9oJp zYcR@8;2AmEJA7CN&tl~Z2$v+s#ANl|Ss9Bo)L?}ESCSu$qJjk#6Sl={S86}T{WFAi zMBB`WKtL<#)t>{%fr-J9Zmxv!la#D|LUufg(i|DcZLYk?1FoE`%n`Zg?UcG5Hlp&&hEcMtNzg72RU~3mr@69| zEjvIls`!fh&|tGn-feHDWU_=(ZIp;4(iE=j5Cf^KtUr^T0GJ5r;5i&^`XT`e#$>tkKYmwDVe90i7tIMA z<=@NNVB%L%2}p2Sw1=LTRLmy2nxk?ho=D0U{&HuCX6l2c!J~9APN`7-G&#vUDH$zO z(!msT$4gDG>QIL2IaaF3P(Y^07uR^Vd757 ziXEMkj6w_-R%_qI5XQ^W68jl;SPCZ=vg?o-Hmr>F6&@pzEukqPC3GvEX$ocfq_b!b z-P@Ftzp#nay}~dhskj$QHVRrimQ?WLk!&aR3Yu=zFg+wfB z*EANi;Kq2|G=S#)@F(M)<`_z^q*wIf_pIbN_9d1gPa9Qi6u5lmu;L!973Tn}-Pc$Gc<{wd^`l zy6X-}QO+6wMQfcL0AiMm#-)}wpihT^2&ZZI^xYV#4 zX~qf$GJDB7Mk8C*EoK2U?s+^Lc7ZSE^}Cb|6RJ+Cffg$*1M=lybqF|{1|y=H36<0( zNS6fLGPp}9Rl~LnZN)U&v#cgTlmIzl7l0&c(XVEuf|`OfQdmGVjW7utA~TTlBUtMLK1^DHdQ69q(M1&CuvjS7gzu2 zQYWI|^2BTNCB(Okx2i9qk{qHeQEjFecpq>if?!3NB+&3SR?S2x&nx0H8Q-#CHIQqG zU=DFX5|Zac`kxfBbSiK;D1wI>e!B!kKZe$NuZx2el?c_q21&(Qvrv!OBJ@%#7$v+_9t`^n8U-VJD}3TARJ%e9_Pmu2 zr8E&la|)~XqQVM25Kg@fgw{fNpxGRBOZ7jlUJT4kqk!8_*M;hMy>gaUqud`TBZNM^ z8guu=lsYNhItfhJ4k1!65x%7)L7FJAP&)N#SUY?VI_U%&sh`oM*X6UbB$-GqLLIyj z1_pnu57bcXq7znWQe@eK&mXb-sTRhfloWu?$T8Ygn{(|z?W%KPthV1V$QvWvBx3v+ z#XYYh@wsF$$>vH4Xg`C1$MJIP`Ork3K#D3_@nuJV8bMneGFJo(5-_8EEtyd@;dZdE ze*ZPFl3PiDrYXQ*QvqvL1r!ui1H84XvkSV5ONKw8_yDvhm%wSTpE~4j2!UTRrU7$B z1z6wUC!-1gO(|Sz910glp=^U$NcD3W4m)MV#nk7#1qjLh`;UWY|NI5tx;8iBzi(Cn zSPr48pcN|=#LZ~H$^efFR>=y5Z6ba!#JCvQ385zV+Z#Vvg2S7r0M2U+^pdgdirhO}&HL)+=I{&wm ziB@$p?OUN2%WfO>KbieURsE-A|I=onv;3zS{HGcGry2a`3-+JS?LWuD|4d~5^HG2i z@&A4^@Xo6L^}GM}(^+pM@2<(ee(m>d`SZX2x^)JtXIOFnA*SNgZDZbC{{LY*ulR2I z&$m+gx08w0+{EEl;KloH8*?I$|G&+s(Mdu9rIE%zlz->+J8u=+zfP=9(p&bFapI$N zEBw>+Tc`ha@{c5MrhhBkI`_7bZzlPV^lwG}eD3XXq4@t|mM69tj1$LOueW~AA6xQ2 zE>IKw`{wah+>7trHZCAPA3o2^LQ)n zuOYXKYyE$d-HDb!{9$}*FAcd}bGND{a{I>tDvQ2dRK-Ms+CR3kWwFj%8UMEv%A4TL zv~Pu8EWK^i+cuo`Gd9=?`rp6XHXO@>+s3_ZOE=Gx{&%YXY~%mq-GZ*)KHb~A+e zZkO!M1pinO7nj^N>h0#CuKPxBm+I{{lTJVT-?xi;n@`&NGfQt9bE38Up~+laecPD- z7)SrdJmG9QY#aaY-)&oX(D&;99n)J0-nMx2c(2v z`1Jpe)qdadN&me3Z~xz}Tona}?-Jt2SYD7yJSa|?iqPR`%+x_8uq2bvxslB0lOzl` zoS`I!bddN9?@0o2FBMt`$`x!C#U;dhx6GFwko%iwpy&&PGPuzYNpab1LfMfH&c*=< zuvs`QALx1?R|dwE{8veyM1(w!vSJO2Yir2@M#a&IY#rt1aQrZTh&L*ClQn34Bc50i zP1z~7lPc|`a@}=&QXM`Go>Y0B$R{f4ANU3Vd|{bsRAR1J(!^cldG|_Try$EGEGl+a z0}_9j??h3;^aXW*0@lb5$ZkG=w3wP)LQ&n#z48G*1~&*cPJe2T3S&AfQH?uVrF%u0r_wNir|&F6bUV|a;mpOu<8Nj7}^?U7_n5-_`|%)|hR za_!{uI{@?*kE=_7{J_1C4vtAupviP2A|{i7_-i7`93C`BeXZ_Tt0iRb+=O{C0B z6J*6ErrO{UU0vwujLM%$(E7{;kMp{Q0G6xWD$DuCO3^LI`Rryap-CZ-22%PqDHizp z$z^k|okl28ja76o7bQoqhGEM{E?1hygy&20=R7ZTF%=rR?2byIRf=LZp}~e677V-R z*z?FR4dB&$q@tdsE7g_C`8aLMmy#I`OA_JrY&hgxM2F|^%eDch`!tO9XjR}Bx#|u# zk|$+@F_5K*X?of9=U^pTiGY`=S`gVvFiC-TrJ$vNFoyxVU6;!w5^CX%_qJ?d>G?5i zQ^{MadRGxK>_+_>Pc)g#eaq#XAs+$;jd@%(Ar!G#Y^L-Yvk^TOzx100Op};d_GtV9 z+#*G-dFVXXkr(>w*}w5W0Q?fA&+j_mj?Pcz$mZJS+1=9n*bDRm`V(VG9bY+uxs&_F zEYkdqoR1-B$DnA|SGdrFNB$=G4DnyZiGDrBbFKT|prIKxMos|Dsc zE;=(_Wg?X&lM-VK7XV@kBzCASC9AHWi&9B;|J+a^2ZNk~~2D z98!VA%Xz|ShH~;&40um#^%C&&JR~KAB!W!}Cyes23?v|oI=lv6V;T?aizJBmMB&sl zIW!M!izr3sP^0 zN{A(FhiNK@wt09( zH!(Yz&8U>m%s0?w9aJ@L2l)qnBkd6%s+V2`4Zcb{-Opt3k+nNT+Hjab@;Zanrgd_! zNN!CMGX+~SmWzui7+@vN*EAEzG)69IVnYN}zAN+enR|#jLPCViTu3jT!=es!7+&_14_>lm~8M0BYX(nsae6-82x^fkYeyGVeuhuq8hpQoPp+m%U`)}}HV#pYS+Sg^^`JAu3m#wNZb<&v;az%{%@k3;dje3TP#y%cwLONIZDSb2C`JI9E zZb~oH2syBA3b63z3c*Udh6z_f*9ByPRzpt<2g)EAu1R7u3-Z5eg%5|SoC=B!Mh}4OQaDp7h74TIykW zKD#iQHrev(kgys*HR;RJ3xt}V0d9erV=!|E`o4#&ZWRi19<7ZJzjArlQ&`tGcp`slt$_55N*;*QsTmN+78L=)RzmGo&_AHpMz%R z5DPWdZ*r7eNCq2Rgs3jpgr_iqql8PU;UZ#Fd``zILsVg`j%Gn_K8L**39m6ZJ{FPl zbhi{EN@5_{KX>L+a@h}|7}tzV( zMX~`@q};hgq8yY0CCXVE@ZI((5tGOo*FK~oIvx-Hm<&KH+<#dqDn}=9RwV;ae?~#^ z3O`IzlB}N+1MqgvG)x33Yzf0;C8;nefg-n`MNqHMb34I@!jye8KaF~6UgPIZsSZe; z+-DgEsncQhH;Clj39URC z4B8CIxCFMB1tT`e1n08^tu^s{6u|?fUy0J7L4%w#UTsJCFeEd^kmH~%La#s^z@yN| z5EY>%G8r_u8=d4|hh;~dX4GPd2H}D=h|5O_HL2uCl={d{YC`%5QnLv`tohE1v>Zms ztce$wN|s74hXThiCcYKbxH#3^eg=i=0R8tI#z%*uheL|uqdjNfmqtpoH z5|ld;A}tyZ1!C7h6#cv;mx!QX;ETXgqD?&<9__H8nFxU}t_~6=%|W@U=+gUy#F~)g zZn+49AxcH05`QWLu@V+_*sOJW+D3pQ8fk`#7kNs|W)bVmQo^b-DI=T)&WTr&Eayc1 z9L@M!=+i!^GlViqO5pVJbJTOWb|RNeV?{f}P6S1OnG!Eh3Vxczh?D|Pkigf#)!)f` zIz3Z`%_3h>kJ)fiP>TstE{7^k3x~n`7ST4;Ac;zYGLa$}{w^1*lu;K#72+~7R^xOb zlj8F`6~SsMjOVPitX0^W>JJy!mKzd5Yb1WQ`z0(00y31x(+O)o6Ko)I3CWU5uH@% z@E-=pQUV0$_+oNUkBY`z(^Q`hDyyncKO#iVB7CL`k<^lp%Ra?|qBT=%47H+MK;}np zh!u#jE;7s%)I3v+BrT>wA}UIXJhXxQw(;j(eS9n$Ay%Plo;Hu{+M>3V#c|(GYBL(Br%cDWu5ywIRffKY_cuR2 zcVX#UQ5z$ODaZrmnaNL44>6l@U7z1mc)ee)PqMO#)}9rL4KzUi>iyUD`1Fz);d6z4 z2j`4lQB=DgT_^QW4ld_WJv{}P-rs2&X54a6)ThjEWrm6_!JmH|J+ovhme95046pR7 zK>^gBf?4;3#6_!G2>bv$phH&FBGwF2AF3n*qB9n=E51A4<8Z#DUuge3^$3}$u?VrV zi499rho&U?uJB!P5uLyH&`*!+Mug5s20%`uAuumXH!|mGi*qD5>;ievI6^WDs!mi4 z?#>T-?KD6j-E%EEhv4x&C;Y;Vp3s0Vy>cEKPv2FJz z%n7oLuTJTGEqO}CeMIWo0Wmb_!Rxl(2y{+#<(2er+GbvgMXG-p_-S$0qT#2Rs;XzE zJUQotWqkdb)SsGCQt3XqXV1X4`Yk6LdLQX#3sWv9JwwbbjQ?@2G<+$>!an0{M6!Mw zokK;2S>7I*oqtL!!p>nI9De)0(SSP3(?j1Gb~KIZ#5ai4;{#vt0k-j<{%-q)Za}h* zUZ1kfvUGS~>ntP{eHuGQUOgO=IQ-nXSr5$5Y$@$V#&%7Ac%^0bh=Y5uETZ-8ea;6z zX$$*#{$R~tU$dXWo?wo?Up@7U)Jw~HS3mbzW|*{52wQFWd0-iH%75gw zU&fop{^}F={>TU4W=UhqN-Zmg`rlu@B}JN*Vp)GVW#hBCC-=nJij3X5zJxJ!Z`SLh zKdr0|zhdv&ac_U-(A$k0$jkNt%Y!3F_F0I1TiU8ekNnMY@SE^~tRv%Fhnf7BcaKlM z98~@NgQ=emca5BoetosSqV>bevxgfas#2u^`vZZt?YrBy4lK=#BZe2(#o4c$_7{ZQ zA0LQWiUyx}=0wP7T;cdvXBKVaP9~oE>X+}=c3wI6`+Z+*|Dfgdfq}st$h8MvuI|15 z7xVnT6fj+NVVMOVjA0$8W*7Pn6UO_=`=bjA$HauJ_lJ*esur$$e0=>rY_*VAbe_1y z&-J%9zIxDtT)1y|sJ^9e%$+{oIlO}3u0Ihy6!7APu5-U#I(zh!edBv?30h&1fi#rg`V@oVE-$is|{ipejuOcfv6K0^dFEX z{LkEy*zkGW^E5>K@MgpaAft=)>>k#8b`78de}+U9#2&i_z2bKb#a!&AHx8wTbC@L4gR=4=2ytDMx>xAp^O<6|!; zRUI4__uk~QniteNq11gj=eIV;b^09eS(%TvO}}pLA4jgab57m74a73`1Ap#@*9(tc z1Jp(*pf;GQIN-9Xij>+Mptk3|4J7wo*m3|M)L~*J?N`pe@&8=h-L}APjmb=pzqPs;*|Ev8w1q zuL5@s&FseW1RCgfjeMSv%#7vu`)BZJJhKrZz!aJADR$yq7r{j8tW+oV7`UWW2%uiv z?0Jm<5?*z=^q5mF(&w`<+%7*Z*IMrYsaYh{uL)m~>#**{U|wSnS%hWh_?c^J%ykF` zDtpPyH>`&Mz$@$1;}mnk+tF;ne~iS^c3V}Us-RFIc1E%)l3_xe;AcCzqy|q*Z>jok zkoIN}Q7EQrWDYkY>i9CH7NaQk5K@o%*9kbQkBUJA#S%x-6mQyCIM%V-8Xaw=a|~fj z+I&h8GDxug?@~(I9+hX5*_q~SpbPbn_+`sIYq511NSEOvvP$kOn2{XiXs!Hm{hv__}a%PHbW-RG(KqHzH=0L z71RCD=+pKz7+H{oS3g`gXq z73=kK9as4!Df)nDUlocIxUDJ2r$!9zL>`K5-E&}Oufz_R?NtqlYbCC=nV}^Qb$p=d zW$R>4>mdcssPTYVfJ$Q&kMVM*jZqk7bTXrWr6bug9?vf#NmV zUJ^FpkE``6pcrSA5{|**dlSk~Od6-qt1Ycb2NE1aot(hi;c0Mb7yzXPix?O&`vJfr%H(48iShhko8mz^0OB@ zL~Y7QKz5DsIwC$pj(;ns2<6C!7-JW+%cIwI9TYa{t>{_oh-hbV2bLJ_p!j2?HvCSy zrEuPZE+!VSDp8-@8o+%Z9e%cT*j)^n3rUfT^X1(;~DI$2OyN3V~3#7@5(KRt<%M%o@f- z0+>R92<9j{81rDR9!eR^qiQ=e5!exPl5#ih@*q~4k${F4e+)>2nA}8NqDE>`SQ8r& zI?*ZE!;v!#qeS!?BX_n#?J%fF2QHXZrzwG~!B#F8-(+!>RgIdWXS$RjR1KNB;m_WU zQvW;*jc4*P)YZk?9fHf)$+Iu0QTC0_q<+~<(GuMx6P0~pokW3*J+cRux|=Fb(_Ls~ z1M3GuAcjUcPxcd55sVLjs9lZn&iYdFlh?K!aeS`FY7u{qKw6PIITQn!J)VJ-D&5Qh zSm5O$cqCK7M7`vuc(sV8t*t~Bays?GvqE&V9aCl7m$d@^-H+U52ms&%QQJ%Zg?Zos*EQ3>QfPe_eQw1d|c)jJZ@+NCEgOgLS2uUF;WXg(R>QDfWq010| zwTT@FmqL)HMlRd~m6JNk~e@8M-Znut5g=!M&X@$L;$fVE+0huo@RZ3JowcJVOKnEc*eAol9 zkxPWH!}%^THhfGvsMX-W`;2Sz5iR{Cs>V`ytew$m=Cj#6V<6V~F@>d$hRwNLUc3Kd z#Gv+ZBD60a&K_t`QRTQqOrh~L(R#a+WYEwC0`pP%ipD(rO*x9jE7jztqAkAYU0XGq z0hBL-Q~uIICSD_nejQRkeJ?`5%8yrMxKOSEk8jOrBnTmRkQ6@^Su2BraJAZna0FjR zYjF+k-z5Q>Md3`q0G+@}G|EbXXvLM<8eV&z2KqJNH(?do849xokS9xF&8Nj#6jzC9 zCO0ECvbfxiY!;?bfD(_c_c%NU!d>0LR=F_2_bbqzCoI^lRg>t40A!sj8y(HX1T1U&1%$P219e z7JEMnd#oY(#4JBu&ofAl__8^?V^_$ao{XqZXppig6FoTZLU1vk&jsRwuMtTC2w*H; ziIbDmsAugXhCyI#^ z)LW2xF^d7zWU+5B4ZN*cncp#Kw?nw+OU)L!&8_b>`H4$ z!PJohUoKv_eYpJH4ewsNKl;Mx(80hRhfn@}JeGR0!$OZO{##q&u-+E8^6~Pgjh6$B zFYj-AW~hAnjh}b?l<|P&rO{VP+IEjv=8V5_skzD0^qsl;C!j!n=bN!Ft{2u14S?ES zPwk+o`NHMF7Rs{b`V++uA8C2D^{e;UVJ`3cB~cNp=FQ6L7+i?N?H)#_#MSPa)$;No zba>Ug)TF;P6{17)ZQE-~FFo;43cqy;UL88VulUsR(ZDUEa@OlWZ`F2S>|o@D$icrR zw)GD`*BbtGXHU^U);C$i<+m4ER`(g4pC}#!d6c;7R~=5rvFfH)=0#s?`*Bc zdTV~Ky^+_{_UORZ32}Yb9uV8+_Q#FxIg@(qa{9&#mxn%nX=<&7c&c;!ld22GzTB^T zpPuzN{axp`ahC)3e*fTw-$!5Gn^k(P-eB23y5qGIBPSmMC6V!}F?8EhVFM5rzy3kR z1;>#6#yekBnNM`|?Yn9&D_Aq!yYxcWx76Wp&za99k7r2BkA}49hgKJSn!f!lOWnZA z+#qt4e*uV&_r1S*x~U%q>h#{Lmy9bHV=r<6%nov7RZGiZhp*Hy%CqSoHD4y*+`6yK3@(=tuOw#?FKlGtgy)Grs$)s2#trGpt+L+5FD2 zs;0fRz@uT#6i-MuI&WS|j%v#qFpwyBRb=d;YiMc z42N@Z$hJodkm1VQ)Wer#GBx%~8rD8RhX#+MzK1|-ybkEJ>bzRxrDM5p*R}9YOAV-j z#6`XGD=cK>(ekW~UeytK=Nhl&&GL@CF)wN6o*`oh1E}+ z{}uhwjdbcdP&Kbh-$;)a40ueb^nfSgL%nY=+}SziCE>bENtT8iuv}{J%9InZX7aiA z*(2?sTS|LE)uBp%B`|7X8fi1`)f}lYd3pVr&>03&Fe`z=H=`NI9%X>#Aj)_?ilpu5 zSzuYZ!&eGqKythtmk<6xN13wAvjy6AmL-m&A)vUi66F0zrdO;1+EO8kq})stPP282 zcVN?23q({=hln5%Q8T37DTN~fdZ*-m0uyW!-^`f0ZR|SY?hrATF@k2ZFC&zo$QC&? zTxpfnmX|dft7;H}Ksh4Xu0+EfBBigvSsK}l&%gx+=@9k(%nM|;qf|{Z_R0=Ko5Kp( z<+?-EU8f1PZ*H16g|s#jTnM6(bR5Crwnl?s)%f?Wm{&ymm)53&v<1EY&IM?5HY?^D z`|M{;9SoPBSB4(|BZ;bt^~c9xzjza4muni$ROJB<53S?cn^>mgRc@=;mD!BOmc??S z47NmCjN%RJSY@{SIw1;)&-0?dTEwyUKGZ%zX;_H@p>LHItz%){p_YL5w1F1N3CU!0 zO0xupur^Uq6$H|ee36r}T}ZDOElP+%!x&gzh3BCJyCy^}gsRKW;9)TN`<(6{oO9go zAYI2j!nlRb*_rKVlBf~O*l~BM?P~b`PqwQlEJZIW$Pl7ORGQSr_r)kdVRdPC4MV ztEu}jYN0b{DpTEq7BVq~?>5+WFT}UZz-xBn1NEWL#ztUFXfFkO=I7*o5=p+xxE{%1 zeTkX1Q_CCt9Q(1-9{d3107)3#AdN-%@hvjx=u0S@p24@UCwUK7a=?I(;e4tw>X;vz z+Zo2}XOv7sp~Ml4QBxQizmny3F+NRvX)(~kI%DZ7DKwX`DVHnVg^l%k1>>)@0|PCt z+Q?{=JD^eLp(YQnt<6uNnbI@1oK+<;xP_vzb=cUG-%Z1}mf1Z?dL%l)FMqdo4;sNx z_HI^L9*}dw=0lA%sdlOkd9seLkEhCvNxDoO9=`#vw zdgi}&bx&i5c!g|!8 zP*|hFt-U2m1(0@Wf%Ss2=HtmKMFT93lsFNp`K}2CAB`x6+Jt~HNUus{M70YvyLkZ8 zQuP$hT*D@}LrqYytilPEkw8Ib0#;8Mq;?FE1I)CYL-Pq7H{J!4dHNzlEih4_O@#Ym zZz6s^F-9E<%tjWXW{uVp?WbDSLE|K0Uk2l!CW1TFpcZX)Onfa5Qr3RwsVFe)b|qte zgeNJ!yNf#Xsy!E$MQf-^@XY9xlMa;0yJSDmjFj;-HSac!oc_EMC(_6~z2G3M3;i-myIJlF98-gkU&$Ed z6!FJI)EO?#ff+beMFk-OQx06&!N4J=vT0VJtrBQDG6of*oeU&ZL67rMjF}zLbli3Bg~ZFG81;F<>vN_=1%*Q9%T* zGAB|^(L}gFvc?WN6t)+x%_cBtf2OEtt18B-QXp0{#vJDPSVo#EX#4O?aV9Ja$QsU; zBl$UUD{2UBAM8S{L&YRkxI59Wh*N>=iQr%|Imtz<;@?JTwV4*iUjH#oeA9=~_#jRK zp$U)6ff_t43O0Y?G>s8B5-q%1C`jE5;Yd=1Ie1eIr)M-0>~K^vVgrr(A*3VU$}K|E zaLV36VA@vk4%nwbMQUoa|GkMwvNBl7<95(a1=}}^O2HbJMnSZD(ojioDNAVBOR}n6 z;Gi>&uLFK%t4h@8HwG*BXgW=J9!WK9CIyQh3y}7mm{C-*R5txNr=~uq1WH8+_B$GUPCW;%PJwS*SdPf)?fo9Q;#^nvh zWM_qBc6f@X3Z;*;J{?4$C~KS0he?~pSJvH~h;FM3fPQRWr~eC!|Cth+f$Zi=M9h=Y z{n+v*Wac1)Mi5Eoo9cyWb$R}Xgl)X@C4e7W@EFftsl!|(7j^aU14;W{+g;^G4N{`` zE3!Uz6{4_v&@fY3Gb5re@~_Z4n70gLh*%{NpObxLKiBp4-yzvg$oZ7LKf1N)j9g1v zeo=2i!|m^I>EQC9*L|LKwqb+oEnf_kejRc3*y_hKa)B6<#Ycax`w98^y}^&r z3y~vJ*984|1r;BbGpZN9UXwa?^qs>&&Ow^)UNUyrXz}@C|FvJA7=Qho?h@Z!T|Iho z{)P81WiH#X_X@e^qpylCE&Zg0TR%AbT8G8n6Ogz4MC0XcA+Kkgh#&v!Lj~@$RQJAj z_nqk){wR!k&TvW^xp(b`w+7}z^$Cy4OVNstj`M9Jmlw1wu53I0OKu;xu5-X61$}uX zJnQ71XF?W>Ri!7}{?<6YZ{SElOVIVjf7?-YY3!+j53ePiICb>;sm$?Tugt71U@mv2 zo~pW*ezFA_%=+ToC40)rx2{W%RHr_2sdN2>N5Fgb*FZXF5I3)T|e0LFjJ6Ih%W3ogOK1xbIcGd;EK+OfL0!RKB$IBU>o{PI)7c;l6~BC{?J z|8m_j@WGbiEJVHul2)$nhQ3sxX^>@$9YaUIYY8{J%2y(@&=SN`FE1A5Z6k z_A7sXCCujgk#`M4N;A(nu0>B*&AAzmqa3kxbBj5HLZ_gZSrPMNfuH!GZlK$s9~^jPMlsU`+KtKU(6cO%d99pl zFnws~dE(v$$A=AGp+$qkdw95FB#_y-4lFmIsh(ajbQEa02EQ`+cBWn^WPSs&MYjcX z7OS2+Y8mjVsn^_+RIj=2&e`DAE-6d*ilYx4HD#F#k6wT45B8oc5LZ0rRao@OETWe` zZP);2qNpsdS_<42J8lLuQP%lF&*cLkvl#RX5KP8_I^({1UW1Pf3_h`7@cE?S@1F4- zHL4YXi7N&rf$G3(%28NFucUg80PGOw@>xNvxyax^z@?O2qL)^nT2PfJLrROdd^TPa zuhDsh*ad?c(i)DF;jV3fvS*R)}O}HYB~nN9_b{Kbrr9HpU2H61@4L=6-H2ZRYcG zchd1MMVIxl(LBG&tdHiZ*oz{M3!?J^HYp5u=jI{2IXXEQ)o+T@vuU+#2&J0F0c}KS zC%ahyx-{i!S`_NU5&`)$qlj0b6uT7{sZ23YB2cQ*FB;qCpf+g^YS0AC}W#- z?v;Go_Edyt!Ht*Y6sP%URHs&ysKFmKO$=5^vV&**^(qEU`mdUYeB;5vX7CcCR5m$pj9e^Dtw7+NGidYl@b!KR5Tk={>*At0)L7_O49O={_&F2VR3w96-EXSJcb_NZ19)%a+$s5t z-pTXUO!Mrz$~>Ag@x27*5HUCCA@0hw+k_aALM6XWfeP*rcJiOk1)d+iK1{adGQw28 zg!w@t@dX)lrIPR|lyZ@Fo-AVyiQsJNZAp1(R@U7PVwutp`RgLd&sS~h1}Vd{Odh_n z*rfKM>UOw`(cSni%3(-B2>(A#)0>cDM?SYb7p-C9OKZfG^wPX2=_Q#rcAH|8jgk$m z!I>9v`wJAJ9cKKqmsg>}o9JP@VDyv@p_2Ji*VrZLtH zhOX0u2ITr?ELW0N5z7=qKoXwfrRTv(P?sna5y>*Rx8BDJyHRybm|KwojRvtAdvQt@ zhz=b-SE}(Lkl?$Rsp$l+RU!Ea%~UYc7s`|Gis;~lY6btZq!WP`EIuDmpg_b+sN?+) zu}Vb+v_Kce6ND-c`%EULV8RylL5#2K+{~lRir{saN)&}kTqA*PK;c#j?V-DRL=F)# zCQ}qL_4T-oQ5lFDEJ29RRMLkkX_Kg5kYS7kV*`^0ydP9Rx~Dsfn`Z5xN+fqA)5u(+-YqlJyLOsv&djqDdGCKVn4_d6aS3nzVN) zh`F6WA%BnXIaVi?BQZLbQF8jIK>H_L8pQ-Wl-<~0lZMZ6?rFqA2-qIm7NO3960Bk;hA>Q`(iKxNtx|z& z&ttq=o5|w~#ENft3hLJlCjMk4IPl}_0^B9$$ykJ3uhj_F3_c6HLjtTtIi(PiR3VI7 z>a5k{hlx%G*6P+m@3IdmrKKpmQYpH)9C;H1)A75k{;|Ep6u{5WrPPLeZ9nv zt`}l4>sq$(sr0My=}RADgrB)gaYjbCshj)`?M|u>FtSto$YP1jrNYh{qU-cElCDd5 z{{`Q2#^gbP?l?IX&-#9H0*r#ksO`I@?UJr2F_+pKRZ8*kw(o7mOt)@{zxD&Vc**+Z z(`~O&x+un%m?~|=Mw#FTayk1pd|1qo>?aQlL@kVS5BOk9quA|8h&0$)AEYb9d}d;D ziuiojM_(2$DmE9|)iCyK!kkUnw05wz$hu@#sZS0%!`V<%rCZX8g*#ZPD#*`aSTeAX z>gb(MokV<|@|o+uvb!QjAlw5}bW@XFL%0Mcux@LYG@t79mCBE&$O|Iv-|{t`0ZlTw zQ3$v{ENbEVWy5oE+pA0gQm7l&A?8BR_v9BIz1LXN`bp_hkPCR;@Nm2(j5~uC+pa7L z3dBF%^KOQ93UvQ4jZr!l2b>@IA-FX{udDXJ&O52SS?~Oi8 zjXycy=QB=RVqZLUeXJ&;VCs#yPsN45=3M@0W!v)cch(ksv}#`f*CGrjHl$7&eD|S^ zf7{SGSOgZX0@HOH(YAQ)?jhN8O4ty&sNofH!WeRDy*zdmWE0<+-_O5_ z&96AIXSDUbxaETvetew^khfl6F>+z`2whn18GB>q-q$VE=#-6de;K+u+v5JRad^!e zD-ZW}XAC^>%?@Pjt%uuYj~7za=o8Gz>(_pGq9tr-_K)*7w3y#whj6)N_2|gc7q%~0 zn>)B5DJW`mq2J!7wx-@^hwY}UZG%%o+V)&|o3t!1bPOfd6!>4;__wUXH#S6^TGYGs z#-0lW7p|TUEhrla%S)XxkdDMPU9bA+v)u)uProyoC~rH<9PT{$^ws{AF`3-(OW#AVggW}$vh&iFsmsS_ z-k42fZR>qtEcKk_oe%d6-FWoEqc;|HfP_1J;?eQv)~@|qPEpF01V>QA<4cP8!TBjK zC!Ja}wCrTsV zc&{(MJoWRn^&ecAIljF<8T?l*nPbs$H-6jkfB1U$uqMuZZ8%BOUTIg?-pphYh8PGl z8DIhdBt}K5!VD7_5X1yjY7Y>^7F#WXw56vdGZ}D#90a39YfC{q)LN<3x@_wzCPs@@ zOQC3K>na7QOM4K3fDuvNhwlA;*Z0?}SLPBjPY@C&&;7ekLzDXlzY>+V1-1a|cf~e>D2rubrNmWr9w)e=Ph(aib6|T=QS3X>Wb-Wr=RrSai|b-hU_0 zoamex>v(D8)&us(h?=UYL(|0v9xTT4L8Ifr^qzA44QYO z0n&XFrz`*^EJwJAC0~taVpWG2|-Ra&jkGylCevprObtP^01>0*xqH00)W1spZ*Ig1pm)BuPP3u{@v%<^bsf zuuhGl<}Vb);U{4l<7NR8%2SchY{FUt6%!x80rW=>apjnhuiLy08@ZRAJByGj0me9 zSApo>LZM;^f@J!$R19xf>kid-Az^WVAYfIBUpT~Jjswxq_&L9#^3V(#5`yAsCh$9p+J^2eAq}tEOlrH<6R^q}* z*xRL}do)EU(L5@y?Ts&Bw+R{JG|4>IC4jN}91j&u!FB18O*#Ad%vL_XXs_CAKXS}~ zAa1cJ?NKs{t&-6hW4^E6$1n~fSdO(k#Ko8-7{AzrLZ<~K4>9Lyo)*tDHp+W|g2G)d^`4%=tT#tyy1y3szfffrUL??7$Dz|Z`kTJvnBSI_Dq@i!?_vMSk zX<7)73psX)QXV7?l0p<*W#vK($W;o=h$I7~!Ww0GlAJbnkwg+i<1J`}09t<(5;dL!b28w^UKX$xT#_b{KQvSC3I>nJG=ZSkS;ZE#Dx| zy&Q*PzBsxTianDtT8)HI+x1!KWxBV>8-yF_M)*6wpfUD1q`(KX^*}TfrHSG)q}#aV z{4%)ECSo>b3AKX$z^=96?(ixa@{)uHRTaUZV*uI(Q-q_-CJ1vjtiUS;g=GFvMjXbm zOazqvx0EJPEn5y}AvQ9d1&T-24d$ecqFERFF&xjWciY})LGY^9|FY}bc(Yc;Giy2O zlgpL3$^{?pNj4i7xxuc3swJYSZCIM60ojTKYw}an4cH|(0O(h-vb0{Z(GqYGTRbS( zglFJI1|%0-x>bnqC^02&g0Gf?Fj-@R!QzyCWDlukc(wR&9Z~O1d{N}*(vVj0>5)yK z%09r8srR=q`N;e9*<&m`gyslzg*;g(Oy(pRRz6!A`fxCt+{+XFh}jql0Xs_x(4X-_ zgTU+MK&C}j_%nD3F9dTBwn%VnuiPOAzA!zhmsjEP6bdMYXi1Qj1)uwv2OcuAi~$xi znGHiRM&hcf674)BCW#DyNl1l);F&iU#fkX05Q3N4t6UTt#ukw9{OePo39R-C zYAGEI9+Hz9yEq~w2Pt#(+abCDtpl^33s3-XIR(hpJ%(}bJBkaac~mI&2qMsk>akEc zMKIZ@i-X)XW`Y915()S;hl2|&w*{(2NOCg$gp}7khn>WzA&CBj8)Z3f(j%g(pI~W9 z0fmwZ09Svcp9s0lyU&AQ;baeGCnU2>5KSO#j5^*0G1CE*r9<&e@Y zM6H~SM-G7dc|{nhpspYF_?s>LJLViXDdM5F0IPc2bl;SQQhc5w@TVdt=ZrYHOl6@0D#`M5Jz2POyBn)Xv zGl(AaGtJ!$WKM(5UanlE49>323wEl1c9w`PIJGF1-Bt4ap)ku?%-Ik1G3*{*wB(2p zTn$Qo^4{N7c4RdXN2h=iA(N$A#sh&VqH3VjX;uTPS7U|9TzWaypo2<4|8C3G%P3T6 zt6B*`ml*9ZE^P^I3#wjQ6tOPl6($9FgxJnUr$?AAeV`@4qDAm>zKC3rUR<>JGI1Ja zBXG#rzpT%MYOJ^eDW$JC*jH27oSc-W+4?f;Zj~*C(3WwaHu@D|m}E+;%y6px&DYpm z<<`Qj3_pNa?UwK3uCBVG?jvrR5IDIIt(u2bBR13b-dbc`TTrqU^6uPI7ZR!W!I32e zTd`;X+u}|xUH<*ElL>27;|#y3&)4_#gTaGYbyG(VY)SW5Rc)D`+*s$hs(f%j-~`mUHu_XYUY)=0&zW~7=KM5s%I~;V|J!7AZKrp%Yf*jF*eA&PyO*!(-nuKs&veX; z80*!g&-bf*_3hgZWNjU9FK_o;{h%!4Gsk%B*^M>ru2Jt>&qw8TDYkqtaR#m*o{7IP z(s{>d9NE?89r@@!vS0*Mq1@`GZ|r|rJGSR=H$8>FvTxPstHXI6cji#R*xRmmGgkTz z9vt}j!LJ8EIigTkTs|EeyR4=*qy6)#wP6G5u^>i=-p$pu>!!}v&U`)-G^hD9{{=_l zo(F~vf9|Q@IdOk+R{A&s$G$fG_MUC;cAuF1;-dl2kow1p3(Z!M4YO};VjQu4cL^&r)G((=c^*AI^F-*Ri}Kvi*(zw-Gk+w_^V z&f`;m9^R5YS;XiN|Mzp+<7W1MJ#g`Xf9cGp_r)`viy!)2RfZoZyCQtiYfow z1G*pX_r}khnEK;CiH(yR+10Ksg=71E>puKo;~(AE$Nv3w?bjhUUY(qIZQ|{-GxzV= z-zzQ}ZQP|h**`JieX0HMgAF%F&Wx?k018JhTYTfU=kMn{Xn%3s`*m!~53To3g?|a_ ze<;1W#TSzhyWf|bzBp%hx6ju$40=O{4ivvIB~%r&{+JB|P36n({W_>inKXuFANSsW zYR#6Y2jZoH-|jv8ROjw#?tJ3cQyX6zsF`?2*L?2Y0dui^v~lZ}-S->*-F|26R{Iw9 zq!APk4s7sUx6icBEc&DV_o)l%?T1bUP2W7$`RBy7DvuBR}4rx{!>o)g*{z~1E9Y`~f&gpI~g25yH^Q(*T2^T@T z{kg4N^o?shX7hh8`sRRM6)X|M#%={DVMhTM=*&iGQu>hQXRXcvd|3zkQUm0=n5XJ+o`vvxh;j=BsVx zc|Zy`F09@*%L@T1+y>x=dU4hWG^@Hx08+RcptZ#_Tiw!C54!EY)PAm>W=;giDnJ`0 zCQ>oNZF`M2rzlAVOtoAc>;>C0RM095*MyO@Vw3$hs83WlWxE}-kcg8-8xeI4d>#0I zC7WiOUBvC=c7u43tFu*tEd?{{9O7bD%{#+gp<~?6qz^pmT)5nN59 zX+2cLvTdh{Di{=3dq|CkN@6|{3Wd2$75*rFppmrnrnh2^>5V+MOW+a3ZKsWGW2zn# zuxhii)~m-U08`SkiAqsU?_zB6+w3WY9|VY_+{`hfTa#I+FQGgdGS*Vai;3JGVLg9J z$w6!P1r@+tYJ6&@G9d#`H3ov2rtzt^HX*yLF^67CMT;BVRc(fiAv=(V(^!r#$#OmmI)FT0&Doq^!eArp4;ynab0MAbSim850ADW1EM7J_y#Waoi|})grdYwuwv=GtF81~}tG9=zEJ842 z9EBVy8|(veDI2Izg^Ja1my&al+8)8P12WAK)E(9WE@hB>6Cq`FNHoOlD9fF~SEjiz zu@-bl@5PMNW~!H?6QIb&dS^V2#d1E}dk}g~ou!grf+Hu`T`4z+2G$nE9yMhullRgX z&KTq*`qp|ejK{h#FUc2Rk^--e6l~CGTP@Iw30hboI=JChpgzp!lbH{U6wQS>1kNu+ zQna&FpoPnPA?xg=OF=|Veq|k=2{LKe8kC>h{ar=QGPDw?_&IHkF|7o|EKwjwp&T0$ zpyXT*-xLRTKpra*#Rj9f;rq~?pf3ivi$G=8f{X&h$|yJ3k?>NQgXW=ndJv^cMaE9U&h_5h*)RDkM`5=O>?8HhfI;Yn6q=0LgUKzK+#ovs2J)9tqW zu;xGiUf~gtTDC$4&5h(kX$a+ewQ_{QDr84Qd7A9wG+ItZBT9Kb7EA!|VF1FBNEabd z5*$yNsR}8J(8gkNdKs4@ zqtkY=Lg~kZ6+UC4^bK@iGRbIhIh%>E#28X&EaWAT+$)fu;xL?MKeh;9z?4oLvq{sr z4)hUVa1sI(0OkfTPaha>0)9P!1^P*{P^4;* zv$@MKJ_(V-K^!6lSG&;o^ni2Z7|@=gHl^uu5R`sFWu?q@raDAhCmuY29-3QyX`+o2of9$1u)bgP2#vxcS!~ip6zZWAjrX> zZYQp4gEsMUuzz=w2=y`IGSVt5M9-x*QIs8kUA!SP71|C}%LNG?3K~}GnT6?+9Khj0 z;3ioC1xTUR6)+L@kVL3dNFXA=O%nP@K0A9SXdjg@Ns3SflTV$d!)P1c+59)qy^$oX z5L#GCC<>Z56cR9MOrqpfD3A#n`#`t|Q7t9G=aaxa0N2Z)d{F|epcvrwOj67}6c!(@ zwW4@KFldlc4ueW$QY%CH0(n&vr(Da%1!wTgYi7sJY-k&qIZx%}PclH~_i_=11w!8N z#rA0ACDzfe0dFS(L094~qXO4}PQ(YPcmOKJUVUC{VCdvn|MHeboTk@fc);tAb}>E63P zkLos@ntIuI_j!93GX0LSxxoMR{`Rh^Pk*XE`6jRgohd#%b>^0?$$vlhqXWA04{d4n zEsJPhchB+7d&<@75tqjs`-Fd@F)L(>8y33oW?!5k6-?^D1t3uNMBYb2kF1WLF1Xc}9^m3bnd-U{g zy_0F{iV`|@bp3uAa;?444|N0!eVeqB4f>&M-`+IMEYADj6+t8nzlAC@sR zVY#h+XfphT;?>JbqQ=RXM0fVv`)!93`+RHHcd94Xj16?(?Jz~*iRN2N?)!U3>K;to zZMTkXv@~CtK9;zV8~JT||8HB~y;uA7KTkHdO;_^+br1F(Y@eRYtSOEf$HSlQ9q_&K zQ*n%c=JUiJUt#8j16fD!@x#S0Oke-4^O^Bg){p4m^nJdF8#AxppZqXyWa{{W7jeK| zVX0XYcV0T#{mp%N!%LY1E`L|-Oz+ImRayHVJTPaqT|PXaDTs|2C;!y<%`1(%e9zv} zcC53*w{CgX@kw@b;>Isd+{8R<6YFNCdfGduhyOjWa*U(~t_**3PmK?}@Zhkw^Xa=k zTxdSouk>Bx?|q$h_1?Q9o!2{B?;_zF*Xc?pu{k5{{#$ouE>B`)>aMJ3r+*$f>Urbq zf%v=D?B*61{m<~MaNniTyo9^|Y*ADDWYx`2P>ZLXRA$3F&s zn^80E7w$2(+BKky^7W;~=k8o?*ktlj?b*GES)+X=)zvk5DK-{zNF&}Ms0`R0qj(*q=KJH7kdgV)^l zv!g=kcRs;HWdSXmTZ8Iu#le5YB!KXP41i#~vmKN@P3F?*n$8_%kv>h@LAt$XSL8^; zmB_K0&9%VJ^F6ThB^C2TtoyUH zd(ma%xGVdTX}~y2J&^?tAprS!Z>d3a0zf`HM_=(qSx1sj!4vV`SnQwL2kNIr)c*}y zj|yozR3K+%YR*GckSL!u?K~{0vWnHU^N2hjKB*A*}`b2#t(XAzdVcQz3T45sZUah-+;GZhlD& zgyKL~9f>f>c7bV=6xHmutrYDbiifTx7C)S#QoK*ZWq?>d4ekqk>KCyIgI17;R_e5& zB=9kZTiLlJMMajGxX)NvIya3sMcP>+6vqlEN>W6vfLUuLDm$I4k1U~FMsx+8wjd2d zgBk8Lg+-!*yuxjNt9HkK8;I}B&>;$6{449R#q;_uJiSAVOFpUw5oWyBzlzkh2pQF` zi{&WE7NEKyE9nDzgsV_H0P)4vn0c(mCe){R)6Vwc9CSRz z?%+7HA(@jpWfj3iagJYU{CP>{(}HBIiwo>=qPe9yPo*2 z(hCO)%M+}NU#%HhwObPd3LZ;pFx@xq=eHWNU>BJQs9ogEguxBprTIi~D#$CT+uThK zUWtcegeWfXD@=FGy{?`dB`9YvvQ(4lKB)X=!MnhoRYKi3qWm@fd*k{m`kVAgxV%I= zHW(6fw$_ySe^1?aZNn%DPPK!FrRr8He{Pv)iEUT~%y)fgS%N(FE58!!HiBHs9@D}a z?U&lIRB$l~6vBOj8lcVn#Nvn7XNpnOyY7R@V&Yd~>AyRGN#lRc4H=`}!&eJ<-cicu zPS_?CL%V9DsNnMv$xe`v5(|Mb3Aqf7F6c(NrMkQ-KTOO%?oIHx#%sdK1+JPXs^-lE z5O6Z^z9@>J3jY87QOhCG=cu#kvXxpu~zIjLs^;05bWuRcL|%4~Kv3`df@T1ZaXs z;WUj`3_Zj+9nHitqiIC37AwVEY+@>i3Y&Z(=oO+6`ZTu}8a6abLyOt9l93y(+o~~CYwrq#uOdrS%!-r{WO%`#I zMdSH>m-m_-ADbB{oFnj2y)(@P|3Y)QbTEZK%?jZ%=1UrN$WjVW2VxaSjw3~od#R!4 zBk^R4HxrH#Qy!_2=W`Yl!`Y2u70nhfDWL5VIDWdmO&7iC{9Gn)v7CA~YJFUqfhxhx zP{VCfom5p8*;6^eBXel-tQ|-TYZ{q_d>ZG4uzCXS6XWOwFmr&7j7L901Ymig6j6H( zeO#l3Fj5V1SOiUD@CLkOXBQQPR<2}$#>e2s)dO#%n^Y~0L4<(k zaB{`<*AJnNUQ`B!cZm3LRRRr#LUG~g2)J%zgyW2Hdt`vvYQW&P3M89w8EG(sF}y@C zi|oPz+!Q$%mxML4zYwFTpG&Bu_{O~eZ`1-v13j7_$7~}Q3?{*47K4)HrwO9fLQA*f zIj2EzNg7WIj7ZBNqm0KOi7|NtLI%j*hp`l%_9l!GnjE7;8WJ=Y;RFNSNNmS-qP2Bt zgDbVMXqhMMB!1H5B2=^;Vt|w_U6#f+8Ug63j3b0)d<2F^VX6+Vyd|I3+Q7XPq75TX zNWX%$jGe#@cq6=t?qC}Visxm~@)fYsi_c=dxyUP^99AN!pcpA~8pl{k7-6GvrbZeQ zULlhN5Hgw!lS{&e@myLWNt30~s2tE!l2ePhZ*f@!0q>WEWgDC_BPZRi3I$1X5A!Wa~|dL&9lv4RGqB7BYyEr3@P;V;qv+tD4gg_2<^ z6pU=(3WO#KsESrYMLN4i&^BP9GGbGZJU~XzXXO}TfTf59;8G$K;|Wt63`>?p+R1dQ z6-?b8IZa~(UUtR??|`Jp`&jbBDhPyX0BLowicp2w8W^S316MwZC83X)1*42y22^?A z$zYNmhQO5)@)$nwKoxK!m@8<)fy|GQ2br~8A*ia9H6N2j(LtP)M3dBXn2im<%W*7c ze!wC$?V&Cz=^;rtZlhPQAR)OmzEV*`HxVkuN*l(JD(P`VCEYKdUrJeRE3A+humcm) zWd=@;W~P7gm;?b&fRwBd1(_g7z()`gfXN}CRwcnb0xu|SAaX+j46Z~H4QXTn&?BLc zj0hN8yM&NvS*izO;;_(2X+8vSriFBIJ1LKIJH@F0#%z^H!mPq=5v2kYPK5wMCm^5> zkOi=EFU44R1w-MI(@y0w1?P~$(3(aBrMfcl)4cXOMjGLX5u9cc)7ydex8zzbyqsL8 z2-aH~iETtaX0#z&dDY`FY*Ly%-2f@T&u&gvT(Ao>@V0$|9uB^|Qc49K=Z{Asj}!AK z4{;|PS%@!DE=e|6O-tAa(|p-NO$2zYRhfgd1>olco~Nc~$d!(45|V7f9P-vMrVv(& zu#HpYqSjz84Q8m`c;rb8e;d}yTb}1JEb#g~)D^B`AvgRMX%TF=K|l%$rW592bHeh` zU@RY^nlX4MYHUD_JM1gzn+4}7Rnd-|w|P~0Q*03Zwcc+x%F#pKjw*>A=!6Yrs53Fq;DCG5AHIe!+$?ZW8z95v~^%lLx+wXwEKVUYF<3^^~S`r(|z<$DPKIN%b7l~XCTUd zZM5_1OovK$eEQv>PSu^Vx0-*QNK4H+@n!Yv95Xq8cPBc-1pwvf0V!UVq#cX_Rz73wME@4C$sgsFZwgb`2))% zzwGUvo^emt7oPC{tJIfCb>~dFcQk+Df467gnVB=Evf_N_PsTzMZ{&{rdMEeAIVs&2 z{rrI=L#EMpKT0f`62BPu@U?`#%hS&k>W=yk@fXD6+^K!X^Mc-7wkB>)>9a2^FVY42 zeyA%hnmYISm)~_>_Feku-I!+obaC3-eOb`Z>-T56J3qS1mR-W57~>t<78RaZ*xj2l zwDtPd$v4*K9e;Vwz3gQJ^L-mj?w``VHg2uUiux|)p8HPczo)OS=?=gD$4IPYawC%$46tb5&Nro;9tF@dPFsuuhZJ=GjB`Pv(uJ11ymdz|l$ zr~dI|-j(s{eD)T8Wn*IDE3bS#lv+&o!-e2=bf?Usp;h#-@dZi23&bR`{(>z zeCGJmu2oUiXKDR^O3!A@Vn`5q2Y9e(`+p$qs>NCHt3LvgzoEZCA4qWkMA%;-(h-pz zeIB4q^_!ZW#-$)zP!!z_SU~tRvR-x)E!7;JI4hfcgjk$>_7-++B+`vw&0m z$I1UW)17eHe^yiJ8w~j;a8&^h)>TKj$<_6t9)v>}mTJ-#FS+Q~P+ODRp|W_NX6*%R z#5$=p4S+4@xbW&FQ{ErrmM4mDjIRsH0$}ow7iM8$GB9#25Mr}^F<_JFiv)*VM~kgj zV#dG%JgXc4O0e$uSe0q@furicb0Fp63P^ca_*E?Jp9i3%9|lm;ue9HsQm=Q8S8jHW z3*ZJot1wn$3fvX@LW%tb_&Uy5@OAw0-Vc+zlc!;NmJK@r(j@G~#~x3o<7m1RWkE0BviIo7Va^fCZB2C)DjMJHmXR8Rpx>nVs&Zi==g&Q6CBFPxtcf_ z!bPyx=_hbIe377sY`KOC@Xl02rxXEUP5#=rtu&xo1QU(#2F?Nap*jRp`*DIG(Xb|E z_{*(wCG94(ZLn=FAL_;i$&2v?IHJ}&H_F7SI+@mUD(A})4;o&Gi>NOG9N?uJSyisCQ8>E{VP z8TZp+&iJxLS8`pXW#2A~pKZ+`3$bc>{nF7VU)zMm6T)&O#?c>Yg1l{<0rC*qa&;Uo zu*ybao)}h2tR-utDMN4Cc>_}!j~l?h;p=P_;%MyiIp;0;3ln64sxD_pv)V&iT-u3*>y^k<5ai4zYvqr`*V_)(Oz~ zH8%BR=}7R|BT>A`a3g$gTiChYAB1!4jVya_k>&=NVJ#+i*g+bDl7y?Ik?;^ByXfJ(S~*(5Dqx%=z%V*cfForp z#_9<5@HCNx51Zou5vI`F=`aQS@d9ZiLyGe42nY+WU|jl&wX{)AY)8mwwnkPIVAtoT zFNbj&@MK_5_{yV^LL)6CbLn&uF79cd9kh)7n3qM$cQtUqHQNuY7MBO5xFMAvk8}2u zV}Wep%~9OE#28EmO_OZw8hDZA?Q=0I$FacSaBDoYsb>!)QuRS*{6dQz_z%vTq0|Hc zx-BNR)4d+QMO>{%>v*UREr!Y*8EgtnYd_`ZyY>Tr)pAlhQP*X(3(2nZBlfn)!7KAN z3Souw9P*E$0Y#Uo*ZOgtE4SCkiAO0K8L z1|HEL7fsd(nj@BRl3IQl)r29LMFFMOLm({!d)(+kBd5_5o4t%0q^n`j5Yix|Lpek> z<<8jU=u?XY3`wIY1QaHP-v>ma0VLfSZp_aq^dkZLY2YI=fyg*D`Do-#;lCnC7!dbb z@C$hqT~4ax)t&@Tn-y&l46W!E{J-;QTFIGVDwOG=F^x&Z=99JxM9L?%Ayv`{L{cN* zU2r@wTA@mKzb90RYefoU<&umh7#HaG(SY@E5ioPL5nTe2;kmmul^CZOSkzc)wH-;v z_J&i2c&!eBh9IO0A*vL~(qubiGmui}T@IMaA}L`d9#R0U{~veR58FJm|&R1yAIr6OonuMJBmjOX~%O`kl> zNMHj&aTJVs=rk;c0ItyhXpkwV2x=uP!Yx`6r1t$1DTPw-ULuaLxS$M@0uj~E!?8FnD?qrorI+{Rc`&Sz3dy-15T z0Q;Pi-saRGlEXlP&~w9Vc>fu)+Kq(s(tKKz3npR=5d*?E!VYKy9zue6sUYYd%~(=@ z8>X}fEoI^7(Yb=LL8y?@WWHB|Rs0tlCWrN$ls8H%FxKpboR3g(ZY@aC6T2|AJf$(N z%3M{riE|DQVIB(KgxOky6j2B#G57;NB?8PC-IM}LqbfO=W7IuBc8GwcjQ80};H?FK z&DA;w6uXciZc=MTDCRbU2G|>49_3jrGU}uPTwIMD#x4WSDFkcK!v193NyYO#kz~W) z8(J&nlH`&KVDXcvScOCY92c+>3JPvJ3$T(Pamu%mNeZh3@N6n+k}MvijY|S3DMloj zaEb29qm(27M3&D^%p6h(WQ z2uCvoZ>1`PVMty~THBQ5VHavSiMbI{DOaI`?(*awnn7$Zr*TzBkabihc*3eFaWE#1 z+Wyktti^tH4l^ODz!7ylC=d5*T$rsad@{VX9%LvY1XOQybnpe_5qT1TtopxcUHH>) zn(WY~DsC9QOaK=&?1GMn{ex7Y$fS^7(b0o?sSA`A*gcm)X;_!7?PI(B5L1i1%YZk} z47SgfOR1D`2Iyl;S6HC=8Tia0GL@_g4u({lvEGJZG!6@d&GV=sJQv$wB@~bXMIQe&v*CySsWE-+250UYS(A0 z{b{7`g^|stG>cd24viw+Q7yXEp;cptOiy&^$K55(F{5AKZSR?WV@>_86U!$F zdMN7mnW6EUZFOhcpNRZ4)6ZnqpFBpF=Z#G)t?%7clZcI-UsLP8IK8m7bLP&qgu|@| zqNvWppQQEmKiKni{pHD`w3ouV56`UGR)1#dh&g6o^m*ORNq26&`j4EMmA#1(zOU59 z>pN2JnNqhL8GmQ(mYkW=A4dX@ryU8?9iDi-u^t<(HpOChY(K{CAKe2l{WOoeXU-$K zk4>yz-@b61d8!%nWm8+idgkA0n`!^)-W$f^sC#WE5-;3I_;X9={YxF)Tl^Z!YS(wZ zi>kVTtVIvD-0X}UKigaX*?r~t&alziSBgKs(|RIt>sW{BXk(&t#^mn&*Te^}4=j9; zT{M79hDA3&=M%o@KJ&X{DskS-srx-Y=yp!OY|YENGddX?JW~=ZS3P)Y{Yz<%jvJGEKL2u0tmEE~rQNmn8~4O=pP{2C#m!%36?4AC*k`lfU6Tlv z!DCii-b;5rSlW5+^AqC-P8>Y}a^=4~Hge?dpM!aQef?z_{!D6S`f~aG1vh4{P5tmx z@P$}z`lo8$zb0mExFVCs;=jTrvS!pXG@yM@B8WM4%s>9t;5ycbjVx&-yoC0RSe| zW=S9|Vpc^6L|ZWewH=TZ0_ZJ)<(UK(E@!ZCq}1N80gAlJtN1B+h?EjFwADkV3gLvD zCWN;EK}QBSbI7iJAaC!{N=1s8EyN&U{i6%-<*($Sd<52V^Ui?OHoO`tv@`oGk2A_b z+|s}TgEXv?st18YEZKvw3{L^OjNBUQl-Hm*+X9BIRmVl@0EyMb5!EIulGH$G&^|{w z5|^H&h^g*ABg;ZBx`12-29k2DEq;4rcmcJZV@gr^4~!QFZ+b`t2gYr;IYfiA9S9<@ z@=ykH3%A)uY`Z9`kKt&eaGo-?l3{~Ekpu-%^2TB)m;IKPa}lVn^ojqtiqyci6IP(& zUc}}QnLD-tGebQ8oSoZd3`UB)q{AmrOU2Arb{pfwd9MD|yta|q1BdV6jl_kn4b&(@ z0>eVIJBx2AsxYJN&<1p0%9xOQ8yE0Ya(5H)N)KILM1jl_BK-}aXg|KJQs0zLWL5Vm z|E`ZGY#1E@6|CUF+qlt6YdkCWH3j0VV+fHQRw)a^fhwi)n3z*Zs0$;h7`=0t1iJ_m zOHpj(XtKaKu_m_x{#*#_BbrQ~9)wie%%BC#b^#S}5FX+^F8FD$fF(+t`U^iUF zry9z`&NC5Q3@b$Tebv@jvo~CW_~G+)Mfmd|gWNN(b=`AC!39}Py{Yz9;o{hOCgaBb zA%nH-Ilmf=cAJ>)^N)jV7ElX*T@qRflZpV(A%iO@83V$|_t|-HAyfTuKoP1^=vz$r zG#h%%*~lTr9{d5EzX>+G#>W4pp>Tx1-uef(Y7h2%*gQA~W$m&)&u;puv;Z0asuZ zDFI$JG8C5+K+mL?>0y7z4I+Fjf!X0erdYgX37bWp)W5AEUqlnn?ZBe7hsz1{Y|(N; zHz@c%!!z-A>v5%-T5h@`92e*Fh4IO`{0918-`x-zR6??eQ=vkQ7%aw9T$Oq%9u zCDQbKxw@A+09Rprj*#qm+UVsLm>A_Cv=^^7V@)(_XyNCEEy15Xk5YoxCPb0y!m2JF zT~1xYf6@-3jflR>G#BxZX95XaApAsbSSbQr5M*W9qQ7IyNi+qxydvOjRMpzEI2MCM zQ+U0-zevVe;tQjpZG^$lYqTTV=`7yR#$j_2Fo;m)pxamt@}v;jYwsod(ME=w1Eh=Q z9YlI3PP)w>lVr&u{1{7{4OwVh0UARuLt6~{$vXA&efunmabT4}wlTs+Ldlr%Dq8A% zn#xCcy1j=<2~yogG26)uCZ~m`Thbq1!tza_AoUWFXm5fEi2Nwf z(n-)KG90}GT4aPz^PMlTvNT?v4^)JVl})1iI5`F@880RYKpJR~W|F$7YPbU~5&*c` zO0!;xgvYADzE)6Fr6@vCSiy3Q6^%TsXGIUWFO%*e5ickv1a4ZDG$5w{s(?yaGX?g% zE9SGj2i6u4b)+6Y1UAQfuh45L6q95tOhOGQ&(}H>+vz+`#v2|3qXQ@uD9MX;6^%@VoM_3&5sD~+sp_)qcw8k1+fhu;WKtlF1!11fsi~F+z})e!N4@#NCRz?I zG~2o=NNGSWQT-@SZLL9rKvfA$mzy(_FaN7D4cHLH7g&-px9hmDVNm9H2orI zhZGeR{;yt=AhhZbp@MU{P1Iw?hqO$Y@V8)AnG0nwB@iMvuyM3Xsw`y80g+zN;Ajqe z$O6gFrYZRCdOj|;MiD`6#3j*%>Rcl$!M$i}6B7^L@dm}v zh`iF)q{^w8$Jv5hkdtvTiVWmBOmxw_UP=V8NG_MpR-Pvea;{Qgkh2cdYHZ{K_M^+l z3lRG*D_KE=_J|l{))1XLGNq6kQ#)lT6rz|*t&_7#n0a&s&jvfzEv7K1>|2Iy& z@HKK4@LJIf(>WMJ1p>^Y$*F8qB@0G3Dl+1Jnh_NGIGYo~ISZ<|6z%xiEYoxrLKOKJ z=#v6?DohUGkpyT&l4VKY!+;!)k^qYpt_7Jo$<%+f3817aKy9rKU<&Afv2R|N&&z-l9fv>J^tlrrlR7w>#1qV94DH(;NIn6~|COEo^ zz@X|}K9bF0FqL$}kg(RRlj*ujXFnRc&*=sF44LJG3p5_jTYTJmDbXb z38JNY!*5`aZ_b4k+Hmw4QB{&w*s#^L^GYfxKJc)}d`Fe>^^9v{TQcEh*evSmq1RA( zKD<#?i$7y0MlPQ!s`|Vh!NLZZ{p{lVqsgTlCWwv%! zYaHOilh@IO#D1kTkO&M*u?xakw&5FZ<-?0t;bLs>Vn;Rdka|tQfl_`CoYV+3wUZMko?7_Ts`{p}ux^7t2X6o1_cJpQX9JND^Z4Nfx);yG&%F56voqvO z)Kpg11hZ}=b&@<1yX98kt4m*L^261!gc+>yBYTT;;?kBxZCN#GD1Q07FGjPMbvC|= zOgMLUzI*r8@Mt7fKMrT#nMi!v|Kf9<32y}5-T1*kk57E3Ic)UbJ7%8wqkOu`v;TME zI6fH`Hm4PoBYlUw2gmMf?RtrP=jbxqIfCOJ0l^3aL5Ml;>TKivP(yzqK4Hoia|Ywx)^?TrF@ z#H{<8b$M033@-2fsOB>8Fl{~GZk(!QKj^cAuaKplJUFD=ayMJ^o+;AL8)9zUa<)g` z{r7h>J!Q=O45E4Aoqyfed9Gf5uz?t8n%?nK;<1_grh%V*jx1f!z2}c)y>JX9EVd^O zP4`5NteM$(ZszRdx{b{sgs5=j!Gi^RqpL5O+mBr3Z??qO)&G(3Vf09G>tu06z0mi? zgpzKry0+6-Gmv=mZbJA*xOnY2yehWmcB05^ zqmTVDw&lw&@TPe=JW}`Xn)49K2m1_XZ41Sx-~(g zv)F6hEcU7a&Moi3i=>(m0c`rJfnzHl z`~`Y15MBNb4|C#&P#x^#tzAi?4L~LpY2ze+<(fNX&Ia#nCDS&H-OA;2WGWY4$Sr;X z7_PLGR_fBfoWd~=TX@#YWuhu0V^3j{@O6cuasf`APmq*aMx2utJ=sJtcm?i-!R##x zX~<}B>ZPd(9?LRX;Q~7aK@n9cNN&GF-M@6&f-zdk1RZ3M(-tB_aj_gCkasDPqVmHq zIz^6hK_#Hvn=nWTQR}5Lc;sOqBs>iZlB6b^kT!^ke1BC}ilh=|fr;G?hoXva;8RZ! znC{Yl?xt;v79DucYsVdH!ZN}Hu3{6QHK+! z34#eH*;cx;rj%|&7vvI2q6a(6ZpE^W3{{Cw zZ#AU%nKa_(Py0pH!IbbD%ow?{I;?u7gW^>~b;n3yRBwrG?c!6DW4IWhp6Sz^^Q6Ij zTJN!KLM%a(YYsT3X*OdBpZNNZxv-@qSCEQl6~7cINc%;!kbuKQ0WPBtfl^~DZSq%z^kmN`Cw4Ykrvm1cY&aXC-5=8T6$N%<3kWFh5*Z{tj|nt1>}-`2^%I<{8X zM8aadFVt$v;(VGy`apU(!MW0_K{UCN1L$sEX38;2L5s<@-&s<-(2!mtpmQ8FJ|=H| zi~9{tZu73R*T&b||3F<6NORthU`a4VHP4YY7l0#mRIr(z1rjWI>GtI^&gIwV1k&ihtJid*V>cET4}4(eh8aA<4BXvqD zriXkPy6oVET3&J9LW|0+Vm}?;N!c^fnz>l25(Fi7vBXSn_CoP~0h9MpsS?x8NzxWw z54(=3z*{)+&zxxQ4^;d$^bu9sR)~XQ^L>Fq2Lyk{7e22MMWL*iih|J)P7p z=S!j`-q|ZDjgnLVfgM&@$Ah$+Syntk(p-lfdH2a^3uPmnmhGYWcp=Oa#uIoIevAtc zrsjMkQgS3UFnlF8jG8z9LE04Z9+5jxx8-^8fOl$A;g zgM`$>3A-GQ&oyY3HCkx|HHubjz;t6u}`GR@oXzZcTDzP`CJQ!C& zNhOq&C#G!o2BYv2rjssLQQp-wdLBC^5Ft`qGn!W)#5U%UOh+7&#%8l?8gc&_v2wHm zqnwNsqD&WoZ1@mw<1qf>OhK=hRWB5U3(D0}t_W1wB*M3g#v?e50wlwA(JWfxQ!b(v zE_j`$6S3SzpdsOT97&-feNY9MQ!S_ENH@_z=y_0JRZ=vk33i46AWVm%YB9mc0NP6u z1ce>5N}$`o8Tx3hjwBqu9epH4gJ@Nz(~|K3eUD=xFWq)NaAoTm&YaW<67qca1-g}cylOc9;Lh7)9)mYFThC*M&Lml~G!Qbu$fEMVk>7@Io#Udy|&Iu=oI)=`&(h3Mbd9XeK(( zAwl{P?}M@9^_V})1n&op3(J+`9LH$|>980pL>K_rt34s^MppL9DK7}7085Yu>=nMd ztK8M$;Pu0#+gYm8^0)CN`;a7QgoMrUJ2+ z>;&TM*-?wPBQAnmR4Qf=<#`{+HiQLdr{;#lU}wp2WnMV+FA>w5UBXjrWp5K0XMJVvX8nx~zG<SyOFXPREjotl8Sf6^GXqo@Xp*7W?E{igs|=3OW{dcte*I;Oqmm zma;TF%NZEVef{2G|vh*lS6C1 zYBf!M`F`u`x6eiH)9&BX^Zcz#_^Pz=3vVUc?!41Ef5H4D&@r3;)S}6e@~FkvX>3(v zlay@x=bvv*l0|E#zBjCTu;i)FmfrHemYnRZJaVzNWsDGBlaD-8D~;)ln=kYYg*~vU z`^G9)nBmzBkWbHkbnC|3H!e-B9nvNhWsNs)`^fz46N8KHd~&i#JIdDFCimMW-jZ6W zA@}CwxT%M9tw%?~SF{h_-1%es=+K-c?|xgvOk!5^oY5Em)P7{LVZ3&7%i^ck|E=nJ z%l=iHhrZvP{J`Yy>p2TP4f)ho_WHZ!$*aaU&s#g}rFNdUzxCWJH_3HHD<g^j3u6%nWJ!9+j(MJa_ zB~N|*-egUPNx0hDa_j1stvkoB{5TjG-6+(a8o#yXf#CgT?tGW=(M;h1 zd-9W`j?gIV&a1sSMJ1bW;Z`#>?r;3_PnTBRSa)da)~Wex!AqDGw=TMQ=&78hv4_r{ z`^Uk&Bl)#!uRo{%^xW=G=MUP4^sACzeR9cH_m8G$n6HnXnwolc>cM$MYmV-{y5(k! zd5Rjn`bqMgTREP64}M%1wf()_H{&)Z&l$T=*Gi79nAvU_ySa1f{afh^^*2^RHg3X7 zC0J`exbvs&t>?xE{tH4lQ^FUOIe(etyyo~ne+h~i!4t{&Scp5!njAKIVl*dx!fIU8 z7t?RM{no(Xmp7l9U$pgRLBT4n#4!{&nY?u>_V?$+(U)F2*Zi4pOqafR(cr+?W6#kb z;pb?b(_<^u1w7w$=WB2IAekgtL92X;yy~oC>pz!DKNGnkeDhDdbZemzLMcl`-$=l7 z8_PNVZg$_#3984z$O#?&HgX9hsQ4{Uy;L4+&pPojB&lW&5q*zZbbIwXpE}q4OI&qemSZGY-)4=H6vb@pvstADR)%C(odv}GSC z`0axTXM~N*Y1!-|-D| z3QZEA2`B|t0?ljhG|g+<5GV!C`B$4?Vlda$Kz~JFTqI*jeeOv7ga-9hE}aBG5RG2HG+( zO$RvCLs)PU?4Ej=aEa)|om;R`8N+5{X-q7;-5P2%1Vonq84w6>?pQsUCB^_(j7%dm zs%aVYh5w3~Hr;?*ff*YQNZ*uXVnHF;mP;W@sU77ZFco5N0$*|+eEpwlHhFC*m&Xg?R+Q5=3cI|E97)Fu zc$(z1@iu$ zL9*jPf{&^gH;UfKzXl9cpZtDkFW2CDwMnx1T^(c##W*EM)NK&%i`*W+l+H)NktIM?)ni6c;_<@(V+-To6iC~0vV34W zchU2t)J(C47H+4Pkc9m_*08sbylC+8*8I3pbmqa#TOqu$AMIsC+5KR83BJ~DOGwiD zpLqCeIn|a{&?9I2K%|9Rz(g4rRQq+K*oU)LWT89RgE7agLlPFn_cw)idp5JOTX^Z2 zhkBXc>`$HOVt4po{YJc?ztVZV-1ftlbbi71VaJ~<-@n+0&7QaHu$~Q5{j--)3ESo(< zsZOor7vP{pl3FDQL!nPzGhq5W`> zE3h46t=liu%8iC|30>sJbck)ithk-V)Ct-fW7D>GDH@qa5)$-n-{lbpZNzq~-kg8E zOIk_QNYBqaCdwm%ui5EpSSC>=Vh;6J?lvaph&F5%UESR~Z&us_gG`4gLgaw4ywjKx zOtLw)FmCiRM=Qza3qsEFU?^&?_Z_S2>x7`7kziu>a#ZKR{~>2nx?_hO@`^g4dOhPb zKEv@!-d9bb!-7QZPGUI2t3s?eTh=8>72J^a`}0fzn#G0smWsx8fO9%k#i^3ndhj@_ zY0T^;xVJOCL^f5^tX(KScwbb-mw2}{;1>RpjH2b3?NGnolPfugG(Zaa;V}`qLuKPB3{JgXlI& zVn{J0WHfH~X=NHGo4l;HlvGA5jGa_IC~#D!dZ>&#I?JFTd)!uH8^mgNRWypbsBGQr zdL~m5MrkCsel?aB&!q`e1723*9GW)|k{9I$MT$yupMhq5AS=qV0^qe$%9RJ?I4=vL zi5jAbWI;Dn1fmbVBcI_rd=#&_7YP?tsqjkA(%fp9Uo`(GlMT=5Y(bCe9L?S~-`!fQ-co)`&~Q&?M{ti0P49 z!o$Jx1|G%X0!?Nn5xTxGUMPqAejEDdSNO6*VW2SLNaM zDzpc!+esI}14~wiR(3O_2SUD3Wg^dps6z*UhE>Nryngg0YG@h3CFr7ildrCzG5lPxn zc!~)kr(em>2kDsIjEu?|hUMMyetfwLPeQ+Ka2ZD#pEkcy+~$c{LULj(eVOpL>=}6o z(|cq*!V_twV$d}hc^OkIC?m1~qW1JwUko2Q#;mFsLmT!#_Z@pdZbZZSBNwfbuRpjVd47R=<+{_y zeM2^U(0F6n=Aw_s*g#Rj*vg@EJ0^QC?rf<2%apHqXT6!37{1wh^xMoenOIx%{P`lxpnM@)7k$0 z*m~!s?w*IoZ=8x+IWe3Fm_F@;weq+$(`>l@`*r8=d2fH+wqS(W&>C90e4Gf6;(A`b z@$dt+lONfKFsg|EW{rPgD|sV(%elEvZvDDyG@Uv3#>C>t+QzXJPfvY&V+9*!nsTp< z8k~4#e$#b&V8T%En$`I_Q;-9>nBp5 zG55dq$N)rlE6m@GrT#I;aZk~lVN3jTo|SppVzdQ)?%Bw9CjXf8{g8EDiad@o*tb-0wKU#{uAN|AD+O;=w0)`)2UZ6K&0A z+vJIFk{90^`DDND=EM(|TqWd$DRF9~=YyM9GcH{p%~@0QYVX1!7nhtgy7p0X+vJOH zv>qOR=N&V1vu90|c643NxytL$4Yq$)O25b4>>r8BzxfVmh>WH#e8l%!TrH zBzoiIoS4>wHe3tL$KGrDalxHWerRpK{loLg zAKYdQANPDA8OOrrM8)4OSpv?>cGtF7lPzQ3C0m~wTSB$JH~FVGiZ+ZlwVC7Ex$C8A z?We~6_{dcK^^K-|Jvs3o2Cv57UdRm&T*vZvzR*gJrmtvSHfni%)12P8()&N3n>6!f z&!a%B((l~txbkyk<(LTQ@_<+cLD)mTWS>s9+IxOR{zbj)8H%zk+nK{$Fb2k zS?8c#TBNI59C>!p=b7V}bDP~f&8xyZpO8hacl0Cj*3&?%Iz4i7@hW*lp10~$--cq( zZ4m!E^)o{Xuzm}3K%GP9oc^)?^v$TXr-v(^It>aPRlxZIk-_?fVU@Lj^qXjjjH(=; zS3UnVsA*--0jmng4C9z*TGj)E459wN+Q`H8^PmkJXPQ;zn`Tu_(4DR2V<6TpjzL-r znnXT6_1269+#LHNY^@tXrei1(5A9;hwuD@#sZZ5UPz~e%@M8X3?E~mF--5~R>yexaJqk<3s2VtQ6kod zn@*7H74wvI79jh*Y=o)o9+OLyGkYv(7b=G7YKi;Y3FI~a*MO>780p)?d#Ow}C+M+@ zaTv&SQHPZ}H`yvEw4B%@b<(?NM8^e;TBQ)hNq9dtmp2obC=&6(5PRJmt&)wy3~V!o zpOCb5;kjTd>PKZMXL#-#`YX-$VF5i~PL`nkhln4jdud}aUg-W)Gwn!XtMB=ApErv6 zOzt5I#F&S}|Eaxl!Y|FjGUH05t6U?qJmAzz1>F634gR93l5}{gZ%`!2L=9IJv{!k^Or^H+0#|aPp5$V1 zvW-+PPG>^`L9Ed~i{4w$E|v(2qrC0Lu+iY<&YU2a*>|arSJUd?dUV1V2rN5+Py=3;}i*Yw`YTgYZ7{-OX z!@W=-ywqPZZVTot5PKU(I=Q{ipp#dyMc&w%&9g!qVtP^+P&sGY(9v>FnwZTpm$;+l z!x!}Oi;GS*X5r=na(qcVDDse%iMVk9eY$0!ZakmbMwlJF#9ra>a5Y!?K7XagiXXvF z4F?ux6h^&dw+If9wCr$~Q7k57e0nj`xGt1MHoR2g=R#hPOrUU@sO=5E=}F*(9CJ}{R(@0J@_y}+R}D%;p50;RU!74G4- zQ%!6NW(%ILglwQ5$55ZG!9;m|e26-_2QXR4`2xI=$feQf0!9|O6o%qy?8**#y!P*S zTpj!B*Ww;DQi!iBuCijg`|QF1)w%nA`-$B-&JzCKh)xK_zxJI(7YJ>iFz)&dZ-r+| z$LC4AeF*~zo+Wv*VL7`%yM-S}Hr1>`ziFRX zuG|uynH zj+b!dOT=g^E2La$E5K?!vXa8ZSS(F6c|py+Lu5jlC3^+W&JZ{FNePiN@)o$XHGFiZ z7#W{>S6VX>x;`$6sGc#O#md+q^6sqT+|-B2Qy%b)$Z(YvhpIw=VNohEBheJve61IwObaPyiZxdohI}J=;dzy zED8bzn6k#lky^%ui)Oqr^Z-E%v`$o=d;Pux^d_H8BynRtiNs*2o6hCuUJT{&i?CKl z#Vp0=Yw46ZF(L7|Oz|MY*NH|D@hU_olWbvXV}y*yu=WKKvHd9OXE9@sgcmd7S%JdR zU5uBd&*O_r)Dm@8C)0F5$dS6%mKUqi!Cp!8LPOF_tOk zsXc7DtFcOjQV|@c1==8ZBc!t~5yJVrs#2ZO1nywUqDi$zA?VWyKNquwsT1fXQ)#?# z)n~t_>Nw7QDXESfWLNA+MGJVX8`pOWYzgM)BZ%@Pn3$=G6{|dKw%CE{ZTVpaB1RRB z-X)XrY9d7l0gaMqw8^k>@$;lXtswzv9;o1Dfxnx}4e)>=p_S~%1S`r+o-E3I0TCPy%t|?e zPKe)xX@_PSGHAnQ6kR8$1ykL}A9qBAR&sq*p7?;V@TH5Q)`Mnf9ZxPPSQ<&jhU(mo z7&#^oviqpNTP#I?m*elmYPP>-nNQNQMEy`WP8-_X#X8HUv3be*Zd-Sjq9$?uC}BT> z5zgZEs*jsJ^4S6`bUEJ**>ZBb7B+B|deD*7k z?WrEZ4(ZrKN!iEOr2E^$-RgH=u&_Wl~U@`>@a9-Mfq{FExc17`MGqgt=Ns zgP1qIVCf^k8_%ceW2L_lp(XZ0x%o}5dwXwv09>!BsPMVs5n(2a#Qs~Y z%GIjdZ-?&FPWAMhz19ATd2r(TJM9Z5-(N9zbM^}x2ECtK@7$=HGT$)K05qfVRbw~S zEl!RdnLB!Ea%647wvVg+tL6B`&0D9??)C+r-9K?=M{UE+_9t_CZgn;6fBA!!D^)+l zO$0v4$(;D>d#iMJJ_y;5mpuD*)~$W9tG>87zGv{tox_eD{!b#V9De)7JvkqZzy591`+rz* zd*kabJELq9Yvx}1%jDTt20z)qV*4LfjJMq0pYh|f&VKLcy0t}XmnBEx$DF0HqmK`+ z%D?&P#+-riwzi^$H}_6niof;!ju+ckwzs0cUprLLylQIlmFq=6-ab0g`q72CfcCU= zkG>OSywm!Z!6$~-E-G46V(guFgIZ@kbiL@v)+es+ey3nmXfgl!2j+TW>VElF(E3rZ z-S*SzJCk!Rt-B@lBojCLUzp|FKJGugwea>QKScfggVFKOwdYbt+3mG2kC+B>HrzV( zQ_d43k!N>bvIO%2~jp4EPRcyQ{mM-%DP@hknU3Ad={w)#hXQhU691&gso|n3y7PhVS_Blm>EhvHNQw8{)>iH)3@el4C1s`R><`e z({)|tQ~xB3J@S^#f2X$0>jaT9z5Yz!_v9k&9pC0h<(<~G!zUK5Ee(VWe-rt$RO0s= z3)e&jU*ocZ2m8pyk%t#-1$D0_qwzchV(}1&{V=TcR1H`D0scXZ^zmYV3H}A*qjOI{ zeDnmwM}uiwHs36q&T9dz&@!Fe0tc+3;=P5d-rK|EJiUk6`qQ)l)<)25hi?4EHOmZn zt#N1rsk2VA9|9{gx)0jyDa?U30AYlb8?-rR0zTNyUt|)eA&kkd4nZ3d+RSpD<37~w z{pm;7;LF)mJ}qWZCkjdei_|z!QNhT{*8xB%-?ZVcyj`&q6`6qXZeJg9%|j%xFB4>Z z$mgOo?GsFT7z_uO+JY5gVmUb-szE4L<0DNgwc&m_7O;s&VR5m5srZ_9R~l2t8y|bC zrk+VrkfL5`@G}TmEmB?{6<41Mtl+2UzSHzGOvO(?1mL_WHN?SqwH84rSj zhAkRZonnpm2&_N}5e}av6@#qA)WGkyUy+q)u4GhzSEo|bFNsNXO4WmcfEtr7gwUu( zz#}_Xhn7(d4kAVf2nY*qOKIp#4oT$#0+r6nit~1Q2E}E{QoU%PXgt1lrU}Q{Ip}~*OVm8s- zLf6t~dMykWO5gJcpMb~DNDzES*o9r$+us854rzdLjFRcqfr2-IWD`{7gy@5d$Q_+= z0biPwocdeoTX+!>7hnYy@qUn~|PK#@QQlkeNjq zMg%O2jNSH1Sb06L*UqlN9~{^6i-TE0q%W@ixDdv*GV@!U#l`{h8OueggdP`?s%f`> z9o=`Tp)hhIS#?}@Y+=4^{u4*tXO`4(`-rmpz}<{jZlmyWrIEKX(VP{HhBsUd7(Zzs zJ4wrkBolHx3Kq0@l3*ZJ+xXc6K}I(U$R=^_;n}pNl%8QyR4U7OB_%rp!X}L95(43Q z0?DQYMIyITWCd6r28FV6N=3YhDX0S>8oaPysLS0DeymM_MG|GI?XY}(99KjN;{FfQ zJ!nl0xp4|S3FNd-`8BaW) zUMr}Khd~~5Np*E+rm>l;d?A>KN2YFe=8JaD&R7JSse#uD7a2hG#)f41FtP$-PKUm) z(@)7rHeOZz!mz4xRWz%{%1PC=C3g_fLm1Pk_^S^&xNPQ^MCt73&(t{aEFX??7~4EwP2zI)m&4D?qGNgqIEcG0bPvrOYV9dKusf5qQCLd07FgX%XXWRz%~|!U@YfvP}*tcBzrFzVeHptWl<@ z7O?>lQ)PdAQ1o<`Ny9YlP}@>wM9HOD>Q02s5Y6P%SSDycn3x;@R}y$NHOgl0lOZ^u zB7L*`F<`?h*U{%V3_#-1qpYy60+XZJ77;d~K809aN9S->ynN`DXJ+#ifR9HYA)`WA zBf;Y;F+~t&X!2Wf1(_|!RJ(YV?SN52Ar&C=FF>g*6DhKS*e2?fG9pKdB22g)8Jn}z zaOQFcUWKV05Yr&M?0`{7%;rQkcY5!jQ_ny)6tYnSasVx3)f%6wT0w|%idr-Nb>ey2 zB4iQV?B$8riDqe^gYp=YKvFZ(QGJHZ0&B=mU72uKvrR-8jIC7ld^yoKpQYH$t0;e5 zTi>D$Fb+Rss_19>VY%!>uT^!m7Y`2^vn{?oTW>w z6@4eEsrLKCTsfD5Xc8Vc8v2TzO*mB3DL8nlIw1c@A)GuN27-tTe99msEJwk4na~Qp zMgKq$5ee`bb$kzxsaTBwqLl2k0tj@m%%-SC4wkkcAXh*;hN)JhKrUB=4o8S&y!?{eKC<4O+ z4)dy{1WZM=N|uq?kYxnA9I)BTf_j*!I0UIu%qBD!nS~#~h+%<|2b0d;kNf5PWdOzvGb_3^S-iEQN38DsWlZ!KW9`tZqcx&-@Rtv2r?L?m&FzxQV(tm^;c~!hv~3gCIW>BVp6~l*cVbZeJ`gUkpKBt$Hc+A;BWZA6EXcg z^~(oN`RC#JuRnkOJzA0cLz-Wh9tb8-=z*OSaL`C!|8vn!jQFJp4$oHMFxW0LFr0s` z^}iI^PQw+!4ggFueTwjXhUlli1rcN?1{Vp{W#~${zA!ip?BRc{R`_$#P}6644O~BR z4TInTuBU`9fJ=qm|G5Wtgpyvg37&5@*9Hbo}?R zmD8tVgOdN_(Elm|JB|PE1mT#MneK?Y^l-WW*qc5TieV|FOapypr>Rzi-mN|G(qhiGSVce_szlrq2FfR=l-n(SO?4FWax3`@gLC>q-8H4*j(! z|3e4;Iwt=^2mShV|N9R5bqf0T{e%2E1^tH(`gIEW4;}RD6!h;q=+`Oe-}le2Q_z3t zALQ35=s)z(uT#*!@1S3&pnu;#zfM8_p?`jzg8own{W=Bx`yTrLHwDQio>Ih#C75bq zF%_gKip%Az26&n-kTIH02W2|l37XP1h9m-8hl8|dp}h?#Lg~#s!GVW`GFtM}u%O9i zaOZ`BPOt{{HS>b71MT>_L`acn7O0TQS=cV^JQbB0EQoKSdC2z>G6ove2my!zhUwtF zj7FwuRXLgG!$75hu={DsQNRhSxil`5l2z$6DXLP&qgHhYvmB4O#q9j5V$4fMVuYDO zmDDa8GB=E|L8w;E;?44_Jh20%&7=Z&S`0hA%zU1AXJ!jXDnnX?`~zsTXr))P6u|)4 zr5XGUt5m>t+kwkS~P@#z``8vaU3&?E_|v`Pofx+z%R zyo=G`NjyWrnyGLA2hJ4A%L_o!ze74j3bpPG(ad+ z2n`fI9b6!kJ1I%#@?^*^LcW8O34}tTp_-DTxM5}I zqzZ@M#PCu~k-&;(ms}z%Gl4?pm&et&tmb z4d6^OsJ(}YR>}w@*;Z50Dz8wcIzSU5Vq=ZU**IUOC~KxtWV)U&qm>AY2pEGLprVz# zcuJsB0ACz8#epx1GVF^hMd4KmrL8h}Z^rLDK7Uac6# z(nbD}Odt+7k!<=wj1XjJi6ASt z2Kabo2gcZ70+1<$bW$*+J2*`PO&}Q(3E{n>pGOoj^%aouXcW_5Fl66Uym;9`NSzVY~ zTp!3ca%`W(_sc z1#?3i&jmdq&p1P9rXV&qpSLa~8LXXuKVpYHz;fA$cWth66^JI-cb}~Q%B_EnM z6p>{3CWeOzqn9Z0_7IXEn||cL9a9qL#$gc!; zx-+Jy)G9o&jrSgqEEn$H79;OQrCzBdVc=*9F~BI(;-mQ9x-EHKR2W;q9-(6gc1Q-H z8I{PZ{CL}Z$jG6Pl%-b}BAXbTSBWfSig|Shx=lW$MEEi_6GN)1+&B^|BLd1`0)p{C zoo6&^PSYYVo2Z}9e;>hf<(yJxWG2fItvIRD^2L>aS;@_m%Q=QqYt@bhCdaQLbLncV zpuRl)F1Z6{W(uiByL4hT@1lGan1xu)$d_qlCE>fUiA@NE1{ z+%3gPjq{igwbw6H9M;ZiT8T$;u`A*R!h7SM2{}gg3)S;NNN-kvkT`?I_sT(TsaqBR?L|lue^HW| zPGTFCj@nXz(ff$0-pA^LnY@_V^XeSo04J8y+?~8f&x1ou#ZKPlu5P3qg=ivH*$jdQ zTZlbI!LeR;N_THNv!bWDMXqLxkEItUF(wRzc*-umqRJ5P8Yh#LfB8^=Jg;M03_BxJ zJyN)ZYAB=Y9@;@V`Lkp$cnhb+FQi|>4u&)ReAI7&!=*%MN~0hFnxXakxQe^Q6bifu zG1A2Vj(r6TJq1|xI233H>8|#&2#N9``FM(qHM2OzQ!b8|GkD!`(CwQorHr>nBA2mH z@C#9~$m{nuXwWVU??hM{S;I3fNY;0WyJSknLE=O`oTNT1@`alTB+$|>o*z%S=g>Pfza0C`~< zp;^twqiC+s+gS~e7((=mp|~C;6cihp30O;>;0c&-@(2xsnzSzwWfCu3lsrD-?7cif zie(^P;q#F86I@EU1y51urKmThzlIVM5dww^k>V}Ea8c)A|lxizZ^*$hJCEKnnh44 z1Vd39yDJ>(vVx1`0bmBtVJK?jD-`Gf$dVIsX0XB@iCNO&RSOnv`D%Ogpk;DNMn~Cx%dcb9g3P6>jHYT2w#f!i_Bv7VVtHvb*sQ^Ht75Tm-<-U3f zNm)v5%qyV{To1+eFlZ93QI}(Gqij$b>M%SKM-JdxOl?OQ0?#8H(p<6`zMEg-w*YAX zup4*#S;U8coVv-UKsGMCAx|S_kg_TTu-TDl^?_-p(CN&6uEnQShAV+tApze4-u6=N z3Wuz{MuE@|V(Dsu3WV$vLTOYvn|K#3Z_qi3q)axj+#})m zG5n=qY?N4lMq4oVw(u}CO-Gi~4I+zH1N;53$OgxjIPehgP8GS+4Uw1`weWH5QSEyF zMkO+!RafpMY8la9LJTLNVmkR2j>@4;qM1F28q_HIf+a+MG_;to5V+`YF*v*ssaTX| z3BDIa`B!KzQ(2`Ht&hEfFRP16%Cqd53=NOM-zf!i$>ihXC$_eFCl750_Ii2L121oV zV9Zgxf8LF_gr`Ct7Wan_+m22BY5e1ntwp!LJhQcBypAfGcYW(uQAciFe6H2Lz6(o! z^|QCe#e+Z__)|!Y>9MpN{ML)oyA$T#>%Sjcl|7cR^2r7&2OBPW>^UKOW2^V+dUaIq zt@7%XudkZ*{?##ozkz0n^A|)OD%yE0b*g!9?UB4g*(F8PThGn={sD7DMp*rx3+M>y zj5>AWkDgV3obaFfV7__QIk?v9hav}j`Qp2+N| z?{19UIv4t+Yst~5p5X+~s^4EB#ojiUUj^@~&4jXM7 z&R&u8mz%!eBUnPd`MY7`hSsp`%?TqJ&IjU_PKKlV>%ZG}!}DqTmhnq#roNkOsx%iq zz3swN6Q88D_g;T$aw?=G;j_PvSHxws4Q`k?{ZI4Yol|Fa_-d<$y?=P(toiJ%zj#+2 zDqL^q$9t)X7Y??bx%tkHNfHPW!r7eXZPl#>Hy;0|`Oh~T!mB+k!&LkekGHNHdt}X} zkH_n@hU*Uoa|*|wf4B9_-;a*2-;(pi^}znA1-BnHnm0_=Rpu<%5;pbX$L*t|o~=`1!wKYPx5e76 z)X0ZTgHPZ7aXjk7TPI#uqWBc?YrB5{PF5DQ9~xr zrQU&`CTh$7k=DNK#+@sVWXx}VduSGu(|_Ij$4g0LPZ`b5LN?1?^y&Bxxqb5LC;ydK zn(1=vl($-jnuiA+qc@N5{4yI9)kmMP4VJu1-yLf|!oFtzls!02q`)6E)q<=tFeJdz z2An{3*ZLx3#c6BLHD|%A=7E#1*|(yLbjj%A$j3c_Rkme7rocu6_h;#%KAdJ<#QMWN z_s#zz(ih7`p^Fwi95~nwRUh`89;(=Ua+)oF@_shz!vNTj7Gr<(d zIOxCn%~0gxHA{o7(_{)AFwTd7r9KkrJU#r%veU!zlGDQ?>I{qI(btLL9A3IY{= zaGDR_I?adw;bx@sAJ%inKQoQgF9VNJ5QbiO?#hrOvi8T#EO?W$)n;(ai72w))IHP+ zwmAZrhAw=2(fg63mzIIfC*v~G&7k0N&C{T-CvZY911GD`CMu(uR~gSC`c;VoycldM zyDvNdTbR40ba3isjVkJw4ZgDbewHLlAyo&aixUrB*mecXM@bop!}1s&$c`tvaQ|wl zKHAYtYf!0?)BcqjMQM5(CC`+zD9A_|d3r;w{viUTzI2x!U{nbzI0rD#i5MHcp*-Z&+PF5hj?CD&zK^g{Gs((fmlQ$FbiX>+omM_mjxV$)vO9vU z*lh|u;te0AompfpvAJ-VkFV}*N%xozi(X+r@tblL!f65pmoZvYXq5V6J|%KgZz1&R zN=)rROw($m1$IBdrl5Xac9wE#4tYZf#iV3sRnT$G_iW2cQ z@jC(i!gqTekyr`rl16%%L1Vc;#gJS@FR{lL=_5)mH|niSc1u4kXVAHfsB_EPdxbhG z6W$iV6g~rYV($EMFD|d?^C!{R?m|D8OMfkc@J|Pm*(W41u>lTvmbMpI)dCRQ$LtqHJ?JZpy2G2=~X%{r{i)X!7{j zMrzY0-_P&!=G@5u(6N7=g3%eo#C8dF)fk=t-HImu;sQv0hFF3 zMsFvyR4WXHV4!71a4*M1N-xcV;0C|K3xvO{gr*_)KrFZHoN1{t1|3A$OiKN?!^#TW zxKzQEurY?tpN6F+=(>AGFJj=5LjojyWV_`Tbf=g zenV>|da>LV*s&C$V>z9yYw+(O*b3~U0~q&f(u6Syb%*oP3#J==rA9zHDX^PVuEWSPYXnd zn0bztK?>9dZKdUKBgGODz(OTrCgu}P zs*y$^6}*uUtuRpyHl;(r;5agddd&I=QSL!vT{Id;6PPXd@ZjH(W${TgMOIKomNfG| zPY8hv7{SOOk$?O8kTe;1AJ|6#u#f2#lKBwGgq@|%@d_74DLFqRcY%!IG&&Eq5DhvN zICa}$_KjU;1R6tGlB%N%(56{Xj6@da ztl>Ct5v-GiGRfd7W`?BYSaL!t0w@A=HeyC#grXRr`aT6lZon&8P>ScZx zf3#wiR(PL0+(_DjIH8c(PUhu(%3VgPpn1N7ug3zQ*N}>^UjLW9aJDCllF8{S);x|@ zQ>AoiE_)NxQm zGQfI)f0^7I#_+j(tS>%7cnf?{5-8B!3qKdO7P9nH6u5u&Ks{K4JQAp?vuFWAdx_GB z@D&ifG;+2b+LU`C3RbtE_Yga~2Z}_LJ`eOHGmB16S7zCopfq`|298>j^TZ;A4yPLv zb|Fspy!`oI6vIq%MrbNNAEXG;C}m@13u**$UW zr?>5N#n_zJQg1IFyFF`GOIFQIe9-XE`sc>>!`GW0dJWOG_Vt6h!Z?kdnV8yfw{dLe z)wi=l74_ax&AKh{rvu}iNIf+spmA8#=CxVUYZlRqRHJ<-yxihQ(($%47@=}_H+4ShjQFa|DsQK5$=|4Vc_zY^tbDdpRAMERI zd$&wCyuS92!g_N2)3>UYbRnbMaDMe`&{zgF>*aiIwB_F^*B`!a0JsUv+s^x&;@cLD zudo;G9{;C$>pStI#Dcqyfr<8x#L0@w05Zu{9mGKF^ZD(ghyK0)jmcH$+kDpA?(C7` zg&m-CB2!$n==?S@4@=UsYo^jiIf+y9&jr#7VSpZj~tv^OU!(9cg@J=Rrs z(c9|<5#IX)e_ok zEnT(2yp*$}g|YR4spfB=C%5#M`D~Xe2h|(&m&ZCAzP{51j>+5~oVa6o>2}u(qb2=+ z9_gy>jqknn$EKb%e&f5WJM@qvNJg743H ze%nvGto55Giwd*&!SzJFZRqK|tk0%*e)DZj$D*r;hviSrBJVyo`um+NCtu4S_Pwbd zR_5eqkK$YQuOIuN@@~~AL9WcLzc#UizFsq>dFAuww)cN}w-;}jo3-SA3c7J#km|7X zgq4POLvy3*9Lq8Z@bLv28Xyqc6ZgEu9wu6`HNdwhJ56h{4(I7T?))w!j_(9+vYb2TCRNsYdQt_Vz9vY!4F9QM<}U|m(yXp(W{$n)o6lza)t>ISb!YEB89b(pPR>RlSAM) za=>KQAbtU6fT2F3RLj_@wSGMHBn(Ke?MRXUpwBGi28{-kSZEOV%V+*9_=MO2L5^8{ zxRq`t9h%2xU7Q_GuW3@q2&4)}w-TrEa(LK-g9*NbV$RlV1wA2eu~rMkOMkmUYGl@C zEOVX3@0l%KF1FvEqm;FVDWqz69Mh+?F0+5_$^LTHS0qH=H}ki!RA%q4dobF6-1=R8W~PQB;&*m+NWc8 zNNtPUxY3Qso^5jHs+64$PbM7FOlP}1LfrP1Du!|8F5I!~TWRwcv_q%|w? znlVdD92TBj{krB#gpbhdh^XT;8ngWgOs((_Vf5$sKlJcwDTkcaluLmZGn6mD!P2x8 zH-kPqfwYkZ2#FPAs7jF3A#6C#dUZxTla66MB`a75ha7;xIyr+#*wY+W;}RMVpcr9m z8*;guk^jl1XqUn)1?xt%4E_G#`9q z32s9pp!iZ$Xn0pAwl=iW_&EyJ0Q?=Zyw#7e=${R93hi~<+!$*=S zZ2&Q;KLH<6`${~BWE|&=IQL3tUYJaoW?Gv88&HZ_%obdTFRpB4pshqGQ7dT7Sk1`1+lG0C?&T{}y8)FxIrMt|;>F>_H$ww;M*C1mq=d6Lco zIOHPXD=HQ{QBnIta47(+_8;WkMgD2H)j`%50X0r)kuID}M1AjxNLI z56og(z#F(_DnaxenJX87C0e!<%|j9J_UObIz(C>{2zw0CQ4%l6F_sV_;7KGDApTh- z!mycLN3Ki|c_B`S0sIfB_<;}s0Uq4HSRJzgFK772_(G9cf-2;Xz_rN$Qxm8TlVLDW z2Z0=HSaSMWj?IszQJq==w4SPJZ&HRd5!dvw9fjP<RTM1hJWP zBD{ZBmRKDIKJVUH>`tzjL;*l7vy5Vxx!ZFk88$)HuT$d4iq%Y*y+V=aP15NBQ}rF< z!Z{X-$c0qM1$S&R$eGAC(DH*2MjW6L@{YEl$@1z(IwOdx>5_OxVl%*|E@9pY;WBJ7 zSOHg)VOcKEkTFr%GX$}>p9kN6tDVzOop!GgqP{m!k?s2A3mDW6QMW4W{OjvDd*y3H zp(!0+%sMPbRk=9PhPfOcH&c6jQ50%S!eUG5naSof{FS?jN=)-5&PsysMdTQZHVtKO z%KzeH7WsSEVr{Gj{V{HUW_ zUVQiiyt6f!_3TuqzoUA5qNgZz!l$whC)=+F-#hu%!+nv@jVW}I{^^H~H@EzJVfnpM%SRZw)`#54E5-vzRhcOA>pK9DcUl8>y) zYCAT%#HlxyuIaX4**RFfr)}ZM=5c%3{?{H{zmNj;c!z)M|M5q8xqk9s)lk)qkkDLw6?u7>b&_Lwj@x`Pkj23 zo@{+;&(PgJ9`vZVdS>$c`RHw*dnN+6ub)5J-s5Uc&g^Y#yS;6!|NYOXFD}(rjt#$2 zJ-leebYSxQ5q<4Nav06{;@A93Q?=*X>L-4#O(5fk@PqG8{l4{E&$S=!Ql*(AnRR#9 zPako0-MkM1w!Zz;(~tekjJg(gtxP_gxFcoL$cnuEJB=Wy8?*0UInw*-^e3Nv{+}1e z=Ni+CpLKM-IlMMauK|hDq1l&x_3w`FIH*@m&$rkA@o?9VA9aTf|MpG(+ox_%?0%54 zbmEv#5A-l4ZS?5-J#F>3yQZz{>giY3{&sD``a+v?bk_3g>nFbWaX&T^PVILMyz~a<)nMlSx`!oI&fy;T2R}G0*VJJURzi8>OMYhO{D)L)uwY6ohZYwh!M>j91+^lNu`_&Qkvc)oNNUfsvUQjjzulsWFukhhl zs|N+Jom~t9iv>eyMtY%@`?eH0TD*kgSG!}UU4tTI0i@t zY#`#eq&B6h@7(`A#6EM}4EQOo9^IQ$J=g%Y|F`KAw0(l6PY|tD(Psm=2Ly3(VD}gJ zVSl|t2s%sv4s)C5HF+lot`JecH_mAh5T&vWE+EUrAe{^_M4s};qXj=z4F!Cnh?&qW zpwpDrfa6XJU}19Rp{>3HzH;whh^N*ds9>Urv^Z!u-Y^nby$z=XaFNHkScyiE&_swA zvvyKA6i+&MulXyCsdnHM24i_Lr{hadM%Iw@6&}S}0&sysUHGS}6ft-(LNuq70&AtB zr5H!61Sr75`y5+#ixG!L7P1chj^rgkT#1>fLfEF}=_ZbBSjLMqFX75gBY}G2;21*$ zSpQ5QX^`#9DSeP_P%zmf@8=ef7$ii}%K*_uMl|Hzz@$sjf-3bQFIvil5`tVBjaRJV zGC{V^Aj)B^5b+r6{}+*@ z8!3EfF~x7hrFwc8WP$cjn{ly~^9hM-3G@nh_nAUE^wJG2UCe-v3?J*z_GQyZ0M0Pj zt=)u|WWxeNt--P#+S>ptI|JD`nvo^}YOELfZgSxET^XjwP*r zGUQ7;4YD}mG4TQX08lF5(-NR8rkZCw;sQZO^c!59C|;7*`d6GmS~Ez&jgb*I0`mzL z2cZUg#i_#Y#Znm21SqC}MDUO@-{S@JY_U>S9!QIMoIL!I-e^C1GRh*G|^YOa5}Xgq?(xUM5YQe z0i9(U)!ZU-BP}$gDztH0f#ZkWa}nCzM8_E66K)pI@|lhy>PCO=Px{L3!+(uv`+7OmCl=j4|+Y%pB}Xj)fgGfgces;UnP~8R?cN1c{nD zMnm2s2zj~*j>GSP&?efk;f7o6P~kimg#6E9se%AIa0@}MAZ$<2QFLaHh$Ltm50Zs> zUP1|?`Hv`!g$!11fcaRkR9`N!Wb>l!u&_jF7Q_Y0?_e;OiIUzFrHW%3Aq@heMLq=4 zD){5GF3R0FFP)EMx3zZ#9GX0pqf`% zn@mBJPO{d2$cAUv#Ml_z`a57(;*oQjFFXjBE12^j<4!+&0xFj0A7hCu;12Zbdf1SoTJV=Zh-2G4_m}y$dh*A;Q)+!egQMZf$jBG_vfJHMxz-2Te z5+OWADP>AniYcTb2(Uqqp)g@V?MP|^&Z6KUETr@GoG{#As^|$TPLs^BFRZx2Ivg&d zf-6DC2!1X}LwS4zsGyW1QMheDsiNNSDl5F2v~I#T+fkTIq9)H1t#Q+)rb zwNPCAEF>CFCeQ>DQ%ZI4mEB`4}10#NwzW z-l*O+enbzKwn$fk*K;%cWh6YiHMcHdD`aJN8d-ZBwCX11)GV>=BxR9`P)jP+YEcE9 z0DV4l70EhxfBCCfj)9z2T@@p2T7B#g-Pe{eIo4mVop>_>RD${j!Vac{4MlSuQzMSl z=p8-Yv8vj4293mZ>h-pj2S3Y=ZW#UNrt~1l;%)l8o_&4i6@0*%A3Z!3{Kp@#{=~2& zGpp)&=45*~5b2D**JbJ%Ev4-ZkXLYoCxNuRIfArhV z>H3G)-cJAIS>kzl$I&70(f!>+TQ6MSRZ4vyHhB2WyYKzh-5nefI<{Z~s?|k`k#+fZ zD@M=%J0)%Wts1@dfs$BkYg3%~ar#+PJ~pz!x+hpKjGp!VdMkze!j ze;H6XuRoj~`eNbUng_Xa^(7zY3=SSGnmu~lJ-rg-b*3msD|Y0+_&ag*^`X6^daM^e zy1M_?h!Kx=SO-gODWM~Vy` zmZ=;^D7+sY`?#atG-!-i*xd0+PE<; zd`tA5sqUeF9MPwZY4FWMDcX)bWeE@7@4mkC6~}AZ@us%vPaa^%<=Aa|P8^N2bnG0V z=%OVfeJ7?*K4@sszc`K)MalQycs1qEJ1YkkEWM75u1(Fd4d33I1q~kgddpJ}*>(FU z@4qd3kS&{rf1ld&-1!f=34-+&ZxAGKmVID?1@{m4{%032mnlB|BM=h z9R6t2idujmQjT0e2F`?|phAWV1vu^4{uzcN2 z9`PS|)=5AX39r`S`R@-=@mb_1$Dg3EWvp2V5RgHbw`-Q5{|I!oq#PaA33@Lm=REqR zF6-njKp5@PfkUiXaLC%pca@=+W^h(5_+D*_09eT|LmA0ayZ&!648Ug%n*e15wzCUn zC?mtlbAXrv8|a@Y0ZP9OLA?b4ruP8JbP5Ks$IvM4Curid;eyNAtuv)JHq8)5)pl4| z>qjHN;AFxaCg2D(K|g}NNAMaR_mkhXKp6aYYN@8eq4CEew+ZT~Py)9@ z**aXww=1YSEe0+fqi}k$Cpqg74?P-+ZESWx@lcSsfwc?N-;%9)REU-lyfhVyF~PD| z7vJLqE9}h+$wm**$}~J4hm6`Lxwwj^SfY(KCT<6H7UEeI2^a-R;B*pe3Ahn`z!Isr zR5QC#&$|(^jwyhf#M%!=MGUHxuYQjqG+y!7HcevaGmTP z2iqu^%RP&S5=m7qcz36q)D2^{DkuaN5CaxRgwh&u4sL`s&J8dK`rIcIG$vH?rk&ZmAR1{pkht5 zCy_N!r-fJ_k%s%}IGWszNVUyu3(NX2xtDFW@cR~c${SrRHt`uLz=~%c{g5PNL;|+0 zH+B`YOinB4t=Wbb`iwW5J=vOwEBJ3FEEhDd=5nC{C=ONk7W?@+AE>4{1qb8-3M01= z#OyWCU8H+CX@~(==a65ua21YqHGH?p{XNbQr(4aUgV=HbLw zgIDit^dJBQp)@Xlf&-xi2g(rS7=07%XCyR2Z=?%hifPhFNs)uxh)EYTv$nsPAq$Ww zG7KeB@Y3%{F_e_5>jg8ih>Lu_n>3dZ(q+C6mm{}9_fTaL(E8laia(_6EL(6$gMgKE z4-ithWt^yhZ4p%XF*e8 zbqkV-7QE1W^ah?bg7MW(7u~dhs4i4SHeVcUChU={YLafMVseu4ca50UL`2)Nn_gVE z>yAy9QWYY?i56ubtRMh*c zhH9k{M8LKRKbhFc=$vU7b2RBWGe%^?TvqZ)M)D->*^Zp;`&DbleO>3-Zkijt~ zA;58`1M#w&0BgZYltGL+P*?{sG-C@CmjA8X&)cq$$9Dfs)hp0Wu2vdN3BDj$wy5zz z%^aI|Ub2*|F^0_wRyYH;O^~OBTw8szP(q%zZUwHNIu-ya`Y;sM?m^B`+9q8UwvzV1V|VK>UJX#iRQ5|0i>*kv=Ed|42(i)v>>9PbP|oi8CFyVAxi-w zF+(^oC`h0fQf_;EMmbv1lO`j}K}nA6^j8P}o{7<^#S~PMLq4(uNOJHu@FfBS;o*!G ztP*RUZqX3p&=!FFt4I*dP83?OxdGCMW+1Dn4H@BltOI8?Kv$$}0$;00%+l(vl(eg< z_}lO>&d8l~C~uKzFOio7Spti$8{VB7Bj(Jq?Ua|rL{MsrP);||Ask0zyi~;I2oh48 zN2R(v<={eOVd=jO-nq2njeqwQQMMJnMT}!)gimv@yBBk%0a~RD#sBzIg+0vK?|V+Bmt*6S#a5^ zb-`#D7~WZr8Z+T}q+DA$NeO^vy2!sjWwquQ-f+Aqh?-GSWi;y%) zCiD`%6e>44=+lV#45K*)GmUIKB;!I@ddDG~%E%H*fW!)8QAHjquo>Q_NcK%Jfss6- zX2potOt0bNGbH7WB-*w3e}_03p>{S+bDVM!FA9?$yizNPBq_G`92%30gm^tW)CQ_r zYazsukST*>#Eb}#fM|{6fUl1ZITkBZ|AzNuOA8osDOO2>*55P~?hVXwi@Y;&u_#80 zIE5EsfW#R_fshUqt%NW>2xMc=XzN6Xx|uF7gkXdLXUUum@gndRV3-K}Y72eDDx)Ay zq=B$ziYUNZ0Kw$pK^!eA158u77Y6+^L;)#6`4|$(0Zwi?=qbwvs&atB%oI@j5zBBh zZCbBzP`eva!Kx;?yt={gu@A6whSYtYw6b;U=_>jo%gd@kG9&ir>>%5Kfa0OPMrSn& zhhrUpUqzQFA&8E@g11syMQ3(x55hIsD+Pl)f!s#$^L_Cl$8f?xgc)PCjh;BXy0lQz zdU)VgZo!-APUcJK&?mHG#XLHc!Q-5S!k~?Y;9f`?hU{#9hStKXBLv)5#){jr9Sz!I z9+QtJ&h3_?OGp-*$G@6w-ap6S% z*u(3}CAR#PJ*eu&6>)03Pw*=&+4sg}?>=<( zp&zsSzSg$-k!x@39qriz$Ad-d#{(a2d2OoW?dL67xmQ+>9@>>ZZwzo=-wZ15zOmy( zlYY_2?B0Cp$DbyCrRHV4L=?Hk=jQzDnY&M4dj8rglSS12+{q>Ctk;LvSDhU_kI&K+ zwVZ$9u5Q?QJgaGXxar>F>}khniQ$iIebYz|{k;16o0oI%uRaz1$I0VE#4-KYEz4xT z_o>gbu1~03S#KV5jrHG;X73xb^Og7Q^Ya^yg^h%DKNWplIa;?q<;p*9A2SXbk4~5U z{=?+J+5Br`e~c8_N7q_cuE>97kn?BVe7N@Ku3-DsKhS;tC0|^Bc2sbImdv%aS!sjE zjzxd+fMD)EJA9}=|Ci6RN7pke>HMitp{48hJC&2?iMzF9fzG9!U5@0j*+2D7DJ>np z4z7Hvqh&ZeT^~D8vg*3?^1#r0Em;ZQ+in$3hZhxvKYZBOwQVwUy~g;`*B?wzPRB1T zl3!dtu!`EZD%v~J?Ty|we5k0SY+{wJXy%~TrmAjTSB?K%b^Y4J^0h0o!Ha%&^zx>Z z7p79q7Ilt&vnmCflwY{kaQ*sli))K%f_mrq7mC=A8t#YvTr@HEGn17)oaxw*xpGAo zJ=zsl6qwX}mH6jfvbS}T{_4-YcNe}~{I@tuB(M~LZkFz_xuFp=%+MEt9_ZZw+Y@~X z03rxTC7;1cnOX^l^xk}1Q0_G=&zRD!X-s2IY%5`5C16;FcX3IY^WHsH@4Xur+2L&yYx0TVC{sJoXOa6;(;29^q z>%K0`nt!79FK}~l0cdr(3W%rrqGHEy|5e?MZSnwgv*Y1RIm_hC?ri{XKKG0Yo3@f! zrW2kSsb1}jRBzi1TlK+zfmce^ZTi##@borp5;SG@efeqB=ZnM~!RcU^6GAu-H-m>N zB(*ZZGgF1BC`7?R+49>oB!j=MJjY`|lPXbFkgyy>aRl8dLzU8Z;o(4QuADjcdp5dVi1&4FCvBcWB4n&Nvwa!R(wiVM5(Q=eNP;1= zklBb+ZiX5uZ7~HG5)hI|&L&~^6+(vh<;}-7s{xOc!7i6 zM0@dw$B-`r={P}yTiptL_(;<|fexjC(IA(*%D)U4H{e!6YnJq20fMCpXuT>|xJL_s z;k$u=0_WFlze%Pmh{0I|2y~O7^Zy=uI5W)CG1XoQ4X?|j3!GkD%TRl z!x@7(8i}2D&A*A15Uk-)D8MTvoqiaK+hD7Ct+K?CORIZ`e%cOWi4^t?=I$|-60a8m zsa};%C%(s%T{$wj1O|!uA+6aWj8GBE28argW}&4pD&1(2#R(xiic7*8X}3&>VZ^CM ziUL!D=FtopzTL~t5@4JK5jAWp3o_YHpOJ^cEs%zJB6@oaqpWvXd85K+-Wf?kCJzM%6o>xq5b4RCU8X`|GAQ$RdE zPc77{^fcf5vlW>i3JDbz(r4)SMc59xG>NEInwZaUw~=+i84QlMP-%TmNgaV`npLw} z!U7zy6iFCuKkUo+aOsZ`#jz3Y&8u#vb|!0&wF;6r>X*l&)0!Nig~0s8e3<7W3Ou$l zniWiofq01E9@Pzb_OTkDay#K}AhH>{8YVm0W~%ZEFSQQNPAiAvFyxbLgH^X0)FLsG z3>-n;rK_dxL13jPYnWEb-HB8F-5!gJYTly`Xi!=vp|0$bu2#GcbM6e|NE{caL<5>Pqo7kG?U;xc_M=|EuwDSrYg;5<#{w>(+T{ErxC z1#~)0R1Qv~2V-M8@dg`4OGr-;1CwL9L>)AmJ-{r3+r*-nn~lF=z=uk$4Jg z=3?<=JQM?gLUVMvBAR-cYLN#{lRS}(rNoY}YP(~=F z$lDB=B-BXCZE!OgBIaW$<{d5xrkQwDc$}<;uh7{CMS7@-PV#J{;>D<$hXPzJ3bk_* zK_yAUWvmbr7{1^IN?UY?I9bK_ABMfShiU@!9wtK4%8Df_X+)65NVQjo)WFh8Ou+j* z((+y|k4HdGf)9%1$e1y}kHI{j>`B0Yo5l_yk#Y|zy-8$+ zxEXvjq3=kf#jy%2L{^F82!)JKJ4rXefG6f7?CR5Mqnuqu)!6f%9tFM624GlI^oHNY zTY-R^hn5+1w3tMA8x_wvT8SF*r$sJ&2ucQ7#V7JA4E>yt_3K2DZPk_u4;Hi!%|RFhk8( zc9%hf#pN_aQYm;gw#~_+&tO~GHu9Boc0``choZbP$bm~Uj>qR>iJb1HTJFapNxtGU zPJ&>3#ZjPq#3K!OnhB0?l!HnGl7wQ#aZNSdIC7Izj~ROW0u)IdpyQy3H#2hbTGU^q zYpDQ#&#FS1%I7q;Wax&WA4k1(g|{!PmuQeb6^2>JV(0~HRM<)qdM7X5`orR6Bz4@l z1KR*aaDhY0ZfKwp$&ll_wb5vwRw`eELXp03e>6_U@@3-;!C}!$IY9lVFK-lG_=*WPJ6!^zkhp{k>?; z0LK^Ix~_iRHaPyIUVEY9iL9^he`DNVd;RF7ZN-kkJV)B(#jBd}+?S&>f5|y%KZO)? zV{bg%+P^eCMSp+q+{jivR@^keE!>YxTfX`X+{5%NO&fp zxou>wB~l%I={{EY4Hbo@v<%?uBVWsJ8vo}rZAZpo!&7^+UVQk~?v(d`jJm%URJm{9 z{=M${rvsaI=}!!NW$GHZAMMwT|G>5l-Vg74!>zwO{5|}lHdDx=U%ooE@`W~N`n^kQ zPH0cDqkYS-pBU2y(>JGooQ2&%V#mpc`HHE$&i7X6|2W!kOZ}Q*s5&7!Y;@J{347-r z#jbb;o3izqf3NAQ+p(aYcvAItUR&G)bg(GP(s$<9Go!D~`F=#TDn&hUMu^3JR+)enzd>-b{&`{e8Br0R#duR7is zXnp?r4^tIQD=R-I-hI$;sJ?mf{xjEC50^cF>y^VUCS~zxUHuEEO0PKwgMn?H-DCDu z0OZ`9(7*pr$JlW~AOFDJtQdb_Px<`*{Dbo#je~DX`Bir({#4=AS7ecH%)@WJcxdA0 z3vlGxAJ=s48eG0Ax@9=b66cP-Jo5dkTjmcvv!Lk3ao@3``O`bcr~fhjk7)hflk})g zx9ie|(zZqS7xnAcJPg~j<^AC^KP>cj93LObOgVM`?b%z_J~;lSo*is>IrDbg>jRUS z`M!?qcJh}M!>*E)KR)W1a`Z+gj_=A|xN|@ETlnMvbN$HZk0pCrK4>T++kHa|4u8I^^wP&)25#Kraun%zT0@E{)6%M)qC1D8iLdb3m|;F>u&iS7jK$g zU3wcxx4&Izec)Fei~e(lnb}*m>8iWTaLF{eAnu#M!EW@QQQfF=s;2m2D@lQp$}0U4 zYNGFLWtrnVU`8S<jgj-S~F?U&PQC+A@PM zX(HA|)GUrlT-lc~8J<~h8CFp2OfEP(qjdAn>}~@hY#aR;m!CBB{tjL~!w>~A;{H{f7b!41&! zNcCPP#eu*vcj{0r5laQUOB*%)y-mDequBo1cBl+(h^^sVT9Oaljp4pj1I(q9&iRky zEFOhbv!1k8u2x)Iw)uZ=6DV#6!L`Fdf!PNyqp5cTHaFwwm(yIps_mv-jY%NKtR2n6 zf~Htmlyiw^Da55)gpfw-=N>f)5xaeKO*4l;arrp2TEH9=NWt018ES z$c)?5pg2T`;Os_o18(g>rI>fN6#7nUC%#LC#39geiiW9oFm;fOl%tOA*mlM2jBLbe zfU40))Kq0J6@XFeO_!Gg$`XW%kQ9S}N^Kz~qP~?UX)TgGcsrRP&BAv?BpFsoDg{b9 ziww)9qG3d*QC4xIEcyR%-FmQrdOsQYnu))n5fe-KtQHd#8M+KKj^&da zGzJTaKDNBK<+ZE-lc&llk2ppQ6E|>Kiy0&x!k`4aMr@>6IRgp+%xJDeI|_;xWyHo@^rU2+09HriT+q ziCUH_JtJ02sF+S5x;sGOD4tFgcn%;3fNTnsRiR)2ma$c|z%1~3D$@o6Q_EQO-)-8n zj<9Us@e(4eS8$Td#hXlD;q71vT+B-8AiIPJvXyX2gQunk{#Z%2Ysk4!TSSx6@ZO8|PN~1jTW~x@9d#pB@=^{_Ut^nn3#cI2o7Z-Hn@GKG<(g{47F2|_wN1)OqlQn8&~PWFOnOud4`ccX%YslLU)&d$^p z4Jfc@ZM_^Sx$!k1Q)~T%wb_#wN~j7ME+fDq2N5Y;-Q2BvRbUOHPMlC5i9%(5-o!XgAKfXvx5ebBmgoN(c;r`;`CV@Bbe`C=`vy&7h~Yz zY5;#*zz~#J8=K5J$Rq@pKVCsCXEg>CN<^t;%{5*qQrq#<-$l8#V$d>)RL~884wYe` zWQ!1GayHszF*Bg55(WmOa!P_n62QGZ6JZ9BKd>p9#UL|G8cl;CGtSe3QcoLBgv=$v z#9T-T(ZGgCV{_~cq8JG$QWp~rl2C+6*u4x--vn~APMDb^({N}r$Y%&)3xV{q4tD3d za5zE|=0MLQS9YEw0Q*+pIV{#Xspc5g-YEbPF#;hN0}N+PAuJ-Rz-f}vK8l@(U9Dyq z_}Vy93eE7QiflN<4~d{qftkUtf*B}vL5nBN zWk51K#EMAQ%4#8_^3>wP!2V?xL*N|XjVthFTRAL@D6Csqi9|Y;J zYeBeg9xeg_HU)BX!!eK}bfu+kkVT#HGHdDA715XjDgKjJWl-xr;T5y;pp|Hau-Xka}_;ynZ zWtQB)BL5dba3Q3`LyG_h!n1(>6>a3iA_WBU)IubpNN}Su`{5*n2LG23>Io5e-5zLJ zFhmSaha_Zd<+s3l#fn&SAq$QaAxSj&YXC9`UL=Z<0$Ug?2fn3ch-eW4$^jueR#56i z$|13cz_9O(i^s#@>=K0oq45tHSp^B(e0(UUEm5Gbb+tlqMIoVfLSjw!s_HBDZVM}2 z@2^yjKvWC(*kd|z9h3?gw}$NqgBr{%%}UIxvh`H5vLT8JNAD@&>f)vF5An$eP)KxC zJfYB1t9eSOKswVHUc|VTY1KwD;u6VPS%au=IkCViWqWJT;Zv!X5qDk6@h`L7a|S!=8)dP&u&4ZA4_$iq%R*dXJjz zhJv0=;-=DYUoOIMDDEJC2{+?{KSVpJ-D0p z;3HKQH303oJ2u`uUOzSUdwwKxbx?O?dTR2^^y?Szzxr$b>N3wb6c)X6)Md>Ijuze5 zcXYItxqq+?*spAPIO%JTPWbFU7r!5JTBDiCYQ>>4WOBu5QP#sBSRo28vJCz6Qfx4} zLq4=(0ZTYx?@%E17+jqn5+_wtyhx9ypSLmy-%Jjh0}pn=`nro;X{F#UhXdjGH{?sRWBlTJNp zPoI4l?8GruQyLZl?-NJnF#OVKga{lJv+C?kH`{Tn` zKM4FWzI@un6{BCD%f2_>f2ed}895mDYC`;-ukST3xF3t2MNgz(?Y{fd`Kw>WmT$iG z`S=@0wx0R}(Y9x#*n3qRUU#c)!T5J|p*6$Ko|P-cet+Qn|J=R(*=gcf2?V)q-FxC9 zxP*VqXuRJo9UKG~{oK;6Hsym~XD?{08Z!FZ_8j*dFX{a>cJ7;7>G$p*e&=LzaLwS( zmox6%Id*z{+IacK{Fj7#4QDbAkFvkbR$@1QJw5-0Tz^&LG5_ONuiWeU+w(`>c|D)$ zDIaLtoqgxt_?^?=Y!5sUxY|4T_D|zqjpY@dUNn0vfiNJ z9u6-ZzJ+2lrtV_Xh;G}N3Qmk{^G7ss)u1NJA`hA6&^*`{R`HYZkkWD&U=EM0+aHudp`P}*Ed%$3dkyuO*LWID1Y0t&7z zFi#2Zlq^ust*+q;dRIX-S3o7DHBEb;=QQPR38&WTBhtqcv)3xnsOFgPqW z(UYpV2T6lE)7Pbqic{zo5Xc(jR{0l#$^H`ain+hhb_;Ta(n%pQCw{kD3)5+UbAaru zIYeo%a1WRXyizlraA;OBNU2sZZ5Qn-k|0lBC50b!L{Zoj79>r*W>$CUjH?XpWAsKu zFA1Gx^nwV%Ix8S>GmK=shMA(P%tDqOVo7k%Ecm2Gg1(S!FhKN8cAT52Ug^c$J3Y8o;%x)lc>h3SZs^?HzNHIl>06}D-_+_;sD5piaS|nf= zPL1kTbwrFLzDnlxYEkPFpcJ@U4-yQP5U_*qf2YID6F?AGCg1!{^NWV<*-WHhh+|A z{d(Fjb!Mr+@)Q9(30H-j=R#E&(x)Pg9t7u!@PX~nMHsBzi?LuAsHfz@T$RJC<~l#W zXi~$VN~t2#QKS7<;BJ0ogE6{>##68$1fxuQu@i{C2ZL+5H3 zRXzJK3~K4TXiIG6+kTxih1wJ2Y*j7(%9)b0R{zuv#eW6ORPjQ!_b7%^S&NIhC z9A0B-T)5_jXpUE`21C=iN~X##ib)#JC>P2|q}=;amaT<^tY0->OKXdxi96su8+z7_paJk^RgBCSh8G^apbJn^uY+7tpe`&3D# zrH=6$m#CI_EvsQuq(hXM((K@*mPlqQtyK$rcG`c6hJL|Lu40TzmdJk6%!kl)G&3gh z-zvQb--I~zAH|UAP>IvJAOtQAg?N*%bm9W+?W)>Xs8!X#3Js(vU& zFOd#`I7SAg;)Vs6ytvh;71+Kg%u~_@N)1{TzynM?mN-e*qN@y+tRjUV$mP)~kqDJX zkUhSDr*dE-oy35-tF}v2>7&m2|Ku*4cujR`?0mXPOGXg9KG7r*pm!zS&eX!p&*{|; zygo!nSqDL@^`K^zHK5|04Er>N=zzP%#RLsN+8 znPHE2sA1aU=J+XklTO}ZY(@s3aWYb7Gof^^m7zHO!{Fn4klQ7OLzCo`fW$SsvZkJW)}cwn713-~I|9MVK8boL z+zo6fve4xOKM9h!J3;Mq07)St5xKeqhEA~xyj6>nMvXw$9;fUCh`HpXkXoXQbu5wwfp-w}8wu{cGQNNA`^1&`N=D$X5}o9QZw%nF$$ViFsI zer?W+QPr%M?7pXJ5F1%Mp6iCsz*iP=$V1x%c9&vV{*pkME8I=%KXX;$c9Gf}U^i$? zWkT>^x}2ic6IO9%OviX)g!l`+dX1IL33cogs*Bk47S}pa->P#By3%~00rv1si*oyS zl|(p8?5pYfIL4*U2mhbqwiWH1R^5#(_#Y(cPi!q7+Er(^NtV@eI@6ib=bm<>mEdru zT5cg%#F&=CN)Wh;Y0Dv4Ii9HW<&x&YkcsD{x*H~^v$Z{pAEZj|2k9N0N z^;4^Q_yGT=(qgFuBM*yQG)G8%K_u9%q(JF| zcJ4&)++H4kRd^+^nwdhS(|Ob`sCePJQWpA1A(WT4^s(zk>3G~DjZB|pryA@2@BG}^ zOP`86@wY#XIhmEq1|Cf)-9PrmKaQl1hTbVnz5ByI6282DFql2-xg($N9k#d@j_y6$ z_{sQzrxTX`nD492lM<-%wTs_LIC`&Y{jH+s4uCVo`Ng!48|Qq`{p<1BD}~`CSH3v< za=7%_@7dVG<41mewt2UZ(J{1f#=5Gj&wh3J{vliGnbDU*+w1!l-Fxln?IU+j&H|Oq zTxrqa(xh5?&qoJdn(Vwdu*E#iEI2ze+a7ptO7`ikM;BlJ z^VqHZr6r^L_h-z#d+VPoe}6aKeEP+2;$lqtK;yi>934OYW9hNMH{SojGOf5JVX%DR zuz+@c(YEfrlTTTaiMF@z?cJR{XLM+|)H%#`xMCk(TDg8~)-zudD~)%fwWlqYPWAf- zgIwd+F}--T=DUS=mFkS;qss$VOGcBDx8E91-f&(ZW5xGNcMLDs^7lKhC#^gD){@Vf zlM9!9de!9}%(Yx?x!(Sa>)G4^&-#R(ktK7^i=%HI9DirDdVlF}@Ae-|n0oi`YsLrf zw|_joWNZ^w_WeNIw74{bMgKQ+CHZ>+?eu&ifwu4|7hx@%-yc*#!IOCspr% znw@q3^Ktr-sWfX2k^RrH+1rmicYk9_ z!bg{t7+-X&<{$5DzI^|F?6cm+`m)};Uta#KFX22$u}l?n`zX87G?8c4)tI$)!%cn$ z%={BKG}b?riTen&SU_JbZuszsv&RJHlnJteGK@twf3DQ|;ckn=|DTN|?(CdxGx`EA z%#C(|;pN4ImXeQeW{pUZd|*HlKGnsdMtj2jGIB!TH3a`?ZpsUPZuzL{&HnE`<`;kL zJ#sO|ixVl$aCm9M|1X&AJOq>7{J9K`{`4=Wef{k4c}OOMwP0*wo%pvo-%~r%FtHje z`(JbZM`T<}#?x@#(*v%F{Ig}F713M7?X2jy6%I$rPSTJ~*6118^Z1S|NQ0J!E*TU0 zhAtZul>S?=Q2acAA{l2#7q`Cn=@I5$R`ji&M(3FE+9&=0=o#Om)=BC#@)^$1MKY0J zP{eecm)cqC0y)7x@O3hz_<;We;I+8wsi>Bh`5xvNm8Hw)83xQ9`}oB{VMdU2OiHLe z=LzHSLKpilsTOb+jLHLNUI-c=XByE>ldz?b4RW$qy%wS>)rYN0Egr_3xF&rO#R+=0 zSYW1*@VN*{F5T?JTvk~@w}ebV1vr9LElI)^DMitUX~-@?2*1cLFW&Fdl|?l*dikRk z`sxP{*0q`}DGZPCvQ}-@Ff}M7i%kU)J#<~z32qY$2N0ydm6PQNRSM?KA}p{|u!P|e z6;drSFj`6$`ci}ziY$mY-Y2qb`v0gGF_X`xG7y3~hanK7e?W`ux|$*q;`)2Y4r_%S zshD7Vkp18Rr1Mh&CQ2P7CQTuCdCc25;^8$cX-^QXZWorcB*dZm!s<+)1wTFXoBhnE zB1_PS`ia#TCLRBU0{kpN6d>O~OLx##sftiFaqTEZ^$U36JTy(M#A^IYr7Qxm@%9cXLP4!hL=3u=+=wd^ZIzZ7y@t`>Di0^(Inm z;a0KeQ?9sTxCC<6?I=%rp~#od2|e_6C31>yW_=brf{i)kbSGb1-_mYUdgpyKgC5`#i;hyGn!7pbLj7ov$lGk>N=AJA$&^-$( zd&CEXG6V5Jh-q2KTSOV*w7Hw2+o>I5lq0J#RY<7Ugb7kfQHwI2C#Wvacp~?obuP7G zke>4{)5jxL5evCgjVmH?JbPTJzt&~vcqeD)YSYy^Ty`_R6;d>!D0#0$Y(gE5w5Mb| zv&4KQg4Z7vga_qm>^|Pp&?>P7uL$+tF1|UlJIvp#>nWZwnNqwE@~YLi22H?|p$eMw zLIf2ilk<2hWd>MvcN0sbU}+B{eb`Ttui$mQjx@PDvPsB_sJd1$i5k1);?(h!t5*^x z=5Ez5Tj!`U-L)F{{j_Kefe@7$5_~`{AWq`I$K1|Tf`ngdW02TMR;tYyEP$1m$0w^e zB5Z|Wu!#gYUiW`}Hz^=4LhXuzAa8>b$N=HmMuwV%B|sENLe!rJO>8qkF-ldk?NwGi zwxZjzO3XASnnU(h6{^GxY7#XilGtPpDHGebLCv>){(vg1;b@LWc3E`b5m1aJ$~=0g zUSrVkG6$C^E#6*_5fKqE6{Ve1wBTk^>F8pP5kcZegtFMmbEK;C#Cy5)7jjEHrB#Q) zfZ$L&{IniKSn)`YcY+R*pvx&ATT9@8yBPd*CnE~3H9qa9B19s?4;yj_Qb?HOEsClP zPYM#FWr;y}9m-*~ONWFq$$*jHikL;eLOD<jESQ6sc-&Dkk;%45A-DoN zrEjhhIWChh;f#(zU{0CMuTm1#^})zbGsgG9M~lQS{|}#$z!Qr(u&LnPl@x>NWV`_) ztyRlHg4=*qV%@H8R6seZxMNgtmIp%>U7$)jlQCAZ&ubw9pFvt<*|&B8RJ>%nNe; zWn7dzII%CJ5(HJ4UqOasht#@|F@zOd1fZWvrgRFnih|`{>~s^AElA74d1+y`>(+N) z6L=t{56~Td2(*MBGzY@7o;HyD}nWk&h**Wj5*UDLzM|;tkAx z!=4>wQorIasqz&HUx?1jL?0W_AM`Un&9K)J!~vwn*F1l4kQcv7ia< zl%^2XEA*21%5vrdc^fJWC7lwQtnRXfej%->L`z(e0_=cXEBeyG;()m$EMMFIjP;+E zSEN6M!mp%S)6o+Qv-}y;AY~+tWqO|SI!8rCT%?PI7iFs0IJhn0H0sgE5S#P;Nb_lDY|ht>C3mV!>j#!RarNlEm!94J(R2H+emuhF zwTYv<_hftSpSaTYmuEj7BIC~!x1|}MuiH+H*7RJZ@3mGx&p*XJzBYgLy^!bEJ=vp! z>FXOqF+je)`1SCXgo`m>{kjc*(aq1zK0dhCJidRZeJG=7+{P`d;}&gf{H{+w{50D( zqo-$h7W$iVI%Vj<_WT|9xA3KFkJb$+=Q5P?ErYMTe&!0hg&$0t*BBmn%&G6TeDf9~a@ZB^d| z2F`vqUOV>9@AIWmZeFQw=((-Ad)vAO{`Te7GsEeJZj65V&8>gjpa1+5@%f|M77Z<4 zoPBg)#`MzH2k)=RUOYT#%V57;+m8meJ*U5uZX1ugyd=i(@_GBclWP*HehB^g`t&1d zM}@PIj30--A=^fBhD0_)jFIK%EoErP8T{Sqgo<+4NQS(aHcGj0c(6Yh<^w)b@Xood?xTSnZ_Iwj+S zzQ2#v-hx(_5~<-_eaXb&lhc9Y+3fJk2rE-B&#Ijhr65K*#79y4+}CD!neG1 zPQH5}_jjj&TyfF6~&K)>uFM$153^?3bpnAkH38UNO<6>=M&0q_wBxV_}(8P8J^KuN%=*CNtRO6J!9_q$h{ZRSAKLk5{vxL zt<%4j%-?9 zS>9M|`_b{~Lt|Xyk-vVKe7I`t=FR+`d)Lr}N@~K}VJCsV2!04EDc6rF&cPlV$e*x; zr~l=N&pz7}GG8ReQmKty2fF$XbOk>ncW!R$=;wD+uy!c_UORMg)sfj}r^(6AXRPboZJeP65CAM9SCfJsIvX9fU8B zkrM|v>3&@9+vRW)KLjV)wojat4=4TnG^`O%PplC+z)R#ztSYcUOdKW$Kk2_k9Dijb zyzG;#{B3){a5CV^%7??0QrL3tU7rY3-cp}^2{c*8XruE3BbY(J2XcSv+3n8XI4}>G zU{#f#Z2MbB=^yYnmlM2#l4!yCiqen>to0?*gL@M(Zo14Xcq^PC{E38 zf`pL(k9e&N0xL3JouaO^8Irgz`Al`mE14)!5z?$omlVF zKTg?&rcNY$iv+2-nW52dNw#0E5W7=$i2`R<7UEMe4NH46G6Kc(amc|`sp zwh#4KXGR##@Pe;UpB!4p76jPYJtaxamPS(fXf@|5D=fO6RxEeUO&az@D?vl8F)M1o zAhlv4r2;bKmn;BEL%hlv)+Dx5TE2;{1o_H@&jUmWtGG^M4xy-A07S#RxXw$?>ZA3V z8bNSq48$R{slFPopG2h_On7~fFpbj!;+c-*I!wwuOu78Bsu^AzLM2nAM5ZA5^+*Kj z9^`Ei@eo}gX$$4Z?|o3f>G>tlrZTs9nO%Z6)J(<+jo^hGF*oOW}Hx6AK0w%F2mTxVN&C>#iRs)J#}!(<+0-aV^GZxn7|O(MCI~s??WvNbusO=&;6nC?r?Ptdvp|Q58f&m1W$aD@x_3Z@-tT zCbb%}UR`gaRA!=|Di$*1sY=XeSfg+fvA+#qS5XR# z{3lYj_u{uA!AoEl0P`m4d0!--Y08Bw5^W&6^)EBP zmH^!;@hOzlEgbaQ)9Do87L+bhd;wZ@6js?KR((n04WwjNZ!BIFrt87XK_~iZjc6Mw zUWxQ{H&azzG$aZbi=qa^`9fqgmr9m>QVw!7lkk8vYAT>Jh2y}p=<9+VRG8*55tNtY z4wjXZ^n8F!5RC0y;xWPcq#jQR67o!p^7!;wDxM4I346druYu~7AOXFns`zf5{y~RY z(cwH?ydN==K5NxBJ>e%vB97n&wEmO0eComNVi<@JqQGmsz@>A@xx)fwa?MfSsy(sh*Ucj(+))*kztfxtGV+ zuscXZETd-h&`qxCK9tHeF?p%F9ux=$p-ug`uZ-NS)1orjXR|aFzlOMMhV;>799e7H zOL5;)!N3bwfMP@OUu6N97OykQ?rMy^f6{q5)Y9s@xPL`ki?4m zJn;!W+*-23zURRL9eiTOg=gm^cah1W{5G8|&qqnEl&ckmHKsN8<0e$dByc`k9Os@H zzk`uDgSEcF$xT6&hw8DP6BqK`FEOmZJsFu%U#6Qw5|0w;1X-pVpcp<4PNpNF{h8M;`Ba&^v~m(J(kxz%`QxTYpGzx}qr zXRIruA9YUIwtyJ#9-91kTezPX(9O(ednyLv7c^E4*bGlj%_oL__r&;tfqBNO;oDP- z8@RJ)t{%TVdFx8wNSf*V;7|^+==pJZfS!B$`+>h+UHRDWTqh0STOG*F)eU6LYkOm4 za^9sC^=+@*vzBN3p-&{^Z+E?91{IK#n}CujDzCe@Vfq4lT8}Vr^Pej}z7silWW{}J zaAo)J`KwQk@4j4mZmi=_#?ANtdP-O$PhW5=XXuA_sB!LYk2||*XwmW$z1Bg4Z9cd4 z;`w6(zf0XPgU$Za!1|1~nV;_-p8M62oI!DYL-Dl5E4K{!=U$D*;>(s%*~bT#um8(a zdf8w}-uckj%V%!AaObO+8td=x zyua@7V*^sj>Gy6gJ#GG5^U$){Z6|O0<4+T1I^95=J;OgRTQ`2-yWnP9Mbcn;YCboT zu>Rf)XKS7=ZrGT&Id0kZ}NZKXN|Ym~hW9bt7r)u|aJLb$f0} zscq|%caSU3dtSP?j?G?o?Af84KV`R9_E6K^Uzh{l)(U8;i*R16O9~w6d^qVXd6Ziapm~d{) z?5@kw1zU+M?yu5VdD0$nwIQvKkOsE|92lL z`=o!|cfvHHEcUmY7VI)k1{*SOob2eb>v#%7sjjmD@!bzUf5BENbWtto=O5Be4rN*`-2w6eQqt8 zXC@cT$dt&c%Zhx3J63{m#wbsxg(|oRBuSc<2!O`jhy=wnhT@^beX5v7YUWbMnLbfn zWIbdC#5_avhsM|B9aW^GB4*Hl`u7!_rbWWZV4^k+azqfJF#rtuN0)|P#V9rwf`~EQ zInhy0C|4pFsH-C>YDCrwY%{Ts1q5#%_(X}2(9>=^OKU;#1+Ua1#)B1K03JjQ@D3t4 zO5_U2k`HCS-NANMn-GbBdm-YO`d%_Ca@;@?+h!4k_R2^vM>i?$dK)+!Wm8$m4&wa7 z7#D4O{ee*U0Y)2v@JkMH2F-eeDF`f$O!#dmqD#SOs*1oBg8`!p5Q^ixatm!xt2$^p zU|`7!f*tKd8b=7>W(8A>y+^HImG&haTg01X&t zcC2E=YRvKjfsmqJ;+Gc>FC@}D7_)bAvuNj<`D#Do{A#_A2V}I1NT(vf>E2%iTICt! zjuuFE2S~3WW=lnC)s$9LhzB4+sLNW3Q-EBuFj?v~WZFYouuf>B*|B_7O(G?JrG0?oP%Ym<(OJlMq>W$Ffw%Zy*u<}3yXzti9dW?Vr-Fyosyy=(-&^0 z1dZ$v9x(bt01$@^FY($E*-^~OjyPIlzJ3%}QnF}7vPPm9x-}HugxH^$7S7N?eM^Cc zp-5(&e!-~!gSe(0$qG`|lC9Lc64uGy3jc@QgU5?Dy1-*XxR+6L`;Z`mN(6#>NWzU2 zjf$iokqCa)7Q!Hjkzz)xMzxdR(XwjjB&wAQV>>7ZUlL(djdJvmvx}r^NmvGmLJ`DS zT7xG*$ST=EDxosu)Bq4ofV!Sfdce@i@WQTXNj+IyFcN0e%r7L_sW4N`vSW%GEFWny zwni;)B8;Q1Y?Zf8znE5OoA^p>iJ)N|M8MNYYNJF7eh}1h8c^{+*hvz#lZYfW2;Yt1 zLZI4hi9~G#g+xrI1$q*~5oX;aqRRfi13_Y@8V-N^z6NCbRBO9Phz!I7H4IPk zQBye`c>tbwx~h9*$OUv3kRYN+@QIkKH9nIsi1?5TOU3O{K~ZR)D}>Qe96>` z=E}Vp`8j5!t$zlX`M}&q(GAf2~Rpq8FlL$lMP6NuKHyK4M4TO^lWS+`Q zo};Wun^=u6T~<^|JyO%$F1jAuB)YgtL?nEbgXxB1F~UCS3ZK#`WxPBU6Y1A`O)g`a?n{Nkn8rp^tcqvM)NW4eTXn_g@<&+zj6h#H^K_ECdw;B|gIOq`} ztfYlkDU~=!!eYXLF-s-ZM}w*cns;a_eJuFN6ESdJAcyF}9crK&Rf&ECdj#m*%tVp!C}$0MXKHQk=X)l%RYllQP<-j?0S%b>6Kxlb1Fa zT^}>E%2MvmyJ+|O#XiO(HQloL{uQ}^uB?}s(N9o?I z>)cQ=wcr`u-@Y5MOwI4^jlV6-uzcD4URD`7VwnEEZUF`64}<;m5BB*rL$~xXdc)Ug zXPeJgz`C$KIFfEW?=Sb>UH;gsbVJ4uueVvo=6rnmLt>J7VEJQ2L;8_}BPn^Vk1hFW zfld*T$dr4@$|6NA91x`P8dxu227Q^4-P0zofLCy8A?Vp19{u z3e)!DNcLZ^c3n!^oc5gek4w_}iv|~^=Ep4@cydNt>^7NF+OlNYU#89H=cgPgFIzD5 zY}Q70osgY8P-4D%;`3X>X`kI%Hkh~Z)sjYAZ0*d_ilODsN6S`n0}=r?6=KW#$1|vB zk8Shahf7@9;&T7M;^*gAJm0%DXXVn%OO7)!_lcD+-0As8M#_l0HDTVsl{49ojyO+b zEPDUH@7~^-vHt!2?+*<|dpeOBtLos}vQnNyDk>x2O^0hO54<8}Aiw{H)~F zVD{F5;@PF)!OewG8%bFU6T+ANG}0A+WWl}Wy4>0fri-j;I&vbGJkner6`}B#MGe_FL_;uF!PruWhJbrhUy>#21lcC0!V{-%9{*%Rn zUg>M^)#m?x{8wSYx|$Qn^6{gMFzKa1ontAn`P<*XYm7(7tG;zZoYbWK(XbKz*<-m4)?PY_ud>l z9GZPL1w0NA3N@G8*!7m2LEJaAPYs^uuVsyVICrNlpC9ak!%&y;9WvqRIkvcu5`@vs z^^ZcBz_jio&STU(a$5gCn5j(%F7=Mh%{{U>X3TxVf5duu>R`g^w`Yt`v_Mw>@4}Ee z4hzHG?_gm_mabU=#oF(fqWb z{)GIA487PlVTRd@!aK!lmdD3*>uqI*lZyrZfnl zv-Np?9FVzT2HdyL`$8Z1=OX5>e# zv|dfn`j13wfuMCGKlLp^iHz`n!BwF$BcBjjO6k;26qLBs2URFiW(}9in$S^jnTG{D z4}vGfcr^;ke#RrHIftL8GG70`Y#4*MOxB>+FsL($5WHv(Blx-sXfG2bDMyn9Vn4hA z<_X%1WisNND3oHj$r8JY4(lIQiG`9mgh|?FsKI!PQtgW56R7~=Pa$dI0&|q3i51QQ zfwJ`3gdk<`6`CqIXDjgx4c1YM&mg9m1FX2B3#FVRrbAgn&4=pziRVy7M10eE13+;RWeFE;`#el?nzFK^6-rU7+BpV3?KvdEv62i#RDk(MA2-*Rb6m0D){S5bR(J5XIe`ydH$p6Stus)5@@IH+c@t`d_dEnsn2mtMj$ z63G!kI4LU*8ZlH|F%#fw;n}c*EKu7*O4@fgKLJx;N>pl13E>8{bmXo&1J(pHXO(n8 zsKLNxkr5>^UFwAYrt5P!fpbn0cyRT*@f1+p%QA;U05YXc#1|4jDwtRamI=GWM?qI4 zl57e_3S$e5dPV_wRTWb4X>t)+fc#nvM$KNT7{T;6UF38}3D$%gijAw#WTX;z`L(Tz zUpDkg0oj3gjcT%_f8+u|JpyTBVHV#hR9^r2A(b0-6OiWfE~Vb3SE)Pz11I`P+Wa7l zU`|5qC9p~oPmO|gCRJ{w%@sVZLgo@SCn9LotNiRiyb^lHnQ(Oa>d9(qlh8ymY~>+R zOzn!}C4v?ginv*ZJqtaCi=?O9_bt-UIb?{SbHv0!F_0*er|47CQ9XuEisgMCAn?L_;Uc5~eFf zh=Ea7ol*6$DinhB-VT9dD>1QPjTR$qB-jY>L<$QbqmR;dS@$sxY?c}d<%LiAuvoZZ z?>33oFv{!H^AQ@}CQ*jV<5zKnL;cn4aVkk*Fqn?_Q62^c5 z9Nk5g3?{%3jr0N1_*u$|pZu1#*PY(P}vbhTCFGtft)&f=(Tb zbz(~t%*GqKeV}}*B+gR0W90-v`9!FBft@x_gm{3IGJkq+<-Xf|{rPBH+l!(#s1TF&qJ%Mc` zVwDjJ{+3YjEeKc!RiINuD%CIfPh=t6Bbh&?#v}09dZu=kB&nM`S0V%HxowTEg-!t3rCY*<-P)Ws}-@l4uGPodz;zTgQi3!XNmbr#}NxxTO6eW467JBB4*!DNma zq+gWcH!laM>(a?^BqpZ1iaI#XjW2rLxezmVS4knBT6lm#uB9NjEGO-82_i9rG6#x< zP9o17-!25eGPZIc=q1CZSS=GbUDE|7(BdTFsI}%U5$^8 zl~m^+>NS0(iv^X9?8>aDaO9(+%MEPWabd8S`*g-0K4JP#Y+Mgv4P>p%d4{-X8{SG~ zINu}NH*F)GyDQk?GA`Ga@4P1534QC%iCTD{DW z7c5;kUall~t&|I72fpL3VUbwr9^LH9Wpj(Si@zRNQ#yUrbuA%l`!@q;b}u@+GVA_X zX1hCP&Pe$ASoPrRO7@n!e}ALYG`v&FU--gP_lkqL()PzHzPk-AD;<~lE$(d#uN7bB zVr#DqwQNpc*2O)E;!hBL#0_F(raNv+hVY(!h@uu$y!KIP>T|B4W#r00j45`;if#Eh z-xvKU?)GeZw&k|pIUi+^$55>J`-I;P0-BbCrY>1=LO&2-R>loK9WS3xck;;r;ESjzH~pg|I*;#XV*6V{TBOT@r|XIsbNch z{?gIaN%L%!Z zSDxGa5sdMs7i@c?kgoQkp)2URmNnZ200*9_!aOnU0{aN4L;s?K9eV!le zm^j=>UHQS_b#~d$-wy}t;dVH~y>0baQ53{hsnIuM)1xUb{k(qo{zWdtP4EGoRHwKJ zMUgiZ*(q>eLwYTl(#v7!Utd(n>ET}hd`KR$$`*BfKVX{3ZJr6_Xwvli)=J`X)^~xU=KcP62PexX2C@vUd9&sgoQL` z=Q_nY!pbasa2Mn5kRGq{;@Ye)zLk#A#U+vTp~nQBlw?E?Wx963gc2`mepzjOHv~X6 z_XJC#q-Hjew3AM?9;Z|;HKJ&h$c2!|YQyc4iN!kC==K(`@+y_*%4$Ad#W_b=C2XPdb%}5-?JWGiV>6!iCjL z1Y>uZwITd1$-&xfoC$Z5-BN_;WW9Dz<#Q;~UEL{NU>;eyKkEz=A1a0bnhRveM+gkk zA~k0y221z@R{evj<^sU!a)|n)0xgE!i3LP<6fN6hD45&)ZkxMvs|b9 zT~XbqtWW){QhyxOQi)6M^Vgn^w zVN!_yM5?!i#8h}fR8o!N&Z%B0AmN{WdxG)1<6OSU*fF{)063zs9JRTQU46D8q7XPUmp^q+vkGEIsWqtPmu zt_V>jk`6Hlt<+jsqY~X%C!>l$)Qz=}f}fSDq)AM*iSg2UHlo(@tt=WS>;Wjn1083%(De&f$Hen1i$wR5@rdAEJpkk&efF-fgG_`s@NBBgbnJp^gR= zT7;gzDHcbhM4>gbPe}RF6lKD6i@3|H$O@;`G#uFc$OKj#q>XArpNQoVTrMlP_A8v= z@FB{KuuY^a%Ed$-tT}>e7n1}L%EAqzQ*yq!5?5P5K`e z{L(i@8AVkoVGKa|1^iCN9Rix*;W)#*d0;-rd06kKb1D(AcvWH)wtOuPmjJj#Xfd9L zKjCVj0*kdO6J$iHUrz0XUoWWe04{)AC7c6mj{`?43hv8-t3~Bt)hZ?tB#n-TKpcoL zm1wey=_0!T)x}6;3VkE)CtSzGat7DV6elafDk>+CLs3iHk%PzRtQlltBr)x&;0O?|q;e8TSNK@3VZL#MI zSY;0rgl|Ad7b(&Rz?$Sa0fM&5uK%a9_m6L)OxwjL!^lRDyC*Z9wxJZ7nLJIWZQ8V< zKvl4rCzEtq(uV#JS#@m_QmB9wN=4S)mCSUAL#b`4m6vsWwbZUwmlZ)|S=V=ML%@Ql zz~YZ}eO(J(Mb}l^hFY=0xl`Qz?m6Gj`Qyx|oi>xnWPU!+^<4LLUpGsG&oIA8%;^T8 zw3^}5Bjm%%&_~79dcVcYg;syO9;HU;4egb>7t2X;L6O5bHskBnP~{*eFpW$pEM2RgUBubyq6_U`O_@OI)%%=)@LuD zLT?;-e+*H`6oNB-lgPUzX=ed=@Z6Z)&|9vIoAUn8E=xIA7yHjDtDQ5NT@I#l!N zl4n226>oIbOZ6uISOK`Qn|)^UgTT-#wzH-kbZ&+&#CPm@j6``~A>` zl&et0UYsjAm~WzI95+uZN1wF6{Lr-8`s9%*FIhB`ls|vIsr@}ZuH%a6{`t(GxvPt%Z3{<=-sWCPif>Nc zaQnRKx}pP&)9K(Y@Ru0rXQE^2v+d%4Vc^_evS*6T8khioOu81lnGGe0tf=jbTk&mB`R-W9iPe<{-&-*8zK6dr+ zj{svIa*ng2bttfEC?IxhzLTBF2}s~<1$b>MVDaM3X^;^>PdgE$4=^)e99EnQE5b^T zBxl$Q6`#42W9MIT87AsFU*@0fdFt- z;&Fa5-Qs-x8b^FGLa_j8lBaYM!8ONJP0Fak>r&a+fe}%u2 z6Uzor4uHIgnf$ZLLeg0o(}1f?*ClTX#6+7kq=6wTq!Q2usICfNod`fViE|7EVOjnN za~=#aQ9D+n{7}A4L3@|CWoT!a9-zB8B~RrdBvQ~IFWORurPiVC>N4=~8&;E=SyE17 z_z@tH>uEp-*d@klIqP-UEDx>#oPgaNQm7!EM1kho{1l`V6qeg|U>eidShZue43Q7M9P8wC zVU_Fxg+8HLSqfA^44l+31Xw^14T#UK$iPM}fv``ECQj2lSU}#mtKG~jp$F)V3QH!N zWkYNSHaunIEV5Dj^4T9rHyO-Kc8_SzS6nJ*;N@PnKoTv8r7YKlDL7U+OqEeE6vVtB z1M%x>lLa6dIU#Ep_{=b(cx<8a4_b|B5@lLNd(|pYa#1Qrq){-Qf=(EIQ;@ z@FmGQc-w%jreNg5j6qc*%s}6tdPI)rVD#Z)VhWO7-l*i#Brqu^V3>}2SQCP=v1u1a zm<9P^2)J03LR+ig99nKC^7&LLf;G%SlIx(n1Ad!!mnBgZ8l9xAl;lD&KyW^wM@>j1 z2faW?&(j7K0$51EjwTL43}dTVR$@Ag>Nx#gP2SGhqOwP4W0G2{@yiFo3+pnAB(ajV zv^V1hxqO(3XomTc3g?z6--FYIbGR7a!J$pq5VaWFG^EEgU%w>J(_X-4b)}xGWd2?l zHoKDKpu90=bdwsk9g)>Na9339*wL+ib^m%7V-Q`K8Ntv3ySVgZl7kbci;&m=>O6ZZ zoCR->W}?I;g<6DZ$#%w&CDgb)s!Ie{)~^x@-zt+X-WVR%YC2(M!aZC?xD8;j*-H~d zFKtl_X6~cHYY>~L1yPL4K>rwq(@+nNCM>LG}J+LxGxK;z;z=~#*Hf~WA}WVJwPW* zwK#25zTS6H+}pEi7Yi2EG=q}Z9!dRiks>8QvkHc^-Et$deRv07sXV&%4X(C7nvD7#kY+j&x|S33vrR#`q< z?A*zk!#h}pT*J=)x)+RkPbVkGsv$DTv~9vw-g52`u41a))1tc&kTxXG`Hmx>G$Or^ zWA@DC#~7|~F4H9N3?;f+8sEtb`jSK1sq@-^maB1HUY4^QdFFrITAT0nZyu{@`LR5X zp8476Huu*rz3mSic=rHvpz1p|Y28l(O(>>W4@pN>Tm&HoWHF2@uk$R3ja(t@#P-+SY42q90ed(=7<0qQyHvc*G{rAVq zJP$RNoH9>pjc?hUk-AmD>`_8^W!Jq81A&chd$VF^J7a> z>q@2?3YS$mGUFo7SP>05d}B3_I_@12pQRo2r9Y+mtA0^+Caa~k2g`op(uy9(Pluv! zCfCv5)i8H6ce8g^ZEN_ccxa-}>=%cn;|G)?sm}aCZGX@^rqyh#nzr(t_PG7K{~X@G z_tJ@F4_^A~qthGOUwyyjD2{3Oiod&3^Zfa3{2jM-M#dW(|C;l1*5y@C`|YFnLv5;U zZRfznl`Y$+R()1fx9DtAyk<*X;YiUTcf1s5I6qtbt#jySk7jWxpbq5bOwXuoQQ~5(?yk#= z#Hvb<-#32ftY5g2bE>3hV*6h*gg>`_Q@SeS>en%EQ`=Ojp4Hf)<_;{aaNIgM^mN^# z59UvXGM|hcY?$o-BtLrZXqN4*eWUgxpZy#k99}Hi&!vp7S&@;siLPNv_?CuA<#vDe zf#}$7Hjh~{_Q-9Hd1p4ah&|FW$ulZVrJVIQyyAXu)pxb68HM*Hjn&|~`$ozxML>A- z_p(OW{hsvsT^Cn=UVA9h>8bEk-nK1wTspe#?3LHm&ZY6Ho%?r9J=Xfy2PO_wzP0bM zNS2({=x>bYpZfd2;s-Zm-YNZ6-E!~W=8u28x-REKJpFOsn|R+;RDWilKQx{G?pIC; z3S1Xeh`D0=;gndQZ1kTj_JUZ3or{m`w%!-ewr=j%95o4u-Cr>TYu=iYzPt7s7Ekcq zaWLryguOY{3kbXap)7a)OyRdBX?Y+?IZyAlcdWYo8p1w{nul)4*szCBWbz*OJ-}-Z z=Jdq&X3u}8d+C=8FFC8SsvXHKFa!zQ%Wb3IabDhDW4{dedOU%z!EiA(^hcn(p9i{o z+NmwBa8yshkhglOIx%Ac_gubRY!b#Fn&G=&(%?gPuCEiuj!7A7H;M7R*FIHp-xPn$ zv1vL7gfrj4jDGU@riIfTeAAM6JKt0s*R5;zW$bG{);#p!g)QRGM<&H~z}N0JhxY@1 zIzN^d-H#s+e)@#hasTzHvT0XQl?~XUbJRGQtu_H$et)Da&_lN3D`mR0_))rB*YyhnMdZmRGk^cTuB0dDgs0J#^{P ztNreS>J7Ov;Z3@)d* zb)(XTdlWtyY*&_RstDb`Nj}3l5b%BWzrCBspeS#H&!P*d>T7f@dS82)mx(lOo6J})uE>u9S8?8L0fLD^jM5$Jv`b7=K6px zK}i+HhLwUUn;Rpf3W0A4L`a0H$O(?jDjN$Bv0TQ)!`#(*vzV~RQA`DRwwOQS#{gtR z$goVW>6BUUenWt%H(IFP<7l;oJwQ8semaA2B`FXg_$gVcXt<*pw zIrw*Hb&&{D1zOk;oKHkvU7 zH?(NZ(GB(1Ha8+I5e)vndUC(=kYG;Ut0{c;4IDoZmV8L{7L^asnEP=a5e$3A=T;@%dVjQ!cl-CGhQR7ube@dOt_;|s9g%`AL z4N{R;YCD8%#o1WUr`kw9icKMmOM_nB*mW}7{2niFns;428>~#CK^F~Ax0QpK0NL1u z!=Pw@$5SO-lw~iU@D?(s^M#5vrhpZv!LDP2#<69Rfi2+S<}=0iA5{#T2WWfQEpOJy z2uVkA5~%u%7&;Rvf+8GX!F{rbC>xPUNnM7Ck038&AEh&GdyA5c^LVvX5L$!0vRKKm+}H{V7wHRs=!jM z*+nVhPLv-n zo#+*14~!qZv&szS2x%8**9XA$^CNywKOuxwZa|o$a7F?oBEVF;3#7t@l-;2j^XmK4fRWUR()%H3~Q)nyEUaz+HBr03&al^MYHK18VIx#oup zl`vh*cGBiPmCseX6fOHMZL?WxLB&eaTKT+ft-U9rpWk!SKssfbohN3`s^BYVv5lM3 zn6g66+s{a=*+MRA z=cx}okNt1%;hS(=4}RIchcESZ%JiG}%}3eIr59K#uju~8{w0%aXl~EF-K9clRR;Ut zw)ZkGU&0P|ZB=E!Z@c%w6z!X*(Heo-<5+vJ+qv7nYFBqf-x~Q=wxZ{rtI^PvXj5rR zs0ZbDXDv$^yKU^rfkoYE{}uag>J>jdd16^AlOeqqT$__0>^%IkI5qqxyKs{yE=!%w zS6YLYo^QID-RH|L2EVl(Tvoizanb#E{H<1$ zyVJk=yWolkN1Hq?s9()_Klu084;^{>w@v7cJv-<4W3L?fL-2BxuY3Mt@Cg6F-ig*v z_uIC{E?2y^)Kh6+7I}EINjlOuxzD?Q-(}cY0odvN!&g>c;g+Ipi^gi*_lgTz+!tET zRe!y?XB*n4P4?_|h<{%6Q*H9?cT4WL)Ysrh9uIlya6Ew0w|yKxY%TspltO;56XhH|xbBX(es$=~rUX~x8g5PO}Rbuq}Of!I4Fdg?32%}eye>75B~=0^TmfxI=Vl+ zdv=z4zUY`S!AakeGD83VbRtmJ%d0Pjk%Joq<)~uFIy3?tHt0lB|MpKciDw)D_NE2^ z*yk{0n}^)HE-oX;sMNbdfOBEzNL>Z zJyuc^=RLqQCuZ-YfJ~&R_-m~Ol;<zOvu1jBxK-PiF<0Z2I3FrF_3+*Yx5i2ynJ$JB$cfpm z-TSsB11-I+IKfSCh1vZH&wx*UxC7C`d{Inz0@-=6>U!&|4{ zxk?ZTIR~+vPKrTSngGqkoMgDRkbq?-O74nTM*vB~GN?;S5KtS8y`F$>CIW4$AeQ36 z#utC3`pvAQ$N_Vvbch~K(FcpX(VnDpsIjPkb8oFK)cBMlMm1Yk;?sCXlm$O}pMF&3 z0aM-ZJg5^D)zDurAc)Na4jCPls#@RcnzhD zITcAcbPvOsmt%9t&F?};1k4Lvl?5aQxR(o8sX$(ONg*2==CVEDnT80(&YY`us@ZLr zw8&&QY9p)|8(anxkj}HZu!{^rG+hbECJYoz3V)+aq#=<{a5yHdTXGqKqKl*0rjwv! z@71_mk*#D*=b3qu(`GJ<@Izi2yMe{6VA46H(bOu`sxp!5%NdR1S&6(Gc}O*PyU^8u zUEN4T=mc3t?U)^s=0u~COV{2ja^5Xe@+m+Fsr6RK+#|CvC*0J`D6GQNVzk6?3){bx7+K(kK_iq(Si9Mww|M2V}s|6H*&c8HI2eRj;K}uPk06 zgl#G{hssok-5WJ^m~oMQK+CRBwh4zgJwTqUh;4@5B~{I7B!yuR|L}22u-D(#O?0 zT^ecTt?50G7q=(pI?>*U&4bY}?QKR>SnS~k&j^AuH`Bh57~+ zFkX06G!B#{D@MW{f(&Bbf}}oMlNqalu3#zYeAqlv?UsCS`Gi7~cPUIC;;^}MKsXJ1_>li2J9@EqjR5N~jZ zptRtY(P0XBf1+F=eF2H^HPUh~SEj2y(88Ec&axt*y;0%;RuVZ7>>*7Wb(=A4R?Ne5 zR3ae{et~{lq(_C8?J?FI2?;(@l>{%9B??lm*oAclHV>Y!YM47o2jL;}g;aPNud|z< z>ksI9oB1p@@{())+GvOGE2aD+ohlvJf9A$eF@Ydv23Z9vDdcF3hPy*(?J5cA30t3i zNs!A|nH)8$N|2#0M^{l|7o&uY5)YS}5O>PN#cXmX(g{luUzt4tH$Y+nYz&G80tSch zq8ExJ>^M#;(S9Z6hW33zyLwjL zBY-M<2P7M84`~nKf`R3F4n-5~k;!BKdD`2MwZ@zM$cl`G6Zg~iGwUwbE!@f;4jkIJM%)N{H+V?*aPm-!ZCVb z>g^@IG2D<5oGMbEV4Ir98(ynhaFPCIGO$$2A^nT4JaStJp5&g+m^*QdE@U=!c6MbEaNNTbJIc_5ZT-MDEu< zx#`pc{KcG=-j05-Do5%w>Ras}$h(Es@l(;?uJ0UvP?#QgZdH7E_$z(?=E;AoFLGpl zd%QNUxim8?vn2Ul+s6&xwx}iB4qW(_ecHeIa(q$l0-#Zn|dF#{_ef?X}S5}Yv*83*y zr@nlCT;A7t>fG>yZ=TnV3?IL^e|qW8ITN_3Ddkd5&68qloqysr8jK}Vk7neJMUzT4TxDW+N7jAfUpEoy zNty=XH#V20h=!|*3huVukw+`}- z8AbLnr&yOzWPgveb3g{d{2SCROZZZr7al>^IBN8-6#qyPA;<}q( z0;J8{xuhw7>~Abcxo5Q50JTfjTy#%6k9ETOM-#JqPFzWW-^i*Hmo@l3mIHn;Zvu<{ z(1z6Gpvi6rP4l0i%j-)0HAHNI~IkVRlK^M_Y{eeE?I%a2={EyRd^s+ACS(fGH$td>DtcNMp5E%IYtx?Q2go|vh zAa*ZMg>uG_CCjb`NiBdL1`~^YdwRiytZjwZ_5(bJDU#Hc%c6UjY@n-jeMNa#@0P@R zmG~%TJOLnu(3Ugve)-~$F`vtJVV1~*D6rk&s!DKF5XXeDaH6kRPWucXNOtW4;srnp z4_yv0O`sW<6~PU?$5)jp1*&X=oHI$aNxZ^~v&u;?4oDk$bO=M7kf)F;+N)4kN?(|X zvV%ypLod6m(bNptcmujehDs&`DAPZZ7}mI05?j@+fDvy?{ekrm0s{mN&KUC*9Mv4W z8oE7@CnL~|TST%9IH&ngcgTfC&2&3^z6b4R^opq#B@p7Q)wA4Kgg00lq8&2?FrbIVX8Q*7OTerywdE@sS`2 zWN(Ow^r5f@GH#M9P``Qym{{3N_*f}Qi{R;Dwg8Oz$ZNFo*#-+)gwx12{X9ThGn{70 zR9u^#Ee!}5V)KGsHrk~d37bTkjNuQ~mb~wZVv9i*0@+~E18Qv}k43xG&mlXgi!`2H z#hcx7G^LybG#CzGQ&eU$_mqc8AZlH(N0cTGYPpC*is^hKJN4M#2zUU*deE~dWO%Ov zAr6sf1Br-0SZ>tAx;l{1#K7Gr_U{RsbxI`!p;tybG%^fVk_ZnsJavOmIEP||d5{Ib zgvzp`d@mNQLkNZ=Qa^;bM{ZXzXmTq@;6cK0Ah@^|>M5 zt5N)FbXFpv=$Y8+#ERKE+cThc>kJ)X68my$rfM{=@*4r)ljA_4&S_B}}OS#=n zw%Z)#)m%6VMGsSg2|^&!Lo)9*T4E|rzvVBMsAL+#rU=g|yEr@7$_Fr0iIPHc3JVXb zz-3cB1g%1XjRMGghPjA!YB;R5v5>srBC+N*Vl6DhbQ2Xew#9$(SeF%BIhL=*K{Xq- zZBqMX-!2T6=9F9}JEg%0PNH&f3s0pnDhRV8lsGS732CmN<{Cy?IR>?iuJ4FRF6smo zp|WJGE!QgCNB<`f&0&!wpczZ3IAYLlz;h0wmc-z%9v(kvM-rTLqQM>v?(mVwGQK1T zD@mr{OQajK z72iS098;D9hcK|+ii$*UQ8ZT?lpqGmiZ-jaoP|RVpX>LC$wqc_+TnMCPhT z&6K-Xi(u5x*K01aEUNEl(|Tl@%ZdB;eT8}7c+%~SYf$poqLz7UDvxiQdw{t-ROAm_ ze!9gPFJkjYoAM??igoDNnrwejpeXOyPloJUJdf~D=!ttKb@lyhu8>iAF?i5Bd6etW zo?l&8bWkd0Dnr{!evx@0YwWpG`KRVPOVR#;xb5>iZG*I?uXW1Z5%Q0=yg7MNedAP? zP`g(deLe(G6kO6=aXMNy)*I;U#0w-v>%P{JC*lY)95RW;~nLWf$3=Z&i=PP zvwnytk$anTzUZZ-n0vuwuxeY`)#}WWwcjFU-4O?VclFoos#~7$FCO=L@lwUF>qvf@{3A`@BQH^O(vu;@=&cv09(WM^tAN&Uhc@{tg7e3c-i6N(RQMpF%jiU}i>3o|C~TPkK8Q$Vh}PXe9v zOxEH)H46hm?uMkr`5%UE?YV2(>B)z5#ZmBM50rsOx+3Vm>0LCweRD-0;A4@m%i9$A zdJK>*Fwvq`Qo8j|@m0qhRdEny(36STJ1JKZ4EE&q&7g03G%-8otXndE&UyQWe+S5= z-|(^hHNYwFr>`bvPkjC*{c8JUyZd!Wc0APH{MzLqq4e{NeZenMwKZRW>-*~V5}2KO z_KH3BELgEW3+9JR++G4rW|fVFV&#C41rZ{F*TfoOfXxIA|df{6dTiv9@Nz`m0HQmdbY;&tD?6GRdQms#?R&?n+>{C99{(6 z<{}%vM-p)x8$(z}LPc=9M9M%CkNTKlG|&|bd5e(@sgL#Q97@H?@S|gw#z6&uWpl44 zBQeKVR$D#CDPbb$0-r?=WN;YEWsD7ctR%~gCWK@s9^wJe+Soq(_97HM7+Z-1uN{OE z>W&0WxKSVe%~8muA;54X(HA7T2yr<>fEOf!x<06KE~;>4f%;R`AXsT?z^57JkP;rOCAgKWYNdeowSdQ% z2m9*>+os zQ7ea=3zdQ892Gumoeh?L;aR;L;&{=_x3$I)k#P1RWZWijd`u&HA2apvY8Mi@wl$L4 zt10r(XR;8KA#F(S7BoTe2r)@j+(NKj?b0?(wH}4yq?{#*bYO+FFlQ597zErOT~&lU zhf_thkx{u`iRkjUBvmMs`}c5I69~Xlhy?s0H4=ox)!ly`>{p=<|A$3v0K-8rlty!| z2e3miAa}JWlpBN|fP0RTL>EseGnWz|&-%gxV1Uk;i2H4T!pso-2kS zG4&&k3z}hIK+qDBxH4mFt@^Mk;Cepngp@k4l_R8H1flxzv%?@!p2I0{3mL%IAt9P4 zSW~x0RDqFXXX%-g1#vwv$U+9pz<`YcC{KW9nc$Xl1c3(MaLSnrF&#l$X+;Ry#Yl==;!A(T~t&OGuu}{Hy#V#go>gT@)qLr|yD$uP2 z?~?F!gogs#9hV}}AzF0XEU|Z6x z+Vouvu^bU$+5p-dsH+O;8HCJOc92ZHJuwyr>}bkw^dS5+5$Ey-C5#YkT!hjIB)9wQxT$OWTYg1`hXxujb8 zlw8{IlznN+=hOsBVP#v-w3veFq4I)6jn$#BKVQkRtmBm&t^~Jm`{%p);aB~KMFky0# zo5#5DY$#pFrEA(kclr-k_PVWLRzF|#^7lxLw;y@63zB#|BtugviV6fU-90(WLD41I zxIUao7NEPF$n}GTpbY6rabb=$DMO-3sutZM%LeFhHLZt-c_MvBe>Vue5Y4lDDQ=(x>37I5A?M$_rz zPG`zk>FwnYE}|TTg>>@X+C2B1S9=ETs>6M?xk|?TmYyv`&CK{Jrt*Lzf6^Iwr$5qE zx*9tI7x*)=3uxQnLun6a@3%Sa{-;~=ryFrYi?}l6&}!c-Uol`iIj{yFo5J3G zRn?S=e({o&vW*={pHj|b)V_!s*plooSHE1emU9&DuFepaVt@93r5q2rd!(k!2C3<( z_*DG$+TWb&)Z%ON*H6m!d$!2wD}rS$^0`P$Fq*^V+dVOPO@F?{)G1z8cy@g{O(2hDGNTag8fkmw~D!cRYvNS`#s53^gR0BRKKT%jeCl= z6;7WylRBre%3pJNXtVtft0oTHitpa#xJmowc=Lw-Cee0K`np+a@*Jv;=NIkozj_Yu zN1xj#rM16BmF1rVQ~Mj(>eZd-+?xl>-_ak)uhoy8?HFGTSaUKz(%HU3>+G*ppWI!9 zoKo`FJeOUV^by9fl$?naJ}s$_&u}ha<}JQ=Q-*hoM2ly*GfDSVjnP#pFaGKCc}M6= zRj4laAGQMr{}lXv(cbEeoR>FWSoS4qS#&6L9^2vwHCewdN1wDhp8fGahnnwwCep-@ zhN}040-5J*E%M>~mbK@j%w6*KxUl|0TnN3j@8|fj@~r+-lalb~{{do!IEWQQ>rBGk z|0Y%t<0C0q;*6#NT(lwQ60{GmFtL$UP)`&vtfR0df3y%v@W^x&wjny(x1+%TQcXR|67YKg`^>ZU+>}?rlo_xbWN2&Gw03-*2Dz zn{#fwDd)w&)u&VDuJ*&{fJ46}tI0ieGt~Z>N=wY%4}5xg%RRs4{eL_sjBD0Zq^$Pe1;ktPzFD~BQ;H56d~g6kh^#Dpsd z(p=HZh&=7m)DXkaVu}HA%$@FyLtueK4ANmNQS511R1MD_(kRRCd4oL&y4@QIEgLG3 zYs8Xs2X0#XeS7fcrLbxPo*`c!+i9{T* z7le2991@x9H#&CfM94aJm5RijrkYPhIXiF2+ zh|UoJaX?g}5f*^I00+q~=~}FiI=yL87OWJskU+aZ>=5+Y1ke$QWc~0d26E(x@GL?b z1hqDT_r(N&OmuU~lVAP-0hQtwovgG@5$!@D@1s=>YmHbO#CdGFnPfyHEo+rTOH>ks zvLGbhi#J5Jj+$i?jePGcu~2BO)z|AYqHuhA`L7 zm=rT2BU*o-9PS3UUvrLXz^$|~O*Yyn%K)Z7(nwk^kboC5#ctjVHW1%WaG2jurdf%9 zTx3G(_^+wt*~BUP*YvMj16&!djT+Fu`g}C_3pc2EW>(>5=CJ231NTo%zyc8kTpkH` zAb_I84M2SL?oY36`k(jS%qv(Waib^+toLtkELjwS1v6WlnI*pC+PA@{ToCZ&W>(f{ z69t=wTVvy0Gef?VI3(|NP2-zIj)k*8pEMvlxo@0Q#UwxGV_H9bi+~fC6V4mcdI*CEiZ#%+=l3 z!#nWm|Cr!7W;T>K#P1Je@Rv2z|FPEp<>l2=?kX`og%YrJD2Yo&yhUSTi^`^)60H}A zY${G)q!DwqnK$k556Hf3@UAB;6pE~^{cyXXSF?&q4-DP#0^}=(f@SYvRxze(>_b>^ zgAOA4>IAtlK#5MfVNm44P+*DZaC!o6HJu_-y@Hs?z(`Lg(^F>N5N-Wtcw==tL(MEN z9}d(*Kp!Bo4#WC-ED#a$t@{n>vy*1a2vVe@Vm2rs5`%p_C?;C^x!Rx@QO(Um(IL)a zoC&KXQR$GI$zB8~KPo82Oln^GJbv#SpP_6ejyR>n=S(q;h^Q;0Z;f63f13UmS9>&$ literal 0 HcmV?d00001 diff --git a/fpga/rbf/rev2/std_4rx_0tx.rbf b/fpga/rbf/rev2/std_4rx_0tx.rbf new file mode 100755 index 0000000000000000000000000000000000000000..7dc16e24ac0936fe25cd9ae40d5dc7e8f6a2b95c GIT binary patch literal 171213 zcmd434O|;lzCSz}NB>#>-F-5X0Rp5=W^xDvqyz$Ov9^*q8NxuJkr&(g3JGb8Z7r5! z?P{;h4AVG8q(Ir)^|~t{Dr(o-+SOjKcO^8f*zMXEtM+=mS}1mL?N$jXMWpn9Le+KO zo@ej<+~@f`L*|#6lXK3TIdjgO@9%rQhpSird|UIuRVTLMJdOSJ0ruxH|Nfb9TcvQ@ zZ4D1BfAE3jn`Z2TE0?WWxorNtayI4Exy>Jzk#YayA5z1mvpARD&Hm}*V^b&;guc*) zzyDA;NNH#P{~CFSjY4Q4n#c0;c39A%9sISi5VlyL5COo2mmuqbGiKcH_qb{(j4>=2%9KnG#)EzI^KgF*ENk zN)#SjwCK=v$B;dKC}!RpTfF$w88dVGU(4vY{_D0j)4dU^wFbw2kmu!p`lnAnjG4D% zm#|F8vPJtpT)3%2hw`^v`S8Q7{}eNeW2cLd$(a?i`LVM6gLnBqkkPS-&34=|Q-mw; zy_dgu#>|`|^KFS@ZQzG3;cq^`|5iqqA9$c@dCU~Xn$)$*{{J+i*u@UvGned-)kOdJ zx^>5o%$S*qnQ7!Rts~aD?6$u)mRU1_|4>FVooObcJyS=I?wv8;XZdFt*~WdojQAu* z^QWQ>jjvz-<@uO75-S=tAxV1eKc3_NLq>TE&&?F(SI=`U)1eh9X@QFHBE6M^r-_h1SA*TN~fp4SGbT((tV*5xj$H-e@XE&5ZadhIZvo%z1@^=%jm`KrC>yQp&P zKt>T_znZnN5849;EvCDc7Q^~-EB@Da(Pw_guxlA!3;f~nS69CNHs-gXv0T;fqNBW} z?=!;sy5XNrVzIv4zKgGZUjl5$^Z%Vn_%6e1-|Dq1IKR6sQ|ABmg9x!I_R2@Er{ESX z#>iL`fhs{|NNA1~Er?@JCGH?72xxR>enTcGGmfz=CX&nvYL+=KSj`n{A?9LnRAmOO zsP;)R25ee00ZBiJRdbjwVtpNprG|?Ps3;;p1y!94fiBwOauOuw#32SSDHlb-0=Uy# z8#}J z$%JgyU|g&Qp@`zgY79M8H-Yhxfo2*PAUXvot*DdH9bgw`m!NcMD4DDgIkOhSIt5in zV0~Iz>n!+;|fKIG47MVMTK{yuW}5cG)T|^*k=7h2_TG1{dcQ zF|N(p&u8&07tq2KTuGaF){QxZaz?~-8jL~pDHf2ZDHPzdp_$Tn(-^!S-=Le%$fn3;EwAb`)53Sb2!E{G%` z0Y>V&(-}-P;{nj4IyE$Ukeq?jwg5U&o51oUWL4C}0*3xO&fP^h8D4|YPTYn=eKDtyj;c@j0EK0cr{9Z*h#ZVt#?6O}EcYcbMz z2F?o5Z7^_$w1kVpWgsXZju4zQBvO=SPPx(aFkxlEDTc7!P|L#ZG`yH%{WOG-c6(VD z5yyf`rd75OOo;(cn>E)Ph*zv z%FM4p)PVMIr%0-u#b`D~kjwc@kl78`=lX*QFtL)yO0-x?8AZ<>a!Le{f!;tz86`Ub z3UsVmm9%E%jMTKE3-E;;2-b&*M{V*pB0SIuv3vI@h}$qkgLh+rS#glM9$isnuvTy@ zT~I^0sT2ajI03}teM%=ZDvCmge373nW$4@>jTlXMtN&D)JQ8CE_Z( zbn&Zg&^SbIXwQbQ*hgo$>7}wwJ3uDB$%Ok^F|kL4b5m;VE1Ceu4b%i93ghASE2n^5 zFGM8PYORG?-t-YFkG0FE;jCL_rnGj6*tAKK9e_>feso=22gf!7x>k9iUCscQ8NV7W zJU73?qCW?g=icnUZP+@TJKu7jl5De0oa?ev!^UwY=*b)hl0B}HuLBcGO(tSo9`X)z zlR;NLm|Sgr8MOSqj(UnUxrb^eSBK_$Ggq3HPFPtFHBEU<%O;+;c+!Wt>6*EZ3Z}e> z(x2ZEDFLR*hdz@-a(bpdZgepJDg;n%Qp^F@zInN6Fv2eZwd62Prj5{ zxCmjtiI>tnk3`-n&h%EfQ4)JPytMAKKT6L}Tpaq9xP(0}M8(kS>AwXVk3S<~O7saE)8KO_>p^Vwtq`&mPLBCeM4(Wi|>`RK)MC zE1!Nw*a{*mT`j9OPPyd#MbRGb*38M(J@z%@q370i*TKniR@1u4)q{18Y4BNo;r^B5 zDT8%zx@Ozf-$X7zQ{Hdfn-6_60ILrEX8q*qXH(ahF1%qq<9_J(7Z**|4cE1wE_uYa zrR1RS@w=Z?Ouy?ZO!wH{a8JPgRL(Vh{>ZtH*$KvH%55kg)g$yfyT)D_NoD5pcANNG z@JTk+X1XQPJ-B*)6&&}bc&PE=t}1uEYkVbJ)$lR3$YrukxI&rdwhEIqpP{<$>AtTA zRcp7k>Xzx}yq<;8)xcCa4!n0l&$7vLsh_?a3IG14E&Utc`NN{=jFGy^$(rGrRQFD> z&;Fh>P5<)9)fYDj(b{$IGzb&xwk^2mS#y5fQ~ep@yYk$jwCUT|f8`J|dAn*ZTERt$6c zXvo2vY#P)0o2Uf0x}Xpt^2bAaD^Af{l1>^PnRC*x%-B-%q0++grah;&)rX2F23t}# zdylCLj?7l=u%~}7Y!APn{Br%=gcIcx6rWmdCmYyH<=*?4I`Xt5qEy%>(H=QWnLy-O zDq)pr%?59@E8gUu%2DzQB9_DUvM77lPR2~)2lRBj*OND{Z1ixE8FScCg%UfKuQ#nn z=>}1{iFze}`GhZ=Uon*)wv#jFmlx~E=@uVK+01(KqRs5`mrZ->!;z5v{5Wqzd$S!* zxGvb?890@$WQ6y^-M)7|iXZ+3!d8?YVptY$L@!v?GRUEqCdXURi9XDuS8g8FLZPpj zNcZytyu@PxgAcu^1Jp3oew?>Q&EQT@s-UspI<{T5;>BDzs26B&akh}6S;?%R?SKM-*TPQT@hTTeetR6;_Oqn%_5LeUs0cP}ZhD5vs&z7xdkm~I#kX7dm zkPo8zomJ4-tMr(|QW1{Opi|qzVz30SwmlBSWD6pp-5UABM)sXagp-q;6&ovz z6yg<$=(u0*5HXL4GiEW*O7@9-Q~Yk3f7G^}XsYkhT*JLh+JHPOc7GU;^>Z?q@v21$)Ncw?SGQ8b`9ipjI7Jdwwm!%CjF(*Uplhf`_l3ecWrxlspj zN=`{JXw$TDaG
  1. Kc64kz6rFSp76`63yB`r0LfP=f~k#r{dC7^8v067E)L%g|WGA z9Dz+X+ku(0<&qnUIZDQnGo@1q8+t?mF^QKbEvA^YQt4ZI4k#Gd`0VnVZ9Z+uO8i2O2Uq=*BWx$L} zf{ZcEgpws2Z%)HFOyqb@EW$bF_Uj5LQbYPsqjzf5fJ5d26rLcMi39;#!_~ub8k1VP zMJ9;ge$Xcbi@lsZjGtA`obrQ`9wn`k6MbpX6PQ2HTW)&Kk}X(XpaVZLuq*n!0YMrz$e>m-7crGIwNz3M^~>yt)CtkcLSVOndd}aJ zDq?aeICfJ7a^zzDQ%9gajW!;0N?P=tC9y1O%ds9k1Bzq6p>6%=I$ERGCgLQjA>_+& zH1aF2{e(Q}7|=H2Gzv$r3Q~t6B7?&EMt0ur;EdKXN=&6>yCG#WpIDZX9Im_1JI8b9EgKf3 zJQ>;bo*scE%Y^bX`~0VKw}LT6$)Ep8$Sau;bzy|gJf_qEiF`!;Q@7+HO=eY`Pl zb;5d~Xx#f@U2=H&eY@(`y!!SiUy&ibJilu0*vXZJ3-b99?_@jev5Zz6F5RDzX4*1k z<@r*kYW~!-Fmw4AU8Xf-M-ojvQMJ*uX0-Ap)9|#dbnCiyVE0Y-F!>iZHE(DgKZNJcjewbeYxTuW-Is^pP&6e!)R(`>xMrr z86DeI$4<;|-@0b}iGI_vE1TwBd}b>jWq8lB3-OZ);|uItw_HB(*;a5+rM6UxUT*@^_%4pZ$T9`#ST|BY#yAre9zN~(@USse`;h; z^dPvCbrLHc{;OgF;aHZ9~JHD6yV&v+sh(GOkWpsr7^o=Q@x9+)#683oS zg`Sa~i2?TbyNerVyC1Hv+As=v6Vp*)nl}c$RjWTPpA6+Ld7<>coF31bOO0Kg2fvQ; z`NDV#v%bI+|AF^kFYg;g`sKr*fSGH2j&jUJ@&<#z3a58E(H8tk$B!RN_lJ0UUUwj z>mlwvFcxx@QdPDPWm^AJs=*sp78Kg~&5kG)ip3A1_=7d0@!nF(lXtm*@^CxpD%*Qt z^f2|+;I33eS0k967K?s(uPZ`_o;gX~GN+DQX7l82DxFl=f=DR6p#E@iWUyskgZE>8 zbIk?!W;Tp4>#i8kUOM-4*Wm(t+3(Av6rWjOCqJOa=kp%Jc(7s#S9jB|6$G`DZB?1s zgH`LZy{7g1yc0Rf&5xSOryLju~>-g{$Oi>iFX|kD(;5sr84aLurM3Oi$GhPxIXQX};Iq zKjHdqX7gS!%_+a?-vK9zhu)dYJYo<1ME)y8jo#RQ39=D!!SR_2hQ&}e!erl}Y(G5F zm4B$ZQnWC&wE5)~Y!N)=M|_#9DXfTsC?pasOps;_l3`mOZ*XaO`e=WbpA%?-W*=9~ zvl>;0T9nk@%cz!qku`-4vLAg1$stu3=7`6{PVwn-O|n{~p1t18lG0CZMM&J4M$obG z5mA|Ocrg(t;h34gnyC8RA2;EsbXkYd7#+m*@)3yL4)7dy53TylL_ZhUZB;vi-r^e( zqGetw!&A7tvRh?YuV_J^dV;~Z`*}q)5NOC(Q_c+L--kxJKC+tZ<8_D*A=7Z*YzB>- z(5RvMc#IR(G&#LJB#h`ZwN5C6jVPOcq=2!gyD_HHe~1xt)(rLdywuwu2JHRG$mzFZX|?mRHGs93sA?#=+_ zSw6Pf;bM;}2({H3?pNDY&MX@6=ay=nLY`0!CEadLvMpRXkd@QPw^neqYNFH+R9MZV zbN#%)v2%oyUf3xHi06cTQ0nGHrZ$xm5tMfMYSFw|5Pyo0@0U?Kp&9u68k&W|Q^3c0 zphCz}hG;x>`G4^c6;nhcUw|W64vSDg?nPD#;O`e|fyHl23IEYavgH&;C&@e;ZVzaR zyW&ZQ8~7nx$uyPIl!`4e7;#{e*f7PS+6IVYqC#*1fgw?+5#Ep6Y(Al^f-HY zkqNATPNK+APV2x!HjPWLit0jGLVW~#RAGgP=3w1778$~FU^63&H;|VT<+ zC-=)ee1UAyy0pn$QAiQ=l$4jPk|ddyr%xo~PNfV1ypZEMR{7`zkq&o2dTDGTB~3i_ zndoDxnNG6WMW*uDe4@la#}fq_qu7`zodg;fkhH0=#Lz7>B17BJJO*gW7V|mwtTp`xa|09l=G?UzP3~Lpjlg&eyqjYa(-MWImSR{O%?69qdNjp_J{ZPwsEfru1$d0En2A-Spb4azBTPp~F>hS!)M9t#-jb5dRvJ>gh9qhg z;O?e+11weMolTo@{pOkjEWMw?vnVv!DcLPGorb1o44mstFJI|OfC+G^bTce|GozPJ z-0jl0jbwiVX0wkfvP&$l>@TPb-&N1oo`xy^1_yd{M(v~QS9d*{CEUXn=kXBqC%|2R z%cJDfvL*MfWtxI-^F_g39mb9WaA`*ZK*&D543^|MtaLrQf!e^Hj(^UJafSj)=%g*-$Qwp?~2bSN0xp79{y}UH97oXm2caoWo>#Be3Kd% zr2KnFbHd5Bo=rdPAEml}It6#yt0Hvw!@LQOD~>9#F#h7oD(*wDb(!UBZ}{ewRrFL_ zyS-v09NG5j7yWOMkK8lSmUG=gSapSJnI^TUEblWO7^cPj6YXbWi@N{a|XK z$sT^lH>Et6(f`8qQq|6#Su?)p?#B1vCB4N{p0g~YazS?Hyt&@BDRmED;i(tD0if>A z$?tu+myqpSx`Jh$@G zi}k`6^wi7G&%5GHOBRklbgE*ahI_Yo2i(=1%DsEkzGm0E`2(JfzDxDD-86oiK9#n| zz3&>_bTwRm_p4hy5q4LLqi*%rr@E@vU+Mb5bjQ|Zqh7%TqbZj?i$?3W<m(sxa> zf0F7lMjfD(M}&Ay$m<%(TX49=;hG4=_89!OZ15_ZH!7PQVT9E`qTi$j22s4f!-Xft zqV08^q8B9@Z<#a4`_3>z=p!5z4W*YQ>>*7T4I900GMj6jl2YM7j0f);`TXdtD#hCE1&*Dw1z8;KEaGTbTdX@ab&12DxhwXPp z9Wf?6X2$8kx|_y3HX;{7LFtgGvW>;a@L1CCsc;8MI^hVvRWY>?LG&5(%ZpbL70!No zjS5HoYWbcR6+RuxL?GRU_GbH$3D+L`k&la~)59+y`uv4m7yjtl>izLGmODWFHSzr? zcAP;(=l5LrpP}@=xfLJsy@sGaQFaQ0q8F4%GW%2BpI*)BAsRdSm3ZkciqaDWZSw8X z?LaNS%MxpSW;g~Hc(M@Bh?-6V245*7u%)CM zN0Xu_ND0lNnklA7jKg84A&W^ueampVQjn9+F069Erxk+2pOfn64OP*1@NM0U2U4Fre|X+F-V7 zWfmj#yFnK3j0rzxeRXjFP%9j^>x}>@rYM}!wKEJvVB6B5$g-w|53nJg!UW2>k7qTd zJeNhfIN2-9q(K=VYx_VaU>@(m_yC}DYn>{A9k3LX3)vi&%5XL!qtZzjoC3pY01Gh= zc@j?iJ~|O^jpqso76}AcasVNAN#JxNVuu9GoS<-8B(;Jr3KGu54W-u`xpxEz0=Zn&4e2)`2S{ZA1{1Z_qR=R++Mk0;;4)}cET|Q*Z7LE} z4FIVnyke*1>Tn^bstnzW^7xU#?Jdy_(Re4%sbn>yllGsa94YcHB7@>}bU%YYs-y!Q zYAfTW4YG)LDgt&tr=aG-sF6kEn|kctXV{U zD^a0}>I%-Ob|}0e^JvO{yGS^-eoVYoZW7OQ+_bhe-T+B)At@pH4F@Iqc9L^vBYrtt z;nF4;Yy_kO4FI=r`i|_>%FS7VRZ{r^^WEjl2nPez*8%3IoBHDbA>R@yPg>^t1fh8&i6}94^ zrj_4DU~UnYPY9O6T&gGx6MJ~hDzQC)O=C_`%RpQ=)Q3P{WnxHSRfaYn2I-Zcnn}8Y zW<3CmQhrCWU+5&cG(iK!#&*~k;YGccvxaOSumU-nF0mGh;tO<>VL;fs^(Po*z^E9C z3osg5k7|`hj;B*IP>mdYp$)k>nrzkSRaBU3paZyUCX!VrLON|R?N{ILTm+vkKqw17 zeg(-fv=vnvj{)A!LbPqzuu~A5_6w{5Y!+Bi$>Rm6 zO2s0A%_7$xu6pJMYAG-iW+6quvuN`OGsG)y1uAeGau~%TvZttko#>Dq%zmai1yj?s zCQ!V>(%M8mrjQb+m`$d2kh9s@v~wG?n=Tom zz2yeIuiVL;F9SYUOsLpd0o|JcBS|~t@GORk!>JgOMNn8z?e|j>UeeAi!kdFa6RovQ zZ2f0MSW}R#w#dNsk}3jOm65ZTw*6;PTE|WiNo!cW$g;IG40eHnF0cf^yj0p?R+tWh zK*fPmqE?{8M#Pmk4HnL!G~UpUeVmsT!_n#tEQja_UE3^4ngAZto|t_U!qwky=p5-7 zZ;2uw9zBe2HyI0P*lWi#0N#vVIA{~mj&kdJqeAY0B_xmAhWOKbm`*$?w97(zZDj`S zVk;{lzl1L&lO}-FhaOT#2g6ZBhoEU;JY|MKYt={X5!(L;O?9uynFxmAc)h znhl`Awve}K6BNl!4v5VIFE$I}LGFyQnbcO7K?}cu8l>|m>O9-6y4v~Mk(!9skd}_F z){s|i;hHw*ZzfckuRK#*DUHjE-@z%=-MHt4Hwa@n2 zEnBijS01o0&Z8g9^uVzVUQgk~A^GJEch6g@EVymW__9qUC;87kQ*2?&=;+Nq?AH69XiL0O-?(a2e&cG|XWPD+i1Wx3 zY3n{Tx+YfkW&+Qg@n>Oaf8iVipO5`p$^M<^)f3WWC({WXWTDcDTnP@-YNt$MWXYoPDCFy5(0uTLK%5Xz;dG?*X zRa7*pU)#|?J9N*yCFM(L&!UHFq6g%RpSPUL8Q<5RpZvc6N;yc}w%+-$sPaxaKmVcn(Y6usk>-|iu|$mb@fWx@#bl6orx+xW4h&o-|q3r$A^%r zLllD}r}h_29KH?QH2t&kd?8XEC6u9_Ts@|U@ncUtpH$5POYK)W{?m=;b&a_saM)+@>HB*g7_^Xm%X z=`&YH3tkp>$dgJ>aQKe?M$bLd&xB|DpXl%iQO5h9;_=@^3Y8s4UOaZZ_W(R7j)bRr z*VQHdB(-8r!3 zz;NDz0uPs?Ai;`YvUvfDT#gv>{KDQ?T!g+qLg@QfgXcot(DynNsv(q)*l|m}_kz5+ zW{;c-)2GtGy~d_rW|r9h14bQurjSn#!zi_}Xgq%PglF@k-vl2#Sha2+|ILwjQ~c)$ zKaUP0n%nNm+jz@1d%|$VL_3cT5bEx#D?3kqqda)9F7MH?w;jm`wsK?MjvtCv7NnXg zrW{LlR7_DZ)9(G@~dOHEh?wl2rz- zc)+Tbu%N#e)3&M%lmst6lGW>_ARMHvl<`PGmV zjnUOyD<8ZL0T4O^V!TrmxWj6tjRBa-o{77G#}`&~>O{ zKr5<=HyzWlczXtI7TI~gz{IofbaNC(I~h_SWvzRVBjkj|#kEjIBUPGB<0i}wrB~_z zYBenag=1Og{*W*q@#vEn{`RpPGlFcHmPa=!I!uxqu&bdvHvqGJB z@k&`UXrGZeO*sV27)P+P%doE)z9(yx3@H0ckj0W0*yvjX!XGbk7c zCyI=4UX!LtgCR~+YjCKPnI>8lQTL*{UDHTNK*AJOao(utgnCY^xZ#cR!HS4_A_+c$z5@4Kl5b8|~c$IHy0?fK&%G+fF$pBp5@m-`t_!O(WQSqrmAUg=^!T zL@F8W#SNBeDqcY1*@8d`)az3`n=a6;)A&(We3j)%f-zugm znENR6*3XJ?9jP&-X&}-sQ~Fs;+tEByIbh5^bhZu;XxXzA(WE7j{saLuBcckCtXL;g z#EB3*$;(hJR&Wfk7v@`-loUvoQ=Cy_NTvgtL=EybbsC+6qD5y&Vl(xkAqa6pAz+;Z zE1Y!?2;vLc)*D2XTRu~JO;YDp~62=5h7qkoe-a&k?h?G4&5G=j(TuYBCcJcxG zG;0;vJ3zO~x84`D5@@aWxWru_;uNh78?L0|Q4EaoLwhn20cq4oP zxC_LUGTraav*>P=Z#5)F{@83LbX{~c?-SGjo>ankDG$j~08eM0qXJBGKb_n>8z7xp ze~(x)MBW(aXIdFDIFPL%SIZI;`LNI2h=lf}nzVi3MH{E6yXDM}HZDOf7ox3W&>1}n zr^YO4QPpEEwI7A6u}~gxn2cy{Gl6D784UA`|2Xyw61brS7ECL2Y5;ouBG*24s>6}@ z7Q{gx<-7r40z%#>sT0>}6s+&~tEbR>M=B*UVp^~vc&NOEs^)n2Dc=1nNN83oU-(1i2f@$qpv%e(V`CPcAx@uI()ay=M`*P*PiN z6&U=;3OPf3Ongaf>=kYM)#yDfw60A_EMpQkv{4K%bu--DuA*{^rLBCI&(;IYKS?%{ zuqBsU3Np~hkc1oCS)(Y)vV22-bAzGn6#W#^9O}`E_cn$U6Hggrp8{y$E-DUx zw1H0LlXBZdxiyz_aqLOUVfMk_M3|<2ZWIj3XXc@nhveI5b zm{YKDOHx?CgdOCoumddZE;uTK7FKcJ3y#z(t4g@LD3~d+B-W%vmhGaKji!`WxrUi~ zVU(;lEm;mSerc*$6n`gJ`()K^k2Dm%`uvoGTDmQ@tO`!O7XNO}#hoV00j4Lf|qw~C8x`oyCU1lGYp>ii3-M4IrX95lR5bE!#RfwcH~_>{Zanx zt8X?uzN)lk>pi<(u4?vi`AN~@UXvlBz$bpQzB&KYDPha;P2N8|*FN-^_;`2S!6@wB zQT)N2+`TE6e3Xa%ASH^N#+1RDOL4v`!-uQ8pUZfrZpnMTXv*_Tw%u{{i4^;?ZtGJ2 z-Otu79*o})-)Mhbx{WN}^Kg}TsVk?jGWod-sV<{2x^kPn@ZhP-&p)wgpZ|2_xHpua z5f>GH_tx6Wk5fM%e(K8D&QBkxFN*Yr62f-zBX)$EDzepmJX!dM-#xkjy1(ZA$M4u| z{i1oKd9r)xaroE(5^O)UKJ}^GeAnfQ0?)ji%WsNSl&u=eiB@G#9jLEb|BXYL^IX;1 zUpHQT@cDb5urGUK!T8FQrIJ12jhr`kUJg}U+;?Xv`F4}xQh48;haMiRvyUEr&F-3r z@5x^~CVj9qVRQW@-?RCAG=;BRMReyZy>+*ru_dU&hZGiTsuRr-bUx~;s7Wy){wCNXr|EaIx;+2{fPsjLN zVb#~(v>naU8E^-Cnv3)gJg@AqZ7v=k`rY1N-0pI@Ni>2G4mN^LgY1NS~rGN+(IN~CO0ZKKbyaNiW3ZDaUxpN&HEj!aS8%YwWFUPf{6So7&BnXtETMPtPTb z2p3V@Ch4QJRE(I__>PDwHhEbgub3I3N_=|A^KLH{r7j8;8$mPfsxaQRz@^XDi3*5T%$3Ec|&ntoNU}SY)Bgd+m&u9 z4L?Jvi*mhYe74^?V)zkd$f?bJ@g3IOFQX+;OVCI&5a=I3tGQaBy!7G5$FzxBC+@`2 zfCJOe@PXih^Exb*MXSFM8;1-gTX-C^2^tg!V+s(#3S=E|D+O1McE4yI1w3P*#I%&8 zF20)ObfY9}C3R#a<&qPKEHWVBA{x4-c8D|#D6cdEZdZxE9tH+jn{tY00qv*yF~sf< zpStDgvx3GZ_0nP{0(dOmN4CNws*I!yeCz;MfXB&R)~NBJg+*il(S_Jy+{ZXI7*?P`>>4To0zVYaqm^{1IDHbt)){b- zb1GpVazy}$1Qfj`ITkFyYLXNmRG0A8jF}-+xt!(9L;yi|jsL_dI-9zmrWwsH2N{4J z6mOIq!A{6Al9-6!3J_-RwgA|!rU6_MUtx(I`dMq`3?nL0yi_0yKvtETsV!Csr&lDB zyC}D$=`2PPYUGm$Mnexm@52;cEkHxc0Ckj1;Y8wJJ0px%o#xJ+B+a+;QEih2soh(*_WZD6|DG~aa5>7*v7!*>$ z1)ensXUy4#jD7(%lMzviv1-p*Rz{F!F8AibuGsv8nNbF4jCEzxok*+0o}dd9=`^De zxN0_u#6ck<|Iiv681R9lQ#7f%x($KrS8DrM9WIEoIY?txoN1=C%&na1-*K}HROD2d zWr$XKGETyQAq78)wC1fy*$g$U**p@MGXXs1NADsP6=_2RFpXsZ8r>4cxbd^)H;r{N zW@1Hvkh6d_oQqNEJgKlUn&Y6C6p)EbxzI=TSp^$AU(qY|e%cG!RE8_mKUGhip?Vb| z!=;lTp2}8=KkJ4Fpu+&w&NndkHh)mPI&B-%O_DqB$xB0avm}2*P3LXra{tT3M$iouC7BEd?zc%@K{m z6FI#B1#$N1;bSn?stFMZO9-1tULknCn0n=$!1k6z^*{Lye+P+^~G={RGHkkA?US81zdseK| ztfwnE7ubfY#p((=DP6k2%O%&Rwb6E@5KCG@8xku7v$7v>^`xI=Kp*pXo3*T$X%yHS zA8leDPtOT+dKE9$_MrZTrFR_eOR1)V{B`vD#+4x^$r0pQy`sJ>9?b`wWJVdk-VYN5 z1F2Umi}*sinx*K>khq8*D(5QEqKMa|Z1E_+P%>D%2g$@6Pq4BOLXs`#VF>grm=C2K z&>#+{FTA(p00p|yTF{+zYbC~(l6@50$GF>o&%BSCWt^qPw}B@I(^)PrEXajWesLco zbnqpondb1bg>A-l(z+G$(qIvLj6+^f9Ghu1q|L8w-pswhBmLGuziKd1%WGbHq@g}Z*euQ6H2j3@O-&AHv9A8kdX5tzBZ(!Bh3t*%F zv&8*B+d~)Lwkz6p4z2mK#*xzadl$-RfEDj6m(eU^Lg*FG?ZtXj34jys=w38`;WZXe2hYv(xS z|ED(l9gfp?oF+fNBQne^DYa)`;@j=;VI@kZ+!?KcUw0K`ypvH-C2aAY1XnHt{b<>T zUp_gm@^e-^opL2&I-a)b<$oFXHub)YrWKyHPP&@jS~%YQ;tLV}SI67OnXb1MM!a0c z`MobX`XB9iDg1K!mrEm0GPw`N)wwV0YwEy;ihc0?vf;vSyuY@u+4o-Lx%iSXU%Y8v zWK-qr!iPs!FE5TVgK1N%e{G*V7A;Kvyo&yO_Mj=+7WKsc3;en4X`#oR&bbRz+>A$BQ%>UQXb4RPjzV`ig!HcGs53*<2 zhq@z8=iahTuVp`7_Q^fbTCeG~$$JN%c1*umyCeO4)AUlgMYQ*hcYSVOmiLFn3ldg& z=Kaidk3IoB;@ZkyTDJ4y(;jA|=9_qGt)r04Uws*D*t+q&dw)ULYhpiZc=)q(Rr^1@ zLY_S0ot^x^YZM!JZvuh5YPYtLipfmg_y6KZ^nD8AuJr&QqpUgNW81UO&o9_QHt@xemeVbDkMU z{T;3zM7TP(sB%o%xFoO2_Uhr7pk(Q2Y%yl^nb^uov?8-`D(A5My{Ux=k53~|-uB6y z$z|{C&5QIb*@0GMx^{5&pG}6+Kg>+H@WlFr@ayYM%ETHazhh#}HD;TQQQSlCOk0mF zZ8mGKNkw8XIzTDyN(R$HaWNomC9Fs*$t1Xqes~sA!Prk8PAUfo=GiE}uiD4x>iIJi zji`?p(stq?memRVmV!=54N!VcrO|)5(A+~}u2jV#r2katY8OicNn^B(K%t9?_rbsl z#>J#d)U#A;wl|%`yJ*+@<>j0JN(NZ6r)(Q;6}3#Jx)1vWpQde`us_~8U|@?$Cibr< zutdU8TXcQkHK|7yvkI_4F)0l*I2twtPDXs525>rfBbvW}D=1)g$Z_RH-HngRPI)s& zX-{x!c>C=CL)W{;QsjwnJ~#5?sctet#yAiIV&0Px=)8=5hW~#O!Qcwi>l<|fPqCOg7I@e;nedM z6$Gerd9u}j0^GKeS|)|i-y0_ALR|O`nR;R?vlFpV+Aesv6opWbTHp}u7&40jJPUo+ zxfGxs5x#lm?oW(X4_Z(YcXo+kr8F{^h4c^^0j^h< zuAA||Pu3nzBrKqIq)F#aj?`pHX9};ZYg` zn=s*ffFRRpj!MUMb7_JBIS{lbmiK@sQ?KFqKYp+fjHLAqg6fIpm_eRFp{{J_NuSP~ zj9DlqRu2lHj}`gf@qG4~Xtr261#V z)PYtlA~;ZlU}LoG8W332$G`z|$QpeE!_a!vhdLFw-e>`D_Hqs#QUWKz++H})vG*#- z^Rr$r#1g>&Y2m>fXSFlbQjVs)z#7x=c`+Dm);R7(JjrwtW67gq=|-_Foz1ffb6FP2 zlQI~Ia6C|5+(u7g5Pduz$d>hXLF6M+;5;>GyOab@Kt$gBj4%iug|=S4#>TKpDKSx{ zYcA1>&ZGlk+`@J4)YYg|W`nvz#z2q-w4U@Rrmtvv z8Oc;zLDrC`Ac)cxTNt`guA$BU;&rWYYNOKe*?)QT6l&qM0&9gr@;IUG5>{eW+Hlsu z(c-;OiIDLWCRa*fv<|_Q8m^QwuxNC(27?RK)y5;0+PPwJRVi;_wVQviK0qRO!LDA5 z@qn0pDwJD3EgUSZ%saIXtxwfKqY7$fhJ%mXq2mDn0}Q^h46bkPY95q3J&T3VY zC~n;OYw%oglE7QF5q8eFhAR;w)N@&~CPoq@pXlgSL_426rz(n{?)X zbjOVY3f@G2PbK#liq!CGYW$m#$|9ZbG(JF{79MbGB{-mk@r5EF{@nJNRgriC_ORbW zlD=Ygb8$B2qFvoYI$uI#24aA~jQ#j3`~+T$$vExjA%BVQr|=Zakc!b*1m?k|YKhF} z&5gV(Ao9D*mGpZV9y{WdRX%}TnNE_8HB@Juc3RtehF?ko-mSCtguTW*wlHB@^y8mT z`>gQc_{jAxGZz8jk;1~0W8%S!CtEAQz!-TqAa$m_GdIYnI$i%Be> zoHsEq9GkVeB-qbKdI~ZEJHcGo9hU3b7e0i?l$Bgh5fJpp4$Ut**W~VJueb18Fv~NW_(n8^`Y*> zr-n|lX^!mgtiD|_V%5GloENEFV`skSn&1oMEU8*>H{`cVM?&7qgBe8N$Rdjo>qBpJW?<I!nu~f$c*M2n0xDI#c5_l7S@l9tY|yn4nFQqaBoPjTNW(c{6|*Vk>E~n`;GNx!T!pZ-#MSw z^k08@Ci{&kxOu8E5&Lh7IWyq@pO6uIc)I)l(_aI}jGI3<_7kUwbN??c`hs_C22j?! z{DZ%7|4V@lTy$)3aPtH{{IDA=lKfiw0%UuH*yyMq_s;q)64>aAA^CO4BKa)=WHf|> zGyxACXquNp7fc%BLIbGJ%OF7g2j}H~Ktp_f8?|RtFlO5hM(}^oE3>|B|GH*<^_RR>YcF28E z|I%O|8ugog{ySItN3=3pT$`o<8+})P9g<+b`o|S~>OkCEaY7*pbOn{+{E5TpwRx0~g6S31 zjLBi$m@iqP7$=&+QAR+L6poPft#cKePv<9!Iz>)(6a6AY5D4{|@3ASSFsZl)k@yxe zFf|OpW3`1CGM7PcCaakcg}VThXB;PR9RN=)!#Fq%f~km6%QGs5;BuzscrPyC9@SC~ zw?QrPCtJIAR}G0GybVLMfOuxS&=^M4E@GyLQXTqg zhXR?5x@@^i0LU_QAy`jY?!$2DxO5Mw7-Xz7OQSE65mzY=Y^F!DICTQqgH)r)ab8m` zqgZ`DLT%)bF1!L#`Sd9QlE^FAJzcnXdD;T#-XeuD^&W)>8FQAOx6cugSid@#*d?E? z(%SBs@+Pr~76cPl?$VMHhxD?ou@qK;u_(Dq(dcCo+Sp!qmKtCgYm>%JGU5~5=!9yk_W!y7~_=(Ds zghCE<9*vW+o_v7>7TqYtqXtcWn9c#!4@~eryoY471&7Y4bI+IP<1Ff5sixpaB|-DO zj8Uij`S^6-rA!`UTe)1g91WMXrky$gs&w_;aR3!|!o zjNb^-XWR(L)+%eU3Ry!r8B#MhEU_o`@0fr~pq~~S8X0)42tSU5i4Q2TT3oMbf_DmM zngdV)f{+vsz#r%4@;GJH2wij`58ga@JT2w{D2Ytk!gO440w4y$57%o6k*p_tlw$2o zPFJW*T8$axK?ajeI~BF)YoGd>B)$fWvXnuyNM)^7+^R!1w1G`fmwxn!)kt|cE5^}i zE{FAV8l1{8vsGF|N-}lvB;}ydC=3p~22TPa5ZB@*q@;&hZAT2}>%oCyYb98hiOpkh ziT4pBH?tAWj2<^(z@yXXR4qcfKu4`F0T2k#Cke+x?E^TVg3<+56|zY|;BEOD1z!q@ z#9mN1&F&KZ@|2yd>ktF#{5TV*O-aq{CTw<=vycR*a&Wm=FHk5Pse`yrLPM`+K`Ftp zU-W};yi&(mlZBKDuA9w(=24!kuTs|FrAmzKUBNK?L@xB5!SY-dCQH47kCIXZ5#(6D z3)QJy%`C1F^c$_JtyMKEY6E1*6=sq8i`8T+=w-QPYo@M7tk$V;gV~S;_PC$|Xu43e zrDoR>o$+8(oEyeQ5FyEuglP~9CbV)cR7AGPF(UX1!1GR1sZe<&8>uFdkci!qW)dZ{ zJ8XOuYhBg&076j$h(8z#)8(!aXojB*zKG2_LB$aZO2WOtmdrV3aQaliwn(m*omiu) z$7#u{%vCtP?Wo|DNdT~c1 z0bL)&nx|R_4W&|e9NPf+)1h%_1^6!HR8U!%o6Y(jl4BNWos1^-C}`d6*4A#sRx6L3 zPd(0hB!^fm#|+2~loBVDcqFMrB%lINHsP|bl`OHalE#AKig^Jc6F#m1lOv!2vdl=X zWT;|(E-7RXB>yF$wh_`qb3I-qbED_BZh`Y345cbScisv2^DMPjl;9Cb$V9scXQ~Ld zH$c=OKn?o~-#nt$>I66sjvWQa4S+fY^xq=lB2Ek1m68@oQhB`&p463jTp&eKC&B$5 zkTl#DbrxC2g#Hi4S;U=|KgE+-*+gdMMN|_b3hs9`=5c>=WV()@;0JAWw$h|ZxJeix zdT`0Y)2D@2bF{FET~ma!_p8;Z_+p)l(|mgWF*c@`P0eQcui4siFEQvB)B(O(&I%SQ zLKOdJK3}aXd;CAr&&4ib;ED}6$vKosCmTyREGpggItP*|N9^{9@Y=03`!IXt24A}z zL}z>P{AP8MpX$T#JTq~~xk@?Rx=Im?)tRI*rBP6YE+zJ&@MYT^yG^E>ZPg92Uyzfa zAd}_d&A(c+A0Wnat*J44Di2bdAsj~&rgLeO_grv2R_w!x#=}WCRgZ(>(ZS=*gsk_7 zg`An-TMuo(5c9dzL2?UWC9}LVrc~JkhQ0u%91@?XRG`+Ohv^Lm{)}FfJ7Lw|KEwBf z1sBIZ_JJpD#;xgx-dH}rX2|32@C@t@isT!uwR`b4rC{Aq)q;ZF7rf7<->R8$mV9B} zbM7(ORL0&S&ONr|>9MNDf_-D-`N-n3{a4>2!n;4AavMiKHXkS*s%S2YDaq^jba>k< zuOycZPgbtXJhG{JIK%YBCy$<;{dfWPw?ji8<8|G8y?dF_mx+!egUzEtdB&8E>Oke` z#Fzjb+gCd4>h#0$$5Q5yWqVJ?pC}&s+w|PuzkT+Z%#RyK@`$`SSzA^agLw;YxlR%n z){M10`n&s<+_7k=$B;-2Odff~e8o0&WWhV`x}QglO73!xx9-ANxYGC0^{U1X4@UDN zY+Noq`byMnAv!qH_|O%0zCG^7{^*W~a^+XgH`U)Uqg8m+(+4U?T_6AUWMAnzd&%LA zd>?bU?Bd}Il{a5s@e7O3>HYkXv$hX$_wX}QJ6u;y%g*jC+M4$IzKHA39Z0-5vd^&o z!n($1@avC`FB=&0x;t8f5&jRiW+`J~hZ18(`Xkb2U9G!THf5xr>{xNN>U(%>@#ZUU z4*&LYA~k|nU70=9{mOwUBa@#x%Rg&e7kAP>5?OmCd8B_~$JkYAZ2i9dFAZ%O-*RNc zexRWHqus;b);zekjQ{lKz^N@Q3&v)yPq=*kYH3N`h1+W`_r;8jq<8cM8%J~7J~}Xz~wGaK*hx$!}4S@y5=2y-y^pVvP< z-0}0ez^CqOwvxV{?iCx`u4E5?o?iFP=z`OU?N@8O9hYy|k6sDahU6cBlDS=j*wm;= zpp;$>iG2XMcZ0IS^ylEK;CifGySny&*%{5o%c*|@HzPb{hHJ!cQlkHW2*AVYv@h=J zME)CepFe^B_w(j4(Yv=0(Ys*=_`jam+u>~N*(E&~b$NE??3|8y!FX2(c0DwlGGB{Y z)t7p`7IZnol@A@W7wjH#rIx`!CO)-_`xS_4HAGaai9l3C;$TR}0Yvq$zYUgQV=tHY zrCtT>ydMVG&Of8THZ&L&Qelt1X^cKRGE+%AG&1>6hX;u24s0y7vLpFN^QiIHzSLpm zIrw`$tG`Mu*gbrRUB7$v#mj%dX6K?{v+~-sFGk9bf@ow$&)c9a|J3w()aOyRUs^(p zXY~^PG(%W%N&`A;LPWWGWfws0xvE1A86JTu(s#kGMrzP?|k&{oeJ$M4g*(v7m2*XQ{;QUVt-(+WA3c~^-N2${K+;N*FCkJNv zSmC7<3)a(2EFUzi;k1&zS|Is*^}Vuy10nEhD>|-pIDd_)5N*~sypr#EYtBFgiuP?1GtrBUmny7ELZqAQpjThUky=z z3V%Np2}*6Ngqx{Ryi{T3rN$wim;60bWNH4vRvE1us;=JX#6UM#DrCh`5ae* z7fJ?BD(2#_W(HTg*bGk+yOIH<1!XBN+Wb_<2WVI`h(9^xVRTapF2r@4W#euFbLeUt z0jra^UZTbc7LGv?!KWp?b5+u$-5?1uTB*yf_@vV+XbLv5j&@!V6`L?Z9~qi8q7n{F zW8_y6<2W*ji0Cz2H8|+^sakmt4gzGFGkV47V$^46pz1&*?mZGWr)zizDf181)3E~0 z>#%AdM(fg1v5=v|KFdTcng|bRLj{Bj@sfzb8Swj)7-h2oa1}CDLkY-SP=>%YA~?M5 zaQrO%y_s6cL2_W+qy@fG*L7xB)mnmE)MWDGZq6g5bP?{;xX0a0k%AJ-nMg<%38*+W zL0N$cOs(HOmzUtkOFc(19pzfw=F>WKl3N3Dd?r@Yz)K8m`nkJD)bqm7tB=>yd>qrn zfgB&2Dd0}f#xrgFPnp_yyUWD1shG^GbEqd&Hd{4Ui4Ah>Jwzc1XH^Y3sOD4F5elkp z_-#!uwMdjm6skN2(Wc^?Ra0zlO1an+#W^6x6CYq)8m0@!lo(!Ob@+BbT=$72TLaL3 zCv~crV#BE#iX%|mjOi*Q54nTNW?k0%JaVC;$Vf4Ct}1X{E9<^+_`WPnk_dvaPO6vL z5eGL2T>k)u7_>B|FU_ll_sMD|DP~E-5}BGz{veA)X2FRx$m@LKVM2A`Dz0M%L~#hB zuIt5v^LY5+Cvb2V)A&v(s1vLajHW_sCB|^2=slCpMBa}>o2!sdq6&Gvoe~pqoi87^ z0Ss0U4218?Je95YeYK@$9!8RpM#s7M>AxxnvI8VLKyj-X zLNnACZiu0gK$F5TP)j*ksKFo$y;p(1s)4r#eF;>rbzo92Q~}7Jk6qAfNsCstXw?wj zho>S)cQ;(_qAJ~`$?su8k3*HuqM;aj=reHCe<0sa-iKBGr*)7Lb`@DYOeWWjKLx=y zQs!=By;`sG)(cWI{T?nfAEB1=8e1`ocjHM#5PfQ2)Rknuk~N!$Z$7S zMKk9&w<~qdRNCDtC-Q!&4*##jFfU>5rn0_C2{h22@nl3wgW(2EL?3BxsBI=0lWx8awzaA^bQ2;#kxNw-j9 zzhpX_vUIk8>lqo#*NY6w-!_kDRSb%A1e0Fz79$g+d?kQbxrW6 zO$y~0C%%&KZAGH(`qsvG=nv0ln_Au)Nq+HSV7|HL^uY54*TzqbKJ&CcrRdJVe*ajb z@sIS5objWx%$w=5$d}^#s@|`fT6%fFIYh-S+?)GalOekN+|qNi_hNfXhO3lB`dq|_ z`{DKEnef2%Gimek&a^ZJp1hH^KNu;rcy8>pW_(%~cCz8d`)Mt+0w>Gsy4yB9(O5R= zoOftl?{kf1Afi2-=xQ9CQ_OicNA3j=MEccCNyx5m0}?}V>d z_R*6!Qa^uEP5f7I@1t-3@!QFc_6u)b{k*$w!K~X;ZaqKo&WG2`o@q@BhF5#X&wH+^ zOt`i4^<1hmcDSl(-|aI$qzzwv^WuT6fu*h=aw1(V12+yvpSpA7=L6UaUyYu|>kf=f zK9;uOlk_{UPt9HaF@4k6dS!HY;Po{A)~;t38gn5MT!>D;Hox_;=W=fkojG`A%Gy_c z+duS5W!i)Xy;HT}^ADNU}6{K=DmS4H}$Gd^Uv#w0~ zC;P(b(QdLM=SJzly2}5U;7s5``6DSN^9ND=_$l+H)a!2bFJyn!Z({xjiT9}!vdv>3 zhj{WY2hV>QDgX}sh3ugQK%@VdjYl7b5ODYZM)u@3^XAoOl|jfSjNUz2DA>&f2VaE} z00{c;d58<=#%7dc`**bh^ZxM6p~yoARtHmE2a;h(OTK0G zRCHA^2*Vhl`we5oM>{3}q257-h8O_%QP=w(8>aw>U&87si|5a<-!>?GSovI17S zr8i9KX@-!ZhWn5W91!yHC{kEdm`@9&B8p&jQ+b#`m@cA=FlwkQm{e+On-patVMXh4 zTTd8A`Lqgy01Tp4g%@|o-%ozj3_St|+bI&neO=g31e(C*u)w5BhjvPtC6cd=Rb;(O ztJctYLOcpn63qc)r{kwL2xeTzWX37poq}S~wmWDUlF5p_>tE3+pg@rx7b_@*CL0wi z`nu{D9Vw-6aYAhmo~#E@gt9p_#bu47a>xukf^Q?_RF|$1dyltcT}`CLuf!?TAse5> z5K5##T38Pm-_tj_7B!%HvE6yp&jGr2rs4)C*~_wId}Zd*JR2GY`D)dxAW;ElYC3x~ zISf5t1mjYIm_u45rPF0kHXb5V8gOMHu*L?| zMSD0@#lzD@EHl5?na?Al)Q%wpr9TI84>-Al$<)cQ3JTo`it#-FE7n+`n1Z?6qGP$; z)5Y1PTxw=xdZ7V0_*^bes^L~a`X8CpZq)IW3d5tz!`d+^QyayHkxC=UHuA4CsO6k= zPa+`&jQMH;$wra&8DaYsloUT`V=6{)mX6Rw(a`yyNT^R?*qtxY{kd_1>IWL!5nF7) z-?M8sQt9__ktHsysR*YwNC+}1-<~16D^NXATBLs|&e9;UsfdrmON6Pt2HfIdIoy;E zg^KasR0ii2CgH?z6K{`+Z4jYZ5~p!Wtt<`!HcWAaz=wMU9%7A!H}9#W8&;6HH0snS z^tPXgqHZJs154dfoQ!F!6jI$g0pq-kmf&AAWE<@&l1b|xLZs1Nn>;jU3$f7&dT<|g z5V}fuYzbv%?28btT4-PZLBUxgk{c;~GXe5nNGybI&SpR9P@T4wJ6sOU*QP($On^ES6!AdL`#4}y#cYNE8XxttNEgS##(Emu z78K%`iZKyr2!f#&KP3=JQ1~id5Fz9D0lS!WVe01 z;FAvm!L4H5tjNGy#=v7J5gdv`;E{sPC^{A26BA!4foy!Sb_0vAKlE?FYy*1>$_%jM zh2UVU)}-@-CdaXpWjPXB0a}59;+don@PaTh!oU@dP-3l)61yh7zqye$X+@f{NRXxH zkgx#(B_O5`Gw;O-J0|3t?Q&|4IDs5b(RgCMhm#NkD!!=_Y6`2*k2%8eJXf<+iHBRC z!YWP*1W!^RHzP>^xGo_)?30m!Vi>LgAC@c-bCVH1N+QhdR3QcRs2)`gl1oGqQszDf>uMs~%lgR|BM?=2ym_yKjv1sBnac+sFhRQHv6UL^H+dX8=_PeWUnPe@} zz`Uez518RB0&_~d2FfN9fn;>J&m1D>@G&pp;{}U0jML)0Pa!jLQY+NLsn>JEd7qom zAf_IQlL5K!V0gm7>vkxrh)BMN$wF2tanS7q58Mf~!WdT`?r4=L0+7Gu0q~GuswxQ$ zxD-dOjlUnE`E*T6n50vyus5NUtdJC;L|mz8gzj!-AxZFspsL4J9T*~dTAc!;LqO`I zS}riPB;2B9T2?IaI(g1ZlkcNV^f&Sv$Ssv>@+gCjgr$U<%$U~2waSav@}FY+!^u4n zOZBvMkns&3@o>3Kq$!)@YwH_6%329l_$OzsI!O;r8fIr$TM zYcF(*YH#~QzWObxnrW3TnMT&S3vpK|v^4m*ALh-#!}}og&>b|j;1ifb|(Fv z@#I`0mnbq$Xk#YDvXdMAwufQKF^*e~4dyrSC2>XM^z?DiXWk)XHLDSH1NhzRi4CL> zdvBGhT=1r@o9#}-7I5ahSUEX_QBOA$*&-N#T@55co0DCCS5^uURHOSR?14XVil`ov zv53KZ8J#>tvw!lKLAtLg%=`M>(pMxyifOWkH9=UPfoaA_&YHrQQ>b*RUn<5pt4B1Y zvQz~&65mTaSoH0*4FfHvA>v^4l=5YJnPEA&X<$QUZ0!&SQWHqTF39V|`h{S$D|*|= zfoaj|)t3&XO)Gcas7NmOXl#)++t{};(D2*rufD>|cAbm6;XIhuIiOx`64Um3&Ybrv z;ful}Ko5}-{p5m<$ZJ(KiF=197`}~o``DaAISVF8ugWiMIu=#%^qM=vH_PX^r*YNK zeza=e?=Sa0nEOoU%YjOD&a-93ouj5R@--@M{rSK{<7Wz6Z%$9>du{mlM-$xXqm3U- zv?ow4O~HuiE&an!u6t0(Xm|vSqjz4L_ayhjJKx?sJ9~)ZA}gY^&mRli;0{a-k2abWsq{4;BAOrrj=C2d_G{P|qv*3ZD?oBXE}Uk&~$w4BHpULTP* zaCQ8WzwJ8^2BGJ<)}LLYYc}+~J)Hh=V(GA*PMdbVX*hFT-#6E6#~%BlV8N-p+tir@ z(?+h(tgF5H%DJ;sM!v(o_P%?0&i+@nwTus(Q73Luqa%m|a47`IJonD$a`=Ex(r4g{|k1KC=^ynQqM6N78`k?@uet{b=)x3=sX%3OQpd~ogV^_2(S z{k3?=PA4XJT8D}}E&kw?lC!RWd+FKk;H2fz#OM!`qSJ=HI$PH8{5LnwjBlwuV7pcN z(VQFM)wxf!zyDxsOZ(8l#!099)_S8#fw)z>)yG+Hz(FU{m(#i zbM4L7wy(7JguuQr#Wbnt3I=FDG9az)Q_itlLd-k-Pyt}_R~NO*)4rG}Luml!$Gc+k z&!hUyr)&Xr_1U&_AW#2`rk95PhxXqN&oz(DjCsNTAr?6pBJ^)btH1cGKM;C08hv{m zwyNj{Z0+jZ@VafO1K~rvrGib_$0WbOrk_@kHF9%m=t-Wmjx9sp2 zGoqE@qcftbhAu^gZ|eiluXcPfvRb|J#n_CmLe|WKq2bEL!8_RJ&DU#JZ%oY{*{4FO z5M3L%jE5ghe0&vm`SBr0NO3|V;6bG$d2E&v;`5ab&*$W5l)o=-xH8l~P(lM#7`4|G zQ}ow^|5~-=^1p_PHa}RKRyi{D=-Y!KDnG>O5B}DAg}XgGu!HrQ#dSRJNJLJRdn@ zUY5;oQo~sso9K-I-H9hXwzH8>Cf>lRLB(sdFAv+p%$E=>BYsPAY`8?NjBTYXt!6z* zrZk(2fZ)*JSf#S2@qsw#_P5TfR63Uv3VkSb0|P-Ne_~l~dF?;Yy37#mGX?U=e&RHM z$w?5YYis9I)_ww)2sNw6-pX~+a~a6P!1X$zu{JNpA)}m>(`#!8fexiOn~P)-(Rf;B zXlkeGRY_95id$AgYOn7-Tc0^@TN&1|GFB znkQef)W8ArQ53n8-9h^_4PZZnggHnQrfeEO^NbUgGyy=Lt^t&X%K!^#c!v&9P>Vh^ z+MXOcNvg-I@q4YP8;uea0ph=jq-HCCMmh{MNJbqZhOwx`A{i`Rp|POG23rwQ-R)JQ zykV(L=3=htpk!}0=7UErQCiARBHdm&$xf85{ddzjNgFS5CmJ!0WTT{UIKQFXaest1 z6Wk?ku?d&nBTI`ovI_?>jnu`4fgIQ>uc4sm+9h#d_R1Q8@T2;)OSKIqLDCGlWNtF#bNn$ z5}Cs$fnBbX>BUneZZlCYV#k?eHY28;d$R{G#I9#_i8!Qw7g6JG8p@jkRt^{dE(!}HWq72_Pe5buFf zh-l!jdm%SDAJfw)&LsivhDAz{FjU`+OIDsnH(|xdG}@vw_+x7ox)K+)V9!PM{ab>; z***;eYc=U5jSr3>L5H$1$n<;)IytK2Uib|xUnPN07=UA~mWuy(rU{mE!2}HgK^Rz< zYstnMugDO3c3x=1F3fSSgG5bS5#yjZt%K62F`O2dd=zZD^g)cG5YtW}g~j9c(-9{s zwIo3|IcSaO^w0=Vz>O2qr4$G_WN7#*rsGE#j^^2jpNU2x>)dHDO4fYJ4c3bE#0wAu zu3EYUm9VLr2)?Kpd9S@0t7)bxM8Eo;%xYM*Of>!182ds~obAu&U2X&tc#qsc4cc7=xO`R%!>0_|OEy zvfhYvKc3!hubmOkQ?zwwS0l7{B&pR}H>~d&)V6^4l`fh;f zJ9|17+-HCqLyvdMQ=tX|?KEy)h6(08-aSYvMIvb-Q8|es;xvpnUCNUgDqb@_KCG>j zvFL~@tOzr|PKkObwFrcf`6^LYr3)LpG`k#1Dn#UVupq4Dp`Qbmj0#|Mw4s(?D$m!` z1fp(IV+k#Sm%=9lt7suzK=rFI9q83SUd(X?>ur{@uvXlnO_C910}X6H4m;Y-gJ1^= z1-*Eh)e$bOvVmtDsElL{ln5xOhJ;6~~Z zF215WTuxXe*T$SvitvS131UL8sf{+Jnytws^<{Hu2j}brZ-P}DpX!wOiXO#U9B1Kg zrY_mUn$mmuhmGA_whim%4XOV3{O!tYd5I=-t+^4B0O2a`qFBto(5Bsdc*{m!w~@E_TkBJ@^GVh{E|TC$40}kS z|HR}8m}_lnZ}kR=Gs}J~pRB4tr>bRzuq2yrK5C+ zvgLAnJf~b&>8xkIoc@Emj|-MmmaQ9Z5Tbi;m8A5Y>XhDp>31dY{Op$M_dmIv{M+y0 zwSf<+qGSHRgNDVgWKDQ$BOQ)KjJ!BIZDZi#XVKS|E;|r?t*1G9@3+Z;_v7AvXYp-j z>XWvKZ$?+%UjA&F@!G2;cb>l*lT+q8Ft)GyC&Up}%c_A%_hhj&aHJ3bEX+||)t&dhJwbl`eK z$CB$MHw$WmN4d0^i+f-2-+E`#b7d2krY*g}v^|sn>2}ZFeCpR0_q89d7o-P;qkTgE zichu$?2qRBn9=*y!!hUDE*}XTWfC9D7=FeO?Yd?yFCd1zhP2lP60bWCTzTfk2b0&o z@vqDPLp(cNZY_KIRP|NL|JcIZ1*cqN$^NGratnrkC^?&XJEx&8a>!qLHuKi1&ZoA# z3NbA0t-1V-AE(@INK5Gz->KO(4~vuvxYO-728hQ7<}czz0(eR`-qIOZT((}i9#^#NYRS?^ zN(%66n-EQb&p@YU3BO7TikbFFYbs8e)no_`FHPJNtxY0@$E$GSHsgbbwrLmcedc` zYdK5%gmT*$W4mI#)o#3!6a4XOs7ApZUk#E**JKHP(c*VX~V{}mv9`(20+12h6c!xb1pXdSdZ5N{sR z`h~^}z?H=UDSnsM zCyhEOGqhaiTv&KG#NYc+{c13g<^e|%BQ;i8K}?_3z;Y4YR8cIk1gvY}RZtmVE;L87 z4k@8VZfGn1`x!RXa2j6BRGM#x#eeKLM;n@Bvv3!x7h0v*h(^H5CpcJc52#vPpU)Lr zl4C48TjP2;Ivsnwm8b^Nd;)K=9wvlHeAzvP3ZI#e)$+xV4pJU5RJYF2C_(c;j>otX zGReqB++UQy34|U**)yaB3^68C0;IN)aVTg>K+znp!koF8Dom;H$RNblTKP7JfXU0j zOY@RMk+bM*er^X|ZLR@<2vFBfT@8SvjVT;OBb7bXQM8XilX~?!y%v%#V)P`d5p2ys zZX$YUG#7J-Qj9e55T@c`5#Iu`?$F%Q|6MzIV^%_5S4NX#cx_( zF^@Wkcaj`71CKdEH@axhUJ48d(w&EGwfQ~xCYm!*7t|)Ti>#16yg)fm@!XtzF-xN^ z-GxamMarXUxj92PV{>Y)#ch%^6^mBvBK?q}*B!*}w`>s~`vid*o#Azbyo06epc^2@ zQ;Zc-_i&3w&(IiDNl*g-eOw%RqJjdE%0Ut$=Ob_TtfcDG01Tcz+AE4qqXHpF`7xZxebeCWh+|CL*|N~ zsYT~-Sl>VIHRLI-UXaG5WW~T*EIIf+DqTGYY8ncxvUYx*K z1r66EI`>b)Ppf!;b*A@Cda2mk2;%2L=O$Kv8dTFFPtL7TEK(0SL7LN4u@F8qyc*q# z-?u_jPp}G;jjv?HWShma1*t^wtp}N@6;cC3zi0H4dcx}$iK$+tfz*@tXHbzMfO#1& zXCB9tl@LRt7fB;Yqd&Q{WwX!?-S8oa!f`;-fOZFc!bSp<5wA z+aPMg8xLv@Q9zSJBAhKLinj6%1iSPwOZQmH&8TY)J`O5u+PBqc(JX3UBB70^!JH*2 znSNH^4uT)<`dOqajH&R%35d$DU67GYfX>IJag=OvupHx+e0E~0Afgb9E_o;)eOjBo{`!M9wt{LL?L3O42~2ue944PQ<(LxvunN(s+W9HQ7Q0noZUI8-)XX zdFL}ulS?%6d_)OD@jKe6dLSy`h+Hmm$bHAy`>t2{q$a0^l8=dvlE ze2678H7qG9CN6~yOCdA0wG7rQSg2lp<8%q%%ov;T!e*m4EVdW7(0;SH!(#)*;F2nP z%F4D9>P7y&sv$f%6Gtb4W)KR+E`g2@QZE+@)d$H60cV@kB*?GQIv%k2+3Lm33^FRIqNL(vWOs>Zz}i4#X_ETI zR_MR*?pcF*AX%ztfH0&mARutk3EdG*I;-Ks*dRt^!)j4V#R>7>BQzYG@D`0j3w*Hp zXNhd=rv^)!T~Rxab6_LI$Sis2aT@2t@yELf{wJpl_jmQ2bmL%{o;UG$qtV*mT_kae ziBhChHvgJRP9e}&I1@;^lE}tFj~tfATFPmS;;}U`JEVPLGDg&lGZm4bt$7U=W3}C5 z04gP>8h7?GT(^naX)fe*OVhqjmU6)7qjjZjM;uxwGazExRRL?m)z4__~{Fb{H7nk0ddE9D+zye744ufUSc$Xp_mQ5j4t<3`$F zu*F?MaT{8zg=R6g8t3nlO`9h2j|JZEr$($-j z6pQl8ZAG3%r2?f!RH_feT_xPnxX|j!cmCbIx3-9pb8W@3U$3*81My_#fH5W+uN}-U zYJQm@Qw4$RQ7U&E!k5M7ZzU?qP06N+SrKHNRE{mEHtjVJzl`Nl-v}p^RoI&Nr(b-U z93j=PMV>A5qf(Vf_B9++a5!Sn4OZ1Fk2a=3Fb+P}td2L2zR7AoHebNW+ zku9dQ->z*tSFktmbXZG7py5PI*l>aM`t&;W){Ikie0kJpW8>eyfAINR&#rI3SUnUM z+b8umjl43xE_?Wg!Geb2zb|-oQAgb6t=As)7QAx3{St_0;!CoV-@55M&~Z2rJ@f30 zU}tvAwa!_v0MnkV4NsQU&5Z3kc=a5;@gKE~E50r@^bcMQe=zO+RgaGH-hY@{0>caF zD?bLQhaV+helF$0yiU*6h`1l(zFV3*FR%H{fcyNN(W@qJN5gZU-TE@3W$Vd^8*irF znLT_Z=fF3?d5wwGbJw4-U!V8QfzHv*Pn3Q1Y+BA4tpBr{??g344xPPo^`PNE+pxF$ zz#rFtHr)AR_}RZ7c;oFYxnG@Ief7DI>pr}7VEOup8&Q+$w*7&hVs3nHON<>}yC?V9 zzGlBEG3LhT^SRkW|9FsDA3L-pBeDFM1=G2-H3Kt(Yb&D{eB2aRTKmBTemIXhn?6+J zYU%$V?DnHnZu$lO$Emjq-pYl^y^pC;c-grd)Fg3b2_?8@fYII`Dowu)D{`|q$6N_)| zjXQhf&dg&idBY2iT&Xzq$OU0kIP&Z5ss(jV2LAcMS3Mo<)BU6W+S}nuzW(s)$8Q!a zzSA0X8Yb*Jz+9guv>d+q@JQd0<@|$8W?)KK-M7Iw;lVYzM8I9z*BxY^x|4GA)a1v0 zeC3$=)*15D(3gR-^06n{uIyX?+J)?2`G2O|{Lt8OWyE?c`iXD0^_$CMuClY&w~lTq zDtL70r8D5du8xR~7#i6RnK5zi{P6abuLC>V5{o~M9liBr-RSM*??gX&vSncVwWZ9Q zyeqqIH5Hc~xz?@Dc{y?SUO9N_)!d6Cdnc~6U!^(7jx?^p{dap93+^h6?zS*&TVg_M zCOtJB3x|N4CADkqr?9b!AX$3fKRE0!I7&{8Qk(9*mmQGVhFM z%+B?J3Ha`?EeE2{!c=@IzlED-5MtJH-$Q{zR1(YNC+=1; z6&?o5Oy*|U=O@H^OTsG!Z+MS6C=ygy4O8 za&8pKq!x?9R5IDkD(OXD#;6sQnXMTOF*ru_&`y{hJ*_zu7mKC3V%+g3h<2{>9GAKz zO5Dx8PE~2E1~7URoyue=(4_c^1NBog*QJyu&eY{jB!OIv@HBHIhmc&gxShcxVWDv; zQkd%HKuFw>`U^QXMxT-b8j?+hdTPFo&T(#nOm<2=!4k=V81*70>)xYuD@z;MOie9T z?$tucR)R-QpKXHJd076{mQH02iVYAzLPQ;XFD6flRd9j2|7CeqmPSc1^NO59n_A_H zJxYn(8!J}sbhDdXbQLpy`kZDuVnF0eL9Fi-zmm;uxS@yfwNc-!<=aUnD~?h368DGo zDrPKS)=PdovynuiXk&zg<|!7<@hXliRvEE!8CO|E)oA8snc?FNYo>%GI%!s|g2C$a zsFB9JeEdBd=}BRh1%6tYB~4-L$ps{L>9w#N(oado($;z`Rhr*}+s1|c9zms0-{uL0 z-56Q9m%eWUQ@fw`*fIz__Y$Blc_Vdj#GPVDEe)&O*$t5@8+bSPz>}-x6NkrbBB&DF z`608SJbnmvfr*&k+G2Q~Zf|H^%)X}JeMRG5Cm9Z9DKoK?#dmT@1&spZtI}kQ2%_$} zu=uHtrVu)*)P<^Do~de_pX=f%WHVhTiw!t$(MS#jlsrJZ7j5Y`=*)K3iRtPMtQZE0 zDR!JZ0q}|Bt0)H@`CI{NrPHw}Qc}o5y9te{_A1g8teO95icm@+Nixwmu}C7MIV3G^ zV!&%qIrPq^2!EWwCwfc&hpqx|A(o!k87%K{QtK# zyRfV8_rW=wjl&!_=WsU8V2I3xXezwV&fow;+(bpY(IFb9wm>rM4$k2W4+tW28g^9# zl2KWvSz38rI7GwJ5F({3i!dv?rNOur<@=`3@AG*4{$P(s#Twz-Ij{HY^?JS>NKu^F zL9_1|s8Gg*L63`k6J3fUx*NO#!D|b!yijMSn1PnmJj2s=N?kz47QsSIJQv9#muv>0-#DjgZR{*MfY zS{4j=MM1exr9knTdy)5WMK+1SJ=N}tc3P#}&MXXL^X;PWA~!EQi^l1=O`Iz&27d-x5AC(djN>a z?yqZRp zSO($|A*aSeu=Su^u~eR!C_y~TR_GkUu_hXZZp_fs41#tDz_Up-7$@N;RV_R_SKk+H zrf)2JG~Q!nX&y;V&R~2fYvb_}_5DrT^HE@}Hv%%+19vZ5wFOtbieQm}{#r8ZGEJa( zD&;W9!cq8{CP%Y~1aK;hS*$_Rd_=a5i@=jtaunBcj;M17#hO6PDF9uV=pt~+m<*z` znuYm*)M7#lrKO;ZC}1D#oQK6o!L(OQJ5gQ8ywu4_oFtY*me4(WtF!}>MAAYZ`o4rW zOVL7*p%Z>Oy-05?WcEp!MGehVW&86E?PflkHC@Fhhtyn~ks!#EiItr?j#)}o(~5{R zHlh$E;s8Qd*RulPDuZZJ2{Ec(U~-f%+(FFOeQo!4S^Gb;NaNVaV!}a4-!X zLgA1*geu;Y&jTtE@b#g!5>ml0MoFzy0Z!mfh^HMOhU^0NOzj6IyLiB5gXAZj;B`)N-Uk$HktT2NIofksve(4wmDJKDAZA`?4 z8Yj$_>5&3nBAY}e%FG@A??3S@QdWV%wCigEs~6!$1z(;kf?x$$&ZS@Ia#&>-2rko5kg;a*#wk!RKg+ zO&`Y0^F3V*m{^U!Av~Pd`A2nKft``WcugTNJer%#s&4^ecWz;o+mN_k6s+~0V}3Kz z3DbI2Cm#8VYjDbFHdMm)<<*8QEJ0479%??z*9>PCYR|4QQ~SB)9dB2re90C)m28dN zgG0xyD{avFYtv`gK2n`8Rq?y9c96~+MDhH?Z)>xXToL>L?eA6@{lk?xxr1maPBsf< zZ0pTEU@sM(Ox20a6jJTMzu<_FQjr*us=}p&kfmrWKSiTj=~+A|L_~JOb2IwmXx&cpX)1!gaI@kmdcau`dlPL38t@^e*m;UEsq6BC(ko*N9W~N<+~2tr@r5Dk zH|<+ZVn5q$@w3Q!{Wf=l4*yjEarXV@JpXB8{d=p z{E`H6^2@GB?(XrO{imKi@GCQ_+L|LyRm^*}Ag6lfv4t~ZMTb9nY1(4=EheV3EAtNd z-5*IV!hh0}a{3OkJ0)@a(5|8FCG^DV&5_vM{`B#woGafTC5y)Q#=Y7Z;dDJcd^jWL zx5=Wfe`a#h{ii-maL=$0C+PgQ%rj-9J8Wglu#WHF?Vn!Z`uxnMv3yYX?oYL69b;;$ zE_~UVrQ@c>IX8E%`sIT$G$diuNP1Y#%=O1dcP7Vu;z}QQcJep>e?E5cBj4Q~YR_%> zXjVP_Hm+HJeBtfW32m?V*R4-MCO=xfVaLd%Eob5AL;GCLXFq%)X?(+_$P-il+BLL$ z`C~Vxvz?74GvlFUzESMW$UjHFTlJvo(Zi8{jyEQTx^mtRtn<3^C%tCZ!tvdIY&d=Q zlg<6R?>ueIxi+>PKJU)Y>YVnGlC!QW{+Au={b*mp7vndI%kuxv(~qs#oKXA}yW28c zY)LrzQ|`pJqu&_%FHU&$^Sv8tCOT>(AGvjNrp5WWZbNRM^`|n^f1aD@Ft`oW@)hTfVWn-fegbd3z~ZAlaJUnm>98%Ff!2DbiIHr8J@bp_k= zs%zq#BNLLnv3B@cW8|T!gqFIcV^{X&Y?@G?I*sS7pU6DW-_tu@8kzfWqh~@T4XwGm zPhIzJzyli~Z|CiK$2BVEc-GtzUaLF>$_#e)6X2sG2i_}lMp*$ zI=bWZqJK3mpM3BO*X`3Adh*70WJHdQ=e#kqZtUOo#$WEFeV*`&{}N~%ysPh=|IVF} zlpX$-Lpu)TEPSSE`jz3fo@Xz-usi@O-QrJUV~-r1$@Kr3-*st1-Is98U(M8g_RXQG z7e4sgA%fKp>@z16Jy$A@Cy(!d&5v{vj=9FbEn8#pz`I1~#nwe%w8m`HPQOKEe||bF z{Fjk$PV9;gK!wzvK<}hrwc9cb8{j{7g(4gNZh&Y?lRBXH(*C!d_z9N4|1{VO zB9E=vk-82p?d*J2ayUA9KSp zhAa7?5q2@Gh7HD|&37QB{~{DPux%}-{5+U8t@*T$fer62`0&G}yP*Sn3pXU6mWIV= z_re0lh>y-WwsTBe1T=|WpCD^y{UH$+yO{~i&0k=A?41u^BS4h^iK3}W_DSdONPrdz zy;_;|w^V{BW+2fRvKb;u)O;cuD#n8!@GvMSH)?nEA?jm0cXN#mkc4uzE2 zu-^cn%cR){{eV60@7=;GQD5LT#(pMxDxSd_geOtzpH{j7GZdpr4O)~R^kSMw+CZV3 zUBO4&4Qh|73f!CFGqG4LN}nSvtWr#BT6&=#w(q_c#BrbNW@1v~16SfY(JkdsATqR=B z1c~VwvA#948?1j5MxjMJS8K1N6fk#Xots{f3Tupd$o{4)lp5nnCZ#0o@1%+r0 z-_o#ofZLxRXJ+?XqE*t(mL>Y7ygBiT1?6k(g<{RkPCGdteNUTLvHr_Ubpv7LOGOEJ z#GJ*(Na0eX4clGN0@o7ni$E#crOw*KiiT)1ovCR+6UeU%dij!?B7w`NjlJL`SHy~m z`YhUsn3bBedB8z|0`n#{exlkgR+c1EeL9hgHwa_K-{l zwtlEhttjMc{!w8+q;scCF6WXL7#|d37^BNIeu+T2*QMoNw z*lMTUpRG8D)Y6EBEz#Cvq`t5{9J3-t`aHlycTSk zpjtG5+El1y;_Sp863s=474`g^SV4W16!ZoN30aH=`{>nZGWgzp4-;K$IY|u?6bDzr z$a(nT0`fhA?KqL?5ci=ggpDojr0oo}pgc&8C=v<|k}57qU)NPH)VJ#fjZm)+mler^B}hmMzJQkJ6F3%*qa7H+$j~Uh z5DC8D9mL0QfAQ!_VI?8k$Wjqx)TaVUTV@kuLCF59*GNw5Vd3a@ro776eD2CQjy#Or z7kma+gdlySoLGTSY2covycgtNZTFBUula>HAxY9=>OzyqXV%-)=w{vF z#4OD&q#-YKP>h3-Kp$uDg12}|Ft;49Z)tyzC`=T}e<)GS+0W*9Z(=jB@=OIXKdxfZ#Pa(FTLc z!eeNqf`$ZPodROw(35NbDTB49mubk^uyD|;b-;s9Vm8-_P_kKGSPT-y!x*$O7oIy{ z5XyycS}$5q6D_|gAo2wmjGYpMEboA|uo>Zx_$7^Ib)h!zb3=Zsu9xtm>U~Hgk(keX zSs+lGuSJm=_!~wk1t{NuSz0}*uPQ-D#---iOU(^IJaR;LX zgT&WVwE4g)XcPLv>WKF-znOd_x(?y<*@hvHN4?CE?J#x=qSTlF`|k7~+>oO3I|APD z>^TyL#S-*Qc!_vry`h&cYPhHBR%cJE7de9bOS6a%M=I*Iy0{aSKEZBfkiL3Yd?!_O zE}|s{h;FPD`0;<&8EH0MYds0>0i+jNOyp)%#wYjW44Y&4f%P*>m%bkB$}~}b zl6*p@zkphs57O6!SJqt!JV4pbEb8>cqY+e=>63cQ^`n1D@la8qq3HPQlNwW(<<7Fr zGovGqT<>yD=6~!eJl~hI<+f!>_%CI5{F`6tUp<`tWBQdY-}s{RM?M{&XfywW_`#;3 zFRw3|)~)V;=3CoH$E&VQ{(*JhE{kmGA07E>Lx0bNed{YNZ8rjo4b#Wg9m89}VySV>05Q6kT`Q=(d#p4@Uf|{x!S%r?FFI z+x$tsNVfas@&7KHvA^K@Haw6`bS2;2fpu*i4L^4Mx2{un{`F1&2mVi%*IgPbY)si1 z_&g#Z-@oWXSLtZm3kkdZ|5}n@zWvbFaB4^x9&GIY@vim-SJsF&!lk>TSs(rN;AF{9 z{c+jDF^{Eq18h>Gw|8OhNMN(B|En>IbzPid=f5!%@bZFS)H z-#0unPT4jTboWkwx@!-z0))rsl$=Pu``8=LUvT|2nbeZQEJ0jjADAWzC(4Sa>`s+` zYyO7(sh-EukG0(mNV{iR1KiigTc>P~9)D|i@W+HVr!vIm%Hi5ebp$YLXwy z5d$<=SK|L#%-JzfaJegEtg^GtIOv{^PtUou@L%z}hE81DG@NFSY#P;MMY8_Yn>Tdc zeYbH#*8A9JdROf9N9j49iAg>(4Ne?iiQjNB@cZjC9sZJCKaPI&-D3w|S$|wN(7h{W zYOrjkbmyHHj*gv5axET?P8&Mvf72dW))P4fjPtp=H6x8vF821bpAQX8M|{)v&ev}R z{#!Wo^W?{+8=mjkJ9!jM$QWrk*jO>ud$6%`Mn7D)=Vlso)av@i#`QT{KHk-T`K))8 zdnxWhUFV$-x7=R#b-%_@}Qe zok&X4PA}0dokkhBq;}D{HNfxuxn`ef^U3qYX%Nh{DeyzxniA(UE2dnWNP{h%@bg3Y zJ&DsAA^f+W!O}HPM4m~?cG0WYlw+%GDQE3utx%Z(+C`7RZ+#p}v&a8_PU%i)bDe}QG3|jbHVt2A>Y8&e zowIaS&aIk#p;=*OEb>j7@IRdRO1!H3satP|l<6_9GL<~sO%8Q9pO z$`^w{PzFxqA!sFzc9N9$@;(Tv<O;5X zzeeo$QZ%&(DOc=4baViN{mNo+25on+Y#mtxN=#J2z&;w@Qa9*ol$NlQlo2t3DhV}% z`5F|cmC;@}o<=-rBqCRVPq?&+Hnde|-`*|k~tFnZIV38sOwGzs5GczBq>i(1l zF$oI3T%m$4qH;l|OnA}#7D)tEdf`$X1s8I2t2uWq|4y^IZJKRPORHxt%ep0DBaczPScr`WL|Iy^I+*2q(N zJ|D!WQjzC?!q96YvCcfK|M?Zdf!uhNyQZFq(2Iv|k$^X;@%hwa@E&LnB{J4_Bnuc1 zOY9z6$3ZVSwjOgY#P^}0(H6o%??ImyWP05{+2{@{tUx;tR2G7x4@lXh!LPNj7mI~U zXopSW-^T-zm&}GYZ}XdPy??+%q@yU0?>DU=;=S-zYXJ$vbQH-jH3cCc4oJZeQ5Qia zaKIu6=PN4|IaN;6IU{@@@fx8s4NWyABNaN$%gsh2AF~uOWFcT!&g)5F>$xMK9j{)4 zCfvE7*$Q*AoiMqF)-BIN@+_EsM%XT_+rwpjq*p zus;dmqdK9%PAEMzTj>EtYa$&ikG^Lk!AZCQqm(Qm!?`Lg-QM>lKZvw1tO|sIDsLD^ z@5KmR3&B>2M8_t5mEgq=bif&}$C~i{s7-LtNj*?CI*UzEH^k;0s3qJ@Xgp3WDaa4g zt`g#qt?ie^Edi!lp8>qb;Es>x=a$>{~?aNg|p)11HY5wsJN1OSa+@_n{F6tO>PX$gXW1 zA&(*UbCHNSHY1l08Kyb*-((_hwb;5*(9IR)jn)XuY1%3bla@V1sG!O9@sWa56x}Ln zo5k%UdlLm_z0qePDw_$TSuk4KA?EPqXY8nniN~PPc!KF(^5FU4RtA*I-^1OO0p%z0Eis}Ywxob;M z<~+UtxM|QtQp^Gl$D{9k4Z&4sgeH4V7965EhdxSIA#>}X+Xpv=5~(>U^ZivwBp;wb7avmE&}pv&-N|1H@8iNIA{u^3 z#VkzcL(^6m^|ij_abHcZ?tQfPYw<_KDWq4qdSbg{PsH-WiF>;8-y~XZv=-Doo zNJ*jd)`cPoyL&^rw{)|`;1u6S64K3f$Ac&LAf_1PKnKCB{-EY-beI%8+k>{hKo;h` z$1pxV0V~P~pg8sh=1#OmKr;KL{3BTUNnOt+yMKP+TZ`c#6=NhL>duY`J+hCeUuEj!b;U_*ARyp6D2XqepYW-9`Zt*)dMV@cgM|h2A zSPv0*bOZGa(Q7vC4#i`l=WWXIi6>&Zg%1$qC-CJ*nSOOyooeLymmBMcHUDjUU}Vjr zr~0QyFJ>dZ*(2=bq4U>n zmh$Z-XdcN0(<}b!!>@ruJ_uNF)n`Q*Xb48XC`JIU0xPGk&&6Aom_ll zCNTA%6=h3`Ca2;5G+9%Wdgi;)Lrmk1$zADpwl?+zvgs8i{gX4s?}jQ~=)1edQ&&5x z`K<23#0#G^LK0+BFA^a2%PdEH&Q0COniVNfo&8R)(x)6l1HO5>u^%ecMVo6&clJ}I zWG`}dNzVc8f03mT;hRq<@7wvam{176ZSm$3-?PH7uhCMp`4#c$(QLt$-?wmD)3WUI zre(hkIs5#lUJg|3JU{I*J;p^&FRV#9OHBOm>T38eo>*0TX)>uYV>;r)&f^3>9Z{M6 z#KH?52_XTRofTVb3UX+>3prHy|LLq*2Mico#+_jBf0@Xx^wL$(HABIyVK%F^Q0Jw) zYEU&MuC1C9S5-}Y3JtHRi_ot66N)UDQ3aCAGVvvs^S|Hzw?1=Tnp$Ip@^97ue8D=F z2;+zUzvs-Nmo+(1nT;Ad;^0%xdJg^WLIR5&lqfUyi23=cYlQ7~VODmzm0~n;6M?1| z8ttI=lK<1XVzCMb{Kr}|9oHDga^ioo|(DCc+5OTEcNs)G(;%ru({3T}nSVTxvd78ako zmkxDSF&&=QyyOZ4PJC%1sO<3k2Pw6aF6T?COxV&M<4c%LK%B4;9GdnXfr(};l2;2@ zh$0*e{rg_q7GFdKf6PmWOjw#J77y+r6z3Je>;=2C3Q?x@@mP=J1lMVVZF=^Q&?0CP z^T@-fu32Z@stY6Y(DI@RaV>qYfXu>a+?|LlaC7?C8P>9yO6H@L#P^i>?XdgL*$qn7 z00i2g0yxJn5W{G!ge7uegpj@eK}_4pVGR%vE6e6LK70{_S5t9r293z2m*v_e(qp1P zq$0vPpAYX@r_Qn4NWNaU?GSn4MmBT zS3#(c{sPw(5NtdZ!K?Ef@n(LbCrb=|fLKALa;;!vhROqDU)3J_{B4+U||soQ-A>c_2bGx*I6f101suyEj7n7vnoN=(g7j z@j4U*`zUJFWHzd5rJe*QxIwO+Uo)p1f-Nxhq!zZ9N!sVB_KWuDJX7?0mkNPi!c`f8>Q!nozXQOT#xix4|)ErF*rIE+6 zucZZ}&*drHrD#<GpM{1OEEIZ)Ro_oQZKb$;5)JSg2HIyFC9Vju z~Vi4bgpnzip?%6JMlOt6X8%zOqa$WDyf;uRwPTW%Hp(LeBiRrke! z3JTbz?+X>d`Lwmq>7%RVY^oQr1|^x`e^W@eFsJf<(6FDJy>VfYgZCe5AZ!h!dTt!1 z>NA5rfaXznv;hsO2D4?Yj9W+=jxGS)qJf$$#HiI+Pi z8C3sH0p)}9tJsicAxi%6Nrr31k#h4?6zDa$dj*v}*9|8~ON3j1Jt&3p2^w%eu;vOf zpN_G|N*YqZs|x_;V#Pw9Lakv^QG3uzL)BqqA0F)B?IC>(5wr)?fPCjl4$~jPzX$B) zPQ02>Y-peBv?(EF0fBGj{YaFO!DuaYuZ_&*A(DV`a|$>|s8T=_2InC&C`Mu-DA`j( zqUD`J)u4cO&=M-d#Y)Vv21bmQ5+4b-EkSrFhYkv-crPO0kUr3k5aBS0SrA+(q{=yj zfu<&aY2;cI!&x`DpT+byY1RWOFsW^q0d2)284Ve(-8O)*c!fR*e@!OaAz10tF#+L;QjmzK{LYT(IE94}GP zOb|gqhz1jNVIGCTzNI;s?NO};G>h*CIs=TP!OumWsPu6{Mu%w3#R&8-g2A|8rI=B_ zWupk?)?Dc##BC~BuE6lsOLB?~B?@bRU&5;usrlUYF77t|c)Fo6Itf12oRet*x zxrD_qm<_86lF>Q5B3MzL?@cRxQx3?C!b-p$OvJ9TKDJ6wq~6P7X*)y$$gs4z9KR8v zI5xdeW=F1~d3*@LDpOgdEVZ7_Kv^PaRZzI)peV;e&>&I|N68h1wN75vDo`p~sgZ}e zDL6q|0Tlbe6?kP%#YB6%D7&%zC*3OID*dfJ5si0lYRIVUHTJNGFvvexc@bG;QT@*3 zg=_lMN|nWq9vl=sVtbBQoTkjig)itjkt}91IJ3@H$_`pf#OV{P`lYR*8MZNuR_78r ztbnr)+$qW}q~8#A;AvG*j{8@=r&;agD`2(Hv_7+c_@CA@xg%-lMl=S9k7A(=LSaXl zZlog-Zoa^YCkLr@KmjYnLs%&P6qTq$<11IqsoxK3MNJQnI%bR959D^^9ci6XPVGdI z6e$i8+=n=4oj}s+&~BuJs!7sWS234Yt*DH+FFKbwzTNyuI2RLg2a*Ji69EY{68`!a z;&A8@8f5D%x9mM)p(O%ISE~oo0z^7LKkHLpSV6_ZTEs4@>IvH5AywU^J>)<>o9?~1 z`?11&>)}gK)%KD;jYe+m5mph;&2cLi6^4f7kfqdwlm5$9rT5S4aV^o2 z>_7eh{h|Jn@Cf91;%Elpda)>Jq^aom;2)s00Os3L?u@>)p)Br$9bYc~(tgL9(RFC- zp=Vyv-pPDA>3Uk^;Sab$X)KG76jxGR5xBvVcWkk2BQOmF#cW_Qowv)C>5 zRD@~hm#=;bY^wMZd#54g%=Gza%hSmdZ`?>|eoot~_lx3&ufF~HtEb0zd1s#W8#-fu zN}H%t4Rwwm9okjQjJ&nv)lRq^vrFIg-^IH4{KgRfvZT-tBB`$;ySMIq>UQ>p#-h8o z@uQ9{38l~^X){fJSe5h2bi|HuqR|t$^3BYhsfMZJ4^A$6BA##bjw49pSHn7M}U)Or##g4?(H=Ri{4FG z>i?!MGVI2s(T)!qh0z~hOxZN0ZdooQ#QIH!x@C9g-F<#&WUSEn%GP5u&m0;myZzl8 zGhf{J;3@EImjBY_oJ%uoO@HW}dbO+Y>$E<0w|Dy6>oZ5jJ>UH>zGL&ZJI;=8Yi`SV ze|qHi8?L79?;MZ!|N3h})AYNgPm;YjT$1?%yg}4De}-Say5vP&3I971Gfy{hbCwV- zrTpASPME|&BOOa3_x%E&CFRUMKwkAuJO`rd z>|Kyrw+c!x_*!=(oO?^Vk|EMU+^{!!!#lGM*B?c`!9R<@;Ga-?!6&V1c;WKf-SDL} z?RAht*QWhX#B}0xR39d%El$TdELAlOYU05wVzf`(gq*;V(HuIFvpS@|$Ijtx6%2pP zZk;=5=igjvl&9R!iHuYnT9~gcgecr6!DpZ<5rZ;!qDGAuH?-q`b{9bH36>Jk`M?`Z)N>Ypd?S|fndDPNbO^biSwJRYQ#!+tpqi^(`~5^W$e zJn*zx-9TXy{D5vj_4mf`xQK1=n|?s9UL)GT+aQ)w$f zHiODMl&b)(w#PsW<=JS+!X9hbG8lIP++>s$%~&kfDP3}NC-J48f4R*eL6GDuMu}_? zkd;%IB2`)Lbj#phcM=Tj(IYaQoj+&f$}d6Umo*3oq89H!390;R_`dTJK-D488H8LN z1j1)R+GAHX(~s4cE8{>_0~1asWbq~#>w#!)*yf=(5|hLZ2a?3CAH7r6>kZaA$|#<-y^Cc1W~7tzIp z7pHiYBoC!!afEH|N(c}J6uMf7X-BLUT#?s7u|zrAuJ-Dcc0^o>^3S5daz4Ile`P(J z+KU1*Z-Bc1_#W7#q`(nD#oc5&59|zuc`Am;eT^%ZNBPtXAU8s^uybnBhsB_J%pgzH znSsC(E5mRQoF^g}DpjJe+!BsL*oNSg6_giCjKM=hE=DSP&q6LCyz5{)HM<%3^RD>IgxWg`Jb4 z5ix>cIsk@6E3LdTGe{%JvshFkU%j1WvZalP@W`woBo~EpT*=7P>vF|#M2gBU3>T%E zQUnf-;sj0rQ2AN2n|B~N^i4^wyTvKcidOzF_Hl}>Q5;i>BpcP*%*HYST2gsh(^|>z z1ru*XJq70w$XRH{)^%E9O+p+Qo*CldTWu}+suuk|#&}<5Gf1oF7|VlfRCs~mHGmkE zVS14g-4gsWWDJ`r!+^N(qL^`t5|R2$o08Zs0Rl21F%o-CQ1gX+g(tHn7q1B*aQX0p zL}UYz*A;r)PQeY9(inWV+OWzVR7v44o5icSPEKW#qC4w#N`&Th4)&N*GUf^$Gmp+; zQWZ3sW*3AN4Hh|Cevm+QEs0Ts>^*o|JzmMr36q1>xvZtB3JH-&uAWHk4N<^fC~+^& z1mBNlK;Jl71&^$P6Dx_0`UMP6Gu4Sz1e8_0N+}CxAy(fEAvP;$#wh1O6rP7*78-Em zWn9PKW2+}^O>`{=(!6dg`WBa*8#OnSZ$VcRM37PL-h|<*LsUpE_9WZH=dc`%w?`v| zPD7tB-Chl1L|KfulHFcNLZ&i<<{zo*$UMh2ac(ca5_R9i@6)4X6C-VeS;9e5D&PS} z*y`DRd~O`BDoEA_g$*EsXalp7v00#xQ`JQb#Z6RviKf%Pqg49INaOTm3eDUl3bVm*CRHqes+4OB`$s`enlDcNncrBB(`{>Fq zXsx4O+i9t-uQ)3eF%wOfwaK(Ku|;2s+!Q{<+Y9+{=J26P?T26r@M*wKg<>F@S_Ao@ zD+@vic#&b22{}j-g!ypu!#GeE>lC90@e>?+lU+U*&lDt(B?8)@J(pHtFWe^Wpqd_d z-{Gu}d0m^Bxu;!XDvxx$%IO^fpN{d79gYg!!I!ssu+?Al$^6PZm3fEIWPJ)_N+=I| zG^?FQ)K~JH+fP&g6B~oE-!@rGSS(kaedHlu4(Mh3L^B#L)JmHtR5tAC(Xx<0lB4a! z=&G<3WF#8Q^h}SYgr4dG&b0Yt%8AX?>63Lw#y2d=Vb^{2#Nf>2aDRHXweHo)KO>IU z_lAk5oA0Dt8QL_Qp1$MIW7}LXHulB0k2D?#JpWGFL;h`t zLJz<5dELvmA6KV*GO;v!XezJ|b8Rif0vA`z^o>S#)r}7SC-Tab{_X&$EBkFCEPcll z$G;eP!W-ALBQwExd&{ezJDFuEWn=!B7lso3At8|;j3QATxplOK9qO@4G| z+Z+C8LfYOa(Tqn@Ik{ucb9K{qHXNVvjq46K-W=Ok-S)~yzF!KSxmEV<-O$I%hIZ@6 zDl1*Pr|v#-{bbvJCmvb*$M!3_>z>BvMniAqY@K=oG5pw`HuvhW(jT%Q>4n;D-;*wNqP=-=?dOv*21n`Yi!-gR?oMRnclqt%+ao5L&i z?f8JY^K{z>0VcN0+xuYeCu8XeWq~n+b!Oq@^x2%kd^B?533_bZgLUHYj!#{dYpaJl z3;U-gT+jF4xV^4(=Ia^0uTJ~X;k&)dyE?~*u9q#G7(43Pdi&^spNEEA!(UIerocYZ9|6f_LQz0lWleV7X~x@qBrM{(ns(7 zcYW93_`Bcj`Kqg<_qj3simvUGX|E1ln2y-B?d7*$e)ML}=TBXJpm^C2ZHZ4O+-0(s zW&PXI7VxhvEBoe7TSa7A&lZz@K4=uK;p6M*y453_*&N4MMqyp=-I>V#p4;CV8v7@+ zk-D1akzXG9cILM0yRsMji}WtTRFc~D_+-kvt`F|cE4}i>>B_Ea*J`g#-`(lW*)ph+PY)AAG*D+|M~Hm%l6*0Yy0LW8EoAyZy>@zD#w&xT6T_Wfk5=#e9CJYl1QUK~k!QOR{|~Q*KomDt zy7LP@W>bXk_@pVr=07wz4hvv^i9t^FUxl$;aq_u)A%D4AyMs#)u)At(JTdS_`z+yInJ zXd8S|x9jLV2+q@fJysFM)9`zdTnUYmYi5ytXnHbI3EM+!`J?9WYP6B%%s0!65V-J@#fvl+NGNU4p5L`9H2xP-}5+2m*CwLJbnvbYQr;4RTa z6@_zQoRi%sg~;RJ0ksbZ#InSMeRGdski0~BSq4sHuvaN3PHIX>n!-4a;yY09RRROW z;1;cr8Msckdp#%htM&qfH8&g#vLc!ikJBm0!U{t;Mx_)HO_17y8G;OAPxF$@cp)EQ zLbyKkR#{AJdsUCpk7^oGHL(R0T%wkuzM>#VlH2SvZe5r@jU^lN4HXaw3Ev~OqjHd;FCB? z>0Oh_4g%T^&!^odvE^vItpc8ShhXhX#HZ`iTBvA5Fl*HG3H2Gg7gyhsa+jUQMLM@h zHNhN=Vr>NsYP;d&(y}+Vi|4}JBu6xeF>d6+(gJDoMaZ=iZ*UWIY$4M8=3~noeW1x z<*UVNs)>`KHb{Y5h*inqiEW3+4Fwch9#(K>02)vZy)0G1BH7xF0K0Inr4)tCErQ)o z_XaCE;LWG?zGzU2r4>nVlA;C_@GHp-1}+rFIIpUdYAK)a+T_uu5GzZNa%e7bycY5A z{FchIlAr)1BFXNT@p>lMB#>TI>mci2MZU{>W7R;!RQ6p$FyK+7cjP_j7=w#U7peIqtGcQ-}u|MhACok_oOW`e9 z%Xx^V+=su0+OT9!IHCkYug;levJp`|hC~J`Kr9Mu_ED+I45gLy)uL8Jjl_y=1tp-q)>+&!()r(>g zqKw0Mnd&@llk;bN>eM`xm#s8c$YmHWSmCc2C05cQPR=aisQ|@KS%7tJg-NjD9<69V z+R?ur{8+|P+72LtYo3sbC=0%ag-8OKn&_ho5Lqg?KNW_VRCv9VjY2fqO1M;y@WCvL z1{vh3Vjm+9h7&=G-%UBPa0^C+!1In-b|5e#Fwz&y&V?ikuvJpWJ)i-+s0#uZACAgW zx##%mxh#x077~z@K9@=jQsomO#%k(4ECG?16!n*5RF*}t3OFk4| z^9dx@gV4eXT?9PB--AW}GprDaU4m|F-UjrNSba+_a1KNbNJR!5qUUu~JF4c6GS;AXeXNW_1$9AFs`3FW*9YE18aQg7O@|Hw zC4W3wzTcuwBxTv)ocmHY6@-?H#Z11H4xSbWKKkMR$KJcgMQx^id-PYZ@ zg+Z#=+EP5#ZrerFZS8Jb_j#Ys@AKPz-p~7Q(@!Il$>Gj*-?=B(b$zez zSE?)$Zf()NSH&(5yWd0m$V$1@N-T8gpHy!emSWN!G}>) znlfuaGB<~Imj=UGI6UPN(j`zOK{}xGqh_Ow-wertB1Ec&ScxtX*lPqC zm{V;+AI21KL^gv|Xe5zMA};4b-YNl+c&-}5+C2i>gaGrKA0a(QvC3R>;khNFyV!gU; zc@(X)h6Gto+T5!o9*Df#ZZZrS6Fe9KMNHoAt zwZ1&Q*D$ZK!IsG%z{aV~)t=2gV)YuSLmCUFnJT85d!4|4BWFfrHN2^;#8~ka2bCdY zah3#C{1lI5wh?~qMDnOutPd(63N1P8te%MNOh%bBo5CXsuvI<*j4_uxlKDNT#Xb2aFpXyxlXh+28yoVp;XJ1sFh@Cd8FFo3M zVCWURq+{aHp(n50psqeTR5m*^=kw&J#L=R?B~xRNCR&!cczk2u?Z@D-`t{1u*(>Y%MxL8rd%jkzJ2v^E#aex<{_D`rp=X00tnRD7mGwa1 zw?p^8{Qini{i+S?Unof({Pp#Q-%NjT{oKqO<%>?PO3v&#KX5+ttKPCRW4W(%s9&n1 zy>ImWI2`rl>8}fhBhwOh&B|R&&mB!Ixmr0Y?#>&(aXSR^7CRd<=T86jH;H4{7vxiX2lJh+ElE1;OHp|P)G=+9}E@%H^2Ep@dEhxqlgCm*)m za?~AaFy~z!OI=$RGJ4Q8{q3a3wvaDbGrF#%oVm%k)>qzZg5*H)4OR+xTG9{4p`Cv-NTPq$B;chS}$~mF~OMcBoP57k|NVlSEB-X_&9eiOE`7%zhF;o!Yya~vcGQfw zS~A&5TFG2G@n+1Q2mC*fp4>d~*oIGvKPj@lHooEhPXFQc4>ujSp5=M(W$T7pyT5(@ za^LN#?ZG9fLk2_UQ;;>>dUmQVWzi>}pJ_UC=95t+xAXe=%2zs)C;oD-uH|~}i_y<@ zy!Oo-fBErO3xpU4_&jzWfBCmmuwklZ%jr>h4wtxJKYH9)5PEg36mTrHe9LVCDwS4F z&5Nz|zSaUoP~8QKNXRHHDk+Bj7I5G_g>HNbe`c+_{I@^|cm~o*%qs65FQ^pxzv~{f zzqfLz0kTOJD82L=Glm9tQ9e)V_%^A-am70|PwCy$GW2)JvS4CnMaRxE_WBC0D!b$C zIdXW}BX#6(&y#iHF!(QQ-i8sbIIn%AKy5n`eK`2hKa;E1ddn;*Z4(4Q|0&*;PQ;G@ge$vwGX?q+Vx`zb}nkH z;i1~r%<{AB2962h zsMep!f|qWsc@)(8tZn}pq^`xV>>9D4j^JM;Oa+wRX1&rtaw1kyCK+iCUZNUVl2CDj zpq2_j+K6A1)npG=-56-_zc(hAaC;i4INZ;ZYB&nnpNgb@Mw2Y^cc&CqC-)C6$a6E? zI^qIR&l_nrUSgdGC2hVyr)V;iMs9f{guzuYBTc5=XnR{4|9a17-XghKqSB-WmGYCH zXH;`g4h@Aa3mM~XjN=8~6P_UFhFxK`wZPhN>tRBw7R>jw5DFscCk(=s zy_|rwq~4W803KeKq@(h&I9wv6?o`bZ9`{oV47G$?P}umWR0<^(j*{N4wzmbomD$d)7Zg5>$dWRIb`M1cwn?ui7!PDr zu@Uji+UjhEKTd@%tS~1C;JQT{D}!m3fmeB@9c3Nx)+0$=Y%cs85nomM{1!5Dp5y?gd@W zdyym^zJy2EWG%f!L=?gN)`^Tw}*RlV*fh$Yp7OM_h%! zDF729nu?ug`(<=RA(6@v0;S@GEtm_V69_k3pJEW$oL!qR1+4}ii`6}L-0(D03@}1I zPNw|ksf7-m3sZP)jNAD!FqDiFv-V`>60RN!$P#dG@@8DT&##*lNQw>+XpkS0A+r@A zF{F~AYNF}|!Q{~53bKbvFtSTnT5@u{d5Dhyo_irKKADauy0R;@F$WRg>N5!(umT7a zLn3jEJ1bielY#pUZ%~)W2)r&7CEYCw%!j$aw2AHz{q00}vE&!-Icbqdv{{i-bw2HS zT_u`ZsarI#`X1V6W#97CAE1*2@oae6f`xQK7eFWdw9wZceiAk$sdqM1Ygh!4{`nOg zg}`U029Ev5UvS+12ett>NP?2BAf{oClL8cAI%icYE7_sUo?Hk+6fuDwAbf!!Y6t7G zN zE)v)%XlUC79>y5$<$TSAy`V)AT5)Rb8!Qq9JdipBbaWKSNx}Uz`)+=T3M&%!L*XNB zg3Z2<@C_b?n$Wz!{{$(VR0tR(**RZ>n7KuEU)g8oCDRWg7c^ee~1v(;vPaea5-7 z_>TDJlDJmuM0qF?1H=0eViHIO00#`>1h5#W3$Q+p@6Uj)vPL6=B@opKAY*N?#!2f) zo>^?(c~6uU(zXDmgwh%W0dhNVgONLbgZ2V=t&*-j7)7ev;o>Hp$&Mi+2C_s*Zi+k{ z>4g*ens;X?`C13^20wj(d%H6-|JhQLrfX^oY{S8PCK}hVKMl^G1}_}=kA=Qt4ER7I znfvbf=hlDx>xAPGm^NVb&(ngbV9A)hFG=^)x4w`6SbPKB_rGspeXaB@Ce7LVeCwY+ zDL#w%mj8VNch2|IHm9a*={qy-{QX~-^EKaReBXi4`2X77gqFMn8o58+weR1bE)7T0 zzEA)4Z2GK=?0?V#YmgmA*q^>ukY>#Hm!HovqOa99xKis+U-EGDwT16O|NG46MB(B| zA_+VBF3-}i(;cH2DUDMDmxBhHe5NM5hQr`yeUAn7(myPI=c2F&f>i&*2=M2f1*hMB zX+~(nXlm;7Z~@h7p740W;HeyDm`omqJ3Qu14P~hyXf^KfSk1l%fz9OMTMj|~#bFne zQBkadGj4cb$X^FD0TPE_08Lsau8q*bb9ZNx8m57#9z+xKdEaBz1@i#BTl}}(fF;p6 zKKh`~tZVpq0ZL{b3zgE@d;a^*4L%l0HTuLQ^#8p* zzx4GIyt?_WOZ)hn5x;VHLxB!}TlzN}q4#_}C5_|zmI43)dI)+E%$m=`paawVe>Q-{ zx5LB-#?yjXMM;F4Y=JxdpDbN{NALQd?1v!JC;x{#PR*bHKRY7~n*Z63KR5E<*y(3W z{u=}RJSP8*fqs6v|FwaBo`U|heUP80pnqeapQoUIW1yd>pnq+kpQoUIZJ(c~pnqc@ zKX8k|bPlN|YpNAPh;z zvThq|!gcu&=W|LDN=AjDQH3(Xx=_VLX-M4JLLtris8-sEvJgl!wd9aa?<)rpr9y1S zNT<|dGop|zVV#AtpRPis3Z!iqLPoVA`b%g zAWdLLC)^U;qyj3{?HHJXWg%Sz_vxqeh1QLdhJ=Q|nIKf@tkA-yS8@=Aln}BRyOUXx zTWLw6D?mXDV!lon+#qCqAfo9D%Y*IaLExR1QHb#KCQU|sibBGP;jEB&f*n9KR*@k4 z1W|uT|1{IIpU#c?PGoAqOd8NFV@=RJrxxL}k@WGTdqiNAyvDJ-j5v$bw=srRv_j>K z{G99t60_(e4q4fg+!gGyDB5%-&?_0VNVCG%1(x#ubg!~PCn~dcQb{Zn-$5UmidoCN z$DPD^Tq|C{h<1@h@)cR%X5>u*!L@Nhu$GV_u?wV@^D6^#2c@P!5%dcCpi^o$N+`LfJNGdt9Y&ABxT)n>0Q1sxf8V`&45VMA-(~radN62Qh&bxBuGa< zPtssjJMD#sxC(_MY_py=hT$-h*k;^?l5{mk z_S#)CPWG}c7xZK^WujYfGK!L0a9;+5rpabrBu#tqlD|WOJV|HJxhYIXM`?_>in3iS zy91=ml30$V?lOhZ7z>yp(gW$QQ%PkK`&}n|{6cT4QxhNQt zN$r%=Lni4iNH98_8iiD71-^vw0%=U#M72WyLGQ!pacW!|1;)73p@TOl|>$01GL7fB>+_|{#t|Tq#RHW{wy_@i2Ls~yQLv%|;h3pRcMeTZ^U*Ty? zPC-8|$dBjE4Xn704J>P?H8Q1-{qS&L5ufrHc`Y|$_X&m!w{fg^A)NF=j*V66&nQCdy-F!7F zr=8~| z_71HPcsgJWlX{7_%jffXCQtcKghxatp=wQ>7PO-MG*mFAV)s(;;F5)`AEjw#Oj^Tz zNDB-W6-E<_G?PwQcOIS%?f!(ACd-Bb= zV3L8pl~WN4>iZ;^A6g?NfkBeGnP{N(uzvHaKnAViq>6Y_GGt2;^(s??f{J>Zg0W9K%Uc;!O_}SjuETuGy}lgno_7273sJr zwVKc_AzMF_&r>uii?3q)86r+#Efi`c%871uJJ-zjm{?KU>$h0}IcnWCg?^hiYALhM z|3=45NJMKxIK)rFQ6SDqWzHx%LT%X!VcV- ztDJWdy;b`Al7LbO=%Bpa5yiAq^+^0PJ%X6u>Spgvi4nNfD&_T$r}2ETimzdGyuYfr zis|6)N<|93uUJx5E=eMa)S4ntCm;^dxqJliH%irAd-y$*TBHOs%3XjV2I!3m-60^5 zgomF<8KLxAB!~w5kcx}V637oBezaPU;ZsbMT1Y3u6f1t`hUOlBo2rm$38*LdS!#Oo zJ|rcc&1arhT7nd)=S9P1oYy4TRcl+RHoVUEe_-SGIS<_y~mI4`Td9ojl0qBEw>Xs1s zl*ydM!m}SH7OJ$&K=CEB12>>5rCxKiF?!$(8^(qpQ?BmvH)saJp`Xl z2p0rYNGk;HZ8uc0JBI&|@fn3ypco8wn%=MV)6E1X9s+oalCvZ+O8}Co3w(it^!o_g zQSiduOK28|cNb$kV6NCWJWON2NHkEU8qaB zw3RKOGnIIr6#PFVy4rpNf+weV8TiLfMT}2<96V(-RXSd%s!W83t5{3dih%}g z^`W%k?d(iyJHth1NRgua5E)u}Uaw32rD3NU^>yHGb45K#*tZu1?%We9e6h2px+Vor9Bgbh>aDhO zBMGYYt@byX+zs3|zVFpj2ToN_trYrF#!h~pJXLx8>J#H76%TSH>^T3otM5*2JQ^A? zc7Ac@+JZOUxS5yNSw8x}=b2SEpPx0e=TBUE#KV7>c{Vil)(zMF8z0OUyqo!%xh~ ze0u)3F{KOiO|C7=CsWt^pZ>0N?HKo|m3`uBG5vtLeNTs>sP#48dg#oT=V}kKqrKf7 z!k;&cMORLjp1Z%C`*PM)`o_dHQ|VuH`rr7LjC8CgL&7>kN8iNqToXB8ZtXu8SW1oe zoGuv};J+z7uy0bpnk=v2b;Xlw@T(b@S6?svV~o6Yu=Dd=7}Q_D+XKc78im~o}XT^2A{PROqjJ4t1r(;}n(0!R;A06WY=fts8F^ezTw`^P{PU*v!hF%U4(5UUM+BW2pC;j_6L|N=(a!%;@RD z%S(^H)A`&xTdtGo&$k5-otMu%_r%4?Z;oD-|Hj(rh~a1ujoP*Dhc&NN)*U;QG1e1% zHEr~=b?emdM%R<`11z0~M;%8ykG%WM=#9M4BPXqji9pQRhhfa zeezB5jjKT=kB(%=4^)me^f&E2aB4ynGgGH?-Iz(GpcdhVa!-(d2+f&#fWDeA-v~PA{g`2@e#?hf%m97ve>!={yJ994 zdi!NM^qexeWmUV?(VumDUc)NyzWU$~7Mv(JI_%kUT(O$afqQ&Q zuxh<@fP8jdL(gl}m8+CD;pka@)CMTzQ9W1JJ&He4TU1j2t~%zEiSSi<4u4|%sW$YO zb>rrO?>G7+(LpNWqu8Dfy-y9je#!z;5wGko!9H-0D8K#KR~qVugYtF{_sk3U@yC#W zJ1jiAt;fc$fg_iGY#*=;eQ3{wRWR_F_CP6W z&qN_8qWh>%d+NG>Qj8cp@qyvU{lCP5ITc^SQvwAjmKaW=l!6_~o*|%uLz(B!Fd*;8 z7ljE#Dfc~=(+iAQT#XM717CL0K9CF?1fa(778(IoL{{Q?RpSHC#6Gj9*DHsoqBC=e zS|O~SQs8Y4c-tcqfNv%xS4z5PzbdHx-UywO76n50JTLK>pwgmpK~nljI!lrBQ>#cn zO9blDQlv_WEoS$b`0>n%BoDU)4kTZ1~q z`%<$Bm-aJGXS&-Y#fy$XT&H#sGZh~E95?&9poWgZiuILM(Lv51EiitXXstsmSgC*7k2Yxhb#i8_Db zP113JpyI&1KoGjuHBxdm3AKbcfLW7RbO$aFDo7(9FczoaT|k`PWvpZ<;Xb`w>=NP% zx07b2-W^&$@1VuY1z(i3R;kDKGOxs{?}wY~>Frz$TW3rl{ES8THcz?`BxMpkvS_(N zZ5}KvSaV1cERDE)P0h-O5=gSy7$C&7F69o(n`IAH^dnBHDUEmpLk$^sNwhI1IHg5S zpL?8TYYr&!a@upP+j9oSW*{vDyqZBYpfL#o6;+i8^Sq0jBW9^dI)%Bwql=?(rYkC+ zU&2Evv1sTm=n}a3@kAvW8mrSYlrEO>yDLIl1uksCSAp=Z48mnflE@qo=rob(fRRsFVW7oysK3(U;;YGcts?2ux1A6xy2Ki zBmd!)l682CiPSkY{!x-fx*+S^-3r8z4D4MQ3Wu_r;v181ptML5B%TlP6&Ba) zWDBN2stXyrvtCAOPcPMb(r|#)^LpAp0mCWIN@~L|5|pCNu|@WTOK4a;o>D|P%Q+N@ z(i+`GQBis%S2tW`9 z=LLv*teoKkPogH9!XuRh3d>jC?aT&xqc{esMr-23o#3Gp0@4MK9!}4H0Edw~LyV(+ z3NA6Y5X0rO*KmhPORV?L$mZ>7ny{g498sZMGow{7DQ%$TxJbxnyO`>142d_Qabe9e z>!`0+k%$7Ei_g%}G9|XB4womG(3V=w<|?Lxc#mR0 z&D~1yJ@nfgs=sfc*{NatdYB3pV{HVMq|^Tb$h zsWb4}?9Yzg-Dc242((6}sw8k?LAt^pP3_?wSK2hnv2G|EmRFMAhR=ANy2IEb>|g`~js|ano&CizKr& zh${^)qd=pe8c4?#rLs`#q_!ZXT zUnv(<_&=p@lnozxL`x5|DviMai62WXqW!a#z)ip#t|}b7z)-A#Bw^{q>+P-V5x! zI02Xu+k)u4?)bn&=|J$1=j8!? zY2>Ya&n51eWZSmy$_$zwukVPSXndpZ{pqcb=|@?1yW!jF?RccQ+zphWc`pBuaGwq{GQ?Fj`Zy#0DI;y81wLH3>nf*mg89yl+`W`tFGFD`6 zN*Ufz)ED*Ry6MQrrhhlNsyp=Xl%sfh!Q@j5w|;T`dHVKl!|1Mnt#c=WKJUDB{o{^- zvlF4*L!LTeigcgPaggsb+^-jbGyU(fqsS7!0eQ~e$4gy+S& zzu)}ibV#=6?y+rRrFx_|KOuF>?+yoAxzv^ST}o?evx z{QkQA6NN`g(jJbO-{5$YdvCNUc}NiZJ|@wv##&r?WkMR)04?xHXXR7KhgRA z&Bw1cjbDFm+t!j1&n|1~P(%N~>FF2zpP%kLb7R%oJbZLf#>UwLJEtF?b#>{fJzir7 z*+C7Fc;?N?mbdZ_jyz9V9lym#=ae?xe{s)<^gfZB>b3%fbx$6$Uw`lMVC8sxZe?5?F&NT)ct1jQN z8)#rwJ`;W2-}@d0F2o@A#LSWUEk`f2plL8Kb-3Rs<^32~`p6M>{K=WY<#W#LoC--; z^u<0b=EO92-t&ZeO#1C7%yvAT3_Y^c61soTJT&ym?>BSq@uj<~%WcY36q64A#`q<# zcj;Hajp_3uj9IY4H-9%~;5yhbWoaEdT;W@Nf`_&Z_ZR~%gGbQwV@PPvc&R(_!|}qC zpy?e2&cL13D?eVvrnVRM*{{3llDWTk5BK4D?%`wjLnp036JxpK63|NG^>JFUW{pKD ziSeUR;C<|RYpecDEJz!C(poa_EIWJ^t~J?!2V8y&{0Qs1A#S&oFJJmM{;&sh?V^|0 z@rQBHwhJ2V=LnYuV}Uf&U#F0p3V|N|aDU;V^Bs}9sdGWaHE|T<7JM55L1()&p zT9Kn%&*`ht9S(O2@SvH{eC4T2Zr(--v7CvyNTEo+kD26}oRHK5^_#D20(jAzhO22> zwHBw7hyS2|Te^oLEs~(t!%H=CNY344?BV!Lf*rSTm~JL->gEl-6qG1593*<^ZNL=9 zvCahA2DyucIIXe^DS=h|jW$e(unW#3EXw6em3;qeiEG%5(xvtl!Adzy&9m8+_uU}y=oKWs?E(3XWT7^6>-~IItG4488#cW7qA?t(BxWh#>`!z87)=K z3*$12Gr&12iQA<0P=scYysYC8XJ?fQpdPV{RB%@3FV7_k@d#>j+eM0RusT_nQ5X?&@H3I@^~5!9 zXSPvsqJWdpLhRxNYT#kM+oI>GLGA^<2wW>>UD^t~pPpn0Hf9beSu(0Op`s`yrGS(o zd+?AP*?b6ZVev0l#?=SUW*J^o<`dtuTDHKgS!^^5x;45zRJnLE+m@T665XI&=%84N z)IxmO)Z=Y&oL6O?j9I7|cq?8B@8(fl0qds=1MYFE7vhj-25sH#h$KKB%IV3*B!mys z;M5Kbu2y^#d&VvGk~Rb6B7xgPOeg6Y`9*<*m@*_VbS&s3u@QtS3`a$7;S#tg zZ5t;kg^tZ4vy+ynAfl0$^!QrZkww`R2UjyhiTL-f9+opSuz1vSDvjnhm@OE$^STr;!5ONF^Op2AM0>PtzAMb*#NI-!V3N}`3K(+=_s)@Wy| z?{@R@DLjFOaBMT>J}B4(CZY`2yhq`Y7ziU*m)c&%X*Nw8uGRB1@~KTs3c7>#Q@F#1 zZrS2xOe!Q_K`@b};}wY%lSbE{H2p$pz%4U~!1HW8P8xMmHHZ<2euob#6v_M!p7X^~ z)S7;EoX6B1GSFlNNx%h~A(wG?w;~e4uy4y~NCYliXva$F9AGbI@C>xHCZ69$C7&96 z;JEwl7Rt@k2gQo{)K1hwX`;Ax%#W2@C7J{O&J@oDQ`tN(&k;1Ol7TD6B|3^+E)G7Q?h8%Lmu*FLlgP!liDKa(S{PfzGE^ z6xCO2gJ;BYWbI&*M~R}#igitj_(sIa($q#~Ss~==8Ju`q8{ea zD5_ELyXZ&^X~q-;*+)6oP*6j;nB63RC#Vz6y_AT7o}Zrf(x5BxCZ*>XZB~Xy5L9pm z+y-lS?M?P zg=!MLvV{hZ5a9&k1x-F4@5g8J0DfR)ot0PRKwS+462e-Hic{Ntp?HC@i=jmX^0jV_ zvyk#*QALuHv3RPBBm{tyh(KLL`JpTZEIHtQ2;g<#Nh^DtS|v#rMcQ*DoUOjR;uroH z17Hh8@{{>oY)L)fCp1Y4{8*mAeVCD8l*tzmKMv~6R1_ct;Iz0<$t81)CQK-nirs?= zv*UyJU~XACgdf627LbYb8kZrh+eR<2+3N84az$|z%Eoue{tCR|Biu1Wv7K0!EM*HG z1E$&2C?sFO3-~vSB3v9)xP|uuWg44WNIQDdGFsWNZXv4MlHZcfFP04#DRmVab)KF2 z{1)R)pW`S3?x*GkDbf?ikTK%RsnXsy;3#!nTwaP@RAg^f6%}f~OdZO3^~KoLlBJPK zrOOI5DY@bNnKh4)%W`^zO*jx;(Mgp@>1Yn0qulF_wn^OE1pPkVy82ypZ?@@C{hpe# zXwt|xlH2&tGNjA=o}D}5yYRH^7D)UY24+pecs6#wj1UI+-P(YQvL|fM@ETJAIDx-%?!2qq z$ZIhJOGmNQR&40h+P>kN@_`%Y^Ugl5jGg%)GkxT@lLOw7txW?nCq7@cYX8<_2a6|1 z9`3w3a)hXy#EskHjf2t_i(y!9uj`(iZ`&$gN*foau0HzY{I9M|4(FsF+eg>&lLv_p z3>{bZKT%S6pm%gv_u}%BOPBuefMfTKxiMQ^Bg^o*icvDK^XSNLLPNhfxBJFZb}Rca z9TMLZ@OaQobK=1DvrRcCJ}#^qot|1>ckKGJ-%k%r^u6?a#Y|AmzVT4`Yft8#y76oG zV+~s!LkUY0^G1U6ru(nIFmU6;zU;A?j}082e)@2qcOuyR1JMUg0A4~3&9gjG$kxdt zmfhCXSE7e(%Q}wVdZr;WZ9J-U#n=WW)>3zIU(nUC;gt5e@89`!RKVZttpfs>jNs&< zb;iuS?;39`BVS{het)j=@ujymDxHVNZ^bfJd`s!m;&3is;3(iN3pITgZ^6OU*Zy#QHreonT zOCLRH-<7#%z4+~wZTlYUu2Zke^XkNj-^8B&{B(KV&Eyr)SsfKad{EPxvws=Aw7=xg zX!Qq~6qapkiXU2@-g)XqXwJ74RXrz0i{}sQe7a`pmDtRuRt6-_96hRU`uq6q*18q9 zGXoy_E>oO%_uUd~DE`Lu*VmuhnYd_zEUsI&%s+4A$oo%s)D9VHJ_(5iZ|eX)L`GTp zQz?^CZ`J*6q`|YkHTD~8?ATwFs@A@=A7B7l`s86t!kfGI+-%r*wQfAOCer;%T1V~Q z-+eZ8#%o7|K}}#0*HT+>RXRmJ;T~1DoZi5KK7hXL#5y^2!(5-3KDe*#X&)WBWMsf{>WwTfP8qwi(RvyS*x}1d z>&$m#ui>bEHZy9dU(H-Ml*Rg7kVY#%v9ujlJ}>E~6<+Y&>E7s#|5`$e!Xd~PO@{cjKVtgRZv3vgstrZzYD) zPB45_J!whcC6G_WBf1H;nWXXPY`-fqx`b(?A*@y(7%9W~X^yT>h|oQkz|mC-lOKkJ z>v+p71zyWS7|OC!iBKh8K_gSe?KFZbX~Xy%mrhZIN?<8gcqmO1l+f#z=<|hAqi7UP z6Y*?{(4yqNexT=+SxcluQP&l5lR<8$djHxY1qPRAU%|C>jXr9=Ck~IS1p$Rhrc05p z;ZkH}LiQr6OYBk?(jT?3WJ;@a?6N%c{&1YKu!2hJ#geZuVbUR5LuDM23uK5Xi-MWf zF0o&b)Kb#MFkP&;AGJ#i;wqwz=mwobGFHahP1#<$H~%=xFOhT8nFn&W zJnsm;yhoEr)aSB>?b7#Bm~mL)KlU!jx)8rv=nWTB6YOR-fo-v5ks;)XdAaElwS!)W zrLptoN>+uY*St|ne@eOwV}Pr>ct6iCkTV+P3t5M=uVm3rknslEwM(rz$Gk68(U)0o zcFiUC=t*ixHwSqUJ~*7geXj|WWKu}f(BorL7n5v!ZnH7JJ&bAtI&VUQ12)A12&f1Y zf$Rc+K3FaZP$()crsxV{A3S<54LB+a@O-)cszjqsI#))LG-h~HW`NmF_>KaPbpgIf z#UbpB7_|-!1oO!TXAz~yCLB#c17DT>u25QDvc7TevYfUB0CMBnK^6WONmudAZlM_8 zmyH+3vL=t+s}S=w7OtJx&`$3#vnDLC;;xFrOoAGCK+N_KQk=dL`ySwHGH0M|{)@Od zYXYAW$s#P4#3O|`9*G*K7rawlL}w7il+#cg28kL9KWs!VFfN-&n>by3B(OVTE(xU& z%SA~Om4!XR^5aFA8ypA1*kc4Wfy2TnUQ+3PK1&L3YiSAMyD;yo=tkU&d`e55`d=io zt0llSQkoD3&|-SLTqj0j5Z}7JP6hU?~6c!y0GRmS&>?$j!$PGA)I6`BPo<8 z$V$3^6-@s^v;V^w;uD&*istrE@S zF|wk5201Rj79-NkN7*qdHw8oAaB*HfiU)Sz5sHo>*mMR#DDHI~Rc*r)UlK89D4CYt z<_ZNVM$s3f;Tcl0b`i@swJhDnr>HGJMcIu^ly+R;bM#CrGp}B% z!FFOn@s;&i3xHgf?V{4d{rBumh$!b~!0&;wHbs_2vH1Y48l`BdT`;p+fbPCH*HxpH z@l&R$i_84>5Yc)e9G%^W`!&*jwA8{yX=XwKZM*C~L%e|}-xZk4R8oS!j5XF98z^e- zA;!b`wa9@ku^Z<_gbho;*d(?9mt93-7n7u|~JJi1IV`8r4{`Epl+gOsO!2< z?D;dMICORO+E_8Q0LGw=Ai?!7Wlpg+G7^`Xaz0{SpX8~zC$jFxE>!n$53fxK%3jDO zmrC?d^4z6^@dqXDDXyoY_p5{Y?Gd|pPxWQ?_Zi-uzoFF-k9%9ohcRl<-sl{f_ls{0 zqXHog5nUU0#B=brj^iJmU4d4$=@0Pb^$cUT)$tl5BfZL}-p#hxvgrwnZK=gf#bv6H z4rPl)I;th?1B+1}1x141f^>R^82kpaC@PaGaQUNtUgE1#tbum!VWaj&roB^nS&(TM z<7!)=1?HQRHr0}qy?_o*PVv%p^}`H(QJhuu*|L%; zoszPZOnG@ldhy?LPBg5nuFs9lsY@AJB@ypOglv5|qa*AI@r&rO(3B8M-SvrAzT5Xs zXv)Ra!}l+LZCB{&q4;O7?j7Esz9%*DQ{U8N?jQdytn)PFMw;y3>>oFZ1E(LFXd0WC zuHN&VaP;}DjW^a~O*tbkY|UFR^oaDHzV6uAjiY(-Bkg?0M^l?mhO}0m{^KM7f0hle zKHF40Vm}xZ9P>`%;j!f{oz{_<7jGLviSZDoRxR0lV$bokx|WHYlhKc4h7YZ1&+Pjq zIeyvxk;jRSOV>k5|KBdY(t0CwWz+k&$iRWVk%NqtZe2Zac6dcX$0Il9&293OJ~px8 zu{S28=)TI~AFd~^zV5%XNgD4ZJN8ZgX`t!#o6DaXI5tER)_o_k@&+b9`hDV-AKsaa zruqzH$weE#>r5OD9{l=j;LJhhZC_Z|-6~q~K`gV#k#}gcJbr6i1DANH ztgJtB>b0*ru8e*6*6QJi@Wg^sgJlbcO7xjMQ}Z&8H+<Wk1gX;Z>sv2(EH%yCD@tUBiY=`{M=D|h=3_5!_`D&V$^3Lm{&v-G^G0ueoSJCyyk|SVocwruCi|3OR6hIQ zlX-u*Ie^``f8gAi{?SF;0CDQ;XD_@il8S{Kqvj1#UZu|bhwz0{ct)2w{il^-ukqU8_C1h7Dc|BQr!Ut}8JR^V4nS_k%bggszngLC z|IFgpjR8F`$@fDhhrWzY%?n>7?URE47;+x>0ATEMWjoG=wr}yBGh*2L%B;tM_&@Q( zMk$gvPR+ZVI^Sqq5VB~QXXc02&7*9xwcfWna4vYvu(Z!U*5>mzDwclYb8wQQ@+_N^ zZ;u1u3fTBl-99#ccSp*U@vlHjX#@{vNXvjYj{p{2F0d2bDIYx7!8|s_#(&$90LNBG@o^8;$iv@a_s#yxcYdX(oIKFY2yBgmo0~_{zj0 zc!~5F^BKSWffP+aeGerhN+@@-vY?dMf{j!C<)W-j;jXxXXKXaw8d*&}b$PXFsP5l;68Xr8v}>%^Fd6k30`G8!GEX0C3k)08yiGR}X37 z3luV((UI{U6G!1}cT{s)k_RW)VtS@@c zCP3a$jBl(o_IR)dD8QJ<=;g-_vNXOhI6B;l6;~BXHSerH#JpgXL3rww>_tq|_nL2X zNlVpWyk|96VM|YC8m%M79Id_tMiJsmWS)q2h;rq`}=hN)|Jqz6ImYfuoOc61-4ffXo|e z(&k6`k>Ky7X;QU7?l-M#|Z)7OtVNmbIX^_C}Me#QsA8bEZrw%|1Y0FtBh(By zN(&CM+1%Sykz%|opi*xdnl|Spi`v8Bkdvaz*jCBukONf*EeSf>O(`JeTq?!`bgE*I zK`Hq&xuDFnR8FOHD7u!26=j6nX2C0HZR7vq>-*!Hs`vl5x%#X=-OrbEIN)JU*f|{L zn>qP0$tIa{&JJ)G2r@~@Oc-KKvk0@YZspF|0nT86AR3xC7^0C;2w73Ln`}i5Q&FygZe!iZ+94fa-0JNS}HqS{3q7v#GF)a39 ze`9&;4!nkR-HQSsbQvA@SZWOpd4^mc!qX<+lqQF6t`t}&AuybzXe1dtSm_WHvy(}! zyc@2PY2eiiB1#JZgEqB;6EVCUG&dq&L8(_1DM3L^Ckezl;1-ldO)(Vbpg5_a6q3;( z(84T|Y2@b%dMFn1;L-Orq7IU1;_z#(t6MAFdPCCi5|yi732!49~KfD1S&lNn*gA~Z9?vH<0L+#pZ$1@`Z2S^;ov zF(L{W0dQk&vTA`aOadpVq{0aUnSiQmP&gVtEReKMSPI{5IHiX|E}}kK0)jvYJPH4; zRcI7VX88`PTn;M};HQMj7MDXg6iF;>Phb(&X~-5cFg9T;Zf5WVDT$*P|3DOMPzEKi zOD(56oh;Gxfq0#09+U8|B%4i4f=qOf>JnHffs*@NCh|!WT5^907_=sq%b@o#NmWia z0WD|(8GJvZxWwE)UwEg0ahRavY<_f*T*q)tfHko)Hrhz=F%<8BQZ^6Z>l<;ryopfT z5t0-x%|}|IU6RVF8p-(^bhfE?aUq_WSjzfH1XGwvWjd%!S}$o>r$@pPaRq@cj;`GW zf-y=!k|A;w)jXpzc;c&!OcnVRIm=MMB#8<_jGP5WQnA7qdhlnSh4_tyh3!6^PU_G! zqh@6s05G+44ICuFayiO?h%f~ePbEufpm4v7xcgDk%R|B`OwmO;7{m$C9G+ew3dyQe z5_iy#(zAKoKM{9YDdt=v-&_v%x7qS%5PR0i|HE8Ko^3l(GzEl3dmW zc3^_6iA++-$RuT$l8~w6xs8}oCQGr4@MOwo;ZHx&lFerwx?hb#znV;@^-)ri2!#O4 zfq_=h5WN6gR-){p5CG#>X-bPLttl$_{GqmvfUZ@UzK%`(^iXV}O7H63{s6iL0$Pj$)`H_0bh(_1p z#Obidgigw{Go}SLg)OaD5AxrI3Ie%}ZNbAmRe}Q>=Hl_E`*u*UN3H|EZw~7kHV>`b zYNCqKLbef0kEG3l&%WIFoY*gJI8>euaA4@BBF{7Oa4d#utoehWk16>cgnZr|co3Wj zlUL#DF%K8(B_mORp2d~;<149*UanTsZ3V;LK|c|XhT|YBXW7 z?p$>BL)vBfbYVY;HrZ#aZ z!`|bc;%>ZMJ>ndX`6eRMSay`3WY0HLjkz^#<3r76t$|H#Pi}vuv*Q!vAMw`*Ek`3iK?iT& zS!b(e;Tbl3D`v~c{AJ;vKUpMReXqTIVAIVP!JSW&7ZyHadABh6Q?8J|SU0hG_~Hv! z{}?^(E+TFwd=&fp_+@{Q=a!*+WN3QL=AP1tjPA4U>Y>{WVMUc6zxn- zIvWCKzj)?y?31tj++7<>{#<{9JRRHo@|Pc_O|N?+wPi}YItvN1peXqiSJt4nywp;HVkYlpDwK}TK|V_~u7~gceq+x! zFVdQ61JN^Z-Ls&ma`d;h_j(%+O!~fy{pdVC@g@G#+Uoh`qqWBQ&N=!B_XNIbBlmfPV(IDML{dj6t&5X@i@y*c1jH$mlDFywER`8&zG`mkmQ zLxz7I7+q4q#=f)_Ojxta7^v4W6d_Y?W7gtHxJiVYyw=g<`YbSdJo9r1LVksGNh>s& ztlS4Tb0*v1#tS#WqknjckXu#c%>Br$8I9P#@7Gd%d<3G2tCt}Vi9Hrr`ChDVdd~6x z!7i||`Nq2JQ)BP1bd8n5uV2&=bz@WN*<#TML?A=q5#o&(A;&UWc&06S(%^3+CV{^# zdiRx)rzb9VHxi8moNvR08~GO`S?XYhv;;v2G`c$#Brp##jKrw!-eQu;y6G>sSl@;X}Z7IBoVhjo2x?6Fnk@sApF{2RFghUI^OSM$w0;mTo zZ7NwJn?eQfMDK-f;n-YZCJH09GEZQ%U z{?X(cyy+_*w0pfkTuoJ{*7Nv=f^<#4Si>!>*h0HfhFew>Uy$8+H1&yoF;`uZzEG&o zh60x;1a+G0)JbA|Q;I|{P&oU{c0OMqoWNydx^OnbJV^LNgi>2EhvI-(3q(JMgJ^GI zxD-S-5k8_xieb&D30N$zh)whyth9qBR1vqAWn|3Cd%HauiMBOGIHQaS^n9Ky_exp# zLAnAsd()TzN2IGAL4^UVYRgIcT*8#eQ6RS3c>#I!5 zLD<9GZ0Rs<&8cQ=oz7iH4*Da*rHyAn3^K1Y(=Jx7f6G!~Z#=R9t>Wg>70xZodgxhH z7sKH63d!&vxY&o?4htU#dXew4gAhl8qS1DkN&{9IUGA@JA*{YN(jp zJ67=&ynzc?87Fkgr3;^7aq z9j~Hwa2c&i0qq{8MZwq|2`v(?l`OGVv$v;d3zc8+;*1JUH$SIjlBa9)wa zh4g|`L3nrsel+TmiMWe^?_C_L(s6zmOFb|2wj3yqA=20%$ zqsxa88T{5TK|w=k-2D z?PV^R1QAM`z9SWG25%=Auf!3?Xslj}#>WB?*m96B;z+1nuw)a>2DvS%mRiCdXEAaP z=0Vm8;$nFSc#wFp9wE~aJx?`@a7v=L;*JACiYmH~=b3Jah)x9hZkr^5FKG)r&kVNa zF6K*I&<^!3PK6&DsEk83eOL`!qKxEgiJ$^V7{YjWP(fo!H0w#0DgXjCUxeu49|2vG z;l3D-Ugt6A;HYyc$CMsNg;K%lfk6WbG0MX?QfgHrQO!=AUK2!M_n;0dZIvYnN1#a$ zuOJSHpLfegKyi^61<5aYuP~i-TruaBo247IZxn>M^&5yP(#fa|UDNJ7rWKAc=b%yy<@A={vB z=S*=tWTq)YypA(00!vYlq0mg2iO6O)_SeURhY{56NzM`uV9B$z1$xaWis<1pNC9kP zr0WQ=!5=&z4vBnKJ(14S(IztOG1Q_dh~atO)y@xqUx6|o;Fkx=O%G;-!VoAFIzRVA z@^u3xCxR7_YKhpvOmtbWj#!HyqiHWcA5(uqt`{P=Ap4lh6J$SO7B&g9J)9wV zkm$p`=&x2#S@0!OA|RlX__d{%e=)v=gzD}U0#`vB*I@N-&$}tJC2DqQ7BjVUWgBrV z4cA=LZ0K3Jm7Y$`N}gDW!rA~L?Hm6yF)`UA>&G{^i_Bv-`p!^a-`In%X05*cXKE!J zaH>bwCigsg?f5fAzfWS+_NQ)ASnMa~t_~g8?w>4Ll;^+k5S3-Uv2^!r;U(|<4~t%! zs4sr7{KlWDJ?yKqr=w!BHjR%8Ma&rXLPP7+xxGc(N7p7q2>T*uqYb9(sMN+!bZ@EV zKT}%*5?bV&Ui#e!KOP&iJ(5-YLij>-cFEEgs_9V;w)&TA$CsnAw%$cko2b=8+e0Tn z==PIi$;#|+HynZ_~xhLiJwb#D6lD_cFje{>; zeD?zXbN2XWQ`?;{(!bY^xppq&x2Xf&uWY()k@k=7RaY~CSFg0SXP(cU*u4Dcf$>$3 zS0gjM4JY$*`j&28KCwDneeOxC@oMTt|Jc)sdHz7?hU3$8TJo*Tr$&k=Vq<@7eaTdb zlze;k+@srKUOYRQ8k0r$KY8EPM;i_Vs+Z<{{c7mfKaL$}&GQx4o?ka{;^2z6Be4tlumcUH$k`AK|THcYY%Yl#Tvg~6Y5t*qy$f!AU z`|0n0++vtmV95J!Z0?%}u4NP-JvN`a_Rg-1QOY-81GQ~bX%ZK3+`I#dU6L80^ki%KIkDoWwvn-g@ z-9LL%kNtRVTK#CXb*5z*Zfs|5Bf))|skb2N*bTo@-47jz zsceg%0wvHCKeM^Zm{fXtOuIl<;;t5maA=U%GD>$xKzJkF-7Gs6IIoWA4XB^5wg%MZ znN9Io&q&yWv=BOHq!~yh%|IisKCh+Nd&3hxTb#LH%M3P>Vvj)?S)%yv@iud(`t$G` zOT8lvsS2%+oS{cxmxXwYb}3j#jR?U^JWU5t&KVAd?dtoB*1!)Y2LiK%OvWr|xFoeg z=n!*nhLWA3XUbTaS$>ymQOL*{GrfChj3b^jV5(}w$fd<|S})mU$Mv+dl>iKGTU|{n zDlp7dvdUTqGEK<}buXVFh7KO{gQRwQKi`4&;|h#e1=)!KYh6ntpu#3l5XS2L(W0f+ ztE)G4S>n`(!H2!~RMhK?%nC`(oMKnOuF-<#Mx(d}MY@4yCB2VFhxiGE%MUF?^hT66 zW=aSxrbfC@Tj@M0ctEHpqU35Q3bPEDu^J#8ZVDa8=^#BeEJ~p@IIm|ddfV=~W9F2t zsFy0ksIUQXktS>>Z`li%!f#}#scj}dk;$%r3buA=wN~xoH7&k5c-kT!2lb_iA?3w{ zWJN5@XUMjeU0mn^Zx!zH!=BkMY6!zAN^RmI&{JGJ6RZ$E@K{2>fG@j5Ksn3Ao6lgW zJY3_K>_A9=5~)ZFQv`85RU1t?tXwl(Q00oYd^j=J3E3RiMIa>%APNW(X8quRpsP$t zigKk^fje6;7lNOQ3 z_Wz2(bQzqgF@kcrxqvqt5%6R;wR7MLFI_T(G}mwy>LqTnJ=;nGbms{!M2e>w=&!H~ z>LD5yc(vd#Nh)jDV&iZbk?SNF_`xj_zBmc92%^skWJ@^dK2Bt{Ae$#<1Jo&DUOwp< zs851w9+}X%m#)HyL-z?!f8T_ZU~Vf>iMDy?-9xAkCv^iy1Q{FudI5i2>AhDuB|i zfHBz>cz$2>^T*4#h=Xw4f@+p7%`4r8Zl$~70BGjW--w@~weHAvE?{I`0qH~|j9b#G zg#Z65EDMq&7>3P#@8|m+Ine#h8+d``6yypJ;(-F1YzNFug2_j8QVj@IKt>@ydJe@W zK@4f-tZ@u)O+r*Mj!F^~7P3Heu%a9X%bxhJ9G%;XhsqIk0k(S-=I@o;ARMW;5T#Td z5RLjP@wK@Yc~pya2kRcC@H8QwUK!QS&C;nPcT)oDaUylO=syZU=pb;~0J;uTnaW22 z*jp&3z=iK&!7f-2Gg1J*9Le6JOTbg0|7UJ6Y4M>k0vBpWP6+qZ$&8fxznsYmhM~DQ z3dI-DF20mVh?XV7{%e#QCMdoG$9P2GDwt5ttJLx(LJg*?Az{BWg^^+RQg(cv(3nHHYq(`ivt%eA z$B{{r(86m&p!jJAC%}+UnkWndvP-0-h?Gk!h*Q1%y(p!%3SV@qF;a#_-VZgOcq<$j z)Tm|TB~hM=1 zC@w{tF2UK8#%MT8a8>MF{2)nga?eHGPY5K&9o7*>lI%h=YS(Mn8bBo0FglzYj4I^k z6OULa5{puWs_247QL7M>R7tAm5b3@kK7p1w>IAJ~KDI-M6R->h;S|r|C!j?Mbx0K| zX)eszknqDmQ98qcxuaBF503(!D0fip2;>zbCDINfDIj^n;@xbhJe-y^s!aMz(mK@%W|Mm&PAJ~l;NmmygY4CxGwC8gx7rP9)vFw9FYpzYe(lGNsu*_Vmzed0g+jw z6oWCPnH(a9qT_9|`6QKNl;kZcD1$Tj36i2dRc=zQ1kk(`*@QvqHO>J`U(4T6up=#0 zT4V}m(ToHfYTUF35rIrGab&QOhAt?iye{N9$uCAj7+xZ`Ad-?PZDPaj4MGUlDP6{5 zT8k#2D{v2~lanz#Q$ZR;71TUGxKj~^N-+8$N0f17kdk#Ml3-4SQikrp%%q&cg=CIX z$|OI`iPb3W&JH%7g3!@Tt1QYDqS(l~P=x~t6ulrjPB8bC@HCI|42#h@e2_ew4x7cz zaAjdIQXrpZ)q|`;#(0mBh>FJDg##cFqw5(6E@8PNsGwvpf}+manEkUzY}rV4B1qWi z0@G?FUr6&%%L)5(;_D$qg|U_I=t-oTWhD0y5@5M6el`pO8)1S`5l1lN@uo&{?&g@f z%-p)ncvgMH+MYXEj$|PN)CLNQSR=>atSe*;F{*_o-6d(4asCTrWHap~gh|u2uf%v5 zQR2s3O81pxEsVO{gxAmJ*R;^;4t7f+PzvYt2-P5c6q7H(VvAo1#11E&lnYH6IT9Y$ftccGEB1I1GTx#4mi| z|H2bo)pPzk9v!IZ$d%_-3z7Fci$4zHs3tQRP5U9yOR#0iGR7E*R`My?cvRE}o9Zb2IEI!pgM^13dQOxI1#xz5bS+I* zBnWsIa-*A^d*YIF%$D5H`w2I1GVJA4Z^NTg{DG{}&rRp)K}#U{RCQ_2sp_2R;~RU# z+kf8(@zSoa(+~eS(BSLy9;yGiemaf2=!dCa)z|M7^}mZmB>(*M_itQ(1u0wAF!JHA z*I3Wn!3`$@2g$5uhE3zmG0oQ1sNq3vc(Vzqu**+1zynvBXyOW&YRW3;#LSboPmeljEAl<~+J@ z^kq}e`9%ZOJ11WIEJi#uh(ecA^@ZvFeG$mSV_Z+2EK+JEjDTe7%^Dau$m9TrwC z-sXDG>yD*iEnMPM)U7u2t&XkB{uMCMr=QG9nIf*YExWcPyC>!5m@cn% zGW)U9|A^IJe_>t3(Hs3=H=O+EqMPKw^z#wl-~O|&Xv3YTqa(o|alhtF9lv#F^PSeM zrp9L8`CkwNOs_HLtfnlO(1jfsPD$x>b%d#r2R+vX=i!Fzj~KkukPM1UH6^H`?X#8 zE@jktIdAy-8UnJXaR8Nl$49upNaZu@st#2fZvWIB`%XY8Z;QTJJ{EcWKpsE& zYGK)~f27T!D<5kp8`n%!UwFCwNL>J{gKXtbQ&+pc5g-4yr*CW857?0nV+sF?;6``Z z^DbWJzMX@=QQ5Gkzy8*O_uBei-g{fDEuya*n`1YP9e8u(p&P9Wf6R!uuyyk}&BSZ1 z%Px=Y+LU*rUw!LwOT>G(i1}@E0!3ii`D>R$vxrxkj)cBkFclIpl6&Fx>&v+aVGKlF zTs1!T)u(>XIxyVy(V9sM-W)4z0i)5~&l!i1iNwMz-tc1eYN+j7{h4W7 zDAf1GP~qPFUe9l|W>rSj^WV6uNC-7Q5XZf0A>#7lEwg=kn4p#zFpB!=#AfMTulm#Q zlm|yM0>Q~;%(5Ctt_2sL8e5%q+LV|0-+^i~^cb`u6(7I4shGa9>3>+Yr6q0I(D zZ<$JBL+)rGt2XV9%zEU1S+%y&+3eACA`UoDM)s1wA#O+M6ny$0?6|iZN&7nVzw<4%qH9@zm<^2VDx94 z#c@vqT4&B@j5R2VIFE@utG^HIh^hcW98nUrHB4eCCh8@0ckSA-hz5RqPl2K}6a7)`-emtGlGMyXP2aVFXqHZFEkDH}b^e2iT* ztg(q^K&Jf~)`3qL_%t3asE)YK7fwj=1=uM=KfeL?SW9ya2Sq{>d_R1}e+sY~x|%CE z5#mwT<(AmoSnb&ZQCw-dzui!0()=J;>#&rqU<@fN?cVkj94ZT$sC#(l#4D8!b2khb za3Ko7I^qe}J!p-LsWj7MD2%fc!Nz7a5(^dRifz@ zxP?*XhlGu7oct?+d(zH_7;(|B@8@iS*<4^>ZVT&|_#+#T7RH%?e`Ob~rA#H08@%4H z?gq)yPI99W+cyC1Z6rLwtEsURJXR=Xagm4euS_J15NziB0yptp-FjjveF;qf5lz(z z+ZN#J7TWnJ&>!Du{y!!sl`Y6zf;0<1Oy+8!@=eJDF9-i`C_NXIv1)}ax12ZXW%=TQ z0%sGQ4+EPn@w~A~J8K>z8F4~Os>*cMa=8Hm9_F9VUlJ&~21nz-DFQL<)CC=(-)Slt z!e|3Tc=1KL9H@rHI_ThS{EUc^CTGn~bvi>;C8FIoKfw=aN4-6SF?)zKMOuvst3a7B z#awPq!8;y|F9>a+9p`alHrRyR7aTIkGr%K|^)leHmCD>KDDRN&IgBV*(VkLKipb!h zd*0H{ms0XDrJCv>l)2>;p-|sLs8#k$wA4(<5XNF7Gl)9Dr!M5ki&6K%9#cvarC=P8 zt%Nbs45TUKQs^v83#25HL_#fZq=Q;Stz63+Afut>NiPH0jU9#2a_|*%pIS*SNq7O@ z5ynSQa9~2hL@F|pAZkHaGLTy^32j;I$R?2Tc7n5s-DI*7MMFH89=yPL*j&j$kv5E9FWDf!mBBsj_MX;l~4_s!m8Z&;KU9NcY4rDz_{*hjCOakCHk-H zk)e*n$SyiOii27*x;tA#kx-rruZ}u9En}q$mS<(^Q&JYQKoOuCxC6P8ieByr`?Zd0+g^WhpGC~D>d~fN@{U~ z1+OFd^vDw%(JFccZn5DQ1{H}&7`_2pfgL8|3*C{t&Chjp*W+sduTqzL_&8q1fnW}( z>X5K(ar4rPAPzv~TRP#a$H_Eah|dV?U{yMxBo~#dV3Bqm4La~RObb(+f(qxj6vM*`VbaA9tR>sCE~_w1apZhvK_r|e(9gvWsy+C%_QY=B+mAOjDsj@7opS< zN8u^ZY*kA`tV%6)Ao>EDbP|*@uEu$vWMuG08U{oXfKE%`G7=z2Lb)b-$$E1sIRvOe z{gMX}*$Qc9PG^Kt1X&P{s8&diHP)i{rt0?et zfTX!3m<8#k6nfaaz`$8ukjgSMd=X{)LQc|}UR;Ucm0?^~t+oDiq?+`Qwu1|nh4N`|}lLn~N&7SZztD4rHxWCnefTi5h1VdP$j#e*ft-#T8qL#w< zG?l)Ib&@(tV5HBH;p6~)j6>W_rL&!L!i?qT#9~u1dy3vG2XhUU3Bu(N1{o@0;~K*A zSh?3&%@KnVIehBp(x~opmK;%gWRa^Q@>9y)$?-f4r+)Z9ADY*;ej+iit$oTG{D^+! z`H94n5y_*EW>AZ zF|~GU#J7;fdE(`Yha)onFpodF2i~4@D|cV|3wfcRzjEQ*8^>+whbnri&jk34aIboz zU&=c3bL#Dakjjvg_J{@7Lqnf=y(jB~&RgzR^HQeR19!|@x$DPIJRIEf)YMO#i_Uji zpU)oquBFI-o6+s;C&u%ZwT)j3SHBnBc3^`1`!h@5lNu^VZy90|KK*0Po!1NvXKrlV z+)#c4z#Qg@jEw5{r}P~oWjEZ(5l@b#_I@l@Aq^E%Ls1Q-(}A>$J%fzrgU_?`e7EhB z5y`*r`Pas&&9=Ohq1vOLe5{#VoAcJ!StXO_OsBv8?pDI9&jyYbP5izz9SJWjvX5SP z_4G@bIawEPZ)PuAJJ<8$SeKxgRD_q`pBYdE6F38OhW|^~cC%o>66Pi!+Q4V;?tRA%vGSL1t9Uw`-(YyXk&VQwydFRT1DvHqO~ z*N`;e+TGey4fSJhm2LNL6SjyGb*)(^|ETynBXFi<{(MP3vK!A>gT&`xT0D-5iIsL3}+eCR~jHd2H!4&D3t#BkI8 zZ?j<}1EkW>89ogyK5HvNCfv5HnPj-Sm8Sv3H_0t|(7@!L35>3O7V7_?PH^Rw81ZN} zj7m5fatnydX0oY6K68)lf_KP*$Y|`i8fMBhtMkqbLebzA2vu5VP>MUo-IhHC#I}$L zxIrLHfe%IYJOZh-|K-y_)}dnWFuVtNACh->qZw|HZb+puool8c!1?9(PnW*>?7dAC zOrRYqFya(%;%A^rr71}Tk;>1&=A>j@BqYZ;(GClPG)FiEG-C)RYZbaip;kDISPYBm zmEbQL*K7sKAZoV=X*juzHqN-0zA9c)+DOFW7~pI4Qh1uNo`e?ZR45D}8BnvWW{o1( z)rY1Hl!E9FBtfoSk}wBzpz@RjFVov6cEu$QyZ&gP9WJ=lsX)^OqxsLz=@Fn$Vs&R`=dk-sd28ry8F zri^tUTofKbQY8y*VAsaGH|W2o1;l9&aSkJ)N022z9T3Uo2)EQ_uB}fE70oH87li6y z_P8We(8yzSKYtoE17TZ1@2=mW@+O(Q$ddNDd6BE6y=$cuyWREcmivwYR6+)MpD3#= zly!-0qnbWTz`3iD=At-Wh5NNlL?)$er@Vv%f<@GxhC^RN1>llfjCjWVFk>Q)mGLS4 zqLK_Xv0s(*s)$94PPfJz$_h|dwvo?5R*4CxIz+)JuBHve8{D=NIpW$ENH9jSdz5>) zM35CG4oC?L(wrSw$g;jS#>-$>_kD4Q<^k9^p*o}> zFL4a5tfcBQ0hW|435>v(DmTxXt0T&5*iz*#v6YZIDp?6D zN#fY8bZs!+FHuAx4Er-w0toY0)r*&eY*F{XA*-YGfLARCP!r4<8vZU2~80^6~*j|8tx_?!zQ|^>I zKqG6-b^N7kg6&RW`VAm*F&kC zney2Wv!qH)YsN*byOxXPm8ectfobl!IH~oZJY;grwZN^iyXbmE=4xSdEreFS zsemW=SSQJXW-^>ht4*WllyIRONKPqz^A>H(;L!)- z&|T~(9t@A$)$G@vLGj`+Ny!;8?OcaEj^b8GNy_Iq8`C0Vv_w68Z~^TSNlOjx zQaG>{r-aYtWZG?94PnW($Xb%PdIV}f%WF|R&LAo)AEJ_V5&6wKICeU5FRQELM3^d> z%er%Tmm;ygSu|6_bO+*Nb-6IzdKlS4b*JHcaC8$ZIu8))POO#KNx9D9SU=yJ(br_> zV(5}Wq|QZ41!5%~jfA4s8ZkwsW$QT+*j+mrZK23+UwSW^&k%Lm^%%K?E?{I`I2ELn zNEf6iev#zS37A_E2JJqWR$>V9#6T#-(Uwj@+QSF&(jH0wj<9K`h^skb3!rUb+WS(t z0x1sDm|V}9SUDyG)s!!+RAE30ff$3b`3&S;tU}JaXc-cPz+5*NkzIN(uGeubOqzhw zfTXf;f@D1s>`s) zsWepTplPVPOv2^q!d!{7OVNA|%5i|l9nmM6g9}7NY`r%X6{3ORLL}ocs|?pnmMc&g&b)TqL4XI6*AMH1H;f|q&G<*6i~+? zV;ZTT&?W@>=mZ6hJE)qeNTC5g*oQ7;(D8bJPlkb2pjEo3^pMxIG!CDls zVGc+zA`kv?D2*~a^nNWbI2A-Rp~M)DVe_d*6pn2uyzA-x=dI3jXboOh@=3w-Xy;D| z)!952rKVR$huJvwe6OC%@a+SxPsl!8QdN-0X(N^TtYFv=Qkn=M!aWZ0oCR$Uwxar* zB;A8GNAYc$+3NWughY{xn!H^(XRZ+~Aw!~gZ*)h~+wo`xrWSW$8z(;f`&TVi(M+;r zpSQ!-5&66xs}=MMt(n+7>;Up#%wG^(K7p~ICbx;coEKN}hisw^F zUc&DDxPBD~BQ{Bo8hO*+Q30$`Go}Qh8X0TK-T}k&d@Nsqt)U00f+$NjTi>0c#x)!G7BoVa*)4=NvmmmAe#QSXZ8~!b;E8+R zB`cOKdp&*q_}__@zj>y(;AQ;O6NVn*n)J`M^Z(R$6b^!$D}Q`1EO|2Lx9a)l{FhVv z*c&&tWc@J^n4ZUezq;BmC7phldV)H+DeLOZr+zFlw-=9#A1$l9k@-yc;=HG?U3oq0 z!i|IlbABCpx_IJF-NlC=%`;Eb_rCT0!xX7^pD(OT>$}6K-AX`Shck#_;rS8!n7bT`Br)@{D;THQHv-n#5Z!H&F`%>QBEb+g35=GFRW|Pwmfp<)^7%s-gqBBg?>4 zW$DqH8!-#AzPY`fy4X8rf2Zie52=BM(1yj=TJO9Zc(b;lbIQ=RtolYQHnRD~FYnLa zTg07IU z*P(sy_7RiF%Gh%g^N-xA*;aMC`Cu&bsV=a4)x~F~GZz#Me}4u_0>S326TN4qZ>KbD z9R1hNMRhaJm}&U@yWT*oG-AE=#?q|l04hFRGq334;_KvlMYpddXZ)C)wR@=d+7qAM zv5)=(ZMbuDmFwf?hUn|Re_T}iQpH5X@uI;ojEqfN9NM<|<|C^|>I1qtdEO(>Y~ikZ zHusdgoH+H_?jHL@NZEZug>L<~cuM!aY zR7L*V`UEXgcdbv5q$xiBC&VKLh)4WTOn5hcp)LCkq-R3z5;Z^F75JIPT4y4->t;5S zYM3y$Yi0v^9r5mF8j?FD*CDwRa+lYc*@S!(e&Z+lz5P9lA-U7MvXYz$Zn&IxXq0|7 z;t%+E|Dz{7kN>~q&YCyg|0B6*N=0gCM1u}SQrwNlmg(;jI3!f<&#*Ky2XqejX2Kb0 zQ(C8S5XfngBkgodA!_fUW;mY;tP5)loe>kp+q5WjcMLI#j7KsSi0_BESQmzNQtd6- zqJS?)o5vd^D>=5D1(huM(@#jD@Bt!Le^d*{91v@_hOgF3bb(?~Q-SJdpJI$LyQt%@!ax{sxA-Z~&C&?6l zWF>>TSlDZ_-#j~W7QIY_)+l~c4V~`PejwTyj8w1Tz#cy^OIw6rN(#6-G(rRc8-_hu z2xKvJrM9Quhv_{fCDz>V;io`Ei4O~V;9>C+SA!4{qMo;}>@G9EcK}_R!c$H5{R0GP zVjJ=2whit4k5aM*VSp#`p@by}T6OVUH-;-=7?tD$ zP=OgKUt{Iea-Dnw2EuVAALQdob%?S;Kv_#lGb{V+l{erzo-SbuL^S1Bb0>@)3-!+x zGsbZuh*Om@l?iF1eiM%8awgZw9E*)n7tkrACa@ei8C**Oez{FdEELjc4%Fcdys!zW z*AFnY+34w|EjS$A_DZCGsDgHT>(k`+jO&K>{UwwF(sr_^oMu{)Ca2x!Fa=!f3ZeJH z)G$)sNQEZA^h2e?3o^V>co%SN0S9TlJXEy;4-J*Zqy()(=a!eDNx33WZx+(1#cMfj zzc}{coGz-2799y{cd1QUG{nfsv>L?a!^JL0Soky+$X!`ERNUe|Lh(lIFm-{Khk*Zd zT19dW<$RPQoioi?!ssxDl+R*gay6&O-mb#u2#MMvwOCQO82k%+E3)KK90W-;4u0ea zk!(R%i2Np-kfEdx+7Xuk-H3ef{k2b+80~+W%*s>HU?`w?p_)%aR4FY;0V&l;jc5gx zh77Z2u@r?R+A$)7TcG@o9=SLx395`{^27ZgQaXkONh+8uLCU~a7|#Jno>bC$iGQAd zK$7iDm;q~z0_IASlR=22s0~tScTtR6A%GoqjAPdHBBx2i*5fWY4^ozNud4<60d5Pf z%&b3*H?e8Lefj8VVGbg$lV+D2mlG#70{JO#q(bVY+#U#)DV>tUDiQY{JnW1~+XsU~ z1ij>;#7vwGr!uKcV!R|}46;pg84bmcyUjc~H3TJN6E3lwJB3DSOhY^iQs*|KvPQ{0!TksPd`xQLK z<(A0FinJJ{iX^dcGDae$Pz9|1l+b#or>>FTA)R0f2^cw72FK)}n^boY49@#FvwRNX zs=*xvY4$R`t~pGnC{-C$7C*g%Vw}pjTqaGLc;g4HkxmamR*1pPd<-^^hY8Ct{ei83 z1+dULq?709wjwll3YmxKTD*kpL8OKVa&4iN2;|O^B;5adI-$XZdQw7P?gZ@ysg}!7 z&dFt+t;VVxELhp~i7!MlWA`6MMHEshEa~!S8eur7`AJbP%IOs3ejJ8bEI_{Eq#+Aqu`^i$a?UItXufNQ=-|5Ur~4Mx#GiGU#qHiED~Nbvh+1 zVsOoIT@if_|&r264A@Jbp#^u9tzUCJe9;L zQnv9zr2mbTe_KEsaT!Lh01kNpaPJLk35*bz#$6ce<;}* zg@c5t*%*n)S=n~Yf1Hvhq4F+(Xqym%)1o9id1rPL;9rD{Ash;)4@HG8*boc#`w$w% zG5I(EWwevqr(TX|qhEX4gX!As@^Ir@ShK(yHw_9C zgdJNbs`dwC_5Q=^03~46B$7k;R*fN~{=6+fG+Sx}4T&`AuhR1YG-WXqTON;Bx7ei8 z%xyIVElo@IkPAORohCzci*CLUt-rS#Rg@E_Nc|U&r`SEAhn&khmV4EBt$3ITJEC7g z3dj7={D)PsnFUR{CQTKynHa+2Phy%u#$U5P9^*lbwK~2QY@Uhh>qG>zB2{n;Z;OO> zD5Mz0RL*uT60YnRt>p~owl<49Qs}UQ1?k9|`{(oNY-4sMS;>HdMxYxA)eSoRG5J)= zfY@!H=d7T+cTO_2vmGR|7yoYl`NOe?*ze);sQN=w@I~|2n_u31=fX2ZY2!IZvYx)a zf8)px<0AAay>?})(4BfR>;JO%_Hj|vd;jq4x^=d5x~_{EhGke+*cpa(K;%iH)l8Y$ zVHuW11UZIg$s!t=hEJ8J2i+M47@kCMEA&_bkx^MBnR(9XB)g(wS(|3&>9Ph!H`@}?IQLJmElwO(f-vxuI>-#=#y7|@P-o~MV10hM|ANkS{_PU_~<~@NKvq7eP)jD`>%@*{cv&^&y6h_dEo5y+!u3OAHDv}nyxiBhJ<|| zZ%p!;c4Xc^G|m@E{hPMc#QtT|)$=}UT21cwnyXzWC%z|Q^M?%|EFZf-v{E;wLR>gXG;ry}n-?UbZh0R!bd|Xd< zo$%S$Z}0H+boUi*?Y&X`Xi4u4SJ+BllKzw7P69jgXEUo|{?&1ZwwWk(~1Lb!d2 z1Di5#t{Yii)N`Zxa1q<4^R+$x<#5rLqmRdUPYy@ZnH|1@=+x@gCvMIjsM$7oLO2=$ zy!O3i+dmxoaebeC?4kEFqi$gG!(;g;ywN`Hh3z+=$Qg}Hfnr~;_g0NOqWdVj=82n2 z>)&N+$S+6xpF1%5)xnRihrgLw*ngNV62_BW>0lvMX2I#qgJc1k514s7)cPlec07F<=#_5Qwq#j8MW% z7Aghh@jueVcT`w~%qgZla;M=MlXHzzfEA67EpKitSEf;+ zrdqZNl<60>7^T}tuDHauk)7?OLP-M)(s{F~l!Ns>JjvA2c87dF5x8}}$n#qx8pRC8 zMP+oBlJ4j#hB?kCbtz;$E@VnaSQv;dWREazcY`b$_)ee<6BWrUM;&C(GILK6_5vU` zYg=}Nx*%O)-JRi`xsu$Kk>Ox+%k0TbU}5g0w~83Sza^`>8)%uWtO#lntMO!QI*rd@ zX4A4qlOo>=~cEpA7pa*WoNYIZPjosgJ_^l*=Q6v49B$APZ^aJ93foBe(|e5HjTv67nK3(Z+WWP78fo4377mx-$j`QInE# z^oXf6z9TZQ1CMIV|Hyor92Eu1T9r?l#>kFq(SdHTXr6Pett-GpBI;nllFm#CL?d%e ziM(}dP9v6H#-BP!XgX`SlUz+x)5DcS1({zmok&%(dupTvKJe^wjdf9nsE`#^xm@|h z(YrU<6}8OmG&h`ptUhTslb+L1{8oWxu|O%$<2sMf-mFvGDY=$Tb4SN9T%MHDf=8=Q zXfUy11$7yF4Odud=k9a}4Kf87QKinL#Xv=)tnj_=z9uB5Xm|S=2%AsG!zh__l=2DX zkGhz&L?C!Oc49s^8w{fu1GnZlLFwpCIUvtj$z_*ue(Et(Re@+B@xqcFW=nHvl^8`f z;gup)c}%d^2^}-A^8Ji1dIn_V+0M#yav{3 zqCqa~yi}t?N)OP*s+1Nk1Zd*oDP($%QlTksu~;OA>_Oc!!BpkrRJ1~s5VTg;C$b_vA^9(c8lci=`6-x%4;X^}WLQk`X_a)>(C z0tt4;+aT{xl}x^dgW|Ra4m_>bxYxFw#0^$8zmQy&_?yr1(slP77T)?Gjw=w_$Ka-nZzd;SIgiF ztP*0albYwQhw=A4ow_!O!_=@+$5u&OR)|`ls9d_I&U9k!r+1dGM#W^6o$Dd88Hp*C z$U1+n!Xo?G#IK{M^5z1Rco!GnNyt$ZHCrciD zN3;n8Tu~v~g6NeCJblMxqc8-BQTPacZ8c6y~L{(eU^X{A-(ce76L8G zoLc!UfFcpne}S(|U`lJzQYODMjzt5SBz+>q2(tjGneIS%d#SjeA^g!!YHaQmw1Fd$ zR~fK@%N4ble5Xw-TW%-dy?}Yps34n*1KM=$iLE3}#G@eN#!e^GWnnP}Lbd_$>S-Z1 zhzu@@pv9`XpZD)7;$YC>g{hl~0ySyIvUdEs0Y zrDAjO5|wB|FX+|L%{2WM>((24n|G4|AnTPu0q80V=<3|kDwiUCzS zRZa&voeoqPHS8x6PKhcOL5%8TbrjriOaPVuaUv}*Ax;Rdf%gTgqoCZiSm~8k zC#i0(R)`^EQVf@gZWGxXMHVu_beMdG4jIT-BJ<0Xhu2~=v7*4kG{(znqO^&w0p54E zP3XoFm*A;^#b*gzt?y;)qL$V&Pai*mEn=+ASTIR}>AX&i70(bsO6^*9k0hlWV!Ekm zh!rrX(SZ>7YXrfie9T?VlEq>#b^)ZZh*AkYtkJx_&@|nYc4Xsg^gJNR#G0cl1G+Pb znM1o)JmzB{lcx6ju9@}boH*k?!jqBGM^U4~c)+p_Y+ z0G%?q_U26t4SP{a=qO5yXT}_?B~s`tIp3phk9~jAL^g6rt9gE zf-hHgT-P1izWN4zuItQ=HSZNI941O1nQ0v}6?kp^kH4Sk?f-gi?2}(bzf<3zbt?9$ zq4`(6`Mq5O-SdmMe$)O;V(3rw_7j6o{Jkdssk=uV(HSXT+s&nKb{)U*!@Yf*h7BKL zU3>efZ@hzJcxhMJ@VACX5@N63aQ(i^)?YM#a$utVwWDR5*r9FfSLWUft?{1x^OeuP z8^%3lOR}Zm* zt^DSQ)W1KmsBqliojg5slIS`$Ie#rL4i=LWSZ*I!^Vd;j16Kv}$5BqWt z`go|v0pdhYRQED-z%&ALMt|+=TS1*Csz#G!!_zSxKc&7IbYt=ppLgs?NCBG%{`3@> zM?afU7Q;X27foS>5+FeI%kENsp_^bOAl3VZy*NMm-j4ve9+ff`Bhov5Ap6ks^9HIm zS5ukh&zXVG=79_YsgU4aX*S@BGl1p9`V~ngUx>9 zXv!`+4t7x(m{N@Yqh;YqV2)V$xt|Pt$xk2Medq)jR1hij7xWucgTSnJU=T`w-`@@C zcwvwF4Kbh+hmZHLiFqBf01E#eb~toG$9k9k7MmjEPNq9>Ke0rPkgNd$TA-CcX_eD& zH1RCZN`N419tYgsU^4~K7%lk&K|JCQ5mnPa7XWvT6PEvW?_Dv<2XmAS92gW7L1k8< z9oTDhuje4+!gqJ@F+!}bC{fKIW)_C9 zjhN-PmPRR+dZ9MuFeBuMrwg!_ndKj1ZxOlV31Jmq<)d6dJ*==_oZ)G2d;<{C<%x{) zSY!@WUru&1u{r&qJd`CEP)==a#6nnEl~mxWJB`z2BI<&NaLSE$Qzyhv#H!Gf&u82{rCVYL6^K))aq#d;K zf&#Vs=z|Vm$_qm0yT}C{`z)u3l=-<>bxKJG9!mt9nKPjKI%7{*A$rDAOIny!TqP#~ zeTZz3_;0a4Nj>aeN%1u_ygtzSpU>N-lc_wZlMe--!;UaM{Jq(1Oqx3rJ3pDxNcM9*8yj7RD#nBfH)f4&Z3J+L@5SCT-FkAYuKnwxHgYt1I@ZHN*mn6^8PVt zoB%m>QJNirmq1xw8!fO}W-%n5&>9$R9Jn_X;WB6$VGODmRxZ^o~UCb!CkKUBU5vu>q&SD1f{ zpf$9d+>C{LYVE2D@hqbPiwYh%CXjqV*lGKO;56o9T;q%vQsjKAOrfSLGH?;jViD#T zJf?h)M=XTQ%|zDev13O12&R#)89v3Y5d{KP&Auci85Uv7Fo1Y$0<&e!j@#X9>N{Q% z6ZMuPy>p{-rMN&S4%V109ie%p1e3hB%;pA9}&d`M3q24SFY2h^$64|#Yh(D zc&cIgPIpOTNJv^?V5-D!!lJ};_&GvbR}8>?7ld(xOEDYDXkyR)##zu2;y4mQK_KOr zL}C%Qy`)*CE>@?~0UA?+)Evp)&PQg`;rWhuK2jU0I;Bo+cB+#wZjY2AX~>c~j3%Mi zd<5gGnGN&R7;arE(GkL${K09mE<%-KbWm$lv}G&Wgdwz^QkyhlNh5B6a7TqBhDp)O z8*k5ypz+;np@Qv z6)CC1&5ET3V@jH7rHr5M2yAj!i5(eO%pZ2?Rg0x$!gfRkk~&6c5Yn2K+c{a5N_tsI z(NiKpCFpD_2}yfQW~K%4j3<%M-BG!V%oa%-(IhvZ0%){Nr>X=X78fC;5{Q?(sN#O# zrbITC1S0oh2e*@9YB-OK$hd5jD8hxNMoRWAiaKG3WMnmqa3U1iKTaSw$o;j2^b+9$ z$(zwo3PnyeVwZ3c)6zy2sHa(Zb^Ax*q1hM(nU}K&qspmD!B7>TqHr>TRzXb1D5;ax zz@?L{)JvojlED#{N#@lEV^p)`91#?fY`$Yh5Kz$#k~l~P7F8r}4uHipB+^MDFswKm zNz$MWz|1rf4HUJVo%@K<}eaX^-&P)M96i-QfQurz{%|WJ8 zQZTt>fZ;>F!#vc^Q8MB&0`;JknDH(!gO)d8=}~L295UqX5|UA)L8Ia3*;U-D#kqpv zNPWHT6!{XV)KC;#DtmgVW^6z4oUU@otQj_VAG@|VYVOKdLY^8xx#T*M+I=K2w2jj4 zY}!^o6Pwj0GfNK9>Lm_FznaQpO50kxXWdMYV_CxHB4&{_seANaZ!|ZWICp{#0MZ%y z5Wa`(k=V0RB1T53W(F2NM?H)s((vHgdZ+?vQD`U;-C?V`>`s(kIu8b+GTNcjX((P_&)6^IzADb_(2J;sVssQ^c437{))nr^9+$!`$&9+bWc+B!JFAC$OKM`iK0mh6p3&GE`}Npx{|Ape zc0USO`%@px8u$Kw_~PcUE0f0_C}MBClbDgT{j-s6Uw)Mp^NRP4A^O0h!rHNkrI}ZU zw>&!Qn0JwnNC?%>`aLlJ5eo;?$C<5tUk^QC+xP4@CBC%_x*C1sk9f}y{o%+XFKvHq z0MFU?{N$6PeTODH<{bTWfOH&{2coYZ9q*5vA101Z%*p)IkP!dCnWH}p9@^x6^PAL> z!XqFS6xEaU&eqBMdW-%#a`Btk^H)pP;NI-Xp6%P74s%UTBy~j|VuwEaTkQ6s!n59o zd_x!a9q-?NsOT~rt?Ry#^A{F=J@D$lteK||tr_k-SM>F8!PA*?|G;5y1h8-95Un#u z)+H@G@VmPv{!mnNXk;bCPli}a^*u+Ak7f4uz2W=5Vs>*8Hv0LKUEhzVpKi?=3#y(( zfg!NQGrIDl@mF7Ya^Eu}e|@dUHCBgxY^z~zaHspM<0ougZ(iVTm|R8kecvBDdTz|J zZrcw}rGh~ec_8-Od#Pg|+*h-0SozELlCckt)%qTGB-OtxOuzFv|0Q0~;*Jx|3cdM`W z&wq6vjqZ;0_3nt}#+P4sF#r08cG$4^KO&?4a81C~CpghJhoq1~6=jt|W{mUJoI zQ(>ZX#-B0w^^4?vK<9TH==}Ut2zs-=w~zIdEXi6Do8?cIV_(UR1-oVdv{lWwWK~^$ z*&@LG92j^9yYKt=!8&;pc*buefL_ulRnnUEGpRu=`r?~Kfqsf{Kf8G5J^nnqH-MTP z65o!;_;cQ-65kF00pF4X3(t<~KWhcyqJ0~9C&2`*(*3@Kbbg23E9SCAQNxqjIuho!*EV$WD&5Sc4Sj&5GaCdxde>_p{wBf~3@>w%?!x}fzfv6M+L zH0udwqr`lBR)m)*k(QDxPsj5l<`Q>G2nYB%BE0&SL-y`Rl!O^hF`H&Y-b9!8Q@rUw z^lAt;F^J(g-U6fNK=D}FVmFhn*wy@gl;O3uCxHmTd?*ep2mV`K#b)sU#-}-|(pWd- z9yx8jTqCWcG~%U@v*Mf?^JVg^PNuUMc1KQ7fE8V4vr1}51yilbZr1 zCkZifS%I!jQ5G}qN!x#huf-G`azBWj;8AS97Z}lTCj^4n>^u>%gBjt%KqrGY7Hf)S z@dQ=85eLG-W-?-nqM{><)ie;{G44p(oy#nh!IenP7(W~2i)UwIks7QlktNEQ;>Tol zDV0qJdt@ENWp)_emYdn#-vj1~h+c+Q(y>`DV5tI?mQ$RO7%V+_2!>0LI;`J_F9_ z2t&868$U!`K=Z@d2IlUUEAmUIdl_2-TfoIy#~HpRO;hQX%1DcE^^G_wnFsMu76;2j z(sc`v_~Xp!WM^{8f(o)u!W%1KNTIm~MnQxSj~NIpxww=U<6w}-BBvpp2r|`R;4vfW z@(#^TTF7e*kT@#?BMeyu0~dq?KW#djtY-0Y6#(L8Hc(XsiDoE+DF~tmKCN(+k&j3k zg0X6;YiM&`zNw!H+4~#ZauCP9kADtuYuFzSMW3ls1=a~k>!fr`wb@P&FodCzsOm74 zAEFOpy5?{;yg>Rs{Oc=O@`DVw$XvxIIabKeEw3s_NyUo?g*mzc@=~*h&TMYXF3nQH zQq{52XY%UH!b{RL;nnV!lHP|@z)xTd1d##{#pYQy=w%h>tb&fX}3%y@Kq{=A)fjmAm>;l~lhK@{d1xpLL zr2_5X06j|AG8Qx!FF%`jTbh40$ZQpGR)tv&zBRo|(Ysng+44HRTnah@k_~ANC?10^ zT339I>WE59;N^Cq3QceTB5J3>xnhGv4`3U#AQ51gAB{-BGUn*N{9 z8yc+r(5~MgP7i?|vfBU(%Nc-wtcidVgi1GR!6bVwFRCf=V)DBY~)=3GYM4UG`w1% zZ~1>Mc1iXLLK*CF-97z5S_2L-XAl~J{bCxE2A;a9MbJFK7JA44j64`elWGW^cl5|G$4dUGvTd3mbYh%-cp{zt@8D|F~J< z)S~{T&+ux0cX|z*>R_FlXkh#B_sUaC;WBhXVl^`9fh+L8HZJ!sJyJJ6 z=KqKKOtroW@{?c?Ac5Z=(qC_3J^=52t1_&=F8{}}pElgUDo_yu=xyh%fHs5E+JX5m z%0D*ht$Ap~pBmLK5Rk{gUFgIW*zL;cu>HR?jm`J>&i}>)*Z1Gp3N~r?9s^~9e`lIJ z{cmpgYbF0hbN1m&A~q$Gg@81{gGJGcRLs*Ha3JB384!C?)1g?*@QM=Xh@*Icf44U!3V1%^djs4T%ks&!BhmwshZa~2VtNzf-DE$`uw{s zkf!8!ABKx6aP+|pctodat3skAN%C(9&h05Dy8oE;Z4Kz9DKo;}RWOH9 z4e<=-lqd=|fy67=b>FME8PR%(Mqv!17pM81<1+lg8fasGNydL*sDd7%gs>l&(HLb~ zbT2RFfto~wm>8V0Qw_}mha^Cf4Ne$-{agBLO+YDdb4ybv!y(s7cH#VdmP8$-p>&iN zi`D65nxLpn2W53h2j5Vf2mEtDh5*c$^9W;$h~14hrI33_E;#$ud4|$%VEuN1a#644 zkUNX5ri|Aqc@}<+ZT!`rkPc1+-U}${woRd{>dq+ z5Wz`y{CP9T4PclomP<|Xa95M2^&L~ZTSy7chIjQibK)7}Z z4BYwCjIZ3q0ZTg-i{AzazABZNtcBzUGaOV#AaDpr^53CwFX`2AH5h-0gu&p)Ns*MO zM$B*oV@Y?@oO~z8sEiyVK{{PArj;?+5Q;;j8_F6<|E+_7`Ld_q&z>DYwmeep#{EDPTbi9fL%{6%9G@?kLMv2p6X(~cakAO~xM?hiP z&)04ip|vmyvOi~98mOu}FrxJM>A><71F;_@bd>U{z#;4%N zZr^2!2j0(0k>u&S(-9VO9u`-ba4ieT6L2B&K?zTU+ZE$s#)NB0M z5}A(#NJvhkEt~OrynGJ6%44uJa-no+H0tKfFDSYK+4wB6Q}|A#b`zF6bniL3%Qb(t zDst!6suqt;N)!}1vfuFhu53t}Cy+qCBhBCYR$_R5v6>|g(9}87s&!K6l@3)Bk9%k= zU<=X61r*d$a8C-ai9DmWu$q}cScBBguvDI8)0THgh}aeRpJ@p!3+O?+huLXR(lNWV zM5tQDTiGKtpDV}tI-+<5c&%hUNm1FSm9hC$T9yDHQ@3EL&u!1uL$}r}Rf&qIs`S_n zGOyA`&Dmn<09FAlX6<3)dlR`Bj5X$v$;81#RYszbYhmNlNj?rx3*=IXwTVneb1+#c zr3ww`1_r&tdICjA_KC*!qJgq_gsp9?G(}b2nCc6o8%`_*5 zdoaWV^k6AX;dzX#U^^rE8Xh`@yo5^P8W#_7spjIe1XK>7{^sV~yi>(u#WFeva3LFT zHJ#MSDkK58e$vX2!0pe8mG~u(+1l<%g~mfa<<1g0xIRI*AH)bfxglPO83-^NI88Nfba2To0ZoX* z(Y@2ckBGn7+a@*=9Az!wH=vpzpoZDXsPOVEf{wuhC>Lr{Sv2hoi8TnI=Eg`XAJPzo z8%RxvDoSSDGG@#t*MO!ugQPQTu=22j5TrC_;=#p;CEDCh5}5hJHTOtwZ|q>&13vYG`pRltrQ4FYu8*UtC& z$1ur)h7$dKdjn2FdY1;?WQtR(Br4^ShOGdmRs`V@P6C81yf75#wbV$=^`-wNQ>t|D&5|uE+!0r(Ze8!1 zQM4+w6RE9q2S+k5SoCsfFQ=-HQWB2f*y{m^YDCw6kS)13nE@vSXCRik)x*Lc9L?4 zaoi~mtu3e_n@J&oua=@5vhj8#`hqKAyPOlSRRC@u@*R1XnLVWz{=gAjj!?!?I!>g+ z9VuK(7KZP{4R1@>%ZbEV$8&s#jPqgKAtw3`ce&=&@_W-%2DC>WI6j5xqr zhE#2Dp-DU)q9C#*PoX(l&mwQjC4)Lih;vP~V&z18@8|?p=HH<)orjH<|_~ zf4qM3m4$Q1jsk1Rrh<$7#DT*_-Y0z*3nt&>Uw4;P&#ud~P3+Zg&Ki8<$-bn4u(Ys< z;YGP?MncyX-8K4t=E5p>LQ%_T+sUK!h;3~jJ+R=x)|0+Mp++8PKHvJy=)9VRZ;Y5` zPSRs~Pv3!|wToJxop_+U=CUt+&+NAKO+`<+{3-c!*867$h_VLaA%|&Yl4)+|LxOw8mqLzt0Wkta~9iuo8 zP}t!&Grc!>L($r8hNf3D<)M}<-n7Xdv+35s{wGr>4-RB3YkhfWS=uXaAH6#A<~@^d zOg>f>yLQl&wEeD;2NxY38JZQ=dUfJK!FvJ((DEPcYq@^U$)kf~U(DM+|N8PTT3;T! znOXDk$Q$oXzA-YnBQ}4qG+}$>yMLW{WMSA>H`nw%wQAq_;qKWBhX;D|%|o+qLlho5QVtv3NUt_5+z8-)J80 zOCNgh`@X&b{)^VgcZjizJBljjhR=R;^0M##d9AfWX_liUzFghW!J!Y5CXXDo0z@^I z{M0nEX4T|3L;0btJ;M(cdQUuF`2E_EkLUG$H@V>C(TIuX?mxQ@PyRZqfb( z|8R>Y)vvhzk6XQBG0dOhNL?BYvUbhC?CV;0=r7RM$fxJIJTHk0LcgCY2aVs8QnutM zy2U&+-Qh(C!W`a^!RpN)nlsJttR0`X(luBzZ{>;ZwHqCvY3HblwSX?(g5!WpH3Ob? z%q+*E?;CFDx<8ydRiFe)t^{1F|Kn=|z*!wtQy+k7-CPy+`PjUa8o;!&{tq}BfMLDy z0EVqjSZRJ1iuAMo4+rsMXmII|e$j_bpx7RJ@;$w8UIz%;S;qAFfA8)ihwoSDWVJtw zI~h}NU@u^JJr|(vdvwS(5$LMa%FvvgjZ>b-Dl(#DV=x&d5TY5)>cW!2{Uj( zu3)$30%WFYQ%e7-d}9+`CK_c4sQ#kW_Bp^IC{2g7&$UMg+)SEvpudM1G}CPe5kt*l zSG>kDmvVp&9oKbmI8yZkssWzRc05h0tzXsS83^ta_2X<`5G!hefk&4IUJC8d;-fEHp5 zhq9MWsP&LrwKwv%aG>pLTSNt%lPJ;JSzyz0yFoEGH;xO;7K~dlO+FaBV299^Y`Mo; z=e%>qyMcG+HG_z3Kbu4Zdvq64lzeUhyP}yam%h;RWE*`jRztl2+0GZljpUn#z_#qI z1#&^)@*%IesQ?idUE#=L3C3v% z4YuHE6_QNhno>%`jm>##{ol9dTrp{5vP2W4 z){(Ys26J20=41~I?15mbSVW6hKygwYgC(;XX9sPQ&De$lbsDdoDH2Ny^FxLrbFyP_ z(%y#Bfo8k?Ip!^45C7_1b0yb|B`zYyYB9U7PKeVvA0v8?Q3rX8_N~2-6L*IA48XKY z$UAVt%UmIs3e@g7n zByzV4=@He(=Tv)`Y!(-1-c?9|MHDHWk#3uXm4I`ka29z<WFaaPXRu!E^mQOly*C!SUbQr!8#xD0P&7G;;fn6 zLXoS533gKpes*j(7=Mrn*-EDI+uBQN%`8(&S>Wa}f!?8Kr?m~&j>W8Sk#RqN{|FYqlmo;NLK?fElw{ZC@EJ$BH}sLj9WWMAmc>iP;qxN zhmsT#aa){J$aV(sj4D}Etcgub2q#xf3#bFfij2_U)6pR12dP{vhHwh98VqONsYV0q z1q=;1$UKY1Vz`Ek<09doQ=J8Bn@ALyNQJ9+*uWPP`{wVG0klyf(Hz>8-GEuPL};12 za8-ypS&|EwPZ-(^81#SyIys(ZaJU&X0l7>xrb*&lSUaBYEa2F7f+3wrJk3&=(X$Wi z3IA>4{|r!YFbYUW7Nz~OFu^5(iQP7T~4 zv{9xYXI_IC1#KjhP-tfYkSVvnaXAR%wXr<5E1aQ&5<%CehqPt^hc# z9MGpxPF|7*E@a_eek5mG-?4t1&?@#Xd#dl`$b&2T*#5`Hy$=rtB^AN9?cVOe+^wx8 zLn~K$PmE=(_wr-D2m3O|gAZk18D8;O?B22IyZ5~_vf#a=dwmbCsCi{*@8OkfzYY(3 z{>$|PIZyZP9b3L)AJ^M4Z2!pn&CtZ}SEhb?Wnlh{)@R=d>3(Nq?)<)zchY?uS5{N^ zADp#2Y;q`fPUgEe-#-&uzPWHrU_SJ``2H&&x6T}-U+eq(GZitDVx@A0BJ^C#|I zQM7tw#eA>mvk~5dLw{J|JwEc)dqq!;fB9l2JD6iAS~B!NsJC$h>i+rAcDwhyFLPby zy76rni!%G4eaL(M-KD+{=I;B`&>sxm+Tjn!C-;pndq4BxLD!+8d&V!sJn(qevlBlq zfA?e<=UcYkJ2tfK%c7M2`yTq}nZA;KJ+Y7++G>~-M^+YYw+=0f%1B7xU6ei^a!>l* zU6qsXKG%A3Q{kAo5TLO)4zynBo;h4~qwm#=uMIwEYwa0H+7!Eb(cm_|=;TP~0&lZ# z`gCaAZ4Y|CnS9~h%pXR!?=5;{Ffpm<>yd>spf$HH?>jlUGQ)eqw|;e|cXGw~qNn<= zel(delJa5etNmYGn7r9v_+8idp7slgCG9Om9W|mn>`D)&GZW-o)Yio*a=E9L}6|^Z6%lZd~}yDvmFo zG5Pvf;WqCZlcV#C9=V>Blo>hs@dqYWJ~5P(GI^yx z?Eac}`mwCmq5gR*_l*qmo4h9nOuE>IZ@SvN$42hHyQc4Ezpt-sI6B&UqUX`c(eJ#T zp`?>R>h${Fn$F~DI2T+2_n*r-918WXg2y9d)v)S<-*cQEDTR=rdH!HE(qX~YHXWi5X z5Q*x#e=2pW=<#_#BwCUX_Ty-y4z$1ha{%wcjb ziZdd-DE(%MBqsMV*|O>O`SBO&Y?GuSX@oA{gsYhdGd;IJa!@A0I-kvsr8IPVesUA- z)~oGxlsjBanqQvmeB+grNNAv$YUwR>PW1S ztDyKh5m_Jwn@YCzpy%9oC*@#Nh>AoX;g}s9z&`d*%QVaR^%Rm*&bjKO-0~JS3@FO7 z6B$Gb*RRGigaDLv?XoM6y?O{c7gC?CJi-N;v)EGgPCl3l+yW}EK_%)~oHMAENJ718 z@V^(vnYV}nu%1wSC?n;u+=gam<7zb`P?H^($OjVN}9%ZK98s{s=Uw zb!>>5|08FgLA9{uEm@HZOw%11vlyqNa5|G3TD+f4)1Y>9puGijz1!+sov|owF10>w zF=stzb#a0D_tXZR-oh3(T?5c1I z>WmeuFNw6;q-n>+q&uGuVqkEGaWkXzYMZJ`^@-hsDKQ3Pd5;9_IxJIs$9@V`vV_Pw z8K`pz#d#LJBQyL&8b3QN`IJ88n2=$%_pnVQyp;=CaZa`p%z>~#8D}Z>MPp^phO&iL zk8JH}EcMV0-Kn^Jl!-_$DPh1~NHV0C?ln0|1mRv`w%xXoN3S^Yg+)?zNVHrqQ>@`M z_m~VWvmCxe3GZNt6?b3xAZJ0Tclyal7@j}^ni*kCLzwzf)~@f1f0XtD4FV{nYajJ zVQD0%HK{@)qYS^DA&?D;sZw#gj6~-es63bGY!h8f0}-eL;k6mos0-pc48q^#8Y|Z+ zAl4%lno5imfz`x!PZGlL!K71!p*P#I6A#da`iXOlsh^3DJ)5O77Yd@~*a5t%yEbZ)wUwl^VM9`r4X?9pZ+ z4$D(yj@z*6zhY|~NP6q&5$QXs5M6ZL{oiWm@e5Z^&(vf(Nt#&~pjJd!8|Xi5$O3|dTPq+GFS zrr1m&pWwLQX=Eg%f>2>{o*V}OVIIkoouDmmzs;#RD2LM&$#*J-d*6f@Df~Lsz$*hC zj30Ce{GDJSsE{~^5vZ)SU@jmEi7eGBOtKm*4J~r5^*HoRD8kdAwxJ_5{<|u{<+m$f z0_0pfZ3p@&234T}WIlleI2b%Y1-}VkzOeGao-T_E_BDipDt8y0uh`pUha2!I5IL+Xk*Vy=4mcpVf@G*Ef>@XuiI!$6JHvnjq6nc;S_om$T}GOf zo#Y@YmbQteW(U;hzP;00VHc3&zSr7)=y^ZS=l#6ejsf%A!|XD1UEkBy#dV2>b=C2) zu`-wYxBFsf@g+sRD75o|1}%TBB;L#^(Re!wp<+s+pgza#=IuY4|KeEn=YF@F5< z?Rd+<{w}xcMfb7`-s`>Ve=5jv2kd<+zhL8F+Pl%=w*tqG2R(i&yQ2&B6x9{Dh6WSt ztoP-|4@oUw^kQaL?xj@Ew$~F{+%s#6R*f_^CbW3Rk3+#tUiZG}&Wi+VXy`BAk)c!X z!BXjlYxUTxUD1bzs{354y?>qIzCiXb*kpg$?Z2csv^Q9&9Oz%T!nNPCW?9R@-n~Z( z>fLdVLoNT<=Au0VYZg8{XL9O1(it)4-ZjgRP;%As!B1xk6Aq3Q1~i9zFU2Le`@f$J zPu@SQps>HLBD>MO;DyRnFKqOz+_^TVZqv}i{sq4cEu7W8+8bm`U`8^QB&@%f-4_~H z&@#4urhV1WM~(Iw-p@WN@Q!TEuiQMcF%o9fJ-5cWdE|0w!S5rN%A=q5zFyrNKGgMU z^lI<%8&NV2!xUav>aBM#ToQe_H#xcGq5j+g=j-FkM!e0v=C}gVy>Pufp#Q~X&@-$b zccFc&(q3*a`n$I@#P#CXs^7eaUOYK;^+L;sW1qdA;2nJZ;zrc6! zqo;UV23;<9&f5j9k%w10PxY-l1joJd?{M6|{MF?exzyDhK6Z5&{;y%dic9Ofn;)wT zbx&H*GQHQ3T-npVeojlr__@vA-$vs6qgS~73tf*5Zh5@rv?r&iXir}x|M;okzQH9^ zT!mwwCRQ?I`sAG#nrHQ2t%gIt`2*Lg!S%-rRt$agX2GVBpq0)UV}%Y!oim6=sE71y#;fJ8;?Z42(Q4q{l@R! zZEGRXb#0{mckd;q7Y==U^V1`jt~S37AE4&dBLlbUewq0HL1#eA@$8@2jC&0SM9!SK z8GjklJYRw|Pv1?v`^RqXd!)x(3yfO~ZP)*f8W$RY&yfGkX8<>XuFKgkK72Y5<`-<4 zA>Zpc@>eAH&q&#zwj@v*5>0>6K3pmpUbcWnlG6N3TuRdbJw}EsSASSv- zXPm6efUwOOt{&nxD@bSj#|kXl0h6!YZLnE?{qFUk;L<-fz)Wm^=4^`|x`$>c zIbgH*whP^x?~LEW*x}|QGs5lf`bH%9ZoRB84s^lIQ@~{~z-2(cVc2{7790H{6!EIa z1#%eOAtfm=!A!kuh4Cm8k44drYIzETD68fGnthGY!}9lDvpMCEZ8)(B@~P?Pdjtt>r}_AB zPIDn$qLQm+G)x%)Opd>$bVzBjrA(p3+_#&0D0Qbu;3XRb64Ms0Ew?_{hz1G!)A@)h zDfK+tgjYRjNkO*r`gI`O!1;W#Vgq{qg$KiHEX&E4RC58ODc5T#jMYPmASEWZGo|8n zTB5VW_P`s0NGT13BZzND_1ZIe7$U49DXmq6Txd|-C95up9VE{Q-w26*KsAt9#mTon z&_q@PhZ87D=Sc?35nAh)3q}gU038yXgVR{q5O^Lgt;J#5-Sk{B^%&Wf`%)Xp8qKM@ zVv{$e=VM>`L?==}9xbD#km!JiRFiwVa0vY`J4N})*h1-=qDmTlJ?=pM85Ias=5hxx z32LZvIv12Hd6Eupge^(S?Vwu)f~D9L_TA#vNWs(vFN%dqo{W=nk%nlF)VygS-=NhZ zQ!a}U8por;jo7-k5?<01je)J9UOIc#D)HMWg+OQ*sVT&bc0TG|ZzMFiEyopmc z@T_)*VJF$XI$xD|7`sTA^LCLoangqKpb4zLlP-swSxbj$5JU3@~Y+uXjJl6q0+Mr6k35EV<*U|?O6`hWb_($Qn0CKHs*xq zl+NZSXN863a49Eb+jTCN-6_~EWts8RKAd}cJ>Hof#Bp(Z`6zmO4Ylez*PfS39v1p! zHgOXT`5}0YXs7U_bd?bK94J!0j!3QMB5EnVBkU&ep)ey;%!T>6yfZ@ih>y)$E{9#b zY54&)a}Engcf}QSJZMDuNqM4>xtu+~GSI1P5NHs@*|LFVxaH$WAHg$l+ zB2CGl2cf$>)1#Mj*GP~w&X7U#7cM@?SR*J*GcP=b3Zmr@JUyH?r&bGP_Z?fgokPtO z^AeXsn+nY={ve?k+8JpoL>Q`*Gi2%6OkO~Z49JGy!*-kV%>Eof!-y(90kfzrgoDwP zhU8cr>S~ifc4DOsxJ{`M!{HTF;IgdUodbyr5~nW|b3-T5->|%e1*vHiiw9b;D8Q)i zw__Tcm@9`cn%1}KbyXA^5{jm?G*hZ&XuL!fg(3JgOi*FQaQ+GeNE#^R1_S*kza21n zqJ+%A5Fn4aU*%k~m2%u4z(s0e7?YskOSK3Q9IpaRCS_FlsiRRN#4Ab>@iO_a!c4}j zH6)?eR>g=hB^Vk?svnY;`-j)k0Q$(wX`M4o0T&TN$3UP34ATp(uTJ5#QWB+_&(it_;y^`4PQvCXy8C60wTkMw zB1@y#vt*4hpFJ2$Qjr>jOTIDuU+7NET8cAj3fGx=4m$wok$j4iDB=F)6if$|gjI^D zjp0CdnwSGbPg|Ju?A!NaH1HpkChWgbunrP2sQn=rnwif<`Jea;2W*T^0(~|7rvZ)y zzEVSj!GMC(0j(c=#X`pl9Sb6mNGpL99DyIR>MS1>qRL&aKtluSPOBPrK;X0me=wlK zc*M$UtRw;Zf|OR{=sdk5FjpqAfRiX`pw8#C#W9X=*%K=)QN<-9NmWafEmM|LI?+&> zODbd=a%33LnE!G~ZZL;M&RmsvMA2*yMUXKk?Z= zja9@2uJiZgJpJSBx|#ul;`JWQA6>cT+tG8~?>GxGy(h=JPYhkX(p)w4-D2;Fk*il+ zXL^UebFLckt0_qC?e{vj{B4id+1Y%kKmX*swLexke;FJ8&h@SL%+uX%LthHbRlSQA zx6Bz_nB}VRY}$H`T2i%I3HFYiz2$t(+kK_E`8j4xSoNbA>>9hpM~7Z$96$ck_KN2E z-mJS&R9<}h=dP}SrPN;C$+{VR~r$2sdFnd+=z;lbfG~3ID z8!py;G2S`s-0AK9@vY01?W1$Uv*X8x&qY58Z+yk4uAM(L^#)~Cx<1+Kb?v9UgP!cQ z-UWU9;+79Riv{mblQuohX zC@L8J`mD(3tn9me)N&Uv$6gnPh0$)4zB@@ZSg1o^c-BSa5sAi2P>JA+PgnopW0BtOL*5rgy_KV1wYWYR zO(t5z{uh@>gXnbay?!W~}~l<)QJF8wyr< zl&j5UaPSRTmA?%gxoH38zyIh)j2442?p_4uKPd|zuOS8h9=QHr4TMi!^{;-U?cX$s zZ??eo*Z=>pA84VkvDq&^Wb16URd@KbRkC@ioPcha;nA~i*%Hu?g8Bk-n#0{CK!3P> z90+Kuf{(gobMQw#ZPlOnj|G45ADEB-z^?yRUx1F61CcQZ^VfVEUo#Ss&8)vZ{wMwe zc$0*G@+KJTTL<$W3eZcl?{OdZNDyd!8i6)>{BObVXruN1!Kdz;<%ds4bE9V7M}Bx1 zc}mV1AWecVYPQR)12j||$8)?d{vWVMu@e{$3`#>_IDi{rl^pRN`vK6316O8(f(lih z69A=!ACi!82K)z<)e0n^;Yz$=7f6l~x!gyaT&sPw!tYH>3`S#-xiGghoU1Y4DP>aA zQ}mdbkprjzIZPd z!wYf3C;zpeXLyWO1?3UD4&ysM_sJ6iDVC5q3r(DvfifLXg>pABxDq+m)q`%HF>xKC zjF6O%p%fM+I;NpWu^>(edjR|-xgyITDB&w}v8d$9b1t05(fMHBz+?Do%#lxEyC7Yh z)i_vHgus$D3?2m+9fdLizr`v$LziO?>^h+~R(IgCl58e*Ir$V4h_zX`$)pLZrvasl zp_^~2OtI*0?0pvSO)!`k^AwCutfx%kQBp5}EZZjGA}UkRNj;0JOtRF@Dg+0icbaO- zM2VCJgbC_mSy3Ynx$X4&IU4=VHsp9$%`DJYSL*SGwbX1F|}~jHnS9B0wp=} zR~7`{D57gizs8wSBarlmNr~oSp(vyTc=1Up;B_d~H43JwB6^8d=L%3OA(Kz7I5!1J zqXB1B2^D4x*^RYI*a5r^smS2~!34}xtJ7fIb_PSlAg+~3y&-Dk*3@fNP?nTvitG99 z`4~G7W3yNx4fuq!s_w=#(L$Q9fiQV{PBi4hM-!J*M1u#a>h|~m;h_r*_ewq%c5^|G zkXN`-xeK^jFOJf1?l!j))%7O9q4T$c+|oVCm0ckYmw zrPIoRYMR$oDXjzx)hVIlwPd;Khxng$8PI@6gIcbwY!ju12>YytQs_C033X^@V5q=G zWb*T9Q4Gyx*5r!cNGOQslp=2E z`AhsYsSV~Mtj1tSH)+Pr)zl<_^uhFse+1XfVDvxS)55BEB3BSmZWIHC{L>Qx94x{x- z&Vy%8TU9L~*C?4*CFeFl=+yrLc0^Ssv|KulcXpsCCQ);sZD4{zK)%N zA|ev1(fu_(IfG#QI6{*o5Zo1P=1ZokkPwxhti~cGHH}OTw?gdxaxoM=f~yez8k`ob z{1LGO;!>XwDIHi{!wFesyswO-WUP@z)0kGlZ=yA_5W_L8u8F+!(kFB=999RbePRDp_@|-lz_5Ba7)AA(*^K z()q=xwUFdzQlS%br=q%c(t1STq%P(fW*R6nNp z^QoVUIh^0kwoERJHWMWprmd*io>RPZ+UW&vq1(mCUJLC-H~Wv)M?3Q`ByRTi{PJY? z?aPmShTY9xYCrYEw_W_*%9o>y@A}Vz`f=;UcRHH)^ta_^+dfMfPfE@19^4-n9KIwe zIAO4J^|Iau;EtTQ&rCtK`#-z z8V%k!NIYuy`#7L?^Rlopc4am``qkxVrzayS?T9Pl*cA_#5>59ZB!9 z@5AV(cjF!d2~n)k1Pc5_mb{PLT@mN^@cXPkqyzHj;`K^Whv@j*FZd?C`SE4Tr)okA8 z8TmG0^4P^MfA@_1Hi$=G@UVs;DvgM?^)H%auOG~e_oB}g{vzGpGw|DmVCR;?UmFMI zzunpi6Qma|j()N)C^tGi)%~bnb6a0ReA=WIbls%hNt2`Ex;KxMAK!S|{ZTyGvqSHf1 z%=V{;FZ4Z{RM+y$`0dL@!Jbvgm3uv&qTukMguN{bZapWWH^)Ng0an|^)3(el1OM{Oy zbr}PB$yZ_Wk(Txt8bq3+;7{7iN9T`*c&J8!vPwx)UC69=v{` zKb`632J+K_zxH;HbSDkWNUEGVwD(G7WB+2V`KexWwmo^mLko->W^}MHWBGY7TR=bX z?Z4(Gzl-)>hhby?3ybley&z&AEE$3KI)XnNH)h}KKww<+zw8}g$@mu^B0~iKAF8Qe zr!8!6PKUN(60{A?zP2GK#}y8aj6byv@4Dp~!S7xFbzROsfWjz?1`4Ar`oi5AzK-FK zfP82hfWjybasI#Bh9+Oz5CpO*Sf}`?4+Vnt|FjO;1{bsq?uzy2%ztVdW1J3ipEZ9V&v0xAkz0FKN~%l~Q5%zK@n`ka9C0cK^GEvwKU~TK`7uEPFzk-@x+z z8A53_p^Lz7(%2^QO`@WjEiKP$SVBZ8bd-Wkk-mvAoF|TP)l5tzcS6V|DhhG#!LVnD zC}R@QMwy?@=P52WDCJ0M292MixF9oIq1uTDU@dx$p9UjMXq$xOnA#*T6;dX=iatP~ zoS+1-x(3Ce(gXT;1=E-)x!dYE?J0+qRu;@e0eyi-VKETUe6CRIsR zS$q+GK1A-xtQA<`z#mHsLm@m_$kiwjJL zYwEfB6&1CZ^6DP3qOr=DCxvCOrS0^a4<+5_Pj-;I^QUlSwQR*PUgH}K(hfm zkPZz_>B=U;%d~1+Ppv=W(}bfU52LMd76zVDF$xz(p|!Ew!7T_MCS263=J}$?5n;|0 zy(-eoV5SZlx(7e40T(nOD)QN;H%X+;p#>%)N#lC+K^u3B%E9O$Ca^xVdMd*wb9@s? zpb_XXPz*4OQZ_KTa(G*Q{5XLqtdt{4@lpB+ zr#45hH?iCrWnl-K^fr|dMbZ^VDYAyR7IwZb;bA|ONmT7bnNkvklwm-DQy5N*Qf#1t zX|7?aGPQ!3IF-rFI;aSh2yDvzVOj=Ru1D}EHI8=D0kQIq4L2XGELQK<`@;wZIbEJj z?S`qa#n&Y@XjGWI?KbI#C}%QBer1%yK;}% zE(Qt9=txQxUX9mN`;wC;Qv0}hcv-GYKiN*0zAbH^zFzGB5qS`a)FKC}5e0W>7%mGH zbSgiTz|TXg*@Wq}xalHFwPU+k*{Iia@slJOiYTipf)*RNNVYS#^-7ybgBATU0ja_K zRiaKLG*DrMXb(V(M}oT-@l$dIgBof%tCj-gTdb1bwj07O)EVGsx=;3XiYcg8oH@e= z#bYtsMB=+egP>6`(V2CkNEPLR%*1v7R?z_@0r?&5&z&JWxBIL;1r15+GvpF8qUOHvMNjsf+8)ZQ$dS@qH}P;U3Ng_vN4RpK?(2x6i&$Z}dy;HS!+ z#61qR$ZbRBfk&3EK(=M`|3k5~Vm8x*_~REQ}>&w&UfQv{Z4l z-Xp`&&y#p7nMusYbVTW^c-A+xHm~)|RL{Om@7t(|VvV;m1MFfxA`+^tRFZXT>h_3IQl(Fm)*I@5V zV>jn9zvx=wei+QPeH)9qPYfn(tMu=iW_aay$s@eo{Kn9vzJzxMpJ{d#U9W;=(FaF{ zr_GLUp~gRWafg%;KBceg#X4#H)6LGy?u6M;L4~gAzSNfxyrZ|^*5Kw(y{_}0-rcvj z`NI)!kgM1Ig{Qz>^sXl$&TeyW+}8ZT;G>IO{jjdGdLS~jQXW1YM0NwCei|dzO?^gSY!J`QxrL{WG_@eja{r_KGoK@oKU1SNA16J1Vtr*~8i2 z_6IL4_^@}eKKSLq;BC%t*QfTIKl8dqKKiKO>EVGEXZMJ=XkTu^2V;xL;L?j_wZ&2}=-&Kj^T+)`MJ~5@ zbGY-=MP+>UPtKDgGVtcE^DUzAr4!b-}%5o40s?Ec|%SGdZsbb)OC{*%$q=d$`&4x51asgJB^< z-}2Vr2fcMI!?}gcJHEuGOxdMxeyQ)~NXv=AS=+pq`||R-y9TCibM5I}7w2jo*<1uD zf6AohFNTJ_uHOD_U)VQ#kH4GdUtj}gi1!Wmij0wgqGdg@8 zho9Sg1B4$wx62GPzzjC{5cyBV(fSI2#P99(j%fU&T7Nk0Pu2SC=)dkNWy_4ljyLLi ze!h;!zxu?enXSz5VD~mT=W+mdCkEsNWy5gujrW!NPD14y{LDJ`?sb3gG_RK*-Wj}b zv>NvRV*@&+>ji-q?=6A}TL0^!Liyp6XF9;#z;q-8`ZgdpDngGc10@S~{7G*VxsLq@ zJkZT&e0n382CO^-gMfYT{wSCnuAdqAZ%g3jV6}Lw*=JKo1+>^_gx=0!m7LmFeq&-} z8?|L-#}`Q#5p5n9&9z@?r_yqU{(`eR|5fQ}$o9TLl|sA7CZ2N)Z< z6W06sfU~o{^t%`j^ABru6qnB-#Z2tf7(qwG3TTy8By7qiOo4Gf0AQP$^b(bb@`_R9 z1y(K9L#^T0@GNxK^cnLPXAeaCanbqBu9$RY+A;Xv=FrT_C7xba{gAIzekWoZl_VY4s&ND3gztt-=`N1ib_1H|N9f1(OUts1LP!+`fwHXDtaGD*ejAl4;G(6kaH zmnx%DJB%5Fc0xiQfPz@4NM=+92p?NxZqGygx&rBR3_Ejz2$UnvV72quIb~(*8q>3o z`9eiJqktTwxTb9~$(FE$CK1me5;gPkWK?(NY~~wgyiyCPYMm52`C}8HV6CK8MX>1mB&)J&{Xi4o3*~}{Ey<*j5QQfkP-H=b7;aLV zNM3~?Suhz!dxsqRVCMr^sv1DXA3B&Rm`N>u6LAd1K!nUH)4X)CCxRA*3#USsH>B?sSosgJg`Gimy$MgIAFqOhs#{&g65#W_)& zVF~ZxCgo1%_^|k#s0`yuavqZwl8hftQ75ZIXs%(#2`H+MfD^)#_sC4qH~*$%(K2RX z3QwIU{gnoC4qe=yD%b+9R9px1{ccPq!)6GCl~lzLjYgG70d!f>LHb`Lc!iTiOes+r z)wT?%iEJDRFGE3q5t@;i#T_Uqskb=-vZXtjY z=V1qEF|bAmN3*#3)w!nO6r=7aUnsrJu&3`06?Bfgs#F^4*^LxHkZ7cWnNm^c&UdLa&pz?rIW#EQaPQxu68nf)4s zfss(Hakl>pbeV(ISmPB#E@_Cv=QBzuTg#^@tT~)h#VEzGxYexi4I%fLI>l5@TZ~EN zSglfH65B~+H$5Ms*x1IEFdDP6iS=XZIj#)fq-Ys# zS0}fllaut8t42)(PqyVC#A*R8XJJ@Usdg7}0MNNWtx?;FD@IwUA&hSlByvq5Zzw8R zrolf&cT_w4wD2LoOe~WjE|)k_Fk3})x5z$S8XYzz!i<787u#R|3P zpUId|A=W4&h##%i7ba@2!9Qpd36u*7tR62BfoeDt+SIw%$4P^7Rf{6`|Rk&p0%qAcH|cP1&zJavJ)3hb*a~Z0DeOH}Qbqhz1$j zJcpVKf%@E_Mat9;jqg;$aqteOG{FmT)G$S#{U1iBNdddLthT~m2dqPQs$HkfK+MPi z&iWE`284`o3T4v7$Z(Q^hmhbq5=RiJM5VIG&!D0kYnqdQ4y3cL!Yy<%Fiegn0M)S4bL6UC@9aTgf8-e7je3o?`8moM6q zRG5+yAG@Pi!~}MSxRdtY{tL|eOHuK9&Ai%e6=4c-6kL73#@0aWUTcz({%b~ng6eN8 zWIWsObUbf8VrdkCOU~ax2C*>sOF%0Hi*SlgW%Kt?N%^=zYl~2W*{!r%5X3S|XG+Lf zqM@Dmnj5Cd#@Ul^?)~Z9<&ftuKG!l3dNwUD7{B`}mi@hF&!|1q zy%7umy;a{`9T}VMWPdIjC5P-npP%L0_HSPqKsU|F>|StPs#!5l+z}YOuSa>$QXE%X zsl02kC-v=LV*9aufDCk+3zr?qxL9>Qt8i2A#iRnaXT|4fr3Fv-#Z7BD`&90?=KjdY<(QkWw?VC>tc71R1#igG{ zU+MedQo)H0p<@Bzb#Y^Fq}nfh+cB~;&Nb`s5^v2b!E=Y6nErj*?Bu$R-kL^R4|aIb zsYin7?#%w_Lf9Fm&VQ_4m@NbyD>q+R+#|lwdYP4_?Xf-WpHZ*F3BD zO0xIXXx@j;%#j^4id=W&KC*M~%yeeoUHyG_``|;aryc`uG#}+mWd)xfOn%w>aGv+uzBMbmt3BlEmX49zq0a2yvp*Fa9{ZlCoIJEB)BgR~(ognzcD-xo z4&&{ylR|bZ3_jrreZslt$f|*GA-H-V`Ph!x#VuEU6Tj$;y;6B@%<^Ni_W@A!JP+9X z8(?WZk#pik{Km9Du=zhw_dmrYK}+yQ5E3|*|L0Es=?F$=gx<3kKud7)`oH%|zt=ZB zq6d5QADW&NK<86t8d7El&AUDAWLonAPkbVX{(YMPV~z_Q*uTyh|DocR7wqum7q$5| z*NNcY*X8)U0#NZ+B$V7;cg`1=bT2arHsi+Y0MOUMx{qPqdfz&?Z=L%;>q;U0DB^BJS@9q+XH5c=cB z<3Z!;Gijuif~s5xc}YKjmCS^xeV%0q`$HmOkQj(L3)!=*h_LsZ1u9mjiPZOS52UJm zXueOK@uvY}w`abil-Bz14s0dlGcO(6JKj zwQ7-7fLGvleezNgTg}f0Ou0~Gj))xH$x7gWfNTw8C#$Q_8U@kTrZ7@iM_YM2izKQ9 zoIN9hGeD_9cZ8={It zVo)j&Bj$I@HF_SknzTOIGk1q`D$kk{og5n|DdHhH+put3iVq3GTa!f!26DzU22|P92VyDzPS7;p z+4SDCbSz4lE9!Gn#f(lprB2Pl#I@)hir{UzScxk40A{#Y#;{U5gad~i#~16E+#aD1q?=!HDHmO!-Zos!<3&Q9T!{s1S?We*d5iMKEGM;UF;xhQ`mRcG1={ zwE*|~Dhf)E7y?%E=3+I&`2cuG)dq#QUX3|KwMku3$kJ+mnFPiK$yQPeBVuWh#vtD? z(-?tu(yIxSESsiBDmhGpPNCTCPgdvMM%_SJ~95oC*c4 zgv>6-Sed9Q*YoMP%=q&f8Jx>_s@jA-CKDzUKQE)Tmaq;Q-zi%8D})-dNkgy+{!A5f zC-jL{nyH{=nx-@yvYTZqXfY13>>$BP*9b`>t(ixPZ~_t%S#1;#*+cv*8h=fog?+`s znq-F7DwDI=&Q>-_jAP3+CJ(4zc6FwZH!n`xz=Hvwju(&sMTntWMH2xjs=5bK`ID?w zh0?ji9`KOp9T>!lQU9uH5g?+*!IfCXvOSoM6(RKur)R z7^(=CMf5mrPS%mQ%8%8^V5doh{`gs*P=Pd1FV~V{sv@Zn9nGk*XW^(Um;JTe*;%hy z3AIck@VMCfS&Z6*tLBx&05FTdTcn2X>S&a#AsJ58YhcWx3PMo9<&3kDnIbWdG|3{7 zPAH=CSuunKSXCvV++juwL2f7?sDU%jZm99ADG9UkG6ck0I|PTwqdk~LhpTj10#6{P z1U@}Wm`@~Yij_=7GKCPD*ZodRgnIj4g|3tHdH6W^T6%{JrvgNu#{+5tKUO(3kWhe_ z;C^MLLeL-%++z=Dh2D>k#g_X(0Kv*AB0Oh==Manoh2;G}D6%FM=x%CAghM39{U(4{ zShyF7WB6kimU578O?Q#^;}9oH*)(PG7t7!yh@U4SE)tSxQ{+y;NMiVeFv23(G84HH z4P-#@shZa0MDZ~hS{ua%gMYL5fDZmFoYHxP5z924Y)k&cd6dYJSO`s8@A^0oZ)7-5CMMXYG6mrF8*z_l1#te*4r9b&Qb zt=?_^(?<*$2}k=j`)60*WrWHTA2XkR_yIlKyLE>y zx90ejxzpzc>@t=2ZAKAL<$JEMF z>9B?KtXh@aYb3f~9wgEt`r?`HOM~%iqgF;SbIsi)z3Dl3n3)G)`@s)~v;HpLT>Qazho4XGTQaMzzdv}v zQ;p!B<(_Vd{d-5>xw7t;Mt*BLe$<}Qw;{ee;MVEE@RivoyxYR-PF=h*F!PD-*W6?K z>%R4VK6JTapI`7EZ~O~&&h=}*t0-K1n_W+P5}6AF=}Rlm56=8?BoxfO%-YHeAFu7p zp}~kS^M&vI^d5Fq^sTugM{AbMx-hWl$JfW~-+!3hw<`6u-)4_y z`w!p6E7Jy#-JQE<$K=Y2fnz@`OIUw;w(A%7rX>laCuP#Zq0OFteO_h9-P>8t6Mc)l4u>Z=V{j83s7q%(;ae*A3~l|q?i@G*DyuwaYA3x`*F6|NR(HBDHMv{r z;_E|LXM11bW0mLo4PtXP-a@6!ZVAoB>V0i2u6`|DS03e{}W#*=cXZuJzyl$K(qNnR|OVm51i0 zZ21&0_qTg~UX@vVne$9btmHsi@7v^@83@SvDnC2^LvZ;n_{wL!O=Rqm>k@whC>(BW zqlI$9$(svDF`vg51CQ@0b{!yh^r8`P`ZKTwoWX`{A5Q;xhYzP81)RRahtr<~oZgV= zGY0#>`g=G%>Z!=F|M5uwT4jJ$zx!4N!78ZPzrA^C)X?E`_yX$w&h<0LgGS5tKdUGz zsI+qt83`yg0yX_tb-CnI#)CpsVHK>01OFoY3?wpI6RI4;ZotLUp?2u=IN8cjAlC_E zMF+$QgXgGk&aaGGFoEzeUt zLM1{`k5}^vv4J>joc0Y?Cy|7{?5by#?Egma!ad3HKR1nxQ zUwm360>{m2Sq5={p9w*&44n5s6rG=o35$qcbhj5s)Dv3s|z=A_riaRy{R(_3#iJQxgdRpmv4pz!aIFCKqN{Ri+%gm1Xv|+q5wriTl6pihSjF=;t&)LMI$r`vGQ^i_BDfiR5zSmBP$U@M_4AC?J z=xC%Eo(*Tz;BWzilp`b%1OU1R9C_OjqecO}3yzSJee#23LSbq;96W&O1#djqDx_v$ zt-STWf>;?aS%t=+GYOG4(ENjEHK7xK@Fn|z2p^q@T$4L!q(TGZ*KtBq(!rRyIjb;) zMdVbqn02S)B5ftz1Y6w37=c1pFSmiS9u;HRT*u)JM5jQR#EFJ>A?pCcQ?IDSdh!eyR&(lhX)Du!G5ds~3_>n_?TA|(_@WO|nEf6q2 z6-Yz`K295<0UeY(9O*SK+&pNtf4U*ac&WDuPrlbxr z<%DFqF7?=yqxgdkye8%Srd+xhrNZ&{u=O>N`XsSC_}#JdBRPbhPs~A0_+C<+$1-O( zFq#8AeD*0VR$HpUlkb}>V1eo#yeUW0$Kznr%w@}Qu-6;Z_9{hHtU*)c22^Qa=QHIN zb9V9sM>P&s7{mw~3r=*jB_oN98i6+yNzz)OuR{>)L>^%lYVOHPY}0HGZDbC7vU!~< zNsV!$(K2m5mUxPgYfNYs$;D|BS>YJU&WX*hP*+iiP2Awxga%2$ z!nCr!o}S0Bdy`d6BB?R~#IG^68&UZ{qkbZ|6VqkIz_2QRNQKduBou&NO4QowMFrFK zwLfR_SNUoDwd-X})v5>%REvutFlnGo2~gdH6(too-4T=OMTSY#;s%<1l1JJrR1!hyG^vn!1ZN&!39YB0 zIOYH%*EO*^2A)MqlSKh~Bt=m)h-0D&SR;w!pw!la8&Y_VyShhTAPEBt|Om5#u>tT}lbi5dZujUh)#Khl%%< zos%O-TaPRpt5OGuEUC}mug@fy>M~8-I*9h(lTHBLOC>2lTawINo4E9Z|W zY@w2*{(M?uJj*W6nE4n{$z3E^&2m}N$C4HKatv#r8p+bPS?pvES7uR)6_U_${3L8L z9{95ycsQAOgs(ElPsj#gXDY2O-9bjYNlYSAQBhSU%17}gF+3iJkNI-0<-;Rf_%w9PB?o9iM z@#$w%UhJ7p)Kz)d!*lFTw(scKit$EEHs`i9+LsMZ{UN(^V9UYoug;$vh)#884mZy1 zo;z@`!``ue%gVA!Vw8<{UhX>X%_UG5*=8-tN+EB6hI&x1_+d7ykI08XT*7*>T~^K|K7VY zs$j}UL!&*v*ZZ5j{ez>!|LC`$_k>2;yZV0X&t5R_;hOB)-ll`6{g&k{4Xj%{e6FNB zd%$l|-6?ltBP9PEJ=lF}uw=h8qi?jw+2)xVdHTFP$@|5cY}6B_h8yLgwIjbYc6WQ5 z{sBPnd@)+LcckER*Dd!K?-kfa z!fK-5b&nqM{%s`UMF@CZmI_B-xam6eL;288&)Z!C5Xvu)T}`PxH1PSG1^y4aXIU;M zb`K2tFRBamJ^#VMxB~Af_uA(`0RQHZ=#*i3uWRn`Z~gXtzjqZa9b20RaQneg`ziMt zIPP^$uiv7VELoMO2k%KJ7 zGkwm|Zs)k)`MQeO^L5VgSwoelMnJs(Yv0k23b^n6hdzyVb&t#(ZuxTH3EvY>6)H~+ zrq(v!^mv|hx<2(E`*LyRA=@gM&W6#bEV zlLCB2_q?{Z;P%Ep@Y%1=%W3=ipZTEyp0>qcj1Bph4*uWqJ7I?>1Iq1TeCW7ubICXm z#O~~cOq^r?%EY-BjHCGKV+A0*$TWCE_h=5_jk-3M>)1g%~HBT>*(9hKbP_lgVU8 zAZUnVBr(P~*_kLx631~QKywihzNbxg|NH;G--n^%53A_zx}N7e=Q#(c@dpd~RQSXp zao_VlGwOQ>{Sul7i~gPGhv&F%RI%*l=i{{fjOzv!i)umE#_&$sJTJhB|r z{5CqZ(3kc;;K+&Kv*7?C;I5yR9158M3?=&iLE|-0!kh)*4l0^5nEve%0*(97PcyXF zF3$NxD>XCIYnQ$LBW$9FDs^<_%^;X%becKizA#}AwEe()&U=F8j18O?kvctEG-~v0 zP`Ch9)=O{EWE|Jdzshw~ToYIG@LY_$DA(%1yhk?Ev&3f{1=nFrtBihJh^CERH=~4n zywXWSQyn%L_S(Os` zFzl44EGuOMIva>ZPJWG)WXrnoNfJT0oMSEQJ1tj2W;L<3qD2Z4t%*>zn^=E{IQ z7uES_uJk#hi7}V?m7w&2IXTr;?~I||(XKN{eqJ@|mE6o=HPDUq%}rX8Ca4XV_*^pP zVuKdxVU^&w&rf%BX`0pcn!v7t!6szlF9~j~)uxyGRzGVp+7oGnORCg&MeD#6JNl z0EI!FD)`tZ2~oxZJXgA=2d>n-te~E1QK)4wHM$Z6!kI{J2-+-B@h%0@BXdx=2Ra8j z1yx5U=$j(h(c1&wseAzR78*s~zL1r?nk04!2{P!4&bZq(aM+8LdO4KD5<-y5_ps`9 z&DE=^pB9D$>c)VBLX1YOatpE4Z1Ehwu8xRxSMXkLrWV0;T)v@EL?{I#1}K3okcxr~ zc4OgwCyYg?lpLL>0P)!bBHpJYEt=b|8Rv=b=#*58WCR`+usVWyVx!8J8&%6jBvlS@ zL0*;SSYvD>BHEKA9*Vb<0$ED!(SjXVgV2H&Ir0qX_xVasWGLd9n;5m^;CR-{X-#Db z9tAy2TAJB_bF}O|U@l^G8La7rUoYy<*eZaTs-2z@jCo?VL<4#?&0})YTpDc*r(oXB zT!4j2(2N^R0xwQwz@c49m-aG>A(X0OG1pEs19*<3l%=7T{$4i`?P;VJ8=@&tZAmI{ z=6)#@mZ3K!fjEJny@`PBGy@?yjZQ$$_9j7Nz3qjjEAmWOw?R}|7k;0BUSU3CO!P&j zP)#*R_9)O)(RQYh6ZX^XHM)IE2BldH`?&@>Z?mXthEQB4f);}Wn-U`C|7!7YZgz5|w3bEZNnOQh~1l)dzoC3uz3cM5p*OeKPCyWyDq%0@qIS(Rm$E4-Y z%_2JJ>f4lV(8K_ks+Zpo<2A1bdjUI&)n<|l0N~A;L^!iZnb+i+j9T+b$&xJ#Kwew; zvjS&7$hXUz1@$Yl42pV*Yt|r7@Cq>C90dggaSd+wu!n14ubQBdL3l}60Ao*CNG~9I z*pcuF0JIZ)brR{{fFKGm;Z4+`XUIWuPyjfef~gOn&M7Yi!!QO`g_S_P2!~L&z$VQ2 z{C#ZMk}_q!RC&FgWD+!QokUBqH`VP5o1^Hnq-xx(+CUrhDPw+bSLU z!O)XWr9^$F`F>N<_uk}h%@9iUDx^#W__o}?y8ra05w^BEbI6^swCHK2`hw4$nbJH^ zet0tS-&}*Ark(TIY**RuJAGT8&O~8}sXp8GtCt2IUm#!oqNjXx?YvCs>epL5<9Un0 zTYquh%ROcNbapqs95VKOWmezh$piUmkgb*VkICCr5&zL2 z+=m|j`b^fP!N8*GoW$px_X9nj1+H*po$b%toh6Qhi@)v93yE+5?0QoxzHoOOy#DW= zY%X?9jvvYT=q|my`>7XKjCZvW^sJ-jgk zrU$m~{#$CdV`%a2t6#k&9ioR;uKfB^>_qF?zT$f$uVsOE<`EG6zuj5=yP>B~XZ76; z2JcK?=I`Kd+V_1MMq+RFb$^M*!Ff`jn0PEcE#T8decOhf+BykmNUk-|x9&+eHNN>H zgd`?N@n4fqtm|IBWA%M5GeR4_y|(WK-?=Y~kH6-s4)?7K z0Tqh;>{aQ9Pfnm7@nYV{EKfJyviq)kch<{0VzztkuMW@pYIxpuc;~+k%rEoFPyBoK zp4|L$U)P=P^>7INh^J>o4RDT56KgU~r|5$Zw)4k=c z>dHU9I)3Y9@f*Wy%l(+$pYHYlwyF6^(_;8pb)Fmk-*Odj!vs;w|20Yavr7$lVRp9v zAJ5GHTlxaj{A|DH|1N)?*#BU5G54wLW4U0L87l6{u>xcVoBnPyIQ0Ly#qXOr_P;zc z|IY+y%GH}4;~$;@Ny@9BOBsC?oMUFYKONY=Z7(>^JdmZ-|Fx{6St|mw7Az zr0f3L;Agwc%fc{(fALw#UkQGteDgqOXmB$~S+xHS|0=Wk4KriGF!Pw-F!K%=W_~eM zjpI6#93JfKVuFm3TSPFLX%Q`kE?~wDGT14=^eAPa{Mz+0N+KS}Tuc;DSRi?ac|fpG ztPBUY8|b{I`IEm44jrc7Jg&{$f+TvDnPZuid~jL3>g-k15I$K1pcd42aq?gAyWuC) z&bV^77Ux#WlTnaIwWuCuFMCA{(u2A@Wj)#Wq)e82w4}fmt*j|1wS&))4uU387TVzs z$CiH4!BeG@a7o+wurDD6zDN-a|h@0Dz6NJ1B4F=2NVb*_M;?wPsArMp~w&7GmTD<~~Cskih z1u7~6^L=9utrlR`p&6G!7d&vPB&Wgi(k29Gf?_m5sttb*29OB*8ci~Vvgc$@EM7SM z00Y#Tp#gsm8s4N}O-RUl89Lh3Z0yJ}7jV$zoafnNPS#^os=);nl3dj25Q2&nqD@#? zz(-M>2=v#dX0@41Gh&F2iRgVKc9|MO5$Y1gStogm_=l-5VX5?RvOCZapM6c1uBh3x zn!t;*@e>DFJ?fV`E1-QFCB}aE;ADV6@Nk25^HUd4<15vqe}gXGPWxc}g`}2)Pt& zX*4@ku63j;^S~a&rpbGX{LU{OX0i1Wh~9gJu;yhfG0O!q0dOmU0lo|pjNzu%_&Luv z*?J*69L)Y#aT#QjSN#&0ZEAz!sLNQd(gISIdMwBORh;Ua;&2NbMsdlA54p_E|N0x4yI#QHYz*FVpM6YY=4ef z)=88>vM8S_O<@{v6Pr<|Yjmb$ay$Q>Bg#}GxF}^;kkPf!nPM%JB8pH%QCP>1^Tq`9 z4rYFx#sgRSXG~Xv>yul~Wa^ix+bm zVr8*j)>yWPjmtyJ5Mb;O5+ocMei#0Ia{k?aeS$$E8#!wmgC$??y>r7@!7qtSZl5G27RbV6_SbK{gra^&NtAx1% zNIMyy$3t66pwji4<{C}VMZ5@ z_f+8NKm4VC1v{@ASP%Tgf3xr!q0vdO85)@N0D4!AL=)j36_y%nWMZ#OA`!Kz_OpN3 zmLK3u^{^W|XknSwfCQMEeu_(Lso(onx(P_-pe$aSen3zUCdI=4vSlqjvi&kGAD&dfX#bxQ4R=QIz%>eFN}}^_oOi#>z1%!jzV&(bX~|x zW*xPivGvlKrgFx4lQC9yy*gh;7a5UscF|6ygIl6Fu4oKuk@w&XkS*5H4LJTRD6ryd zMQ4kiRxzOIA_OPK<;bP{3x$_NbECw|6_<3$pnhIILsrn5WHC^dWPxJsmt>%~=GH+7 z>hzS?M}GYx;Ch@6ruQqK=-WBsyj7d>!%!7p5|bTm9UlI#7y4e`S=m4M%%L1e*vd>h zJ^62fFX!EomWhZ1*4Kw#4M=Gn|HEV5Wg}f;#D)5}Cz7;?Z(ydi`{3AqxomgQcVE71fnDg^8n`eexskKf3(T>m$2Milcn4Cnw8>c9mEc?6@!* zwc_;a-|+W>c}BN$)Wx~nJu?cVLJ{W*N!(UGs2)5izlbKkjl zX!L5?`06v&l}B6BwfN3M^#kWyx+{M(@A;zNl~-%SWo6ZuM{ibJTgQ%kU()i|u%`3X z=l)don|XI{RUbO?Zv9!SpN&2z(hMsuh^lHB?e(1pEvB}=i6Q_!c#?G$qI}Nt@ zV860+a)i!0>s$A1-wz}Em6Q!btGfFh9eL%|(_H_@>Bo-uKR^Cock(MIKC67YImnHj%fE2RHgVK*?CiwE!N-|AajT+A8vNwB zzLBAoFO)3sxt;>cpj}U;3a%|xc}j&5B+VTv!}ZX+7A^UY7?!uuYNOrbAR>a;k2Us zoE=5~d}ciJ=G9vh$IhNk9=q`IAEdCZL*L$fW;|{E)elGG7ZAfJLvm^wA_#g>=QuP4hw$~F##K`0$dO2Te<%9t$s+~YTc4L zeq(kph-CnR``z%z3(p@D{};ONqfdrRaq3(rzeI}%z+f?NZHENk55Qaafj3Mof!dP9 zXjtO`x(6P@1djPtb%at*R{7QKb|d5Wo!qB-je=h&LmLDjm5xy50oBRM95z)*l{@EV zB+t(fKCb60qw0Et#qeq2Cn`Im!u1?^j>epw5paSnI-7u?kzQKo3GDQEot^I2x5(IF z(ULmr3pMcGjid4lsiFp)+JY+u7POAy%Gg8f!2Nn6iiSwbWPU$a0aKetXXNbd!3V|k zIV`QkqfDg|yQMh__@uDuoZ}!!R#j>5cDK~bry=Mz{9d|frdY4784Ly~Ui5mTc~K1* z3uVoCuWpmu^tfIPKU4=SlEHqFmbD@bZU$;{AZv1)?d@6+XQUfc+F|A@WKC8=sU?gF zE!MndLr6QV*eglEc)Gn-2xs5{hH2tt$(eM6h2`3LX9ou|e6t$JCBfJ%-d;P60@fK$|7P(hOpL3#ps-A~Lo^ zBn05>G|s~~b@0_Z2n3>+L3|6cLtDP;4>u%3AV|-VMN!Lm733RnE$#-SaCSEiGCHTI zLOA7JFB1ijA?xCkvOkqO{AwHi8hBI^;6kHn78~-)=a6@0UG3?ApOJ}U-KiF8KU=BS za}cb`fs{9vp;8k$XXz!aIXc6J<0vWe$u6$6u1ShYc59A<%@X}NJ9QdBnxZ&X_5dsG^m&Hfy@H|9KsB%ps%2V|MYHi1&<3?*nQv9<#kNLZ zcy&{+B8m+p%|!#VMNVXcy;1e97v5#a*><06!8VI zHJk?RtbiTZT;`VWU2Ga3*5w{8iN_IIn9bB-}1p z(5I4xlFMf}LM22BnevaQ^I8riD4DC}YWQeW1(iB_`Z5tMK@|+gXpYE-k{Ik^G%Aub zp$>d45eAio1~B;`0{H_{8W6Bfs?L96N8p3~jsIrA{DuLF1 zMmb1DWSl1LF@|`6Tn(XF17PXAW#$6O{#((h!5D+af*j+q|00gkL5ZqF#3j)U9P;uW z%m;unoMhW-!>7(uia33ix(tc-9N35DAfFe#l-&@$1p&8A09M3KYA@-Rh$BL)9{QEn z=;hN$F4kzW9hTFkc-cH$KyS__AxVP|pdKQLJP^wpSlLF191LYIpgeRL?u{d(C?vD7 zY`y4C!0tKA*~XXw>~j1k2IySFtJtm~xscVXR6B=wmEwTX_f8{ZHB75f;xL=d*;zvr zkOw-EMmflK+I2-_%(Spe%rmt;fj88MZ5JE{xbZ?nnt?`w#chUpRcH!v zP-5srDk(ld?%-1+c?~L*`2^7jpdVNdl_09qr#j)pB7zJ+*jGSq2oy*b=LV*a68979Ux08d7+P#~6f@Kwr=-lAPVt02N99gltu z$549Av@Ti{_0&QHW3{>@ERwA9C9IvL}xs;;{7@;B*)!`aJdt8W`IaAj@tH1 z3rBf^+;JKoD*H}dkOxinaiD13hU`v=}#Gurb;R_th5)2adGyE})o zW`D3}qA7Y))SBAwtQ+oLd~eR5{&s6}?mze5Kez9YK4x8$RWWwE^un<}A1#UfuzBoo zarJ?*);F&n{Y}e+Jnz_nfq6ZP#;T>U>-)O(iMKzl(%)#^fAiR_iPldCzry{O1|u9J zLE=M0Ik^!_2H7nsnZ7lT=Rf<6XOOKg4jZaHlC}HYz{vwI%~`R8o#n~e)jve1Jl>xN zCO4;F845_uin@*e7*MjP|3>GXriu@mFBXpX9L|dWP#Xt3#O2qWO=AAT|9JZDz#Ds- zyKkL-h-?WQTaOuYqyoG8ru0)@zaAZ=cL5^Ens|WV8n)z zs85Px$9~YPMPsP^>82NNMf~RW?y>J*e{ogB^4`2L-z)hslZTfc@=c7ro4^15zH^5T z4&Ry+ac<&RXI9Ht-`j74KxpiBVX|rBAIFY;J9fMJe$k<`!|PsOa^e1sx6dED{imB_ z<>#t(pX*k2)!5PdA79FTf6-9RqLQf2+(#a_uIOKs^UM!m3c4K?ufKZ$;&E?0HSxxQ z;+_3l9-q597%y3#?;Oe-_|v75^!u;8U%cRt*?)Y=_i=!A=l$%$tcO4NZmhigZ9Yrz z9qBE3VXR}%o$tcdzZk_}Qx4ZW|Z{0{;95;LnpH&_HKW@Qyn{!OlBD0TUp44<0Rq zRNQeMAo+vEw?Tl*pY`K%1h_o2DL<}1mCpyI{4k(-$uF(Z0L|z6R-LhCKLGOogXTr> zwMnjr5}-bAMQgsc^^>isyL)zsyL*NK%0m`vpYyMUKUFc%7|OZ=5kjTFy%uw_< z3&G6-La~MpkDyuVd{AZ0BUaM4P2TA;9hDK@ufN+KkzD ziRVNt;;0Tejj}oAHD-I5G!5l;3bd24Nlq|D)+*TpA}2@rQh(o2k?DX=IWxr*FWT#P zjIbC>Q*0vPOu`mXp=R-tNYEIkk!_M#gA+1jVh_uz=w+70crmbzNN&pz8?+2~a?0H5 zFA@`9vl~p=4ACGn4kPeMD$uMd+t%Koux+AF>x92Ezf?0BLRNBmpb_#s8fAK~1kWPc zF0)hYki$a)J)MRAb?!WWq>6lvSBy-&D&uQNR7jJO%@OkrmX%_x!FwI~T}cR?w;-D~NX(B<-3m_U?37Vy1WACbqS| z!$F`=1=A=C8D>L(YA)5cD8`UV+VE1R2(Wuf<#G@08=b_+-V=Et2no{f=IPmV?PAYS6)NGNF>S`OM; zPL|a=yi}N|s(Z>TL@5Bz8-tGt*dX+DzDO+Cb%E|Jnu;^PPZ_XmHK;UP zX-1WEP6sa7KzPq#u|<1{?AVDUuAK0+gwcKSc83WE)Rd4srzU zf@x~fD@=nv3^5z2IFvMn8R&#)lWHdCDLiC5X;_?w>?G26FD_}&V-0o#Zqs1(8XjcU z240WGjW9anF<%40lT^cBleC324gq}rjyUgt!s`TXi_$DolVG9+8w#KtsyUj9GIHKJ zd=+Xin1kjM8og8;2X^jGgTT(xLe5Dt6O1FNrY<5~CCqGkbhyC=u7bi@ifQ7+*k;Al z*r9l-HU(zIO+m-O#4A0lp?0 z1cEmi;U-3K*LJ~DhZRKdUZMy)cxBo(N(YP$UkFyc=;$}NSUd1jF>vDrj=F@a7S*kdWD3_B1d5{pfON5KIN+LGsHFB(=8rc~6N?o}| z0R=#K;IR{XW!EE@=)&+VS|kq_V1`NwL_qBxnzx*27U4=*V$KlT87Nj7VuY}$1TLU< zNp#YdbS4akyoXv;uq9B89u~>f0v=F!=XQ=v;2cR}jl;_9;;$%XrVhvWifL5h8NpkN zpBuuC6s|vKTXD%qUS7%S`y)HSa^T0>8Q{G>P<{S~^VLD4OXmGY zd)A%NO_kjlw^}Y=xKy#LtNm8rxrwU6!ON?LR&2BG7+H?3XfPlLf_|1im$iCit%^EEFodH(+8;SJA4Jb!`P}cc@Xne>wdOohZYuLK~hq^VFUK>{SjC?b4wipex-2O~HrtfkN zw4CqmnwTGKE8giV%q>|xvczFc?9a_DSv$1-x#H(0R}8OkTIUWfJY{`!WX+P4IYVpL zlOobUWLb>NkSJBzGy?;%ggy2kRgLtp%*ujKyDiND2Hx9;d3KXN4V zNJPuPv5d)y@r~7em;W<8|FUmgBTT98@9uN?3gy1ui>)73_;6R>ozd3T8&|hZ?#NB? zjI3~2ZT(EHb@kBB$MbiNT;5TfIe_Y{?!f~C*5`)TAwAweaHX$)*rtddg5yF&if^AU;SX>R$TG=QFJ6r7_QhjIX1eny8H4# zR#61ry7Bp*;fy=oxBhfwyrQ+Q+1GV0##d3oaAQzdxz&+87!RxWLJE@ze+jwFjva7U0fYVq2x{JF$&Y(igdisW%0F$8;`m_O zDCfuNe(L-I>HaN{?mgAXW7?`};itu!*ofA#GknC`yLxuGcl8Xrb*ppq1}r{m8jl6o z4c`auJnQb3GkJ;c^hd(tjKmx%LA26T47KioeaozN2Agpe@9^th5;c&{0Pnt0G;a2r!7P(On8=kgGz+>?FF4jUzM2 zfJR2-#jrX$zBDIRq0Hgjd0r2#EBE$_wH@zpsV6z=XrL$5vM;JjEN8(dQUGO#9wBv< z;#k4M6ofiI)at~5hXGPoUd;BLd)egX!@^D6aXdYSk0AxbLp+l}^ViHx>=6S56lyfb zM@ytPn*;4Lrg$NQBV7tBP8Sk*NeDp_NhHmysPSvlNT!8U3%4luR=HMbcXWr%!2@nRX=%OP7m;)Ch38HFq0 z?T)SpggFqeM(}}ory(>aifv=UJ83nvqn&UlM$GV*a&U&QkaI( zo8~3K5!yltW}*#1Qmm1HS^^%uz~{w~oJzEf9j@-zG?WS8F^~A%MsZ#Pv6g4V07_2N zJ(#-&$eprTjB$pf&CR?45X~itR5~ovqiDhC-Clu#grwzUp`48BLN&UJx_Wea3}q>0 z=@W@I%@#XFjci8g?eyca_{`ubs7k^wK}e-VX91$Lh54N?q|#--Q-Zs55_bB!v)aAc8} zT=@?0#}^eZC$K6nFimmgq?fFuTA&(JyqAwmla_FHlAVixO@E9yB94|AXQE_cK{bGp zAx+BKB40Ni%=X8}P@ym2sXniEoTo`At zXxv$3mSS6kck1CF*g2kS4+JiHN>nqBP1N)P++hxkB5~lf&>NUd6bsBPmo18xE#Cskks38R999R{yiF$5XBk|79zI@yagCzXIY zSVAGN&PRqq+0i8n5`^?(QBw7w^NUu6G;vEK&0giGSaeNP=h`~<;`oXlF@4csZ-}Hx5!h&Pd1B6AZ3Po7Y~2RJ&2Xs6xCv;RCqfk&5)7E zB`DFzodfeV3S7lhYUy?jkoRUK2_agOcpNWTuwk#Jjh4+pV8YKTCkt!E$QBo_0#c&x zh{8`tgkGc6yd0?s&8md+hyrf5QiZ~iUMHogm|ma-K*Ba_-Xg+$AhXSZlu2C8h0c_jSgI(rPBJ0=xM+rBA~mydkewjG z2}}xt21@*1jSPe~5$l9%K-7a9uxG~dQ191twIS?6myGN{$`ZYdNw9v0JqRRkw zFD%dS9*c^|P?)tLR%)&(rsTk!c#XHiq=gg(y+ZFLmdXTe%()iL(pfuy4+UHV;nD!N zi#(jcUbq$r7`p(=S2Cu_kJsS~?vfU`QSulBaykvi@9Mc<#E}h7LL!iW9>9D5f(TE< zEMn{w5w{X_itwcpiUsa)H4>=q6foX_IJ~64n668`fnB1@*)Oe1XI;VCfgo^166vsV z4$%c$oXy;9%~s)5gPOOPpI2%1rTR3tEa`zB$7T-A>CjNPs!S=L?p0NF>zS?6#7@{VV|dl4PX_Kja0X^OHK2b3jU_KcRin`u=P^9Y7WzJNQ~A}ug_ui zLP?6%&x`S^+1a8Tt{sutOf#fd1jF=i+%D0B-$Pisl*5h+ji1xx6ZIRv*e^P$X4M%x z^Fr|9{D5d%QoLFSabB^7W+BZehOx13DZ}jy;8&Yn9XL-e5Se#qhAnFp%;H0J>cP3? z(Y?GeFuGmLh%43D&a|`+T!fYgWxPz)^BqbP?@bxGm{o z^d$zD+t2d~@eVrC*}D^2a_&iM#j7KuPk% z0d3oG9e<}_D7^QXOIkG9yXxwl{R&1Z^jLyTk2qD8B$ zJHYJZ>l05|t%Y~XgNnI(C&iR4_j_z5J0^m}_|%BJfi>TkJUp4SbK>=sIfI|%TDgC_ zIFS2_b<HqDov2(tQe|B~2DmqQpeptBt?`@Itl@8G`-F_(%UNeHFBm^69lJ2L zG&U=)-gS7p>&}r!H|*ZFV`uh2aBhmNKgW?0IXHg>>_E@OVtLFKWR3aD!v62S%W@Ch zsE=3!J}6mud+LyThxOsfH`W&CPW1C73+`fUjoH0*aPWXNe5C9|F&?uWn46sWZt;%c zQ(vd7?Z5HKqyEiS``q8Bm`9qw>&_kO3g~;Z|G&PNon3v^oqy=maOKhat;K~mfog6l z4w{JnWX<@hj7N*EVn|-?={wXi(fWNKUhJCFTHRdlI#xA$z3TMx2g;Wulqp8GyEkxt z4%`pJ9b@f3bKo)0{WlIj-)?pMmHmk61Ur`V?o2Ad1f9$CO!0rOFe3X~Ej^V1;TsQyT`P7$R=K7LS7Y;EZe7mz~ zNDt1U?`gSd{%@EHed;8T->WZy-HY1?b}!N>IIKVZ8{oZrVWL!g4CF7TSU95TcR>WN z-P5+Ee*nNeb>vJEG$UYrr+*{o_%6R^0m@lM2L4}6anR;GOG7r(dwyT2tL!>_IX`+sgK{@V;yUf%)myb!2o9tT`v z5CtvF$nS(kAi(@SjfHlS@N?!I{PF8s;JNCzX*7T_8K~VApjWtZxC6Jq=+m;}^EK`y zN1rU6I*Y|~bLPka{H~xi%t8rT%R%i(iu)zB)00@U9G?dYK6i$G19Rq8GISIJ&Y;gx zuDDcWD&fWUtMTH-7Ocmb5pzP2r6x^ssnK0%PUSUtXcg&gDCMhvJqJn)+0>-1Qf5l< zjM%JDl89BpV!)g$If!itt!q;x6(&R}$>|oI25;BLZ{~^EE3>4YMj@O*%~3%PLFmiO z`5liv``~e+`yVLSO{KaCBZTixW&yP*DewvnDXkPgec(yKoV3r90IS=a#74{61Wge z(){mYnXsbFGQ&@a5n!YN{J7nqw_&CNd{N*Xz-t2$3ID;103}^uCSWwwOTmX#>_*~8 z&X-$lq%#=9dV{KmX#8|@L7I@o2?h&kUxf*P-h#YLs$q%E<-8$;j8XMYgdyp^P_gnX zXnPLpJG4T!eQA-R+PnOn=>G2?^(tC3<{A(qB}=Hl7LTI9Q$z_h95nUPy~z0MphlVV zSPn87(^SSp8K0 z)wV!$bdcI1Zrp+tFsBTdQ3E@iL;>Ofo{-#(-Nr~#0t%N<4)n4ytvI#oh!i>5{wph% z#OKfzrISz4%DS)e|%dmi?2*x3B z!0US{D20SnJ{*oIFTk#_&uk(#tJ4cmTUvl(v_sM^R5S$WeWDU2wW1w`N%2yg*-&7P zgA7Rjlxdp5#WyP`U6ch26xCJPjB92LMYJ@iY4ExUaQQdAqjywPP*GBU&}xfHvUV~d z>H{L0^b@I|i?WzO98+PeAdmQ+16c^ll<39)V~7#P3;paWVYdmYg~AqUv8|pkn{bqB zu#^GR$=?4PSQ^vQ5rfg#|`?Z(X~0rta0JmP=$bse(@>Tq$~*!9+Ib1Yf1bw&-xt zsuJ;zDzsL*n)NC%OfUZ9uU;q;;KLOr@X20PFE{XB%HAYjM1bZi$g@fl)Wno*qQYsm zFqu#jS_r9v;UU_jsQ20-vknJH z#~ra0$JrIO&cOt%FA5^n4q$YgCq>f4Q0oq=5FMwwBPr2=)goSWbg6r1NJ5PHAeLyX znS9Ze4SXz5Wh9Gg{Nc2gXgy7RH7VB29G0aR0MDD-qZcY_xuKl<40<9h2j_`twdy*` z{)=*tIasKxiIFUHk*s>P7x3O>6)tEZU4I8%LCxCUZ&LTz@eVdxR=zh1z+>EqXcah>dfp1}=lX&g?>ki&2&OskvUW zOOmI^BA--SQI(GMFzH&wc60i`_Mqp6*u20S3;x0k*w}~#C7x4tBd2WnOP=tQJUudO z3wtkr!^m?B^PMlOzLYvKa%$7zthIwjP=4;;5^pc)uiKL4xF0wIKN@*%tt&tEo-HUP zWMp_j*een4NgtD+_n14Zx48J;f}L4wM~1g&eR(&{Rn7grZg9azpa8h}$%`B3@)54< z>&Jd5Iu=?aZyZ3ef9Cm&tiK)-36zzRtyfIV!0oz!ReuXTS>$q^YvpV=8BtEXVJY&N8raRCWoFY zS$l8RpQ~THS6iF%$i2mzs^6YyZwF6xzS-JzD|BLGYl=LomcQL}Og({~bRNw)+Fdc$ ze5Crq#CiW)hDFuH?Trz4XOwLF%Hw-Hc%3gGXYufJJLk?Xd1h?z-Tbxvr&xfV2Zr;v zy+1eta-FQng{$+OJ}Ig=f266WF*vGnm>~D$RED!-#Je59$n z<2q(eqMY-`&W)j_?sF3|?Cihl<2P?szdG>*s7iX7?Z9mVRt8!-?I*09&PT-m#91HU z9;iy{6-XuBoph!h#3w(=O8ytKP3Lb4*|xe~S+oQOK+m*;|I6;s_MRWI!x~saJyB2Fe1Mg1vUiNmBp|K-srbe1gIRQ z0n42`9$5wicWhaTe*r}L?6Dy6pOIO~m*U1W$7ehUOHOXpwx(`cAKZDwuPed3J|5>a zs|3@UAS}^h4zxZip1uiB5n!XC<;VbsEP_xVi4`79aw?<%ek=foGdMROqF$O}c*ZXr zhgA4RlqUL37SjZt+U)KUOG({ZVFqoywwNj2)nar7Rq!dy~ZwBSZ|^Im%)L4+cP@dKf(YmjD?Q zXyAwdV*>P4i5i7qm1tUqU?dh;Y$vqT3FxZJoNNgt>7!I2$zxhw#$AJXE+WxvIm)2~ znDdFIJ{Pgpl_SY&5U@n3hL?~kB7$EU6=_7$KDn)w|7?YO8Rv!HaEpp;R(Njx95(1c-!nBMQ+OiyQtE(=xJb-Fr0L%xHmK@ISk5DV{R)IufsS&ls zr7WE0rGR1bQYOYwg8@aTv;`PXz&N~L8so>#DyJD$J53T?h7qRf#5NIDBdWq~e1`d$ zIz+&nS2(2#bGQ~FQ-v^1!)D~+?C>ss4Rn>Esi27Q8U&pNqT5O4lGY@UMXm0(^4bE-sTUTKC=6HR8ugDgfDRkGf| z@xaTOmqvoAB$L65P4Y@H+#rc_0_-Ox08Jd`;_F3onlW5gZeoK37KY2BcyFz^x{-Bw zVEr^>no)qy?WY96xcco!2WMIg1p1u*7q1b7OY=acLNMM8DxlKCB~^f=!+TSPU{sUD zX=O~EwyJa`jY|baeYKg0HiU2Gkt7+A=pe(%a3iNi)c>nRHNY<caV@rcticEC17LJpb~_)jw7IG@{)@mu7fJVKtvhjFxneKmKSm|%#50$ zE=!lgLPF4dUQk13==zV43(=cmi4UvYJdh;@kMmpk6hKvqG zgV3EwG?9O`eGC_#+$J(Is-mkHuUqIaLqsiw1>x0KtaTRl)@RV8cZ|^S0$6cFlwA8Q5m2*DPYY+4Co7D zZ~B{gMd0AACI`!929Pb!F*nGTB1Vl#(!g@VtAku)CEOIc&L`iuK)M^KEnsNTV78E6 zbCVcql;M1esn8fW4>+T_kmdv7@G-HvF%l(VK?(<}QUJ09%yK4r5Ar__<=U1q{5v8? zwQUWZ38X_?d$?wVaO5uL0%HMh_M;*X=U9!h@HkC^KDhy*I7&s9y+yn~59M zaFrAg>H)Uo1IYl?9JGnSE}n`+jhrbG#;Ze{*P*!UayxU)+?cGQT(mISwVR>&)GKvL zN61`Mg)*MxmL6^Ue=55gs3@*`KRa&h*5 z+U68?B}hmr0oxp#rge6lY&OrPjMya%SqH2jMf;1mGV3}eI}?io-|eY2r+$a zB8#FXVBT*QHMZxyzSB8}Vdn0=ckZ3Ld;h=t`+rYgs4H@@*tPf5|#;oXH@OQgyGwlo;mgBWKH`cs2hduc%$iY}+Kp7Bt#IMtctPVVL^^0}&PRZdbl* zu+#VRQ5T-wofe3xW5k$|BNB@dOY+CpW=m6|Qzi%(Y8ii=P>Nlo ziF2l6v{`Z_UrHjRHu(AUIlG zy|}Y}&5z$m{PAji*VTC$zj}S_H(U1n@~daAR92sU^jiOd&;5yK`O@0@6K5*_5^an= z)q2Q%oR50iMxW>o)Fw&>O8txD(-hZ0VDTWIvoxdakcTvuCCY*p4|&R%7_!|XPJPR@ z&*O~Qtf@!Im&(q-iYuwrrP2x!F%2Unfr=5ny}qvT^qXa8%s<&Na@ro4F@SL0%|C2i zA><8-Lvy}V$hk9X5C;GLpw;)YPx_0m_%44wI{fnYe)Zze=CgY~zw*ZwfgdGWJGXUx zSn@^5hCulc4k|AE=+7@c9-E)JtO}?e%Mhuhdlj z^hn9|Q>JrL;PKI#_QKRJo4l3v*YeuY$r-~vYh7ntjg{p$%7cMr?ZF$F`#t8dk!69; zuD*Qq^B2dq{C3;xV?SHA<_9+-(>?7!Uv#6bwZ1&j{n-akdz6D&iPqO%sg|5ygla#3 z;IcguSb4hoQ2Y^cLJHVN2kZL(XiGE@>#VCx*(^S7x^>oYxiNpF(0n~cj_h;2slDUG zP{LDjrERdZG*EKdcbTsa_^uDyE7v40U;SxMWM&Z&9YN za4ff{@aguYPX#Ye7i(U`cAg_w9y(;Yy%KXirel>RGso$?zyk*7F&k}s3-hXo0 zjrVq!lAY`7y=VV@-*hj(8?l0Ktgr{_Mt%0jk7v5wf92czM%Vx0NpH89xqOkB$-xpk zp0owIlQu>G!&|)ZGcd;1j6uc?M()fsK?e)epa}(Ua`@|Qb@^`vXl;m zB8zsKUD0w`SMF!S0K4ndkBvl_C}6(--m4;260T-gLpn^R2PCOXT&Ms=)+~W#a%ZtX$+jr$Z4u;*YNA>e$k<5UXJ99}<55ab zRSm#Um%{zMRbclxm@;!TvrsQEQ}i;K$r|1PL9lL>UMk6Q_8j#*;$zBaHPjlFk z$0szyW|H;M+5YpT6VMuof-=`YWE!GRM-`w9Xt;@Zia>*Brx4l%G0X9xcI*w``?^~X zyHBv<9U}X@Q)i2Q$nWAn{pm6qczyK5g^RCOf8Hn_5kwb8pa@WuH_|3)iE7B;6sQ*L&4($$I(-Mc!*JT;C|RU6T9>7ru!K&BQyT@FtcWCvi1Dv8 zQ?Q~*u|eBHV25j_2qI`ZCJq{|ZFY}O&Af@at77>(~wRv8vvZheFwg{@4*%$^NiWM1MC9t}6Gy;PI7-EALokY#x z(1xNg(X(NO+oU3&Y;Z7otSbb3X@z3LiDPTOfgc*WK_dE7 zM`wgB5}11=Eo5{lSn6t4#=E#nr;Rh+_?)W2Xi*zPdsq$An$Crx0$3IpIQh8f#5xl^ z{$yg|^op^~%TZK^=){W?DYs9{oHf~GeiN269ireM23E&Ub5tZo+f=^NP)PnY8D%TNuU?Mu$9Wql-6#kYoXBj(0u6B0OgiB?F zNrRyTA$%xmn<=sMYHpW{J<&;?Ec1#AwQzQ5v&HW`%S5k{ z-WlQ9W+j94S`uNRqzO}g6rLG2rU|*UjUiHJ*wy!FxSPY5w)O;J`D%e$d^ks*$z+(7 zrI_*8#RQ=P%dZq&h;3CmdK}S*rQ?p@t1W`C0V)}Z39)oG=SS|}c(Wx3*(E6JQfsx( zy7eWrRA-1f@V=Wm9nH!fwfI;?e(KaTK9IA&;?0I$TW|hXOpk4s={|4aEZ*W4XuODBg|N;xw5#|`9*opJaKA8<9ylvw8;Dt@HI)aN`@{E?}hyWE=@5Kb;tTiZNBpD-X4 zghG)%;jq+LJ>Z-@Goy|1kX2;~u_1kk@me#7dMfT|Fdc|p$8B{%k{9EDlgjjLUs#TXYJo-t_fr__RUEjx8?T4D)^bW0RvSuAR^#Rj%%9Xh= za>V;i2AJ7uyKj5Lqb`woS!?PDtIzf5g+DIU*I?~cOBe|l)--sUwG zCzqZy9?HFL+g>ic0C^%Ga_YP;Y( zb|bYHyzQM%gj&J0ENdMwXx%sleXg(^h4yG@)Ik8LPKgHPF=1zY#X${zE97ko-6$hm854a3}qV7gnN>k)u08SX_20700xDU z5M1sCjk3cIH@r_zC3nODCjhP%#jB-`M~+2y`KNgw-m>#YeB_Q59FPnqfv4=Aao$;$FGwWz-R*q0;og# zbo?-H+jcjcd^nv%P&4Ln7Ptl+r))P+#dK7la1VO~j_JTG3^_@_b_mkOu%D6#;`f#( zNgS#@kDwC9Qb! z!MH(}WDd0@bD(10knPKQZ%4P*K09rB-*gvaCMjfqgNhqoR2E{nKy;K-p9<<-iV%*N zeKEx%NYOOHDoql6dHh@zgn%RpQE3q`*GdbRrsM z)ED`PM4A~h3!`m11q7Qm%`h`q70Z(InJ1QBg{!;hReYKICT`NNGCK# zkyiW=@kq4M9TJaMP4TEC^!AI%cbkIUBrzf~dXmm-7ZZ>{yGtJEjU>|?74*Yez<*4` z^fWkih0YaqR5q8wd6`-*qfEt34)PFvclz_aW*gWJH;3iRjE*5`qGq8Ef{EGqjI*oo3g_S%;9 z{;Aju^&{^U2j7G+FlO2o?ZQup)$uGe=EM((sJL4N9%>IBpbyC0MmzL2no}^O>*%6t z0V@fLY?M;yOMH8_Xkk@a!pclRaC-b!&~prtYN4Ynf?m+j<0QMM8SB89WC7rzpHI>G zj75Fb_bvf|#24Dk>I8{mBr4Qm208>0sl5-pR0S{JARD4Z679xUnVq=MKt+wPA2`4G zTNvwK6oXd)$H9wp<+nD&yM1RBBE`w(uQ&Hb6^Ys@Of=h^9$?p@i+|;qK8xm zF`DqDYf&7Vu|$!Z2?iJFRYEOJZD$t?1`6ntBvV3;&BdtAakBE80yVi&gsG2NDIkPP zQ5YpcM@T0rBDFk|N-xyyC9{bi94pF4=yamrAOSg2S}GM4yhM1kiGQD??Ou^0QCGzAtOc*$v6XQ5kfJ_^)aMTIq=d%iCupz3fCq0uOHYs% zw?uqZ5&_UsfeG~&A4}XgvR8x;2ut)<{$OzPCRS*|23u-4vX4H@wAvgOh4=Bz0diyA)k6HjBlq?gv%T2=3+D7{ ze7Q{8%V;}|fsy&9xQr#YuntT$9mB6mZYMzY$fxuPw1CbHl2)}vbqXr4oGquhOJBui z7VKZ16XX{a=kul-vb*17e5YxMfMFZq}z6ZCgMHSBZEu_ab9*3366t}+dC-)W2iWu0;z@XY9U4>*o4yMB^6*SIy|YIXe@*?VKI zH}JHq&tk6qjmrez zzxH_gXY^&g!;GPA%(;`UUe`;m4?M0u;cYKqSd5(5=K@5r?I41Hm*71|K5KG4>v8v@ zb-!b7=GhQK!-0AG+*|wVg}mzfYZgS>BA%>1cVE`a@l1DjpZn#$_fie8BfWgnEcKrg zf*P#59lzlYMLU8#KplUlN$PFD_JN8JWXbRildND3Z-s9db@E9ydwlJmVUYSS!?h9( zu0g||JpJ!*4KW|Gc7tcs(3)3+c#?+Jv@&}nptVooO11}x5Uyn7C(V^C(M8fe8~i`P z+Sb9e1FS(qTfjxI0cCaLdUX7Hu}g{>6BQCMjV6)WO;864@eUJIja8i1RJ;ggKf0n# zh)X~faaf8%dO$GBe$1INT?EY5!pnLPNl}N7&_y)X{Ip0dq~ke2NQwSeTAnv{FqGM? z1FkVTRd4`+NE8ApVGb842TeH@y;Q}q>VQC}LUpE0Lf9UeRD)@feM4Nl7y16b0}KM? z8U7CZQ((4b55pu3g(p%jzovAC(2Y)z@nEMu3MJaZVLAK_IV#arDop&MMFv#<-JE*O zahwXGOB$Mj(pqbrMbIP^4RH-lP1gEKVUsv8gnq5io>#vCw8!efPC(q_i7kFgQcweC z$)xUE2g$;zI(&TVn6~KHFZ5G%Q|{6v19E{`VD)|$;!=a2V0C4roD*6lW7PTbV1POah(14GZeNuL|?&?iLCZ2qSSlKzh#s~e0z8v z2$VG|Izml@9M8DhZ8**ljQBAz3YpqMcnK8QOoTfIYu2LKK7f;S(?DJCy`TZG@gu36 zymg}u+|6S$o{Qu2KP2O|-b_sX`@0faN)fiHqo|IyHw{PV^jasd@Z*N}|m07~tO~LGs zZ>Npt9MAm^Rcd*@+jWZ<0+lcY#zqlKL_vJw1=Ujl*DTSTCS~NQ)Kt~hY2wn{xDdoF`vQc@l!YA8 zY+wJ@dR>cZ6HQNdPTC8jq3Y0rvywS%NK?(vNgyr32d_Cb;mM$0^tyE&A}5S8b7VrL9>ctX;i%6@3X}W{ZzF>j5H}|Z9xXDXd&$tu#6dclWM-G3gH1^ mlVWS=iJ#(_EuCg@!NXE!ZL#*TURYoWEWth-m+5ZH<=FSWX?>(wR{wz6ChL}gunE3K79)u4MpV&-@xzwV>syLFL@19nMrO!PjzTUXeS286Mn{&Ud zXqe}>C6sdpuPj|!zcL{*|D@ZWH2Mz}RgKJ>S2HE1>a|YBuQ1wTey|uC}z89~!pVR*=NMsq^c9{Kro| zOo(44ny`*5idFwVtlZ?0BZW_1`|!if|CkWBCpH&hF?U8n7AAE0E3fi@prRAQ4#z3i zlnU40d#~{JDKWK)#djJd`oO>K34ieh{mlqP^SVA>sT$T;`zrM!*OGO2@eLAJs7n3JXemN!nvSRKUgLkU#&1X7#J+u}j!%iHkvH`q`X8(4ujvQ> z(dzNPsL|9@;ZJ7%4->+-J#+R6Y@FVs_nkQU@rm)Krc-@b{HpKh#~Gu7V4xD0^y}F1 zeJB3)| z1R}#2M7T7O;`r_WP+L{bK!yIae;<(&PZR*XJl07icmZrzxi=SFsS{E>Tv3d%92K}C zA%Hqd+|90HU1MBm4+>_FiDa?zXEHKKwlQ%KHG_&;K7;Za2l27}^cKCWg}yuIeE!@I`R}Ux^N%G_2-kyur0;&GcGUR)0ZpwW z+L)^O+jfYAUWul1@$b}S1RIKx#mXIEASoGgDBWVc(YnvA(%!n5y#6zrcLK#B&wt9;mStLCX=J7tP zOo&nvMc%ya`gcaKkW8X2OXB#qOGszYPZ|ABJBY9L7yNns|FmM!f3avFL=r4V+-YS9 zjt%7@B3Vb!biTwANhBm_B1vb^-=pJ9EWTO0Nj&tDrWffUfselACBHMbHq}UZk)b+ZnUO?>NDGPZ)es@ro9Uim!sQ9Vp~EdWppGVrR8g1NAriPs z!A%0rK=PJ2YvE`lYc2&v3EU!~CJJ%VyPw`n0D>iorcL$hBpqV0HHvhOsT)T3(YXmr zDn(fRc2G1uL}BwHVv+T46IzCJ3bqxnkReJ+q6o<2eI^1~sCI=2@iIxw_{m8p>5eRFYo8H)wG09Ro#N zL?A-A0!~sCo#SN~LL{)Ll*S8TMqwzzt2@_@EaV<4ivhe08Lg2da^s?g@U6#{@O{5r zo6!3IzVw_r((pH_I+I5x&k(mslo1MDB1h4o6sv>QA>J4l@HGbv@nw(*kvR+>#~m(B zQCpO34qF2c21}U&Ba((foAUo5M0z_|o(P#pO(M?o*n*HK(wQt|s;bWdw2mP{K+{=n zb|fxZ0d_sn&L=?%cjQJu)m8m%2FWlPQ4WMI@}N^Lm05LXr9Y`d4E-&l=~`P62leOa zX{ntoBzT~ORC}lF%?AV=Xat&ql|c%TrT)EEj)=SaEDeyVw8#{;fmauzat#n$#>9Xg ze~5|Ti_sCGJQvo20r+;~L5wG5$YSfYYdtfo)Ha&NeOT_?6!C#+z}5k69j0bLHJUQW|_WsUTJF2Ily&xKUdp)W_8X8<Z=2Z2Ts znq()XB#sIL#YPcvZ+wZ6%Vs<+M`_EhW9d>{R=)J8AejU)CdhC-mWUs z16f#60yH04p$7zm#~%|SO?dhu0k1Jc826BN0pEipD@g<_dJ83K%Pjax`KgIKq#!+^ zeyPq#qAWT_{2k^>MCdMRc)?_WiQ+t4a74TZI9@fu}$ezwI)YYtvg^QAD}s- z+`)SNbXugrrObkS-%Moa%3CC-;wF_tEz!yl*OwRf)^QQO^l!uArsh2`!1Li~td;QU z!$9R*l_C&{mZKcR?`>2XyCRLi(7)ASkU4|y+}Sk@C0nj7r!_qOg~SP`ab&@ulZ!EKDeRkQ|4bdcQn)IzLJ-BX;;<5FVqD0cAAa* z78Mrk|E-zbg$>sE#-86gogI%jvtM4h_M|!sj}_99RfT!`=Q?xt{yzJ+zw2_3wkpo-SKiFNur>k;_eAWMqF>C3uU;R!`p`Qa z-U(&E-lbfy4+oAv1KpjD)nBZ-{qx|18#g24yb5&3Mjt)g51h8ID~(Iw!(rPY;q&}A zcGVlwkzI}M-SpN-Vfv_lLm}NA`{T?jv3Pdp-Z4KalqR69p6^ecP%6r;3*UIaz0l)1 zu8V=jXIw(LkVuyzLG4wsTKnN|8cKL8JdOK_t$zIXKj zRfCc?Yx_5^9geEmKVDevoWHNXaAC(sg~@w@W@B`u zaN#Q%PTS?|iMH0`*W$_xSL3ei6WOZ^_eb`2UYZ1PMKSN3T>Q{hH9Qtk_D9OW<+?BT zy{UD=OTlo%v60(dPGh7xz54vpSMQ46JwB_^7dYI#*S`PA!oIf-rO$baOJC)UytQ}t z$n|*k<`2O;)a6X>7A`Qa`#*KP{px3q z*8{(dU#&co-FxZt*;l&)o$xUA|#W}@J_Xlh~lkvE5i1nBD7d%lsthxj<+;DU_#-tm~YYH}`cmfMb?j3g( zI}IPBF(#HB%ecch$G^ndY^Z^8R|#+CD>KcGA&xNz3#w93pit~oX1krt$KDAxw(B(W z)~s@#M3+-0@x~J%~mP z6*;0ac}K85MIF0P#rq1jOnkpGgn;czpKiJYm1l%#OR%!g-&f@k(JE8fV;CRQlhUFbdD`^^3Z-;i&tW z&b#-So1RjKW7?j_g}T*dbsVUL>P56Oz73rNlf0Vs;=X!j@((tPK=N)s!VgX%oy|~5 zVv4JTcx6UnH$#{n6?z4pu&42yS~T~AK6h5D z7*^$O7^`N*TFI3R8+TNuk{H*_h_hiG!&-G|iXS*KNr#-zCCQEfp2{{!*>Y_vUj+1u zSBu~oS5IrQ*!BA6ryQRjp4SDOr|Nt1Pu;WM+hEWt;)(p?gTJkmp52AsPHQ10W8K$Eiz}x z^Ar4B_#;Tn9a{CICUh|?f}Hg|Hokg6}hAl22#>GCYPJbbSNx)w^fp#>FTjIk^zC8?whBf8_y&vL9*Tc_`&;~Wnz)nZty>uo>$2$c6qKaPsN=#)fxyiYI1`cPVhBD< z63JZ7(z0%L>#IW;R_Qq*rs+Oj#Td z`E#%jRk?)iiYO&h9`YfoRL?m@W69yf$mMrN7X zv?9~w zP=wBHC0^KR$l~Gde2=dE*y;;yE%N7 zM*J+MNLf#Vd`3ic!0u-jqpY2ZlyQ!^lfKD-^EYF zzo~wJs}9F#cpo>IQJ0zxvb8d~K(0(@;|7(%5BMJ$%9sv~HglF28w9?xhiq;0Gb09bN;fmixC-yOl3&c14hu)?7k*Z;BkFv3!~4S(6=_#n zZ8eVJ(J1;TukW2){smi@ z|6XwPt|vCLSKNjNDrc^DE}b~C{$4Q z(=)Ri$a}T?%8AEfs3Ju>dOwEIbT(7!D+>Ckl(29!s4ZkG(u^b-ngR1Gwcs8@!vBR++DbKeeXoyh0mWnzNxS4(u?t$qm;9%S8!Ghv%+k8 zmcO3v_4`bN1wSwD=Uu898Xk+eIP=i+|`#E-G{iceJB8%u|e+Dq5RZZTgr ztrwccS2Ss}QQradLT|^#&yUCD%u$z6k47s6Cl)KS#*F?)0=|Ox;jmh@1k^Z&iX*

    )yXUFMc46z4X+R z-}w(YhND+a2;A3ybViRKsyWW3cD(XQ)~8Lf_@9Rh@&UxKY&h&1Nee&x*x1(Afs3=F z5!qjk*L;$nSWqw;SQ$S(LJkg$&jv;Y9k_>#mi?M?F8b_9*ZC^^vy_P+4hB6jjdcy2 zpLqRb^p;_3t>yWD#!Yq?>?jX9JpBpYbD=e8XnRTzGWzv&&(fKhr+&CSdw17cLu%DK z*x`!tg7$wLk3TlN_1*mEj~$PX`o(YhgM&RkOnx~qo3<-zBK%nNx!Hd-lxKIQPS1Q` z2|t@P&1F@U+^K)VNcdv1O; zdvm1e=-%t2rY(mLc&P?Z!}!a=_>ZT)Gq;wUJjt{cD0gn`!^x^DR}D>EvhpCJ%Du>&kb(!R23&g&8%w zSAfiy4Q}h*3)TyR!jdnAXi7DDeg!}WvYqHFNP`V{xcUL#Pq1NUfn!)KsMu)%utpCyR_uR(hX2V`R~{=} zpMw>k&nK6k>w7FFPE$-Z704gQD>Ep~Pom(aRsu_kE1@6R!fSUT;3W&})j*dw zAdZH)y;NXC*d;Y!U^+WTfryJ2-bMM?NTlAUkKMn>Pl*V~mH9zZ90)L?V5cJ7$YW<| zNpIq#5uN0d$B+$9xfXMij2P}FArTclF}p+pm|2gspT+|e8ib=I5cRSTvuuC3id%u1 z(**Jq+uP6%-f?RfyK-@W9p$V-40k64a|1iP>XsPQy3~ zVOi-S>>m_n7vM`Z9$#j@D8K?*pF)>&eyUpbIE|WRWD*C)$g+e-#5N8uL$N0I{?Z`> zxs#I_U^B;|avE++Bw>fnB>IX9jh=%lXd}IzPxgJdEsiaD)Je-SVZ0s#5nMht{5(ig z0y8%i4s%Mb%nio;98!|Y7r9?F%0oNI0N}y#Q3zo)#DN8hBMml$w_pl?o>N{7W@ zV*L2uiob%7C=5GcE=^)_$j(}+aMs20<}8r+f+jR}80ZeIzi3x+3IS&g$ubl&(4g@N zA&ubM#)D-D4|oodMc&`+_Er48Zo37c-2_PxcNq%1Xkxt zFvtCWe)z~>6h#+)c=u7zMFklizJ~1<8CXXfC07legXT0sRE8o{W|D!G1BA38KuPDr zm0@v|@gX&=EZWJ%B9P0>d(aSNa5~Nh$Du`v{5&P}DP6*gh`LrfgcEQ}yBsS;SMv)Q zpPk4pV-}ha{#02Q%&Qd_Z0oitN&9trX9gwh#xBwloFo#d;K3vZpSTI6GRKmzKGs}bwyg;)`cJroGj5Kv$7rQupu$*aI3Jw)cj$5#$Qo&eArr)6x|d4AqD z3FMeXVQjG?2S-bj7ZMJ)Ib4Q`Q7+W3P%D$II^e=U8GCgT=ik7IY9&!c$^3FdApFgH zu`bFlSEQ+$dgg>2f;O&t!xv@%v}5voTWCx#7~<#>6jS)zq7|Z3&#b{5oJ?F}4+eQw zs07a!CE9SggbU_eTpbUYvq+$-i#0+}8&f3XAhze(|E6AGktW&&`lhfN5}=86n%}4- z!E-B7wua|U0nw{c&=qI$Mo|WZ@=6FQk%h>>gr75_3J8E>SZ-MI`#!?7g4<_CXtoNq ziP9YeRcn-HgjJ*n5)R1M7|Z~SFB$~Hl*K#g4z3!cg4EK>l>p&O5Nl_+BO(^e0_GB9 zLUQ!^IvbkjsS{}PS@a(GwIe=kUZzO zbh8ojLARJ-$r0&0qMU(GArY>lpiB61o;spPZOEYOsf1l+nN}nB0Y?fafYFFO%Qm5U zHldwBPe}*`b7$ZWc%$q-EReKdVw9D5@GY2;g{P+p2q1D&M+#D8)y1+?z%%uj)VRiG z000*f{V)))n~txE;6qs#K^NtU6bO*G!1>4w?G7S=v*JZHOp&|{?ChfhPdrj$#S(AI z+BLfZ(sDzu6SA<}1b8#T<}hT50!Do(1*omm$WtgoFT(W-N-;@*_zLi32xMKDzm&uB z3~zRs6HikQ1L^}Z%`HB^q?DAwMG8M-dma%kug7pa1dyNF zd43Fo+=|uF+scTCfcFN-^ooE#M?*6>t|-()MQ0@?j)1U*V7U}5hp4^3{TGD?NHo?C zniYvi!cEh`X;wHn-OOx6Sz3fcT&#fvZhx{DA$g?(yj{xm;IHZrH*J{#go`6-|HGG;78|~Zw*cn6u{n78$;~{P$0j{A!I^r->XBwHv8n>L$ zekW4hBo#-Ne1qBT1naSe)>9Phi!?~!+Jy|4Ad8t7$Ue0TiRi}L$wRETOSqTS$1Raq zMu=f8Dl7l;L^&IvrT7>CsE4(Q4OQ?P_yzLy0ro@|pK>??nt zt+2C;{Sw&Svbq1yh~-n&zQ@9q70^rUX@bCb(T zUh>X%4BpJ&`=ocnh8_Lc*GE}TYxwxi#ORaW3s24Np5Bu2+= zNntAv2hLpX3$hmy4If;dEU0NcGjcB~zVWlw04a7R%x);KTzb&d(Q{yY$Bxc_O<}cF zZ;og*hi^`QKn?sfnqL|AeE##3!j7t{!DE+ZXND~Q8MrXIjm=IUz4%MYPx*I8rd;_y zPo}ni%~gr7Ij6Q|pZ_6!B7mLk>Uwh|2|f&aUs<_s zU!|RRwfoZ_ET0S|MIL5%g-%5dwO$=Q)U@M5Ugz1ta;)m@!GM*W`$t}jXzqA5e&(nE zzH$4Jfuqwa%9{V2im*jzcEc}P?=2f;-uwDYbLUUtKYnnIk-S`g>4C$Ok36<%F<_@^ z*!N>?vv|9;D_Z}Q6QD&vIRPX{d+)yc7(K^Ly}wWl+q7|Ng*L_A9O{_^j0ZINU{@fn z%RaFm_PNUJKE;VHccHk8;3zk6aJ?F(t>P(e9mDIAlmmSe+iD*ISL?|406nS#Jk zWkE)8R8aa*O0^{9At{ zoQs>HJd4~_%(?V;|Hy}DxcAoZn6o|B)SsTlYnHyb$1 z0j~syitKA~55<6+59lI7L5fx+eG8k6y$tm6)sP+j+r9*z#%Wcav;fUB6@rjcGQrBT zK9aM>sk#mp>P6VYroL)c!MK3x?jDlH2nY}jadhoIkxY=>)uae;*&3##x>gLqZ#}cb z8k*ObfT3_WT;%(_gk+ZQN+v!$j{5NY%VmOO?OluGWpia<-QaPR=&C*8_k4{eqt$f^K6(2r3Ry7AcDSXdOpG zF``omV#={R5X@C1$wZX#k;mBiIn>xl+nRl7a7}8XN9ie zN|q0E0g%-i_uoMAs@VzG0v|5=0>vrgB5;_3sp@U)SA+wEb~_oHQ$te>$DP#zKL&eV zUO}9qkaHl@n5b*y?eenaTC`1AL|_r!G%hdtzwEtxd=q8*H#~`>PxQy`lbKG-G?X?o znTBbaoPEYxdz73~+6v)`pRbw3HOhSAk=?>RT8Uf|u9%PfEQsxl=+y6fHNKiWkCc{y7|@ zugo;=@F{xRA{9?gESUK z6YS!OaIjut)piwJ)`IpP5m1bRs!wZGv>hqgauf{^GB1gXN-hX_`lOY9vN4L057;D@ zFbNbyYtf|uos8EV9R2GuLRqG9YapIFj7t4D2#F3R$|iw~qM@2)Z!^vaW~;~+vPO*6?&q~&;o-PDN!4#DJ5~=Cj*fM6e5;uBzKU8t^y$j3yWg$ zR6dqZNGidG;aY|{$q-pKM6gp@C6d>vCO;d+gRX;Jgs32*p1}p2(IVD?;inNE)EoGG z!l-ERFtoyjg(a$CS`tyJFvwGX6J^#?kto9up;{!0r*-zpg^?N&1`-%|Zd}t&A$pGX zZE@U^OjRp-v^4aysO%2eLN(U}9Z?{dz`=f#C`Oe3EY*1(4RV<#tcG3BvdOqJm!3eC z-&0;L=5S_ll1~Z!YI~>btx@8LR)HTqLeE_swNgGjm(C>|)v8f$uIZ#=)C2yym~8JC zzJYryh|ms;w*U`2T%Ev#nl?9Ndzc1ts<-@ONjudu}~zAhd2wRmRylu zp*WwTCsIqBs-M_Qm7UwnT5%M=lPF9|Tjo?2`H1Z_f1WNlWV?wBEu^C45;>Qq{BqTi z)f|{N7v&G$1effIu#k$;GmogToto`EGzg=8- zFjM&Kq5dC_dF!Y=;q`+(FLYmcleHy3i(P)ArS;ewt;(pFx@+ger~{*Q;oJWDW#Kn( zjI5hK^U^b(jDq6a^RqrYFgh)`#q#=H2iA}OuI1T*F7tfXy6)Xk-vk}Wx>&O%y0Ex& zpn~o@doIbaZR75WBm3V>|a`k*W^YVy_CNGr`+|#L{BCE?tzh?vAp;DF?BY(;5>8J zw%w!qqw>gsji+y)7yM3Wt9S6NiIe;J?N?qu_his})lL40$3HxEWyi(B6Su#-+?Kgu z)V!~ycW7hr@`cN9|9-RcFgCESwb<0VZ0O*U756W#Zt*<0^}J<8pa1+_YnYkz@VZ%* z>j#rD&ue!NJsOth{JUk{=C$WWYum^P8#8AQ-S>6nH{bf-j(8~QQql6_pU`U-pW#C=15|7e}^ch6c+zo$3i*u}+r zFGS5s%}nj(&zG;h^4FnV<+0w_U-A?Xri;A9nxA>Q@9^c9GFqO#nDXU&Wl7Q45S)Osjh`GoAgbR`p58o*F1f&MUl9yCyT`eC#J5q%FAESy%bo zrLD0o6+^=(R@!=S5FAJkaCbm#?Kjk&fRX?;+Wo8vG@_N;!OP^h27LqSPDerard6K- zL~f*GdO^fatiStN@I{5LU42l#nr!*|+Yj3w4?m2DT$EOQ&{Q#I*o;{#*Qr274&dy7 z{Xv4ys^r`K$pP~Nd{)=Zj|eb7P6X&P0rO+f55i{wBF+B(?(p&Z1D1q$CfFa|h)+ii z0m=?+u5oX$%U-Gv=sE-CtGmdN@&IQ?nLhuMI51m&37i%O2FS)(f81&?CgOs@YynUm zh)Dy{M;Rmfob^)0I|n<8GOdFJ;#C6#Bn?VHOuF})1+uS_zlfhY@NUTE&;F9X3A{*P zSi~ke)x~9&qOyqcUM!I{w6U#3ZS(Aom!8XHcZ;pcDzTaLwkmU#9WG^;64}dx2?8rc zl{`7X?%+IIm6sYa!EBkuva`j|0flzBmhijE_*jLH*xw1sbg}eFreaU_sibOv#8uSN z6?ji78u8{3h1~`V?we>S*;*t@ zf*QjpLv9Z#i&746$C)}X4B~mC)+uI_lTI{_?G!qj*qg_np~;;pyKXk(K414 zij+BAWD%cE#><{g$$e9~2B0;{db%`Mv7-;DY|q`S#;OCIAQKv+AQPlm-Y(OGj%ko7 zfca0HzWF2m155-&!iU14!}3I5O^Q5Coi|yCtr0c|!AVNQb3P$l+L2?B!@5=O)OU)w zsW~V{NlazeGDYP=X=2&tg={6}Y$eCtFIoLkDcR%Ia#nRoLy+Ga%OxM@2=$AmI&o7l zqLOjK`Qfk6sI)=X5QIu@lmT@*MUch|AY5CjLmE2mOm+&l37?~I^g)WalbR#ql{{J| z+*D^r-&b@HJ%;CG=@kZj3CA30R1zu5&r}9|%tYg5PF*D-dTXf+?hx(Ko@Ccxt_n%W z5Q85*+$?8eMTNEA^!Ld$fm@`+Q5_6}?{Fryy}w3COxdXXE%+6~QS3#|+lw_QIjL)u zHdWSH>)4RB9&`Es73yKiScPF?N zn-efU*k%{ZEd=4XFpU=!gmc%7ccZR)Y(3!?wT%0287akO9lcQ2slrMrF$LtRG-(Mi zt0j?-yXhnx!BqJ~~{~RO(1Y z?K*w7h?odlLh|V42!sY{4)6wJQ6vi9TDPF?FGB#kqk^&ks>TwpG~H~3Rd^X7UaCXm zxfOAvGzCD&NLA}W!E8Y#A!+c|v>Nc2iLAaB3~6?jI8ihT8YQEMQIT|2R`s1iy;8G7 z+h|dmr3#IsiDA^J!@R$)o;-t*?ILN!waK}P9(-)KA#U9r_eTrEo~JoiE5fIRZ}m}^^%aL1JQ14kRK28;YVgM`C>aR z>1j;cphmR{N&HC(9|trRyNKFZ1trBQzKW0gG_y2|K|GjWuxcWOgcQ2~V;+I{hV4N{ z)Ys@NFL0{DK?${SB&;uigPg%-BfEqVR|rm2&?nMd10_iaQ~}EKvCB7OCAbE$W3m>} zD+v#QiHXtv+F^CyOcngMW8!3d{cK8o&tu+hG28kzZ zxLa$YR2l3Ii`ELj1iQ{;1GsOLj%7i090}noU>z!+2KNk7#n^FGYv;A?PrVv;iYMe8 z!oC|nVg_Z7BTRxaF=PU5EMoE<>eL?2zjKm<4OSHy-9V)@gfi(^xNSDbLWbpvCVXv@ z;;rLVqlQ;9DO||5av7|{B{)I!x=@)UPg2A~qNc#J#rpOX0wlcm2nnpG8cVA^Jb{bu z0AKd@Gd8RDVn{)Yw1rMdlaDdVcPup|8Uzq~6_>El+G)7*1n6B@nzD^r=IJ}v3&hmBaTB(MMjT0urJ4l= zZ}BMSS%z5k9$`8&RC!-U7q%x#QIjE=_IB`~G}uVzGE(@~&+Sm)CvOa^y8n>>mEDqi1&<>*{}e z_rU(F_nLc|(azYojG-6T_Ib|7Zp|!wvvpug|2oqp>o=2Tx19Yn_{hg4%n-Y?OC8)Y z(zW2x52Tv;fwb19j2RXIFx+1Uzn%-& zmzKFhpvDZFf>Z_Q5&KFoisAMep#m4^Ud4dQ$(*3* z5YKT4-XN)oWU@l33q(AX#tKr#cjhZ6MZU8lpEru8bUXIlAbUvl%MeTk% zYeLJC|HUyxswPNN#dGmZCbiaU(aqryfNz)fGPx=amWKPLidzll4hiRi$2rAbQCqRf zu(Q)m0>G@y#&7^%&|6SrP^!-E!z&11sskm`u`*g=xc$N%a(j~*&7flTmHy31b9Cwf zdX{y(&yYh^2RwTDxW;^JmOzv-N#RsF zGa;&cI=B6_+V2or$eOf-*+J$Z+HbC_*x9B^*tZ16 zgtindRVFN>8%fB>jUok4p?Xv@X5(eTZHy49f`f+O%OZQnIw|RJ6%OCf{-~ zL(Y}lx{bAie|Vq6nuGP)^+G#uSNLASNAk&P35({t{Gw!BizlVIw-yzIzj3eOAd%(&Y^HGw5pOD+raBOo-97;ssl zD3CoT)f^laY~2>h(Mz)m2HIxA6x9dKL%1<^E0dxePq_Z%Gc{D>dYScr_ z^jE7G%BWNFB^Fm}EDelDZ4^Kwk8Dox0PBIqYEl-+cGRQwawvugdQF^!b% z$T%t2t%b4$V!B3By9Gig^J16tj}&GOas(})LS@oXgS+AkRH84w5K#f2MYpF$a(E#X zOF7!)0a7+`B{aZ!A{j#B0sRw$ZQ`SPXpNaHVQTOlwnn{-?`L>6xrSv}CQ88h?+R}} zO>j952z<;4u5b(@8p*S0nQX5y3qBsHIE4YL0|{P50f)X`s-&7#w-|!u0^CO}x2ioH zH*QNge@jX#trN^Qxj7x(OX^vb9=$MAPsx~u1Fxbso~D(k28ssZUu|klwSvL3z=Soh z)JfoUXuJ}ZMY5t&suheH9EYWu1UZQ{fnQ4`6_t5_VC8THDcVRowo$R-92uDRCPfSC z*RbSIl3ux*)&~bq>L5&1HBH+YTANnQszzrcj=MFHtR_lJLDSe3xycf#&22yqIT(}@ z<3KhbgO==C+S**iC07F>@xwx;oPr2EsSq($Dgy{tp~;P-Zj?Nk-H1~($*2rs)g-N_ zWzM3dNpGNQFd}2jVeS65Z^LjI<-svwq$#R^4z&S=pLP?n7L0`nSP~8#zC!3&d{lLz zLB81y&oNrYX^BZijbKLTX$ZHYt{WKVZc1iCRV|N!>;skB06w95n$D+jqsEG|(A{uK zk4D`B8VvPxs*eP%m{I{)V*WbB}(3RIyv^Xs#-(lZ-Xa$L=G>(-VY=*%e$im3oA# z4WgpypjKsoX6d+KoLZ8Nsjyc?BBO`>P`9^cw0o!@(JWy6u?{?w!{|EE6>cw_qxy!LE= zFab~-&z0DNAMdREb!hqQt`9F4iQdsK9$DX58QbRjb;IeN$2~QTnZ9qtJ7(NF!Z0o0 zoejpHtQ99M$}1c?{ds2I#Rn4?_n&=t_S+|(+;*hpweIN4OW4_kvt3KhX7j%eXO2Jn z>e&-*{h_3xpPoEEVf^IrK{INXZjLi;zfigFnJq2d-!HxpvG|#&2@5AAwrn46PWmRN zrSD3ZVPoz+!_#MUeLraZB-45B(Y>^g=9Y%xgQ;EJZ*Lmn4V6tp>>~iWE+PAV=s!23n0vEzFuNu_1Insg z{&-(p=}?+bHhRzTmW?MYJ=WeA219aRmN&`imcG4r?D$jRGb^?Y^xq%)M$<$d#M0>G zzdkf`-pE7dbiCMskNj%cw&T)=Pql1+sOYPMuM0bJ9vLZ|l=;|W$!~0V)ZxQpC!2Op zZVl?+Zcg8_^lejrMaIY9^c`F`{fbbqf}5~tLP=%W@Qa4WzpMQI>^F6jBJbzdH?{10 z?YqJ3+P;SKP324XM9+;Y9*u*CcR2SOUg`xhLr2^d_L_cXa$8(r7wnYBgpPX&Fct3a*xpUd2+shCu{#62|A2KeAD~qf#DoFo zhj(;!nq{r6Np5k}__s^%hId|c%uFHx>e~p8GM+ z($7^u2ulTQ1AxARB=P|5pBV~s{F$Ii2406PyNWRoQVxWJ37k3dTtJiz)Qy`?K_Ho4 zP&iiOu1g}HUE+@m9fA$^ddB6cTnjVOG`Er&XbJ*F!#N3>Be#3IWz+OdAC;EMa+zh9EA1FF9N`3~(Z-A>)N&!H0F_rf&9DtImpMvLKdx zs3Q>M)=Hf4a+85I-krBeU4_SN@YP`vyHEHuDH|W5oa)_8jmcw!{@roIfLlupI zE#&HB1+1RN@@WBn9${v~qd2Vxzkj(wt|h%J(}8UxC%+_wa(qLr(}AWQW3Z$)IlPc? zv~I4&*)(*v4`(N((AKC#JVP-zHZ3az2TpYuN%?I_B4#H_O@}6Y%Wtp5DXULr|idN zU4+Onw^s3$rJZyYD>HT69IHZdPFO9h(AhQMGw`_h?e8n~#7aSH!Ez*;f|--XjeTXB zK_qd(*%(7i5~>|Xtlfe^E=+P@13|&os6zgvSQzEqgZENz5llkv{zVlfnd}Ejv|$dB zG9VL^l!FG{fu82OByUam_;6DPep1QalA?{VS{q9pMafZnCZ3{6DJQHv+d4;a9%n#m zwo-5mJ=zOS9Z*nGHCBQrdPS;%Nv2Rcg_aT^x?m)Iw4GPA&A6;*6F9DrGy8o=J4ie0 ztS$v2i9m~>28K|yl1i&U4L_7Hb!w+k!3h>k$Mc!ZIShf6>c}XV`s+crAfC2s%}FV^ zYS+1^@vttg<7o#PE#_0mQ-aLGsvqxcu8z`*5@2dbl6Un?i{orkR~+H3^?JJ(t3jB^J;#xhA=w zG=Vf~ws$@q_Aomj;O!aKZl6Z<)TVicSU{$!AOU8p5Kpp$)Ad7-jD3R@~u}M6nXfSAw z9ofnnDXoGMF}4-ci5yF^{41gckyY|8)`l~_(i+^O$zaw4z9w5brPo3LlNT3!QeGaz zV4WltT;7wQ-o&WM)v4S*SSc6V_lg%TDTNlIdh%r}6 zrXb*h(WlyNk{u1rWpM*MD=0FDl+r*5U^{2gq@P~U)tJ1{kHwITKT_lQLp_8mQZk!z zSg4>l9Tw_h3Rkw~2ty7ePf65jGk5GVvRsisK0N5$I8e)kvY*BBCOP=GNJ|?fmMS5+ZbzM3+D%|Oh9T==!p#@*?TVp@+rWENw6xkg zV+-?v*$BiZE#_AcN`Hh`4wFjt68E^GcrKrz_$f4MdP2>v=ZqLr&FGuR6d&nOO~(~Y z#o-RJP~+1p2{j{SL_7Dl+<$Z3Ynr!XUY2rS@tuEf*5VM5Q+7JS{j+92na*dLirSt zUa4wW3UP}!xtH*&n{5OgXp1PR2PridVTd^t??nM4MdNc+3=d0U(GXe9EC-vEZ? zNjmnwLNtJ$l4@wZKky&J3iX2MwQd}1;6)^!q9Q3pXRoG<_R|WjW3YT! zkT3$n5<$eMfxCT(qK0CeE*_)spe0;LURx<<)?A<~Z{$0xd`i5eAL# z&Y_@-WA4O&{~}6Ps%RNNOaYXweM@y{4xi>{B7-|AjylASa;5sC3twc+7NJlHGClM{ zlEc$RC&}fj)Q(2^6*Uqj{ngZjq|#F=#wO78CVHnYb)p#2>EabRv@M~Qqm+7SQjjUA z)kzaXGs$+bK0}6OmRe7y{ou0g`sxUYP6{nuC0AFxz#p;7K2`!AjAJ1kbUP(slt`qx zvSWCwqP#9A`;sE85aTnI>JbZ^%Z4Z-_$Vj#WQnICXe(ZpfTz4g9A#<}(;u0gl*t}Z z)+o7Uje;qgub0n|`vgNGJ-51oeX=I;d5{PGc;CD@qHXpufWF?@&qgfWKFgXO5-~7* zc}mylk?tWptjl(y?nuYQy6`UB*?Xg|beu0PkKHoqo%b5PDE_8!*#Eb_E$>V(bj_~I z3;8AJyQ3oq?giQ2oj+}ioT$V_^*2p^wq<7W$a105(qFgX4(b`Ea@pxUmljp`1@S%X zxd#sPJ^5YEcWe8Pr)F0CD10Ye+!~(w;0PYaLjK0BS;Hzc~Y?YUz4bMiT->-(Sb zV){F_7c)a|t(ciI*bua+KfNN8d%KYuNbbnwE~s}#l5uZE=jS% zKT+d~2M#_oYsR5(hq27Q;MUB$UJCxR;SK&u=|D(p-mm?1NU>ue==Bq)hR#OxjUNoV z^j>nw;^AdcA76SeePCwpiPlTgADAB#Azj+=?U{<0P12@;zk(qBD& zZsFg%o*d~sJ#*hfF~dwl%xg2b^KXQlcz1a3OY6!m{te%@2kQ5)A6$68W%=MQ&n~T5 zx_#!dv%eg>QhsS_)WP%jxPUL>>RrCKg**T5ysp^(i*FT|UEF%4a_6~R!_xOAfA;>R z@flA}X(8^~Fy)JfODx0D)^)oFo4`lWU@9*7e#!8Zk5+{C%|AQWx-I7+*STfI+W--; zWZi<{19ulE?9CdgKJwn)!IF+Yf4eU0!i!-`w=UhD$^Detf4aJB^Jv?`yyTIT7;`@p zd0!KVkG+|F;?7Iio;RXELCy0<+~$kxcCP#E!YMJKmc=7`vb%PUW~(icpnF`oY{Yh;I1K&o-i-h);DUI{g2H6^8LpkJ^Z@FL*hWa4xnf6I0HINYRj18c>2Jf{)`ce6ZcsyCh56wdHmx)_=PMg@GI9 z$2O0IR5ve`t`bBt*?tjD=mv)e(57RzID3!W{5@-u|zrrucoSi zB~!bnU0^OhEp67kJ+)?JetL@=(>qA0FvFm60>HBwWhrwhC^nr zS4pNG=R!KI;j+HENKbY@VW2hHiDX9e-1XVYeKZ6i<I##~&8Mb8=OCh~Fs9nt@e$i198UQZ?{?w+J~B@E z!T+Yzp*qevSW^+dNuWb^QZGC@@i1A-)O|*c`ls(F=@*DMto)UjaSbA@xpZdntg|Tf zBn#ZqAT(72z8+R401ML2aV({0_y#3}LwQ71Qi{sTHFp*&tfKehxY;n&A>)iuPE3ur z*-^yN@uZ1+K?O?}i6nHJQKN>0StB5RbgV-|ArkX9hH+~E#}=tUVpuoTDxg53)!!PH zs2~t6Q@aUfH?%{eobhHL z1J5!+t*QuF6Qx~geWa~G6@*FBmLi7SvIWP&7H|#-7uiFB(+ww^Q#UY7rHVF*6FVw* z*uJhJg24^In=}(Zp9}CWNfQYXCQPDYtP}I2+(CrSoXfxjeiNamaZDYhLj^y1h$hrq zf6zpN9#nn|g821Cn?$n=0=J$WQs3|`2;$b@vLF|bgk7W82oMKDoy2!aNEMhW`5K&c?wtEMWOLzn#PMta%r6*NYsKZ7zh&^{Tx!uBO7^A*6RpKil`U|oSgtCT5_JaujDLd-c;ckWHnn)R! zK@u3L2ROcmh1lkvB$ATDCA>6=Gyr_1Gz~;vNwS9Y>O?3A%!5SQ) z$ONWsvOj3@8U`(tfPbawie4MrOY9#*xJ%qb3v?mVF5o)#lPqApLx9e5u%Yv z=S}w}nbxrTi%XL+upy7;q8?!&jAQUk7$eW?P34yG<*9`}19xjIX!ac@Zxub91VA&6 zWgv2lpo??f8m^Lyk{MSPuR8gDQAQ^6o!%b4x1opMC!XXLl_=oB-8$|}!zw+6LZp?O z3+iT-QQqe2h05Ou7zY)2BIplbsWQfqG==$8)m`JoqwsMan=nyyCvp%a9auE+G6MW2 zLGpwsN{LWJz#|A&=9N1?!oWjVMLQEA%quJ)Ni>QXiE0^pB`kqP3-5->-a|;phaHR>q6= zUb<7HtAc5J0!v6@nZ_ebR+|)~$oBGL5g(>A6Zl%2u$$KrCPu`Hn2H7}UsdNhi=6t0 zDYUGBC+xhW6PY*s_ zm`4NVa}r0oHCC(|vunbLf^0ki+$IKe=G^}!Ay!P2s>4KM4Gu08SWtnKCQ1y^0KCgw zUVz!P`9vx%$W7BY`y&|5_{bm)4l6Q74P}>b!H2Oa8f$_;wr4xgcmqiL=a5usvvmWB zg~%PTHA+wl>++qUy!BXA!{#uQP^;MVEV=1WV@a8K>VS*Q=g*i9nv}ZK@Wk*{>PGA( z%AnLJPvx?QsBq;gOuPph@7N@n6M1`cYRWi~x>6zbr{LH`Ty&OjHNt#mwT)j|qi)z7 z&Es*|Z-*QqY)Y7)a&)fBd#*&vZO9XY0e)8zl zu#w7 z&mbq_k!vZJ;-xwcgmaIVZS2@y%SSiO79IYqQooJMiTB5X;EMLQ+Pzp@WtDId1syUD1IvY zd|1?dVzei2{z&eFK>D8Y$qZ)(_cu0A*{W0~_Ag0~d*pSY4xjnZ@QVw7`S!8nam?vQ zF5gSdSK?xRUVT1n!G$04-v6bbC*hq9mxD($siR55mit;9(+^tv7u?m7H}X|MX4@}& zhl|dhs2xc^(DGV;@64{(2Ev=Wd>4zhZj0Q5*SON-Uj5p3nAJ?oeJ^oH zE%S#?glBTEChlqN|8o9EQHBfiFJyk6D6)BbFPNWs`N_(~gLl^EJ$Ejp`lHZF$2Vo? zBR{YF^YGuvXKm|%m@xchCxl4aPyy4@P z6=y$tB=0Z7Makop=r@Z`b@M|h2VOc|{MyLTpRUXwO5s{+M-D!GW#qAxW~Q&NC#qj% zeQ|#o2`=diOB?%&VvOs-c$u8R+FI@4h`Tk1p^IdJ1 z=NHXCRyps;(*tEMMw}Y`OGnGR!LNPK)I|h;MXveb;!BSfThA{Ho3u1;>A(k#>%Lnx zc%|`yUw+Dy1{S8rPU@>3T;IIzr_q8BD*yUw*U^{G9e#g(!h4?#-C-?$?n+O19N%w? zTo-vIGJIy&#nve&%C1CEC*}=NF&7?P_te0Q`zyaYw>GwK<3&UEC-}Sp+d$UDdu}g# zFJVXwdg8o8d}qP>k`ucI%4Qa?e;7bz^rl82D}4X=xC=u`!zYv@PmD0>mG_)I@krh; zmlr(!Ufm_HW1IJ4R^7I`^FJqVOC9{+hvIKXTWfbsEoLvr?w@(#(u)x-e>tDW-naOJ zW0m&|K2x-=>B@uOY-_vp1^3>|7Y~22ZSUE~KYMT1$oz+kSNu@eZ)27w^sN}CHnp6% zH2wCxC$_}o%^QmPC6BnAwKA74AtA5jmNDbUl|JT=`7N|-Gx1xN z$G<|h;*uU3^J?j}o= zPd&hK29u_6zO+jS?oG`tjXiq160!dPSTrg9Y+G{mp5I8Sy$luE{9h(GwcSfSD>ZYV5a^iu({Wt<^w<`l)ynLE)GrMJtva$xEY2V~tO9Kf3 zfw+oxm_u`JjT4pK8rrRK!?YQJDfXGK*Xj2J5s$15B69hun)P*QQ>A=Sb$r^4Z)d^S z79GlAUbneMVabD8GFKFWh5^07+RRGq1mywzg*q!4l|&eBOKV8!0*j1rw)(Oo527+B zn0gqEb6m8_DUP4_B)-Mq3@){^4vy1J;K6r+kE0MJDj7$)QcAZV1&oap6u~7dS!XZW z!#c!2l6Ev)$yR{-ONo}c`$1$cxv>MWlH=U$@QP_G@dD*e6ggDTC<`1)2 zLXn+yGG4B6Yd27EyGSesBf`j20G_4|MVzmNAM{4X08qf0*60fFp{V~|G{=b5gHC712QI%>>0kI6wD>xY?B|#Vt;88@g97iJ)Q>5{V zkw?!Q!8;dd5O*QZa)C*G;4l~|HMqKfLlu=ZDK1q0}ba z-Y8T0Y$jF#+e`=}bVigr$rcDuN}U-BV?4-72#1_xIn;?(sU0g6{*W?tCeqG81JEkC z=D-cuA)7P^?>;Kvr~skZQ5JD`DscCl9Yn%_UgJhpH(U)IK(POAv0m{}9LotvJf}cd zBAuX`PbyPJ0gO zg`vk%aqV0@T+PTP(U6QzgPOWp5&^CUIgj-wsLafV{unq3uEc^kKGYvX_Y{$QaKs@< zCbXCks8KPHT1H^V*wK1;uAqpl_nYR93qm2UcpQ3d0q52t!BER~S%h51F6D!ZGzad+ z4K)|YMhV^ z3ba66)VZ1(80c;obAjQ7oK%KHaXozX^pvN9b@1#!;_;I#B*2w!UV}gw=CE3bW2%}o z5MlzFCeRPYEA8+=aVK3%h?>zrIuQEysM0lp6d#SR3n z`P%~$f}CugaSV!yAXaz)2a3a{zy-qycqYL$H{o!LkbyEbGRB_0C)w)>Imi@55g`w@ zKm8qIBiuc51|KViy979OP!6bnI1IN8RSaHmsH#~!)C&?(dz6Gqg+}>D^1#z8#dGy& z+yWGyV{lK`E?)yW7*Mn2^Iyy996NO4=zj%T4zSmOnt^)=6setC$#n*b zRKOYnh@xv>Ko`3jHbhoUfr8otsmBgN0~*y){KWPHoCNI#m&#`Y^+d+PvoQ?TBB8oA z;epmO!%sxu$XKEq2LK%c^^*7FAFj7wpaTHVG|*W8;|ruiuOA<4^{XA=`k{Y%kIlKU zJC@(otZy9q%?G#bM$&)Zp>ACNKSd3+(tm38KYjH#L+Q64|1+%q^RT+!AO7=P4a`yg z^K12gn5q5ehxPhk`OkFaKa;@!yP4JXp7Y<{AMo5bG&WE9-N{P(3y%MFJ?YpW{oRp@ zY)ie7(imu{vCZ{!|LOhd>1(d}pr^Z)aL)?g`x3;pO1OB(h3nPfZomTdL>k7drt3$4`+nxV8;P&wdF=wfO?3Tp`+Kkc@9Uqh z=6US`*AM>F`<1tEB>w+sp#xpK9{b&nzHIWB*KgQO1#0-}_WH4ZdOtJuMq0!GMlZDB z*!G_iUE67&`sxjP7XaRH^y>D1N{bZ#Bkk3q{=Z#da;(5(+yAk^eV_f~hkUFP8-Kqm z|2*Zs>v_1Pu^JxRUO)Cv?`Q76kru(n#>my}KP9@h(|-S_Hwr=i-xPSP&G6st5s&`q zvFn!ucocjDCd%~#|MGt3^BYN#u?&sB-yc5z^u_~qEW@jL|4W8fch`M=Bk8~GlRGEC zV$0RnzwJ8D&%U1YT4((IF4_JTcO&i9PX7B9_Hpiwr2pp5+9x}-*VA6Ds^8Cb=0B2N zT`KzhMTosq8n5Sib(!$@r{HJ){Ewvn=ii|ABPLkUy7n6DEWg`h;$m*3y!I^p{k5&y ztm}FH+YWvv9WZ;>UiD+Y0av%zkNx(&J@VDtZtP$EarwPYi$pB>M{xs*e!pVdCvU#d zUjKe2PT#@tL4KY=R4TpP+(tLjf(7?4w8#R(0QyXuA#aUpQ1xw$j@IXZr#8(m@bv-+ zN}+0nsV8IudjW&uP zc%~wW$9ZNeAhBwi;u#06O<}+jhSsNnjECxm$WeMiK;0;x%%D79K{N|+t2 zClOSnHu4n9PL~Cvc8QHkzDvjp@pD8f!}M62$jCyLs(4YA)7T`&%-{k+ps6VGA^PDs zq)IXBIK4{{lWPT@Z&xdoL{)*fJe@;9e^|+B^_bSm-o~vA2&?4?SgMvIMBv2qu$a~e zDudw4v!gJ=c(v25t6+7YISt<2rhsoihIR0WZ*L(ItO|ox$!=}rEl8SdqujubQFbaK zV@-l+MTmoCX)P!40%v4UfJ(~X#aZT+bXQf^&jl1o614laXJaG%_wCNYL7~ z(JC^D6`(StY(aoauavb$00pG!SUvbM#57c_S43V7c$mRw2lozZ*dj<&pIn>Z0Ptu6 zbPqvLD`YLm3$x>S5!`A@b8?kzWm%n`U}#)m&@|M|z*9{|%E4P@S3uBQQBX;(7d)!& zy*0Xx9GQ<9C0-#2T#Fn2IDrQhI0WQ6IF0_e)Gc6?8B>l=l^dg+noyd^l03V!ZYeJ< zQn3jxyT(jQHA*t4p-Z)dxv@qs3N>>YZW|Lbx6b#aSesx65(^A!8QG#T&JPT>x=C zPa`L#gXTer(#o9zZlwjIvZa-rdK_m?VM-_G`H*9YcARyPz!9}*Xd`aYrjfX+v;tUk zf-yu;2$|@nfw`yMfm(Ddj61m=DjC%`$@SKH6_jeA*`Q0b3kWoT9Xc%{s62Q^ByZA} zk+s~N+Asln{A|CRDKs}&J00|Vb~cs4-HT$2}~A{K!Xw~ z=XYG9X{%3JN$>Ne?cw=qK`(qO`f50cc?Kcs8o{}1ZelqfxE}QiYGfG}Rh@o81)7?o z<3%9hBC?U`Rdnj3i5rPo(6^by6d%Y%HrhFct`Icz@hBc|O5>2iX*$k0E?#k><+^fa=!xU;E|BaeQe_6TJ0>g9Opd)!AcS~VSWzM6 zu7yFb1u^(WrxFmpQ2BNR+`8j9kOJa(MBwwG*9M*k8#)g$fBG_Tr)XL&4Z)!yyl%xB znZO#$O@1oA%&c9&hWhb(KY05Z1sL;4ynv*Fi?|(}-;PA^yurvq0TF;mspQ2k9|YH~ zR;;3|Ad2s{DJcMirpf#q#Celoi_#edoT*h<#Axmm5Y>sM0kjzkBtk>WP$0QoP?4%M zRaEtzGvEK3xA9mghI42mQ%U`ooaB*<048d@ZO2VpHC2+SIz%=C_U06sNT~FzU^k<3 zg`~sT2=SklG($CD*lXEb72+1Vx5#EXL9Fo0NXV)GhpV>_i=yn`|997|@7mq{`!LrI z%j^m)GdnD^uz5oTqNGQ;dL;PSADhTfKfR8$l~R#ujP zsAzf{NJe#=g4T^`*)E`nsK1Nu&+q&Fe19GX^9Rgu9J0GJ*Ll6q^L+jA2=_K3C_g9p zd?6(YQ8*NduKb{fnANm{$m1bP%j!uxft%b@567b_24mojO~#cq(XtYS%vx8h4C=}_|6h~y z;-D!=3A~fQ=`$Jx@47Oak}XC{Sfz)R!|&OkgCG9V>7YbeEdT52DM1^|#$yqh%@$Y? zBy@>kx?}~ts}na9YpG}jO53|5Lp3n#AkqhX#5Z+Rc}gdWRkP3wF+x!$N9rJZ3Mr8@ zB+OH!C^9?C6?BP}Wa&80Q@}^jELV0FH@Ym(O>qdw6nwg)-4nvol1Xk5I0Z~Sk`1_+ zBFF7y852rupiL6|AHk$+I%8JAu2Lnrn$-Y`QA$?6nq(s|v>O~#RXdCQf$MPA42{O{ zp(8^GEET#*Ff=JgknN{E%2bLkpf$=w7E#g>y*dS+l*MDv;h(4^gH(i!CZ=-{NWK_B zUJ>UlG%LfXER7=E7UUvJ>D9EP6YHeM<%{uB#?0L?)l$1Wv{hQMFvpg*fe%u$)2V)V z1Ha?eF=U4hqE6(@EagFxS4GigTm;gL#&S2Cr#Q z^E3WlkmUfD6e2tl<-$X$py7{%RB7!?@Q8#5aPjfY6DR%FZYX+g zblkKZXE^mBvXq-)rMaMiPOG`vs2;Hsh+((71}6S)Xj zv8t456vdE5Dl6U$RPEG$kaifzF}$4jAJdVEayC`&xWaV6j1*q)L%XBv@Cq@DrOBXl zHj=?pTtYj#3Q`i#{)J3Q4-BW{mnp%<72~Ri{9{;910rH&_4Iy9O@WC4??2q!LY znN73@???W`kVv_P>&8mqB?8u&s8lPYP)u&+c@qWwR!Ize$~2*n*=W`dWL!Zd`lqNC z(8n2hhK2GQc$x;m^4UD-E@9AcBvDyRKwKqlBUYPPT@H~JKw;lo5Hl#qqj4=zZfUdN zJc1phebFh8lklEpX1ZZQK5=a?ZrFig#ofX02~J#=*oQORh9nen8(w%*Z3>g*#kJHT zsw0yK0s$6V1s6iHRpw%dB`l^i&nkn;@g;nXxd$eGy>iEIA}&v)aqTgR2kUI zQqdjEblbWd;WF%Iihlii(l?lHi(MJTRHugW0~FarrVQdthh3dd1m|?&xq{@P`;WEF z`b78Whhnk?=nGoi1Fo7-T?3XyFVIYb)`#Fbc<3`e?|WI>h3SCf%4y;U%8wH3T{x|4 z)m)*aJde0|uX#;JJdw?re!+PkqY0c%`__AlHDtU{wCF6hI4=Vq)}M;Ss!ohH%{t0z z1OA-*FPn}!?&vl9KKeTQ@ugqxzIlEadFf|E?hALKwHZEt$C~up_s%~3WbXOV=5=$u zYe$~X$r$eiM?)r_Q183&MfT=o|4;nUlL6LV*|wmw^zBu3271Xqs6_kBDP^s!Of?%-&_4zFXtW`)n?6~ zk=r`zdNsp$yU=~~r!7DImNHm!$C`EYE5FaQFZjOx~MnP-m-nUH*QB> z{K=PqZ|k{>AKAC`?izQ(CI2N&20d)^7OwE`$<<#BEN{Iz@4?JuZ{M_A6~nLeKK<6u zb6(G>!r$BdbKU)kQ@6?5_|7{z5c7{hdSLy%AElp9U(Y%hGp->Q7i?$FML)Oe>PN!? zd*QhUd!WJSCFgkHXNWUDhmaXh`8TG=55AcFBULmlr!C~yj|%TLzvzkD@KHm2SOU?q zVC22=jQVjM`HiD$*DZE^RqTUTg%-~Q@p5kS7Gn(1xVg8*Gd4(Nd|2CE>Rl{-bf${=c<;++CkW9~>&f6I z>bgpA6pBZ}`_e`Vnlr>tnt$Fj@}u{UBZb~R>b3qMap=`~i^2wPE_r^@^|!xk9a)ie zwDETA!m7gIi+5oS)uKCXM5Q5K`0Dz^-Dw%$KUnU%#J;fp-rG+fjUBH0wPne@bLBrT zsx1Gqr{%`|PgeZ#auxN(ESS7#nDtiMwjFoA?)z-~^?Tpsf0KXm!bh(?c=}fVuOA$1 z5wA55R2-2eID5vq->MkH&guAf1*7B5@xOjH?^E-wH1i*eulv7Q^!rGu z=kald`{0MFcZM(QD}4QL|0C7>ZzTMGmbS7X&0(nikJ(GsK^}x>#a8QNu=xTyp`$}z z5ASeQApa?3P4RckfnPcXo(k6ep9pj>I!_lqiHXTCF8wDjC$ zTDrL;Dk*xxPOd+qlfDi=z3;hxX42cwz<~3+%u!@l+)dHe6+(w&5Wx%d+kb2@G^6VoQkTXnF!HGH6jx^?Eos!4A@JRD!3Z=UR7{R767 zFTj}ch5y8qi8C$g|CF~w6BBz_NTk~{LUn!MI(0vs$vBZR$oJZ=!mk&y3-TO8n_(sE&M0Wr{{b8_Y1`IM zt9j2f2{Z5E@~8@PWm34g(y)+!=S6gA&XYnM|CFfrz%$otKQ-xg9fp4g*zmd?&!9$f zD9@l9TKZupYrfma4&}Mv?}WT*4d>p)RuR6g1H+>800at_(vR1X3*GRnSLfZ=7Sydq zcry<*1zIgM0kvv67C~6Mn57*xbO_mA!~LT~ih>lY!zkhPvyEB^BtvAg>^1v4prfve zQfeG|Df?lC6S&GCio_w3t^Rc!Y+_edt!IcK%$&gFN>={|MX0;Tg^g(zuvju{& zfDBglOx-WIB?SdhVo|l88qwX4%995vdD>JxNvn|d?pV@9DdBpLC(C;BEa&n32Bstr5}V;x zVP{R5xRt~004Ig6~WR^LIsnsvpDU;iGrNKM6Q_iD#aLvBV|&>%Sn#_ z2QLqmYf!kxTu4XMcciG2m11Z&%A;N{PrF37a=H}Jja1ha!#J@N!kgAhKuytgW$gq4 zjgwe0M`NleJ z&*2`U6Xjk?QI330%VG4ox(=HT(2`c41yl7&6pA&Sn!H z&tC;KY#h0gD}SV^gE8BVAHq*&4{g6#mAQ*&CYZT-$7$+C3=B@aDU1pRz82czwm9cUX z=Cgwg+&XO^jIU0^rFPcM)N+`?U!Qs~&7x&WJUQ!kp z83quoJVm8#O|5Z&7>v$D)mBEh+}Mp630f%Qsd_9PaVSWrSb);Fj@$0k$+2hc(DI&x z71N5xg$|r-7c^aHH12~#%Hfr^OVkN)&6U zaC{LLtVm=AM3;!I24S${w5#~jXk6Z&$H(9JFE3CYN|Yly7q&Vz3PL07ya@~T8BeKn zQcW#t=9+xbFc)pKS)swcnu4Jl1*X|dtMsWfO(~6)@Mob74Bw$ci5Y0bRgsqh#N6RG zmxTB@Ul<;S=!PBKv8()-Y&}n=4Al>(l~sm0nRij+TJK{?YO}qjqGOt_Yyb;{;Iy{Q zjc|F$;usk9Ay@YX7g?K=F;mX+oFB^mK%O8Iw2yh>8(Vcn;5jBoMCQhRi#R)iulza~ znNR3iF)8?l34LMSl$Fux+H_(&>Smls9C#xMIq*KxX6QiTJH8hJynSg;vk3ZN@6Vhi zMaUJp12hltL$xniZBD}pDLMy)^D)G=2KX-GtzB;!F10d6S;W*3Q8OeK;ZN4YGg1zt zare=CV_#!vE_%zMJj*%Be~2*LzalQ5m}Cs6`w>x^XP+~ot6z;|P2=_l zQ%Ph2wx=HV4(!-)!srt8NR!pn$8|ENqPncH*Pe120qi=`-ghp;CL{evUR)vw@p7E2{Y(tJU?{5XSZ%g{-xc& zG~KaWEX~U`44CfF`}AG@U?jtI`+euWzLy_sjXd(f=&AU^svnHQvm8|wgWmU=Hm*1) z&fYm+tv_@-a%HLSs}=glks=t*z5POH!Z#C7==Qv98)-Y<^3}l3@s%&#oc+rD*HZ4J ztiN>l!DHF+_B&Z~GJd?LMG{Qc8-Mxf%ay|q(8rb~L=Mr{xBIQg(NAvhU-XZ!A{H(Q z{z2C}|G}-L38Vh3FZETUyFnPDcMtvZ_THl0)RE2lFWoUEg{S;r>Cv4-JMX=jb#w0c zW0Cq@wXV!1z}d?9q-!pFX$E&OWuhQ1!+m5yU-}5=&1n28^nP=8>6w2X$q?zoi`WV8me1W9$#^&?lo@w*4~WtzeO$iKX3|P!KqQ{uefp2*k6rHlSI22 z|0!^S<*nTtz4GqNl5q6pNHsb^Lpc=AHVk}PT{>m?t>tTNRI{vR&&9Pna=SQO1c;Dm!N}O%Tg}8BujA)n) z6bE3RQsej;YwoXOLl87k^^D);ZCSW=cp|Us=n_~a+cMcG+oIj|$4%|6%Dl-ErvINX z`r|sxA^!%iil5}=#dktsG^vR?s^GzY>b~Cp4RvV}mnSZPndcAv$0s$;@rl9kkgh+% z^<86|y$Q#MPE6?fpvcidWZqvQhtBvltsyeGAu`>Nv^LLa)NF7b7;%Nh()$=6qi1$F zygN?Jg_`9Pq?f$vc9N^8^hw#W&K>75Ty?(0jJfv0kh1`x6MGzG|L{!KFttMJ9aAOd z+5ekQk?I&q<%aUs{}pk5Q{>(hQ$|cRDf6afP%~o|aqoJPwr)NwZq6QJwmQ4*AG_H) zhueijz->m~B0QqA9Ee$&biryK(O~kAeRL>B$ioC{MA>gJUYY1ZLAesqQm3##1x~_f z9qg~EbR`esd7KUw(y9mDeS(Fo3F-tw%ZKuq?w~Wv)$$;!i>gK=tdfaNVIPWCRv-}; z9nT=U5QRiWPff)Ol4PslIy{7`umQcM&Oo#r*1#>yY$^99(TWXGb? zBJnGTy;IX<3#GQAh8(gTd_ye;yBm)Cs`2WN{{-E|Q%h93k)QI=M5Cb0!Q>gC4yo!U<0vn(uYVX~N6e9UHRBXA2YHin5*h4elPIT=1Incp(aN0hV? zeu-H`y#?4x5GDx!5EpJ&J25_tJ5W|s`3bQVl#m^VJw+hjPJ4t7kRkpWy_7F3vCS4k z811wx{1?skMo^+ClN&`!Veqj8C)+RK1TKNefea02 zW8K9MNw7^fh=d#hK~_z{AmT%bRxYe}hgX5{F1V;5nIu6GgyK#?mN-?mRxT^14s(nL zhSgNVTYac3;AD}Uz6AwS5WB3M%EbqWRqT1n3 zvD&xC`hH43KQ#sy+2VR2(_(VGB#&`-NN~j`psLU&+Q@aI3&<1&p3-Y_(Pl=OXhTcs zOtBp!zr8UJ;E6!B+L{6h5Re;XBsQbncm$&=E)wh(IQgDU!zisp_=xGeh@Vje<#43L zd{CQ67;Q+Vr~^vTFeQl=6^R9OvC^&Z+OVp@zfA)?7OBGF2m_Id|0cC#NRUzorq+09 zN<~Omgd!7#1xE@fcM_o@tcR=6Y7!768;b-H3OH&>tv?zJm>aY}80iQ{^05HF7q zsA*df$;k^Mpwv@~sonT$Vm}oD+tH}HVnDa?ZLFyF@j4L)^^xT`1&AV-!kP}p+8dMw z5KD}cO_4&&$fGhN?VKD7@z(u7CPfrcbiD|xm?r0ricm};ATlr=FD{qM)P{M2npZHH zRGQo{C8CIjvF&JDK`{X5s7-TYFC(3}CW%&|fAWX~iU|RscAJ8iV-7n8P@-5)K}K~G zE=3@SiD2+fVLv`=0FWvz27%n$F>{`4KZD3J0Ue~oV;G}AHqp_leP{lkBmyPbHpb;j zMDy}C0?h>tdq_}ibh3+>Gzj&wql=~FKx!S?BBuO`DjX^Uw=0h~k*%Jr{v>Dj6KDz7 z)t%H+=fcaLqP_X37_k-9+T2|`4!9id!}(4rudJ1%?b#KW!`T#hwdOIKRvE(R5f+Ms z4uM*y07h$;#>J9)+DV0=Z14d8B*wmh6xW($L!@+>f?&pv3~b_>6aJ-t?)Oq3KkQxZIQ_H6#3t@4%Ttf>AXse)5w%!0g2q^yqlB_6G zB(4#{F?hELwh?%87s?z7je8xs*$G%;1cJ20@{kOl-B zjvC|fUR zcd$j=JnQF6pZ~9P;t5-b%~6E)@~w6!-qPQ;qMfFH-T1BB;g%t}TFT)eKq7eZ*A=OcQN z2B3aA$vsoIp4Wokbr!vV755>o(w@Q-A-ps=RwA561v~+P_D}FCee00h z?$myq@yh75_w>8hk{S4eD&zzI*IO1`IGT3YI#_m#em^1flYftXFr&h|WH^#Pstf4$ ze!Wt^d4de78XNa54}DN;xmebGt94sdUSOFOkG~pl9x0@DlP#w6-CxY=4IaDediU5< z{Kk^PB>#^E@%3+C-DtYG)6zEIs-Jl~a?6{`zgm%dXmtJjb32AZ!jAs<;Fahv#t+%z zvtFA!e#e)qzP0PXxvT(ZN&vUSj~~$f>##KR-rG0c%u1MjvDM!?aSq&$Uz_m6{pY~f zwO@Q}op@!gzVeQpe_*|9iwrYW;FspyeQajJwY&7(+<)F)*{ctGDQnC>aVhxLFJ%0M z&tC};pzz9-=Wfq^MgPH(pKonyE2KNADiEmf=e{sZyd3||?OzvE;lGo9Cg+d0&Jm-p zILY*dv26Scy<``tk0*NkL$B^C-F7AbJe$TeJ%!yP&I|fYfu+Z;(;4gtO=g7L^D-F) zBOg2+KQdmMT1Ae1!^JmV-#RfA_0r4#?$7IPFpZTIwM0&=e_Z~?5V>enAdctP5m=3M^XKZ&z!)z#s) zXBK+h&hqfXl@HdO9(*l3A!;~_+1FSE#?-_~e^tT6t8)suJ5cd#3^W=ZoW4JYOnCj; zLI$!Ur7+gB7`x*vY~S!);FlGGb&(^Vlag!f?R z4g2l0a1b-8c@|Nyk7@j`Im}*ul8wQ1L!t1$Yin)Z{~qoPG=r^@7}5AwckK}!oS1DYItFJuU~;yj zrY8@sYmlPxdqeKm-8;qBjRIcTO1S9)% zb6vZiK>wbXJNrBHI3#H_z$p#=LB@xEx)M%yy5MA|Z*sD8Hb8h=CaD`owXhNts-@B{^Wv;_x#Ce@z>#K=eNnx&atucp>f_88lL_^3ha#4Z9etIfGAFC54+G?=~8`BH{3- z>pZBXOlX~BJ6Lar8pbj^c{9eX5z^u4CoWmTvE7fulRD_Cd_`$KT~Z@{JS>6|u*F`- zMwO&I?lEow-9IL6r|jsraOWLL1D%3Maltj0aXvr@o>6ZJm4i%>Q;mlbJi#jtz9Scc zTms@<1Kp3Z9WG}$#60N~$xIQcK(q{24+t^(QMlDuw$(EH{zmx}G#n#9r04`JEW|X*3GX9t zrxb|9uKD*a6Bhb1iULtWS`VW}jDvUqgJzIhv7G|1*C>rSV7rhGpeZ3D-{k0D`8RAa!k@por|^!kK4tK(<&T zTLff@h@>P+Nn;lmmCA^)tSRi}=YAq~u-Z=Wry9fJSg>r9x=oO?t3<8R)S9fQwoMnq zIc*1md;9o0#v35H8D*QT*|2voYlXp&)l<8LUhEoy_6TimmpJpcMnA7{^rokLiYR7v zxfz=##lnQH6G}k~(X}qzXolOQ!sCjM&L(0?t{s=bVMPRGsYiKepiOqQax} zkkAMRcdr!?)&eDoD2s5x{oiLLuTqx6HA%coYDbr(DrAe0Ok{OIqBTW^?^P7%2((!a zpi`(elaxI66lhRWN)ZYf9VEg29WoKkVNpzsV6z39lr+!}t4x!h)wf&Ls&=YmJt4ws zgkFfV24EvHIixxtukfU-5W}T#0qxpgx0!jQMzBTkwnX~T%SZtoC6ct627;foP}LZY z&&tO(K#K^eh!$)l-Y#j-P7v9&d&WYakp++~F!jBhqSZKEN}CmC2qSnF69kU5ND;ud zH%PFfIKM_7q)LLFVM%?_@-kErJ==^2k$jt{m*II%hrg2O+@X85#M+czj5W4)KAE}PW3J&36RR^E= zC=l{#q_duY#LX?>PcTRn@&HQtX!kK2Cd%TnGEn}(-iGQ64!?EupWGvbkl0SYrDtBj{nN4+nO zCqrT7Tv`rF!)NRiikT50khFDbF1oK{0|@2o@b2IM!tmy`>KGC+D9}s>b)`B*xD}Q| zrTmKbvJD6mR6r;E_Fu_zQkLjGgwv$x!#OqILy=j@X{4fIAs`k)iL2&*kvc8kiaBPw zt^zT2ENwsjEmDiVYbO?Cy9i|n8KF3h7jO|x8)K+VcJL;;%>JvRFYv<18 zJcmqIKvBq8&kVgaK!-e&90K&>Am|C)jhy{@O(@dERN0QR6+*_W&A?@NO2`m|Upt3i za6Lh+_itIRXY)1XgFHgKw`8(+580wf7_I9kLnC3;{|>>v9ZBiBc1hZDNUu4M~t``c?VRcFuIPE zc(B=WihGA7e&g~m%XaC2t$+<-j3a2WKCM6PtY=}T$eo^(pB|SK)``CXN1^bkzZoBR zo1klq@9-`X^AzFvoyHrT)RoRJ@$b{@NT`oL7`B=Jj=qJV8N?DsSUlq(7$`9gbirO} zS}OjRek3+O-ty8SUy0!kU}JJ}^J=%}N3!mJx%>>WSeTjL5SF$$C9RWaVT!n3!pEfe zuA+NT?kG~$LKiO7)XU(p!zQ}dA`o36tXa0x!cZLUE{$|6?wRer0`L8_oRzmze z*Rg%i+)nu&w&1dBk5Xd^^AmR1Fv9L{t zoh(HE<|wYMT6TA>d)e&=8IY`1cx>GB;)A1steBRfy9=%qhK%H|zm$FJ_s_yVUhrVs z*TeMui@gcvJLgX){C;nnHQ}-0;kO<<6%ag6F&Vo1>oW?EzMgyQ!R>7!fwk-J=AF|$ zc)lq2g9nb63qQQO*co$iRnGmrRSR!@wUS)9^v$Oe`p$obZpFrElfEx->}28RfWN}jQ3u2_fs!P*XqYRcDF=dFmL_l zXR;tQWvg&u-o$BLdgTM!`Q$}&#`kx;CKp4&7AAG6ax4XAzSnvA&@r&zo-+J!L;j*je zX52CFP56AIv-_xaY;2dv{gxC1y+dJ@L#% z_V}&)CvN^4sFmWqv$3kK;lAdUeUJRd`<9E?bfL5UGr~D14o*TiqSJ~0QEOWoE*g$? zd`SMq7(C!dU1tH*JfdH;ri0vOcsgX3|2O`lpMf?xzAC9#Gfx+KB>XC(8L~fj3XYFR zee)z|us$>cy5# zc~pf3x~A#9ffKqA?;rXQ5zcDF$ytqia#r)#Z0E1Tz^VHSI<^;_vwtGNi?&lxQ*}%Z zcshol(iwtEM=CrvwnTzT2f0s)M`0DN*b=;}`9apsrgJatq@X%#np9M#jQ1u_FQTta zUNR|;usH7rE325px=Dfb(y8&U>D+UQ7qBfZ=sXkSNKLoce#kLKH;2~Nab;zPsIqx; zDxD<_T&Y`lp_y9fekWfn-yoV_X2Q3<^rgU-d@Ym z-7eVZm`-meY2Wk$>EnM>7SpqoN-RhoV%YA_*Yxn>6bvtu%QTTg1fs0fb<#=lJP2D} z!i7t?Q(~HGW7em@&ENH>LAeb}r$R{0S^>R`XZzyWqye)WH@_&#qbDodSZ$*&WlAV| z2H#KWJM6?FF`^bk+#h>ye={({)uQTK+F~<615gc;)`(J>7%b6s7vLDv{bxO(D$sIr zFhx2qH1Z*=(J6&G(M(|)y^2^)btJV5>P|Ld3czyB(R3qlU|A@EWz>+}M2gBRe_@!9 zuR+f!)wCkjX7rTH!v(XPO06SuQI1mvck_|;yi2=PV(Ms<7A^r)(*CP8X>xrw3mp!Q z6FdOI^nw)beF}2YSZs(kTBTZ)&S$7}fyV@qd5hgPe_@^gAPR$rXz?yAjKIu5_?wAG zI93HWTR_E;6N{}B^CW;T93ShDX7|hx;^#tGdZ&_2gpoi@si9OPE~}KL zOB_oZM63a(wk1Yyo!yGas+s)=ubxUyBiAa(V2+VTrm##G;LUQH$I1v*jXFF3+1hNr zor;FRmUb$U&moKD25{JeSYSx|AlffHTrA0>#Oc|W^TqL>KiUu07Fn|}61AlfJCRvR z%qyRbV+vXl!+%S$YmBGRgJ6|iliDVNM`Q={$5O?#ESiN`BsHFOEOQ9di!X=-?FNHM z{kTt8#hx!wW>d3Uqg$yyu7eXHO+38$iWe~1It~PF@in1DENYf#mIyd6qs_q+0?K2) zDE?bm-b{Z>sv^Z+H#d^Xv&I5}MKr3Y0z@RsmUyVHa(OlRp@8V}=|t5*&`%kAxMWqa zuOVR-x5JJ=t0I#HFhYwM1zI&vP6jIxPXXcSvbMvm{u)D#1lRXT^7gcH$X`@Wo~MGF z^?)%DKEMJ3Yg~kz`%;*CQVavnU^3>wLzh|ODwTXwL>VzDhS4K zszyt~%xrV?^b4}-LKUij;#AR;Tn8Efl^zgenKN>*h^%aH55%D22a<^0L{_M#0Ir53 z*Hp+`eD}%4X zsAD|Wz@(HTpa4$`0P0y_qur0bO`$3tGU&qCbQn0$)xps%-6cdQ%{V`^j&V?ELrJ@p z_7Jo}M7sn$Vt|?l-B?RuYF5{6ld1&=W8tO~5IZ7NQJfV^OSp}ulV#7N65EQAFQ5UI zx}2xbF(dGHQ)EkK=}mx0cK2crndI*x;he|NRwr)=DlnId#A0(WLxGws#2!R+Nl0lE ze;QX19B3?&u5MtJ9qFvePof)9jw#OCQ;j*Gh||$EXz)BVB8Le_o~^|3{%fFjd3WQR zk}WkSCqnrK5Y<-a;(EMJGOA1kWm@J*K@3M0J8B)u?TChVLclvd2ZjnG>v&xqu@Jz> z8wAe6J8MHC9B!YVaTYbv-AJS=QssV6?frYw0D;)?Dv<+!Kd7JVWqV z`H+Nd<&xT<@bGS>t|D!OYI_Htx*6t%k#qtqGQ7ovgLf#Fr4CUS#D;gU5@m&0=WP{Q ziNN_H$oOW}3a$+Fa6kZqv=xW0$#lvPAZdc0(`WM|-q0)@b@xg_M}4Ac%6^@Z~80*jc__&XtK~|9;y%Rkx@?Fy6@?oa{sXxWEg^7^E zD%Kzz7Zh+ikE-J3ER_hW#VMHxik0wQ(P_DFuq5s7y`<+yw&TOnxL{ zK!j;hzL*)I;&uc#SkO}z;EYkfj--A{T_J?BLBpUcfH$mygnH^RGPI39fLDgT=*yLy z`mmfuh&O<1k5Z#{tvXL_99%DVZ!j+2acOBSUe<}|8B6Gy&yY4}SX=Vg^5xUeS$E9T zr@!HCBx9AzN2twdSCLx0%HuhU-4Qo;N zA*gEc44*N}n?Vnj_{g)HI?~PQuZIY6bN<9YV{%S?gj0xdNAThY!P_lV)rMZKhAIiX zM=V5u#i?fb5e-6O`-uV}+QnbYSzWY{b|lGd0nczOJ=B-WD^;c-zj zGD5G?^>k=0)x~+TK z$UsvxwVkTqGC8~q+tcxn(ilOkz+$yc@qFjzw-`I7uE$rcDIp5VV9ozx7#GN?yjk+Y z2_Kr)ifMO&_x;}^W;a(Lg&OF2Kkb_-)aDA=bxyK!HLf4l3bZhZM@2I0@27xTIP)1NJy zxx@bqT;cS+L&y8NCPu;wy@THISDjBKwVZ0J8|y!P@|(gJBKyvtf7@@Ke`%+G#qy({ zTYv`%*P9!-cJ$JY+jqZ$XusXB zJ@DO`hH1tr?Y=igzceN67=7t|-B_zFe$8#_{i=8F^&f8e?)J9zP#6fk_Pe`dxAop$ zb~m@`_6027?O!77d+YXjQ^L=Ir*bd-`!`q2U2D<4&+b`%tg0Hmf4k+o0JRCu6U?`6 zrr%!hYT<#KXNSExF}3m3y|IZF*L=+?E0j?PW)pM)(*!^?s&%p$bu85{~U_0-Ph1CK?H>tOb|^T z;APE$S`gA)wGm3A4Nw-fB#kXO91rn=aBTM92miHk%?~Y;Q277rvPKYc1Crsp{vyNA zfn@keTKg~XDrYxDwu4X6+CWnKwbGqTo$&F&3E*jbRvWI*j$t z^uHa3!piwbId5UZAdTUmL!N1io`S9>bc_?#(y$?OYtTcLZilg>(||Pb>8FbjCyCgwVxGYU^C)UF;S*6j z9p@e7R-_jV0I@Szp{5?K-ob3zkV=+!Fu~C5w-|4)EANd=s^LrEpZ6f;69h83O9&Nn z(3p}4AP=REFbpgN`SY2>WC-O}npsSdN0;#~0&HxA&_5-l4)|y!Qt4Iz{CEdiYKMqt z*J`?1UcsWtm{o*X1XGSQ!)N5v;I5@;@i68BIw)H*vYl*MK2I{$9ImyNq2fX^=s5sz z_Y$gNR=8jvr)M(Vok?hS_8m9@RC?h6&-zixl z%<`o31_hiIW(ws~1R%qL>R3Wn3FV}iStcbuT#3r?6Od|xKSIzjk50qFe(#Ja2h{+Y z-1zJuTMB%^Q5H4jl*m>iye(xjst8tjBw(f4OiqlVt7~Fm%9%`TrRvzADH_E_6tPxA zTp6r$$6-|q8BB^B&c2@n~Q=O zC#_QmyFLNjCje7rXO;u$L)7ytQj4{VanWEkgUe{Nf~|+dwb|Xs)#wXMj?m7OcYSU+ zZ6m3HOgzu+rfoDEC$L1CpYYUXip9uQp3Olb_=CF*&V8hK0upYZPDTs`3>*u1_%578BNRp+3uZb5 z#Jv?DjJ(()hH!7-0%=6$BA!WV`zfWCR=)Qzkq(F;b}FgO#$>^}7>dR#nBwj&GtMDF zsuI+$Rx|i^MLSWlf{yIt6?%s2Lm;G`SV>8eiLv97Ka|05? zOnqmH+ldA}OeQI!@YHn(@n-?uD1gYXF=~XtJVyUJl`=XL4;CECpt3zEsaDCVX%U5R zL{tvrM&Dvr33*Z-WIN)}2*w_e%gh5_JAxC_p=D{kk8G4-C*%$ne8*6L3=)L7AIgHK zrozYpm9<+1Gw#n4Yq9z#^UzdOscxDb6#OeCj_}YPg-k+5u||XGnL_X*{`~I7Tm|lI7*~ z*dp@G+Z?N9m16Q$_ zv`$9bBjz&|41E8jdGqLlx-CpM%2ZsNj?!v{3`9#lp*XcpaP$36rX#v22E8N9>Qg^L*#2d%n$mcdvuh9L z+&o^A=4vMEn!_8*Z@O39EPu#2Vtz!ozHvqv?j}3Am%kzn-j2?TJ@>_bL84Uh6E?Bp zE?0v0!BYs4c0!*6!%Q-F+hZnwXgkF?*lSKQ17I!mD5caXRPwF!v$CQT%L;1GM=mB- z9YGf>ze3Fu9GqL(B{bQS%hZNBN~nOjFBH(e9OixIP_*gWpwhdD@-A@@$r1?D9s8V6 zwZk6iLhc|~qxu6lav5?gfp2P(eC=so zQsi9Qv2GWWNio%JwWX1{H&lH{4_c{Lnr_z4XH3gL+nCXhq3ivaJuqjcNeG9x1{Z3i z>`_0=?o9CH6{HV@I;}?kvvRHeq@n>*j%Hr?^b_MJO+N3b&4{-4;eR<><40dUym>)y z+Uu((oLJ(~vFFU&9oEq?P3Ma-d+#)ly?DubXC!gcH><49p&t)wRa@!7>ec-(PA+;U zZ}Z2d$)${S+3>~BA6{1s-CZ)ZXJY=wR^->_q7##^rnN44RKBW{^xa*MXB@kmSfB7) z-B3|g(Ud>^o6hTZl#d3VDf-56=jx-pFHQx2R_8|tI;n5p*TpSd(3?3}P-Mjp+rkxh zmk%x|upSv3T>Fex>7RWh@3rBngnD8);o4??iu0_S^4ukFRs1z-s=siVKA+mSd8+eK!Tjp4 z9;LCdhd@HdI`reF=c4u1wSBezz^&W$i-92&OAFkqop*p4EvFup;dv9ozwXce`{?##d6vOOSQ|4r z=a-`29+rKaxOQZY`Z@J;MED*5y-$j4W6Q55=0Ch3Pt=WguqkL<_#}J&(Chn(E)CRv zY>gS5bE7qAAm5Wcb}hLue5q+~SHt9mK&_+jd%tqn+T6u|`o?HvX6Nhkvf|RKq2X7E zM12puPBCLvFEZ3TOG}>K_5y2-_BFnv{b^?&>0zp)C~-?~Efh3wi^52U5(1kwM{iz*8f z9;b*NOG{wTY1_4JxiH--ulb*sjU+H36F>lNi>0a_GZjYM+m?g+`DrWP@nTlwe8D=#nUwoTYy>9m82^)kB_x)B0gcR)>Q0_u?U6(AFV!KQKm%tO2U zK4o~RA9Ti-PP`^0mW^(_pxpzi6197$mzwWG9x404a5s%p0G;tWr#s`@3VX@HK6JV> zegt&Jmri%amx0cBtsKQ_Uf#*c2{>yTZj{yW}Z3 zXiy^?)JWRiXP|c%$YU0)3@^P8og$r3d~+DptcA|NcMKQEU3T!R{0pKAE0Bhe0id@f;c8H6DveaTc#F3CD;~NRn+OIB(5f=h= z@ZR|3uTi9(EyebyK$I1n&GAltS2XC^lDF4A!^cHaTDKI6#V*d{t@w3})Cr(Umd&|? z0(T!KjfXh3tbvYl{ZQ%il1PPRzyb#V^ZD+wVl=^Y*?@=WITzCA7BFK0v5lrW*dO2? zUL5Mhm8FgDat|g{h>=ttJ&r{?J>~^GthfW`lH~=b;5#hWpux&*AQTeG^tDs@xGaMw z%J1#HiOu!aF7}Bo&;dRN^lV_g@@pcOo-$e1Yq)Zf#XT4IFp0dxEWwt zL!V-I2h$nu057v9=5Q@56t{i5mMTOt@zr47U{11`$p=l5pTd$*;yptsY;C5bk-0hY z)9}{$eV{WFqT3KXbrm7fh3JYK4s+Ovge*A?mA;);^0%(GeP%4HhABCXvEXFFz3!qi z$pgjmavf`H3}yIgm0qA#X{_Y zwE?B9I2qrK>>*^yEE&b_uERtO%pkbQT?omPGPFh%2lTY!Ah6GhAhsefnTft8pUJ4Z z>|$tdH&Q@!aWzH^6!(S`GG!w!~6(&LIZrZj* zR2emsr@Ux`rY>$KL4_1}nqe;#MSe}$u+l70HP7p&N5H#L z5ruxlIB|v*A~UftglXhpwJe_LpZpI7%0-hXgi?9=zwqlQx~++z0$8yr7?U-viCF^a zaS^Ew%CV7D2KvA~BMGNurNK7NB+&u?p4{#+1EMFzNRo*pUZ0ZGzOgG*csG-zHDX14 zE*nBie@5GNyVpab-7Ov%`Y49?A_yXP@yd9j7pbO|gW6`1m1C!=XLq2;x~rA$l* zlZ5cLG=SIOAgUx&6Lf+lJ7BH>Quu1$6eax!3I0%Eo-j%QQG<#=4V*|w5@bn$ zhltWF$-u=j1zgw;&=UYOl_ZNmZ3oW@N=Z_)nzZleTIH`U6& z1o|0gp(G4s1b-aZ)_n=2pwxys20R}jLP)r4x{r~ZtsyI_`69{~DuJg{oy%FsW>UF| zGF!F@r(v?sjdjpX0@gYBpL~Ey2P5YQ1VPh4o9AwLH^YE$MXK)LA|Qcb0WAbfLFd>c z8J#3Z-#}!TsH1r|kOl(8oDr54XYv80EHrSISB*i6tS)mQhQWJnau4DT!92RzZBW`$ z$V?HO0jhy(<&X}tC6m>fr>If~YAY6l%+iXQ4la#IfOb=yja^QXYqEsWwd@Zd)Fp@< zG+lyA`-vxKvoNqbuE9!EB7xxv^QavtK?S?(1SlFkMb~lV=n7|5imN@!l|s{E4LIHT z8WJcUI9W1NjT$t^9c3n>*^lv#(iRvz?^Bq4EN#3_JBacg0-|HGgk*R6we$ZgcMXOy zN_P)Xgd5co(^kAI_m5zVU^AmLSu6uJ!xgzaikc*JlUV?c+!U5TB;}~*G7Rx2n03s) zMP|jtAWZat5Y&=Q3!Lmx>0g*u-=B7`ay2swx2f6gs%5#1HuLk9=1c<6-acT&^f68* zP|+P((M~E_7ANd>!yC__9W+%e$71w1Df8K5l=iAcbKtS%Cf zExJE}3zHDB4p(6iNH>C6DnNp1z=fg+Oq>Srq9kVouTwxZ0-sTd0i2qQkWOP_58@QF zxmIVU9Ej4#R4jByHAP>6Hy%86woSp^Ho9`587yDgZVcS0(YsxR<*zcYUM;+M@}j>H zdJkQvyEN0Qez`r@uY83%>IyS&^3pp?$`1-oxv!48m&2+rA=qLfiZK<^$51+<@@|8S zaIckcS!z;B%rEvu)R zu)j4#gA7#$a-fH7g98mJZxA>NNQrcql|Tj56ZO>TgfWFHj+mK}PNYW~-ZNPCF&CR@ zklq_1_RPA7?a8#b@`KPF(Ko9yq4Xtt1_*d|hdllTjct9L9La>3;Jda$xHctFVhRoouQlaoJ=qz5bByyL0JE?fZ*a)l1c2?s? zPNuvbW+zp(0-fspDuqb&_*T4wBVW>0kHYKvY6{Dyn3dY*$>1ORRR!jOQcq&v#B&zY#QNcu zUkC5rHjgqF>Z^Pgp40w1sWeaN{Xfg=E6+m14pZ;5zF!_?-z!wUylMEz$JU{dXRYg} ze%xN|{9EO3f}dz=Nq@)(Ynw-N?fp6azqeOc9&@H%?EH5A-nghksZ&E;vtLTR1^Hju z(d!vBt?V5c`6b4x8dJi%E`9QG?|(g74i^>fSaRK#DPQ^JYGju=v1wxejl8B46#zD!U;F7q{od)6|_}tLW>=t3_MoReJ$;-A@|Kyux{S71EKRfl0akwx%QKf}1~L^Bncqwm zOs3lV<0gV_^#>;{D_g%CnX#+CVd8c|-t#|WBg*sHK|@!2toMd*eE#C5OPSd{1*S>U z)!y`>E6e%~lglbvLx(Qg>Tmvb;n9vuQ`<*|7HP?GeW`ZV$k6tw*TFu$C?Z+Mta{yvu&C)$E} zkQ}oA%kDPKkNXzb-9kPO`|`hm=KklT^E+m48ov+%unPaAFMvztQ$Y7g{BP#D(rNet z$QCUMtDGOnXl(_C=^4kUg+2}$c$xY_XI-%OjCKCr1z_SZ8NkqITJ`?#B8+z;0R)Q{ zd0STa4S@Rw7H!bSA!ADFi+NVVN0oz3OTGZ(jqifNddzn(n1`%}PuznS=7(1fdgq7l>YK*X0SZG0FwbpsFRFa+5-`s_3+#4) zr|{Y8VbvAjVX(;W(&99XB0vZU$^>Bqqd1jQ`2>*i6f9Jo-Z=f`=nKNK5vnqbsuJMx zn40EbL+~z`tFXB%+Q^C}!uyEu?nW-g$^Aa~kSECLYo>8?HDpB>*veEklE65}-fz@R zbi9e;=@h6BPBYdalqh`{DKI)$ZY@R5^YToH9<8FjKIQdLyHG003pG*6$7X6ocrsU7 zbA^NXD$a}Wl}?P$)y#HhP??+=Vx7!x0OKvOK`oq&45JQ6v4AJJmrz2S1{-*RadlCd zLWqZtmMYf?a>R)^4ikWf8_*Mcg2@t^NTwLCsZ`tCZ~QSJuFeg)qoE`2ESH@UAcdC| zEK=~+iE_mY>NSv!)g`U1O~NwqHAaCrgL3LL)CwfYj#6Y4MU-Qi?6HBqS0e7K5Cs?s=L({9 z{#+yqj)&XIZA6t??sWtAJ5gc7bmi<*SP2{Xv`Mzs4K`*VEIv;{2`cf?V=yzThh-(D zk|3;*<>^1Vje@-c?5&D36XoJ$<`bxIHeUcckc@;>0oBqN0Loh0SmpH;_%bDEsSZSK zr-E#=lv%N*Uiamj0BZ2E@D8aqGqYh+5QD$LVbAg0Tx>UId=)8ZTXm;2#}a)D+K8&} z>z#D1iTSX(2M~X7p&ZL4%81S`_9QG3(TIzc1kh5AOkr1Ypa+^3MaV>Yi~zaf2OaJR zz6qZR5paOa+<_Ov?clIf63`7|B>{|#5s_`LC*Be=Qj9v{%*3{kgp7z6ILyO|QrWObj!$M6NH~=@ zJVH+(V3S}O+hdSQOgux^5<|W$PPy_0hFT2h%sde6jqLaXdD4k z8k(`I%XQpg69Aph0)ZKZ&VmD$kggs=l0hp#mAqPyL2HD35fhzDBy~H3Z8@1GdRjCy z7ZAknJ84RyLA<2GA!N`^Zr+%SRtm_v4)z@~gLoj&CI`Wra`}L+9wLjJ;eylvQlE=v zFuZ$a2`2ECOa#E+^*qxdqRZX>YndWkFA5|;S9+4fgo7PF4SFs_o1_SlB;^1Ry|k8{ z$&*F_k@87iJ^--M18M{jB?1zViIZW)>>qd2ROKQUiJAXONTD>Iap;RlI}_w()e?v- zL7+Ey2W7(RC`A^tr4mNx@DwX(i4MLz2d2!qm8A&)oDf&R?&c|ECP$qsg-Si{v_Gyu z5Wo@F3sqcFj+@EbE={9dSOc<*7e~~k!2!h4gndm3Fb+rK4LB5Yhv_3FB*W6IvE6e1KU}qrVz=~b zHPpp8a8r9tG7OR{DPl?hOv5eiI#yjrqdx!{yhKb~BI+P8)G_kAxrHnVaMbQE(EUV( zm_pf0LW~#2%d*n^B%eVa&c#azghwZS3QMZ3Qfwt5ic;vHzY5LbRMMe5O{*P*)SYlMT!rfF%#DoLGmY6`CELYGc=CD!$bJd3z;=?oC< zB=+LaQB={u9<3p`TN1X)IO`8`F~CU%Jf@d}v7>%E zevX;JE$!M_*;7{#7&OAA9%A_w)U^|~1J|#*N?%FAFL25oXciQhUsa-5kq|Tx^7i#l zE4K3NiAt)g+~_3Kwl9>0(LKJxSvPQyDo6Qxd?bY=qCJ|{Drr2j{B9LwZifL-v_=81 zbif->E)RmS28t&rjxh}|uzN*=0O;Mq;@T)vSQA_+3uaHjpTV^_RU$!32RJ*mYe{^{ zW@r~Y*Pt0qpx&ew32W#@jNh-1AqUtP z>LMqskMSZ&323tS?Skp-@?isVSeCJe1L6!}G^DlD^}Nm!NHJ-(DGI?r3#knvA%o~L zL^QJ{s8{(xGFgz@v#)FMchFEz*<9hjP9M)Ii`(zrabQPQec$jI+N!C8 zSDUKm`71Byy>;z{!J`+-PciGRuuhJg59dn-?BPy-?)IIiPJ9@7TrlX0q z%jSmLd?rQFsv&E2_TL8({w-v4N&TYXAom+Sb9XFd%B-+9`NLM_u{|3`_A0V#N6)jz z?sxeX2Tj#Z?o6+LANL`38w%^s6oig1gr-6!gVU?qPttzxrIzcrJ{u`9X1~<6f6};f zxgjxsQ1#}HH>XBk{>5-Ao4dTOKKRr^zrH(tPphqa#hlkV3rC<&7UHqb_8<9{c>T&} z{0Og}k&?Y^@xb!LsTRaZwGNYKqOjTO?;#Yc|9bt$mborln%y zN=i%9Y5p|tXOH#n6$9TIP#e0D--AE@95SZ!IUfoGzYi_HXLQPcpGF=JE&uN{0%n`v zF9RO5-_@D7+or`CAmV)USj72nTFXrw`0K3qGj?vdr|nGkBrUN)Fze9+EBsr`pBo zyDr@~jwE=&=mLY$B^Hb>%Z9U8673qyn*f*ym={((sd|YTfhjJQ`amgtp-t6CKB-ZA zVLJWy3-+ll2&y3fSb%!i)3CSc1*#cb1ZEuCN{X!{cT$kwO%cCe3&#t98F?Q9@gg|B z$;f?%oQ4Mkm`p_<|01b);Q{vYlGWUMo+KV*!n|xxGiv(fDUlr zlx`-1Ra-(BnD$p<#B!de1kq9!3_>pQrqaj#EO)od%Q8Oz=jt}i7UU#lBXYy23}+x0 z#e@<96w`yy7vK_egGtTh<4?X;LSp>JwuCo@padp}K1JEtKv$eHB&Dx`g|=p?b#9aD z1dqwAP?sjFfnJH3DA{JNnr=J7b(90^2drJTIH5F^s*OcQnm zoZa@3dXk#iT@z4nGM~Yz1U+FPZO$YH`2)OGrYiw(WnHfygB3lA6e_nW zoZfJXW^RTQ;@--rsLRh2I}vpw9fsx!DXJ6+5yi3R5PH><3>AP&nJt(!rrlohL|JJm zEdGJjW$pso+r{pg9aMmH4R{RIEUwCO6D5F&mGqPlu}VqIj83Y=B;F($7V6)P0~f)tliEu*-Ui;sZUj#9L-6;(H?G{fvM=m z>{-N4PUFNN4K(8hAy!G#XLOf!Bq^M>d7mca%3aU^%6e+3t0@X3WFIjTxwny1FJLai zONEL?j4}&i)YX3R!)%<>fK3v)Rftr$bwql5!j_P`7^^@p=K`H09|s%lrxmpTV?Z$~ zQcPIC6bDdJRSl&+W>g<#u`+5mWrEq0f<%y?3hAazvSc`oRh$IgF=`Dbn(=l9VGEEz zNK`2jOPeGCH`KLQ28}aFZt3NnR3P}v#YSLvW6mR3QX`_{+j<}q+J{{Uwn0tDAkOYo zv! z$l+ne5CDeLgY-9w2ZWFCxF^?&Q1M*D=h%L#$ zXJHkRHfJ+~8|^qJm#P^|>QK@QsQp7Mb}pU!nr6L3aTcnwDX*?8-YPH*@YvkMWEAC9 ztQQ#AWUk}hMxHfu79z{cD>JzZw9EwE3_?~lF##b@tLLL?|MK-Ba~F%b96F1R;*^}& z(%?YCLA#Zatzy`$V(b*4^4UKKzm@Z)b=yn2qj6n*hHKb!hk+4Mv1B7{Hq_@st-3 z;u&K%*@x~c+{J0!mINX444B`52X+k`BW1Eo2iQYT!p^%kia!Q8HH<%?_sEO?3FH77Moz7B8 zSzHpDkJbS~r3A!)fSqu66Cz4-X9-NmJS`@u!PA_@sX`d_;vt#v7AhE(270*|9R&_7 zKwQUlbfemURAvbjNj(z@W@~J(0D&MQ1}8bWWVF1){RO#2@Q^DyVlrwnpp2SW4#HR- z2y9$l=by~&D6MEj2s-W{9VFATg?Qynx(DsZspvs@>282WY@5gHyiDUPX#h+!G&v_z%AS{aDq>ERCCe0jO!jS zpJL=r$9v6I5FUOv)ji{M#fg$}j?Y`{T->n!c^aa_mA_^=b!^8j_pUoHlt*z3QY6RW z=sGAmE6toh(aKCpWuw%(Z)tND8cUx4ndmv40`~}4zIISC?l1aVP!Ud<`oUx`|Z;gN8CQ|_0RO5@};CG?rihX z&*W83t`iPbVw-xL1u z(Tsmg-I-V&UBApvG1<@gdyLxWhAKj*Dz_gR^vq~Q2U8zazcMzF+N&DPTkzJAWK~}5 z=#NA7Ki}~Us49yBZ(Qx}dUf{1N2-3ujg-m7q*Ze}#$VxVX}UPI$2+@!c+g_6uko*( zq1F3nd+VTo<>Azgo%aTh?9*Zc`x-hw9Q?=k;cNXLe$!ezkeilG`?1_?WWc|-dYRAi zY?01?t)?33`^V%n>8+Ckx1aCdIoLEuyK!ueD({uSiv{&R55HMdzi(^WZIhoW4K1H$GLi+oF1{JKc<0l)1y=3C3j&0n2DNzkmFtywqOyo@PgJhYyjyU|MW5( z0*0dDkbJ9Q|AOfcFs7Ic*_y$1A>l9PJ0^fz?c&HbVQy#m@`(gf^%5`?O)rj4=#kRV zsRM4ct6(Uaz70q~*&5%vga5kC3(RVBuO==T`PS3|778pLM?W-n!_luB_ddSu8x7EN zvYQ^d=4b!d2eh0tfR_VPQRUoA+Vd0hnHB)Z_QwD~HfS4iw4y1qsC0Nnq-B;V9s$CR z&K9Y+1zrrJ%IGjEp0Gl~0MZtVSq)X)$VZf?b_Vf(u3QqSUlQmA3J>sTfx9}uu0F`{>1M3PRjB5*XFkD?No1Gr{}63swx zp!W!w!V2k3Ho$#~ZF_dlO-Gto{{f8XG|>q(dgBl%5r*jg%w=AzlB z=L|(3j)2#8u}M70*;CX50yf>@5+GAMBT6TkO4x{iz9m>tZetmy9n35gCI_CXuPF&K zCzm~#04w$FTv&7}QX&gIq7get&<+FN7IOI?sP?oZeU^|Bto)2Hq+mhFOH{NEree{< z`9vR)Pv{dI%v@smhsjh3oInKSG%j6A$5EzkjSVZ$)K%x&EOAKOt~r@>>D~nW1$-b- z%^>O6IfAjl9iB~HjN^_RT$>(4ZJ}?HvbnU- z@{z@s0xWA0!jp&y7(G}z3AxKjID!+Qpyvm~ds4E%P9#Y37f?RaTnGF=9RkIl1K2*w zB?%xn3KX)S!pvvm2TRUV?~!-_lLVjIwa&Vh6n#Q{n*{3#+PYAeKP zL6QuHtrA2gz7Q^JvD23`ec%tSv?Gyesn>{n2sP)s zQJXuIK28Qwxw{GM5ZtD%w5b)VgvF$JX{i-I6XGGG1kD1pjEze*x^ojsY^6b_Ec*v| zrT~8s2}z;jNPr!pT+*ZB9;|}O+DZblG(fKBS4&n+~>Fzghs0D{M5r2VA zeRss~1EfcYjxhhRg?))+BozV`Jkig5O~D9d=P-zpXVK}r=s8}^P^HizjDiF4x75i* z6-T&en*)x9i6DXgUM)_4Q?N*EYSu=TIS{PMtq1khKjUH({S?&zaCx>Y{3;DyYNS*i zR=_rP#J_z*ca5QK06JVl@mkLlqCgtPz=I0F ziX$-bFe6$2?XIkMjD~#XYxzLNxTC=M0`Lkr(xh4Qgome=COT@TLw(Dl$#?0 z9IBKoQuL*P-A$~3^^m*^e4bHob{vgF{&NpgAh)5#wgx=SLqR(!h2`lWFPGvT!9BSM zPY@6U0#GFBBibrX@m)ZkCVNswIQWNH8$lC?_(;%$}$aFfO-31bTqsl!7>&~0=`Tb9Ni>!z;43L z1T=G@2(+G+{sm`C|5z;3JhK%uNs_S==5LvjDAr5~ZHOCa6d)&cu0fsYMqGa=(Pgc`Qdb(iqZaHpTRqa+np8Tah+C z7Axss`j7s{Tw%8vkV0#X!g^^42rI2u=y%e@%QS)HM9%AR+h~`)gkLwZk{ia;`XDHaPpcy~y5C@fmEYQGo0m`jST!BWEmWE~nV>eQ z(hA^wk`d2Dsb}F#l5zzz@HI>TBLe{$VZi{KLF?7q;$krt0OWhP2Koy>5B*9Ikg7^m zO=Z&0W+<0z3s~V00@%+;S-g7-{>O5GHSqOKDSMbr5`~2LAW{cW#8TvBt_SA`^DVD~ zM_h$Gltlnk~DFkx1A`F?nF#~3YbSjrnD{(3J&WQfIXyU zK7Zak%N+zaBh@hWv~_zA(z91D0tl%z-Jhyx@M;&Nb; z1DXl4vG^QX2~jkl)dhox8wL~vaj_Id*(h^4E zf;kSnL_SueU=dD=kV*-P3g_0&O5H(hSdvU2W$H5UY@jW)vM0BOc`hsR3cWkad#lz` zeg>vT=}HrO*=?Rc$g(e!ksncCNk}@=%KFmTYPOrHHMH=j44#gi4L>Q49|wDBBqzDd0d zo9Bzn3hhXDD|LFo_y=V^>QH*4r7r5`QJaudv6NGc2*@*BGN;0*9O`JHQlAwCmoQ6E z7x;mib2Jy9XXR;)A@TT37s0JO598*_rx+B-U>JzlHIOu$^hL`n`B zU{{^3+lX>fg&(V==DZTp2O%S%g4Q{>HSa_Dx4|Deue)B`T*!`QWgVK| z+UUDswchM_CbX{l>_o?J)qlVBg>S{?lJRzavvNcJRJ#A_m;H5vFWBGoylHm%4!kjS zacE;m=YLI*myge@7kqWURC{h;8Giw-=UzVZ(AyLXf1kI%rCL7{In>fIxT(CeXF!wQ zGCKa^!s;7?XBJmo)$)^6UG>qiV{Bfd{&1+dH+ML5Zu&~|xAX39zxLz9i>rFg{;Tij zIR-xYJa6mphL~2&zhp^E=*G`cJJ@VD>zUrpSco#!2` zUflbB0vxt4udtx=QTXEi>%L=;`d!`S!_MgHcON}_da`-y*MX27n{URs=N?fw&3W+y3r2pcd&jNSOw>)b zw!gH29o*Vm^yp#g%Rimaesulh3F}az)>{8)slQ0`%E!aX#=KvA^lRbo3~!^)zMJ<= zf#o~SKjU3(tN+`-PVR5LzpZ}o*_CJaOdTuweCl>;@5a&8&rWWLw*EY7{_E7}!1k}E zM#k)xde4BvS-)qXr?dasl=b@5SA&PXXsMY@y*2ga;F;v=Plr!`J0-k!YPj}D-Y?(1 z@o@b4&dIUORa0HVn>T%PqxYwQk2?F$PrZ1%|Dx|U-BLdJZehQ7{NPK2-2;P>;hR@K zoZWh2h@O#n=cS^DVaKhP2Nul9dwz6Iq;=&OvPApw;4HjV=ZoFk=|x_$jH}kR?47(4 z-qJi8zO&`i$t!!bcLu|)Q#<^(OY^v&W43vI44PP7-_q=B{juntPiv_by375SQ}+Ma zIyx2q-R6&{&iZd&JAUixSyJGm~d z_xs^{8+w19jQ98def;~B>V~rwlPO{Szdic6`9T5#I*1C=srPIlABX*pHAufd4V;^A z1QamJWfk68(AzxNCME-KAp09awVLUsG&3f0ob;?wVNx?ix6 zeVYHHK21aCIB;Ps_Sk_pO-h(f2EENKTC_=TR!qK1l`Uz33JgQRU}73r?WhhK2UfPz z(^j@|kP8w9U0@jk(H_A+y-eqOs>XCKZP0|_U(2JAhCI2yZWfT9+zHnC9{~>>2ow#v zV9?gopbQkk0V?5sB0wd$6Tx8C*8-Nd=>-_)9x2;e<~^LID*(qGSndJD!r%os{QW*K z+TDL~nmm^b?$aipfhXpJI8%%94E%A}=gQ&gV@SQ5@8b9+u6RVz37&1fY<~HV=&bm`&iA|Wd|vhlsn`sCVn3sZlCozQXW|Y?M6e^V^oZkH08)OHZ}lc z8Pdd+4F1GC=|W1G1%th4g*XWXohi^v4KsHi{q{Du4Q?Ql2@Qk*eDHs2+=C{#k+mVk zvRTp${A-pOd42o=*ObzQivNQB1hElMMGB5aH9-MSJ>`aGzaYxTVL^T7$p4tGsqNZ^*aFe7^Hp(qh0at{8gd<_$&^?_VIVVp;pl(>l zSU8XzO_TeGV90`q)%m#;jl?Q+c4HUJTVQFNAQ#(Gg69$tz~s)v_G7F%AN3(_gL<7C zkdkRf$6SzGvEhn866f!53vfyl#i!-Z`;R?ndl)-QipEoWg-jxWB2+p}@To|9TL%05 zlJ>9pTslO7egR*g3|M52CP>VoJ|RqfnCsU*m%l~)l^jG6Zl>M!~-11ULtHM zuvgwr1~Z%B+!B2qMyqbr%#R1#wCBuWL5Q-;UVxvr_2~Nu0I6c)=;ho`@^o^MGL$%2 z3$_tBGiPh=br5}nK0q^}C@vK%ZSz>{G(YbIqkM8MowLG=E<{Ks5j%z2NTm;UCzte6 zIeII1UsXt$ZAU86{5@GrB>H4p&SEW9fEzjj=+80-KME8P=V%pxC;)4Iag8}iOo5HP zOkhtC6ak))Nm3Ny);UrT&cx*yxQHB37`ldh%#X{>p~CSeDrwsl)Foq3S|bVl0$1D9 zLIgX(ArHU~d8P$Rl49o&l~jSU5`r|zN-NtD65He72RP?oCQX}17t>9-6(Qb$m0avosYi~D93gtQwU$jRtTxC&1;m>Od?4swy|Al=K??d5@V zDz8>-6?}`hYOf8ReG`M|wJ~LoNwOv%(^;`@HI+prm!?DNEPBb3js=DAX=rN&S4P}zY+BK*Sr^{k895FO=yT`Fd!jj5rIq`ri^JP zz<`noQp8&dA014BoK-DmdlRRmUkf|b?2Ya`5A z1n3n0z}03j+4wY&DEdGkwu1dN3={&|K?UX>RX~)7{g6k$q1}8I9R+7**vSjxWD;rH zPbLR7DeCwPW8_vSlSa45|M+?v5e0#s&Q-WgACNx4!NLM(dt4CZ2mpyGgEBoDGhN06 zlkt8|7i$I&fXiDw*u^hL)pQnyf^TalMF1W`R+|Ohituy?bKoL;D3=517AQ(kP)}pT z?ph1ML-{d!15JJ1BUzI=3j#c|H;@@X*8XAM0>D2`G>_9e13KU&uLZNa#70Rai1YvFMjIC)b5T7ZxQv{Ml)`l=Nzp-Q z0+L3_+$a{w)@V@R9y0>43A|hXx3YH1WJ8tcRvfjXXQZ2WJ5vVeCBVtTRx%y0P-I#y zdja#)EEGit$S8Me4G_2X+|Pk-auQp*8&7M;--5U@NZ0_UJ1931EbnQj=c7tJ>B?jw zBJvd6&3p!t4K*l}K4T_4GsTQ!dIT3?0gXg}yFCYy^O?MclFp)oImn6Z6wIH&&KxYK z-2Eiz+lA{aYbg}KPB%8UD0vLbPLx&mH zs7ZK@LRgmN2;3ViDH-8=?%h|S&RaQRN{Oa0yQYx5}>Qt zDyEx~q#_ZFSbju^ykF~XsL9k)2hcpI9La*WRCy3yJ|Gxu0oa$^Oek9RfD$rbazjmX z751PC)6_%*D1$qnZNDtfG^!F%NT()hf`U$>HB_)T6@oNRgh3)j0kiR16aue15n_X$ zu_5vrtwpSPA}QbT1)`v+%fS5lirjS?eik*i3vRM}T1k(?$#wWmyvu9DMaOE~Y7eUh zaPO3o{2BaHXA1~JGLuB3R3X6trk~PDmxGsgMCbvh84HAEy#27^4MgMMW`ftNVrjrl zP=Xb~P$kS0r!o@KY~4wYwn|x+NtruYsL1zbk$j6M`U&901CBioXkOsa z22Mfn0bImVkx2r6N+MANB`(&xK}b>-ApvE}7$7h_=>G(K9b5)1r37&EQ6jh)T*)L6 zFf1v4DnvpS!?H?ogd1}35fXf6LIfDaM8K(9ESs49410-QWJ<-s zs%wIe0=pqI)gz}gTVEc9*iKsy3=B1U9MI8^LDegbcg!kvLh@h3^SQgrElWRCP&c{z zT?4_c!)+W=-poCqAU>8T?c&>P+B)%uobYFt(hweqyTh?2E^IM(thVEw<|=*$@-^Y` zHig$xI_gDedF=y=qA{13(gE_-St_U}>jspm2xF+*-Cmfv0x5uuQX_#ae0Dz@a?)NINV6)lc4-<2zSlkq1wIdiYkTeIAy+14t9j3 z)u6@m-<>VPAl8Ak5z3RO4xOP>g8n0?91x%IuLa7FL(jm$HBg*wg{vmB1=Rhz@GM~K zONOXr##e15bC+fn{1GCSu2wstD#v+HHklc{8LqHL(s99|sQTS~fXVu0;ru&%Vay_& zz-IHqN@w^O)y2P5@bZSC8M?D8R?phL{Na+sJulnFQMxQD&p42|xc-D+X9W1_8QRdx z=}h*rfzY`{UDr#7)&=&OeX;t`tZ-uR1w}tRI^X&0U2Ym@`qslP= zuZH*d*Ew3wjwhtg^;->7d0fl3)gSKquy_5$LcXm>J_i?Q}VID z##Mc{can&%A00=_s{8zRJ$dhp%#W#VnCO__^3%x2zg)X<{$*lp0o02Ccv^UaFKBlC zGG8i`xc8whczz${Q_k+4JERK=-{Z@+X>B)Zx6YbOUtZMpFmQ+UL!WN;l)|^tmUzMk z>Hiw|+J(H!+wXs-uQ{xJZD92I&>73+Q=t>`&7q()$$#~mP*>t7k7|OmUmgzSKbf6a z-nDJune#=nCzM)H1l0)d;PYM?eovnGxi5a_lx}i{roJ{Iy4P^)moa%x%e%h#_|7JP z)dPtu{{5ehXjhm9SI_BZhO|Z5ALXwcT$w-R8#c|YpX+;JMq=4Dd{D0}TJL*J*V^wfO5ar9GmNe7HB1$~Q~z+}udzi7M&B%HJu&vz&DxQ{{yn{|qub+m z&B=@Lebha*ZMZx!v2Z-DvuMwa?|^8e4W0UI{QEO4_a@$Wwf~s!*}9hF!@*-M6LYMg z`hI5c#pkpQLs?KO0{DQNU+ny3$Y7s82q!Fp7s<2bgDbaI`yN8C2kx(5cH_GnhqpT) z?U>!abnvz1MJI+<%xDEa`K5`zhoj2Q_(}blJm=qHe5XDf9qr$qI64LG*uSrLS^K8& z+XMHW0XeK^eyWBh_pdzuW-BxjyeDz=;V;Yk=MP0S=4~85smz-{y1sF0^Z1*IXQO64 z+#GjEQ$I5BUhveNv1i|JDVuo9uGNfuThWp}f$pep{nNh@4UWJ4|4n=U*1P_@j`h!p zZ90$iZwKJ-ae_-yKFnD7fUjVD&jYMXE zB{hA3{*pZ1@EW-l;F;+{$4yvIMxP=*=5o))_b`B4Xb0`C^c^6dZ)Kc0=KDE?_WPi^ zb;MB_M^!a}R%y@#`Rq zlpBat14u_j-}M+$E6>!xVNb*5xnTdCK@$l=vg-B|Bo{)D&}0}$g~7mg$Q+<&JrPe+ z6bKnt=U_KoVo|CPWvYomzJip$h!itW|9mR*(5}8g%;nP zhYv9LGV#BOdmE@G?zC?>iK#ccckkz6CX)~lgqi#k1_)we5Ug7A|7Q{c@|6$;TP-F8 z#jheCer#(OW*jh5zd&kjx7!M3t=-$!YHhc>&+Zmdq}1-Ng4DXZ-Bv7X-EOxwe2LbN z=c3*FeeU}_&pGdT-}9dHDl>9m#>|<_Os?Pc`?$QkUiJj+KU^8*{7S=dCe zy9W7gW(1BITPu5c9sM&RuSDTIe?iP;!ga(QjP;Hr=%A0@%?YMoHRG0{X7%!@{SU42 z=Ck^0+k3-29s)&yK9>)rYX2zra9lIP98FD_sdC)g3 z#y&Y4m66!ff=A3k33`{tC$5$u=PWG$tXtAv6>oEef_zL|8$vC>N4l4+(UUaoDx%A@q%wx4===^kir?I|K`xw=!5Ia!Yi~^ zeJlk7V453BHxVNcy1)LlNNMmq#Dt@e~|OLt9e6MPz$zQo=1v}^ox8EdT-d)uK!@+s@+6?VsmFg z^8DYgsoW)SjJ2G7)KSKYI8~{4;h)>UR?sacfqUGaTdkn&N(;3@0@4T4IU((! zAi#uloR_*%r%pG;Pw+IwFuXgD^MOrkz!;A#IGx%Ai#LjmTJ%vB1oyQN^FX%RaC~y zs!nrMXtxZKv%S{O<86%F&!sQlB!nH=E7UsKgVPvOHfX1jsT`u;LJ6T=K3Uww{6^MWL;Ky5aeb(- zb@axAv7Gu5y~wNAfU!r5*j|mUkJ3ZtCDl!p5yJz?tY*T&;5k}-8a1CTH}o=dsbze$ ze3j{=|8$W+asT)jEGXxH=f6&i=>7O9tF z4dSe$teKmop^RSk0`NbDRD3(bF6j*-nh(WaWtBxO1yZ&v;L&oU?lY)6R4fJc>24;T z6o^FwvLgx_K0)q~Ow3#dJD+P(8@$pD^smuAgXB_a7b4EW;ph&Mr^Zc;Iv%NG&%p$6 zl_Dw1E=nDQF|v@5!c#)D+pOY}X$8x~M-A?xHTu3?vR&imgMB;o{|4#^1rJX!8qc4> zT1_wu?mLv#q@si*B?mG=VCxh;ND&R60(O;RuUcfpgQ3rEJ}|Q#04*%5s+&}1z+O#C zj^zMUC8-2EU@)DaS7OLS0ij|PYX=afP+UNnh5AClJgDpUumxaL9Hd7DUo8p%5d@A#HyQW+(KzdRt|r=vk%tGe)J1IjT@&9@<7mV6^%rfr>B;u5k|H zPOSobnP~}Ea3`MYHAZNPO{3DOxKX%X4uOHoLLl6HE!H9{n;K!jc1XWgt{bEydcM$d zzRf)lhWP+jkp6gR_tjEnQQiSB=&4(dljKlyq$RXZ&K>x45vqXX18vRrL2gVllwljI z(J~8HAnnw_jp~x$#5j? zdd!l-FN%v!ca4oyCUST7_}BSv)+LM_pr?f9^MT8nub-cCx9)y1We5y1Kflpm{@Y!{ zj$iz2+O}Yww#d7nH*4MYbtnhjT)-4NA`B|_j&EJjSQ%MJEnB|K9~&qw-gNib{zh_B z%M?HP?WOh%UuWAGFInm+&G=30exXia5bvXjhcVs89UVQ z@xPz{$&;&YJyQPhsRM)cJD+-N`ortbUM)_2Ud*6xS8sUfo$2HIZhZ3TixYgxvqPWV znc9sPf0^91|M)BN$-Q?%tq1;8_xn3_5TETEcP@WwZB1q^885AeZ?=xtX>yVyTWy85 zVm#hptJxaay1fG5%={=LW(@mRk2Y?+dnv29Y<%lSjd}M!)?{QxO6wc_Q)O8{)+8E! zIsQ324ql3^TT@w$RrjCWR#AC(n=w&1ji)T_#f|q@wl95{!8`L%w~k`nBulPfVX{ zJ-PRjucy9p7%tLRmyb2LmU^->Gnj~1SiQ9|Ytrh?a9k9|Y)oSjzs1>U~3 zb8SMfqWu2kTN&Dsvhm?djf?JjXAT@(ZtH5YMoe#={xkQvAp*y}_*-v%uH`CsJGAHIv8lA; z1JcC$l$SatQVL)C)r9}$7<6*~^agVB_)d3repjyVCmST+~apE_N+7v|I+51%B@_q`gL`-k5y81hV5@jMU; zjzX8ewh+XE{r=+Y-D7e+UtvCl$IjB4sS(}GGN&acH@iM@1xN(vot@bpWP*hNX!->_9gzdT)B@cJCWF3 zcXkZ7UfYJN9|wvoAm_+qfxZ+_27b33{(576qQiZvS2YLmr9q+rT7=Ws{PA)a^RNO< z;Qms6Kh~({m|Cq)lMQnVkkz5-$6S0j7cURdGZ}Uwc@vY*o`nx&zGpxvj-sd9#8xHVl=0d3`q8E_WI5;PmdTy5Ee_6mO9r622<3u<(M5<6JX zudgu(I^2OZqQEj1GCwT14vECnj!XQ4S*bZh+btYr@-e9@dnicRXKBbgoC-=y%__(% zV`O!5d!9=A07f6$2MyUL(kWJej`yHWT?xrjP*yoPFH2y8Y!D$mD7;|ACvk%GAj}-c zMQo50Tn|vI0<4fu?dHI3~vtHoE6o?8rElpVoNUBWjHsKqpj}m$WD8FWLv7K_tbJS6Kmya-9iz@GO zSZ(9xxeJK9q023ELe!q9L}78pe9+iP)M?G&wyRnXokp2GXdcm)BJJmzVIn9CUHp71 zO`id$h+z$*!h3Mcwv^NICG2IvnKq0e49#o!qt`=ol{@uH_j{ET`@s>DQ69!Wmd+Wt z-?_?rO*^{X5AI=;H0yTlcEkFUl*ddaaiWX?hDSPBN0jdEpOf^w% zRjU#%buQW;c=Z^Y8^r`Hpss*v>fN{j~?jk&1Dq7ps%fBT<^i+V zPV8rJfRFca@pTeu>oB130%wP}xq)zF3@O3xm=*9tC?QAn)8=P z4CIg%TRSM9CAyS$uN++zHWfozm~PYxjE}|C8a*;Igo30a8W)MCZ9YRg(}d9}XFHk0 zc?5TAJE(<*>27hK+p>Zx2L{a=+(mmsF0M}S$S%^}lJ4Hr=ROgluSrWX2bKh8lA;LP zA^1`(rV^xus?eqO2rf=?s+bgt>)NG_vK4pwmm_ig=zB4La>+G`nLD)w#RwIMAbSsOqDFRn&ZTT{K zksQDm*fv*eE!^F_)`m2roL^YVJk40xx%gQmh?x%tQ^;`k6yA$j_ii5+6G(H5tpGI- zaE`w7Z|+Iq88!2W+9|6YAnJ6-F<4Z`s)Js)Kr9L~BLrC*+i`=nk3{>0rqKWsrOhTU zs2#zVWhos+qq&HQ5?lfw^V3o#Mg{F7G26)kwuu=*h85heEwjw7 z(LOn<2cccyG7mW;&q+y=pr*_nOth$uMuH514jQ!=E?EUDG*QGxYt^WSb3={l?t!^G zlv<9y%17m^nnDukV};gywU`iULRY)2i<5ed#@R-WR>d=fRvB5rhT-`ks1T)X8D<}V zOm_MWO6;b9ZkWrsSf!vhj#8TI_*Cp!{ZY?SJ^d7GR)H2Y%?!Nd4_uo#7xD1|3ZXq6 zp_iVD!um9(1d?R}%UOnwhB>IweKeEDSTJNhs3^r6c8%pAy$0guR82M}$s=pB1bEiy z9&x7weuGOLA%^M8X@aNE4>)O05!Q z;UzZOX25UKK4f94RQMZ#P71J;32|y-XQSL=AwfBILRKbF-CV0;kiZ~Sw2@aT6G>J<6 zLFyo2ZistOM5`fcdxjQb0bKA32hj%vq=428Wgq*^LInxUfDU-%Q@|7{6k7P75CL%| zQu0kIzGnv9D3Ww_tSXrk3@UiUvkK9vLJ+tTtqSg3xPFn`w@x=?m4_ER$2>(D{j9Nz zs;Xsbv0u64F4q=8X`Pkk^ zGTN3ii6N%$X)kJdLaIHhua|~MH8?II%-#47e|f`Y9x~HIL+H19^&1F4(5fSB5ep9e zfF(b`@^dSBVGgDt@-Ty9&kzr@n8~$eKuU^5GeH=pgzF)0voy?xao)dd=E_~K(odB4 zR)OiPuI>{tyRzBJ3x?C&L@E+9cS#+5hIw`&S>H#BrBPluNA@nR7Yx*xgz4mzP&(m@ z*)woGlyN#0roeKk?Gw@&VNoZw2)AjX4{4Ut#i)%2GlDsyqs?u!3!c0IT_4gZ=XmD2 z4a#T544{+qOh=MSXh*fMwz|VrO@zLA67YC~MUr?=WRjB$>l*7OG~2T>b1XM4WveS2 zwPTK|48w$rs~j)g8lzht(PEP5(?^^*aqCC5wfJJ@t!GvwY)do_vV*lg^yKm!e}txM zjBpH_CRWg!tu^eVSMzxDhIYXG)#iV%t}*MU z3~TSdFeV@0=>CQ6>wS;&%Y>7!U%xusHP(N%u=zmHb=`a~_1ZsNrJq$^1=&ZS#uCwh zK`63d+jh2*i`45DXKkcv3`2F33)nK|QD3pAmYT%Q4DE!oG;8b9n4HYXXD@EIEY;*> z4%ZK74QEBDvc=ks)RR;Oe#>j|ZroZ^TDxE?mZuP%Q916_CO&iOH}{_jy~IXVJ#yf4 zDD>~2y8U@^)`>!H{g+QPocorfZVaA(Vu#_YK6&bQ{Tbx?wP|U?4b#xPJNZ(^@rJ-u zQP*d6j&bX@AG_c*mX$8`z#%x;ob5Mb$||xVW!8+!h;CuUf{(P@{F5GSqVsMH*1{1t zdLm_|Ii5-SeT-5N!Oj!mK!IgTBMWclb`SSa=Po(d!OKY3)jxoJm$%q{;B!?hp#H+>DRC2ns{|Ml?nhM6pf{FxZK z(GPAHjU2GLI0*ddK#m~s3Pd0=LcAagkgU{an8|3s@HY=I1rp$I1Mb6uyP#d*^L`E4 z3|>AjC}X%gdDxlEli|w+><%<5W%mK{ys!r#TAh5_ZI$;y&k{CsR_DvF|3VWMm*tr| znwxgewl{@2D2&VG{(fNQ8W_hYzMkVJ^=Q3M_S*tm*5OTao2kn!Z zg>X08El_*ZzsK_nU_fayp|sh8OpL26cQ+<=P(3)#Erm5+O%#_(9fsaotU3w0oo=ui zAqWeCe|Uu((2*_0t9P@gsW&WBC@GuMs3GXAx`%T-*rbL;vYku5HS3*-@1uFAgsC9( zQZZBMe4vS?%{e_us%uC3W;B1qqK+Xr_zZh}TeQP`9$9ERhFU9xIXIkQ2Ir94=^= z^66Rne3h25`U`QT=#!3$$xLrcTerQR%hN|eO+QawBg9S<`Cxtz+07l;vE+UUqLvBi zv_`$LWj@NqDRJPS)?qdh!(vc8q-dBiiv0$I3*|kuAZlwrsIBAQlUcfeGpz8LYHg>` z9W5n~SW?<7+It~HZ8i%g^{q$bU(&R?KnjE$hvmNJaK3Dk#t!UZEbswu2S*Xz6m+po zg4*td26?w$p^+)2f(^P&0XXeF!lfn16;UQv!#9VOj}e1l$pnW(7s1*#I7DG9(6$EIUQ zybV#MT`*hBeU<_QLMhz3iFU5QOQI3xRE~g~NP=9#%@^kvfbU9bcU6VdQf@d#!n;)S zM0->+&%A6!HT^CkpTKO~Xf`b{vcWBZmx;9sNrIZbK%y4+^3dl_a-$GYvL=S{FpzV> zEZrL~MkNL0P^TdA?rsRuJ1!Z7Fj~|1hC8a~)A4;awtT5()u170nSW>w&g0sAX)IIP z2GMBt2jY93sUnP=Mq;Ply)1=}tCg=(R2S7^#APYVh(`|8ChF?LI4@!tN zmXenG0L&G$+Gnr~+pM~8c#y=y+yhc5LQM5l8qa2a^d>geJX`lL=i32{;IkPHDDaY-U<)yg5H5)>OQ zi$~nhL2)1d=}S#s2!>3dFtoswT^tyQD29)ptyA)LHXE1&qDbXcO}vul6-QZ;bOHtx zAx6b<>_MrmX;?q|ef|QcO0tC&FDzNY#12z$u@S9C)5}({UfUe^93ID!5vC4%oH3r{ z@)$bCo9G)5W5HfU$)R1UME#j|)y5Q@W^~ljfxKj#%1h6+nT56^dwO>iwatB}n5jIm zYiD2732s8*a^;B@v#Y^BEFPDQ^ba**;(xWBe@plr&8qTpFe;^%K8>%ht)=?CFXkGr zS_VmktFxq8-q6WI)(8`LGG)6Zk@YV~n`0Q}MmA4Z>U1BGHb;7UGLKgXloZGMkX7_dJvy`^paPXYS$hzLpF8WxA-8epdfXdrBdDmwnot66iK=2pL>s z;fLPL7c#ALds90Yw|+5YzRLE(z&v)XUa&WCqc{@RXAP}rFFL?h?;n2VKTqBB9L z(EaMr_^z_VAKhutG-gFa&5J{iSu=7Y$LPj6_cb5aun`kollHCWW2jwCq$cgAXl!|4 zSy#@F#@k|YetEY_b3XU4Pe(p{`mrY(Z%&?xt9kv?4Mz$bW5>FR`d`a$v`&1%zI$Y7 zP@bsje7AgTSMmOVTvP7C-5U}^U!l6-#ECZl(senhw~Py()Fx)$q^ZQ(`ug$rOP|^X zWJOmyyt*!HaaqiQMonaSDG1f5I%~xF@r&yc*_(#;#wY7Pj(EHo?5*~Nxf#VvC#mf@ z$+xUhBbbacbF%Jcwb!Ig9zK+V!-y+9l(TYNvn}J$JHHrzq5QGZciZm%x$)hXCO^wR zIXV>xrDn_N=;X0Grl+_6>i*78N-qsQ!QLu-Z-32KQ(Wtf4RwDQ%O~lrCwJ8SeeBEM z*>aYT;j%`{RG9`qVdhQE_KdCHZa-A9II{ii7Z=tTB2}8k?c=4}VCGNq$DlQHRwev3 zr~dBtHyc-vUo6X6bbrMm!`-2}jFkJ{w;Q+LI;Lr?`Mdwyg@+sGMQ*-X^mc~-rt#TE zO&As2&T45~@a@H{ckfQVaQwrMa(*-Mr}}sA-iy0={27fxzCGb{-O z(2HK1v;Ee(i#2I~UOR5pmyacgsOyXjakz-lXIRLAHP_`?z}h_ zrZYC*rLO@K)DUh=9Y1_#UVDvUx;v|}@bCWn?O9ox3Nj>wlhfeM8UNJyKhEdhI`Zhd z&rSaM!*_@8KY8wa%dfv4le_0hHQe;;rt<}#etB=#Jn^D4zOl^GnK7^Q?PQL!h zv7P6hI5&3gT>94;_mnfzG^?!;r%~~5>;B&YnEwTHihx@g6MA3%XF6Ra1UqmbU(-$W z=6^Ht2R5-^o~|tTPY~wUS?%dUM(HT1pzyr!Aq@4lJSEpJ1AOr;K$15Bl34!>B+1FW z?z&?=JA+@o0w6Pz2lIlKRfCmC1~O(DurY6*o!O-b^kpuHmvha;%jI4tcOE)>fXu{c z!wl7t4`wpyzDF=KPzH2tXZhk2b${LTbxi-Yd;Yx{{lEY{{yP}c%J;oGv%L7#-|nsa z7M&YHo#;EDGD>*(YVh}AlRQe=h2#IkD$CsYRvDCIR^b>L&7aw3!Y{{FXQns_3JWxYRQTH1NZ<5P4L}$9mn%tNG;}J?4J9;KR3&jj|Jt#FSDzu zot#ZW<`Z@qTA9)(OUvj`g3#m>+_6%hK}bhKNe}i1X;+uz=;%1w%jo)o19tU1c|Iya zyB3k8O_x)HwHw?6@ZTFCI*zOo#E;zb%9l; z<6$@iX6A54KFNho;tKK6s zQ3LT4hRn*d4D{P(86VIqqR}u?rg(5P_R;g9!Ipw8j9m-y1omNe5Og)UwEYaHJSf=n zExg#}1YRL1+qRfN;X(^;##+F3H>nao|L-k6FI2km(B<+|A#<3~(Tt6wGi7yjz->kD zH2np70TFtDbKtedPy&Pa0!FDfm{qzZQVMk(Wcv@~kuF{+;sqbI7a(ADIGH4sXXm#I znU-b72lCWLYRJ>T)iRwFDj;Kw077SHH+iAf^a`U58_v z)C$S2+D|KpN$rEKG}Y7&NQiD#W1&?UKTGPB?6Xa3lc019J-q#QBq^KluFI#EE{lIq z1Ca?y%4EG_j%-~+m0iv1(1&r zHOC#w3LNqg-l#H=BOz93DHmd|l4`VTNS33RiWLu<+f4~Nie3_CR>=)kt!{|azO3GF z+Q>xPj3$wu3R;Z~qAS2N#X6$7>g|+_=y?W8z^iWHcfdzn1R!{ygV~+_653%=<#J?? zz<5PPhC3K2CI7ZIE`ZonnwEyDhpw9Cg5+6?+6cm}#D))YI2pJ_lga7B`E-D!EJ296 zd<9f6g~VKaSm-Xn1IdBtP(grB)T=D> zZAN7*TaVQ-?BUsY)z-XsIH)+ijIafrqQ^ubCG?C01E36pjH+cJrw8%IC`+GZu{VLs z_ja>C5jD&C#d=QDaKcMC7N3Gt?q2?EZ*|LQqO$++ReGo)I~-fBUxKhI$Ww-1;K+cW zn`3UOW_oav6&enJ9I9kcV3`>QOG$4r> z921z`?^d8USoK~tYp2vAx?;^<7b;<4JZKX1j+^u|o|*qZl z=iHhu(ayXF&~z5RyjNrkcuKB5{&a5|Jzv=Co}I$+K^_VFpf~+SwK^RMCb}BE5!k^+ zJ}@hq)F})#yN6~EauDvoa&Rds-k{V2W=b91#hWGQai}v!P6fi9< z9LrW#b3zg)I#Uc%Z+RNCx61666fHEP++F>?8~XZOkMIrfI|G7IKk?98Nx~>AvCmMt z)A$EqiIK46bqR&Kf_$M5Xi8nGCM*_@O0PWi)jN<$B)wLl}8K$>#&G1*O@-EPjuo< zsoN!IugsRo)V@MZ7`HJZE4D(!{_bwR*-O3tlb2&zWfCj)adF&n%1#Rs2V~w+X%1j! zyC}ELfSOKVP~b@#b#5K8>B9>rKWB+jr|79il&e(DzpjOr!pU?#;{&?#Iq9?cr`qj1xjV0}q)* zUiu>q8ouSZyN=q@sf@lq3r~_dc^jyurUm2>>ey|2iO&_-vx7jsI8I#x65WC@IzP0m z)AkK*(#QQ0+#JlKOohvji@lSQPza!!`J!|i-CZjf$_0IK?KQJwG^LY%sFN{A&K}kr zmTC4OeZRQu>OmPOie9$I@CW|N3DtoCRyZ!NoyP71u5y|)ez5m|w0HP&OZjzPG>`Qm zQIrqd4sk&PW~BzI8(iTzmYB&Vh4j^F1W=ZZ1daL$C)`TI=P(0ucAXK@#;d3 z-_N?}3E8>~q^v$?E?K_ZSK-*f4DK#pRv3B>C(7@{Hh6c$-vzoDuIymT$aEcE-Vx(% zS+rgzsZlBVKS}W<6hAio0g9arGV8WKOwZ|kq<-q=LfzuOC)WNWCBiW^hB4pr9Cp&; ztJ(fJd$Fnm7q7V8W^F8=JTwRi4z*NTY+~#`GRNzwnq`rfM^?W-m*&#`M{&a)s0OTUO1=$nM`4-;7ijywdvaPro`f{^Nq04T>hmv+?KpAw{0INoy!!b2(t++fQZPMuzH9n8|H|Hz z^6>HLkU6*L$^Ev+*ka$LW?N0>h;~E^Dyy2U-!?o8lY6$GfeEJzb;au<+p;RQ-i+Cn z^PT?7cgcCr@=?WhfG9PqCl5^)XWqI<`U`CD6i&Et`qrz*Do zdFxbib7Sd{b7=YP%;t*vZ$Hie)!6Fx6)_cwp|*}aLACkl@h2X=mO z|BKf?oA`8cD&zO}FO3y!+WTAnPViXGSEtWSv<{r_-f<4(V>kHU3X5-~vqhPSrimC& zmi94fjx*76bNjQ!>+YU;yVwt&p_=;0!mOI$rF9=~-@bJ+7+f7(y{%&Vt;x*B)nhk5 zZnWGP)MO=OtiBubMaA~%s{UmUfz;4?xVZk-nasw`f8Ktt*%(7AykWFDD={$rR_42_ z$M5~&2D*M^;?JIwzrXXy*!i1xQa-$~f2`$LO<)?eeD?g<`LFMOQ8BP>{oSffd-^v# z-tsm2yE)_aPkz30V8^-XbHCgC#eqXV{Qn=;B!HZ2Ml1H6XzUU*rStCx0oWJ(_lmJM zK{00i&x)~k>ZdDVk2@R)z`k33ssmh;kquC2KbUl2zq8gvGpu6fL5je&4X6BoYZmX$ zAa|_208=3AUdlpzgLct`~VN}1ORMIqp8^hzUH)~=j7rF3_t$j^sUuJZC#z8kf4q5YgAxPiPr{O0?z zH0R8GJipiH3bzGNYA-g2F6;HYre8J3tc}d06(9rf%mz1{en1e$_? z8)OwKg-&I_Y7k573n<`bkiy6)X+c5fV>P_8CaC492jIu3uY@F75mN&Ei{0Hq*Rg6* z!Q|}!Z!8o)tYDZ0PH{5h7CYh*z zNP<0_Ajt_r32Usy>=K6n+AyqL39s&Q!C<3ga@>ypXj7%M^SuYjX1*#wkc@c*yoazR^?X{es|5v$W*o|B2`bPem7;)BH>qf}3p8HFC_4kQT_v@B#-F=JhOdc> zf2O-av7#3x0cV9YYQ~`w4z{OoVd#L%BCS3)D^BwxAyuR_0Ag|7Vr&u_8qw%#EQ8|u zG@2jeYG3DA9i=ivL^)2CCeFj0Af$1R>W#-k9<$sl_0H4R@@xU^qk9)~uL@^a-<~Vn zkiNqdVr4r&8csRO<_aLEV!RAmsREh;1wa58Ey_OIJFH?skbyqIX-4JOHE^9YUdosO zO4M!&13ZXUWvUZ6XFMcY@1}igy0NFn&1|CGw9O57!&LncOdwVsBnmeLsyFRyuoQTN zXjQa;U&eM>mTF}JFcpSEl@MCti&M)Az`M8viP6NZ-V4ewd{B}R4!*3Vg=W|YrqPN~ z{)5P)B|hkiyV>N_Xqf?ZhaaOAD467-`69{~&WctGY=*(@%O*%vaL#2wIz?Rk2ZEkv z)Py7lO3ZnT{zuS5Nh?I|@3L3T{54 z?CKs$;b*95cRQz`N?5LW32K{h-X!V!KWt~VaF^gbFf8kKD)oqUs!ZzSREU3O1%Y$3 zkkl*+r#jRxQft^)f4<%-pn1#%+Cx$!7WobO2xSo|;IX2TNHytZOu{o{KDUQyBjT2` z#j^;E-Ccu>NR13wxJ1)L6x~!Gi=Ys;Ulop1-_XoaZD_7GzKe>cY}A$5O0+Ci+eI~Z zQ9|OYlu8s7!XCOq!Xk5l45Hs#mDMNr(2eslv?q6=;FV|sTEDK#6>l!j{>T&t5g3-g&05@d*Nq_q!8R5 z3hJTIajbxmxV$7KMM3i{V4i^=MUZvv7DF$XYh3?gRwW@ASV{?9@H|yD$+PWJI~D6U zhZSoCDm25W{2NfmD&BrPza6mhaml1^ifWQ|%n$NZGvMPZ(>`^wmq`z>K*NZfMKGLl zSeCO7)0*cgO-r@2pqpAaOb?P_T6~Bxer`F%Y-_W&Nu|nMJf?YGv?g@qcm~O!K9Vw+ zz@_5L!Jdc>Ge-ONViBH1~Q+h0w;P!2P^3Lwwo49`5@HIn1al{9Y=s|y|##Ko-> zd@UN9oaR=T%nWkltL!yiMFO1Jf)j;mkhfz&pC+bvq&`kXJ89*9%N%p-p!}XEruWyq zx&!(jrClCy3(WJJRUiF88D$YUVoLY{-SS=jSP%wzxyK zVpck(t;Ioht!vbEik+sYRiDtWipA8cz50~2&g!Pm(IJ#Sj%jT;Mi=mc=Z*VDBe3Zr zH+RnkJw2)?SNSfqjNj`;Yrg7Ry91lI`33zTIU=nJ?Ul!P_JUzDs9Cqo^s!-r7;;yv z;}-utp>J7i4HvO;Ak&E>045ae#yL-Z zn{a8ax0pM1`tQr{Qr-&9W_Smk%jDelOx=ppM6QO}3?tRydR?Cv5 zYZJK$GE|NtpK)hh;LZNYnC&siX-^l=kR%z&lMCpY1reV&10QCyG{xxdp@tlM({iYI z&YQ!hypu8QFJ{&xp1L%lsY*$yjxGUMRQq@4rhAeo_Y%$@@72m!xZ5)7|Lv zUz1D6uDh*YW>ha5_r8+2^P}W#x%Fh+QMojj(Qv!rP;uG}KVk!Zq(M`&ecS^q1Mnko zcAde5(F(_%hBq^w8XH>Pm~wylp^Svc#oEPxd+Zm*+i$&1KlyHkA8{ z-n2Z^s2TDMd2VNRRD4H}{AKbdzdWCL_fYJ+&yD}&-2=7Xra%4hukPdLpxC^_$~&H5WhCz(EgP zTKYvIa3ez%%f=7C{qW)91-Fi6)@=G#bMr;p_8D$u`B3fWhFfoC-Y6WueX%j~)^l_I zJ@({tx8}V2()hG_*Zp$cb<2(81R{u}5U3(WFU+M&677}PYzE`Wy%qo-H)TK(u!2bI zv#_fF>$MHF{?QGvTZRL61031eO=S{@cBM&)DXeA)Fd0k{N@^JbA$=$#%rJ;vtV~lngQQpL8>du2Ogeoxz~l z!eBxz4Q|kkZpe1P#=w-M!%nbtZ^p;hf6tZV@?1ANgTqj=z8i)hJWUZW-y7Xs0UBAVSiE^_Ao4D%%rM?WIN0E@oNFAtv z5~mp!gsSs#3aRae-ZV&fa)YrBC>mp>1`T@0MPj}D1$P_QvcsgBCqayVuX(uF)luEU z`&d_)mr3Z~5qio0FE7ekFQd?sLr942m6|NXvf_dD3=Rr(Y&HW4XheaESdZNlW%S_{ z6i_R^`Aj{->3!MJ^c_9d@*tWorv$tDRx-r>UR;bwF!h~Q%Zo2fnn9n2$jG*)v?C4AIV2!rSFDBEXO2~wZki=rPK zmVx?_6>d4fG7_ys3~i~Z^fRnKs4zCLYP;G_tJy-0n?i*;8_pXNNEl_XVTR*rj$!B$ z%0NdYb<(mzXc2~4uUY1jNcqU#aOy$+pxe#E=L&*OHhlgkfmTJKfWvD7@SvDUQC&kR zN}#SD1}uajA9%MY_-70$ei@56T5T4h6wb??)~OWYqj>-X8r4=f8w#U*yp0tYfsYog z!WE*1;toc$D2}iS$5oyl=0MQZwT6_yC!DHT7St(vB16^NjF8uqq$<9ir;LBV4k9#k zP|}eV$lgacP)?_rT`d44(wLkD@B%-Qv7 zdz3(s9jQFKR2Vl4O5BVvPfFhT+r0T;q0ilDk8Itubs)qrO4z#`kxU! z(W^>uC-nbCsyXUMoItyEQDRZiu36C#iB&>3sgAM`nWYpwtW)V!rm(aZu4O(N-f1ct z(;{>*l+j9~-W|8<#9mjsE6>~3ObdaIwrBj^C9KgMAgrC9h+~_uLuFT*Y^YZ6v{6;E z#i%cZgQD;SW`NZ>tjrb*`<}K*NzFGzKZ7WX1_vlg)5+*SdvkE>>1$Q$%))WwN0XIIMqQVH=WY9sNo4{uddMJe=pMx8pBceS@ zbnh8E_EnSWyKOlR>>Mm?(L^g_DRmD6BX0?31pkpTUd1%2*aDz16iFPs^#ddi=miCF zDSLjlAcooo^Kphj!s2v#g8D)m9b7WVj#%+*ZaL*+s%*%yfT7dbxvY~?>SzEv9-D@v zSqLJk`0s+WgiF7<)R?KP4tH4n9__j>uy1{{(@ zr6DxvZB<;A(!h=o70>G!AA%OXR;3M8+ME3jEp(3p48_EH8M8#hY0e?1$Dz^P zYrV!k>S66%UmT=ZW>CFM9H!O0 z+YD!vrq&8u{Id@QO;n$FY!gXv?_tKi*vLGkou^qqmr_gWObw=qWTSQ~v#sH6>wAo@ z&N7k3E@l&UEuSra@ysYW!6S|NHbJh z?x~=M77Ud}s1-0g<%`~&Y>)Jsb=}qXyG}~pFJB|M+%hh4c=)A>d1Rw$Y1&VJ|I@_J?$11s7pi?V!eMNI5A(kHVO<5v~e|?TT?!E-g>(t<*vtizB8hqXYlU-{k&JCO1j^8;Bb(u920V1+Znk|q5o$x&c=mfWZucqJNv)<;>2$GfPCra+w!xoC9q2^$#iC^C6gNB z>dmR|J?$WH|C1@djI#8 z_je8a1vfbvT;H&wzFQqW2EkV*sP7A5myZz?`4wnPwwA5^PhzI5TqxFI2F;9#V@Ay6 z2QicX1E|%%U!YQ#q2piH4;}wakAov4AZPVI-j_kZzmYPt9R6yvKPRqG3e&uq4hGh6 zEXQgtLG!VT^Yc)2Lm!_=L>fXfzYKshxz0aK2MIe5efR4z8Egt&=zmsr{lQIKcYb%- z5SQt-+NYHz5`q0zyJGFwV9CbV7d+m#S{cchSh5WqEew`0HgF}z!oXddoF%a~hC&O* zC7Djr@WY*Craw}*3Hhsu4YcE4J5w-$W~MVq$R*Rx+_gnErD-xf?z1wP(7XO|eIu>3 z`}Y0Vw{Q1-zTfxxejh%dFM*LF2GzmTFW3!6@|k7z2%Ph}F3SUpxFv z0j|S2R+3ukN!3)W1Z!i`65^6S8zF>P9Wmo`7PF=9R{3ZNU6=POvx>xc%C#}KY>89_ zL5MBA=3bPNplyE?nr#W@tFSPk@k=UbSj%MFo5SF&n{`lVYCY*;ey@_SPpb0qIa|fV z@`yPy_slkDOqDS7aTqJXQwUQPmxtFo^u30h7qS>x%X5HZQ~?U-Y@-AT?5D!Vm!2Oz zsY355tdv3AlW4gxMdLnGWXHfgZ~(Vdqq!jfz#FZ`yDTDJ&O}Rsp9_laaGb%Gmd1|y zgxIjiR!k^R8vbDJ;c6MS!TSijo>EwI4$v-(>ym0@!lGlj1dYPIk7SN3ZD8u`A_3lo zF>G2V)TrcDTN72L$&oJev{0iC^HpT6#U+v(D&5OXsQ)zH=UQAUCRD6+$1}n(Jt0&j z85+ss$gkmgO=10=#5#@s5#lIVQAkY7fCH5Ff(a%3yv10uMFL zDYBK6fJ@F|5y4RzOIS=RsVNnd54i%+$F(?`iIhxmXqlBkL(s06t!B!Wpg=y-V>6(1 zdu#o14(Jl*2myGxQ5&KVPB>O6Sp=reoYXcO5$ILImz%s|OlJTpa~^q&;P zgjkNeVhQMAx3{D?ht?w)f=@Tlk%IiYCaFUg<>a_2O8BjTbQIHaEJiE}V{ym;-aO!W ziJTR|l9A00Q24?B(eeXQE<}7}nM8c0)O|pUo&r(7Z8CI9ek4a>(JXf;%w?Sc0+WE< zh+H3|jmnf{%Q*-@uFvH5QSq=4RZU2MtZcpo&sWIBQ_E#a5FvHCP012F&EkT};VmU+ zl!x#$L9d!Q$(k+&_B!QJxGgN!rTk2^Ap&q#LeW=Po=umuZzwtKzs767V+F-1!($1nlJV z1fowC?+7PW0bJL)lPYH(wo0CRB)W0X+eueHv`pPSR$qFWuA}QirIXSQx{|=R7~Cee z-68|hVCaKn;etdOZ?Ws1z_pP1W{`|w><{iIU3E`KnU`!NEy;}=zjD~kw{=RMEkg&| zY_kv#R99XQyj>gX^kBx^)KlHE^J3+jFP&*U(fhlWw>7mvrHbMrSoeOXDH#8OJ48G` z)vj6@sfST5v?e4)2Lm00iD;z5@@-J7N!(0o@vyvHS+714vX-Zrv9@l9&|-N?{I)$_ z5d$YJx9bU2Z}A9p>R)zjp&_<$k%u=4 zBcxIi>o3X$U+k-7J=Orq{rNFt0Z0Ds24P?Oxo|6^b}TqqwKMNot%^0%LCgxQ=MN? z4s7o2y`!pDf9h6bvL4Fdc6n=8JDDTl{?xS_uRQhVKi*hX!RyNE4HT#THrv3JGm^_ zm)`4c4$aq=_6H`twt*h6dEv_l=+Jlm7=p4IK0g;!r2YW%a?Jwyxc)n9aP zPCk`caWL4iE}l^j*3Z?;?E|lFzRR@Do!d(LQ?r}?)U@=4k3W9q^5ZJoI$yo)#@m_9 zV^67dmVa*d`q$3CnE(3to9w2QS@~hCwYqn2Z(q89&zGP0sI~Qj*^e^)|9$X}bb!Sy-)=C9iM%@bs&F zjm=WQ9dK%`9m*Wa3_0jq9aQhs*MrjnD0}cPhjwm5qW(yszJB|Sxve+uZTa|SXLioh z^vmS_RYTSH_Ev3B74Jy%#kts?<992jhc?YwUpjuV@=kBC-1&_Vj#dcyE3Gz@HAm9r8kwyW!9aH|GEH&QMc> z+bAq;{MGz#GWRacT46OA|!99%c7;A2+R4?jGP~=X*x& zmqzBs_v`JAMPEtq+FF}>{ZrD5cO@|M2SC0_{E^N~^h-w^Qq6tOO2xB3rO4F&24ERD z`9ZJ@Rq>96FX%B2SoV&5N{?AH^5hlxur{A_zUiNRtM|Ewj^%TCAmDOAsR1iSs1)>3 zP-2MVKjPS5AD<~6KdYWq??;&45r3T?tIXT^=ajFRdaPAw%{#F84*lUdj|6=YmneVBYP_{`O+RhHfaBwU)6|5;F)p8i|5R{l z1j7<)+!0_1hhO6iTcak!W#%{oDy1A}bM*GFf9q7s0=QeKp@FQpavqI_AuP`4?JBVC zZRVg^rnX`l50l46Btq|Ip-!_~KodnJ;Lhi*>oP?HF4PG5b#6k+dIh-*R z`aF&l1J?gTa8eb2f&GeATiC^R>d=K^Ar2HSR>%WqtWK=tY^lN9C=cC1D0UI#^TwkO zqcX))iQ_LsfewB(1!SWJpd5&Ah9FH{04i=`B!(V{4M zs^c&~S(saYs*Jq{$7&xUHW!J*q0JnxQd@*G%NR* z+}Fag4SxZ1={o@K2=NqLXis%>JSJ)3&iN6Q?-YVqDWwH7b93LRYmVayOx%c&41Myb- cmkD_bP*T79DI-rpDg2YJIv-T(jq literal 0 HcmV?d00001 diff --git a/fpga/rbf/rev4/multi_4rx_0tx.rbf b/fpga/rbf/rev4/multi_4rx_0tx.rbf new file mode 100755 index 0000000000000000000000000000000000000000..b7e4eb39305c1b958e5cf55a5f8b32ec37f36a94 GIT binary patch literal 180537 zcmd434O|r0xj#NTnfTl0dT)1Thh@N3c4iODfD0?jiX<^%XLfcO-dtITnwJ(9S4E?) z0=_gaWoH=H5s3mJ#-?ebgcy?A*brm9Y1#myA=bu7jIlPYV$hg0Rap>F5r1b%(xxxB zxA%Vf`+xrX^33eaIcLr}bIzRa^E}^YZ{7OK*NT(3oXCN18IZr-LH;u3fBj3iuSB@- zzUp-gH>_K@eo}5&vS8_w1(~ybOk&?B8$T+-WB%nIT*Ia?D4WvC{P|PPBogot+`tR} z=|i9(v6=b*YvOavFwdK@hM}yiZDzP@1Ai;bm^FG(hydV13!wD!lVT(g@Omai^rwBS zwl+gMSy0BX%avU{oRd>CDIC$CQIUbojqVCV4u|Wu0w}$%NikYo?ai4K(VrP#78GIG zZPCiv0#_F-2rh|=#INi2b&dY2pyHv~vr8w%WVzV`@}pN9*!Ww(?(4(9ww1ddxmqg_|FI zkbTdjnEVOFS2c=`fp3n4zk37!R|So(TUWX;DsrMj>dVgl|Fod!#SWsAm+X%AMEA(b zmB$WGiph?d9ORRuBRaZl*1r|zsgno)se&da(_}$=#*ZA?J1PED~Wwj|7BuOtF?d&}hpMSphm8eMjy6^v@qrOp}NLt$Eb5SvQCyDW{F8$Ph zrl9ETu0<#3xEy^7wMJ4>_D+h)pZ|P8(YkzdFilqGe^aA>s-UBTM&q%`KC(`nJ7-Iq z6#tt(`X3flKJ4)<>p5hcI@$Gqw~hb962F{z*Z1r>c4Sga&b-Nm=wDXQKQj*gy4Sn^ zZjB~ag|EB$uO0|rj?AQ^uycA2J#_TY$4AE+8jkfs@lNldkB!3|r^ljA`c>DFJxBli zu}&O=k;d2`tJZjsaGGd$^n18Q>B;B1�)IOsTCBx->dk(*qacjOjxmuwS zcJCM|-5;PPi6lk;m=87f!}z+T+vJX z>Gja`Z-2E9ulhGH4=MXP%U3;C`duuV7FPMoOGYaRUtexiMEbfdaCiGNL}2jBPIy_JM8YY~!K#$82&qRq2}#GH2#7W) zj0#^?k^01_Aq!w_J2@SOaAhn3E8YbV5*{#VDWt3dhm|A>P?LssM(0QvMFbitAW-D( z!Kv^{CU6^kAk6Y1vpA>54ioV33J5L0ttr|G(e^vBSpp)7aIZ7ih3E(k8;>D{1j0wZ zxQ?b#1V=<1_TKwIL-HIl3s6XigO`i;1}`Xp7vL_q^2|+G#$UW(TmIgw;O?9BSsbI@ zXX*$I9D8wSJ>R=j|4 zRtcjxMC76u;RM7P0EhuKVF(RdBMK$3jUnyiNdzh5VN11AXQsJ9V{#M|49W9O%*diU zDG$7ZiL8XB(`GaUL%=M~g*g=;7lVe-MhP|zha&>s5FtzmSS_L5C0sE^5RRNrP-YH8 zLa-zCQ;K-R)kkQJJvagTJr_mfM$UvHPMlAdo!D6xML1bTSOj6jWQ9V<)Ax{0jrq7w zL0O|Bw}24pM0t2a9>QR&0V%@!jaV2h;_sHPsBuo>=jsUD}yuw99~>6XE6e9LQ^Odc1tdUH3Fpb z;A{UD!Ylxm1m?Do$WG!4O$z!c%uYF^sAxrqQSC|`qm^SY0f#d`Sxdv-&V@IwjJIHB z)Pn7DlIXTkFD;;Y)YM7}l{iv{Tj2er;h+ROjx1HQ3{K++L&E!z1>{+YIw1f@J>ujf z)U2gt&?dunygX-d`b=0aql4hQtfWD#>2AG%A!mgH`U3>UAjYYjON$^b2VAz0E3}eK zp-891E{Bt_td;5UzJ+Y%GiDG^&kX#KUI`+MY{bFzHr)6N}8f)8br9>=M&BWHBCwGnLajgtH)> z+hIAuWmOVnQc4Gf9SWOOf?cr!~wG z;7wLLyV4FBMO={3`bZs<&&p*ienpb!@C8|ni9k~&n$0B?^oqc^NGl;Ev_p3sNJIhUQ)wGhemS$qwJYvchFq=_s23vVHcY7k6iwYKHBaJyR zUH2|p)e%7JWeKnd$d>9|7@`)a)Q)=frDqhCelC9A!Qzb9xn5%K>&2Bz2Fm*%xn<}| zin9!q4=vsZ}`|A;9qGg zC697x?u5MkiqByfq}zgQrSeJEMsqbCsMuP2XJukw#Vaqak`n!gU)lXQ-1uHe^0Gc~ zmcJfma@eiiFCJd{Ma8fxCs%@jNA9_1#BB5+M-uncOlB6Yh|Mxa5)~W2u~v>G*1>J-r|b?U_Yt7L)43y7n0S3d zxuV+G%C?bJFJCDp5*&xBs;)-2A35GwczuIndw9^l|Ka3iuIy!l{>++~5rg0B8?OST zsf-P|=Tf`MuOH-Pe~XNh=cOowi&DO6$3SpkH4DcPg za97YbW^SutE9*YVdS=rcHX$pbJpaAxNzp8qp4lDbH$FeIYxnm~8=@`Yn?de%3*25m zoZ{Uxte*SqvHEjtL}^|1LH9k)31E;bw&BCDvS03vY*4Znj(6-Yv@dfdxonGv+*Lt* z#89=+ld#|oNC+u;NciFiFt0rOfokXlhos*-& zRO2vJm$|F|ze#l$O!a(M|0iAkuC0qdQnoT&!XBc!>yCs=RHeUR= z#&tvgWq6+#AA{MV;!sNI9@wi3FYR9MU%4XTFzm%_D0=qt<0(Baji)HdKYnFZf8h>? zzK56w3hl)M<>_47_KfpJy$C@;9V%+xSI9TH6xo znQ(HYB3CNsl;{^G<91JZ#r@1mvl{@_!iI!biCghC)Dy9_b!g3ie~UQulI9K z@}Q;Nf%L`*n)zgfFyB9)#sOy~NRH%j0*gs!5I58|cv(cjLh9DKZ->%-h%;PgAOV3+ zQ!)e@)d4BMafB6%hs&S9S!BE1$;kq#!$cR4A-FILz%{~&!G)7UmaAH1ma_8B4OT5g z1}vi@i73Y}7BCJ`7i$pFq*k_S1T{nr2=Jkas1Tn}aD7n~9oD52vRI^1bp{j(3HQ=9 z-_cT}3IQ3gXq-F=7hod_7eyV)01~1$lZHb|Oqvo(LMX{vLaI(wS1tgH7Eu}jge7%C z_M7ybnvj-uHq-FjiNr}Pf+L7kl9U= z;M6u~v*%8Ywj%`bvEKtRj9I zaT7!m1*jAM-h*PRBE!2NG%4^pjKJb?nCP4Wd!`d&I07#35aKn4buc|yplxzui4ZAA z(XEy?Q3D6=O)7w>&50JX@NTg&gg|2)4>2x{%rYPW7I5=vWIpFa1qoi?uh-VW0%KZI zAga~DQ4vz9^*^72AfZ?Z%2~7tA{zh;4-va2!8js9oFc;xz@vc0N5GU?SPsH9%zhGX z5QsVuBSS%n=;194VR8s=AkxukO&o_p#OKuNZkKRHf+_}LrN-(qU{W}?ptkVU%Ly|i zaq%MdrM?68Q>Z36wTJ{2sj{$B+qrirdIQe#m?|I^5Z#9*Xb@Ai+(rpR^kPUz1G|TX z`6LoiT69{0EmL$X6}ft!6Pugvv(EOV89YL|FU@Z5FaLQgW|le(1D<9f!4pw@Y)G-dZgD1Z+{3Q3k9-MFIqM5gIi9}eqOJQgw>#RCL4cbOKahlr?|Q7P&AU;p4K1or+mAi+~mlf|Ln>nJ|;0rFD#=H4=)dpJMfq zz$tSmP-!Jj8`2t4E}Ax=gvu49^V7vf4QKZAvxr$lh!C0p%OM_=%A*)eB|};jj_VM_ zJkc)QEKdKNppK|@{3(_YYJJLPUz=2CR~08Lm42duR`!14=6VQ$v1$aX#zJZsk+jrd zp{dkX7c|`mG{uDKv9i1*h;oTe&Nzu zu7hgr{KtCZhip`ppU!@kINE+*yT_-1SQh+{JubB=o75NihK(tL zs-?LXdfQj2&mH6;_)P$?Tjvq#yyiJMGo>V#%$RSpx%L~H1DsgF8Ap2TE=QM%h4^>1 z5_i!jmh+67c0RWmxEaY#vJm_==-;Knm6A3=-8i!c)&W8bON+YKce=itmJpi%ALQc`VHSB2p7$?R@WvPd+fznuHF4UEv@yF%~JA4g7fni3-~T>zQZcW1bnpX zS%`u0yEf{%wakD-!F7xEZ=!ax(WgqRXszINDkVEoQg$%huFa7bmpTfIt7f~cUB!1N zMv>zr61K$!_%w*-AR>U+cIgM;1IHm~M7zG-?#()%b<=N%^~m2u!pvVH;Yx*@M8c64 z{njmSbU)p_?Xy93%P-iEx_3{s?~Q_C&mWk?kuV=!Y8=F!- zIEflue-4G+gFL9-RyLqi&*;u7)wD)w`Tz%wR!g#O2Xc)+vxv3_;CdQY;=;Q`LT)A%OibCHy2$ZJ*FZ(Ljq1fHK9o#EQ#sHt?O7K9090kg!N#(TR0L0UJ zHYY2tQfa24dc9-?{z^DKO-WBUe2N%mmBfDj0Ym%p9ZxZM4r&E4 z{Ax1>%>yjLInxgHu zsHp1H7ODvk-mz5?l5jqR6{skLTxMLD2G<|3W>+~b5;(L<;TSR<7_|aUBD`fs6Virr z$V<^BhSSWVN$1q$9V()z?&In93-kHIC~#uJblCzIWIyl5Sa{uhk#_R37+_f)ro$+R zqe2v>f`=KU`st_QQl_NkfYgh=51t;o<*4U7y zgbwi}nv(@BNdiyuB5KfpIDstZomkxhG6bMyuLUAQNr;s{5Ya>om?*4}F5tVFMv`Wn z8dC|dYRx2%(j2q`hfsPujyZ9`C+PS)oMJcZo8)GIxWzaH5L1D>jdyqRh*SvPegO+B zBm@m~c#19nI2{Bx9PK1A6&mB%A|Yyxq!9tS5*CTN%^FdH#z`ZODbOm3%opPpsbr`3 zlOIY*K{o`U8gUlsMBRj6gy53v1V}30NJ9H4#D`_9K|>;;E`aDLl&pogHH(43L5E45 zAQ44uxHbfEbQVt=>|n9Rsev{{r^2I@frEBa0M~y*qrQ=x&xN$p4SUjwkF}c}gj)k7 zB!DrB}2$bOw0a}d18qN(>3X;^(8XTb#rSBg={6V!B?F>*r;=P){?O z8M)iG`;~_N=6#FSivB$ffoGAeyyp~Lb%)#Yw(wG&gO!w74D6GSjvV zhH)?pPe+71HOW#tZkFRZ$ZxqNG*@XBaIOs6<2C7m@`M7h>#3|o(sPd7KJKEm$kBZgrgNAa#n^~oH-yM$WA$))j;GfqalrnZG)o|Pf@jv zA`;rpNC4T%B6y5e*(s}{j@O1NUqg}5E~QK~37XcZb}zEfbzovK1X_k$Wg7Ms!Xkk6 zpj-JePzFSPryRn1Ll_H<+ep2j?d+}X=I(QlX4P zLYgDj9c@VbxSkMBwLYNysOx>eMFbL1d0ZR0et@fR$vM1Th#!F({!*@>C$OX^kWf&? zRUgFk>_hG&V;dCWVPg4JON(oWc*Fe{p5>Z&KE7ErjPW$_ zYpB%ld?nYXL^w~Z*qf$0dlhjrkasYMH4<9@3VqAm^OSq^seReAE6YFi_2=EvzvIoV zHjjYJgmuHDC!umU;COsaVM(gs^;~~)j#s=Ye^lyOyV!DFJ~$0*@GQ#<=HH6>&`S>{ z8iM)P-G{tI!c{Us_rhpRfi3^)xj!Cj zc_=HEx8+@T|7zR5;fkE>c_Z(o9BV0g=DEJ>PcX}A9J;T@KUy8WSMlZ!8Zt{a+_bm+Qb@RSjG%KX!HM*1&FQwH(e-`X zwheVr*)3Q3zHJRde>A@R>@fdu=>_OMQIkhj9b4VA?Y-e&z57%DyOpUQ-Z@s!-mExw zZmivUnXS${{W1jipB~BnjWAdoTU!0$x(y2=#d;ffdR=hc^$oS&{J~}Wy}1z1R~u>; z43#XcSvvxHY8FP^OTKg7>l)wiVrgOIorT^-6FIVe{NUmsHR0Y}I_KIxLyh-_VZYaW z?W&|>@so)^d~s{v^@4{lpB#U9zT^jNN;APse-1_3fA29)ns5b4)$`{ktpf z+3pPt3JbI8VIK}{-u!)D|Hy_-H96z^_Ajq;WIBRXuenDJ%WAk~3ranQ1BHRrn`*p~ zuFRV69zB@xSXboW!G|W6HLrf>(Yu1nZ#bIo-Tv_1rH|h*3+#?>Edgz zSN{CYx1YQDz;B;Ref@`nzx~bL*Ka-k-gA+$&p{Ak`f%FeZAT*S{NdL>Iri+xl7i<> z_OR)X5uB`nnA2octqK0qRu->2VufcbJ&ztpPRxoSR&^z{N4zG2{ zk6$vx8ZH^8g>BH_Er0)zP5-sYJ3VUh{$wiz^Pfg7-dh=HBkzKus(<+TzX9`;IR3u_ z^WWdK-v8LHZ=m_8)%)4*D4Kuwv|*x}1H5$?$Z`$v>3mA^3$jmt0SB#IN-NhM{}yqM zt!rI04b;ENwNBc(+v+pgE-^N5~*CjI@X% z@VahXIwbihnx*Mk+}*s67f#UZ;jjelgY@Q-;?nc~-sz)57(%~{`e~$*hyK>|FgA^X z&<;4s0lnI#xNu2RprB3-LB*=1LdA&x{xh1;I_=y%8qo=LZEQiM3ba6XsV(#V%9hQy0hH$+lS2D$-`YefsP&^S0GwA?{!+VJWM&r2B!Xvc~z$S?}r-Wq) zKN*Ma9I2$+Q#3lw{n8HHge}K0g9gdOv9myyGj_^8BVBrNDh}($i{!U2UxL;JdAT@xar;|F(JO(mZP<%eY(N5G(hEeD` zHxacCHiV-{ag*#(D*+sp+)^#VBcWyc4zg!}h(LaVlYutti3raFn{d8vUT8AwbK+6n{_ry$%G2r`SGFH5#JzdZ{ekg0*IgbOW(cZPLK z1O||wHDz&>6A1V|CW}nLoD5V(2v*<|R868*C?jWCI7FhMH$|t_6#+$eM?>x7bMmtzCiFM%%0Xlm^AsEmz2RixsGT9xoxC=NAqIy z39f>)iQi(TL;ukoDa0;@&I&O?y9zoQ)t|}Qmscn$;*M4&g$F=I8(LMXquyg@$M3oM z5cZHjbaROsTFlinLUs_@Dwt65EP;_CF!lQKp)EdaCxL4*t9ONW5j2(TU}tg-unEu8 zZxsNFs#X|msfD$)3l?h$Zz8mtu`7?XfPBj=hSz2CD=WD4xVccRV|DO3Arp44jHco= z)1W(siW}fGQNlr#Da8Wou&^lp1zy}7cuM6rD_UWiBHDyjfuF~@T7-G!yc5k)=CLMa z&ZrKxTTx;SNpv%Q>s_)nYtwW&xt%nv_=qD6J)eX0%I$H_O4P64s8Ve(MN|;n3ji&)6%2yPg zuE!4px{Q6FPfw?4LMWgQ7J0h4UUxb-Z4tMfuEujOIy9TU_rhbehK77DW*4rz1L3+m znR;xdxbmJ~nrPG{D{?Cw`l=a#J8&eWU4j#k>W!CC#MB0XCVcKfRlq4o8WxUylcU6DqfTh)9;fSD?00VH(*Sdn!?JMYLZk2&R8JJ zJ9!Ez*vGO2s&XM2t<`SksR0oa88O{>&UY@OoH0%@UZ8!B_u3(Vtvp_$0j#1ZdgQalER8@h2v5y^4K$i_P8IRJpj_{tgrE1;d#xK zs@|-P7YAIKLHTW!fr_ zoBx;?S-Qz&UC-)9-Wke)3LNhPA!@MaU-PCMnz9ITH0u|6UB zkBL>4qx*=vZ%jWtqqw+Z{~y-fjN$WL!D$y(jc|fZ7+%t!{rFH{Np{0cpg*%la7%%MZtRH(vjwyJqItoF{|e zCJ~qpV)fp@c=P&umS!{8c4q`r2YtR8i2vsVXS~{THFjM>(ltkO{&ZW>(AvHP^R?HD z^M8}=9^w26hGF*y3Av-hy6>NUu;%iQt`@KT?&*YIk4B1aJu%D&6Lw!@HujvV99iDI zx;KB`<%h;yE9b3TEgl2o-2t0&q4hvp$JXIIzVL|cvCPXq`M$%p;gj`mnAa^F^671k zj~0&>zZgs!dtF~+`NQ(-`{khR+J)B=R!uy4q4bgArF4QYA`N6$jjw;+_ITvr!bh*w z%>G{AU|&^s@-5#R-Z|HH6OaCUj{Ay`1;bN*Vg;JLWDc-T{gaMD0|h& z4cXH6>%PtzJ+*Fe^zJLF! zOxwd_`)h-b-Z(s(y?o-ykvRtMf|Kr(+{hBiTN61v$CmbS#(1ATX>RtaoBGl04cDss zO7n-d@3)z+fm-jhp_6Z9bGM#cH%AY%6-Bt})dx#UM}NO=ukEJqgXey9^+@jCU)-Fw zf7^@WE4SRLkA!#Im@!cM=!(lLFAZG!cx07$%+q)D!oY>y<6nTi1(DCYZEa(!xR)J1 z(lhVUi})IQ4+QFcq=PVKW*YZ{i+8@U9&;>HEWKeJ`lO|oUGzGBO?K^)#8MCme* zFaFp!Ot|lbj(`D3nelt0Y#DDHWXt4dd9$8&K-P;p>I?Avl^Y=8AGiUaF950zhoY*( z`H?^Q0c=q}05t30b!aa?HmwT^qW`lfS>`LA%%90JN(v;)eBZzF^C(%SAxf4x`X{o? zOF!Q8*~AtF=s$)JwPr^#R2{gq7Cj`(6vcXGaF&56SBB);ysMnzf;BUPEr-%VQ z`aNy<$_+q3A3!%W@Hc$Lf(g@UO5)g;WEm>Lw)rgyS0nd zCfq}IZhD^}HN_X1wRMb!1A4le2|x}Gv_Q4=#GHbQZxfYQDRm10C+Xvn6b8cKrdi?5 z3;2eDJ7~rIJ!y8)8j|i1C^?HyrRM>?NVZb56!t6-Fr>)5!vpQRNa6q+5Fx8tH1)F@ zv1pdk&23>1(dz9fPZb0hl~eO&w^rhmS}auvQ^L`Pf$ zv(d^4s-Uqoln*pYlIjE}3vZA0mhp@5ik%glF2J}ngp*bTOi<%^Ucp^xl;=S~%%$=4 zNP-%ph({&pDq%RJb*IWnA?UCVX?5%(O4qx`^@J93!OQTFBr6bzP-|s|CNvNg7lQQp zct~SZ7!76O{mD=T@tF<*JqB&^uZra?w0_rWorD%CY=cNDedZcM!a6yTEu-q)gp$5g zpAKB%2Cz?HZ({^|d>i*O(xI;pJ9sxFfN?v?tvoM!G)AGPLa<23RY=XxQAKF~l(^Pf zLl4JnwgLtXH84G&>kmpMjS+OwWfW@weLOmiF2v5ifay=;`rnK`2BZt@??${rvSZNHZCGjj|*~6FsUSws8 zVT+{}JXA!Q6r9HhG30LI8abo_=OIPLg{dr}Ky)7eEvK%6Pvhiac{GEW7N=9SU2 zd#7ARIF%NLzB2SxEwPaLlLpIKN_$nH)-*sQv{tR8AGJG_71BEN}zI;%DK~(WKAwl7Lh!S#Cq@;hVB5$XCz$# zRdezjtrcc+R`$GkIYht?u8cDZzoB{w)171-y17|l6Ukm#Cf(FNu8qY3mm+klQXM~d z?}$m0i$M~(jIy+BLQUz8axQO&45{ThS>co^Yh>jh$qPis;CP43Afkeh zDMSg3n<>yHt5dAA&B>5%E7LNnmY_z0Ebirt{j4t^1_0ca zlWXt^vKt&PAy4&SV(lk}`w9*}Rshy3?qNlcJk-sB0><0351dd=2j{nKXtw900}$_@D!iG zK;tf5?&<>j2bhi)wS5bZl*gqLRHxJ^J0%T8}SxTRJS2N<>!DV;;(H8*{*)7BN;e&Up0c-85KlU&H7si-Iso}HL)Z2h z;QcyIYVS+AxKgPsDCeKx-?t7cqfh=j0$FM%En@u^@0lVXTtT~%CO~^cZvh&83$mvT z(0O5u&3((Ir3sp(RoaOnatPgw@$k7c6+zfFr~f@yliy^*!k7niDU``CQjJ8t0-v24 z$kSoiJdFyypIV_)&|!jJ0PW&@!3o{UBF3qb3r#^86TgxOXUTl|7kAai9S`isV@}c} zG{Qv^Gj06IrLQvA42D!Dxbj+S^Wy)M?>4aR{`C(e2I&oC*J5{sIh@#6F7}o0S~SB@ zNbJWhfku1%C@EKb2jqPrbaTJH^SfLjzPGM7ZiX?l!oPb_o4#^SIa69rerwxNxrOC7 zza0Ka`4&%5F)TW_MMttAzf{FPWdyp z*DDKvoWsU104bm6wbNeV9Pw!2Q@(s z>o7PR6~(PW?yLBZG7EM%8hUZ{r(Hs)hY5QGu&Bpv*p(8?zsocyamKsY@ATFl7NwNo z`_mmk|LC&Vpm03nI1>QDm64>R;KR3)J_;@$N!lHpdE-;KH?jLd&^z{GqL*(g_j<-& z%M3nxb@!(=OV=*0lq2%NIbZ__u88dKE3LX|AWB`YwcJ>8-iwb~mX+p@Mk>AQN6P)* z8St(iIk{otrJD0qRb!_g*!H9G2P@y+G&pi^aAF)>{%aw+HXdlU0kAL|)DlDF;Ik6R76}Tw0PYh zZ3(WAd@2Nshc`Ha`8P6w?ZNA#!@&n{JpD$^@-uNh^rsmcg8-BSSdPn?AN*|cW{4}`X#*m|?X0-Lw8nE$T1iD8anOL^FX2Xr$ znKcjJ0Q-ZBZ+x0r8oaUW^JJ~i z{Psll$gK+#msa1pbltLh)$W>0k#{~nGcvI>c=_b@V8NM_BddOW?BvAi%X=@4T=Hy# z-QT^fVYt5h*w%@(;*1aNH`W2$oY7ccQeqOYt=~_Nc;3iPy0s4~FheZ_bbIWZ6aBe9 zXueem>2RH8cJB_FZ)EO&`0kpT z8;;Rsi%N4w+-~oJf%QY{PSylRZhiOGnTZ*{%}yQuVf@>rx8_~G_34E7lVg`)M1du| z>fAdozdb&&dfVlXhf}Sk@Sh7-K@q%^y>;Z$QrpYFPaBi-_BIS(ytLOa@#xZTDnAC} zc4ceTgUXl8rmK_8ri>{6X-L`F0r^k)klEC1ym$NG@Sjea2mOMYoij<3`ez7Gy?goQ z9>{-s_O3Yv<9aSl$cE|ybd}_e#B%i`b;b2jdVMKm7)5%BSn?927_A=UB%4RZ^jsBy+srfC=MSSAgeL_}2Gu&m8h|Z~M|WqUx0_Zkm$HsqkY|P7zr!&ZvySWxSqPl84t*5;X`w;@ zmrdGwB9M1BYtBkFmMvF#vRnTxYl^~XV+ha&39wi`zf#ret+?jyHiMJ}GJ0fIxRZO8 zhq28u{XE9bQ#LzZ;Pu~%gT57iNbQysx70_84v~$^;-27t1ms%5hs&=IzB;T+LJ^W8 zS-`5uTApB?Bsj;4SO}L7;Hc{kCnTK^dC+LO69@&?=89ZJ6AGh{KcXWkwpd!SE32u;Zmkt?KN`c?r7k?^m$5Jz1U zlyZ4fqZ+sSv&^xO4E6r%fIoN9Xl2crM_kq~INH5fCziF}O}vd+>C)o))n` zlkqk#q?reFn2)JIwk$%3Ezsq{Kx6O}7BYyHPO%X@C1bi?DWeX1AFd68d4Z5PC7ysb z^a5zcXSNDXg|sV9G=(E~DU1KjMei%oxOxMKoKly_9}qdM+kUTYezzT_+cW=$u9n=~Bd-$61EEG9Al>j{Ky(sgSKsWEy2X%!F=1Ln5x1S*IGqiM~q;k&N>SX~^ZGc`=j&SA9riShisrB>#9+6?x1A`%X zkjg)`o*um=LC`n=8o@ZWfLgwDWFEF#mvL79?g7orxq9 zhlaaprJ)4Q=UpnQq%y4A4)n~T+F7)cqG-d)lpKZTH*2#KxK?|khgjt7q308Dy0OqB z*9`IqMV7;Y+>k+#Oog0+LNDo3sEX_A_?AFX!!Cul^te4eoJ-rPo67R6=LA*Bk=l02 zBeD)A?XBZ+LK}3ch-Q4BUWTaGP7*qjzAcQM_1(URH16V4@mWft53j$?r80ikOiC04 z-8q8pA~z96sQ%H37s&w@Wy1`{%N{MGEBENoL_sbAzkPCz&_&F^$?Z*K<_n53ok?C2 zu+!6sR8n6ALuC?+=;Bv-rU+10+Fzdctpd$7JP*hfe5eV~E=^|^AE(Kas;Rdsj9J`M zQ<;JjKCRfuLRCdaOmS8S4`t6LX(E|^o?t1fhDz)v5+!{%nPd)w0g^_|MU3GD^BFI; z($;hW(v2AMc3cmbaD{-I(SifM9sK5I{t)D5xwXi5SVquSFl9Z;d@)7Y(F=!4!lv8c z|3P?sAn`b}gCLB%B+A(a%>whuM!?pulVmuWVSxA!oGIXV@*IAG86k1n*f2oK<;LPH z(j-;JX!XgwYQ+#}a4GE4-6?HhJz_gBV`tyY-h?2~c`HMjqX*6zM9pJSlSYK0%sSF8 zLxmm&UWbe-^ucPO55=X8ffPeT?S+v(J&c__jO>K2N?F0oFc_c7>V^gc z0{UJM)dW~94@2PC2x$ZpWLIsDUlfh27Tp{w!)V_x?)^?^nBi^ooA`&!ar1GeIMF(1 z`zrgA2!RJdgeS}qhA{t!;Y0eGT}~V!Jl3N`s>e`8l+(%mEGb3846kni%V?XpkAZ%( zwr-}tU%cZ5W%i71E$A_&T8%U$ZvisUlSN#ZUBoTzRmzl2O!5x;P_qDC4Hu^i9YPby zU11bTnAiLOw+rvKLvJx>##_KvhAoOunv4I8<{0jr_cNiNZ*PhQhNSjq8HWXCk(hge ztdz>@?q7>j>G%I^?0#;GM=)c|Pr9E_8Uw#BuT{e>tV_$Afl#ijURI3FA*i_N`<*RwLq2J%8Wl1g zj>%3x&Rpd(yh}frJ+!?$yXqI)J7R|jB4NWQQC>>Fv2c(eUlA(umF!0cTNiBoq!hfi zVX&F7QR6OqcFxdt`@_FU@V&D3aVE%)Eq-Ul+QO=utaeQ;?!)n5UaWQ$-%tyr+tru>(lE2gS#*7P>zBmo~ zGWXRFcd6{<@{tDjCosFzQCdD!qEAS?O5oXx2Yneesl&{|?8J!N5lkG+jLA+sVHh%G z1m|4MaL4+l)1{7^uX${hSBZ|`@}WaSw&N<<3lFqUmD)r zKKj%LwuJ+pJ%Q5dFTOuu=vQup9k;9>#$6Rp?R{_b%p+%hv3}*v+?R77>G_;L@t@Z{ z?OyB1Pd6p?Ej{Z0-KN+hNxN-r6R#}&l&y>KM{Fzh)t@5^A{z{=7iOoAEFk90wk5(U z*_Ped@P;>eXyNu>W(Lhe3+y#>2CEj>s;zg2w$=Gn?yHqB*7{`9RiFOu7~AZt84GN)f4=b6zK-DHK_YV% zQ#hw)!}-Nm%}Zwj_!oUZNGtj7Yc;{4QA76hal;39Pmfmmkgf8q;u{NwN|z7qZ;3w* zu0w^V=Ck5IKKiOYvSbNV6Bg`qPkb79`{AoUI2dgD#Se#n>r1G)`N;3yeg|p^-n__e zB^ky^?+KiFWW4+d+wUXZiZgs=;Bo)>yw7gsjlAsHw&%LgyRCg+{l4C@@}tu|f2kvU zBlrQT2sn%*)=$O}Lq6323HemeJ3>J3NdJH39chuH0mpYi-qrKRiN6Vx0AI%vKMVgM z;A=JE=v}R;LN@d<41cLBY!B4n`<0P87!3@4BOvMO!AM2lh5fX=Cgv9EoXM}}e#PIv$FFu<%U+Xy1 z2X=v6yI=tWJPSY7{vOVvz-VouJvSOZ>|^uAX~1>h&w&vzkRl7lL;a0Q1V%;A!DlCE-FZx2-(-Jx#W>uj+a!qVPZHP=-b58kq+p!YYM|6`rwO59k;A zK%UGNFazbvL8ZKamWu!kh-u;&QP?Rb0)K%ay_?`y`De%+zav?i0nV+LrV9Fi$S>cx z(a(}$GkHq<3CKObL$YXrv0PqdnXWdvEmISqt|1ju2c!}?6d`{C|9=6}*b{-pPUdR3 zc%H0uXjmucwNSc1I;DHfQLUg9O9-sK8af4vJW7vT5R=Sn;pw*iZy{P%}< zx3&M))9)N+7?xpKff$YmBhh{;l>vq>l`4F5j$L8G8R ziFhD8mf{!*Bv@3K>?9OL$xxs+_LJivJH;O?|H6RaLXg;j-ikUvpTsCO3YN3}Jj~ov zl-02Oo^>)x60VY`KzC&!K`8Rd{`|)9H_$?hQVP9HjxG|M$&&FL{uh~RF58D zaqluuk&Usln)^rwXG!KEnv18yjxv*3?}R;2B#nm-!?G}#*8@HvOok&2AxQ!zO+B!I z;6Ps#CTG|(Mv}{s2gop)U?N~gJF7tpFsB?S%Mfnv&~k;uLQ5fXA=eIMSG-bQ+DK7I ze4XC~20)K_i1-MYc8EA#s=;IjSYSh5vph@@&k|&j!k9yb;SZE51Pcf~`K$0L0t-%N z{bW?KP|xJxBpXFRP&=c+@cWH9;b9IGp-kdEbT|)4C+Kl%P9{`Mom8jQa%xIM6;2-P zL_8yw@PL_87G;U1Wo%K0dsn3tXoOA@1Wv(`xQvVs3}fVEJdA}#$Rq*s`TT4MPMFl+ z&L|m7Ry2pB;CM71<2iCC5KT1`k`$g60*I(ts4*Iqon%KO5E01CqM{BGv6V8yZ zK(~^aEWVQoYZu68W>q(=o^081pC6G7g-a!*g_9)%KW~ye4a4AgBCHlFqUC<>I$TM} zi|j}`5dcJQOdY*5I!RHaVt_d~pLNhYI3j_M^X3xF0wplP6aw2QOP@Z+XaOaE5PTNx zL3TR8rNX4etq?2_3OR5l2WPwbM2mWc08)K&lP?FHw z<0*+B)QAL;6wlyxEP+@?BuhLAEI_Bnx@wK6KWjX<_H1^KOC4_Mg3lO~FfE-2;q%Rh>y%MjlaX3DNZS~OZ-;<_ zi=9vTwNpj%inmB3u4SNP$J%zBVc(`1pn*CIgH$k_(NLD0^ z1PVJ^k|aMMNF+r9fDK^^TI)ZH$t6K@XeS29UTSP7W z63Ck=K!#!a2kspd)u4FQPxsR&XqSkw zm2T7M?+d;SA7>uiuzeo(Fcqg8Surm!{OD_U@$cdmjm?ASg@h)5=((_F!XBQtbTnc8Qq9Pr z#-}xT%SY__h4{t9;qCNNYCF~s4>QAYPme#ie(8f#hr&0+#6@&J^nByQ8T{$Zg~?;d zMKT7Ka>Kztlbq~-^dontG^7T`@38@=iA@6#5Io61J>xoZz`Gejz5{oO?Q_PanB8J z-SFbtJl&AZf9Znp2Mgl1Pp$vh`tZnOjb9{gPRL6fSpjzQSon(UwRcxwp_$`Yf1&N} z`dx9^!^0^r{!ysA-37%x()!`d+K=;)sj`G@(TE0iAF+MgFN?f|UB zUB~r8WMGGBxMMzaB{SR$2hc82CE2C;9Y88=iY5KNNa4d7Ev-W)EFHk$kjJ z<9quM$nC}x^YD?xc_6p@!4*sMx33*?Fxm7twqj}G)S1A%!r_tOrP`O}~wIXwE>QhMg#yliBaIH8vh@o_5TWL{1+eblIjBdN{A=t^tJ!VlKr1hqxm6o%;~s{Sq&C7 zE5;f}fFXO-wH0Lj2q3V_1c2^pAjTS6hx}(~5i@J6HcV~>qi%x4BhL~*P~1gk{n)N; zd9ya|S-1hDTdNlXG1jlhzfy}5W{unlLd!NlGqeGMLWqOjd_PZnw;Im_R%|c~_^}IT z{n&X;`M>7<9(d`{-JGhpc7Qg310SFb0iX>5=&){Gi(}Ihs5IE$^-mp^WnqQ|$gr3Y z3Op?TRADWKt@=4ubODu$g1jRA@_w_HdjFq#EfAmtJlo*a`{_G>ryI?>vEhYB1rM2u z#*ni%4f*@RRXUdoJp<4Nt*D_@-Q+)2SW(G6;;dc^|7>81kNJYo;oN&`cgHcc#jK}0K8Q&sDcM-IsKwHkq-x(H(95AyEml>fw zvCCX8Hl;jM!Yu=p@0$x=`IIbt zu#+TJqS(n4-&@A9#r^!lXOW5y$but^Fr*_H6jk|BZha)2q=-XhyrnBaS|Lw`#kmxh zBn1JLJdC$X!a4|vMP9@{2#5l19*vYHg4qbJDD5EN1N2`ZEeCLaId+mxCo+ST%M%GA zs*fUS1qz{zbJn7Q7TXE=<K6chba6suryp6 z;2_YQs02o@^6ITR!2!4_sUM&Ya@}kZY{!dncO6h*QIZWj36}@qm^_dAN09sg#U^Q) zAYO+v`XYgkU?4ALO5m>sq0&eX7T^{m9q<|q6QNC8X)UmoM-t*d;|{u3WR(|a5d}t% zNL~euP!xhlz9E@vaTyt{u-{zT@C){WAmI3!7<1v3Um zn7~9ZkV_s&1`|MJqmY$!mZSx~+yxm?Es+lJJA7Yca**I95i~LZjm8xbVja@E@xGme zq$D2#A3sFM3<@zEsC2-Y2S}W%cqj?P_2^H6+$c2=gA0ukKP1S5nq&gK6ZeycdDzVL zltN<2Ddh>jj-KW6$b9Ask3gTm)T5}xlt9E2CgM1pnfa|?i-2$g0>vJI2)G;42_Q+V z_QF+|I?tx?PE5`&w{cb6J}s**ARU5$G328x-v9^F#ST{u;m_em2z9cJbV8#Ok4e;x z)J~SfSPDqvilik9Ck9J3a+Qp(aDkl&1ZsQ**YCt~KtK>pDnRlStdZw}ObM_zfYePw zLM5aq%G8gjvA^Jz&%mq}0^$NhY_(- z8Fdu=bO^FE`dc*Zx&EbYD2?_PnTCuHfWs&FQQ8a~45P2oNMx->I}hJVU=Jg6m2@R6 z5kN#0UY?Bp!t40=N&jbwe1GBsCku|-i3K#{nhtCYWTH8l+J=_PO!r6(B;T<1kt~f{ zt04-Att{n2GA-c2NC1}1!6b1q$RAWkW*HaoS<`0O zUz8c_qgSAND-r@!o{3i;|P5oBOOISBI ziittDc;OvSy?VDx)q~t-{cD1*A$_K6sYiv@hGBtCQ(H~`nWvMxypy{67{SnO`5fWY zJ!}s%{9P@Qx?puekVmJWW^KG2wssaww+GIt`4 zbSQHy7n}^NQS2ugjo;i#?uEO=?@D;8up`wi{7C!<5Osy=3IMkP`P zJ+(j|#T-SpM#G!vG)tf{m`G=rfNZh!j2HrbXAvE_Bj3f-2ZvWZPt1MA+B))ts(C1Q zRoq)cn?tOPL!Vs^?P}ZiVFdQeW24ZH&bo=mwfiqz{9!yYH(R)~XK~w(iTWF>7knS_ zW=PGR&rMrjo^D00mDAeuo&LHE0ECKmGFRZ)LvGf*+sQAMk6*%w)mqFZO0nw35Q#x~`h8F&2Inf~$5t@Jo^?$33;^l|mCy1eg) zU(9aVHIc1)`_-0@CRCf-ew%vov)*?{UOw@KE>&wS9m!m{|H}#e6TR)e!pQw+#>w-( zi@w6w_ghD9Khg5KFS{>ud*II`s3oSm)f2i z-MG2t(x2ad@vLvgvH!=h$s4OLyq>l{XrkvX(CQew_P7&_x^rOGt-F&O_ z`-y_j3sXin#`IpgdHv41FI%>Zzt6OE`jE>l(W4c)gU-9ewyv0mTAmwu;l)Ai=<47y zr0wI0MbEWOOuaHZSUIKBEzw#1M;1Q1>?!@sn@{wX4W}8bm-;SEynMXZI&nL5 z|6E_@5BsY=`eE$$4=~nN=%bR+Qt8D=~OuOUl9(sMlDYy$zVAi}B{SXWm4b?r?MbmiQ!%{d!%_1_d+|I_9= zT9WI$2e~C7FNI&u0M3;fU|*qT7dhu=5tB0qASU49Sblc+v??3qQNfRS0X+l0L%V0` znbUxtQJt=tC0f7&zIGk}rs@A0^c9)iJaif?ww|7D2nqCt{ys!Gm!6tj?hNgkoE)^7#7~C9}_`<6EhqfLQMWzsqseoA3YO zS!>dID8ODXcK|JyF#9N=zNSjN6q81YCIFYnIjL-*ki3IB{?Fj5>e-dRCcPb0m7wls zdk~kH#vL3I{J9kLRlN{!T(FfK%H*nr1s%eI$yotdIgmdi%<8=tpb`x2`%!v+IS8s(n&?32VFQV=eJOs+@Nns{2 zg!KmP7Fmxm2UMwwks&u4P3_}ASPW9Kj)s@1OBik&Qy*Tgn8%&$;FiYzd&T2Ajt)YO zgL`DVBjEm69hJM2Tr1X+jDd6cm!1efxmtD&6$$TyQb87JEtRs1w9NSq=%Lw@gprcc zVi{cy*{O0=M=V1)DoX01%*l`QA|5Rjk^RCWB8$L?a}Edtq-szQMX1|}kQS@}d!Phl z3-xoVqgiqRPc0@=C|)J?oGZWx5OmeS1lN8`)>@J{Ws`rJIZTmCmNyYaxF@=pM-mXc zBd3@nThV+E2<`Hea*zU{l4NxzUX-ov;_g{4KR|+tJrqglYlA!tQ9&^cx)d=?&d^2% zt!3znEKzb8xx(piiY%3bc@oVSrIqSfKErg6h;mU^k{_I!iy%f%kN~H1m}z)coJVvq zjXW8G8<Pz($YG(1<2;6*Y(X!w=u z(0B+u`SpF!8Xn|-fzScDkVMiQ2p1)*Cc_j0E5wuRP8Tk6Bphm6n9?D!*o9@#2PHxm z1QcOK1dByseFAnA#~-Ns>r<2!2+9ju!(NiIi7DB!PoTI!LYR z4Zc782xfqaYjYiuUW5iT6cd%tA$FQUp6QdX{81#Fq7G8^l(ZAU2$h00#zL{_DMDJu z7K}CqIDk@}cjF~$PQ4M`wSo+#o3P{#eDS5qb680}kwtMI@Lts3@Ge^=!f;jA*V=c) zRG8NJu{H{?PbVa%4v<+Y%2H`y$*66j*{~9z`ng|80G;6>%_X2_E6QZ5StloRx1WhZHyND62y7|3kgr= zH;Oc6EOzh#tyxMz%BRu+q#l%F9k5wuvS=MDQeYJ2M?nAr$*d8QoA|PTawfvtR7H`( za(StACw2-a-DEPI32Y_YIYwd}pcUo3LP_RQb3fd_mzFVqQ7WKVVI&6ps^L7%ldUQj9U-}61%Bx&Luz~ znoeQf0}3T#duk*g-8Ko4H`r^8(Q!%OL5B(zs0<7>kAtv_Zb~{IAvv{NMF1M05{F?} z(qU-;?>$Ib&!U;erX296L>7z4;&Qn)rA4QxO2m8?rO~GnSe48I^Kz9OCyT0uYcyV< zZ`xPv7OvX#fN50$;Ihn#o@bq2C|6R{PFRKkZx&U-9|El%lCZUKRC7ga{oy7)>K%Ud zUf!aJCxV?RA$xZS1L6y=0Wo?~tl~qWV~{d7k`^Xe-GZEs`N%w;DRCfWj`_)z{2E-$ z5>2D_X9-gVW)&bfi!d_zdjQ7SyTc`~W+*lNkF$bG=(8xQkYHz!!h?oV3Mxv^7*GM^ z=C%@y3t=ggs^DlUy3fGoP)Rx@)=M(ECeB6pAv+i}SF9w;#B$Hu+vrIpl|mb&NF0@E zQ+gv}-FT{s%QkaIPooHwNzq*fmuRRJ;Tl?AW4a<_bR-23sKdLfPpDM~o;ewFlBlFK zE*2M5$_LU|ER7M9JNT52@=228D%H4C0SF0ieKAB{5QnM){1RwwH00_?P&%u5Q4U>Rt1Uk&h>acPqYVS)cR2AY zPsOH;YLs&}5;R(zTX0gnmO*a{`dF2oa2}7iAf6MwXJMJ~Lo#lZP<2PsuExeAVljmKrdVWcB3aa|l)q#D*hKQZ$ z9fT?GX6kaE@LDcrD$+{IJ)C-oD6v~Jn@X)zyG3uch_-uKXut(Kd zx+993Yzol4L|$`efy=k*S@bgf5qbpujT??wPqc05N*qZ{dmDR*h}o9+*?7qH$7*`N znQ|6no2PU{_KInPE*s3+*M$(--r;n@YP;)b1vyq3q_xKtn-Y(~KTWwy-q-Ak$$M;vJ$@-dChw3Lg z+kf7-n0046zT9v=wX7jD;#z+9mo#^ek+q$p! z^zgc>&Wq!3eGW#Ax;wAje(z@Ip6NZ}H?{lEO~29H>$y{q;`@52RJU%r^>k;?)Hm!wigeRt@PNuklPhR6z`G8+&L&;jb5$jH!~B zE*O0-WN^E$`KR8mre>O~sZ;J&>nfk?T6Xr-udeKG?j)uG#IO#)pS$kwzL@Flot|m# zte>g>q2`UdKQ(t=_BmhfG*A5$Z8d);Ou1(|e;B`YrT3fLH<|}8jI*12FHPpUvscY% zXF5CYKL1{)I1}_kP1W?vV&~5jHB+5uUo4z-A4~l-`>gLxQ|I8!U|Z)mcS6&?Jkxt= z`1i%VlQSp2?mRQ|mLhM-Tl1(iz7e&^o{5Bvo$~5 zp6uzp^Ks>f<^4~GcI&E-bpC$#llsBCw|}#Aem5SmY5mx`^v)|2anm)YW}K}xRUc*T z>rmaEej;?_-q~be(C>me=*jtIw%^5n!X*H$RR0%nX;$&}ujU#5)5Zj_mT9qS;1^Hc zsZJ0HHmU~{)ZdG7H9%G4DBz)91$h9k>H*H7^niz=P{2b`lh>5Mwz5rls00)x01TV$ zyfM4T>4feosTycPSY8g;tMZZ4s!+g1!J(zIF#@F^O&GwVlpV_lQh*DmCiy=WIbU4^ z`nvjwvTcm9Kc`pQ-^_XYDog3HZ&MdC)83 zoL~a*OMqSiaR5=;4BY=&Y5+n8AbALN6#FKDTMu7LW_`OoKtJ_tO(3N|Q< zM$P<#Oe~PA%tny~mWEKpjsGo+%-o31(k~7({r+_FIl+H`_M#|M(Hc+(ET=_^^l~^I zgV$3W&Rk>au^NitTzlB%q!v0!sBn*#OHo(p)b}DrZ_pO+K51}?pVWC6Gt`o$GC0L` z(tXt*aTCrSTc6NFw?c|wDB`}*j8Xf=QuQZ;^G6`9G0)4~N*{((CmbZMx;(?1bh zumuEd=Cd6ec74MmN`(?sraOSsSp~Z@{7NB~d7#7{09-{ez`hafg*l_lP`Z_ssW@=Q zW(8?F$-N*C_lQ8;5E4L|xddXT&O9281cb{da~-z=EmyXpgtV&R^O|@%kS>x-EOYR% z`_()_$}I9VwEF)jrJ%XlVP!+PB#g;Hi+51+q#Wd1N*0Ftlk2%4m(wH*LlVSOhd~Gw zn9ougf=~qH3e`UrOBcW~21S?-A#s#62|bu}4QD7I<>`?sDV$uQ_h%a`j$qdWK>dW6 z!j8vySsY>0Or(D}(If06Y{?l6V+cUl>_5m|&p5V+6_L7fGTMEK#@+R3l zE4)}d%PSRhMPxgBSYd(hQOdT7?Gz^|5gH-mR<}K14YCFj13bh|G4VbY+|J8!MG~ec z&4;9*YJQTSi=d{JAO=YysYZZNhce2d=YS(g4*#XT7?wbR=MbM#Y7Omf(n*| z=nBD>b$~so6{;DKg8-}{)KyBcM;>-W1pQ;s3PFm-{dNz~{7C$YIa(@t2AD21b3r;X z1%X^&2;So&Au$(90t(9jM1epQ$d-mM;AqBJS_X88;QyeK@LWu!(F4fzgAqwP?4<;j zBLu^M6C**JjQS1AQXEh|MY(QxuK9yK&;T;3L8AbOr5f8`?Z+~6{qfyYF`pIfKga5t zgJGe?mN~`1R?eff>6G4kRlt!WrgE2yJHVXuqS>i3iOCS@Lf6nia?Av39`djpFXS{M zvan=c%X$1bjaJwTd#SJiggQh zKCaZ0Pt@iB-fSgA9W18EM|0^!hTm#HS8`+umqsDQi%}*ajonFCvwNj2h&&nA!C4`E zRvCrNvcU{*0&!EIyAETr3q&gB=cQpboYM%v_QCfP()F_BQb#E`8!EYG-EzMHn_KV$ zQ+0(|LB|swe|LQm)4}or^^z7)GfUJZecTXhbB>~VXMe3HSIPM!FTm&vXh9T{#cGa| zl+}TSK(2DGJwrTDZfHCb_6{PJI1K)D6Fk58ap00F?}yk1jtlVscN7oKaW@%D#saOd zowih5VvpiT7R`n8!z-49N>44}wtUyn;BEdWr@L{0$+T;1c-`APzY%2>RZURLQ-*qQ zY04KA0(~X+MrO)7+x0=v2P;eQ_uM4JlUZLm6AUf6Z{M2sFZEJ;9S7 zAkpoOMfm-+sIe@D0(wwGmu(|Hua=1L;O)0ykTeo-l<6b2cF2gy{UN;0?0%;Sq?}xE zbEC0ZEJ7C3q}|XIocNZQ&vs+Bchd1g?RcpRt_J%-sM8nU)}g7Uz2P~We^Wpp>lC7aI|94TioV!8)8q^U`SMibP?@E5U9JT$3sp@K1)dj(C zAn1obvf8c~&|v{xqK*6&gw=@jJ3Ev&h$BcN6!=z<7J-XD6wv|pIF2`&t2xVPJ$C?5 zjuqmVSRtAR8k@ueqWQt27zO|lC<;A*@<|FwQ4_%Tz@4O!@Us^@0Dooy6F$2}k}M3I zuK*5BX8i_G5@46W7YQ!d5-v&R6#@2|ZQG(q;sJHVgP(yBPa;A56dYvGGHQyU6(=6% zBf8-s6_u&U(XOJ8WVS<36G2DlcgO_^6oL4kQO~m>{+={MxizY%PO(pBtuKA0p#gkU zhX#~l9BJXa{@6C!^f-XR7@7fT;DbPhPI(H4jUt}tS{mD z<#FNK*YYZdcEgvNP}PwmBelev0{%W>X(ZXwTK22dQ+33baMUs3c;qp1ptMhDB1N;k z(UPz#$jfLh<1fG=T}LxD@3CEFrlI%ObF8}Gb81{8GsTgl_eHT-A-ND}FT$}CwzwLNxar#M8ds??jF z=k!8dMMeX^ULH!-^GoR+e5-#!MF4+7H+}iFzg}F_sofSkWqz{dqnY4EEfW(@4!3+h z_WNUl*!T0McJoVLoW8iocYNx#)oq({F73B<3DXbralWCA`pqv4UL0NY`u?ip^+Wp2 zose%T=+6@^!AIWy?AR|qzg&1H_VD1IiOI!*XKLDqiL*6>cZNdtzYQ9voHx|uj;%y% z#EU)S?&EDW!#94di9Gt&odiBE|E05&-N&uL-ah?9?8|9->*2}mU$(W}Q8wnypG^3& zt@5*xsooz44^9OWue;ljap%#t+^MgQEq&j2Xk>8VCwp)IaJJ_1OzVZt%BknR2yFqW zY}S^k-QTxWO&aR6gWA-8qzvc06T7i@(MZ?laaDcqf7;yk<|lP`ycIR(wi8qD?$fo5 zj4do|E13xKZz~xKUfxzVw#ese@xA$i@7JM(V<2*%^s~HAW^V6q^WC2I<<)NAG@bKa zi*IW8i!B#NUnumwH4^$`P3=tm%Karn&(93LJJa@=ujP-wGYa1Iz3FQkoErJU_or{k z#@;i-8=HNdzAvU)R{K5!FEMrLV$GhJ`l0Z|$V>Caj}Y`rab_Mi9N zK9Su!wIrwW(s)i)cIQ;<$lz0VfAul?PdZ6E*9yWp!Uqp{YSh@rVFmqv`P z%v!qc+2?0oAMgEqYDt21?ND8U74v=J8~p0l;O#pnz&?+$lwI2Y=S=UUZ)9vqb{jXe zdU@R3G4zN1Uk*M0M9pnqn`&@yYIkB>S(Jq*thR=XV%criO|lmt)|m}W(ytn zP2TBEo<7{)a(Jria^=}~JKj^r-SWNu)Bhh;<^P{l)&CAG{f|V|d;j9SfGO!;m}+|M z&&xrpmA{#)GFu#UNjplF>mOf zv!g=5sC?%`r{m5{tC$x0glaU(`)cie{9B}eLJO$+zu7KEm&`mQ z1bSm;*{+gq1nE&OR$0k_9-@E+_0S#y7>De}9!mR5#9}r`rXr5a&tsj%>u_>D(`U2)dZYvE+lS zQ=80McrP)Rw~SB~Z(s!fy7yb0$lqvetSFa*zN{P_;Uc181w|sMz-P@e>-C&cM=G^V z2wL31#`D0zAm?jMa;1xnXW%q85GQMuz_|Sjn$tms*(tVct_06C@xRm~t)g8N2{t5h zu6JlYKNMJS+DQbWrK)hXgZ}{L z9l&@i4dm98Xb=`@hEJA)_=oa#N+U1Qp@s~W5R!87q976K=M^05l;Q_)zJ`|N^H<3Q z%-pdfz)WPJWzf##zc7HVlBDKLLU~^>Q$)xtjZ{2TB($42-cKY3kl6@mBcu?aG(zGp zUn$t2Vn)y?7^KwBC56Kr+fEdr^w4D8wjkvycVY<&?=>Ajv3~4L{TjZGbeNX6yh?}k9a^M;F)yM4v@MA z?&TF{V4;HJ(GKrPB?oeqkC1|b73OoadURKc#OPr_YwTsps|a@lBt~asEF+8%24k5( z83+}@QbFQp$fZ`n4g`|8R*L8x$e2a>of5A z4JhB>4+v>WIO7k~S{n zPYG1mDcU7bwX;`T1Oe|P4mcM8FZ#}AEFSk$EWC%=cdvwuJ`IG3d^_wB!&XGvK#xE; zfW?dNQRg!hZ9L0TmdxUl1X)|`@#iRux16TXNE{&rZ*Ga34$1|dX(}i?GzoEr8n9MGFb}ZX^x|pyf#cE9_5j4FJY=Tf55momQjt{u78lr zH6lfI`F1qn>+OUq`sr}sJ3W?(BYW8cQ~yqd5qbVScjcOmk^%E@Fbt zWd^jThfAY9Ow8WYd!6ksZVr~vI$A?L%;Vku}NPjV=EKOcHgo&@p| zK! zoS0md8PP>SHa-rNU}Ml&ei0c2gaMjsK;~CRB4<^tmbY}NU(fqJ;q+Ud4tG_c73x-)3;dXilLQVcILuU_Ju7(CbEvU zJ2p{$cn-70%se{GAawR=d{h}dp8=}8gWasoX33{pg$rblwVnU9n;0@8h3?@}`jOoW zbr+lk{loA%!}5eL)ivP*L_R!>;_n5{*OuN}O_*|7Qvqj7F1>tar~x*dAa-c_*&U2< z{Cpov-emhtM<+}p$xr2JCSEz!^6cnpb4-3)-uNr_wlBxA&3U$w7-BvKQozz*&R#M8 zn4#A&YM2f+jvE}knG=~$S-Z#A<$s@2Hm~K?(PW!%!|>yW25(LN(sJwAv)e&KnGJ)j z-;aI~c;du#jjoP2RD^eKfY**1KVZ9dCJK;O9a8RQc|>$lD{n z!5LrINa4nrpP#f2j~O;Uak}^AnenfGzL~wr_p|ri^XX^5>9QK{?yLB)r*C-M!+G2D z(}!(zVe61xcjiw#v?Xq2 ze8nqqj&Upf&;qOb+WK*;Bm3p)iOYF6ZWG%=$!}cjC--U*Sxm$$5evzwua} zZ+d%Z+AG#ABm2AB7L2V}6}Mp|)V}nI$zz?pH*X8A*4(LMmwYeJT)Go?>rUI38y>T^ zPp^pRePQOeuk&iA&)l`9fARH+%cGYr*K8TTa=mj=>hKHeS|&zc+)>y%wko6Lqw!VG zFTFmIzO8Nj#A8u;_7P2D;rfZ^?7s1#4cSYt-`#HL^^QBz;;xTxc+9t9d}-d`#P@HH zt+us&H2UP~!am>NbDaZ)6L;K+n-jAg6VDladSlJSkymNe_Quk)^N{Wy5{1-?r^w!PJA8hZG#you4? z?Y#vPXQDv_gj<(JSaT=xsG7TD`Ojy2k8K2dD*I5^q;K>37VB}<_=>$%m)|XK`DJGK zht1^w0#F6**tQR}ll{LyRMR|Qsp5c?@YEvE3-e!`*PGnDwH+;M>%4Dc1HWO56ME)W zwPY0N$5d3=@)l@ZjSWJhYHjC#OOcGE}>8v6Uz9H8V2EuDPO`A}Kt#mPkgQBBUms!3JOtoZMee#E)0 zYPMA-=rn9+3+aLMTpIOM-`LRx6LcV%7fT?a&(} zI+vWS1qYD%{@}3#G{(`9NF|Px55u!7!R7666&dXzqn8V@N+EXXFQ>$LLELSu!&6+I zp)nQ1@(2LW4iQd|Cq;#Ijs3+1Z0{y*+g~_U0@1}}vP=}JsocmsFJYEG6$_rvE#P(4MFojdg zlG&2=C3Xf^>&OzMJs?sFDS1OsV_i~XWDFDG(pOVe1j{{>#wS?b(+Z%wONG{4$rm+{ zL~a!kSL+ay7Blo)*XUu0mB7KQvd6o4uUKNVb8BknvEj9(E8HW%;k8IZ6s6aAgd~|W z+`&oWIPoYP^fa3ggT&jNp7LA{ ze1}WLp&Z!ZzTc#vfqSGJvzu6?XBa)8Y~+n(yHqv=Hc2ZNZD5qq6v< zuE;Lb|0vvZs-2imn%bM3)DE48C51raJc7xBw-#L5GUo76jX?9Jeb(JNh<0-G-)>@sUjq6go;d>Ed~-z zn_AzbmbaGIbgcD4jv%TYTZc{dlfTFX@7iym@C1GkI+FNs1?B1#c~iu zNSR>_1QyU*Xs=L!DR6T=n$!ThL}e|ulR60>XkgU$sAWd!dTF9O@j@{vEvapQHFl^J z;c+cpLPb$1*2P)8Xt<)7TS*eukF>^KH6piyciYMz34*mdxlmyW(d>C;d zQH1JQix(!!=aZ*+6fM=KV+ov)k{CrbVd4AK;qs6b0zyULQY((>S?GO~1oBZc{4Om- zW4bz`k|<2Qe<$H&4k93n&{z*2A~FaG29tYmf|LR&=)>GIkgSOLgy-y7n4HIGngT)A zfTV-Z@UoR`DyrvJRwQ&TQTQX#JgAjHZV6{yzEIS z-K3H*>zae~mCZswUuTLKghZiOp~0Cgn+5qDroOGHeR5IgvyT2N1;!C!Dzg0d$8+wKQZyuwe);SyK`U=M`n z$pKK406pStNM2Y6%mXj29Fc@IaID|#-*JkN!i)8lkK5shpHMIRC8wMY$!YFJjFS{z zG;BiB(5et?cSf%9xya0(cg39VJ!wo8JFi&fVjnF~w=cG`lp9Y$sZKJ3scF5<2oXC7 zc`8@N4f1H0QwN`(gqo|!SFecQ8QNhlUv{%P{Ll!?ZW<*`W&Y=Z*l>yS_2L@lRq~Ha z@tu;Px&k5{HjuU^+*r}RBx;g(#!-_OK>4WDTOP-r5lah#9%cVu;@&;1iF0rNC9JeN z?c4YFl3|ELILa_a3gj-@X6aUR=-RCG!X-Af6lO~mg<-kGl^kst^8KO2dgMOiEUImP%Oc(kE)Z0 zbP*an5~;}T??5@JHPdjc-%`<;|se9uuSpztq9q)K> zJ)>`6-O=pM;eb~&1_zQOeqCo99k>@^DRh*LWLzHH4W>+^f@jD1!Ildnmo9BqjvZ*q z){X~1)DJt?9kms2`ocj+{T!0q({j}LuA;WkVRqIQOhA`+6_%f=y)gwnJyrO8eg$!x zoC5_s9BiLe+tuPf;p1N$Ih4GvgP!ilak$-`O6#cKS`F z>#ug@DqCf)d^FLg;>K{~D$CXJ?&jL(zpr*0j;KCzHJt1|>uh*nbB^aLJ8q57Th}q} zoIIMZAAj1?eRpqc%jb@ZO9QS<9Xy(UbNtgywa=Y+i2jH1oj-LvAA45Y-9B}4hwYLh zxy;r!d~|+C+xW)^veyqptXq}mGuD<`+cxNbz|}drk?wwK=VvGL*~^AZ^D-uGl}(*& zwcH-eB3t-j>%xw>iHtPc(~+c2Hg zpd9HKciB$5u8*5f0wrj6+5R^53<#Go@GajQT(>Uc*66xp-Q$yITsHlL>$~oT$uI7- z6i;=3-|>8;Y|6FT=^{Y>$~-%J+<9_c$MeZ&0k(VN^O7sN0OIdye#iLa{0Y~k3D?~2 zBhwq%O|G%0o4cR5YR`^b(ytx>`$k><$sM+#Lm941c$#*Z40s%5`^b zN5tgaE7MN_Q(<}S#Kg$FWZQ28%a#R156a_TGq_HTfN!?J`CY>_IlNK7+IjMs?JMU< zOU2%)HEU}*hatFjuj{cZIejWPZmb2LO(T{Z6>P z>~HzXIaLdySMMZsw>j1+!A$Sj=8W;FdDm_B@q5e4u39Q5mhQFX50wGkIgoTDd(GI+ z+2A32^J)I?K(c~Y6=MX0G-Y!4#i8q)yB|(${zZjPlrLSn=dQ&zad`0uQU7lO?*D|h zfPM@9pX`Hs*y)Vd!vFCyfb#xF!s|aKV&7_iowf>ErfC<`ivh?m8EJ_Ee!*!?^%F5| z7&K2C2F*QSz}5dxzu;(&b-r|Pjun^_=YZdx^q-nRS`;IN3o8g(zDUYv%uLdshp*YlzCdASuf1`GYKdbtV${dAK|UjSZ-yo6{3{D zNhqU~ucrz@|F|NY1igO^|G1(&l`4l4dWl)|F&TBND(C7o5V{izkgs@aGLcM%QvSkzS!KF_ zdR8+5XnplUV-Ojkt1+F#@1*x|JPuiN;_oQTL{w_1;KTbwA64^j_fu>?#&??6Vu@^0 zwSuW&dev$C6}61pz6#LmY8#jnH8uE51o@CwBWPHS4CBIsjs%%fjH%P=Q5pW?IXV)Gp^hNlt-V|39Ajog6^pO|X?9XUd z79hz4c250vVH*~rVfj#$1trW34CKBZ?TzO;(-`9G`si7}Bh~hfqBxWKTn!iWv0V&z zgLXhrn1n7lZ;Itl;Ap0-HF@PcBoczdHt_vC8)ZyfZmIs4B5^3lpm~6t3?@QD0GC(j zqbU~3g~UOHq7Olv2yiZ%!K3q5JL3_Jlw`3uH~_~}OQe$fnNkk3qXXanbfuyd38!vug|&~6M1B~@uzPtkk=9;HZD&T@bb0ETNaQLF@w zD=*vtX3*Ek54uJ*xtrdOwj)o&ZQR#b7VhL zC10CT0SE@|SBr7R%bh-_n@4}uE^p(RQr;xAYJ}ATb>n^NOCdmnr*RUOgg`0yCa9c7ho;*KsT`lbzUND5cnBN4qa z4Z+EMG{2fZ$yk-8X~bru0^;0dl8^?}cI;)TUYCMygnNQvI}Ljob)dC}j!LRXd7m!R z&4`t~%H)Q0k?*f&D8I}lnc8YL{v_`^Tc&M-qmm9CB4;wiO;*V}@Jv3^*JL2Pilk^S zn@$P-{5iCgBI7tVlKK2bLn~4MLC8)dVs6>k*HSx8woXVP6c!FW>PZhsefz_94?0y$F_ zC~_kM#fTdKoP(*|eHsko+*F_ZTg*#arYCj~z&wH}T>3ev4WXw;Zy;|N!vd^_Tko_v zl3y_`^WI_v)NKncp+I_-=l0AqMxS%k zTky`bQOhv-uwo%@sb|gC?8nkxP7V1f1KOUD z<3==TPQo+R;?=N!=_tOvBIGe9Z{`_p6M2I_s`jB2^;%GCBs?t%IktY6GEr9$af*L( z)7_8MM=g$eSH94m0%Zt|WXhs|!W}Sjxh`$!gnW^wMf#I>b()tQ*3OXLJ;2IwyEOes z5BXkjlCqT#!X&rS&P-$IXD|rw^h_vK?@g=p^z>O!91IoPi8bNAYV+D`9V5q3jNO9FeNl_9&0YD|C)hpZRT-c%DbC$!+AxW-S0TNOnc}2(8kXK;zs<*7Ipt!r=s{*l_N|fO(fntwUpCl$zgar8Xlccgq4kSw z$rHD)bUz#b$*rWZs@omwCOd!0@cMqUYa#CU6p#elhqIF>MxJI&xY{3Fz5dm+j3bl% zg%#1{WD*p%9W&_YW>z-!Z8-F@t`Pg;#0VpOaylHuL@{699OSUQ3wE>&THKJ6l z8RKR8xns9wdFam>8Mj9^tm|GpOeO~m z4*n&-JAdlQknPdb&7W&`OwT4C4Zk+Odu%8vHU9@7^Yp|Re=*x{^4{$X+ob(30lOS) z-wU`nY}lMJJo)s2En~|0OaAwh?UyZn6XQ?jJ6(@QI>JUC0A=|**m%R{H*xRwe4Fd> zgN&VywaGxHKEBs+*0t^j%bM}L_Kvd2EA8MpxZ7N@?Dux}|KH5#%L;CBb>*9SBsoB2W#tzlV@A zsl~WgJGRJ}>BZ!DN?rq}V-X}9EKQfO*-|jV^JM3y6f0BMWc8x{%oKL*22Uo}Gmiv< zw=fq?4CUpgiS!s0>eXFGVBZ5Xg*{!G~J$ z6`YPx6G1{$udW&D;zUW?!&EHY7OkwreRGg3PHRZRVil?IS2M_)?y|geHdET+`cq6j z%euunG{FXeh?jDvKPfWl0*=ye*bSSepv@-$CQn-|$DabaM3u zT1B=(NL)_I_TU0Tm3AcuM|yol%!9G8D88Tvt=5_Gmwbf+I*)OiNtfST zSVa{;olG0adbu+!fExm2b|7R3gJ?i5bOVJ@TT)}$WG!1ykWwvY1jSD*ik-uwSm}qH zWKk58BytPEvsTG5ih+Bnezc3JqGBYrV38lBeGpxlx(`i?q7F+b4n0I^7c+a4-k^-e z!e&xbfzAWQ!w8afM2;9!f2Qg~&F~7a#!%rxuzI9Lgi0omeu7 zeAIwO#jt5))oxJRi+_d8*t2Kesfd&x&2cr-LIb`JVJQ@3-C`Yxt_XlX`XJg$@Cwk5 zvMu#PLLAh~{|$G?eA8)S|6y1sF04j9>UlL3q(NvV*bEM}k7Hyi%|P*5@o{4-uc+h0 z(s(qezmOjN)^{5jR0pF#xN6S_Z4tR;l1iu!=P6&jQi>|YQigg9)$&Uz(85y(2lZ31 zXhoF|gGxO_e&A+@Jwmx}!H5w-kE|)-&-Z}|!8O_1z z`l!MUd>`O?GD_|xZ6%fr4o@1mWYE*_qMJVjQkU*-Jhz6!5g^40iljhKaT?0Uu##1@=nsm3bsHEQ^lSEUA~0xLtLdZ}>mLwP z43~DX)F{GnGK@6x+Y4#_#UoiPr`FXlM;`jq7qYj&aEk^Q)ulMN^leo<=qevOvCO|FM}f?k2WPk zhQZ?CEO-{hHsB}|$KwSetpO*unpe;a{T73Vl4KnvP54u$merH&MZ_U2EsScw_0qbKY^fQ$-g=Hb-3w0MmLidL z`|7Vk0R@TmtUn}+MsaF}5GvzB25U%|lV>3XHI%NB+a}|~;dNY?0Z?}^I;f4R(1P3{ zawRiA+G7pV1>;`ZgNp2 zd_fjhHfQ@CDi??4;%!DU0$2VS#WS^Gv+%@dYAvcWGRTkIONBTqEfJw5uo=-Bh?&-~ zoYtqjdq_1aZ?h5>l(~i7!T39v8V@-^pjG_gdcqSkS`S6ByZEGZHZ=wSV_Hkp*|muu zA(F)gsXP;p3reV~32LNXGQD*9rP0sDpu~d+>_@TJ)5;rU7!fK?V1!os0LtYNQJl73 zdkpebMCDP1bMFSe#j@QYm6GG~kFn27jA&3G(v1<1Htl5vHZWu_XZL0=y z%8hqBjx%Bpu|mA%4lY`OxlPaLc%a`rB>oTqO6tV8Ta;T2c$iQjxSnz=?Tq2vr-3mh zk((66*BCb}kY~g(oFw=aw`nsb#k#wdLq!r$PaQ}R?pP5}H&wtVFA2oOfs*o@D@!UF z6?sC+zP7hC>LYtGSIT@5UO!Ittj@tPqinVjOI?5@vSC9ZY&e%(SQEh#7HK!;5bFNs z;CCl$b~o=>sr=M#7Xr=)4I1!(@;lt&s}XFEXg5ILc*!4%Z(vg`n$WqMTS{CF_&BOX%|F_~3Fa>hWGHfsk4k2?}lLk3+1ntva z7Og!!Cl}38HW4@QDU=T2h=)bY?#d%==A(db=k-# zPmZRt_NVH_VlU)IgEUg$8+Oje=D6x3{4|KWU>wE;oh1#dH_b zMGe6x*Y+5$`uaEdBmPYbdWT!i9c4o6@)so7)0BF{Nc5r>A3LZr8wq(Z`Av4m=+LD8GuP3R*@=#!UoSn= zcbwTdR2mgKK?9HP#G9wGJDeMjW~>_9(Pd%A?iL3qCU>R%zB}~GfQK&gN6YrFc_U!q znK>3m`&{Gly;e6vC|H4tWZg`Ga> z_|0Y6>3si;^RneoZ{7Sa;JJTyHeGb!7ThD}i!Knk523Oegj#<&AZz9>|?VDWE zZ+v>ZTzjh5GCnx!TINiRSkMq@?4I-cy>W*{WpN(q z?N&@w7G#$_UVXM@>ec=4>gON(8MlXU^Def`8S5+g{Ym#{&QF7Z#0g)OaoYLm5fI38 zXtL|?9UO&9RHh!s@N4~LXtYf`v^m#yVE|reL4ji2?63dG_5G5LZ0E>aFwtr{sbAx2 z8S1dPM$b-tm+v{e*4S}zeDFxdXRelEAk;R0pK)l?=SGX4YrG|3jq7NROXVCD1&b&6fZr%E$U^05(MvHc8?2_%&_}05E=)}*zTTYGd-wa5TXHVx_ z9N5Y1)y`86SNO2gW!XIN#NsL#UbVLNmSept`?TxqbIYTt%^KU0N%>vNfvLM;mhm?m z{5D#&fA*iE5^4*-kq^mzv;R8utFwEheP?s_%7N-CJ*cc2a)l2JpPkxdyFIMH*DLi8 zUHu(jbhaeA^5?6*|NiZ7zL-4ot!iXy%+)c+$=75Xom`ckID2-aWyIoo{L92&jJH#_ z-umHs?J?KUVb_|eZ@*Q2KY8`WnaeGojNO=Qi5w}LmHob>`Xq?8nH#f>Q{SHgub$P9 z^0y90M0DJ8^lS!~gicw`Po1u>C>ttiv#=9$c3Q6A)=K`XMgy$)f3go#{((~bM?MWi z%KjgdXaAMB`2Wpx`5)7`)3a{34bCAg)S&$Di{bIGzu_o&UH%u9c4Pzj{P_m*>GNro zb_wXM%@v*Q7g-q_k zJn|R7CkHXKE*U&3YuyimYHaetU3@Y$gOC46*H3LA+pA|3Cgr8%kx!**j6Yd82$RL5 z@N}jv^*A5g#G_3-7~a8D0HW@yPLII(S(`{TQh|NRhi$;}I4ic(4DIiOl${XB#4n)y z58+|2GiIN{ro}-A5Ml|hRT0-za>5Noj7GQmxC>hA>u~U7Uwi%agbb0Op^-Nhju#`%ta>)k4KA ze5=mn9>*`gcU zf^5-JmiGzvsA8cl&2%0?3cy&%G$0|;27b${AdU8Uf>4LxLV`A)V`Y+k@!GF3BkRfY zYQ(SnYbuMfs@PmPmQs*iAWfeuze8i4cwKdp1__A_xxu&bP-NO4Nbto5FE-({*G(jK zc4@GVdt$UVkXteN%KAhqM0|YQ4x(Mi2PO(iS}9aeT?nwHz;ejJRHqlG0K7X#8L0qk z8;*a0h9kvMz|&6{BQJe9NK`j7!3}`_Ne}Tk z{`!u8WT%{atV=F zgAj-k8z6(=hyMuoaqZ~hCz)rwiCI)}4Wo2|Gl?(LNjWFoQGH*?jK)&7vD?}eWHb`a zLTl~md9yfztU*8?GO3;c2i1h*Y@;4TpW00@4Zv zxvSDEQ7DM^5`lg+l2wWzJs%xp`mO{RJS!1j_u1$Lh&~PzZM1@f5pfv}t+F=KF`|mN zXaR&~2-+Wn*(!7zB5h{U3hPYi@lpzL_krn9q*YFV-hfQnWQC6>QSGtd@QGqg5(=~t z=->ZeZYeW8DKbzj%nUJ+B6O#eP&4Nsx0RjZbL0EpsH1LI+3 z;N#Iy8_m0M_bCVmXdgpDr(jT?!?Y!mf>;)akWA8>W7{Dl=rCHTEN&&(eQ-Ejf?`cN zNojn5poU^uNsznNlW1VWy4W<{MAfk|t(^H>D+uN7@gqF&IdlRqyrAXWRs8E%;5ZE( zXI}6p_0Ruxr4*h4k(4;r8c)vT>DE|xI+lE;44kLIIDop)X#$v&NqfN@ks!rjBFa}n zWPy8um;|R1+Cz|Gy13z*yH#t2W8gHwqrX9t^!no@8qDK@&|J!lD+=q$L=+drGjd{UwA^l#Mj#JU zxCPQe39_x#xAj%t8*gOkY7#9a=_I&en*EgjnMfN=XtU~PWudQkQPr8{39t7PQBYA; zTREnTu2;%<|F$-LV<$8h`>v*B?wet%E@ z9g0rm1B8E58rWiR7+49F1_QV;50$j?KSa+IWSfLhDO4z7mq8_scK{AP>Y7Qt`*@83 zyfH#q;jAAgV|v+_D+I_6H((~HzA2~+{)FN-V02HyX(%%RIi^v*?BB<#!#LTI{pn$< zx>CFb4}gA8m%cpR;q3uFz^l#!6$gr^ZJArZN)P}@!hqMm;5HLsNH-h=bwQnA47h}L z%c!H=!RLXf3&c{^0D5*M>2=!f=ur^iBEQuLAp4eG2~;9`3DFI^M5QG^!`F2-Tz0IrS@JAI3h6 z?qwdtjT|~{sk_-agg_}3m|YRJ-!WT$EKG$)MSl=6qaUeLt=U2zEV(-JdRl%qE2~vHwZNbuGJu?nQGM*1g@;m!}c+S+je2NpA ztj#x$1*?RYO?@agD#y^HkZ0H79&;5!*AUBTBlDwgSK$q$v$zq?ML(w!dU@Uq!njAQ z;R)-L%5kCIbC}^1PEj=mMa2PWco$tkeqU;f9ZYr6kBl%Mc!s_MW{%10{Oz$S;~uj4tx*|VI%joCrtIgj$eoxIa_YU-2K zwbtQPt1|erdjj?J~FTz!sw)nv)8+9Q*~tlCH86JK{%jC^|gk>cn2!vnK+ zc6>QG;>?bm`fAR4{TtY__gm_pOg;K5m=oI5Cb=1{83BVu3x)#~s(~(-|)VEWXT9<3w z_Wk6~cP-yfI;U*kJ6+?JDd)gxRhaW+efDQlXKq-|e(!QUb%D^K@mX!ra9@7Qf|33y zRm+s?V_U@F)rG2~Lj$htW3ESMR2@$H>F_g&Uu7?IjgQW+Z5f%Gc%;$|lk3*6>e%dZ z49@RxImWNLuKrs3>$`U?*{*9hR9^al&o%h>mWi8)~Ec>iw#MS*-hsD)B zPqhXRJ@m(1_guBlUE}%SYiqbl2#24c&g|0JGu4f~* z@$Qa+#*>Le_Pp`IKUp7Z5D;=)A6&L zJb&(V&3i2%Xe7YfQa6|o-}2jF!nzjQhQ-l^t^S zdO+Xc2SzYFT$>c|baLo!_qxeryyfU*)o#ntFH0&OjWmAm^8D9-s>HuaeK&$ivHwJd z9Qscwx&INQFSYmV{f8U#zi0C<^a9cOgxC%T9QiMx$?5B+iTfA#SN8tay8oljg`=Lj zX@*HIF$AC_XtuP=_wPWG{{tl{1i<}cK)N0K=X@=apPw>F@W8h@z3e=aFRfN)Xm$Yf z$qs-%vFj9iVuSAKYM?Av+sQJOHgDlmYSc$p0TvQ0o`%cgGsx>$#x%fW`m6jT&!~3r z@+Dno{bzK6U|-jCuc%Y7NH%ybSu>86`PLo4d2)= zUkFU&1FaOOKE~y*2ytj=f{DU95%8^1lK51HYhGwDM=)@ZRC!r>-;js#LontIm4mNC zB_Zu!@Hhb0qY)Z~A-(uz>{gqU!j@7}iKeJh0QVAZCS(2b*@Y28awuC9!IVM77^~*4 zLtH#)W5ZzXV4*c(#>_nFQgZ@Y3KJPirDI)m(D@OI3(dd z#M`+*aTyu-V!7d*VD^AISxkr~6j6Lb0>HbmLA118I7fcLhPeAvz>9iZ$mF-QLV!Ja z|9}LGrwOzfm%ikKlt_inn)!`h39V7+5zzwV1Adl+C+gxgYEp&DUrD&l!7ove4-T1D z60s;btJ?b(-g^jYf`wk86MDPev{;VC)@WuR>kH=m6mJDgK7RXY-zc&I{~DFzRgmcy zx`!VviHhUmC{q`+5nZd50~e=Td3qUkc`)gnm{$s~L0jArR&ZN!s(=+rAP;^!&7OmqLb27uNT}VAEpjo7XjzP`2UCkcMj-0b!JUidCWQbT3DCIr ziwpZ906u>O2DVW`4%7l^YEtI4w&P&z#r?>N{ZfjJnX>2d_D_0`r zHsI$4#EU?(++dBnze*1~W+8(XmLKf;i5z;(bV17R_TEv8^Z-%sL_; z7l3z&^g~wAr6KVYM+hJY8J2$Wh*+M+g6wd-xQKUL!;siJpxvsJV#DW#;1a(q1Tw9|IHLErKDO`c5mvC(h%cB#1$t-ptq_ir+%18>!Lpg8+kyg=iiuJv zBqf;WK4>~Kdh>wxN~c`J826P|mwWD_Kz7W%0?n#qjavzYLy(12C0*3{lKE6mgEY19 z4;sKDBMwL6dd+Yoe!T##m?aGIL7~j`R4?&5{u1FQ=#_O`QFJWlO)d|aL4ClL`DNEF zYVfZqi`CbqFnmS38m7q|S*$dI0iB@4pn_q)pjDi*NZ?Ja^dHpreOM^(xe*MLQsW~K z2si7fB3y9 zBrY|vlD=x(Mwi0c4a|3N+fu09sH|fu_P@5*4fO!dTQHBq-3kbIgo0y4Zf+oOhi(zM zf!sL=9K%Y$=%4<@5wYT6@Lx9&crg-M|Kwjt4_rX2i#%f6cvK64yju(<0!mJV#xm}q zSfD770)i0ybqMDn3KDZbIpSb?D5Bj0B`n}l`p$U}K_@xpgvhHC%E$^bI@$uTW6z2V z$wh0_@A&G*<7#v{*qsXwinx74|Lv#mckk@|Ew?;APxx8gb&uOvQemf}iHM@DN!JgW z>`K9NXK}$TQ}e96<)bp;x>R-I6XY>Fg!uX+6&oCTk}nu_dO8P6yZ$B~XH7kIek*s$ zT0FYick!scx(vCxqk?Z{(o0I=j2}cQ4q7VIwW6mug*}s~tdI^vZ3X8O`s3Jj#0Bp@ z0UE-X`$c4Az5HXW4Oy`FKwp+7JUCh|1BepSI&ElcNf%T}MG- zjq`656{T?@Odd-Az{2zBbE)ynd0lck;Xf;pfCv>a>z7?YwG2F1K%euAzr%R-#PxGc zP+Y^S*G5(T(XNM%$fdU4L3zTi!lUvQ$Kae}EtkeuegEuaK<4P|q728>4{vtd9rwT9 zeaW6Qx8tHCBH8t~0ar!$h4CXZI_~7w-oq* zo9)|)-6a{yvBUc8<`Jkx^@07WziQP0cQX64iH@f3qt22M+p5<$Zy!!v*U>+gzti=> z*zMUiyUYKorOtkn0$fSiu&vekiEr(*ft|Cn4bFp0T-OKQ-rRDcJ9Ba#^X2vHt7`8| zZoXT4Y4Vpm%LCWDyFrHSPI|@dN$){@Yl34Qz@QB0t6WV(^0zHf!|#UKdR^t8xqf%L zB7wRoQs+N$o_gYXKK2|q4yR@(bpV8l$@b8B@Ser#YUyZsG+utwa$@r5t1jEv*?ilW z>xUNCBm2RV*$U^*v$nBGTer*R{M}-y%w0A5p0eekV{f-*U?Shu@?c=^P0P2FK0kx$ znsa2&q-(7+L!Q0*>*|4>XZ4+v&z5&zb>+LVe;Qt!oN;S-Q-pqUa`QEt*7fdsTg2qj zE2W(sj|QiHD!AP{GCynnO8dJhZ&EFFgCD)-S~6n0=gM^=R03dg`>zrgHxLbIYEI-RCWjM_oU=R3l$Tch@> z@FTXb^N+b)%LCf%@2uMjItm6KFYmrS;+*PO`S{uQ_Z}2aGHt4|$+L^I5C6B>-+vNy z{~3MqKZ?5lfKGz4wf{c)GnY?St^MChx_^|Y&93v)0cocB$D#rQIYYK|5ZM3}+JE8w z8@xfHuIS$rb*~j}24&M=fcNhUnBrwihigDdz$pO)>HzK^5K%z&^nc*~4Fc$#{zw2V z0qWLip5@<{o@uD%l(15-8JTWTJ0(n$R7{Qw>KWz0q6zpbGQeK}ZPkAr#duZFe-7fI z_dfVvZ3v~&_NAg$Y3j_BX^2XtoUbPde~`h`yx{vPfc5>e4?shPX~-ExfI8x9#(eoJ ztsq>t5VRfn;G7R$qShUZCJ$@KNX~Q60Ls%!xd<}sF2vu3nxS3-=n$+1D}mlm_@l1! zw{|9}o9tg44R-qQ!l>szDU=|diGJBpoT_Hz{2P(Y+rFg zuR%k0)V|Nv^G$x=Jj7F+iUD1+&vcL3C4r2=ob=TU#>!l`E#}0i^K_s<2b}vIo^b zshC!VXE2fjMO)yA85WQln)Q`z<5S_|0)7E?3kvP0npmukDRh_BGsRYcR)|b@K=T4X z{xW3%l5Zf1K;{suXS-To`|hdx+7nDJf{{`0=7M|WW?Y1rHsCc2uuv{!Idj}6l}1C< z=}-ZwzVk<+H24~HxRbt+j1&>wpoop-zOT!T?(yvFjbavKt;p|mXhAab6zwOu?~s8a zCJ_pUJl%_}v`n0cZhsBX`+x8)8nu0j-;%KS7N{Rf72G_y-4yZ`!?=Z*nb{0b=Pc0* zNS-gd`C%)FA1}MdibLC!MjC+NfC?h`f1$Ss;pF}a3jcF>d<6Qo--0LBm=>>+4qD2^fIvAu+Q0gAzRkQt6?U;+(69pAgdsZ!=g z^Z@kvHB_mr;uKV6Z_F$b+XhIc#C`8-IDilb2$dMX1og_=Wf&HqXu!R*ig8~n+3=P| z*Dpu@#1=_KAF{nvI~M`|SY6HrxrdNmN8&-d;9AdKQw_Am&QJC1gRI^nJccj@nW1>D z!FOw_sTC^)=z1l0L)xS?f}e1YJK7$zI~B>Px6#wLKnK8&J=B1{PY2=cz|*Z%tl+kkY0S=dy}9 zaiUZR=YXrwh%SyFB?+q=bhB5<3er|uYO02m31&){UTNM2+>BX5l$)MTMZIgFdWcEh zjmvl{8Y%Vlfn$s`Oa_TiGFYH%1ZZpSIs8LJ%&eedo(f=YOD`a{Rqn$mt(x|%7b0TAZe215a(&~#LTF!*^BET=}|LX)Efp56 z)-dg5&L=paZYjX-KzszB@Hu4q2CGaDhrDM9l_5u=()1-pL{F|X%)hV!+5zqC1f7Gk z`}oJy(KJ8Vn+q@ZNWV?DQ&8%{z6eKG^t;dxuy0Raqi3V+L_w5{eE*l~G0ZPp+ew}9 z-IL>we^psvhhU#sZ{Y~;-75Dc8@48(zopj2uOJVY$>O@6;u5|JVf2Eu9zjbCQY0YB z7@`7*s%&g9fs+klyhUqjL~eq5O7OHEaFocYawtL@nycbB&;!G}L1;Dv2j^?Wdoqjt zf5F*{^a_D8ks$L=|By1U94qe2tRp*sALq!Doyiaxks5TT{>;us?)A1cU$oH+;1K5F z!#wp3a?`Axm-km*s6g*2&?v9skBUG6MiH8IQ%`5XYoAtk(Yd+}(M@>XTr&rNKk{oi z$#7u~KNpFM*N)LMLN>uKs)`WW%r0OO3sh7kUtCEh)e_xh$phYb+4$E>M&V`e@_3=ZOQ}h=Hb?@oviH_Ke=R+5d{pGb& zYD?tM-Q6nGzIk@{C-z&{^be;Hbp|<5Rh9k7l@XCmJ9g3C+l!D$ieffBJeLa(0Hu#S7mTkMXMIt zmv*dc$&VlY?n1_;!K~zbe%N?ByLKqYKYPfvYoqN=yXV6B-%Ji{w7oOZotwS&!GkgQ zr2ese_7az2Z1I`-henQ7eQ-YRqMjZmc4b_(Z$$JDoO^OQh#iRD{A~5eo{g8@#4Stg ztCv_#j4Y9>yzHq9=Nkq;JC*&hbE`VvX0Jb)y~=r^(WM%jyr=)!W#05i*Ku*sd@cL8 zsl_{6^6gU_UEjJE@80DHe28CM1H1B1+4=`g?bT;GWhe934Giz#X(f8 zwkWmMUbYC*O1BrvML5 z&CHiiZL7LU9ZY&Xm7nbRr04RDCqhy$&uF=l<2}cx3T|fQftoX%I{C$W8_u?xt~{67 z^U73g@XjyCu07@7Q9BvDykq`Ix-YOHEX<0U{|3bKMfJ4KSOp-Pkj_MFrD?zjO!*?5CQx0U~b;^7h?NTug3m0 z>(pdm#Pe%QdP62AgAaFXn|wE8c+*wv(~gKYy2r15w4`|Yshd5-_1c)+^;6pRl)YK& zCg0mRbNTAmi-(U*m|Y3SH!teBGV^XhYtoe$UWh8X@mc1}547f9UHd^4_Fq36;`ZEP zXmbo%CsXAArDly)Y;7CFrr!=t#h!c)sIOlD>g%XQw;el={t&9l(*@xt0%ln)^7s+ z^%kJNUf`v_UU2{MAAIzGMd7?7s{k2UQ2Pu>jaKb6zx)xD%GRq0?H2Q2Iy*9{3(+yCsBGS zQw-nAPTf}EZe@C|^Hx;@^f*rg1IqxN&*iMQ59#jRdU|VJ8&~67h?7`8onLL`9J19I zSfgEAXD3feHM~DjE*keF>(>#561KY?yi?rWXh_$PBvz^_Vu<3cjEmW0MT+S>{=f?K zf_08mhnc$ZRJt?SBy$`;h_q9u$-rQaL&4I>x{!o@ zu5cEYYUqW6u!y`v(u%d_RZJnFvS+3z7J6|COU)UW5GMFZ0#j$GEI`{Ch1ry!dFL^b zQ=jzohcOk#H2R`Mo}IEjzke&up)|6diJ)~Y#P=8t5m41sEcZvN+6cHMF{tqZTg_HP zCjvm86qsJTj`UcV6gv4FozP8jrIwsv_5`a_7lLQyN5HwAAVgw>QC;G@!i6R@Ye9`O zu93p~rI`KvYq-tBSBCbLa%f$65GII<48~2$2bgZ0X|`pHjBv4tWn~OUG@b}yhfZ-u zyfcD})A)4qQVWj)V#G3$1`TD68R)eXP87Fks0M*p8?-_!Arn}Cp-5GVo|o8t0)RMz z%hE&5C&)kxt#3*zM5oE*P`bdkyCqE6m{{7T71&Ptn*r(^r!G=+Y*9PuViW(2&&_dQ z_z&=r+liDXCseN(^37YDiP`BUzokNQ=m3GWq$LlK)9K~QSf4UN>8oVQP))qYis45B znXWVMs|dYP;2Ex(5-0$AlrAVIP&hMyPy2sqpKj{8ZvHQGgJ; zBSKs?itTG+j_?iCToLFDj{l~r$L6#oVD5Iu0oD_fXbm^iiHw|z3?8>K0iCNuFEH3u zA)PQLD)~9Qou>zza>!IlnIwk!>EtdUgi|pr|LFU*+~Z_3KkpbhJ9JJ_Xp3Ot&oxUG z#fL~W!xyg>qIgvTQAXsL{JzSc-wsysK&8R%qL(p*k4s{91W2ThLnSFtJ;swLxDd|8 z=7t)j7(yYj9ItOjE$EpXf>Ju}ZU7!#iM8htbOSCLJk)FJ?he3Im5j-SmG#Yc$Dq#>{zgP6l>b9jHF;DGuW2iBET8i`r#N zp=8iJD!KxToWYd+4qgsgYv!dKLXMK~QSQN`0i%(aS-D%?o_wqu^%hgnpi2>)x~UvNk%`U!?EZ! z9FBk;TEP>2W;M-Gf?n+-V40M|q!P>md(u^bW1?!itKwahLm$f8yK$$7x#t6 ztXzg^+XN-4K&-T!Dk*_qo7yciDms`ewq)vin}7El=Lw-Smfk6Qs4Co95o(&xbGvJKgxt6ujiCIVt!dyG{u4Y2C*nt3&*73-l0#N6 z&yg&$8SD`eSER^wYv!bI|Zb9EC4t zPkLBgwv#SA>I?xV!@@n$bTHoF3*V<4#OJ{$df%qiPLFTQNgl`PwawYa3UwmaUNCOHd?avfvo9bN zCvG8Yo5MOIIEcy3HK606#xq0>9*)*n&d4NZA>7M}Ih1U?%fd!VOyL$fL$WJNux8dB z4SIyY1{^}reMEN4Iv%@o4omB^Nj~!TiOuPi$!uvXU)f#wTfg*`eq@@7NF(MKm}^iQ znodRAJ}GwA#*@7myCpUUNg^u+;vt!RI@b0EEwsB>s@J1RZs&SWwy)_-j=#Ut!M0<# zSVzXMcBLSKqjLol6q6uI36v34rv+jd@^&DPw-A-mskf=4od$-AOWKO5Cx|BO{4XFAFEDR`dpbS!-P2NU7rGQ|YDm{+4uw3Oy^x=&k_2~7#S z5mpsIhewQ7JjGEsf|Zs&Bo!4%cNN8O?oRw7{kwLz+DFB^35`O4h&P44SppDC)O|P1 z-wKgU1iP8+(1Zdxfdar$Xic~hQMl{ioUC}_Rj{q?!x{uET_JLSdE)+#0hdh4U{2QH ztQ$a6fJR$I@=iogw@^5|d4L@9PMKDaG+s)|DpAyTZrE~e;2FO#B47kfe5j0WPq2(d9$VuoKQ?L(V%BO3)0?a8M2gK0`bHz<- zXh_k7xtaD9M&l*o`q7f`BRbP3Prv)8jTvr5t2JPVxSzP?n!z=aweQ+ z=4kOUA)lOfQepPf3(#O!;aAKkEd(E{1plNiiVy6v8%JfXgzgc!Q6||uLT6SDwXbat zvXUuM7_(;FUYeRV#g?urO2X~kT+vH>rL{a690#QS7EAO+XFD~DvZPHF#UfK;dTD;= z-J#8fFcu9pujw+lxMoQ=n0_I05q&Znqv@Ki=}MuKvhcn{C0DD^x;k8 zmh4l+?;X7$a`p))Q z*Z74$QMr32p73v-e|EtLng}FmPaT}uGIsC>Ft-`8B}t@_3o0?ZzlGC-)GNz&vawjLao|`w#x}M{%(yGeuq)E=4Iuq0X-6XXn%em$EqmKN; zBSh@*6Js-Lb3d9Kj?5*lu8qyzGWOKA+_5o#%kca+@ADzP?IH3F{wOJ+tD5xvq*IfAoj>xRFCf5#Y{-4&dg|-L>&GS| zQ#XuiEm@C@t(ezyd2-3N)JrqlLZJ=j?{Yh5ay$BZMsKVc{`_X@bI(-P2Ti7<;oNclA5e^(!%bJ=Zq9+tWLl^UAgp6PqCJY&xek>+2iWH}_qixHi+*eB<+# z^>0nw{I>7wnN8PvzMY)e4+V|aFE5^{y18wpXJT^mD>G2g+;{%wrg!@$W^Qim*)TEv z-3J$dqq+_bde%~3rjKol9ln23yRzfykq6OM|BpQrPt|u&GcoVwlGlye+`O@1?aU*S zvD>y?n#_-=w@*+TQwJuT9Wx(}T{Q!bTj1yK1Va1kZ!VgdIe2~JOl}#tT&A+usrJ;w z(Hn22el)XxQ(wZwnoU*b2WuxceObSM^2X-A`kO01s&5(plnu$6SumEhc4pJeFkq>G zzIfd@4#NnHkrOlDZK{XXL&1r4kv#)5Lr?YeOiYZQ`nam1;KJ0Q>7J4qX2m~XUwZv0 zkNq5OcXR=0WnK?S!_Rn?pua6Jrece9OZzYNW7_Y2Qr|rPLwy7I%l~C{lm3@FxCKmj ze-F4b>^yP01N# zUf@exJbNJAt|b%T6MdV3XFD;PDZ6*MJnsrb3nI00Fys9n1-K{MeJ@%OKvC(ZeZN`{ z`+I%mdESsh$P|Wn|KG}lBHPi6w6e^1Fj2X^@}u~`yGqr2l&5g>YRT#&d1%U!2d}ci zc7_$U(zU!6=)OTEG~+fBR|iIO#k-K%ltRxOkex_rk(7qU3-<+5w2ykbHI+jMfCUkn zk#auXuwO_w(c@)T8e{~zVXnrx!oj9$3dNVvsbVLhka%CJlPHeC`JKu)AxzFercol$ zRWrr&Ft`Ffx0)_N_`)tU4QB%Vf3r+-kn6A{Y*nuh({@2s;^^khC)55s=9`2LX0v&? zCG*EX^3lM;UdkgT5oV{y*cs>qNM?S|Q7o)?2e>-U5jGIQ2PCQkuS9^LNno_3)=E`k zp*idvfNqNc;}Wgy&Q1`Lh$HzY$+MCG{-_{^C)3`K3F9g{!4^l9cO{{H=HCdgWGf;? zYP~XCS*s{gOL`Bb5Cp)p)+4;?2u9E@MJ)*{xQK=z(Kr<=FtiY-;a0Knv|8Fh?Kg5c z45wA1<)9CGZ1eCGlujXy$y?Fy25bOI+S$siW*b8~(?p!uPOtXR$2!9q9eR#l?lShe zVsMg<#6pJ>5etnwPeYiVf)@(FRg2UsJem;4jh-s2WrLm+Oi`I8_ zk0(&gEG2k-HvjGfCJSt(|gsd#gW-2Kez5+!(O zDd1+ncI)U?Opf<2aJW*q3Fya9n_Kf7qB3aIiUiinKj=;NmlTSYC|a;upb_3=g?r>yGWttyeSx=< z)G8&4)2rg4^1xc}#kQkvzw*Y5Bnw~EFc&{go%-O9ja8w9{O)k88QF4bN7t-{?#!Rgy&;Ov}g zZ$0AwOQM2KA{m9kTaWjGhtPYy-STFfa|ne0%MF2kyOlKTVS`>kZ}jBt(|YI~0HrMO zQ_$WszuXybPRQmh0~P(__G9o5J~0gAtA+(EBcR6+sCWVOPTZyG7^eWmul;g>Y z-)%rJmPO(U>|`O|B`OR9_&m8ZgP{ZL(IRFDtrivulqw7}(3&|s1-PNMx13cPx5a2swYgXFQ}-Sd*dF|4|$Ylitj*HF(*)f7yPtc6pE8f4|n> zJ9S$?KWC+ngf9P&+kcQh_04-xXv6Ii_|Hx7)`ct1w8P*u@G&}wSD4-cG3W#O6nXT_GnigN)(2Oc@-nU{UlMi!8=_IkDbOFZ4I;3KW6i?pv$R!v!MK~TXXA9!7=pzAMU@m zCqMP@$ZqdY_;T!hFad65ODN2 z-r4iW?J3phooFGeHwg+`p_8k;(i>Uxe(UW$1dMyHOVW(DHU84A zG}++2s$PWf9`Ec3->2}9!*}ODW`u^gg(-B`miK>>nfC@6)gZ*5gzBB%SFv!HeirI4 z8Q^0Vy7*cBzjMz(=sic_W&Q7LGpGN}jMIx2{X6wRBYXbMjK4PWUkLP9N&X7~{W>Q9 zg@As2y8pR=ew~8;xqN<|%>RXa6u(YE|3X5)PC@@%K)+5w|6D%5PC@@dKEF;u|4Kl= zPC@@%LcdNy|6D%5PC@@dKEF;u|4Kl=PC@@%LjRwpAXv`R!AhBhwCYv2mvr5Yh)y6H z5z>OwG#xGiFdJ-oC8`5@=5SGLBHb!jA70rEApGb&@p@>Si?{BuRtO2A1o*tK9CwCV&zr z0Syi^Hy}7{DEurWG?Hv0NvOar2!bcJ@HgINbO3CDg11)k^-AcDeimGi6jg93T%iXG z5DM10TZ`FxNtv$rasA6s2-dCLh0rGGHLOj0HypB}a7fodE+uh3hqFUFkrZbk!dK(J!{d7!S4g^SmJF8A_)+IWVEaj}1={LD zzunz#zoDYu7|Q15L@_80)%0rQLd;HJ@)Po%u0qfv}+H0-;c;Cq{UZ5q^b>)0!6G#v7& zyhkMMeI}J#6};Z_-OrV64&L^$c;zk{>ULs74ER)mjh{+%wXzjY32xQ3N61R`7F8 zM1)!HJM|jUy%U!hU$VYnish6~?Q^yQynv3e z8e{0~=GTwLo=HZo@#qfgH%)|XPqc%niMhw98x7SJuZ=g>dO^_g`NdomGT2!ZgD+$X z4`3ELi8_uq6OMtRotSYb?Qxnr$26m<;<-d&+?p{rv0}U~rgSvuGWcc2X<#V$z|i4T ziXE83SEY#a+L3I6(qDwR#k;w|^1%9NN<>US0&_Y0&^?Py8ldNaQ%e~|&JhM*6%NNo zC~Pje%0e$?XoaBY4ue6fZ*nBVFrer1R1PpM&~Wn%U6iQL#J2_g#u6Vxva7Jw2mJOC zPm)5Tut?Mtj>@G-09CVEyO9letgV3Wmz$|#i%IqywAID5;1?H(S4=T(sbE7lZ8%AU zN})25!^jmDOq3}guWb}c$na5yk{06rjdK?Jbn>QlG!}oz^6Xp;f(+(jR_J56GOh&; zQ0WH%-&(l?H)II35MSdDeGnu&j2%mtDITvw3kJU^>6kf4J{ z1zJnh#^`&K13L>OjwD5647;?M5auwC))hELD&ME*9ex#*#Hx>!S{*Wbr^1&==N%MT zS|crM1W&CvHCiKQL8O28})w=0A>#-Rvx4 zEi}&mXbxzgm^h3<8wHc{WxoaqTXmMEkCaN%{w9n{A>)Pg(2M(Uq#N_4Y*Hr9>tB+Yt&&WaNc5wBy?tN>D3iZ)Z}dX66|ns*EnTvSmL8bSK3kOZ2p zYd$6T*2-+rdg(}=ZXLjO>2eU0ya%DI&CCihy_vSvFo|7!**Ndu!#FL~B!+bGsM%GfNK`inndODnqa#_H&$J-fLJ;ZWB*N^zPKHw~t}r)?IyL4%%{ac7 zmXIB|Z#NbeU!f#cp%Fa5aPdbN=?wjq%=QPc%A#m|yR9@2Pa%mWEr*ma)jMoLKnyxN zbCrxsZa}cOx%{pO9!>V(ZgnLt!aD@@1w-yCyMmB#p&KJaa8CCfEP@w<(BdKB6|K?V zrBlt7d>L0EeCm{Hcw8a>n0h}%6%{sP0Nhj!|H5{MfzP#Lrrao2>C8oVD>8 zcIUZLJe#}NH4=|kiQpF*b~G~r5B#*YO-#eJ^5{8I=QIb5Ab2^O=#uK$alZPC+Vt0J zJPR4^RQxI3g})Tn`1>AU+jbp5vvEv2pL|$2owIXkbf@q&fCx)F5_ed zn|wIDqB?drdH0Ft=g3Scg*NmjH!|h^+s~~WBwGaZB0GY2m3vCt5f#5UlKe+wo_IdO}At{QmNJ$cyi;9C6K0eX*@-n&|sB z`uEoDHBsmPTJk0~S)26CruwhjeS3qRd}rp6y{h%P-|7ua)Jx;tryl-O)#ZtglYlYN zFjF4=-L+G)$!Q3+g#J}L`ql3!jZwisQsUD6Os1vfG_KGlM4!l11yh3 zJRCId`z5LKM>1DVHnwgVOP@DfIbpoN{*}f9six~q&%AtN#&rFK1E>C4e>BGQXQJo$ zjkh1J@4Pbmou22$zQkY7sIQ)Cy64MzJr!3B8TCc)px1Vxsmn(m80rwNKeMIh~u>kmI181?k^)+hSjx`H@6C`cIo-DHpT@yQ44Qi*H3@WuDH`d!UYKl{ zbF4clBxgE*Z|dXMo*}b_rYy}H_T-v@yL5^D>YU`P`){srY_`>}xcT_t40iK%Th-?A zQ}5h3x}@StSyIOfHx~Rbb7kg>tuw9P#9xm+_~5-gvu|wNJu^Axnx07;&q>ZY|F;v@ z{XeNn9RFc+PvtdjZ}|fdqkOF{bv5zPN7o+r?`Zz`p794~hrJOMcEym|@x(RTwQn19 zoiDzebg1X^>l0n|?@u=#tH(xNYhauZuB_VYU*D7a@W`owcR&Bo_x$y5Iy*kPk@QYa z^UUG!)b*dTpKGt}Go(H>HScuC`bj3+>+GKrV*jf4=H>hQ635G4%B5~Rm(&_D@_b*% z+NtpCGet9}7w0COY|BMvY76?3ZWPpS>*@b^B7!<`KI{0EhlXd8CidIEtpmj5%656Y zu6XkYt+eKsaN)CfthO@yL>J$tjk$NLrMB}Hg0HYRIC=i%2wT+haoPsRO|YvzA2^}S?y*itTY7+z za|^)i?jN(!S>`Qkrh$Luc*y3F>&j1`%lq7#VDWh#v32=Mh<`V9YhWT zvrKlSH*&aQ^Xb-jh&O&2Vw53r_`6}^rfK9grUrYSa#(Ce;LDWe4YKzpg&aSNj?;k= zOynXURQ^mmjY7>|38PZ{?9c>yc4#UM*iNx&uNJ?4JNKuMdpG26-ozZ*B+MaF>9e3} z4gk!-KvA27x)LuYY9b~3RCYxmU=`nvG(HTG#!u7m(xk z5i)X!igzKgtlC(-++plSdBIkV`n8luVempnUrk=LShU)lgSDs?y;v{BoRI>lsW zA5rSGtsT*EJIp1h{oK|fcF0!P;PlpIE@RLpAmLfUstL9>qT^mlf>6|t3gW7S7 z)ul;E=nk|3cp`4-9$Y2OP16f#1u914iv8%>Cs?+UFd z)Z_&0ijR~xgwDajP!q%#ib%Kk8epdm7@udVtY0-Y(W|uNJX3yWJ0Ma~#G>^0Deh_~ z1fw6}6zHLU zQmPDXx5(@sUV;DuH!G7)qO=8zBk$l&ncP$~gPuWai6nuDJeyqI#HAme-AHwkY^0DV z$W0#hNV-@`o+X-i6Dc_9%Ct`XY)vG?`W>9p$j=U@0!p!LTBOa5@{wLcbT(NN7|X~< z{E4z%U1nM8b_GYT4moQkGKx{{-#Fwf>*4j*T4n_Rq+&bFzUfq5DcZuM1>+EGUG0g$ zq>JoXR@uddA7Us1m9}Em#`w{*nQ1;lpt<_V(^J;T>ktih zm{3LR*4Onx{U+*q)`j z4ACfR%ftJN8u{%yTN>vtl_qx9nvQWr1T`my+EMKg{ut9Ql|{$vGI%n9dmm7~@hLTSTbyR8i)0uG=swYXcgDUDmc_N;@ThC%@0b(2UHL_7dF5{O8m|KlA zkr>%U%I;Z}6yry09!2hkHyer|iUl>KVwbW)B_V&o^d#5KN|Z2dZSet$)#sQJVwF(V zD>vheDWOKHA}{b;X%@SHd(6vvNin#aMbP#|WbmD`(;WT&_ab zZnnhv$=&AXYX#EeWXcB81{`EdDRY#O(IGTlisw|%qP*1+u+?g0$vm=CAdZj@4-r>* zzW7dq+R(*^Nfr0(hEZ=~bA=s-qA?>1u^glm5Wa$NdtQ7FN@Bi5KF%pa5nfn{d2ojq ziWjNk#(6nFAkT{80HPs_?m$zBbxa+Zs74rx4B#~OZeB~Z@prB4XVvAzFk-L4V@wQy zL6OPXe1kUvn{IianG`k{c2E_Aq;Inrfb6!);o>OZ5Qd|qI9Q{WiU9^&I#3#~$~z+x z12n?(YKh~k((O$}fwjC|U5>N1GNBe-FfP^~Rq^0c3(A>KI@-w?Gzzv*4XPt7(Phi9 z4iv+Q3jH`Q1&QUX!XU^MDiIbGX^1o?-7>Aj-7Nwhsa5!>6P1c`Nvjmy60Q;fCr?m_ zPPB8{ z6#lK<=~PnAeJ|15n_5oECwuv4pM6I1jTu==`xhoRWd}>T&(OLL52J%ZUIlXJrgX>A z1&Mh?yHH^GLSP29E+))CRk>a~@Ni9V&BG-A=0U37FtK^wuJ zQq^az`P-V>Vn14_ zkD0kVT8qE%Y1HTpo_B-HHC@gAYftqj8Iw77h&!(rRHg0=m!SGMkN9s9@n{?M~!JP9_0-=@)K3-kLIDt&QnO7~5js zW|&COEtx;E(zzsiV)el+^E(~aKY8iZn3R|e2ebZqt$+O0E3aN2_8)b*>eIi@pWGZB zk}#I{ebl_0$IvCABM)ART6nYn;DZMrTre{{3UE;2W0P%JsiT+rT2~IQjLiyJ@pbQa zqc_*o_@~zYb>i?hS<=1nNF zlYjg3@ZlM$I5+8K-xN#Fvr{uqRGpf6F?n0b=%!?VEFw0}?Ax+t;t6BNJy%}%^v&jb zib8J8ynSQI`fgNR|9<88eRS4}adS%LW7l_W+qk7~{OVY1 z^zTl+`AU7zwDqs`m#=4y^bCz1tkqq|+BPic%erdr%l&*JW#cFIlHRO|E2+~xsS{Hx zh9hpGb>%4~=9fQTynWjXcl@lK{ROGaUJcQ}qw<#fL62fW%(p>vcirYoISo<15uVog z-oQn=K+v~#RaD)Eeex+RLZu)#sRs4&c+Q z03=@Bv8v@>9H`~fXnzlKQ`_GYFez<01tG|9R*aokkacVK;m96RMp~& z*42Ol6{}ar5&nlm7CeS~#VEJ>CpJK=q7oD9U z*wd)Bz@_KgZ^|H0WRB_CbnyWhS&OWT-@{{}t{OY#U(|?D4i8z8P1?Gw<KK%kbD*Gj-D8WX!4xrCG(r?GK%&6wo*1(k38DAaJ94|Ev%P zn$xckjItq3^s%B1*be$MLROPIP_l5)9?$XF%+h_070hXt52i0>SVE~~#Yt(D5JsLr zQ;GD0 zYWY9nDs~QHvINqVdB-wH%bebdvoW40EAIEOB^gqPw2ycpFf;~bqlD(P6uNIkLUvM| zrcj6p@Y$~;Xw*mTR!OUbOhpNB)ms}#fj*keDwsGA_8P5wJfbER=Ks!0k1J00DAJL^cB4j$sQ*t zIjmSz<6N=k2<1=2sq^T-Xr7U`qpO^Wt~tJ;ES@8iY;qH`O29fEOc^DS@@!i-`r=vK z-n;Ig)E|ggM0~s1G*X1J1Ay9CwEs7PNbd?ugK01N$YE!X~o-@ zhZOg3Mjj(#Z1a8~$AQXj#n$}qD7mX2&8a-^S5skHPAxR@A7W^+guW=viP=Dy0o-v; zx2byluHJO3FSeg)!_{E|ke|rQ5wZs3N~7Pm`rS=Sv@V)63J2usM642(OO4S@ic%qi z4WhM}a4uV2&L*(UyjH_fNhnLahKaRe5);}6rZXe$lwMn~)kO;)w2;F_|5y@7-ortV zJ@ccJkV6=WuMydD(Olb@#1utyh53>vCw}~pfMcE5QY4c6QS<=zb_mf`OGRPN+vv0$ z;!A?rzB+{Or!tu@y&3_S?L{@1SD(qsnH=BUWbZLvJAB#N~B#A+R z2lO$x{XQ`P)L@~SdfLec=3{s!!|9`wi;+VJSBD;<45u+738!*C5FF_yNBk5MDmeyf zJeYBW zAP6P{;?wBTT1wBTI1>0z={O2Y?C{C$g6!CqSpN6O? ztfc}aMg=^eEDPNWwEXo^sv0+Wcpdkj_G&D7R#G&>oV}MhM!Q8UMl@Cj?tYpFRAL7@ zZmZKbnShvNwiMu*zjo`oT1QGCqUEaTC~S?K{x%b{u7|SXjy<$?ACV<(WjZq|>~*dj zB8t7s<8aZ5X>>5v6MVNw2PMZKW`cc;1|JC35>dGeZ$cd_0DPb z{v1<;vnm=hY8I1@0?_Ixk0KCNWlM1o9!#;(KnlY?EK?ULRY+IBN<<1jfHR)-!v1RE z8~{Tho#ZkSH(KbY)y~+5z(|qfTPdunK7#Oo5ho+mH{u%dLvAfVVA;P&Z)UM5AY?Xi zo^*STl@~;bDO1{c7prG?vm`GFnZlBZyI5MF@MG+`J(+^MmQsdFgJ^LzSXdcU6w1K4 z#~dyESt83jQTfQ}*RVvKyGyJf`K`rhTj2z-L*c9+rKQmUBoCJ09KE#4gZf0{Y&_@O ziyzs$bA?!Xj?J)aR7Rk}rtl(-L$zamT;Mv|uHkT@h-PY8cQxHWoP-yfyM{sle*y86 zqiJ__U0g-CB{2_E(n%OB2PQ5je4WkyBp5Occa#fr(e63Kk8eMV74-_pd0{7E*MQ5C zk4(g?DVtCu13@y9(2PEQn>f$Xv;ah`CfwMNa~!S9 z46c2#v4+$AHc-AJu$J~WC8deMy5b?wfwQ*<=dD)4vXEN>Esa;CufBs&GyonH;4E~{ z#YCM_Q4E?}9Ib&UcJMM0G(;JCH{e2PDUBYosTFQbNMZ^&3MdLmt{LF2;=pYQO6w6M zX6m>~4_Y6g2nBsjfyN&rSqUw=47XcuD4 z%NUb{%_g$v@)h(Tx|Qv(9ian>lI4|5`~d)Fdjv4vR{$#gD(SD*Dl(6M($vmd=@2f* zwlt%#mjnnSY+#db)ZQ1g4=*p8;!t~ym0HfB*{-mnAQ=ro>CiM56-pRWZTH1CWqgLb z`l|%yNwgdPOOd~z9rDk17)U3nOXxOy6@Zx0%gGd?w1(w@RTC>XmlIk{66Wkn zi_4d1`0iC}yYqt`=H*zb+$I@il@`t8(mhKq6DDID(L`$2qC-rEf~RAu?fk~BD)9jM2Lymm1h8Ua!Hs33(&{Q%3_T=WDm}pDoofm3=Z!9w zjjGv7wiH&e&7L_xo@{9Je4Yz>+~kS{VE@sfK$o#{!SKYWc0tyQH%t?`^qYQdX#a`{ zB!5$WYWv6nZT+3h(eyHlXo4>byj#d3_MD_q@${!Y8HdWP4TdxcgzE_IH zkWW5XH+*2SKJhQ#Z%%FfWYpH(S~)Uwf7G9!5Boels%8Ab*(G}?x4Aa_J}T(@k7n?B zS;XtRu4Z4ZdSi@=*p_(ZP;A1@B^jfk$Lil2n+ODQ%9z-1**#O;a&UfC{N#IAc7DDZ zka`y{8LsW8KAtzSAf)w;u`e?_J{o@zo%2?T?vdpSx&O9oLq;E7*>N=E*&re-=EjQ; zSB+dj-_AWX_5r@c@4S5Vkhu@2B{mF?ji=Y?-tM{-KazH7Sh%)(Yt}+9jH*HOW z<@ZsK_wT(at(|%C+`KC*-*5fljiZwvXFoC-viA^n?HnEze+EQE!Z_e6VBncz#Fj zifh}+tm9Xkj2p-#DnT3a$hfH>%X#x*BGo=le3jZcV|%${^T?%yDEz%tt0yGrig>F2 z__frRh7XOtQW3TKGw!`(qdnr1C%#D^UpqWg1Ugw2U_4FsHBUEk^`A|=|Kg3#g~=V( z!KbDTgIS?7=kfub*K#m*_4ShcKV9#exV|web>jLxT;KVLHI+{t?%Oi+-s8ikCf|Q4 z<^7i(tzc?9lH~b8W-p}O#4fuzUVej>Rf&>0! z%IP(=0Z8xJ+aSH)_P0LFA7B7#_8%a6i+u~SzX01Apz%e3D4l?ZfSGNSp_AyeeKE+Z#nF+{n^MT} z3s9{T!IXMIL?S$U06}VqF5q(j2jnNX-k}9mfkSfbT1=Z06Q02ble2NNFGZ#m#rM$5 z&k7`!!3VVQSav*H$_N?3XzD>_0wFs*bhdM68Y4ZLQ-BoU{Ub(BA#8;g%NXWxtE=_zQ_g1PDN**Xnx3ppAqpitQ=k8M2iMV7W6aD zbe6^>N=5NPCAwdu!}-DV1%6UVHciE`Ul2zt?h%8V^#N-?BGBg4G~h)M?t2v_mr;W5 zA^ugg#6GVGkeKM$0#-xVi#kngLcdSHVDT%V5bcu)J^+vo`ZlTnt;+z;g21l*mZiys zEuEEUrdV<3Dc@B&_qCwB*+U~*9ae)I?=1#HfQP=}d7RNjxB!W})}tog|~J z={n8i1QoYxJXCYm^jHfyFVk=9@)|Im5lI0; zgiuuN1Xhh=f!i4WY*Shg>i1bA(JSPKS~-J39H){i3Q#K=dzy*l%LYms=`xpGo>8h< zKf<%QH~&jvP=WVn5ZPa*ip0Rw5UxySqjQd!R|yQ~qhaW5t^sAh510eJP>&UaS1742 zA5DUUD}=ci31}XAl#?>L9nqFmMPPG?{7-NcGpH2_enJ$cCR&c1Bm#42g_+}=EZFk| zMY_PtCLuxzfytY|mpKo*L zWm?lJwN;kq4r|+iuQZdjjgW}rkY&J=fd#e`PTc&tER2ZAQr~j^eW&$=MK_ggp&f8y z13J6VSjPp?0n*z+_6yX3M%PP#2IgPsAG!Ng;dh5z*>jpq524+2!;cWGcAhnobso=u zA*Z5w-(a?HDOH2m%3^R@n=c(kdU;iG7nzLQE1G8Ar!+g6itJ8I3%8elhSm|zPVoLM z2?tYm7b0L4s_+2*5F%)h_=@Ztg~=kP8SYJ1gmVXQ)lu@8SZH$=;mPrNoYGy3mtdyq z59VM=qDj;+_r4@W0u?CW1pB(e#b7p|07yl;=ZRmSQZ!l9a;7l$;|R*Pg+-iU$-zbQ zDBrK~4B`de)b_#FYzrR7mZ^#@Y%#HxR`|(h_ddrefcFuXKWmQN7#HJ^SZy@@MH;ys zGpfa8TQ?`$G!KYfQgSt`t)l{>`Qn!7LCU7#IJ7bGg2cK6{tQ1Ln!3pVn?@}3;D$jU zy}%vC*j z)qYvY?Vzb-4}}XyP$`FVV5D*`RT1s$1J+!Uu)=q>K`A*@gj>Z0v%+@kk+t)Flf-(Y zLTn1rW)uPJi1eC-#PDf_YNL?PQC*_$EO(9<)s;0yJI7_R1a6K_cGTenY2V5ZF7==- zVJuxbjw2FbVauqyk_C+CUo!c7e7YM?5V9o+%+LRauy>DZ+TQ=i+pgz)>OMQ4A4x+A z6@i3MLMfNl9<9y^NmB?=Kngl^7c8Q~%Z8wHZgZ2QDWq6HkU88uB8ZBc6GgVUyDfF% zreok`?sAR;*<@F3xmXeP_vW0>_xIoL_v4Q|c=$+CY?Ji;d_8Y1qNAN|$d{%KP)s-E z!?`5_P`YBr5D6TXX>JB(tdwLwwdfQocSyOEmU##v<9_r)@-#(S8z=UmZC2O~sIM3i z;3F^#!BX&BtU#zl>642WmF-`JL?^`5LJR z7l>vnt?n?g50?E`HZlk2ge<8qTeT7p=2YzfYDeqPTAS`XE9iAz0gRf&-6MkHpd4N4 zRf+h3Q%34Dr6uS*9p+o0>1IbEuWo-^TC*74XymMl)3^op6>(J6aPLAZgHlx6N=j0j zulqW-G&8+aw91wtn88!q=ybAHQM$l{hCD(=+l6Qv2i>YB;#?&<9!q9(OE?z_^p{@Z z7D8++Via8ULK373DRNNDRcj{{E27%*m|qdDhNoz^jGV(K;BX|Nm1=|l?AvG@@@~dY zkfkehjM11BZsXKVq>f(&WjiSeW|ea(1lw3^6bYBUPmP0YK|Nmef0>7KGbW5`l{V`Vc}yQJe^`ph#9KIX(=_Bvpm{XR(`~X%Zr4qPjA4E%+#D~I)jTS`E^H?A5Zp0Z0 zq(Xs?K8=DQ2-#RoXHp>IfI9>%W|fcGsTQ#Aebw@pDE z0=k|l+NEdBgVn)H|5{0$D`?}QpC?SKqjF8n3w+e<+Bmjfz#1?Xzqw{#CO$jQ><5%>k?P^;cWc}&GMG4GT)PT;Zrg%LF; zw0A+QzIovRWew*n>nOHVW?kh5g_k`8g4cMB-^IpX=KTp5A&$Jm+E_d)1~34hCmFU%wJGD|Zvpr!`KCZ_+aw6$=zbYO(#*ztLe zxXP$XxV&(9Z{GE>`7b}tIHw}AKMMW+?|CJo{@V-v<>(mEx!91Z`sd)}qHh}(2O4L$ z!jqwvs4G+NH?*1_99&cW^ogwl3j%X&T}a?Xa^Ku*l9+JZn&?;rj@j8Tr^vb)dtpDinH z8W|n`hq`#QQtu~@e)e|7!KvQ^&qnNc{9h#vx*uu-g_|29{(kX?+lx$H!hr4to>tzjCksrSCTt zJEj^I_kZH2iW(a4e6+CP!Prk*u6ZY3aj)MMR}K`JFaG|H^Ru#vmN&b04Hkhg=?nk3 z`SRfTiOrX8{yBMmMT2vq=xSH;?H^w4e?kg4QM);5)uzqa0c!oC_cu+Q?d;P2dhDb2 zsp^i@@DKi&pYMub7&?)iFhV zxXOf=6BW;%q%Y5&L}4d&+*!?_Bk`8&Gw{i!KWO zGqZ0E?Th2WK6h{3^gF*5A16Is1%n{FH)65+g8kgE>G>RB8@u&yb)=o2kz8)JpTf49 zKh|$GjDr@>g29Mw>LKV;^J*_1&7pX^| zp(4MTdkJu7nO&fLg__ye|FDB9-G!6F6Lmlod6^7cR!4ON&cI{FDm_Fbg`9=^z~J zqEEs1v_dks?^t=`wt?Ka`NZpt&ahN7FQ1qz9~-C8XQ?_gk@^}Q;Tyeiz4bQDd3qUx ze~$P5RAMO7Eu>pk{bwgryZ~xM_ITsCdYiAFUQm=tHdpYF=bha*zdxBU*`rbp6&gj}X z>&O9XA;%mVz(J|3~nV{4WA-f3<7E8^W9e2ex#0o zu~^ZA0<85liw$EkH?C)NK#gRk#aKO_2`SXJPE{!m;j4xy-T;GUz#_y+R>I6E-Az*h zbP63U9K=#v2{+ZOMx8WKsrJDfqw&G#F|;pEFas@Qkc25F5)CipW1voqdnZE}r@UOG>%1uGjDa*5;f1xlCCx}=F{P}uS55*qJ? zDA_hW*?|IUh>hQ!54v+gfXozALO$3z3dz!KLO6tTz3XC)kZPR7LRy3xL1*Wbl`ukP zz6tDd9gsstb!JJ=pJ zNFgs-0$K`exCEFkah8EmM4(i1G83U?sFVFG$t3}YBe_yoBCd2qbCg1ezMMbrpL6&n zO467nS2l`8X);Dxhzr$!O#$x3Fl0aTwNf4`3^s;dr8$x6gqshO?!V57$3qoiND7n& z@~K6HHbl@q3R_7E;Ow3i)JU6DmydoLPZ*vvIs;|!akInE;&rx&-JKbrh9ibm^_8_m z(Ts<62Vg2Gv>|(|v1HZ9dYC@+UIY_h5%)rbh)P$Q7;YZ}g#-m#o$5V!T2up-(I@e-R==lc!quQvBvmwI0(J=qOnpp6hLW> zAjOkIsXh{p{mU-7s-mM4Nz^DQT>d5n7BE0;r)fesD>MqhibkSFNeQJ&idBT!9n}=^ z5NRIb3fZ(40(TOP?KaN52W2_u*td&_b@px=JQLO!pT(IzB^?}i%4=KSgsqIMuN2Gx$zE^!xM zm@E{jjuQk!8hd^`%2)KsVm`r#OmnA?lFJ1`$l@+xyE*|drDQo!Zj!qUNATsKPHBK_ zHrClFB7y>SpN?HPsxxz*&c_)vb^wuCFQHH1NS=I&N zvgj#<%N!QsW$GT@UOOlI+FSB80w$XmrZK1ouP0graQO&NHVJJKJZ%>rUcgGoRp5^E zLObCl6qKR`N=tk}(LeAIxd04X_S{BEh&$bgV*7cOk7eO=eCW5h2`Q~QlZ7V6HZX%+ zS!W*2eLxU{0yT=l^d7=pc?nGGFOkY2aAkWjoCxEhPr`=9E-Sr?f;9HNxPv5?iyR$2 z!Qdvi_pfWtcZiEED~0qvhS@=r**X>fWvOeGn@@mp#W-c^yZ@twFNt6X!vObgRZ&|S z-iDb=`3xi$G;LZ7$@mdeuK@@(#!iRiBjIfrLx<5c;NT*f*oYBMRBnJRA~uUMS)|7? zh>gh4MnRr-u1KEl?)8>HH@NV3AtaxNuqZFmXcSLFUn4T4+S&#vG&YH3<3trFPtK>f zW<72#6sqzWoQlhuja&7214VGiD97a6Hty>!ZOWlQS!oFNXsMeqVd-{>K_W?_`3Gt!DT0SSPW9R!_H1P8wxwg8e8z05Cpo)-jis}~) z0^^p3DA*7ZmG6hDI|SMh4?Js~0vDp#`2_`9f?-Jw=NJ)yV^EOfiXjLBv=g&HZa^Hx zpCpzt@isQPnRfx@W!l5KpzE?kU}zi2&lS}mRKJL*$8mNJTkVz#J5kXya$W)q z**oYQDviWrC_MfVNtPZJJ4uAfEW;&fML^JrkqUC;WZrlb zXpVt4>)BWn)RsZU^mv1-G;=FyfjJ2+y4x9m_5)v~kQuX`K#Ohvj0O8+_iBywWm zaOMa#2;0zXn#w$>ZDNn3p4C?jNCsOY%z?x8NL1n}>rihel#PMBf*pKLAWs=!uAbK{ z>+3o+LJ?Qbfg#L~temYsGv?FB24TFeD7-zt3wzR<+3n^72%No}=v;5G=Q%H)FDvzF z4ia%dD?5lh1t*B?Gkw)Rw+ueTe6F(&W0hr7u#rf&SvUwi-X&Hk@m!apRZ=UW<>U~1h>^XJdD{u#U%nam9$ z+dN=>dQ%+x)c@3_{+C`?uE(NYpVSq1K@$bW^7b*}ndHXtwMVj)gW(vbN{yS&_1NN&R_6EB!6i0z3H*?{;}H?ALr4(tRGVu zwu7RVPv3s|+6VVuUE5!MC3G_J?)HY;jJo{5gZtzS@tqY79j^rMAI*BT6$uNCYMzW) ze4=r^x_P&rO(i?@A<2d|59@s>b(N9y!jU!|U!=7#2njRsf?$Y}f89zm3y1*N&+I?LEose`SN!HFy84 z@BQq{SD7GdZ5Z60lRR%Kv;O4t&F>rZYoNys)VWC&)u08)4q!Claj-d~j;aov zhr^naXJFl*GhHh$&49G$fC_UuX=VfXJLq44zq51!d)>c}o56OV+C^Iou-%kj6(+RK z91HAq1tPH5{l{5%?*G{9py^uBJIv-SAn z!l5nsqa;Y`2bZDgKM>G005`WJdSb@-0zy&k_fvd*xyp183`)=+o|8EILx{QM}XY;Js8aA80(r#jj95LHTNqxFl!5kJW| z_(ICzQ5PTyn<1RwK)8&u88)*u6?j=`U4BOrSoD;^sr)EkaYlL|;-RGU*;r$i=Mbtb zLJ~3e5b_nlt%1&m;t8>4MGd;_1X&pR*}ZH7tl6wo2x=Keh7F1H`C`H4&^VO$e3s>qojaulUYS7HW$d_5#u`^g9Qd^uP)N}=;SsP|JD;3XpbcfwIte&URL5;Dip7#o1pKXQeR({P>Y{N*+v1EOM?!h*<{ z8Y8!p{HNxqjfD?WLKV~q<>*YWfp)-d_~WBKvbS*kgOC4&b_ctqK}plEA6K# z2^*i^2>dTF)xoBrtU_2)vXbC(pA<`1nm3aC8WLnHwUayHoe=1?BV*c#7!D`_P+8nM z0k2N5;dnL8z-9JZXC_b2YXET-C+rpIhm@UKUMMcW^@PS7jwcqX0;HP!XPJ=ER%FNp zYxvc%NP7cqryn%|b!&Bny6=n|vi0T0hAwKpfWk$wqIKE{O!kWS&>kNdi;TW#K!rLy+5sstrCfXyLZsyvEuKp3~HELwV+h?n`Yyd?8A-i@>i5}Uv`wB$6JGaR>I>K%yH zRWSKw5wg>87_U1-Y5X*bTjIwBG=Yc?jYqaZ!y9B9{se;Hzjm7KHfP@|TGPyG&Y*lr zQ*0Xr0k7kFazQ7BnNRSIfR%TK57QpZLpuCz^ts>dBGVq>lwEiQ#xz3|q=+T;Fh|Am z(nO-{Yx}SOwGaZ;MN{;%gal4vmqV4NL12S38e`j=l`34X!%-}&yOV-vanXJns=@c8 zM7CXsH~byeNEw%b=K$NNNP#s|-&!P$3fLt`2Od>yk1 zZAZ=gMV77w@gY2?`vQ$GqckjPf?<2{{Y+dMMI(A8*Qvq$FQy=l9Tmfeh?M7_Hr`6n@4kLPs!2@Q@%G10qQIGq3{^2x((% z2Xut@>r}P!4~GxX7^dLTL_42kibtD7Ndo;D^tTuz@%R5(!lAi@QcvIzK+x<7BA*QL zk*8tv2yMq*luMe+$4DI>1az7*LK2DXhmshSFos}MlTb(0p<2+N=n=UxXqgc^O`c`y z0r3eFE;&jadwbVE@SN;;KWau;XB&0e=4?SEVZt+1i5o{sg^lznv@kqY9xjjKaCmhK zTT9y*B@cPRLrtYn5{HV;mg=2NRU$86Nn4r_l*uc}2U3b!xEXg55GhS$Dw*;>vy{{u zs3fF_3mK#lBYfJTCP31}K{>?=BqMQx8C)CgO8_IL0A92+OR}6UZRfoL)vTk+gqkcZ zPXu}c9wk9TkBw9*ByQi~lYf!KDkM8e4T;N`OsRu{TS#1Dk%!ERhFMVayB{k} zC*-FIt1Mmc7Q!C4T>BTIS}utO`pIaz1K+`kG)+r7UH+uYAY;iPCq3zMaECKq5^%VT zkOnJgIs`GXRJ2$LA)*uonL%MqA@pF6`VzdFn2ZNr{#(@mPmT2Ut7fq!gJ$$6lmQ6~4j4iC{7vBwM1Wt^=@B0Z96Ky!{Qr zUbZ!ouCKWGFQ_SftskLk8eK>*BD100yViNhqB0WcoycLKB%K`bl_2wdOQ1SpF0>U@ zMCxu}4GY^#Y8_rp_;5u&_H=02NX^qv5V;)@!4*AqJ~8}TQT&A53uo{dZ(03B2|Q13 zVNW0NciJ z!t=IFCNkwi6YJvhhIak3y?67o{#13p|8mpj=bkSc4}bKR@ob>%yZGW*-EiK?YgxCQ zCf(Rl`j1zxQO_6NRxYY5|I9qHZ0q|E_CDQpZkug`rS*f8`yQk7o~hu2yM12{YzXMJ z$?RPwn1|nn3d*x4t}m}A4?8X#J@n~!6D`4pj&Ajd@80A8Ag()J_{yYxY|VrA0G^t0 zFxgqiH4Khz)8*Y5pR@Yf*@89C;dzx~uav!xeO58HZS#ZP@x<8v!NBU5`-ghwT)uEJ zt}^}Z@}j-|1YOs-|6E>P@9lew%1eHUyIwF>x?%g6A5mTFnTRa=Hb^X|V-Oako!xP)?=h1H`m6wcd`!jFXo!2&(Kau))15ZyAzn0hg z4Mkmt9`ut811y#FlWyAVx|ukn8+Q!-);xbv)S^RIbNPmjt$PE#?q_*ja75d6{!T7m zylH~=y{{DV=&Q^f)|>3^`C|OL;T%4h?BRQ^++lJr{!kexiM#pv?Xc{_q3L(Zwnpum z+!k7{c|Ls7s7W@D8R8lOV^8Nt4c&gs{CeS+>2q?PV%`i*E%dL@Mm_(HV}gd}$2Pow zC1ZkiCcppZs;k5vI1Xzq39Qa~nfj#gGa+DS!+T?9OBgU~ zKwzo9_0#7dq2wsP{qqhk+0x-nrkc)Uqu1N?%FFq{6$V^?@N%#*P#0#XGSh9LxNgR$ zMgpH&ln^)z18f5@5&3UmlnnfBcU}Ti*Z5*zYU9L0K!3dl@YMgql?gL=>Q6tFkO%P8 z-5`Kqfsq*;wna#NZE77j?%s3YkbCRE!Jp>dR}FOOCWV3q9pKm+$jO5%qK*c9wy=+n zsiK;P{|}x5Y#C^~)Cvhe4tWZ0JyyPJy0spON|(KE0i}lY#aKgjN?sUP8rAR-OdqAW z1aE^uaj&2wEG6kWgEdLh>ubL*EXbYN$F++_<9*HXi{NB(wYi>7F9i-|5}>4cOnv(* z;ZXq1zE?G$iWgewq?Y*qrON1Pe29cMtoyNZap+Dh+bcat8TGCTVirY$X|Z8-jGf^$ zND($~uPL5EVLOy8;C_(CwU$@~Lxu;YdQ3P>s$0u$jJGIjNr zrWf2`6yzB?i$&azB%%b;GWvGIJf(8VP;?Z^>afv zsQ}fvY9<^u>Zlp$w9iegz@89hN@nMu=}i7*j5_hmfA&2a|DW?N1alR<_;)aKI$@oH z%Q8;^MRLq*o!7GEwW6rtqyPWjR49Z3maKt=$8>T%NDy|(ZdoWvL?IL1$0hO-zDhP5 z+gKt46||^tc+iWYPI| z_F8x^50QV;!_W;pR&`hzH_;@(pR4 zlV(bfTo}?~(h?lO$>?aA#G+ual&vapm=l;Fb}8gZlU)hv)d>jb=;iAK6<-oxN9CD@ z$R31=2TzK6G#f+A%#IT~tPc?x;qmP*4c=y}_LbS!pdP~AM(5zQ(1vh=UleD;BRNL_ z5eL5d0Mu*(EtHu>a5k)KtEXTcX<1{vZnl~bG_((mUsW$Gz|asC98JQ0@EK_#29m?d3X%~A2&56C*UF>0Z)@ck2a;sr z3}_>TGGqziD9fT_8M2X$H=(WwJn&UH;*=4M1WN26Kn_(iu13N78?y#sOAcAX-vaH# z<7B}~ovQ+(6&x=*J5`t@!k2@R7pN*`)Ksd~N<(?M%TB_#Fd>G+&G{{wU<8V1B27p= zeO4PSKnS~8oSz@sX$xT$brmWGSA-A>T6xF>s+_Iu&TvtlrbzNg-jV@mYP3Wz6}i(b zZ~9^tLRFs=jcK#y0v5PhW20z^WC!PJDFN~8isVWFWQ`OYZJ@~gBrpcT+J_>1fF9&H znb#Zr&}^jYDxsh#F`6htoMZ>?lBtQU+{5hg%to~8D$`hqix^TVANjfj@+QsmES-8?!H%7f3Lxm28xELb;}ZDm$1G@o#u?5MoZydblJ{GxqFb;-I; zXG|%_3H_Wn!0%yxdlArZ%(70%)fle&G-qoz+l-q}HIXge`lT^zzc@=r44$WdHl1j! z>@YBM)Vo=Q^4;}qTr1me8!KYl^v}?FZx2y{OYm$ggPOP5 zSjxX<@U#l2*b?6!JdAb^lb$PWf^W!&$@=Vh`{_XW+ok{&ulZ$h%`GWOHU9*3F^j?KJ zY|TCp;4!_Hd~<$-%YXEC;+>mwzwrfnI*KpfH@?`=)U&7b!gJYq-%Q%icOCVQztHgE z{YRhNGjw$FyyKIyYc)6C4s<$hHh!g zeYkKw*>GfRZ|&O!{nVz9_2$HkJj{<6pFmQ3CQx-G`udse|C)@<*aOlRKwVv?F|=izj!M0(E5ey zu~#Pg9d||M+MatxOFw;oLs{{%>3uKs@0v6PZyxdQS@C*vZeQ20fg>fYpAHZBUp!S# z-PsLiZ)*MK{^FLdj{-l`-n1Y=lI-WF>LV8u4gB2?7uK(+L+e_Se;e!3Zhw=iToou- zy=aT2(i|wrPbw%r7|cA>r496&*1L}J+mk=)4O|>(SoomBe*0{3;kbA%aVYBWOVFxdor@S}&OB-fLmE`m>1RH=@xrmz z561h(?sBQ*IJfH9fz;|xV}iQ@WcfgKl@7jcXifSkG`=|c6mL6Dbue0abCf9%1nzZR+@cV&9k9lU#Y2EjG(}N1(!If=?0_`2yy!LJf z85Q+w<8;eYPh_;JuCxH+&+@~A4P)nCYCSb=+XMby7ajHC{gSqi+Eep`?Md~!lc`hq zt8YzSu1~&lpI>&?X&&F8b52`Z%GVDk+(@_!UyV!LM>mjnRTr)`&WfX-9A8M}P;C+O z;E3IOK@5vUte+8f0;J0Mhw5WCQJwt!uhd(+N04oAje`^x5T$wjmoU}uizhSDWB9G1 zmn^|ESs+Ri(1gGV=o4eSXATTRELs6_T_WwSadA^)Jq(1O|IUAz;Rh-AR`c)NOSrI2 z+w42gIC_0x6#J%N+Cbg>U*V@=IS_v4Pt<}q%zuk9f%5ZAoSrUII;B^6|D z4t3drGaO;C((^}K`M`8-Ox`R1tNkn~e#`IC7AIDC{sib*H7|aO-`SN`+&%F zX7jOO@1Nz+y`M2-n1xXK@Pg73rH`L0m@=XS!1)37C%~*pLZS!AKMT$en~YR-<#K>m zEyoDu!MDab+E0$#J0p6?J}Rjt!q=S0#ZmQ2O_>Qe_6n(baJqH7hP3Do^%&KXNHqw{ zRkoI9;i|v}UU)oCRfO%}!ie6)PWWYD zL`b66dXd;a5ItVU?A%JWL6&Zo!UxC-yT5KnbR!cZ*ZqadCD6=u7zqME@HtP$(24Ro zkOCuQqg9tlMV`>c?*}o|27a9$0b^M*eH?kqE!7xNxSHJC>=>eJrB32Y|6t#OXHO!4ky8nxMaO0zO;vrqxp6>4N#_a05u@O%0@;A zk%eQhR5^eSd5I>ai{te~9VOX;%^^})oOZ?ZF(~WiMxo&Yj|inrk|TD_IS=84+F_JH zvvFrWkpyx=9hEB4+>G+{k%!%XNpz!TS%|)Kr!L(@IXjRf5##o=SZ!sI%oSe0i~n&o zEt(bX4xHgKxR+Q1<&dhyanw2XH=iDM0$Jhjj{GxWJemM&rEe?o3;50?_aF-UA`Uby z${4Ao$__f$2(6UN<*Gy&YHKW8ghrP6nlp$pZnpuWq3Wr4BzHwpt!jKO8sFQIXmLO- zc4>k zRKlTx1bh-2N&$)@D10XtEz`=<08>+C?mKg`7_Z`KSriSK1~!_dKrk9l4Pgo<7uNXT zG_ZPYBV!(lF;WtBBc>sUZ#ZBT!>{U7+jX#lP zpIyVme?vW#-h^z90m{slvj($`wUl*|tt8iJQ`*F>5r>JaN>S^QJ%_1YMu64qePURU z)o{;=MOpmbq9P&8_SNf-|H(mI1~ftz33FnkmLZQ5Kluy?!p!v4lSuWO~q(1!y75QszdwaW_X}X+eXuMgiiT^V9_-7?Nld_{m5bx z-3vY?Ac#JVItc)KziwR4h)X;i<7zRhm<4DocP1<4C};Kx`>EcoP=^;5LLxYSpZ$md zNm;(}jZ(;ALNq!lnn$eT*cuAJCwB+uo<*ebcF~ZSB}rSu&2W0$Do_EyNr)sy(hJE} z@*?&%E0a)?WrZ9tCq;NcwuOXJWr@->5r=wU_K_-}{}ZAiSq_GFMC(aws!LL5aBWqx zBqit6O8LBeJ_U+nU#G$S(vpMj$3}LBSI2DD$f@(PC56oAWFzdb<)^TMy2u7@iF~b# zA}F62iC8_m(Hzosl^5-Tz@e5?a3&+eV%lKxn(DvI`G`e|ggoNesbwUTLs2CUhiMtB zn$^4$z&(ED3>OR{NyvwtsJ<}8$Tk;6aw3Otq!X9X`w`eG!$pUjOcN!Afsh&ssiDd6Kp95a9q{h1S5jR8jTG^94f*ghJ=Ph&IDn#`78?K@die61^^LC?p6r5Ol;l!lds`B)gdwr zP_6PzS%`ckH-{xcq&ux{W6?_NM-NipjHoaz_AUbVApnkqH;K{002>b(@DL%0L^u?k zu;?CQK0tqEXu4FW7BJEyCa9A|X>CAXi3lhT9aR8TBq*_muzWNRZp2kq>1ntI%`URE zBS0jQZL1cY-9Qrn=OI@R7V(jiTSQJxnOm+T!5b{v`9BH+VL@hUBzloVtX1}8Za3~|7ze9Y`j=cI!Lm+-Ef2m{Q}hl zT3}+A-^4d6ZGzHO{C5r-?i*huAB=il{_v+aYexV~O#*ZM`F_|MxFOojY zT!?7cqN|~k7@N_ygnW~0pqi;vT92$fL9}t{!3}8gU{hAMo;`c0Bs=z&4$KLfm{!b) z*3h}5WB>BBvVP0mAP|zr5{lNZ!?BxN&afB5;KNJzA@P)-6`z7B6#y63rbi? z@5g2%xzF`q-KrX(rgksx+T%Z86IR;#^Z3=uep4`Bdl$+3^S1B(uF(77;oBSN>4}2x z8&~Hwj(uYM^>*oR83j@N)EDa-KK=RSsZHCy-`zmo+k5e|x~Y4G8-_Lq-^;u{>K@Wg zjJ>Qds-{R&tE1x03d6myH?%>4NT$c$jQX;v-!qoFzW0=8pXyC^wJrTgX$t-^*Q? zmvvxHa>ACrDe-E9F!9}I#rW-~#)-dID*tJ;#Xbgqf<-F-(H^zx&WCX7SEp3J#oT#c zoyu<7b%%_}YYINGVGb5Cg*&70;Kj<+Jrh^%6%*5q@Mqye+o#ulmzw_I^Q_kMSMjTi zX<+uB#mbk+JB6M{EunWvS6B1>RU_MzZXZeh^T2j@@Jl}IvAUCw{`u(En{D^)N$cN^ z_aA7FdTuhNud8U%IC8V5oA{X?-*RcaSWXP-&g13oaoYRUx(k7>r)OUt@+X_NR|e48 zp_R&Df^u;}RQp}5^|$zhx65OGTNTuHJb=Fq1Wd85{FZ0WVR^QI^1b49?_Zp}I8e7M zs4Icvi*^FeJZwu= zUXBc?>|LfYVS58PCTs$m%L@T@=QM;JiUJWR04POO2j>f^HNm;gWaYh=oIrZH)tS6& zI${PS^~K}`C;I-ap`4-o{w<$$7q0`D?8ppNIM)X-SU0FVkAA>n7TDr(Uk;kT)l9LlvENoqmdR{@ha zV)BsHC!rD&(iswyK8FZBdSZr1bOHnPY7e^BR0+rp(t=a`AOQrP8b9Xi&3oi^79^#+ zp++sG4d*zJ$X(|E-b>JE#0YS;JnW13#>_}wiIPpCUfl;<(U#^KCZddL)(~WcFIa}m zCuz3Y1jWogaak7PMbPR15mDWUbI3Upq zPAm951%)?i{m|peOrU@Y0m7Pj10H#Q{5qUCi2hH@ZJ9CR%TT50r$Y+J3v&XZ}Q>2#US zT4q!!)SbkfNQWXD;shc^TZ6d=%RHb9@LUC+#h_V=FPmzIfO#k>yjP*3&KQ4cI7B52Et z?tp)U0r3yKqG$MOyeyh}7UCI7s{MEisB!xLorvL#it%6Cz3^)rjmU z(w8M+lu|*&mT-V^Q$_HN98XsBCA1FOfK~CsqP$ua{N%|rWN9Bz)0V&u{JPQx++(Om zez4I8hqytzRMSWvhK?Hxi3~>)7Y8k{pUYvt9{uZaqQW?Zh|~6_U-jhczI4K~TP2U< zZ-Ef?*sY=BUyc=~^`w{aIqEHYX+RUgSA}jtHy3rCc_XWB-jl|kq6fUP$g&iaT-E|+ zo0|k#Z<{@~#o&+$nSz%NXXSNxxYV~($HG)Lj5?7<(nkvEMs)~5c#2ZQ-#LL3Oh_g@ z)F<6>kfLhn6x1xXfxN#mj;`(_58_NDPS4O@@R3ze5 zHxcTGfhHABFBBuwwbINXZ42z|i60V~(&p%;K$^%a=_c51YYXv+Is-yvZZN1s8t>7; zeZ~z%wb9*d8xmtGY^a@E%x)y}g|yC6vmItVNzKvHYP5%;7f~9wp!|Sjm4#?6RY{J7 z%i#UtK$0vdy|q;`WQRazEksCzkn!4C zVj-cUXc~bl)*PkXLa75qsX2wUQj|*LW~CtL&Tzm*;NkLU8H1`j&?;sY0mynzPDsGJ zAl-;|MsQW0A1bU~_DQ*$nPrw`pw)=Hi8teoB3b1HbdgtACx-Naa2q}cGQh`0>Afyx*WnNQ4sB5oT3%?Er{A7v9>BN8EmE5z5 z7CxM&>?(|C?dR(B?gbdt!BKz(HK$8<(JD#lHB8YKnol5P8(aD;ni*Tf@#qztqdhfc zjpAa_u1diqwWmh(+7GaTl3*h4VL3*7VZlZe*D(&mOW*oR~>3wm8na=xySz zJYhAPV#%u?5X3xu^m%%QUvYL@r{Fx|{sj#LtfWTb#H?p^bfmIr&ehDb^`)w64giSyhg2&eKZ zHa%)g*c-XEnrY^|E9e$wMx#TvkOo_ON)27a3o6RfLf*7tQgGuA<i{Q`T8%|%XlAeC5n1sF;7T<#ZFmYP*=>VyQ%AZKbg+6 zn>~HRoLSLrUoIDdo*q(j}<;^1eLV&-tNG4e4wMH)`1cN2fkPU-Ed>Pq(!`#9TD zaxd3Oout0=)w=d7=@b$sH#-8hDn5}OBpE`a9F4PG&S-yc-ce#S33VTtx1svf$hG%# zAN?S7)H*-tgJ|sDs|&+wMuJAy1g8A?UOt&|=HA4gyXTFxyzzN_+p1eTv2NnT<3}w& zRE-^I8@x2N$ZawGc5{Z?bnxoxy3ubU2OHZ9y# zidx&)Q^6p>4Wi}_Jcy} z(OXx}zm;8{?K7&Rx9%A%X-y8>H=cgJTAomZ*5(n@mnpL~Pb~FL`&FV)3=5_j(cr>nBq>W+b`2 zRz34W_MXr2)_{>8m9wC?V34 z^SiOI&{?P5cQ4Cu8Ck(Lh;@&9Umn@?iucp^X60IH4fm$-_65l^JR5dT3+EcnPKK3+y)|4bhaO#g_-&zK#y#Pi z>c5OUnFJ9tp7p$CxiJ0A@FzC-%0)u`Eqi^jv zAEqDw5)we0vz{4d3aZP-hKId6s(k=C+gnz7eu>mdjQw@dI`C*B=L1Xm zLh=A}1d_w3cq!xUM$G$H6XtT}z}&Nm1=I}}r}J}y>vZx!egZztrE83l_70v!yS*Li zTTPNnhw^@MSQO`cevl(;Fs zxwAF4PIl5pdY!rSxdjlC-Af_)ta|CF(E>2Zno-4;QUEz%^3s0A2D7kHH!vc35c_*pkV)~%%#ydTBMDgrU3-@uanKYlQ0_X*rZ1A?*1AkP*! zj|~JONclcrf3xJ-36%ZVH4~Xlppt7d04WoW{PCu4!w&|cm*T1vViS#ZDwH~?@cdRW<7PR0zfz|v%%OxQpmREU9y23@}eWuLYKIKdoqfoSx|efUOGt3U`=5i)!@tTF%fblU{t)%3x~p zB=}eenjGLo#YQj~XQesLyG`pRv7MPBO~!Pgc3=d@!Xf&G(xOdFRSc@vDOpFUJIPX& z2$MvHwv#H3$)tQ_Qgt#CB&=gpuriGxNkLskeu)vL7rvTcRg@+{Wv3o?x}|n3X9xc_ zD6qedrDAb}#w-D>%?F73gie9dchFpndNHc-y9lWOlUgu*FQqD@hHIGb#Ga%kLX>WP zusyXj6caP#e6$7kGsV6p@9#+{<@#!ml0EYC*e%bTkYHY{F2L`Vro|RVBsrK!YNStj zl|3K@Y^n7;=0356Tr9T(>xsa<`NvTG>L!A%#5_9)!I5pQsKFCr@nhLNbdDUs!5Z%~ ztON))T9y3tmj4b#8(Gf|j~FZ+D`Jg!ChMMmXd7{oF>A%O=sQX39kE*0_lo=!dr}|M z!+g%yFq@Nf+S143C<<9eXx;%MO6X@ax0j?qUMkdGNOCcm1WeSAmWE^kF(Va*_Cb=8 zn6#n;lM*n{H+11HRSeso2Wmd{%fo!Nf!gfou5h z$d>?@rN1usQ}uj3Va9F*C^h`+LXG`FAaL|(2EMuPT4uc!;`bfT1K!qO4|JiiS|qNX zm8H$3Yaer-FE@#9IK(h2x5f1HU34n9PN+j=9iC9{aM(qK6o!&QXfr`@8qW7z~PcOWMd5XF_(W-2&qK@e{U z1*eNh47*neR^f;@qhfJzclp48Y|eB3Dc?Gdjx%v_13Um9Ia#MUh4;&(a)x2L`UB6| z8A^-zkb4ukwJ_k5QmwrlH2$)it> zP(qeVSi-Qe$G{1iJz@lr7E`3wsSq?(jEi7maGX_RB!aUDYGxI+r&Ua_vdm^0MGO+w zi4x&{^hpfCVcg&^avD3{^_I_r73u&-nk<^@1%ra80sAN+>(Ugl2vgILSO%$Mc%V#` z0cNqCDmId0C4rE5DsB*2u?AmA*Di(#jhMwsBrdvgX)NuaNR_n$ow#Auy#%_J9I;WT zl^vJ@HU%(hybW>H7}5xslOs_AtAEzdb9tj%E$#krjD}40zye70Db}|}GN@gfMU;-A ztvr&)Wv^Bh9l}&zX|qm|yolg9jU!2%*nvfOphlvj!%UcjI=hlCnuT-*iP6Le76oZ9 z>1fZ8)LzU?rIg@tweA5}*O}c#@+bnJJbJUFP(0Rp8KB<2>KK)u`5~I7ojHuX>@1=N zX$%6OSsLd+AEsulNLrSK)4DB!857(T0nJywz}R#SC5aGJBEo^xBEp9)0d^CSK+QJc zqM{;cHn@ox!E55&RW$mnzJ{t6EF#TA+Eye3V{PDocsv3}6H)2!thx$KrD?v5q%}Yq z)ZXYpaJU)^P_ocsHA#od31l9y%^L(s@l=CCwfWAKtBA~Ya0tp#nTxSHKz-WJa129V zz}ObgPYJXRPsF4TAh7XpKro8ckf|Y=j0>0LUaY1q=tZtxp>f$=i{LzJU@Ylnk&>?C zv6XTfLj=@tCCpZyAr=>O)aq9>;nl0wW5<&6h!xFpa#2u82+KN7CCudL0sVT#m9`oZ zQg&r0M(fo9JMbBMQ=co5{P{$y)g?PFZb6P?b!_aj&~u8;V5RzYCgws;xv4EZ zzsrToOIYDvtv8wj2H09k@dWYgcKzcD&U|f^S6oxjh=UmYj&GiLlo~>7utlyR#Tn>; zPrYn514iA~f`5wnzEmYeMi2>E%$DusO!M$gE-Bn zhHO!0$$-J1zkStn z;LYJV#^__WJRi*%-ne+mWkyEtEi~ckqm!)*!%9bs&xVcWJ#(j&e5=cQd)}+#ZT_tb zzKyu&mz7NAuDKom>)pqmd^P(0TU))omHfGPgT=y~Lm!0>J~83q6Mbo@%qM6^2#m|? zOGb*fW#liQ7vqcHUm$HXM$gLIGydM91}T4DpJigZey%BKe{THnbB}JD__E{AIfL;} z&!5%XI7(9)#`VvSuvy2ZfE^mKmjhZBEYaP|Em7tE_R?B$_jZgUd~EyHfxa#v2(dgkW!y!zFGsapTs zf~n|`?pkZwliN4G_)1*&-s$7dteIKec+7fdqVVNK-lreR$R1w3x^Vrt1@(`tmM??6 z-2TF+ZtwHXZ5^tOd^&&b3s1jLxNOvCP2u`Yj}O^wGy600?>w_JckS?3i&IulTX%ko zwcQ!p_Icsh)ROJdrjbiK!^kh5n&_P|T{!XR?pEXFjgt$Q3~R44;ZyX=w%nY&?bFpq zJ}e7k@}yy@w$M01zft)3aQ}ham0fiy6T_loaOHAK^pU9r%vo%vBP`+z%fy+$UvsJh zCm-!9Px>^cdT^RiXq?kq)gmiac?O2c)FSNcrK5-zVxBB3%UaqzE-mA^I^ON%Des0-d z?6iR1*~)RB*KC)D#q~e@EjMR9J=z|fiw&LfNErHlx4yu3g)i9nspKE~N&Dc+j#K-{ zCPcTpbbTyOl^zkvF+b5r0AI?5yXRj(@(rX*n7V5_-X*wTNpZLBIU z$TxR!5-HNM$D}MrVyo#M%`TGXq?-<*=WA9)eSI6Ele*7^=pPi^5 zZ(dq%N|}F58TlS4Ge&M;-c|k2jK~P?)c|(_yUW}NY6qGP4_wh)vYrZB+Wutel4qbwci&s8(@4#Wf!h$R_u*u$QwEH(vp~4@Fn}2?9s=z zu!@IiMiquGCj2HKI8a5hdo@+!$vW1%^9tT4xc3S~N0V}-pHam#7bxN<#u&Hv1$?40 zd6vePT>pEjea znVz&?r#^^Kf@?~Bdu-9y7&H0^Qd*mSlXekfRfY}^im+2wQy^NuwS-Dg!E$Oua0H`Q zCqd4GKv@YnLCrKXNR&ozP4`jzJWwWbHjr&#>_#QaBeD(ze0jar_}2}zbg0TTl_@RF zV}Q~QZ6;z>ikM6wAV(I7H}ceemB$N&pvkR;47S=>EAuuQXbBcwwZ83m%^SD`Es{f& zqW%)Og<`kV5ZSC~X2e?RT!f{9pvb%&oT5-~%&RyOH-|_RP0Jr0yA6o7Sz(>tO%C>G~k)nzL3I~(gRJ?st%{tV^-sxUG5 z6ipzwca}yBqHIq)T(#9rkyx3H+1y@t9opio5Au^R-eX&j;_LMz6zWm(!GmFjm@MMqf`KWc}gY8xc}QjdTS*f?C#&Tghr{fQ0ZTck~%;+Ga`#=Sp9Cs!s64h`yRm zKl}ivks4#tj0z7ijv}gF0=ja9l;cB#6Q z3F8DoNq=0%+e?^dTevb~S-6nc#pZscW>Q%LtbXt~Ml<0U>qf_5yvki<*a%F598f}l zjG-p!b!MILuv-U?>Sm~QjS8t_)Ws@YGn2{C2;!?kPI98|4B?_l<=oRE62!PTQr%?` zY>dI3(CD;wjONjF7rUg!{TYPEU&qWQ=Ed|~>wHfuvsF?|zC_pit&;+Thiy7dn&_U- zXUPI0kloM!S2Df4o%T_C9>N}8d6ev+DfA?(PnYQuG4;GpdRHiy(orWwgd`X`D+2mh zoYPnm0b(W!cIeW50$kim`qqeBMMy;)u(@4{$);yxNl_fHgBT)z!|7u_{06FF){*LUjFQ8#w6Erd zPSTwG#BZB zG8tt-m zX<1X2F(oz-wKclE;cYJPd)HOv;71po$-Xqk!*-^FmK_?q@V_`;w>_)Ait=fER73OY)$*#bTiGG2xWYkQ)Fdvn0TD5 zI}jj!$s9Fz1(%E6@}EeXc?X5gifnH7ADw*!OEYB#U{JM2TV)c2r%ReDvG!ELpTQmV zvhPk{+E_>C`ONe3YD&S=U1`y=9HKmI;*$Z2xSIH{WkW{UR~1fTJ~km1E{=`-pX10Zr942lxKe z8*Ie34v?d<$|0he#;f8)(y^Q|#2@8_k;Jl99ubn;Q1J0u!crOx(Oo)>P`3iL2PU>sN0$z{tj}%#Jnr82bjJ1(&=wxF zP+|M;F5fwW7)-o-Y+=T?FQ(ne;d9RpEt#`%Y1?aK`yFk^K3gy<{y6>RaLBQYD(bXpVDocc%!<(IMFuu({?x1yLV#l!s)M{-!k^z8}H>rqf2Kk+%tH7GU)J= zvtM!RUVP|A7uEdUjs{}l4Lapizw}bX<2}<~+@|LGuk^0I!*o?Q-V)ePe;VxgcD`}r ziII&9Gp;}Czi<{X6wdqe+4Ya*502ehPw%dE&bu$Qg$(uX2>brtw)e(AyV}`zVeG=a z?w{{PMPD7BUbScX_-L##ckAuE=eqA~+BiNpe*E-WIyZ47a^v(jUtAroUJ!lz)u%sO zHfmmb_0D);P8?`O9v+pb1T&K@4TFrE}T*gTQ=L0G`8mqNSuPOP4NGh%thXXDRN-gTqy%d5AJ z=em`f8yY|J9H>A$ME}Ou&Uw3DOB=aSIn4q9th;kGdt3FnvGLDed%xOyZiRQqZLB9_ z?VY~W8BdSSiCl6ZCE@y-skt9kCry{k_I~k5^YQ#q+p31Tu||DZ!)T;wp?i1fS2HJS zcI>YIyuZ38|Jc0`-p`<0X6zi=xwEpqff$MSp!@s>^RqbDFK!<>J{eWJWTJZU$b~MC z{fEMS9=@}B{rMlJEz5pst?NTaU6wZV4nOvUcm4E{k_B(4kcVpf=Y6wfRD8lMzVPYk z!nNkn?4)jfOz+j5_R8nuTRYn7-bY{AIrZa-!QqkCTZNmZj_-PUWePW0?3S@|bi5>E z%S6EU8F=rq{E*uLKQ=hN;$MD$Xl6x2{m=}LBSS3x>ri8oXfb30qfvMyT^*5>kV^W1m9-;+p_=46?f*}@VtYGQ6G7A+SUlw z%*G4AJ#Wi6F{`uifU59b!1Jr*iH#MB1#>=aAH3etzE2Ez)$7yMrzgrbe$Iz67C-L; zODo$Bprb$UE)mb3DJ>|hDp<6wYw&unvdN1ZaI^Mq zEH`DmJ<@LKerBZK1e_SffONAB0Mc!JAb3nJV{kytC~Vx{g`-yg<0z-E$K1m$ry|`WcH-c1UOB z$*tW_L-?lIC_J_<3+2jlBH5YJVgT9;W%vdq3#*iva4K#%M3h78;U|6S3&kC;pTnN!dIx6Jr_`%oW!Lx6`gt z8lK3Bni?DJ0$k<~S0*X`k|$G3krnx7b!DUhPfw@)fJV)=Lutlm(sT*u+fGR&gCA7B zqp(Lh8Ju%yx&&I^@#om`0SWjoP%ZhG6reSzeAqfk7fJCVWb12mWDP;nj6JrQe4TXE z!P389f=$AGxSS67F;y`q$&0i^sRGfwK$XtMd9i-?SoLw+cz$iF>{t-F~`Bs4XKCzaNm663mxFS#3+h7zfa2>E=LKvePQp;i6~ zMUP`<4aGau{=G~d7DCMKpo%(;-koAT-b{M*IJi!035HYE*arGznsUvFT|&&(&by}c zU|e0Jt%VP*4eVj(&nNMuVW47cDn8zccEaRr4PvLY^@zt8?+Q+f7qeEp!U;% z2pIe`KwOH7ML{)=MPqUpkOF{UTP7rvKq{21tKpF(=`%sf%Tatq6Y=%@)>PgTrnx84 za974RmeH~X;m0iDAy}KutZ`^SK)dK74wIJ6BvRH>#A$e1j2V@L?<^{ya;s~?a1mdP z4goPp7r{24^hnAg0a6rcwzkaDN2a-v2bML*WhseyL?l5iU|c_N!Qb_(qvEuK<(<8o zYTBt6uP`+=j(nkyi`bLgSX5(tf=KbnVXLp@$?GH45PEJ8le_9>6lKVe=0aS99OUGB z{jU~cS2OR@uLws^Z1B%XWB2+D2$5;=W$}_!I_z+%r1t!m5BG?h=u4uDYAV#hHUV)p zm1Um{mT`YxuhOf06^qok7^7KJvYyFyxlXa07@X`7Sl{Dx0f8DJzQfO?Hq+(gJ9rJf z*>wxZ)pD|f7L-3gG*cwn8^$?Xwx6$twwB`?mJq=G80=xAJo_oW)8@jDnxqmuwqSh@ z#M@>?oNEjb*`yXwf^PAuNR4HX_?9Fa5l@!YC^S(UQV{~a3R{MKCS4J)vGv?KK9A|d z+=QIss)#bqr+{f*?P9LCk)=Q(I7@XPn?>l@7cFT(DE~emnq5{FVfb;f%1Ihxr;Puq;~KvfcRuk!^596$2GCV1ClblY=9=> zvHVJj)~S;qXaw`-I@zGMZ}3#qcuBo`#Ew!GRjM_dmy=Db`yn7vq*#*nhX(HIAZZ_! zYnRcka(zU?cr!}SlBo98p5(9<3(oNl4J`zt64pYR`?#HW6~hLZW=ip(;}+8{JD#U3 z^3&FEEER&{$8ncNbe*IMB8by$guE`er6#a{CEJL8=gy9$M`a3hnW%Qu>>&a@#WYkA zoI(3aApnwoybFYDxO#EpB4sm?Uu0=9W^x28pCnHPUc|G|m5d~$ZL6nX6vx?7gMQ1qw3L&nGT};Of03C{ShC2a) z`p)Mr;S$cTM#J%$oSP--4@fv<0Otgdb?h<1#GV@dS?@n+wnnVdfs$HFW-mA%Qz$ajrh zX&$QPigZgRe-c1%E~JWQy%o|TDNc$@}ulL_Fpvis%KZ3$^UiN9Loa zX;(sxX6w|MWm1Y1J&V9|bOdV?U;zL^Zb_onz^%t0j=}zbWMhzPnTq;YStQ1adPbJb z;0=$E#az#WnS)7y1 z1b=42zlylapl`E&hnO4Ibi7;&?Oa=2sVs5WugC*!|5xkyXU5_6OXtpQz`w@E9-A&4 z8clgDdd{7_)Lc4@yuJP}(eF(cE$IIG?pg1vf4;YDt>?t&GpnzD_2ra1Ie2NPbpOHf zwuoVu52oMG^BS5pqdRu$vR=w4za713dT2zc>g(?P^2uKOwu{H~Pg4z1ZKjdGx-9%_ zL+S0s>w{kTv@c~~H0RTwgJSEk8ILYH?ET@m=dOmCqs<4ees-A{>iMR+YJB+{K?ig5 zfw{c&c-KAtO7)W2ks&V?`j3UJFPz;o>xGo5fWqn7BX3=uo}T!)YOP;x*2LknZ3}OG zwWqD~-sQpROQUA<6rEBq9oGB9#MK=m3%&0C<-Ox=$A@OkT|2k!%iG7cPoKMu&ndh< z;kUi@#UZcgX>qd3XT0~bZ_LB;+`*CCyLWdFP2Jj^J8$T#udaT0YwBL^C(~oQ2CHv< zxjV$q-!E*|=o3Qgu6v7L9sF>5qxovzX!6>O71MVwbiZ-C^KkrAxd$eePoz}-^4Rc) z7s9?0hL^WO&mQMmN0d@Zp~i;C$}!>{&?tvEsLlp z544K;%n-x0zCW@ns{7}mdAq`9jkwk~IF6;ivFz0=)!pM?PF!8Gf9D62SB7RR3EOt( zc1~;a^q<#upBa7DmXbDDdC%0lcz5o{1C=L;A5-ogt*HKT&R|Gx;fB#Aj~31zvRWFB zj=C2XZoC!!bm1#6`H$@_&dr)Ees6H!t*OOrez#t2Yuh@O9MZszW{*$*IQ(gAE_ZvI z9%wUarI6Z?Sz#|v1T9QiJ+;Uq<(c;n4@>VxU%DOqmjyElt-a@Zzs?Vt2>z(hGBxwW z;E|!%w&l7H)jtl((&-)?Uu3FYZEL4OT1O;3H*Huu==y9KYdem0i;Z1?5S z?^k6cPgPEYt(kbVuDjx{QeRyZC^Y2M8x!vRKLdT?>CvK%U(sPXE~B3> z==Z*36EgyIX{qKW4*%Q@$hvdz4(mTRx$VbtCS?-BQu6xp7N>j0 zq=0+Y5(Y=WJBVmG{WB(14s#oWU>00Uj*i%NAos|-%1HBi2!laHYvlX+-tttl5nRAG z|KZi$KdPlV_Jna7e6ybF*a>Xl*w>oL3ioYF zLIG%a!Eb*Sn=Hw}%Voa@=}dujyWoivSvgpJg2|(*Rs>cvvWkK*7R;ZW_&->M-cc_f z8G-|mgzQcxHk*sBYmZGaht>k(O{jGBDKK?X2_l;&`b3;IGkhf5xkM~s4?ILT+Of?M zrwEirBaP-9vT3CaYfn=9W8dLi9;fgRRHAq}V^*^}JGj{MbPO z)wiev7KeQ#y@llV^R^mbTmlS;5;(g!kgInU`CXD8-^tM1>SNalJwuUaQ)P;EZO5om zi>tnt0l#XqyKA=OCulOU&4dn9dc+PFevT-q825-Kv^^$`m5CAzW?}{sB_jgOTEAuz zBcyN)fjJ9^5sMg_Lfz_}X}H3vkV;HWLYqh=phm8s*jd3$ox&n|EEsaiFi5w81ag`? zjWG_DF`Nk~AUXw5xn&T&mSE&`Mg$Ols-OoB<`@v{%@|tL4XUn)K9ADWL{@ZAf$d_u z-|ACtT#H+Y*8p@8Y2s?$w!&jb3%_vySYl6)vApeP@2 zfyoTxQKMi1DqRHaORLxzt#J*RVb+!;CRhXzBeID}5g1IM6(B&=!h&ytDh8(AEa3F~ ztbn^hidaq)186XjK?Ek1@pLZB+c=v&0?ialTzeZNv*X4JwPSWR< z_7Qs&yfw+?tB!iAp5?6d?o}64wiV6jPaZYra^A938EXE+gaWMyW8_R`5bg~+o4xZ>pNH&Cl=BADArDSP0kRZ9UN=H2j=`$H zjl*XKp$8q5FfXW@F;ih8>*n#Y<3AMQY#-NGb`A5Wzv1*zNl~LY)1#6bzAyJuCk{r*Vl1nz@vWh{K z2!(`|yrkt==@lH7`QDK=@NI%>9SW&|LLDhH*YS!BL7`C71 z2(!kHdh!|sIX%4f;BR$@+xf@+I&InHY`z#q<-8xK0bt|2Im|w{<9{r24u~PZ zdXSO&TX&OX5qAE6zIC1$h!vxvIjE)qb~iYaS{*>e0)L<_?tg@Lb`=HRInM`wph4dm z{u4~26B4$Aft9d;+qJdMCm$B;Q@G!Tgoe5e@O;=OY9T!1d~6se4;=Wc$iF%4J9$(9 zxi18HcEOOV))OAqaO^wi9PrcYr-6s`ei4jFRnGIVnH&Po8;l!>-Sn@!0p#31F}l!c zSG%(jpz8OZpa1g*=PhlDmYje7^Xq1J6fS}ZPr~mf{9Mvt5SV4bg{uDd0{HwLBt0TX zCI{Ds!453;x@qZuI|ql8zm2JWGS~?!?<|6Sonukv{bAMn+UG0b1=GsdKDPQ**yQcGw=;TY0$ar>i_@s z`IEDii17Q@r5F}!qbp#YlS@0?lCv`ZrVv`s*;3*J_SVwVP6A~xgbK`>$w5a1)BL{* zz~WVyvk{%Y7>FPWaFdO2r~i}J$?j7R{7?2nkm(Em!yWHLMg7mt2%YACw&U-W{10~e z-ID*oK)?6N|6rispYDHepx=j}e{Ub;_aW#%80hyQ=sy_f_aW%t8|e2T=-=Dt_aW#% z*a!K22>K5e`h5uc_XhfX2>SQ-`F#lb5BB+e2>MS3`h5uc_ZIs9Gz7&ktUv&%d=p7g z9z_z>0qh?jFO;qzdO={wMwDPMgPLL}Bo)}IV5zVX^-y_;l-k2b4NJ)kf>^QFc@MJj z&~>(+2#5SN(Bvk?MwDTIw-5>B2(4V9ipdd?*D;3hAk~l}$WVdm814O)Wy}P7!O3A& zj!UFzQibh1h={OGih*V{tmxT|3?jw|^+c(PAPk~NN{z5P!-&AOpmnb3K~0YSLeF@#_!SpTO$QU}hD8B}l*xIr)}9E=Q} zd(gmYL6k^Ty^aQ|?3^M=7#Kq&9I(nQs$nm+SOlxt1{Gl-MW_@)*(s+P?4m zC6Q7gB9$r0BGey)(3cwGB6ep4K(K4To=1Sch#Ms%nIE5ulg zmP6)}@EwNeG%+2p#32lLOBc7<)j>=H9=jW1f!tI zDd+;q@qMaErSG#D(IvSU<6bTniYAS zMbgvl*U};nGC;N}8z`Vxr4W!9fD0jBCg`d0}@EW zB6`ku?a>Qpv=ftK>Y-;)>>qt`lu()3D*-A8=-%Z-==d(2WMgXRW---~rt5=@E^Qbp zvrSSk$~TgHI2NNSVR05Ex>wud5ttchZ0;*N)1xJTY$04eH$*Hfjayi7Xi>JBv;@bB9M7tMaajjy80=A_ z*nSZ6j09QNDhea2)A~7;-9@wY44R;J-3`u}6GsDWj|vJEQp2T6NGN&gPe_tlv^PNt zVnr5*Fn-0oG{f>-Hfd<5=}fC#g~tgX7fv%xzJd(tdN&|p5y3?nsWbB`$eN1})IWsC z_D&j+PIkqN26Mjk{2m*2jn$9bX6uJVt>p}Li5_|B)-dh$@dX2*1t5A z&y4y7eTyL1c+8Z!@J~^*SileQMq1uhnjj^NQIYRR*2Hp#q`bWb12+#7ROB0JRVCG#%y@(r`@cCwniU?#cLS}@ z5yxW{Mpqe*TBgl5aFC0znAAm)otX|(hruSpGgrM#ZNRfYP*AqfEu3_+*_AtvK1%Pv zCrCb_i>2ck&OeKq-}P6za{f>QJ7N! zn^)61jW1x=k(Eac4-D0iY*D|ORObcnL;>OLG-$$Q=YYSX&!eR)a6dq?qL7mvVlA& zJ97n;;`555gKj(iN5oz8njk;|t^^|vf|wgAM8~x!*fk)gJ9nbHn<~6 zFLcHE3byolzUeeCp>|t~!PLZ?wOjT;&iZBy{Z?>SN#Rm58!HZroM)Xt<8+0UUrYvQ zu$T=Q+Bl6Kr!>nNW%(VTma-b*5L*>(K(lLI`WRFbr)^#$>O5ub#l2m$L$=P~Q;ABZ zLR}$~&tq3;5hggBd4+U95(&sJupkdFlBMl0ak8tVh6EC19;()5WizNR8_Bxir2?x$ zL!?rzXxYrT*J3gGyojY+bsA+W)r;eOSbZtFU0lKT$Q`s<9m*B?Y!HaF)tU8*8Hi(p zl`iN3T-YakKB>hyUsYkJITi! z)f4KAtSMHAc@Q81+0+>c?L0O#lM&M$ENe+;ONYg@Fd>h#`mD2LiJ>!GtY-Zm_NN29 z`^lt*{L_uV5OufN^?PN5qZ2pB{SB`T;eSYv&7#a_~g@)y|;|6CUF zDM(YMoz0<3<+`Ml7TVRlQ(UEuZ4a*C2gD0X7=7o_sZ8D{4NawNexTRO%4r>DD-}5E z!qFl5-b_cDdln|0v2rDf%vT&D4{=OYk-ENvf~)%dwe|QcKqfU&v`Wsq-0r zGnp3Q#-^mPrqi=Gm~W*~J)VK$*V5N5eI2}|DP(SrKT&q1BERx7hYt9$7J)Kb>Mbcv z$9+4M50$#0cKU}yGhGtZ;d>u*&vVCaD}nL+hlvj25O#wy%?T2NihQk!b4Dju+zg9r zrH5beUPvwE%IVyrR-Z!QZphU&3!2yZMen;6`dIX=ThHkah9>mMqd5nrzZik!$mPF| z2Wl zmXw#GTzNk~YUJC5!7uMJ17~e(AXRqi`5P%e+;<=Mw}r6VUp$!~vMKaVaKm)zaOjMy!*_oP$?zPCwN@X!^W(yXuf{)KScs3TsY+pQ zzY(0fbR>7W;j_E%ubrNper0vTsI1V zk4Dp@-Y>itS#op%|6$zp3lp1KQ(hdgRi&%}TF$Ve`AepsdHKWTxl~kP%9+bQep^3X z@Mibm$Yeol(7iP2TP*0w!Zr6SZ&iOk@quaTqmaX1wb2bD=Ra(1{+S#LmS$b=0Food z5h|s;HPY=m_~VzeUlb>$fa#Zh_L-d5+FCL6bA8C+l$DcXs|vgC&Y0}JHoW0p+vj7e z*d^`XR8}8)>BN{6HF$6;{ru(0vQ1$@Kc8Coc1ZQpN84`P^5)*F^FP|q+?P9+@?q|o zyYGT7;;`SGlv(*cr%HHY&5ns06`R2s* z>c3tcyZaX=Xn)wsNqT!*`S8^Pt+w36$FS~>-iqPig@r3`ADi3u#aKgYM&v8vNO?lr zi3!)wyum=C zyPd)o7;n^UT66=A@~B2X^6FUiNo3W_S39o*&(TQx{7)ji5A;hz{h$PB`@2-I{+FT& zBVX-u2R7&lk5QukXIsVPig6|XE4&Jz;io}}@IXIE(eHjS-*!RSc-E^WH}+cWrulb> zu6?4{!1e3xk>ActZUwZq`L~TrpXZp@Y7jE4cp1`ZP1_-*c7$b84ghP>uK@JUea;E= z1~os}+yMbVAUrzf-1Pt4pKF=knV(`BSB&>Ja9sQRl;Dwm4`%}JuoLg?WG^b2G(raN zo%v4Uqd?f~emfVvSN7W>Df4bA#*BkN^4gt~*Zvb^?+UH3aYDr5da)<4JM%k(?q74_ z=f+(2PTzIhCC+FIHpT<((X%EHS7zNhJ@Ell;~^i{M`2ag(qS0}4=1aMF=?;gjRI4m z;xozuGH^#drv%9L5+wMliq-KZvC4(|euO9}~68Tz9+CalGlxU<;bT!p#jfLntJX@G#7t&UAM z1)0MQhdAfh<_5*0==4?)oqEqX)NSs_%0Y{Qygzn7@BjV3UYN@Zo2G4=_V@XIPSeoP z8Q~m=5JD=PvDo|lR4rN|*QC-luuCW1g!kvhVuBI^Rq$|U+G3Q@zRmsx=L{#;&!iBn z5++RIG-?SQ^A1RBq1=#?;;r>+B8%Rng@EgqM$&|R@=oF{TC9X32_NYtQtAs6*%ZNO zDCs6r=6iv`8IDvjvI;4lHzqHyL!5*_pr$}6%9uFN0)}%drMq)6jZ_H4O%!O7t5I29 z_8Me%-K;G7SpZ(UaXBPmmC%f$Sf)mca;6YQzAhtCFF7oIal0m<4u94kxKn|l6|5^I z12Z9vnnfV-Zp5F;aD+5MAsKuarGzuc)VU1NdwOeZKI6~R)Q*-B_l3hW<(qUR&f>L>D8Flykl$V$RbjNyEQ41AwVjD#%;Iw9AT zgLWG@s$AGC$g0@CHk1X|qRg6I^g&=kJ`A0N;5x(<(53oF%WzRbLPJghCOLz1s#+49 zrxgYmGlB@uyS4`W*>Fal>>o{U^>;&5MH3d5uDcm<--^4e5`74n zF4#FWKk&-@on#jGmzw5?AE;EI8b8tS$ zcSp1?)MbI(C};6)3=|T(U{f2DFFcii=zW+rLh3RZ=>rfp(&?*Z`q3Q3$H|gB01&6+ zL!JCg1R&URyyc>CmZ6XplX&e@aXCJnl7QS$SIH_6UhNhJS66X({t;wMl4CB z93@7=feg46mE3x_Ac%ra{87K?DoQS9BtRIbBVj>`BZ<=0GD~;vCEW;SspNF>GKMZ- zU{tAC0>c(NuYz(I0kYi#Xy1h8LVxjCh)#z6&_`)tkkWNs?#oQg!05cso{|9Umw|!7 zB0*w|#H3_^3SScZ1b|5<2$kn>MUXUD&P##?Uxj1|OX#LS!BQtcACii-oFuu@TzQIN znh0On%0_~(fx-P3KM{_kAqmcXNQK(KW(fc`I(?=Q3|8zy1JaQt9IaMRz6utBH(~uK zs;*O!h`}LsIw`lr?vu+^JkR{~4n~;B)2vBR!+`U{&|Hn$B()lFAG(bO-e1_pC^+UQ zC6$Cr8BtQSmEl0|h71AiGFT7?%V8WmdGPv!aZeE?x*~=do=2t~&cWCk+L0Q138&KO zNDRZ!^3)s^oWp5zu%jqr=RyPn2_n8wnS^_;%j8Th))QblMlsK^*i2NDjWED%C$U>p z%xaDRxdFLU%hvnTEJA9IB%yIrdWNv7PDP_N;Ft^$P8ZP2m6ec#Mll4qGrB`o?gQtBv0a2SrUo|>%o*p6n#i} zQ3exz>>rXWfkq`X9DplOU}ABzCbkEW(6qId2*8+H0i1g_gOvd3K9Ysnz9!j{OC@3+qZw#_RR7)!|;~b9iI%hjTH_( z{x~!mAHwx$jf& zZozl9?ThX^g}CG2Js1U%H4E;476bzNFAotd+kgA^`NG$)ZSQ^Hc_*U7cy0D@m|x+J zA?K07p@&g(qgM@`D0$=Jt@Pn}(UUtycFp{@@7Cr1o3HPmd^aR-<73^{!PW04N9)ED zUmaXMx@XPo8*TT)w3)|-Q z6S~$14-21}NLqif|HjS!i5>eV=4{J5{pk0NFWX*9%WIlAw>WR((Dyb&$DHAplL|ef zX8+ITbnF>bzE=2P%-YZ~bGYE^yztw=lRW#@HqY{v?^8fZo!N2u(f1{JtFF(x@?gwgdo%Ku{$XhK z&9^%WM)z0>Cni&FbetURTN(H0`nE^JS3mzYxWTL1lb1dAR@BAikGH%xxXrVA@>ci# z4I!C*kHf2Ow&nf#V4NJx>tH6j(mv4UZJ1omo?5zPa_(?uW?b9WrH_)79nR6&g@wDv z-nbJN{%G#s?~~ab!$X-%JL>wcZ-3FtCf{U}6AI^yol-q`xB8Epb0^NJKd1y5u~8GZ z++)n;)^CQ6AIhVy6Fc@kzFLx({|3Koe`(jPz9AxX(DkT!!Q>x94?ml@(Ry<9G96d= z@9kq@pJw8(z4v%eNuK@R+s3}sUF>)q__(lOTi#ft4wSD)Mh*6ky}vE*;{B74U+(`` zTG)~3wG)=BDQo``W{$FdU=E}X_A0k6>RNf~wsE`d*IanSwSWp5=Ro-C%KTL~L8$9@ zB?WUwRNX(DqXFIlo#%P*o`9+?w**fKKrgQO)`6A*8lWA$-|1Pxyr07hX8#DVLr4nr z`pjW;;OAKNo`sq14{Ss7-;#*QvzT4P6yOl$31>jyo@#RpZHQ;Dm)$-)*7Mdqys5kJ5SE2M0k!X8st zCk0@gQy|wB1|dQq=JlI9d0RlZE2zNuPq=IMRJf}f4yy1pgWUk!`A<&kn86*rd)(-r zia7!skZ|O80b~_{T%=*=|6~>INLlY0C;$htTR||=p2t)1u3p3c4J(S~z+S4cR()cu zJ;q92zDw&V-2zH9zheI#+Dd}O%3Vlk2MvfRWQa$g=mgZ#Oqy3EntxR13e5?^lw zo~{(Mf;i<)c#GzJb4WMnv^ex+Rbvr4M2Q=yvZusVTn~59BPe}y&WWjdQ#r?U9 z(*IH$!llK%s1&&n8|81;HDjR-TABdnQYqyRSyFLAz?2#DE7NAF;|m1-6vBmsm@_!a zudWj5^bfULwH&J*#UV0TQw686IEqM%`v|~f(e-*GmB5+iXJ}JTS2sSzFQGv_feWTZ zPU4eYQR5Gq&eV!ZQi7;@XeB4bO~{il#}ZkL1kAi0JYtoxN)8cY;T#EEOPK&Oic9!Q zwTq5Jl1c&qF)o3=ga9{m3{gb6ct4JkNLoPolY{fAM=n8j5Nac*5MD#c!$}2*iHzZv zlyrjYgF-j~&042Y_~Z&j{R~(+UhMww;`s?W15*swu8hp6Ap6ZQiwrTCpDXp~Y7TKT zK0S;Np>1PeFtwzqt~v~Q3lCwse0RwbuxQT0An6Mw_P1;4&=1MojpR`-NB=Wl1FDf% zage+Mw3W}g&33OJUXInU_9oNk8EF=w#u#Fung}R;t`WEa6(%Q*n(A{Y9Yj(zR;x2D zb%PQ*ot}vam&70;xuI1WD~EeUu-w+4p>RCIq+mgcrC>mB9r~v~z`g(xY+}1|_$&aT z&3cG4)iO+x+?K8tf~`;Z^1xXL$OeNCMu+s$GM<4TBBVf&65W7zHqnq`3DOiVtzozW zXcEWHR=J?VzVaFtj-olGGz>#c*JwLIUZNQMH7niF#v!y#+NPD&lmISy{Xz&d3sPct zEHBhq(;N8`Cmloc41oU{JLgI2=WF?)nSHRSo=JsD|}{p$uFn1A#E|nL=2Bij7S7T^q}r>fJpd zxG0~=V9A0QiLuEXVS}?la|DlRWrs<$r{ssmcv(EIK;C=hhTIglK{c2{z<}^B3S_fntKY&P?o-{D( z;MRu<05)I)V6}*?Mr{T@9aD7?KAVj)iv0nauG99x&9u({Hu4Y5WDtF`ISpdRfX%B6 zumSQ?sFP-pq_ycvQD!2b-o^|7>?@IQFk|7T7t1aGTntm7`Uj@to1Cb@MxlM!U2cni z7kQMHRgqXA_5(FgYk*AphPMk?5|@ih9KLRG76E-g5fqmS`=P;XU0n@tj%5Pjy|gM_ z$wQ=xZ$gPW&S5peLbX+YUJ^-%im9;}Tvn&#)DCd9sW}%*uHuKS1sJreiy` zs(j81bR&G0Nc#y4qZ%O2*2gzA$TjL&z<6@0sb~Q@emA^^8V@c643r2A*g^x2q_b!F%}Hi zNwwa^IFNPtORZ8U7^i@B-3Ml65Ca>Fw7*? zG^m!)6*3=0PL%LT~y}_LBqlzQ$O1UX$f>yv_f3xM0xu zwuPkb-3$2NW`~F3lea!SEQUMUP&yIMbz-GuSJK+!bC&s~M(~kXxXb$9uJU#P?OmD= zJzW~i@bu^D`B;1GUTgsqksa>EiSRb0uVf*76!wyaHQ2@Y8FOk;2#U{U%+PEIJ;hU4 zY)B-;?W8J+GNc=AQ*Ew(W!6tKbEy4LueCRO0J(`AM`m{QjtXBTx>3n#1 zz*0URn%PJBjqv&iHV&;N*7I#Mmm1fE@<$-uaiX42a;V$j0;m^0sdkoE_j@VdFvIC~ znumBhHxp5j`Tl6PaWV3j?;0(NDAj$$asIY_E0?SaIto-)hE#(r-N)txJ2eE^qDF2g`omy8qDq%=8rI zfx99zeUB?n^v>ItX}*6Qzx7~T-N5cQ-hXCKhu?VNv(-U`+YU_mPgl4E_*jG z-y_@!;zy_>aks|O7JeQ7ebvPc$M=3AzV5obwg0W})FX3Vy!i6)RcFNKLHl1J9)_`T zb>ly!REif*-`Cj&FO0p4q$GHb->5z~F~5E1v(=H40mt%E@!kQ?a~VONPgPf%M}6V_ zLk|M+$UkqTy>kELA_g{Im@IpubjnW5OKDNG78|^>3d}okzY{$*Xv9V_&zwN)Z=YH|>Np5297n!Rk zk9_r_e_XS-=bQaq!>`Plyy87GXY!9>1G4<>X#cU9Ye1d(TC8K^<2T6auKVkC7k{4! z90%M*|J;kG9t2!#Z5Zu;q58}n^CS2+av}3YX7cW^zqR!Ee)mX9VB!7y?hh^&c=Mw2 za{IPzRy~L+jGHsE(UP~uJ6D&?JV$5V7}|FzWutfXk8gxl>wYK4)JNV3%^Vx5D2Xl~ z`l)42cFFK%sAHd(POM(=?cK-guysG_M_p9);fZHwwpNV4^TowxFI(QRZzO5KtnOzT)a^!?Vs?1y`fMQ0Bqt8Q(+dT4ld(BPeIp(8rN z{1ZJ~Ixi)AVo~qp#F+Di{hxjXd%wAw^2X{nZy6sv)V>#?K}mIokn(iI(p_dH+cDWY?E_hV}YI`p z!Ya^>w>^2JWG)qVWHaJDHIs`Q%;5d5CJTjEYe9Eka`&M5CkPZ-cm}E7bk*-qZ@2vp zB7%Asm`8fm3Cv?a1+DsyDcEv^%QM%y2A7_4eMAL34)m>DdjYE2e(El`Eg)hjPp^7r zK+xmomCu0;S5S#QR{;GOfCQ?%_p@vKnKx#|Pet}5Pi?@zt_Iv!0TSpwi25NjjUSNz zA%Q?h(7kn_^rG?qa5-Mw9ql(B?*4zc96ZH1D&i>xU^5lR8lIxdANX}6*zNYzZlEip z*qaUZxIeWU=q!)k<@~b{x?i51^7;d?TQ1m49c>-hjr#3X0L8%3{)4B$(E$4c$}hkX zBL;qXsOov^1fm2KCrN$_CQ!<|*-x9JoXQb?FjXmrLH_6owjC}=1BpVGToSKJ>)cF%9K_2FD~vQKzkm@VjDj=? z*GE_i>3fePR+AgaDm+0rWV!e1?2XS9M~krxbg-BrmHLB;b?^^K^5}P5tj-w{v(`kN z)dw_FCUhtpx^w2Vb7COLhVA>@pb_nS;8ogy$I zoDEsQ35Qgu)E70P$@nQuuX13*sTCLbX-YYUNKSDODFcRn`}$f-IMsk7K1~>S7;?eK zjyt60d`#vKUPK9Qr9|lx(a@ZM5Qlgw%0%A&aKn9HI{7=ujv$WAf%R!1eNdsw| zD6NE>88X^#1S>#NGlR9^(?d9!XwIidX*|#xVg;~5NTAChxs8_jK7nzumgg;-kftVP z(;-}1BP2@8udp=CKGo4GHOu|`5#KsEnKe`jm6Wd=(V|oXreY0vaVnx*ml{L)H7`Y` zMX+P!>6K5n0U5P|wBu@C5isIFlOY^gBZP8t)MW+= zK8<{_xMI#Pk&FaZZbfC<%|Kp*AwdZa!XQzIM$W>!Y0!^;Ow|O(_uwjq>m|T5 zUcwaPy}8pQew>J4Ss;dJi@?;9ivKAaqT`&2V$>Pcg@kjSR<7Jny977h8Ecyye z6M8^=TN>(wJFz94rUw*dQsoLP1e+0o=9Ft|n;>x)mrhMh4(ymxp|y5FCL}uzlh~f7 zRLE{{qA0mat_oFzu>6A426K+RLRtf~U39z=Sz>TUz~#t4irr*97f$J&YzQQ?5oak9 zJqq`5R=0pK0$B_%6oQRFk93sbu34Uf^pWSxQltGDtHnCM%@r;;cnSYeWyWH>nScTq@g5?KN$T5AbO0tx7&3QqAu zBl2Gn6dGHK9e}KI`m_--ry}Rm(8Z!UBazNxm*6U)ewm^E=~{+LY^M};Cx(2Po=(oS z1Tj5DU4sOFYZ_xQh?;f*uxs#9P=G@OI|V--nbqjhaH0_}y!KB9aTAGBNxTBo7RYpv zY)OyJ5F0~uqRM83mbgiioJB;idJdySQbL2^jiPB1mf|JgS3YtZw2*C|FS9&;SN-O_vRBBF#cJy9}_$7-NxI6@b(z;y3}qo9b=eQ$`D_ zs0|bZ1`lq41oGlp1&z{K2xYmK`ioGD>!!zpu8K$@0dqLDw8R%wdk_Yg)x46*0S4;&Tb2&)OoV@cNHF&S_ac!{!7xcP zZng-}*_>ok+;mCVRHh1uJJbIyd>4R;z{d^(a^w;T4q}fGil@LF4XOdcTgD`3IK~8I z2l5Ijc$jnD#~LEp1*t5zfGTsPFUrU$A;@1z59b>QhuOl)qfpnIR(p!j<2dqe5;PNV zIJFVG+rtJ9FLPHdJSFH$p1&>PX|#l}T;u9Fypm_RV3Yv7TNjEZx@E0N-=-td89Pns$PqfVC>gRDOYPS)>Y(Q94Mieq8q zEND+Y%R;BAGaN3?6{8>EFEqKXe>T}Kle zRWGKtGYLQl+;A zvWXF&^Re-fNW4I&Q)>eDkpJxm3fY#egjBfQtkczsf%v;rZ)};As`2e`H_*AevgzXU z>#AKm|NOm6Vml~U={V19esR0Ot7UUXc+qx@BcU%&FsP*PQN z?%21df@(*0F7CKD`jh%r;Nw&_sB7f@qrBr|xVrlM)=Wg|lY|vdCn!J_r z)k`V)W5o%X3rCkPFPt;++e;TGws${Pt?an_@6bo3s=V0Ym;OjT7*{ZS`Es0Nt1dtK z=I7o|)E{h{_yq7gSG^gIxO#8f@`=x$;r6#}J+rOuK1fwEzJBrdSG=!ww1!U3&rMN{ zEDovGJ$~)RWaH4+w(6gUReYp6n)KAo&r2E_QeP?@^*1lZbLTey2j zyJ4yO*-XgmKt4FR|NOQ6pVz+9H6-rK(|aTK!Yq^aXDipb!+U=`6GK@%rw5z zG4$NAysK%?-x7w7y!>-++?~md;>9~V>W0)j2VKX5{Y*zqOp-RZv|4Zh9qSd_Ixv`Tz@fGstD{1t`gOkDLNCOGi$rmEJq=&BTJ- zb=3!3hd(&8!Zrcy|vY@kY_;vvFC0Qe!T zN_E5vWsOFFK2{fldJirf;1;0B1F%gzaA*zGob>nYKsGDM-6mZ`lF=1)r8a8Mt^xY> zG%r;V4N3uFi$PV^j+|5jWW=SA&x%RtUjoQUeX>OVVSi;h>EoqfXrj6{uD-=wbtXx)3q>?kOL=d+Ru4q!De0gnXS&l!R z3~{09Y)oT3`J_Zhr0@Pap>dy+;bsezOI3!>u!FS>oV~A`h+%yzpkm0#`$OlD@{`Oo zoU%zvVL>A^HSt9_@ir_Rh4;a1xkDh^nqp~D%~SGFrw|iWM92hEb)B0nN;tunYR2eF zco$D)19XJMvWPW}i-C#^Wdd6R^gt|8OQ4~B+yKrTp<)HZ0^Jtkr@3HDEg6}L;7f>3 zs63y};MU4_(j@B)5gI8h2CjhzA1VCPSV;rNzKeh|K%fV+iFLjv1ts_rWvbBWmfYC1 zgT|0DsS%|JU*TCoFjYvGrRTz2T7}FO;P%&xMcOt>aZsw1OHMqA@pVVV?$fhpRM4mh z6=<57Q^TlUsKKMtgl6nAl1ddL)^-SLAnu5{T+{qm@!(bv8mTpJ#xmfS0%oRrKtgG` zhgK&-Ib5O#%ZOYR5Dw*F2Pg;jxpJSmNa)8->uQ{srXJRk4aI}?|7#a2M}V}?hsFRU zA^|CPa=sI+-UI`SLZQIt7loKqG9T1nwE{1cLSQ8VLWL{*6#`uRU$~DH4(1sJHf!_~ z8YWzXgyBl$iz%TBzLZO03UJnG2DlO#e<{eI3_I(K%BfsX0?)~S1}47AP7+xwiv)bF zv*ZWi@r*Jl5NwItpXpll#O(h|L59Y={#Gz7}3$*s6R5aU?D zitk{9i>?;$#oo2mvdsbRPe?83)AN!QIzTZR2n%aV!=OOEhT8t>QOk0Xj$|nqk94_lLjMSqKZp|gLR~`qT7En%h=6j{g{HC1(zutph^Na zH$yq4cqdT|B{%I}A9Z0pshURE(<8GDR>!(VR?zbb_L~GC`zdzG61UO9)ZW z5;C>|hb)bVL@QdJ2z^2$C1K4BqS$>``CpU+_E3}#D{(Rvso|lwaq zvKGU`%*s9@6@^1}vQ4lI$U5m*z)xbKu5+TgkwQDm)BL3|JsKWGjui-;2#A9|1TRR$ z=fhltP{}tDW)Jx>p@k_ClVXUElrh1~bl}k=7zJa(reQm;@k$l znkrDjdaGcQs>bT+q9$K0QojoJHxNE<*dnFhOCy!Ho4BT0!0F82%|-)jGR-5p+er=D z95wbL8^NP*bvbASi)Z1Sw)mhq^NXh(cJ7jh0g^IN8&2HA6q?~Otu8~r2uYF<$?vK| z>c#pH7Z8SO6lCyO*r7+2C~!cEfqEKBR3!ShSzJ!#T^_&^wNRg(#Lv%xah#9Zd^?Kh zLV2y7+<0~PzkRcD<sgH0NRKp5~v6Be=|fPgWTo73BX zn@gU6rwDbv+^T7v2nw`azVgr}hzXhg5=@xWEs0(NQF{YaM^)fb;XD)n_8GC_F*I_R zT8~H0a!@&Z71GJDr4ZzgoFtp!1YXt1$EeB}aV5u8a|6xvT^1kVi8S!Jaw()47efTC zf)6#{)9^VVMKYB@?E~GXAq@3;Kp()}Kn5H6z9R_?7$lvLga9U9NG1Wq5Ectew%|ko zo2LtwU`qr<5&|^>%OZ%QCOC;nX7ZoW3HffJQ5h@24|{E|7D<<2pi^S1IiA2ki9K5+ zFOm}k_@a{_8gQptSpYrNN&y^L!7Nn^z>`dZ`ACI$z&p{h&iNknqovUr)BF(qvwjibU6*AnecM zOZb5H?6x{#bXIDR{s@Hvj_4OM>~KIxwl?IaW;>D;aUt>|vMa=8ySDh>XRi`A=V?^k zPVVlTEKJHzOcnhvH@ct?1b7zgN5944p|GacH3HF*kb^=M2|{JLuikK5prlOT&(*;tjlSUn^fMLdhD-HVh;+5O|M0Ud@8ZdI8)}oFwS86ZI4;)a)0@p( z&HQa~Ah!#hNzTqDBf$Gl|9%+OGCgkr*Wl1Kz@+wG)3Ffdf3@I^8r%my#t#|kEWP!F zk#Crt7J(Lf;kpuXwXhNLJMluhF?Q}w=x{p75hsU!T(D{BHlvqZx?i(7b4b0eb$BFN z{pGxl{@w58Reho#*1S3Be0b4+!wah0?j2~m?agE3X}|B9)ODR{?MR(;vioBn_r^`u zjwEqG*B`XNgXcfN$GUxIohn?>K6muCD(d#P%U%RaxORBrt7rGm9eO<|S~-ODe6P>k z{>X9o$kU+D?&P+P%10{0;*6@a$!lNz>4^)x_3Iy}=B}UI`+3yJ!rYX+v8{VP(p=>3 zM*bS&osX})Y#)A&4Vrx)exbD?f4LXho~IdkuYU68tJy=x>I$`E$A9iP;ThUBd3a*a z?s@(D-NzG0ejjS>_B1{SY8$@t`vw2F$X`D74BUK9Iq4kP|8BZ*j_+kNY;;gvs52IlYmnz&>B;*jUY zvSk1L4$siw#k%9VA)PK|d?N0A-tEcbQQgOFV`+VRzA%20@xl(|^*z=F#AI8)ek3V- zf#I2-Q|6C9<_iD3V}E$4F>k@cl7u(UM6Vy~DkWntdS_sF5JALHJ65O?un9ThePeLD8@g;wL6 zH;37})`}73qi@HnqaIWV9m1<6KZOrn6+RLs$NQTnD!wUvZirzn;o@}k%wq?ki7We6>+8Sr~q^|GS_R2!IPyrIYQa>s~y zg)e#&ppHKVUL0B*at85pzO`a<_1Fqc$4ie=UI=Qt+v26s*2r;e`?rr%nkUl4=%g)& zZs(4v_T}vx{qn}5_1~taSVoBTDH)@;0#p7Rd$XyvXfstfYGTOa;fQ{Nh9s&uJEqhw^)cX_jI>Xd(R&}>v{kMsK&XaXM_|0n1Bf=vqc*8 zrxEr$Ezau(lv2+T!n#m>?~Y3~+@Ct4r>fINK;t>s*e}@gpsNc3?{jvjc+1&`-RewX z$PGW|{!``Wjs|+T7U0FXY>TG7>J6>5_XdDj-a7j)53f>xG^QA@=m5gH(3ttLhYC+= z_E6<1zXJZ|P+*WSKDT0CacdW-32deRXS4Q~$L}S#lJ_f~+fRbss>va@I;dsnJnYv3 z4kk<;?0<|#mXm70_}lmC|&KqCa85GA}1v>E<=X1&LmJ zeKh0*uAp|1DIVcEI50)_{3zTe2f*JgOzyg6_X-v^&*DyOW}l!pv9XKjddG-f=o|^* zSGc13AQy7F3+l4m!Rq~k2?ea$$D_%0ox7OkWqQJA4r$$rjqp^_6Pg??JFDP;rPKvXkO0Y&tY@Y`?_ZNiZ* zdc}erh(OL_H^ERdWkpMYI>{^-jPWS+#91h{Se?-X9T4`lSy+_FAhHC0xxGx9UQv<* z+4S0oXHB<7X$eRI?L`YGLBNb9B&*c;R zX6LkE83nDRr6BbL-bvc}NU2qcOG#glS`Sk*bkZQ#lfewilMKsKgxE{eqXcPDRPdOb z`AD?nVtc$8w$dzi<;GB|bF3qu5zvDe9F2ps1>d9dF;>omE~92*e)o#g0H^Sa@|q4i zrw&)JOhn)A;zlgkxi$#1XTL=FIes8Wdk>;v8!$Tt}k8KFRU3S$QTB}4*Ieqf~SBV8pTa*BbQK(d4{D7D~NI13c?350`FSO_Ur z229w?7b$;c~Tnf#nj}2p~o-XMqdooQ4=E zht~;xWMpkltSw#C%595SRjf6JWgQlUisC&GGs}%}82HG^Qlphjyej~qeR4E`B7;yi z#ZeTIb1Z(g-JB{0vdJQdSvNiHV46V*(Hc@g1vh|!m)Kf6avpdBiRHl+I&1t5z9Ak)&;Cr) z(S(2tEZavxGZf2F=YT}5zGZ%OQJWc)hj0Xi&f$G>V#|BkC#gz`Di(ln6yh%NwPJWJ zmq=v`2Oug`ROBASHj}`eL4~rpNLJM*Vx2IPM5%BWO}Z0}sHuq&FXC7o3llIKSdsae zO;%(l9Ktjz7-?52ObQGZpwI$DMoLZ};{+*C)QOOAjgS`AYN#R$E~Wa4?F7VuJel%o zAlAKx2`-TqHCl_Lol#3~;sD@Sni(xLV0N?JweVW9M;Y29zEDd;F}mI9je!Q7jpVDS zx-Te78dh8)}iUA%+4!lV-I5Y7N6KLU3aI6KG-JK=cCyH{L;v2FLupm>RA!EPD!h$RS z)L_Ug!1*S~XbH$hKs&!5eut_Fhl8d5$B!chjtxc^353N!qs1T-q>>i2OdTsmP(kHR z^qe#v)Kn(|mJbTEuBQIUv}_?6>aJrq3-c*lD!H-?w(HtLY4x&Z?Kvz8VWMzdKMk~U zbu^)+ht7DBQYajl&jt|63zKO&8L1D%{Xu^SKE;J3!P)dC)!T4DtUBa4?Q(vE1tOyM z7}5ll83}a(`GQbpfR>6vI;Cof4&s-9qBgLgMnHPX`=fr<$XMuKH(L|goI-uv)zP- z48X5-$#jhZ=||xLs5p^>DO;}~175`tVWAZhSOE}r5(yBSqQNNpcZUY>`G8>$_~Vf3 z5SKs{VR$pftMz9TOn8$D)Zq(6|hh8K79lQH*k&y`olS)JJH*RHizJmKj}{KCR

      *GjDo)s4`1UxpTB}Xc)K}PP5IdqwnVc_$*`TJ4beC9Sx+umZKzl8g!Ta-^HH5H zwLBX83~m$BdGp(_rdDrFC11Tv58=dt&?r2rtJ1KHA0TcM1H?GWZ^Q>PpIVG=A{87Q z(j9;uPaHKnz3lvhNdBuH}bn2;(~7Y{d*jw>jA4#h+N`;kJZztmJP?J0KyZ+pVq~OMS9PPvn{FCFJ@NDz*nE7EBp0GE5QL|;hLKoZa z@h!(%@$z=K8Pe`@M<-KTc6>YYm~jNsd~4`vdk`0&89Vgro{o_THJsNp)L0UiKUm^P zP)^1cwmxzd`$3t`$3G{vt{wjJ)Ps4SZI2rps{W>9&XzatzZKDOV8(+C8%1)#|pb{$oiqM-PI<$6e zhjV1ZoyiTJ`CH=J9`29pc-NDf^zPoEm$!UBHX7G4GCKQMwX^$(iYwkqaz+|3vK=2vGIkxygO@$^~V+|C;#=+ z4$t02)t`N@90|cP)9(*tw>CYRyE*UTX!h5?xuOYA9~#}{d9&%3hW2Q-@Bid3(f3xr za%8zV(=Z%+al=oOi-vB09i4q`+r!V4Rlmn=dwj>QaO=Z3JAi5S3vYZd7&d-J)A9Pq zC&Pt?f>Xnnlk&*PE!C4-U;XjX=`W&J-q4Q?Xrf!ZtIibaue|d5^3izfH(hUBXoLbuT@)@R^aSw8Db%r6JEDnaI|X zk-mTB=_Xz}*V^=;q&!*&io*w6hD)B_^6i%Uv0H+gJTFiHF8ME?<0;$_mopLd<@UAF zYrSwuo_?}&MfIzXUW@K{WBf(xMeD7r_pN?~jg$XUZl8?%>ifOp-#{H-c}{iZEq$Ey z?c}k-w}u)|L}!nwJ}6x0IX@QHHu2Tk?aTIGy&saBY`)b!))h9`F?8m1UV%&Dq2Bs!TBh6bSfa0fJSa=^WN`y(8-GXQ@8({lA7`k0fgmuehOg$50HCG zA=iD+G7fiFgQK~oHukfR_fX(KfLHp@fm)^xr2GFJXeuG0B1&kD2jta9V4wCE-fJ0z zPFj=o6ydl+=;MJr&Mj!b&nQ(9(9f2+g=DH?s^A=$el`huDuLW}T+qjVjL=nrpJ3ZT z1Fk5LDiei=2qmUKf2-(@3QZviWa2SF&x8_p>2UXPAdmYM>Sx8fUGFg9RseVz!Kzs> z-{X%7n~~f^q3UT4WvYRR77imEcaXcy(gc!V4U5=NXJ04^_?aldA&;*`S+!!-B3Gsb~%XK2q9E(0gbb=EjQZXp#zQh>*qWg}ES=$yWwdG{LjdmLMF9)obOhEEWr3P+39sg`IMf@Fpv0q*8B1 z38uN2h2y*I)tDj)F2_?#NU+2NNT}$EM9?%J_~Iw0_0MO+hoy5ks3J`$n-4gIx~6~` zoWyopq^VT62soZ$?l(wKG6b|$z+=&b65!{VWp%=#$1?6xOe}hsXou~{KzT1-E`8gc zz0S1)lkf{56x&Iej%66pXs)el2G24GST`V`2}r}qazK~3&sJ6_&=X{_yc`i^5)h`< zNF_>r2(SPR26JtaK`Ioh5ne$`4&Xk`JsJ?OaA{!P9Ic|lMfh>xz9OF&crh9N0mxc# z$VSqvleWoB($liPD3O=Y$tocxO>%$%1K>nCdX&otDwi5WEWxFcFp}zQA~+1$-~E*8 zGZizFH^Ba%t{dR$86pB+D{b~iGLn?MtVCWVaC_teT0NyhvomFBM4<4z9pXyiigbed zt1NLAVUFEa#RiB%E~ODZB$6EzQ*w8)BG^NRP_}xag4j&zGit<5=lX{hHTW;Z(lyjQ zEC&uNMj1yJT*D_|#uiS5rJ*9-Bie(7RJ20RSf2;@DY+Kdo!{PyF+e)`7o!T73oH@* zq>A@P+*7`7KV}I*m*TiX1i@|S$f-|$V5suc1_`RQg*)Nk9#H;N2KmX)Dny1lfcl6S zP?H|zdk{q8W3)+{QUZ8EsuY{V42GRaX0al80p;bjgbzW|>&f6$k;o}ufG=!Di;hF- zDC_w<}{Q6SHN=GsVS>Nv~plgf)Zdy9a198%7!&% z^6&I77%?iSK|TvAtEFp85iW%V%jhATHRVF9<8y&@57zc0r=J%pq*}Tckw);Ba%K=a z0~p_oj7!9ENWnhGE)dG0wG|tf;Bih(z>J#ks_Vji^&xaheJv8+Y`5y+h~h*q%>Q+B zesB-g3DGRDT}gt6C?wtmnMC^C9AL+h5)h(?LKO~bwPqh>M>}CeU;*=FQkZZ%{H#K< z(!Pg6Kz0Zniq<%J3wp=o{qw}5|h>YO9i16 zO0x=(6NObh0w9^F6>MUOk?&0Nr|Kvk+f*@41vAV5-av#;3vbfoMj>pl2L*I>X8x1v zEw)^!5)G!F#}w(~n1Kiz$JTdU9N_WArchr>8bWIKlg9$+w;h-f98v%@$WLu8PVS}?>yE%6T}b-T$q9Pohr z5hO(`6`Dpyk!a>EOF^`$B}%52-3-z~vj`YC5#jryd%xe`r{taHhBCIZ_w)UHJ|C}5 zM7bA11W5==2GCK#_bqNmAh(caDz8TC|MIDgu@g?|Fs%xJ%pw_%%IPxEhz<@Kbr(n*D?9R$Zd ztVMl7N|V&S3SI0_$X4=L=-0sk&FE>5@eUX1>@o|O=KMs zo+0o7!bMqC!LY`=d#`lqNRFxZ_FGnNc>zllx=eEyE(%pTN_v1zsdYZgHeUhS7q3ggXH$03uP zph!aMg5c=KUx{%BC3c(v6G}vaR3M88P}d9D!VCXHAbyBafhd5H3N%`PnTDAw5rhqg zN##)c^b;B8VHiXXx6vsPyE2SrOO-@9NG?SZt3qF!{rb@n+PO)Lwr+|Iac(APU4qsS z;0}7?y+!;B<#Wm4P*uIPhvB+4hz~qwp`i#)6QTY>L<#C93fJ@FMR}_MO+=Nu;(a&U-9&9{-9VjPm zEER@O5~Yvhx_wO{sN=4=Ct?sqBla_G{*NTi*jm(f!5fvoVee+7JM-}LQCq{YiTmPg zQ`h@Q;{H3SM@;g)ZA%tR-+k&XYD{k!A9{NCGT()`0oUlf6US_iJ+s+Xn|bVwS5J(E zUNZ#^FKCGv{&{@k2g8eY4&WnbkiP5HgdZBb=ytv1@9QVF?N5Kq8}!`9z5Ojd^r>s~ zL@KR+>EMSWUp1zo8*je!)#r70D~f8l-hI9}YO{49ZPMJbn*JhW{;BturIhX3pT6vV zOwqC{p@U24Yl9o`SMhes$lQONCAvEXZ|-gj>s#@D(EJmL)ZppQYCpbnSPu8Du+=t< zcKx_1<=FnaOUPrsAHzo)aebNZpZB|kORXcvcDL;v-qyY`axnbPC+{3P<_k$JTv6=w zu83%B@Jc(|x(08~)9)Ssc=A^Q5^9;*iT6I4KlZqI?b(r`dC_R03%-WQe+^~@)y}^2 zVf(V5PaR%8+JC7q`EGbj`iFP0D`y20ar1-g&@^&Kuf)<(@3Pg8#a)}-mGOjq38sH) zV&8`DfUz&}`TI=d{wCAT8*_?pj>Aywx*}?1#S8j%V;3#y&ZC2)DTi|K>-flb{4_~_ zb>hQig$E|S)Wv{W8KZ6u6npc&oO4@WbZ5qG?B9dOAAjnJNPXG2Te~tp*>o+%TQTr^LOR)J_tl%DR_GHZ=%*7;4Gz9*!bXiR z>Q8xH0fjpzR&Q)uGG1M|TN-)#bV!H(%-yw)-9^Kvng^Z-#D;0b@ILd#S>EzbKDlx1 zANQYgeVrEArGIUF-78<8Y+L_&>e%HoiAVmW^De1LyfOY+a$&{2MRMWFVG&Kw_6D4; z<-K2jp15!Db?$6lZP#d50vIR7oo$xM?{}tuaQ!_nNbH|ZELlBkjk$|yv-D`OPS?*J zQ%dQnsv0w+H=3m>RkQjp2PpB&MlhBs!qYn12v6?-ac1hXLLl%jzY4siX=LIbbN{cg#CqD8dJs$VLvF_| zhDOo)k*PA#)Dk<@C~|$>TbQujn3Hgs9yz=uwn^}qOfwSlMfKtQNUv=px&Cr+9& zz4S>_(9{AwqzSl}EB&u~!9711Or~>;Ym>)&K`9MQExz^AoRj)R7<#LfCcqu7?Clg@3@2df^FQrl+tI9=MqQ-&s15^K0q>8w!OY z+q&d_HkJWn3A_a`m;M0QLMKy84q=RONITU8O6Y~LveT$E^i3+w45_{C;6;HE_4L1u zsA#4dOGhveSU^?CJdeHfG+x9sQcsn^XY@48Itdy}-*pq*rgZq=EB*=n$vztCrw4gJ zn=Y7Y7nSXMPO2GSFBDWo)H7j3Q9?#18T`0Wr_n`rH3pScHV|tB&(oF7jAI)jR?Ti& z!fX~##5E~Wkn`d)NzagKdV1A@C_b9zf~mS7Hl+dG#gZw6!6lWfeXam?h>nqL=|jZNnS+#oI&jx+ub259_~<$UHRM3OFCX_C%MlI9~UuPK1O z&ZvV>k0X$dA*;DyLaqIdiNklXxeSER1S{P`F|!Fe$c@TIl~&~Qa%dARDDU6rPzUF!p*z@wA1((@quB53~QDgKHuMe>aXYgGU&Git2zpeVAT;9sQ=2KY`~mLAxhK{L>5hl zsriUA)IuzLTWmxFhd^`3Mc~XnUhH72-XKeGxn4rq3Ma!dn;?HuU(w8@GEs6#1O3#M zZz?$_mCUnwuEp#4izFkdBDy%8Gd3ZOE1+SEYh#gYDxje37z=hTd6B)s=2;@W6c*-> zF-=qfP1MsN^bA~LwXABNs7VNqrSRa+@CsDAXgnY=?OESQMWPuRAJV@5aeH5f7>8hQ zXp*R26wTw&O0+YWVf~bfMd}iWs0cvj#v->`ktALj=g09R*cpKMFVU35$xI365hPiV zA#8|u1r9fog0+Lf4N^099_wnMmFgp`ql4i=TH!On=xbqxGt!XvsV(;WpC|#VLYXg#xpn-(r(Ar`h#sx?j7)a`wRFKH`*9dH%EnhOUF!r_90!mg`g?Qb3G8km&)ayJ^bm@m;($YDb-H5mZ3Y)4|j zlXI8I!XpYGYpdI{ERPfQ7#_Tw?@(|h!ODevQj?o6RUI$WVH%uYL1{!o9Wx`SU<>T( ziAXnX*I4Bi>WBH+1{6SQW+Vtz+v-GzU1e8=<6O2>DT*Dg8jNbCaQT3wWJ2qt^ZBX@ z^hp#np8(F99TQc@>39{B#*&RR*eDFicGi%NJgH1Ytd>)#oOzEVQ4ejQIS{xc2Xz+@ zZWHr3lu*P7B>=rwm&07{IDb}HSUQss#0WuE-o;WVX=s4gTx2W@96D95=qIYuaF!K? z^!B*U2$)6yHIg+TUevnc_%6wWs;lU&6w_g;LHdxqc*}|waB-%U1Xk)O*Yz3eU*F=OK z!18gOTE|g@a)uz!Y7%uSR`yfn<9qNDMvM>-P_)uK(;VRrTZ76fYd=N61uKEIPKDaO z4Rs`|NkK4TngCTAsk=atU8IZhe^_DaR1?BpYY&ouHn07hU>B&vM^s($e@$cXFMViRk2oy&?bO-Myobjy8KdKL;>nwM zp0GyJH0;k7$rwq&onI_ov6C4*T_UP0Ig#>oZeb# z1@u4}_K76s;cR(qSb5koCl@UDJ0FhR(UgK|>mv-0o*0)%MR*?iR5J(O9Wd zqfM0}(N80uI6T|YsS96cY+(e?PfSsyyCZZhE?gm{Ar~=|*%F!@%oNXB-Zc%2LL=)c z9fPD;9T0ILcu*9RJBZ+(xIE*aJ3d5v!5;0j}=qPfyA`ayv;o}dM)ip`S^eT|R3#J#bM*&W-(z9C*rXreJl zKH|?1RZjG|>^iH**4mNgjwvhSRMQ3f5v<2(5rq!4#+(|Q265G}CYFgzFh`X-=e2Wm zQx|G4+WCw78@Z2vz$n|BS;iP=Oo8Y?wP!_3$BFumV5zI>w)fbJ=Z7~0yt3?0#O#d+ zMvzxFZpeIk5+8qQIASOxWL0C%;mOnp{Y!Vwp4`25aBoFoz^Luyv7C_`sfjy&^N!9z zjx8PCR{3nf#>}DbQa0}Jz0_N6-qf|~y`1f1EA;8q;H}VWOGhi}CZF^YO&k9)r#{_t zbKhm|Q2iI>_vN8(yVuMQoNdqk!MOItv3U0`xx3}=?aue#AGm#)_C4!}p=y7>v$Lv} zyGuLU#E+Xl=U?tcyP&bAT|)l#;_~gy?Sy!Gw|^b z7w_rbt<}A>Zjef=%^KyunP3Wk8ANU;jt{>LzRQKJ_j~obv+tZB5)XQxsZZOtf5^P- z+VHhE?tj4SE*?)I-d_HccKYQd(I)1bn2r5K=X{Itb34zqE_?a=@m(ul-?b0afHrU9 z(jQ%a$fncx7tmkDzW{lzAL#*Mc=fh)c0$VDJ7hl-{ro+<{)S_CZNOyvNc1Zk4|p?> zV;_%1q-~rvne%bt(xE$ztC|a$u@g^hoOZwP^yJpNGxmOxvHOzu#hW=VPdt6OcD48O zdB@(G2zc{Hrmbc0Zg)=mz2rN)Um3n5r-xq2zc;8)44PQ^#n&$+w)-|L-;G^*axAtq z{kh4W;zHZdnIm6+-}b>jcOGW%RZXm3-2L0&ByC!8D{`>t(y9T|&9Sc0wo2dYFI3a% z(k~}``D1OT?_Bz7VEOmP`!e4~f7tr_WAF6%52tNtyLbmlo$5^`I8}oyUyk`+})bJ{qbWv?k}s@ zcyKc9lSJFlVX-h22-tJJJGSxK-LX>+MrcTiA&B zMR)l9{#^s9L-oz+p}i~be$m?Y-q>5C=~ZL2BfY$bAN7!+YzxK;D-M6^v-i}x$3?bH z>c2j*{kuQST=ZXRCQcXa`gss+kluvL)xC5krEi`3=s@-Vksee#m8qMrO>>>)(*eKWlgt+1$$1v&ApO}J zG6VWb3#2(;I*QE_eAd6Rau>ducgo?N$8=k~im5m# z^P$%r5?KCMA1NL%+2er84ji8^wIP48vJZ!hEpoL*+>_SV(*IsSK)Hvd`TBh$Zs;&w zhcc54cGIv2IN6_$&+mHwG{oh0g4+}^;SBsq7CUHLCe+HM80jaL_qnQqy|nZv?Pe-= zN>f~eH|SKpnzmdK+9juyVh`xI7yI|K(7bd(W#}URDtdv})wh_CBf7o>p>L{NR7cmC zll${*{bVdk&JY62|LP!x_KNdR8ZiDu4N4n(rA|;YMhMTbtiEs7Q(+!JQ}KoeQ)XLS zl&w=NXmNBke?_rfOjmfUHbz<_e~eNvH%GK|l3OH~vA9@r_OrG8M3) zodOhDRtAKx5U~nu9g!EoqtT4Ep4f$330YW4P=INowaPMO90Qzizeg0Cc2M<69IHCb zbtd@rv80l6FbK~`8q`X~MjD6)6TS%clQf}n^a*OlDkl&r#7|NJSb_;PhR&}vyzM~|=K?(dDebhz1u7FGvOZwalc>!P4kSiHo@{~bQa4csh<@;Le2SA z$gQS)*~AR#>`AIkBxdbos9+2#Z%G`YnyoHX1w0a|^5@nu@Eq)jGeA6!QzfmXH3ko* zFoG0{RKb>5rEvQ_>Qc;fC~z)#_UyTFk&3#7;=(e3T&Qy6stQCZchM;~OOSOA|0ojE zw4CWcOAd(qj(UA_taP4IdbUWFagxm~S7xyVm8u1NnHqQ81UjKQNlk4Eg^7Z)_q$>& zw@C^Ck_+ri$ttA6i4oU102dah#t2LunD{* zlqgG=N$AXQU9+eVLzOn^zr-ZSuW|WJ2SH9i-3KCXNoo)(Qxt3#geM;=sgfiKPKl;| z556f$BEOEN)e4jYZ${oY?{6Sfl0d64YWN8qqz+a?N>gEgz?=iFU{o9no{k8gPY@Ja zB!!{^gWrLl6D6@Cx-@=oKrH$JB0vrCi4_sfcuO5!pPUyPz81TQ_WRSz>sLGU+Ol5p z0E>KYIcROf0c}%pggYRW9^{1E(vIto;W6@`W?4~%H?z%~Z6#hDE@Y@!Lsh5@G3o`7 z3TIhj(RCt@L|w>yXM~qZq>d9aIZ9F1Bt~O^FFBqS(ZeEdk%UEK8 z!W32Zlb&)D<;AJeLnuvoJER(n-6T~oX4)R4IYF9@rC~}-EKIICaiK=z7hGgtEQNBK z&Qc$`{hPmSc5X2r2omZrsUYBy3KVo^Ue`r7$;WaLKAM{z$G?q)UZe-5yui54{eoD- zro{%cE-D=_dM^9P@c#PzMX8%Zzk|I+qfAtxW4NOtmd}4dsPr6K;BMaR&U1*(@0P4& zsyjp2GSp06^K!#TYLrDEc%gp?Tl~2zCvb$S+}%Fv#NOqv)%KD@>;GZu9Df5zC&zZI zuU@b!IY&FO)BMI{*5Zx96Gazydq>}xW`a0T&$V6S%kKT?sC5&ve($)AL5<&v@SSoKH?DJn(V$@XOkoEKB*%+Xk1tx+ylu6>#kO`ndJg z6Z}j1(j(+uZFtN}yEhGWem6P8`_Q$B=0 zKCo|)|KY5AQ|I%cA=<*ov0Hz1SM=NNu|u`OHh1#%m=D(%Movf{ntBh~dyV5_ecL<3 zi=<SGfpX%S5=y`qjQ%7GLF&*6%K3_`p&v6bfe!lzL zUp^e!=&Gi!UAa~3{l|^&8^a5-+FI@`72BfkdR~owwR`zkv8Vg&;Ho2qE5_Q%!e0mZ zPrC<3Lpx+-(AEvz6>e^q&CfWyDe?N04OWyqUk5_*0D@>Vt>xoyZmu-L7)G(Nt z`u5^y*@270vn~$!``Y4n?K9c`d3em4vwPLVna>k%jv1M2XwTQDqOYO@j}3jjsP?ll z%N5gJugCw`j`5QdGkzUN^v*e46K7gge0V7SiQNU0OKxxcd~y}HIsEJBXKuC4KXh-{ zKEHe4eI4KS!QIZrHfluo!mn*@tHvijec|A?{$=g)!)#Vz=%I!U`QvVnmDRlUH z8V14#7rbtIZ@fpYbr1Hirg!N#qzMx%X{9ke$evOF_PBjsxj4pun8Tc-Jx|Y zQNsHmLn@l__o>PQ>=ZO124f?Mu)MOseIZQseqEQG%E+ra-USLma$}aY5h5@Yh?P8c zeBRZFgvMy1RJ}FM+!1cRP^yYSbBzo@7fL$Acm!-NKBC8_t_ww_L89xO`bG=+3U?&F z#a#uQwv@^!?5tf%p(`k*ePzdENv2}H|@b1*d$fBfT$J$jLx`ZZqjCEhrB=({4Bh>ekLlul+Ck#6eT!G z1$*4`$?9BzOzIUll}(*ZluJ%F?6gsrB_vU7HujeIpjdSQ#njT3;}niCm3hf!8tbEM zl0={_LPY}WU}Yv;Q-c`QQYyruAIjxXMiO-ptE+kD#3NO+m{@z4ZfiCh#F>$Db}Hk( zD8SiJ+Szel`mRnW0A!w=#p*Hy4i8@j8J>8|pToQAcSvL>YT)~+0+=r8v_R?!=@S|~ zH(B+}1}01bdx2`+UG_H;-s~k(z&kObd?^a-f+Wt(7v@F!A&!YV(ikdssu2&CC? ztP?5Yk$y-?CE#+Cj2>qK%vgyeQtA@m;bp^2q~NB?2$oY4=iwxs)6AqKCa6;kp}C+8 z&WcKl94L55Iw=7Rzx4cmWomDG^jG1=~9(f1Fax5dS>(F-7E3 zAq>IdrD3?5E*Br<%eQePzlVjh=oy?LAF`ao>3I{Gf$}t8H z9IP@55FTL(oT9=lE`1_i3PK|pIhOphlx9jE=0dyn>)o`_=5f`n*#~1OuOYCbcJFAsqf!sSyCb zlM(zCQ3EXLG_|C?(j12yRe@rFW?lhdjHAKI71y!(SW=dNp2xGKC$2>Ep~yvCtrrlA zo)wI3A|jb00x!;Q6n9};Fk2C#41I*2-iUDZEm*qTE73~HnuUm@u9L3e*FYg|IAj4p zJ78bS)GI8sGBCoRBufa5f={Z$gC$&)RUq+5LW<+S){A6|2{w{uoeo1s1A-Dt|ePY4&5Ti%Kij!lsb<^5(Lc^N)i^qN#Fm zsBj6>pijo3GtC{OY;h9JX?Uu=GD8S-FiZ$VX=%%&$LsKj=m!5SsIh*L z{@6o?hZHOd_A`l~QUkq*1Frd_3HCS}MN&M^J9@j+Vd~J{taZGTjSAaCog}aX56uLr z{9+L!eu3xQB7o!+5#=gTLDwt9yZ?Eim>Ju1hM4k}(Bk3i$7Em6c^w;F5ABIB4ijLmj9WyLu0;khcheTv9;D z3RaOzBQOov@CfJ>c!tb`_^6+nk^J)Px8tuw)Dw>pK@FDJC?u#z94EwT-AV6tZR6_F zs*6}&aZR-LcZ|L7yt$~${VZpC@=@WP_PB(~6Me>53arHg&1=Jo%jTDcx3WnWnQZ^p z%c7)L8>Iym+ClEUa$gp0Q10xbUq(D!;IbIbew~$Wa^H#yib6g-J!u4Xau%4dFN04#ce$<^6fOce0bBIsy__U4?V-?jQF5p6?=Hya00M@zE zLwuY>Q+C9|o83V?Jw#$0E2l$GD+7hmM(rY*!QxT;@k0k65h}8Hv`pBBzP--jCTl9! zP?_Ayjs+_#+>*qeug7<`2!yt&Ecj49=S0M_+J%t(3%$Of}<>@9-a(uppS75MIz_Sm9-%^Eo2%?wMyLLO@q?xgG; zczcL@sk>nCgU3UMlRxOryZ`kwrf%;YOL|PvW2akl=FDAmaL}`%_NosJTaw&nymRzx z)7sZ#FSiaiZ~gp>cyCJ7o4abe2EHA?Zo$UU7SYNz* z_E_s8Q;OGR(_=$>uO(V;M~>7-ntmBxB%VXx&o;e064;XdJv*eoKcoBDOT!N5=X_hh zddt0{*Pr<@{ocrW`3p3yJ$>cKw41NLdM)n$#O=gyy%c>J?e4nMyRq=IdmBz4vkh1K z*S>wm9E*!RuX@pp%|9gfzf zubfvEwt3#iy?H(U&nlN4W z#kUvoz4n18eQ}>{tQm=RUAx%V^YU_E^o46nhg*If2=u+RT0eL2^i|XBe}3xi^)I}7 z$FtAW@majDJl<3=7T>#i)8v_v^~U=|w{wU{+x^@`dF-|BiO5Uc?~Tg%_xD-3*5=)x zRXF{D8JSS92}@(zkS^B%avf4vfMrYjw;IX#j~ZF;dJ6{X1pQl$Tmm%$!+NG_Gk4O! z2LQnskTv8rBrDqOY|)3-7{m|*%6OeBRFJ!Qq_1}NDa z4hDvN|IZijpo^?mx4g~b1y}$qAY0;XZS)=Yl4^7Myl?5@8#*vP+&caBpMfrL`_>?H z+XP{*R?|1Woj2MteLFi~(e-vCWAi(@=iY10?56LPXP!MW)y_GRvw!eLupV^Fc+-?W zGpj0bz&ES9?eF9B%G##GVw(OV7%hVX2}4~|Dye*GxjawbI#D)H|Ht?N@OAXJrr2*M ze8W{SRc-0_p>A^;>NY!fxBhlt|4#BU*_iyp6qi8DnbAtHPk^{qcL?Z1)zY#$d6fWZ zuzDd4-7ck}0avIcWibtNB*)qe{^g8fW*oJZ0fwQPdLF45(t>nJPpG5QkRA2dj{3Nl z3fS2NY(PO?z*N9&lbGB~I>+m<1jZRID}piU5m8SF9~E34LPV<{2?4+{h9=;+5Og|AAuV% zw=tmEY9 zzq}X;Wt6y|lhrYJ2N*zDFJu@N`YVVhm3}ITgTgpbd+0%t+TNO)ica75b83MYYh6aXrKHi5O1vZ!g=wSB!MPY+ww88MZ>iv&8;K4@QyO$U zCBPI5_gvCX8A@DWg$!vkvI$$rqMM+%V=FKx{g2j6a6#%QC`X@Vm?pc1n5@>oc_(Gn zpt2%V$xEnz796S8AkLXcWo(9lNI(<@1nJbmkPX;oze5ZS3DU)WW zLSfS|R#myW9>&Lnt5HR6L6VwO*pt<=v25tASE!hHh;40n!%?ao67lBZVAh!U~^-8AWHryzqFCC(e)g= zz8E>g!H7S;Qpo2YpXaFpZQ-QYihU6o6yTt0QFWxUiY3gBC^{5Dih3du;<`um0d`y> z{zT{iIe})Auofd_o4jR@8sL5mm{OX(W3{3r=dQCF;_sw?T8ii);4B$b247pHa&^Y74Y%ur4u! z&E*1j<0L?bt(=q{iM8(MVa@wY2&?bpyqkUGg+$3qOm!Rf!RrcmW_C zw30>6@!C?XK`d3uqTzal3J=v-)PWHY4htfw3(WsS;jn?M^bQ*pq%m0;M639K7PLmB z3D%&YF^h_#;k&LSR7o^R6p#p1XoA%Z3O|g2=%hNSfGrnMRf&z~lr{~rMY66m(j7m< z{+PT;vxMqSL9QfK+2!(eIJMv5A^iGq z2Gz)hL-GaM6Bi~%g32jyaU_yS%2!y4>l8M3Mf5Y?;^_t?HW_&bGFQkO8C<01IXpjZ zp>UiCc7hD^x4@7oQH7zQXpg`kvrq*x6G>{|WZ9t6vnqqiqAFDx@C1G)pd`CwZ9x?! zQ8A1B|LZtY!YQ#z<#d0s+RW9UHqs;dlklWL%$PYHRb$#%46_p+=W(orkcn~(3WC7; zz}lVg4JxIN$jVZ%2&kob$#ho|aPg5YXOdX-{v&$m!x2stWdoNH0a>gJP;E`M6xKyp zALMB69GMDgfPFe&%m~ZoLRGp$n3*prLIw2#$df%#gXSjSaau&mmRfRoaWfuH#1S)z zH3UM(WX-VR&Bll)x*Z)15eA?LR7AnT%&@Bct*l!1BQX+DSw(m(DpaC>K1~F1*bNa2 zz>&B#Xr>@7Gf1r_UZu?oMX?YW#J0Srhw|v;CXxB@b`r`xLIu#u(*H8UVaD2KWl2Me zqS_z&T)4Xm5tM-4Ca6WIWe86WS1Uv=@_`Z=my4uEks)j_r_zdJC?G|Ue43#w1yFtI z`sc77(UhtLqC(;xf+GrzgiA22N+bAbnvB^rcq`KJg5v;-fFC6qi8QdXiZp~X5mE-4 z9Z`DHl0pMxbP?6*m=~6uKmKa}oVFU3@&%&$Niz+ZlNoA*~Ue#>QyM(N#1PD^Zf&yZ(pzlR*9RVeoTc zUg_GnSgMVo*T=asbUfpx%efBhr><`(w%naH4Ns8~3)*Zkv2G#!0!Ed$a7(#CKEL72 z4Ra?~!=1-H6=i3^J&I^V;kicaCF+HR2&i6MEa%PjokY!LOAcJEuwuG_C(4j|nvbhg z9gi$u>Hbh`ZQ=sOR5nnIzk<^4jxeMzu8(3nk>u@o3E@Ty7U0v#uO!in5=5%&ohF8e zmZM^uXB#_dpuY`a@PaZLId#c*!Xs_u#k}gQ$f(X2*~EV==-qmUuy06ivy5U-2Yk9d z^V}+1PU4S6!%XD!jQ;W{|Jmc)&;FX1-afc)`3~O?i=Mw4GdJh@C(Dk0dTHCBW%0)F z(JP$k4R6tn>RI1TYzt33_QN=H@Vki@vTE1ee>F{y`X+ze9Wj>w*7VFmenj-0{C?}u z(jtA_=!d~oR~HO@mk=YGs_(3JY(~=`Yq%HBw>J_%qkiJ)b$o&YpaJQPm;G z(0i8)1AX=XDr_C-icd>?;`i43d8DXb% zXqrp^!{oE66Ga2_hFw%@a9h>g#=2v_jl5>reQw>ZAwWZ*rd8i_BjdLVgJ1C<-a9#` zqgJ~(=-T4HZ@m+7Wb>gH?$qGMyNl1X^}Sp(#1_QOu}*$_XWptD_iW3tx^F-A&YsZ6 z-Rm*WsWnC2T6yonyhMw4U`hArP;=8g;@Y+%6u7m{uRC5`S}MBK?`}Vt@ZxshXd|^ z?f35dzRftcvj68L#J!i{@7i93e40A)_p|}?$ldsJ2XmOQ`0{k(8|n_)GP&`7L3jGj zaT~SUSyXVJ`fYdg@O#^aho?<1JaS)X{De66=Ae7p#=ha|gC@9}`03B~ds&{{YsV*^ zNVDm!UK{bH^BR6D^zsxRSAHPF>k@hLfTQWpdwW!47JJzYyx^2QUs^>X4j zzIiaD$EW*$G9{$9cJ95Z4gbk?K^_c-iSC8vZWEMMa#l{2RiNEJwdhU{SpLmiLxH)b zO>U!y8lI{JGY1y|89tI>7`EdQ{bJY{AR3 zSvYUqk5@ee2h=+|MS?6>Z$X=@N0(L8W(0zD3DbbLefCjLD(O}L?`JVh9at&7C+4vCP~Jqhl~%FEKW!im7xsLN5nzK$stxL z2^dS=vTQv59tlHzk z1C&7z>7Q0VJKe5|l6VrcpCS~58Q~<1=4r)8+-Wm-7rwx)C7lSWFhU2mLBZgtzd8uP zl>T`%iYFnR47`gQ>X0xcqfnG64Po?2a0pNZmrIp^X~N-@nzpHV_Q>%i7C{A5ASlH` z_?kmyl|fTTCcwzQ5>%Z=@$x+NHnkrCg$r373SoNMrm3b%=u%RZd_^E15EU#1<3B{h zMUGU9f9|%Nk9d$mlWvh+eDhBvq2f1%l6#f*bv!Ph&IGKr3kV7gGoi2trkZ377@kjNEF`wLpe0nmGGZ>eh4uqdm*1g+W}FjB zfWN$e-a|lcDnLVWC8CCRcz8wgYx7znM6-X1GE8)la5s8SgjP@yByT%Oh_(yp!}xiB zJdTYKNJ|2`=AzIbBr$H5F~f_zLg18a2C9JZpABxuTSU?UO3l%1m0Ix;-skvlMVO?_ zHmJ6UauPi06;`!D6CQ^qJ)l5xSz{An;Xu4TfY{9vPUj*5Di}}!=2N1nY>8%ip5!0_ zi^lM>0zVpY4&@M|#%W;GtikRk%6kbH2@r73-`GOflqMpBFluPTSnpo87VAYI%BGpl z(a*%mG+FVDKy}zq+OG-s!>`st_@Z zdYCVvG`W~TIfIpcwdmn zN%;vB9NzQgf?0a&u{LgvKZNjfShz4-z&(|H1g{RKhG1iibxLc@bzHcTP3~ZA52T@6 zFp)v_bz$TlG1t;$7Qk!3sNg)xz_SHZasdry&>BLL!5tDj75|f{RU1`QrH0DYhN(#i zpv7QeO*p#+UJlcE;0UY{!AOwfF;y_Mp|+qlRYJMHGBSe@5l&BM2=8Ufp)g!UULl*U z*lAS?O3IUe3$HI1DG122h2f~FS61)HUErW2t~HL<~(rRoqV)ZIZx z7zz5(Jq6RSNH@lBVYnb{h!I#A%yd$6?x8}7M^m9XvW=Mzp;k(~ZhecD6gFD5kSeTu zn6(K?JFleBJjTTku00e3Q;QO8>I4yxCwNd66R$*cGMkSm?5Y&ZPs*Sw#e50}SDI}Q z6yXer9u=~Oc8gK~t&UlH5D+061x=OUYJ=1w;j9AT;YtJl(0{Ga7g6wxf`N3_l(Lwr zl>E7G8n8ql5NFV!WU38kdB{Z~Q&kla?!qac0jW^r%2Pd+sZRlFW$J@a7(7Ro?P8zc zW}*J55{ZZv(&Eyv7kZ2Hvh01c9oI8~co0(-&4kY;qr@ne9PDF7TmSR}KqQQ_G;*2p zpoIDNk%I(=gkNWi;VsOB=AnB8UE{v;JiHwJ7o|$4dI&BiuQR|wLBvpWTqL0`Smhxr zCXDM!M8N`M2ATuHk-X`Cq{?p_rR`wtaU9@u_TrsPI$cIcYneDQiU~u=(qE9uhf*-s z&JvEErf;Q-?k?>DHlRLZx|V;REfwV}XaZl|v_LpPNo1T{8s`wL4@=fOE_iMX2XC94 zP90QlwVfi3Ep)16^I^@Yr!7MrqP;AEFd(ceAem8y5D_Z+=}=9j5?)w1xUe%bBQ?4f zp%&B7d@ve(omSC*N>maW3vY}|8%k%=rS&(;lodQ`>zmP&`7`4koRJ>p^GDJxqs%Ai z`GdcXtcrMwPbt`#GgzLVZd$APfSHM=sR+IelbN9b)?xucp`Ucn>@rY%}R-F_6TKJ$n%0v&feii+k#ap?u@YcEI zrONcIVas#L2a#TEaQ(Wp8TyD`K;r@@|7za7xRW{DkBcU^f1)>!uVc~!yxj707ZSri zzkaA}=;h}_>dzDj!|Rr%GoP`OWNFR|eXgI$yX4P>_MwcdrSC6Yw}eg4>Z3m==YE-U z#=AJI8~MD`dzx?CKAg2Tsw|Ow?dx-t@s@MEZ1vmu`iq}d7UlWEY-!8&M~<#cXiNX< z5_Jgz@bBC%N!N&pv4VcGius!DRncFK=8jx@|P)xxw(bRR;Ot;6E{x8 zU9NdKG00or5%SGrixa1L4?nM8F-aaOB=2sczBshtjnu=Li7(}3{9oadpnHR=coZd+Idba_gSt?%dmQ0o@pW{c61z-KA zNWTp92?_cn(o)p%i2e_JovT%vbIM*!O5>4k+gp|WH$9iOUSPeml1&z`KLZQuS~0rF zRY>2F)*GP{VjPBAJT=r{)<1WB)mqn7vjhGZ-}*9Brf=OzSkMkwoW1GD*rK1)=faGd z^rz@RB|;@cO3d_qda~{RX^sK7WADJ+p{`|+0h3@EIvJ^N z9V?5}|M6PWgv$|l3#<{cD)F2Tw1XX}Wgm3bvOh%by8U~f{*bMiPIJ;}>zMFxS6*l@ zn}ALOHQ+8MB6a1TPT3I+^>i8<)I-$~Y3&&?4M+?I`T`zTur?fdh+`clfVmMxq|X(4 z;w}h1)YM02S&SBm(SpM<8=_ul9KHMi?bKHEXd5F_=p9a~7W|C`P|AlMiPcARE}JeA z;)Ad$A`xx7L?YqsU9qGMios-!C4}^M6KNKsyqv_FvtcO8)HrfWla2{y)O2PGoWt4D zkQVWz3#q1#yJZHpgE8W9*w9dvraJ#8nj?&!$eeLod&46z-Opd8L*Y<2mGE=3q3we3 zP>cX}ffK-GIw*ni^$yr!cLhL2m4T6Vh!PRAlP+Wv#WaT$uzyMg$ElxaD?@QWP-4ia zs*)^JkIuf4#3&U3LMKAw^p{qrETbk&{fwqAwX52 zP(D|8B{Ln$(5*mgWm%6$+t}?^7v)2AJ)T`{OTo&rqKL@4uF_HzT~}=hrC^2s6VS7J z{?~iG@Aan1G#@jQ$xJ4{`?;U{xu5BLW1p~12Lp$TBN@K#Ni|~ z9|Rq9RAXRKyKmF?;bM!n^2PQ+%c)R6utcb+rwK} z#K(E4?8xJ}bm9PyONB*bl-)uxxDSzph&8GGA_rfcCUqJnG~r;Ng+=Xpkv8|~v22#@ z6VeIIN-#;3qH07^Im3VjN>>7I_pSy{>?SaZiUZ$8ZsJw{$Q#9kt>b2#?xPT~Zs; zxTuEi;INXtj0U8>_v)kDECef25bo|4yf`B%CF~u$MW)t+rA0hg3Bh=YENBv`>=p%5 z)I`8Ld~>S`{Hl-0gAM6OP_hbN<}qk?ZkhlM@T4cVQL?-JfLms9EE*EiV(n?2P}b2~ z0p4M9kK9pSDjQ9B@wBul#Yfe&WL^5JeN%gRA1-2oQao+3C`DC0ZxvBhdClJm%#b+f z3T??4aAQe|JdMr-&u5dX9AH_8aV@D5QC?Rx&4}4LX}Vt)4Qd;tOh^ga&333V)+@S5 ztmV$@THWq)hD!5+PgxHWWQI7TE2Atp%_l3y_IIoILXC|PvRdLde$r_2GvR=pFmlyo z`fNE(CdiB~1Zfr>cwqx9^iO573A*5++kCi>(s{c8|D+PVVA)kmNwj6ETOut3q*X^c zjT}h#vvrCEC#4jnsGpBKRdRfgP4kj9UkGpaGL`Q#Cq74IsGk!>Kn{l20@mn zGpWAL2u%VU1s5TMu7jhC#7z1HAnSP9a5OYkg`V-|-|v{-Qo(`kle4No=Z889oH z{64*(!F$huY_!X(3#^bNCHr>KTFrwLNG)e+sVA%%1{gx&hfFm#;7ij z7sOf-Ruw6tvLGHSDQOjrQN32Ymn<=~G8Q}=xjefAqJ?P_Vl2`YDXgKNjiLw?piAP5 zu_t0sEv4*;cO8xjZkpr05WzN~o@R(zOq>v+YT;-N7u}X$+-O(R+dI#ZcIA$A;vBd+ z^5O2=oB0@R>g3icArWIF>{;U-vLBbb1WZltoAvm=-a_??hNbC1y`)G9*lv^cdo2*| z6CE0a^>8PV6o4dw0*L_$!?rHFO@PzOatAEcp;dQCpk-5uW+Dop9w0xMzv-}Sy#^;H zEC`{s_omHj&CVCH_05hx zIfm@)4yv<%4Q1AbyGG@fvbH;W*ydK0Bjs>V;z1qas6%!SyNhZQcbqa+IgZw;E1NPw zepn|)d^%fsMN*gKNLMeiIsx|00?kgT=nR9pLOyLce}GS4C1giX%zoD2sTd70a7J!A z&6D!0efiX~gDTx6S!FdQEu-4SzGm%Jf4=Aw(FWlxk7pU1FB z(G@gK9y#>Lo*CWFj4zGX)iW8pV3G4jc8>}LxYA9~)oWpZC* z@cLPQy!(ZM(_{YZ`^ME5oD&lx+?tY;-0M3hHD#CM%i_tFt~Z*5hV}7fn@iVkW!F`X z`6}sxl~)Q6Z{;_wk3H_>{(E%dy+h_1<0;F6AS|Uum3uE^|eRt z`$J{U1@r2wpT7T-^T7uvkG=>=1l3j(zP_{XhYN? z{{HDnC~g*B7~FY$`_ACUx$lL4x^lddce)N&x_I;EcsSWS>$CjxnQr%Mf3v?vjjmhf zthn&-cgt9F)c`+pSwZ2YzV?FP#QJxkC;XAN1&^7Nzw2JNmAyK&K8LA);5GNNd*@$! zmw$a@=}~iFlRwV-Ya(Nwxi!Y`=8HGxeJlLx@&8)J}H@8Rq`k1&A=!3T|05&hA_^FCwE@#nmm3SLX?(k;@_W}b_?>uHG=2O9J7w-r`X|Y=BhRTZ+!2xX>vp@)+%kS7L$k08lzZ0O|PGLKA z6VPsAduh(EHHF#fGwJCwN?U)2%pc%86)tINaf3{UrRm`&5pCgP%1Q%?mbP(18g~#?5XM{w^tj}^}OTXFcj4rVnU{dV@-853`@Qd zbf+UNKU1kl)?s#Cnv8HGZS?983~L61n_NrkC?ni=GLU+Q9DvYS-g^&e-2G!{gwA?# z3w=l+lD3Gr)GI|rMI3ehk!GTruJ|_NlLX5p9Rbo)hKK~0I1gqt>5K?59Tf2FT$+x< zc07b|LKfbtin7<);K!KPEuDIn6q4Kl-%x)gns!0gb8f>nv#2`VmW zxY?Bqh>Q*3FrMe$jY-DA-8{6eBhrYJDMCq@wh&8n#RqwOFsheg2@He*-j}1$jY6-G zF>i`a@ZpFNG3*&}n$|W0TAo>Ww|fSkr06UPfYuTL;VFbk!Z{K8#bbOvuO|ixrOLqIQoQz5T~T6C(g^i}j*!R+%hBpp}9T$ueG5 z*U`UQj1rPn@j$clJV6mGtR7&E!bS%~Z>z{DQ4oUY2Qj25#l}RzKGFkxDdF4~EQcV6 zMW@?Q8E8 zN<;)lh_?`ngf||#-J^{!58zaKn~;VVJ=W^>J}zc4 z4kDXH>g|p}+BA)dB7u!T4#qShM;J3R6%KbbpUG0gA|5qP5m+A~N;?wzL zrW2y)5@RFRrrP@CEV`EL1u=;NDnllXna7YW%2H0%(u;Yi%8PsT?Ey&-ElctcCR=H) ztpptzeS?5>KjDLJfgBGSDtp{X)`Ud$+ZzW@Aws!;%&c znacGefu!8o6wWhVa3L=*4oPG&Pt6kgU5Gjd)PqmQt3XU|)5)?$|0{*YcMxRx zQJf5vtCl+TOAi3Bbe-5t_%5|A;_C$3{cAizY8LcLG86F;!1%H$5<$CfH`Tb83aQW5S5oG zI+zPC@C_5-AG~Za!iFU)4)ts zf(ANOh~3hauZ~Fh<3sTBAeY`ykUyrmY)s%cLS$?+`2@6pb-7 zhdCPMkg9&fPw^sSe%G=#wdk;Hd}7evUX=8Etz=l0CXlAK408RsJ&i?jxp3BWSW#bT zdKZo4x4MkcR=KxnCRJgeJ?v6(ft;m8SCP}h zn|;p0$xX}ej;p_{3B2UK*17B}L(`?XBRTnHtt-njhU+7bEZHbt?rhsy9H-dA zZ-hm^a29-V-_bKQGdrz6IU4-gPlqqfUNOTRq<>a1x_rp&`0vN#bZKzYPcOvtnP6+Y zdck{}-8W{QFMR4x$DVm{teeePbK`himg?_p`0bg{^&IKmrZ>V9=*?ZRNinvjrQ}q1 zT!_`LI6H&>q~g5oWp-}rLNY6JOHIJlSm63>#RCsEzv{jcda3xiB?b8t6-*hsC}7?) z+Rixd9@}&#C>(y`XNF5cTkfX?zR6bkWiz9leu!f)w$-XO_=L)-rXGmQ=-0i zoj-l8YMe2?@$kdDd35B1{)d`#n}XD}y01$gE1Fn+{snLk?PpHj zIo=$3M%tuIK95%JbME`HXQC(TrAfPqEeKt2yt|$rySrjuymDRr>@%5{E}W?eU)|gl zeBf{POIB*ZP{Ew@p7SYJ=SIx*Fg-jc-r2C=^8#{m?AaRb<<{>i&)?4!)ZOSjUGE&- z-1YPv`>3_8X3_Pdo6B5}$_0gI_;LQiy~l$OUs>vbHssH&*~%VVG+MFF+&5lyIQ8wX z=S-aER(H=t=9v>>*8ZojbEP%Xqie46s~-DPeZ%;P9nQem#bYn5IN8$E@{1FXt@^6E zq2zCN$zWmBaP1?5=bAwf{tc)*bg7o;& zm%q5WEbHX*vG4xkY~3jREpxQI^6wAT7fjkEv;DYjrBq)rf9D&v>z!*Bp4{Iw<}VHQ z$K_SebWglF^N-zM?`wa1yZRe;*SP-6WXG8a(#ellfJTlT>| zuvX>F`x?}SzWJTN&fhF+IF_Mg33h0-c$1z#{?V*c6>+!U2`IfhF;ll^Ydh8%5tkO#^xl2hI*HD7CP7nal*p7`>as?(#YM z%S#Z`#uo`sP?5ADkz(4ZfSbMF17)PGsOUmPt6=K!`TJO5Iy?V#n3#czM3-ix2NjMl zLAYIShf-cyU<;-2FC_LY+NE?zHA{5OJpyP)SYW4(tli~?D!eJ2$QsK_bTpOSPjel> zUgsre>r71gyR_I2LnkeDs9sXi!gW48sxK}kREv68E#}w(jn!x~?dmk)GZ-FA>ty{p z-sl$@-69ea$$4Z4$&hqK1F3NVS20VOqtcq{ATugFY^s4=vp0 z&0*Q#!yV8I&okVwn$eAI$6VSz7Rf@hncFS`JI< zVnJhK5k}Ad8KWGu;PyEPB|1f6Br?MYh>4B1(A)fBvMoi1VgrQ&lHJX(W!RUf7CnH= zfg%y!sR?QVY9+CZ#b$d{yV0Yt+B=8c_h#QFB?*XO^+p7t5N*|vj9U~=)sgUodKViuFEVB}UxG}dMr;1#G* zfs&Iptd@;gjdYs`-O;%`wrE6yjE15~`5Nah|8pJ?$4Rh9aWC7Ccw-c@B{+mZBv8x& zaNr4qRmrk+#}JJh?no5UOL8u-46XAB6wnK`UA3O`WmP`6%jhCW zKgA3Py|ihHshlw>0u!d{=sj@On{4H59g97nvkpV0G9Ygq*j~#-drP}SAJM9$CZ8|> z6&xjAmWZ;7S}jR7C9b{38VJh75fH602W2OO}MeBd5RzR3#>$7T{)t}YNqmV?$5@zb#AQFp z0Mo3`CZgI21&Z+bY`x<)O3(~CsS1*OM|dRJVy29AuyfKo(3s3=*)fId1*c%1%c9<5 z@#iCwjc7t1@OjAH)!0NxNQx4$)sX1ng*?!oc|?qtux#kouGDfJ&_58orh9r-NE@h{ zw?q#yHB;oARl40H^I@vDGias%?p(8_yNlV-= z%4HTw%EhFcVhp5DTLyppmOq^CdzG&cfftB5L<3tzmThaf9Tm~kbHXBN*H3>`MtOw@ z!-|lxu`oPg?=fVHG))pk>%w%hQh}@lH^ZMTpm&i<f9khQp!OJv;Sd^0+!lp#Cam98im=@~}X+wE4oV<7ER`Ces)s%bRn zrTQebt2xXW9A{-b4d*mY%I)Nn+e8OfhrWL4U$gvo1@5XUpbjnhvupg&-76_);M-Qe z6RId#P=Tyl`Ovn?>x~=cK2#HVZGBr`%_Elr?OWH3QnC7n2VUOFJ~y=bsI%cx-%B~a zwqEkFLHkwuyx~fr&3VsX!!He8O=Zja3Y?d>yUq6RDjaX_*;@9kEA+F zuKE4JN1j>I)No|zk;`gBuy}MuVU6tzX5z3X*T10KoH;?g7qqWmdU*M#OXA|E^`!@y zGygqtc=oQRI>rBdeE+xW&tCd+&3FD!hM!csPj4D~U~pm2+*iMzc^yF*Q1R|3ORhgw zyubg<&TES8O-Grqzh@%Wy|U{W%0HI6aw~n=2WiOnXC1D%;zKj8)GQcT_T7*>r}Oo0 zXU=z>l?y&AoV&I3nwzf?Kc&a2y3F&&sY}lJm;Hyg&ij(Q-2Yy|iqYSlujeO!ms;b1 z+FQB{IuWXu&8e?%oG9$7uRMMCn15vJx-XVao+>!``pY|RRPETmaP-u@1$AFtxhg#C zd_Laye2(&vlJ%nV>4{}uyb(VAlj|#(HLISXKGLq&@7muocB1STUz}7Y`kQyPoPPeR z7w0=mJ_u}bU-DJl&(GUPjS3AlTeqwm8$VP!CyNPMhkyFX#!KUK%vFDgEGhSmhlH<= zm@6-Ljb_m1g_Ebs@BFUOy>;XDhBs@NYo}=EgMZ^EJm>4@U5>r7xzxP%il3huxi^p+ zsBvFEW2nFX(jPx8aQ*Br-}aNwI6pRjSF<)JHa#POJ&QlmYcd8_AOKM(=+!z{(&$FvKt{GyMYPFZc;+4 z$7;5`2@XYX9!jA4SwY~_e;Hge%4b3^J{o%Q&H4^BH))@K&%w`2aPVZjeSLlYWz`+r z^0IpALdv~&!lFlkg&*aCx*z4cKy*_%QcyXW{@K?sIkGj5g!?0jlzh2b;{Tzmr3SE}>w)(kI0|6C{>AXWHR0*WE)P=2|vlS~zx zT}6xXuc+M{Dtok4wPXuF!S6Jkt{dbXXKD3pifK$0)Ml2=mx7#IoY~YkaHerUDKwT@ zdqHtc9gO6I>M^^A$x)~rb%w~;)GXUczMz`eS~nb41qkvT=~ zY)K)w9}jfVM)%HjE8AXyhRWFgP z@BP_Jpf_c)^iDR4bLl$XwTQIhK$1~wNiqgW_%!(Q%6uOU!-KnJAaOi$yi4lC|69l05OgcDb!->_-#fQDRtQ#jG5Sc zoYqos;ItHPjBTQE329<>gt8bLHN40@iLqdzs8~nXX+78?S5jst$%s;IhB0kQ8wr{W zO=m39N1-)5hJiw6I&Y+(mC8AKhaR)9s@RQkSd8z+y%#xR@Eat4{3Zs1*hJF8xLfw( zc0mVRJc(1#!_feiMic}tl$fL=v1&|io(cng5~UL`$v_CeutlkXP3J$RrW!%yp_6(A zizX<r}yl8-=K-ii!dFM{8=i_PgA|sbbclW;kAgaaCLCfC2cxg$D9nnJ zQGJ?z&`N@q>kdDz)B@-f?JRC1?4So&`z;YA6&-ZJn1*>{f};xXm1rj-*@T6Tu~EXJ z3#d&RYGoiCK9zMNuQ}lz;)aBn1*rp zSxXU_$wVONWpSw9#Lh5M)R9y=+KH-`bN}nZgC)zk|G2*tEyEuS|HUgS5z`lf&22wR}?l6lf zK9^*(=w3#k0Z~gB)W%u~kx9Ck=q{chaHlH?L;T@qWe;O*1(W{)-hj^(L^~v{c)aI6 zT@p*iA(KPFH*ZljOExJwl&#BY679Mwl*NN!J6GD>vxxI^RqQ(uCrjN`uwRg6Ko%M! zth}8Kf&hXpO6Y(T#hOh|%Yq&y?KBuRtL zNMBh;_mT$D4NV_}GPS2e#*B>E0;>+--eUbZC12p}MtX$O=WyTr`4cY+K(~<)a}SaU zY*DC#N7Yt^ZG#=t>rlQ>Q+{0HF>goE=XI9iYe#W0D19|&dZ<=gGL#Oq#A z(j}I=xq_%(yLp8}s{r7aIEd#d0$Snd61J&WQvcuIdmMpz6(Xq$Y9%U)grP0xs-ehG z_|Fme!Gui3mNvGNC!>Uay;4DU55ozWVKN>&O}TiAT*GI`IgQ1dmQQIpWYK>q)CTQU zRjBev`@#}!i-;Wx3M$4nwG?67aPw7tsR5is#pn=;IvIxJ7Xe#gX%l84grh(w0$CFm z=ibNs&a;nNe;D&v5VSa!Fb3~(k2(OO!1hCYElGdJTo(9c@OBJu)jke+;(a^4$%r6*|HNFToT z%884eFaPX{HuGy~BJ$;*Y#$8NOB2ig^js{mY|C%IxIQUFO4ZNSyjXnl+Q-}`+be_P zyP9)OIKLPJy8Q{{oc#g6DdnJHDD#4EZt{X~efC6T&Z51xaZvhfdghKWu)zf2`?GzX|+@P{x*? zSZNO&4qWTE)oUYN6V3f!{pRZUv%F_3`FdM?JriW#M~A7)g|_`nGVod$wYy0KYD^O&xky%|~CgT-CLFOgvnd##omiVB{8UAB?FnzTB zLNM^%d2-FO&hix%YmNq~Pdqoqm+UVZyEa+c_U!LZ4Xv7VA3nL_ddtkMZ%?q@rQN~0 zvA#d2>sR;I84|7vqB$S2zE5pmCzOfB$?}&-A5G{kvrD*34}$ zQyVKr!<%Xz_}q5sm|AZ=?|V0JWzRsp^|P`^mW)T1r)`MDMO)DJrvKhQ-ap%%d08ko zGaIO()GOk9!G=fL;;$T9^mu99{6PG7hn$;7FN{30{9fVSK+TFV{uOgse4ML)Zu0)N zo%ihDarw38hfdXBxGp~bwKUeP)Q3N0uXQhjY=QmQuCjP3SJQup^VIDcxb{`?_Tvwo z*u_pX7r(8|EOWj+@!T70-A8{Q-Z!NTktuOCp>|K`UW&&0ChDGIO%vez0|m=!LKJ_t zdC$JD)$vdMgY9>O#8Njvbf4(1$g4<5VZ_4}T#1}M>!@1s4x4$JW!gQy5y2(ywQkF= z$WVc6e>FvYp6|&4Y987pe1CQO>mE$GXs=e_YHm79#W{_c*%Rt{;H&~aJ)i+;g6`VX zmtlQITV-QNFlG+XWIvhc?kZNety(w9`6M@8CZa_7=P*m8w<>`yrdZWE!aVmhl_54M zY)C-G@?P3TMCC4{)PtSl@E$+DldTm3M6NnrYQmfFXC3aHCx=RgBzNDr9XlxMYtFxglIyCqAbHp^jr}we$G`35~G~s zs;bRK&q|<@z_15KEx=+hO2NoPu@X4jcy%n)dnK(Ci74S^`gj?5VO1og#zg-n02Nz5 z|CeTkz`)4fT`mIDp(QeV8?dQ#tw6y#!A1z~IP_4VN`g0D3T_!tdcm_)A{Zn}0fb8e zpg_T)Pn(kggye1#1fm#2MLiS%TOp|(iXp*4=OE8fRVYpG#UU^di+Q3$tfs$_co}1a z5|vh_wW!K8DfMkeQIfz)E5%JxEU}=o87CcNBb2#gDQBA0;(V~xb zaYm3?gXOAZY=Yg0nsJNJ0Ad^1o-nA(vEJlMrJ!{&+NY9>8H?U1C?>>AGbxDXNftyu zRwL3v9JB#u^hr88PwA+t)q16bh2a6H5dcCEb_zTSrs^QGVI{0=7!E9(4jF@K0vqU5 zycAxGa#VXd&LBp}ehzi8UbzjaUJB{$w_}Jw7y`N+#}FUAL+bqx>#i6*Pos4mLUMZu zVT_+w)-k%M=n`mS65^43n%C8Gu)`G@#{$ZZ2$+u3O~Q_05Y@kfaLZo6^Q5;=XjV)b zp?xDifN3ago2U~dx`;w;JjR-)BFhvk&zB38%M#e1L`B_BN=haKjN2_>JEmBOBsUu+ z7)t~`E_l>SnpgMxyFTWCD)*34Wgt^90Mu{uk+X*>nd)RMEYJG{H))l{U((h(q{%jwAPw!ZA}Il5kEDDv*?oY*fsFNvQ@Kn4`+`MR zhq*Y4s{l^kCNfkA!Xpl&R#K8*W_29h2kiJcMGz?gUq!&4m%VMs0_VrR{FmUX=osLs z-UK-0ECh&|a0qHmhX7UKrW8nXB=srq5)(MgB<~e=(9Bt84?A5HlJG!zdw{8Hr)kwx z0a+VKO48!5|B}wggl3TN=lAd?njwrP(2x|V{m=)IUCgsWDroBz`Cv!~B6*{cG5U3D zlkxkJKYOT)^P`oWUL@!va#B7c+dUkTS4d$cDaNX0a}9d$G%*TRPR2q?{jZzTBP zB+5HUywnP?)&jyGH!nO7ai@Z?WZgEYe}L6kEEB=^i9N^CdS(Z3@e?cNVHEhg?xv72 z(dP?6vpnbkj@6deGCmgs$%x5Ux;;m%7o|?gNyVy*2#(e=p!6b51yd-bSo9h8Y=uyy zC^y)rX-u)cMgP?Nzb0Tb&w3RBXBWfw8Dn^>E=s`f6X@Sqcr9`95_}0I0=QOhJ&rlM z;S^0Q31>YX6`(Z20`vq1zjz>|QaI+;Y#^K=nusWV^U(>zTjj=?l_*FqCrwYVCL%SN zqk55HgUEUqLAaMbz>DNG@WyEiKr>ZPRF$C_l=cmY3jJVU$$Z0*f>Y8}AK1IC)$M;z zP|olJU79JqOAQszMl6AEvr0R{Imdv?e+B%0ke zN(0Y=V{tlaOkdEoC9FrF#e z#v{+xPd`Zg^umbs+eY3=PsCw~uX4}RTb5o94HYbWkNxt6QEOkYIG+E?*Dt*L-`9R$ zZu@RcS55xuz~sMMaRPz&!X33r@2SVKIg9WNV&%v z-y#<+52CrL)5+ql^)>t{*P+aptJ>U7Ypfx4sZ+evApSfxNXFO)PbZJ2WPt`l+)y9h zn0$)tq;ogbST`nrc3;7|oF}tFL22v8gTq(dftoE>Q!*DtX8LRH`!3aX{GktS*l!qx z=Bw3<-ne*UR`Jivg4GW%d!?&-Mev^MPRHB33Z6f0obOwcZC2ww&pt8ww^)|C%RXa^ zGOSLKB6Hx$?}@2aoa$_y&tT<{?U?MUDx(h|KW%;`--pIdG(63FXwo{+ikHNdycU1{H~qX zea|`7YdQQbwIOtsKmW{Y>h&)KSZ1Jj7Z=xxf6=x7c~4r&cxIJ3`TXp5Uk0C=x~9Cw zccp^aik4Y(+&Rl~8*0{#3$yOestLq1mj|oH#LRn_6j-k?Lh9yv`m&*7x{&IsuNpsp zdb6Q^=J7f8i(a)|J~U=tH+JlxbK{}qafSt13(p2;T;06v6YfTSy7RHgV&2UCykc}< z;)BiRnHOh%$PRN8tnD%XCl5aS)we^%WkvrH-nD0}Put&gCU*Gw`!#3FQ^%kCS@GBx zL*~!)xAf<$A%7oQ))y)o`e#*(_|JUyjDN^lO#fiWzZbtG2y#%KCv0d2kM0MFdO~{s zH945*8?fn5UvLeeXSe$s`qD>-cDhoJrA;h@rtqk}f4}hLKxg*TJD-}b-8bpJdnSm_ zFC-K#AU-EQ@Qg#T=~z45-lw48^nEIIg}MHwo+YEHpzzi8qsxvu4RLf7IyfgLAEaDQ z*|-`iPCsC;wXZLY)#P6C$7)tzTHbVXDbSw>z=Efsa1;%^QF+-uu%Ap!(ti16J^9PJ zVE!I1aRWI^d&9srz9;J|vkH0^74$3x?Zd}@-#iY|b0MK=+4JSs?s$QEfTs@gZER&k zFhqn|aP@?8c`lbPIYp_bsNaL{WhGbY%V7QgP`$Vd5!iRF=20$hKLyrmxi@ij8OxSA zpaw9}D!{fOz@dl`xYeau+6I0drY~R|*dXb@m!NBNukCHdY0zBr(H|k3Lb4Ss;^9x4 z<@V=QU|D|C>5Ai2V46c2U~~8$M-^>vXQj$l(FU41)Itia&+lT?O-d_>9ED;*!GSxY z`+!!FwX(5POjkbPRNF?TdNa7*1nNROczy z_=FL?P3_m(c(mJQ*@Lh|85_qcQGNeMTw`LSxjCSCK}wKF%mQ%;Dh_DoiFv^#oXX~) z1QhpbKrfcdiFxVneUBc_E%gl!zGs_UNKhdZ{!Vz81Iv5(_DusH<43 z;-c2%<`oN~@37}XGhfc6wa4n4ra`#mm>TUb*BB;ft zwX~^rL5XP)*y$bV3gBxNI6+=R36{B8e`3~7y10=So;8*D6%_%O1F3Y47!$ypw#09D2TDjEMAu#eP~rQxtoaKp4DHNp*M#-AL-EYJrW zWFA~E3;a6I!?zH0&rlmcV%hvO=n)5OBnI}D3c*94FkXxjib2K6?Qm3!_X^m|*ZVA; z0p=Xj35GKW3b*TuhS{lzG~jl^-pcZpQHo^gq;(XYsfaR-Go+W|r=<~$(=|Yq5arJq z@!eukzM{Z+*UA;=qh6kGLK~Er5ImyeX&+QBhyx)JOWH#wF)op}s5&oHD#&ioK2w}` z8q_3uUEnv8d|GBieHu<`C3qGslLtT(PA_I^^Ho+or_lq*XG9ec&r(d%6ffYyFw|%! z!qH@%&qW7xkjp44XNpj($I(uc)fiaKES&pT86!ozlB;VO0do*!U|OJG zj1G&f;HghwNfA4gaRAV|81tIFsEjOs{~B&|aLi4@G>RioR_z z5j6QTGOZhE8U*dWah5W8Jlvv+dxb?*Z^Ldr1N4vPiZLT^Li{?4Y-2NJw^#(tAyGs_ zBZjabtdKQG@j(%>@YdPAclc<+!GPaX3bG=X8`?ZdU}uBQQMz8*K*_p1GMnFkcz7=w zVqqGZ5C{*85A(NEP}R)rR*UqjvBLKhI&S=WfmlIML%(1+yE%@hn4q_)2nN z7PG+SM3>fu3#{$@R`!xLx#Y%r9vI=xRSVqAK9($P|MmX6XW6z&*Om{IhL<)y z)DztE(Q~Ie!5iiUR5SR|k$9-{nfx(Da%!t=)>oPjZJR8%XRSDS&t1RGjW{2km^Hh` zbI@1iF5oXk3|ravsZAj$2BMtQ@SIK5dDrNQ^#%M$#VI}>Sy?~(AUfrWH*8*Q$Pvxt z(9+*n7ulTaHmn9_Z=PL{3^I*{>z&IRHeZ>OQeeA8A*Xe0J>~SkZgs9dEk3$=2pm%Q48}P( zUa{WkKFF_MvMl+2mpL%DE;$IUEwdg;o@px#6KZk{`?m~cFW*I|AV`<>p+K}U4N<2T_3ni3C`K0KFV2j*{~vOZb8KF= zj^8Cf)_-`8JW_pD>`JX_CApzhMf zEaQI1q`ao)?55SzN~%D6DPiUW7h2n-};1|i?uJ| z=JHRV`SMN0I55!(GncfRL^RCTm%~F{XMX~O|IR;jOEdn@q7vY@6J{=BbV60~H|ADd zCwH^1llsBSrR9GlB}Jy@8E;=X0%r9f760DJ#SnT3fc1DvLrwmhp!t6DmQp;SDVYm$ z5^*>o4srTktsHl6bCQWk@(9?ugi1T>lTUlbMk-4YINY;im#G?d{AH>pGJX)2ig&`~ z`Yg4;f7yC;fB6;r(fwpRG5KJ|^_23j^T)e<3BnpC2|0;<>Auvj;O|)KSK#6T;JRrd zeB!qd2t0KhZeP6h@yti5A03AlLTw2ynt|(bp~CPfNu(2t_yZuT4{|yqSwyya%55G} zbcwE1F_#xJ`Kpw6QlO|aU*}&BZjPytxC5K}IsB@8U&$69_}u66k0mNQKcw1wa{HbG z8Og7PxwynN4XcnAD^$B9s`(yf$~=XTphu9bxLC^(9?>a8nD%uGmIz-)9sq8vRVc@> zE&OyuNvXng5pz}1)r`gE&=8NB5OsmA;8E={!FIYI5q8xWQ?tdf-`ePm=UIyi*+`2b zsLa6-UP~5D`$l90u2@%I9Z+;2mN5~Sz!e=a7~0uhenXNjaEvr^NvEYAt8uLwvt{aR zLj#GLA(7oK0L9(~?(xYBuiPA6{y!(*oV?Q_=|Ev2k|@FQ6uTI}a{*BYxpJPi>lg~2 z2I!sP!}5%#b^&VT4+&-&LSjZRz_0;U=3yxG(tyTqUJzqo zd3^?Lp%Dz$kdu#6EY*y|63(Ch8_eOQ85l#cC@`o31-lmfNkQiUKvAN6jxyEMVK~=$RvQ7m#`#K!c%YwhGYb515y$fU^vCL)+bcoASJ+| z2sViXQDq$_N>C&PjtsqY)L70#7{PmWrBt4(8HMC&4!w=g0F}1T;C{j;^7B~pu}|fj z>FOkijWC){Y(|m_;Q+vX8r~cbfQ(U5S_j)`X_qhn;KlI4&^ODTO?-e3nBSu5{kkF? z2^Ln5nb^3rBx=6%r4LBlZ0&HyVii z10kRO0H06YNjCK12Y8Jd3Ad@vN+g^<86D?Tv#wwrQxRr z^j^mPS?Bd@Lj>=3K(x&uiMJ8wI77szz>ijHfa9s16lO93a~}~fP(#|ffPcqUv>1q+ z&leAdY6Yx`BANyvOJ(cguqM3hH@zX+Fim0^*xKnn22OH~$>Iz^+ZzU;s$Or3aM{L& zzWyT&q=xb-C+C9TE{~VwGA%m7wJO$ief{q-lp^v))k0QXWnw{s_Y<{T_SsXT)*Ju- GF8>F-LkMXA literal 0 HcmV?d00001 diff --git a/fpga/rbf/rev4/std_2rxhb_2tx.rbf b/fpga/rbf/rev4/std_2rxhb_2tx.rbf new file mode 100755 index 0000000000000000000000000000000000000000..80f336c9d8e8d574363701f5b6b23c30f21355a7 GIT binary patch literal 175896 zcmd433w#t+o;F-nmP|YA?)Is!?o^;5eX6UIO6br@NFZn+eX6TFl^aQ#aB;kZ4gsSg z;Sw;TXu2wuP(*|fBW8SO6k-OM8Ab)s;dNan9hw*&MoDCpor@ZX3_6UE(1d^i-_t?e zncexmZ+3tCeZQ~h{--XdPM>q?T%P~)e~PcZ`s?lf55DpeFE?0;|GY!|b;|$iBYAP9 zym)c_#-$H!T)Jt}KD2Vls+CLTliqeQH+P2Q=^$>zlHDQ=C(oH zag*~ON))}Amv`i*W7xiTByQfnIDh`flVpTG2C+|2r>?fp zM(*pUPI+ccn*UB4{TDN;js*huMvvNWooxEQS;zlkjyFc$)&2Y5duP&2j=af*=zlDu zzo#Gk$5!wCnapawI+a~(^cf`%(lehoBc;jTt13ZS3?El$VZjGO` z+)Dh7?bzkbo8Nn3ytVatlcg^tn1R%bV1htEVmo7`0KyVQ8OTnzsm>uW5`hWsFh?yH z4Hp?dD=Atym)XwP?GF#Ms*@L>x)!~SRM|`$u;n06_k@tlWiSNJGC>kixFJh#*P#WU zFKpmx!%419F2t+# zL4RbAcbyTxQQFS?O@f_0jHqOpl3TRHr@#9*TIp|`n#jxh`fOMvZ|phfu<7e_8u9Hx z{M_1{?^fe0O8lxqI85Pg4xe`5D-MGuG(u`8h#rF=%qDFz4MBu6562VZEuM-{G;DAJ zyiFcY?uF^eKZNq-v+*72#z_+qzEPfV{6?HcBZ}gC@hzT%dv2>Td4RK;Oc*xdMEHsW zXXl95MgRJj;;Ake?AM9oS^bR-7y0Y6?gh=0g^2&iWLk~DMc^i{N`F!8$rBfT_lq01 zF<~mcajyaRw8=pe0hS`tl`y?6HhT?WC*vRfMmrE*a*ZtDaHFurx)$okI4~H>#oa;DQlfCSoehDMT9znVI>9a>SwaEcUQO`Pf&fZrSrUlZv;>JBNkBp| zZo(o7cRT_*c509igi_5+3-Kpvrl4w`dWy+^m-UjBVT#KZ7+hUJ4hE)tBC9Le9+q3q zW<&%-&;)I_VXYBmqQn%IXgIQ#r}6OaQylCkV$9Gy&< z77A(HB#0m?%oPmKpcm|9e7ABLk{8fs8b5+CMVJ|Z;(4M#;|X09^KyOwrmEc_wHqin z14JN3Aczdj3__Ivg0?0zpjpIvLoC7KPGimi$F*k7@ooz$2tdeY%1jXmS4}9#Jsea*$b54G_isTeVHgTGms;2O zk6}%*LE22RvI}2E0sQ3GC(0$90uqx6f&x*JcZo~WcS`o7z`m0$ z90mv?h8=Q&^-N$&3gTw6-gT&(wN$c}Z2z75Gmyx`(}gC&*zXyynq&oxrs< z3QYy^K7%w41$_|rn+qDd;#R^eR|o|HkxVgyiyf4hUR^QLh5NL zJ5{~lVOTi8)Nm{5Fs+no*+@VYLPkY`EcM6`*axI#j0Bw~sQ|Vx-AYC?tFhJ&DN(tZ z;au4gf`sPdIay-pB9mOi_X=T+Yj54kQXg}sJ1g$Vdd!jpUjaYPDYG8PIbgX27H>ZM z0T@McQs`CN#=r;zHvdpAj?SE(B3H4M*=6gl^wxZmy}9|7K!=ue_sZHww!!UsQhn^h ziVY1%j`S7FcN~`Ln_gvOtW>sgvE&_Pnb1t5ayzCJL2|!_gGE!AD?;u#EMIqSxI2XwP*32AZgKo%8Qki`4t<3U7bsj z>s8++i=`m5PPkweW1#E za?V|gli2!-5#85VdD1x~jL4Nim(}&6>#Lj}4;~D)j0s(J zMWfaH!k?DCd$7NfU)cJEyR3EerzzQGb6#1|v0-WULNHC97ED;OK9fmU>AJd<%@ zER%<&H|24;t6=p@?~e7pSk}F{fAk&2^V75Jf?1o#gWz_565LoZWIa$ZX01=!I3i1R zg;y9hCFCD`XsA90D)U1dD-XygJuJ!`ggMN?uT7@Mkv)(tr$D&)38m=v7?k!B$ zQ)iFy3()psX&p+RPZvUay*gK!Ux9aM_*0ou~mROch2C|tM zp$FiM5Zba|2SkVJz_CynH=H~7==Ln% zcqD7lM1-+S4DFh|F?0wuZ0JxuzG&nn-v?~oRQrM%cH6n!O(kbVCKgFU3Hz&)zR0ak z=)1pR#r_tL)ZP1%v@7}({n<6g<`2z3>aoOlzXuElV@#+tR0mFEkLim_`Lf*K2%|@t zs<>GyC#_kBhS!WB-Q#Om6ytTz;o?jZ{ zqn?UbTGRt#Y4Mw0tOK#__*Y`vZkVO}tM+e-u0OhFO+xg{7~19ujQgdR!Tt5lrt0LbR@e_C41bK%an<*QYaUW3rtP5*Ct`d;sjHPpd14C z#V?Y6%1@Q@D0xZ^lwm?N9W}EOJLN$Y7Kr77?w3vqK|MLp4=s;3v<&ksY2_i;4rH7Y zHAiP>SK@iMR05Lyuw20iY>(?I${u+p$f!I)v43aB9lGVR5Bcb zqQlfG^Cl-P0jEJ>@TG(miZ8j1v70b%48UwQquoo-tY~8c7|{hHc$vJ1*)0*7lI1`jK=dYs!cWVM1bn=QPegAFO`OOnH8@yG;AeVCp4w2 zQ101@1TMS`uQKFrjyG#SwVhH(!>5TxfK+8)Jt)xsyep=?^I2R|PaFY-h1RW;RZPJCu zjZ&WYE5ys2+ga39*544bw zWz1xlEY3CqN(O|WB?_{IGLtQ;X|1er6ki#ph247CFieEg6oU6*ELG{%_4p9zLGN1u zQ0Xvk<5bcf667Q?6P2ilR*r}8H#3`Q%?9{3D?BE=Bh|3V>Zc^JD8{!e7qZ3On#e=R z6;ZoO8u)5yIU{Slv|V^y$*5NQ^9TQ-5K^Up=-FvOpi32wJwp8PcrYH|EcD@F4)runXPJxidB7y?7m%PxFjx#wWf47sga8v_ zYXEPL$|bbnKw2f5hQhMS4vB~G=+9JVvX)w~P!HHt6I2A*@M5rIaEpsWaY$@paE9EyE0KJ$mUBmL4YeXd7wq8uMR2JN_DxB zE)}s2+MH^nip8}r)s<8T35-3I4KBb;yE2C%QbLLaFIUz<>rQL90~81=1mV`1>Z~Ab-mt>Qo2%@KqX4{PX~-~B5jq>oTdD( z-~w7XeZyl?()Uk+{>);v_^l)`tX$HtTTly=?uzwRHVWg5rTo+p6x|T>M{e)*EPg|d zZ2@&P6BTi_|yAFmbTkQ2NLq{>Ug0l`LUtX@*4&0rT0hjtFNp| zJI{@#Z1FT-oBGUiTW8N|WJXn|=l)SX`Juh8;AldBnK;^9{L&k-RK1QFY@Ya)Z;N!k zWh_~{cl8#{qo3dpCtokwv*F~5*hu@d>V-bb0J{$U#yYlm%iN9m?jdm?FwQK^&%G3} zG;*;eO^u7|(N0vBH?rid{G8bPi|+2rca2+uWqH5ZaILbbaox4SgxjZkQb%mNHeVX_ zrQ|i*uHQTKpnoA+GNQj<_Rv*k#oV;2^}HQ7}y*u zKC(kNX}fxFQ)94RISEETZK@lrmx``-f6**SSGznPyT|&QgvSCi3p@!Qx<0kOx~_X^ zQgEo`%C5nsevdMwTxl6B^W(NnD!KFtk*?AyBsW&FCigiL;~p7iC7J_=FMo{G+_Prf>3C zU$cx=EGind9;z6t%t=x%wOFd;v-e$TXUoJ9+tH*)KU@6g$~OY_@`ztvSXpJiBoEg4 z_x~Yj{)p7;vHol1+6Vq;7njXH>A%vhZ?~1@jx3G7+xJDy+?qzVULIIHTr%>DP+7|O z>R&(i%vS@J9qRbj|MkmP2Jbzkj0(?hjPc2`fBlxXw*T^@Sn8j@(zAs3K8U40_?7)? zigJF{CS|<0b)oVzdB^rx^1B~f|0%_1k7c<^kuwsy7uanWMEkeLvGyX@4ZJ;jU8qBy zTVSO4(jy+KFKV}L#lZYs=E5W{@7CuQ6g6a>;3jSp-p-r)#L(#hW=Y=m z6(8!DZ61xJEw0^vVQ9Onwr^X*ir;IsQvXZRGtoU~hwSsZ(q)Xav*dhm#uu}MieaPm zP{+l-Ma8*wxv%OM-(v2}D|3$=Wxv3n`HMJcUa#jbK3gzhIl2I2=5xLY%TVEUTcj8} zC$H)lY!{1F?gK|hqs-E~JaKS-|0FmcU(_-y`qH`yG5Qji5cQY9uKkUP9sA32JKSY? z9c~P=^@sbeuH3fei-f*2*F#Tu`WjB33rwU1c1S-g+9CZuZP&R!)iypXcZqpqX%?Dg z{UivH3ug~15o4Xh3dO2(L}y?jSqfljW@r|Ref;kv)YvPL*T(MDXXA?iNyvGEWmW~f zbmdy~E^5|KgxY0ydo*=a$B}?xor&Q;>jSk?ik{S-d(wOwYGmTpTF!ZZRRo`YmIdv= zfRc|!Q%}N`T!_g-JGI@qoT}*D5Km@j=W0h@atWnl_(@_mj#4YllxVKOOc-9-Jm)g?fTFroVrrv=@aFNrOmc)-hB( zV4(nat(Zn8s;G(1(|0li-=nq)9B85y42lT1P9{q^Qd^goxeFIfB(`SpZBQ%6sO8Q8 zX5Lwqw%;5lk)e@+2uCwXv|yYJNX&W?MHJ?mGL#m|ftP5aO$}3FnT7&hY|mvCB_?*m zPb50Q-y;*scGke)+Gmg&QCQ2#$!ab4i9-6dVTB}KWOj27%4`{Cr=MTikZ}sWm6G-`BaY-zF7!IneFX89cF5t7UC_rs0aUZhM)u9f;|AlQZF+UATU3; zEtlENZtG-NcR%)+1QB={u0rKi-k*gZv`aZQX!#wwl~EMOPU+bou{+V+bg+wr7JO$hX^nIXN$FJ z$Q{RUhHhcI4dfsTO)QatN62o&L2Anj5k$D92pLJ3nD^4jn8!?``LMiGX_MQeZH7QM z_doJvtN1zqWGZdVVr@F9v0S(p%#s~~k%?@B5bCP1Pk2NscZQ7vD$tJViX{t$cd|HU zcL%xFqTa@oI~|;atkpGa29y;IdjaJZ|34FnH$#H3oRE0a9EKF^7??A}>~1xTX=ywR zM7qb~RWTrU+yV)QEU^M*l*3vKy|p+UEFO%Bg%O|!v0dg_Q)@iIICXu__8Ea1%4Fp$%^mTc8E!0>W&ODB$pd8KOR zy$>a-5||m4LW!iAxj7Xhbe08X$tp=2j?&p^Z8z)1EIu4(gc7C3Fn*ZDuu?V@G9VIE zxtRqDjjE2qn z7Lbu-hdlUbzy^=xvEeiDVDMvDumzkzNUPssiBK zv5$b(`l-Hp9t_FM*}Qg9EEmnDCMv(RK%ykpTmx1K(q0v|AzKBqVXv5DTj4rW)(4xj`z7xre&l#n5rgCKoI(_+SnXDX4{ z%|ij0N!*vL?GoE2;SP;q`C>db5-xtgFg0@(t)RJ6M^9+Sd2a9-?)Pw+;i@pojh2{# z<4a1ogKtdmkro!ah3&Eir1#==FJxVuFTIDW2KPeIykVp#cZwCJFV^$#TA zMG^TiDU`wmSX7TtHiPlL%QBEt58C~fix6e_Hr}=+rL*^`pBO)yI^7mEQ#IMm;<7m} z9jtd%Y%9-0Z*_;dy%bEn?FS|B059y6*u>kc$6f7K|DdoznB7te5=5>I#{|~<)Xy`| zfS40if%>fW-kggn^T5*P&YHdE#}C;`BT0#WlD}L9>!yt*_e~#2$$2Jb8>(VH%O2YNY2oOn z8kfH0gR!GsRm@i#W+yFqJ$ZEHkZ0Df*?V18TgQ{4^Amq5ObncT?`Icl9)2n7)RHsR z4}bcOw!L7X-negcNA)jX9IfrH(+;|?pBA4BtY337xn5pkr0BK9!h72M2j|aCS~;3i zfA^wkAc-BxTwDdl*bj4ZPQS_2Nmux#DY+@r%d)NsuQV<>Wot)Oxg)Ed_9Tyv@Kr0W zgZAmpxq103uDdQi+L2Iy`>X|74|aGO>W_>pvOG9Yb=$)U!?v+?p{fO!mp(mT%YP%5 zRQATTt-osg*NHEGdF{@xu3vrr)1L;ov8R|u=}-4>Xg{>;4@<9U*14sRy>O>oTwN77Babxu%F-vM|KX+X z@!u8hc;ZUu|Juhh&8Toz2B(86dQ60jFFkQ)6I#6{>BM-oJ~z51`g8dPuK(fvZ-2BP_Q&&r_oh-ON~SBB zdR*lhC|N*r*q7N{OPL5TocI>gmq3)f4xIsVGQMs-IGF%;e4PM$1@JDiUQLMFE6;ju zm9UW8fKh*?hV;TgrHu zhMr2gRq=hcRq$3+)RE-z1JEmad zO_jqUYMKBDD2R~Y9l>0J@G_!Ed2h`ma3CG-NLFsLlhd^@IgQ1DoFUwMkcc%3ayS>5 zG4;k6VE0r5t1UQUIS_!GKVZ}f4y(y3U||Q==oC`r-8^QOdm1iQGRtHu)k*@w&>ZV3 z_)HX(9P*GXlHr?`9x2VBr?zVZlfa6zF&7S8YCHck&PzSc@>Z~of`;HQm5QRUv|7g` zC?T95xS7Cm8J%=s{N9GwbHW_rfO+LqV1zOCja>yC<|iE8Vw^uCbi#|32o96jv+jsW zil0a%hv{~OaUdMC=XlPn8c5JYljhZEgJY9%IUR~lN-~dqxeN?=Rfnl3^s-9TVu;Dp z$zWvRzVKmPjR3-RGw-$W3fLbLRjW8tY}w5$Q+bpH`lIVp-foA{N`T85`hd3 z7sD46u_Y+!ptXcG)gnSaWq9{(>zOutip)4jF9|VrH`5DsM<(JCyPaVj>s6KXYMe}^ zns%w3Ji&W2**&a7F)E>(>%?A*21*o#ltrS+_-=+lH2#tlG0_|*)3XVthH(sW;!Qx} z!>U1YjKRqQk**6^M?mnqx!d|N9}Psov>nS7aOt!tREj83!L?S17aw1A3oNoC)Qij# z&`fYDZYh~X*+`x%1Y&?`L)lYLun{27WX<{y?oF3lqDWSb15*)NfmwCRu5vOoLFkV} z1=&nybf?I!eLCUXR}1ss_-Eocj0CZJIMw7(b%nnf1u)@R(!m(%2JWx%S^-_Wa=sU(1xH*J%LPvy-Mp~OIsPyt!5dJD%nYN74s0(POC?bk?u zb&hQ?v!omO<@I2SoKkCf+Mn9ldk2k*a*>O2-vSJ6Dsyw_YUb6FGlwW*~XN~qEWsm!Wa&VTZ9GXdQ5G)7F zA>$}ya1d`Xh+qx_d?K`~E;gb`M%d_-WUsbPP-$Pb4?5)t%qFl}(nS?^sP0|7T~_N= zjmFNj;M3;6n^?(P5PtyZ>lqR&PK@2`EN8fjB}%9oX1=TdFpo?~%;In#%<4(HtNlpH6;FWS8ECvn81Y^pHsLMZVBKQ2f`>oj#A z4yP<^A&TA>(ixZ3VR2t#Br9o&Am&c?kh39y8)y!~s8e~W6{@MGz`O(I~EOP21)Uq-=L6VoRoBo2e zIx{iGNQ*0Y#%GcOM_khdkE{j3T_^aH44vB1^nGR#%mGt!#KCB_l(R8%(}ui&rP8`; zBO0x4d3%|-^@PYQ6Mt3v)&DNMm=#!KEm-BL7-i5xkiX|WQ;phq1 z(Lho`!z=Hz*PU3Eakyz@ZXD3~o+_|=)*WVke(2tXIiDt8vt2B9KLasQDS6-l8> z1Bdcg?EKUdh@ohH`l}ryy-m%RX52aL4o}`hk?+TA`s>7#Pd)68`Ghj%x0g4UoOpXw zEh@;n|77dnz~eB8EPkJAdO?VP8`1rKhGnmwBjcbL62d zjZNRn`l|Q0)eT*-3=ggPayTo0(WAdPk$gpGk}9v9&>QVvb+4cGsi$DH zMlOt=`QlJn-Qf?1Gv7S=nQP?8x&&z?Ln{MsR^80s22KXXo7l4SH(nTfVPk&5sU_{GOdet1O4=OTQvBt%ud*NQ{J!?3q5r7q zZsQL-cC?P}-J5om|FltwHUFyawefQ)&vl#`+*EVrKG$>l_3n}v*Sxp=YEf^~c(1W# z+n@UGeJc*@7YL;Y1NJ$#Zz%f$aatZG*}taZCnYi-Uw>plcWGp%YJYQ1f5<=d4Y!Zw zG+1@8=6^HmL)Zh*8?ugmjqL4@&4`4Kp32?y;OAnNkhDK2B*ZCuxC%4&+pr-0jkHN% zzaPFOdo~RFVvKJA#`UkUW42K7NLlVvhwwKWQ}6ySF|3zATeAUuy5=I*#S}Cw8ZNlb z_~UH-un+qLh1V0%BwOG8HCsP&6vi2T;ai3u%VJiZl_sVh-GNOcZie2zI^)Q%#H!pw z+c2tsTwJ<8>4)p14-Yk*dMwm1d_A<)(>K1Nb?`! zTk7#btuw7ow}+e}TES?pL6q9t?k25W%@u4&jU6)<6pU{~(b!>0V_ zZ)!EMsW}?(T8=V3j7^F#Ji{Xk4P~c>&TyQzQYZmGb{`kGE*|;;%aFeIkOp77IRz7! zpm3S=LmKNRq^O2IVJNp|BDyuhHGt;Y%9&uHUaHb1Hxn`=NNE6c$-EIRA_3MC2T@St z@oNleH6l-}Hp#*fV36tzC})HSufZtUyc}l6dCXLqC1bQUKOS#()C$CM4C)0?bW^w= zQ{V{m_G}BqW$+BZDS=W!Sw^To77p&TYyauVJCcxnYxE_?#q2CFrj zWXC_|U~-@4TMs%FQiDVbA7q8D-N;(Ouhl55n1(eLpqQA)nHI8GF61??H_fZa0;2~t znVl&RP&dZDt6>ktK_kq{K}RIZfpsM$j&x(rcUc(gVX%M$WB-tBRw%-baXm&?1g^H$ z!}m;UYW^pnH3eZa8YRLk{?k@Cd*#;Y4 zU5h2wEu_W3s-kN4xxRny@y{V0d(c#R>M&Grj3!w9B39T)!7xA()T)F)E&lBXIwd1f z73X9JhNWRXmv5;BR=J;>m(2!{q47q0vW0_Lsa|wQF{zJhHANgH4j)l(blbehD)HycT98YeDuzWM3G}MB^&7h)!7DvMeSV*i&1XkcY$r4MqwO2Ys+q^ z;ZTu6@IBgIYA*x-F?9-@R3MAGGz9>olus~txLgPa!TBZMApnOTQKGD2P)xLHEcuB@ zB9`;s#K%!R4#$`&uQ0V&vri$~Lmw5$`dq?(_BTUpEy(_S%Xl<$M*GDC_Ni^b@$#!|T9t+?;dKt7&D%VC2~v>yaD zIHsd5M;6@oaM+|7J*7bNG9LS^qJiTE)n**`kkYa-8!o6u(z1V;hX$~#41u7ecE-m8 z@b~fnEeD8LTV08DM7f9%4KKj2D{+WG9bgt*Y|>^K1TUzLY9=*^Ty!}rL+n9sGfDol z2gRg4TX`3Yv~~bzaxd$U^a+`jY|sn4n=HC<#7ZRaW`H>mp7qH<;APmQr_n~bCYTRs zL91q=k-FA*lBW#UEtcwj-AknkT@tMI=zd?5M6yDPM3kt;GRdv<>eC_5rtz6@ws=OA z)~hgA;-~XHyZD(PdCGKcMzTAKAId$9)3l1Otw{|stE0%;8+A&QqAJ3_VS$vI+NW)i zv6zaJ)}w*-w=MNj>~i3(V37c!>n1!kVZ~UwWI*U;VmfyDiRB#OC1o$=CC&X!DACXq z&6I8k7M`UwL33s64$~IJv*lI^8FCTItYBHzOCJZUMk}BcLAMOPQ_e3}h*U}r(>P*) zLq;^Eyi=D0|iEAG}CA7n(ZZ~BlWP5~% z;pJ72vzB@&)^vN^QK=1SPe`flO4%c27yZCj??WRpW{^;t=Ybf7|;KBZWY3XF}PYm{ZM-DLe8!Y>sl z5}xXnMT$}`9^cn1rs%x4LF=`j5(L@Vz)Z3C!-v@U$i@Vd1<-DZ@F`ZAH;?cdNI!H} zr7u%yt4W2u>e>DB_T=YkzEd1(%-*mh#<-?llV;bYTym+KMh-6B6{>9m|lY&3I*EhEFKvM8ha;R>`)lD5qp?~9J5%|E~M&@r__e)P^&gwo4xUNk9%a!-js&?yc4rW5}vPfPbAB$Mk+#8vo39FnW-hcIF{1*%gphn zBaQnfhIU-5{sX#E(5>#)r9rMBh)#up$e;g1RksDreD&tcM@ER8gG|RtovnJ(Z0c zFCJK0$6dDW+P-VoSc~@P)1C)oO}|;N@{#1?RaL<=_g}v3EXyAc==sUln<|oW4*Sk7 zxV|Oex$ENP>N4r`+L41oUG7Q$+0~a07I>sL~?$JK*>Z_0S5V*akL*Q97_lli)DG=ifkrf`?{mU-*WKOVjqMwxQUmyDZ@MHKpiS!#zkJlV~iI2IXKZ%LapX@sK=arZ1h*EHzwVa9L_{}ud z-N>{x&cIJH_!tkfgDg`M#G0HN*H$xnyFL?^i7F#6W48@rj6bW{RU2GhttXtZXQy6B z<&W2Doikeov6@6Yu4&i@sMM0@+Kg7Uv;6{)#FC#VX=ED5N?CH7Mu;G>u$pBTGCi8O zP;+;~)?VhYun*ap-cV0yx5Ce^Vcum}?GugIl>2B!|%5~1hs`yc- z`qIDpRJ9gn1X;1f=>`H7V5VU9%&w@UJsY_JpIfcDwH*;noCyu9J_zxPK)dRNfb2ThF1SnqO1wKp?8k_6VsZ@&R(+wW*YlWQ#uUjZ0tc;vM7+oh?NmoeW z-E=Ee#5H|qDkb*!_)4MSCHuYYOa_x?GDD5RuU5KmmbvXx9=TSfEFwcmQM{N@zlO4a zX-{fD7Riq$Qwlr7XQM8#5-Ju9FTGIPoh?=G76PXP_Ej)t8cI}Y#npxX@Fr>cB2g?7 zsATO`9?`8}5UR7A5~nuvSv>LkT#Zkz(V7M6HbLZdsA(4Zbs`ocGc= zj-W|qfx~hMH_6A@YeF(Gy>F&^M5UY|rVAL5{rDww@=?K%67g>H1iAb7|jCH zjNm@T+r={hi<1}FJz7a3wYxL57o(+}-9q6$b%vVh=B5y#PZU8g{Yd3lQ9fr4KfkXv{LX*A5xF8nqk;I{-5=@~FJH)w=2vFZRxq(WrdYD9w3 zoEin-c3tj-0QwYK7TV+%@^M3WA_9`7EWJhG+jZ7@82bbUqmQamGyh!!Dm_W3DJWsF zhlQLr-F%aqi8_9GR+5nfBF{9P$LbRoC1qL;N+uwK zKt%Im2%OQCpM+6;#c}3l>{*kXmvnF>7XI&Mm2BMfSo=i?ML5_+h~@*55!XvYH;xxo zgXRetgF39Qh6*!0nE$w$XP;+bDw)7KNC%nNtr|9!Rk0L^_L304XOA%;X1#T3h~;|$ z)|Cm%IX4NyLG0rwIj3?d>)XOkONUl2yP$ZM?-%kD{}E-#oMo6pGTpKQA-R;n0jd!8 z1S+`r6)CY6v0<6T(p0Hl&0_o#E33y+>@ z_n#8%T0diC3o{LCkb#|oVmJA#nIb@2g2^*w7Z=pbHHO;+do<|QO*Ns#ep2(xCaD8@ zYqirAyd#sbPRY=UB*^L!)gO`kIOIWE0roseZw&y`AOk~KwC}_1-G*FP*OV7!O!}$SnM{H*hgViH-ahQOGXcP;y=WfGY9d0q zsRXm(E*dI!7Ibkf6)+=Wr)oi>9M$#+<*A9$JDRAd z9XrS@vy9|`*FRfvM|G786Z`0`h4Q1mJKspk8j{}#bac;txNB^$QOAzeS3ce8F(xEf z$B(_}+rj<5;tOg0ibLAC)UQvIzX5VYRR^~ijmExxb<((d z^D8GaV@=vaE0cr~9TTC~*fcbo_w@?BweHs(wmaz0eSCV|+> zi;bn1D^@Igyz27}&n%j~@K;G!N6$GwTs^n`_Pw6!hqdoz{p+vt4>kO3Q62Ue5?qcz2Y#eb^ve_HZqbTIm9=3(t$+CQ)TQ)v7JP*r+` z=~(?nG}h5^Pi(3r!TFYTk@XUcIJoUq3Dhp{Mzf$ zR*z(C)(%7_icat79)nw-KPV0wpKF~z*-cK-MR_rHW&Q&ba~9PV|E_vS8K1MhYSl%4ZvOw_>RsTXsQ16|nQiS^`}O?(%exyVg@J5tqAt*{;1g}%&KliqNOb(&ec3R)eMRcicl|R{i|%A|PGaCmX4!%VtfFXNvYF5~yrI?X9u$h`kYtOIKOP!QomwSNf*!|U?Ue~R!ytn;6a z{(fopnHXs4kH;1`LMy|+O!>+_fTztGz&UuhL4hCiJ~4J&D&Mo1FaQlE+xiXb&VILe z==7TD^1szMZ3Lc;2MOU^U{sddh8_F2TqmNQ0GYkMfWI%ZKLY}S0tY~WdC=1j+$BUS zX`A@VM6polidM4u0ww4MwDrZka?e`%a(X^n%`8#d;#nXda%7WtPFMUIY@E&mn4UwHTXttEs@k}Se zs8v0jE|x8!QX*yg*#>3lf5#~la$xAcDoF(n=Fpe0w1gtWlDp2n$PXoO`0dRavVe`ctHH#s~SnIUlar+`M<fd(_-1-3Lx<^x&T%U2aQ<*-%-XOrdWydIu}7E_;jSSHi}4UaTfL3XbJ zqiJ3Wm{QR^(FR0-j`l!PpG8O@8XiQT!1rjEh+s-%K%1nycxm=~2r_N?Mp_fBjm8dQ zkd+dkpja(#tWu}Q`peCn+;l7rgQGzE?jG-5QUCP4%AI5w@mqJL%aUOkB?X~0F zGMuV9y>KUQD30ATD%POeh*{Zv*UAsg0ERD3s-c zX-$xjhsU5Ij@`!jYY}LhjFZafLD%w=Fiqv)l zXks2tWv1p4Z5U2rfAF^9;R@@SqSt|7m#788CR8t@Kgi2b5e00pPJ9=C zIA#@bP-61*5jxOJcvjPVCE>*nit$xopRUx%`ev3jHwg!MIziaU0E&=R_M=viv`8po zl{ig=tVKNVKzNEoFwv$%L?no%%>)Rq6^n!*9+pn#kv7{wS^!|@(Oj8-jHIB1KS-Ii zMwBVUcmP84{`)W?^PXe8&VE{wRorro(ZzgDA&YrD;yYd&@g&(`CRSaUnxnQ|`0U|4p~S*?G%>V~2HwHN(*jL`QC3E? z&5f)Fm@))6GxYHC;8x3ONw3 zVdfaRq7%a_`xLrT!j;NP#9=aqKBBlt?+lGKi=t}zTBeY6XlofmC(UQZM|9%N`glg; z(Y57s2y&3!8EY1Fa+NyoZ4Yw{*Ydo0jfI{He_W`_W^%wki^emuc9qb5C7?jbQ$R7}@o)YG!P>GtXtEepBGuth293a*1=NH0 zG9r$9Wq!ldM7~-Q+ht2e0}t;@0w?n`bmej~@6koxfS{&!-wv?ntd;SH?8zcz*O=SM z{wV}v=Fo+}XpjLoh;8U495nB79!;A;fPf62j$sBZa?yr@%FvUAzwRQ^G!g>>Iw>#* z_@e;)L6GWiuSpK++GJnhLq+>tCSnZ-o5%fXi;y>cpD$1UMDQg*4C5A8{A2ER+B zm$#Kjn(3UakO`6X+c{8{+3WcD96VurwPf&aNR#WCa$Xapu)^$0vv!FbkPTOLU2SZt z<^OXe2^hTX;M?OZ*Q1&%qs|D?^p}yGGagsul=^oK$>qVlqHex7qO~-OOTY^lH31h_ zX=(xDS(Nx^dUBK?xt&++{?f`IJ01DDtg3VZCq12CA>$`ien5>~3^ZIGL}$%Df)PSA z6&=Y$Hew(#Gd_yjq!aiQqZSY1aXo(ggwW?DBIUZM(9&e(Rca@_09(ke-lP=k^BvJ? z6ol32kLN#1P1}`_ow18ea3wS%@PD#>ZeI{z~#ES6UMTuixJatXq()vYzC`$VKyuWY_QJGRWW?Ix2 zHP9s z{xrU&a=7E{m+kM+Zx5c>!-ZhECE0XhWZeqW^7n|%Jp-%%6dj!yI}${E`gv-^;EAt_ zW}bL|d^rv*AWY5V*- z=bX_st|D7D7EU>%?lvz^r3dwD?&#*r*O|eGM=$p7-(?}saj|Gaop_Li)HtXbQL-oV|M{*L>- zm)>(G-5s2j$o;zLMD}p&mQ}-j+1vEP&$!dJPy_EJIp_41>^3?7;-2^#TP%fa3%+-0 zau-wIU~@u!_@4D)MPO~cdn|j~jEUuxbNK+(0rL0kx}t4;-@cIg>%_9XE%W=n%}G5x z?tZxwsV+16#rqnzg=oEjK^eblkcTdpWAE7e=Glvy?2y{Fq<=PW}d5Iw^m+m zy18%0h0wc1S_qd)eVsJm($5);6iko4uk;T!XZ*IydtZxx-(w5qJ@oR^ z{r{BWLn}X;&lrzo?w9x1H-DQo>`I$8=(5ck#8+ohMc6llA8PwiWwXP7I{C4JZBX9} zCaCT2FG{LyYySXs8e~4Maj$#Y=|tH6o&jQZAOPoIt^Cta;pfJ0`e~ro5M(z^w(?UK z4sR|uEgzqIy2drB+JU9_Lhmi?Ue#)6%Ftw(%^j77cD^q*_h@nN@K51Ev&;(kTXrd=w zt@7>h@srs$H|YhT39^1F7C}-;7`sfqNlU6vnstbo(@SWGjmeDy6Pv=}Asi*A9cP+J z%51}~lY#A=HM0G6Tz{Ake8|M0@zuvmp(>7flL1?LgF$1(zE}-`a@}%@#N5WX^(_o- zz&MQoYosDOsJs|C#n9Ig(N;`Ay*Z7G(1wJYeV+vo*ZF3NG28UL?3B=Y>YC`I9QkCB zLS4iIo3^U+9%QY_?TFu z!0HorwHZgqC7_e#JX+-4ST`x9~}_p5V1! zeEXVmNmJ3D)`q8d;%)jG78Szr{xENLeVh;gE&?_j59z+3@=9q(>tzZ6_le>)VV{Iqge- zWC%nb9Ias76o?s2mjtck&;}HeP>5=S0PsOK&#sA56o3l4QdE&8;#xk2wn0s@ofheL zSq)`|#va=iwE3(H;ez-joRkox5)}%{<(< zYiLGf|CDADzY0ZzZ}5JF+lW)3Pm^%W7E^q^-b+WdEAi@0+J~_iozZG=$?N6B_Uo*h zJkl4!u3o#(kj&aP$-2byo09OFWIr5bR~wXcZ+>FgP1?xslTF<>dS>IHQv#|`hLxUH z^*>P>#%8;$9A9{tLuif+tAfu1Gq$HUWL0W#_qlxDL?qF6u9=CJ+YR+i<|&DQd+U=k zN!6T;e@RAlkl^-6Q)61iVqDhMrb`Fr{MSXM4lI=VC$SA=FAv)Lbc`yn5k&e)W_5O6 zjH46BjD^+#V3^-3 z-=MXh<+E0A!S+sDW*yKr3cA6a5l$-(Ql3GrnhFU|HH3ESk6wx7RXHPnKOW5r<<0Jx zEUv*G5AN?{9r<_}fYI%Nd9-7hRIUw3;f$P?usW_sG8JqAa6g z0{|i0BRvm6+|a`S8~4`J;mtfEldGDU+E649Jed^AnH82Rpg;v;FO%y-;S5s)I^8pN zbQ@@G`jqMTAB3`EvV*3{VEGsal|QzF5d-PthSsX4GTy8y?U9a2b<8_ND9GnKRU<*s z@j?d!aXFx$z_VE=6Ziq4Uc$ACD&QEFz8h0xl!x1oXsO&^bV$!m+=^=nIfBv!Fgg&? zu{y$|Q#quZ&o8{T4kaO=i@_~q0}Yp_s*?~k9-KHNQ!7;A#6!3l#Up}+`6(h7rDWq` zq}JX{2$gOzgJ&Xa$rQstNypZnbS$eBs}6JfJMapc)RvMYnbT-xuS`;{$wO#UP@NzCc9`Vr3 zb8I%R>VXqb8J1&|HWK+VIUTe3)bi{0tdJ;%DwOj;HAo|#dLoZWM|t_$K*G zMOHkJV>IRtfdW7mfM*jd(uQX($%4=|E5IfA;<(*fVAk?MZaYp*fnX+FBi8b5TqfmE zWG%)88o-Q;kH8j(a1 z35_BZ60`akc9>n%oOyg&1I)pAPUy{UkODVl*|jr1;hV+nl71^=IUakgd@ymgC5SO8 z#aT3EaqI|W^qM&Npe$DW1^4oDCZ8f2yO|P!?gmycr6SoR&BGOItj=M?XKpA{Ez4VghXm1Ei$!} zVipHo-1I;}84YbV#(;SxJeV&l@8KWZe^jd4?u%KXkY{~#O}aZBAauU4!`@l7RbPVj z=-Vr(!wFOvh5_sIXg5{STawR^1Z12UkISuiiBZa~RJPrldbOjw*&n*%kxfBL+3394 z+k_W`2DWT*uJwP@`ZSZP7#F{Y;E#SJGnjGsH%lD2i#$lHJH`tb$hxTqdD zIXLh9Q!k%-#b5DsP5uXeJBIt+FC2Jgor%(b zNFJT|c;&6t$!llc%UpAy`_IHC+@G0#p!-fXQ^bwEv8?FnOG5ulrD)~Qtp&MX_myx( zv6qEncdubU@fLBzn-BeI!&UE{P%k9RTo7Tmd1{w$_^**IN2%|GVegY*r2RFdYtQ)6 zhOSFLD+95j^PR!)-=beT@ad)Rf7m#+f7LYAR#;$m4&P{}Fbxv^o?4oV*fHNw0=IKQr z3@ml!7XLVZXwQ48+lSvbyh9hA8#eacddbg~=PnqZ#W|PzIVLw~Q0bp`E4BRIEjIU) z?;G}?HC6YY-SSRu(SfmT@ri4HTzBmK3B%JZt2X<_U%Y%PXefR|jZpI2@X_wBUnf@n zqh+wa$`yY8qs+wD$E1nsCw?7$wkvV<-wVgyAGx(?;Q4R9oRu2|uHu3;`#_q{$qo|t zTDpdccRG*WZ8(=$b!YvKn!nDk`FJQc?bHo_n#+{bvu|KEZdyGsxcSTX*B?tv@7qJa z^Yh(r6aPB&`61JCe*v5yLuriZiN2xL&gaHsf0}3?J?lEK_e#UZ?vd{|n4Y_H)ccR4 ziHd5f7kD21{?(0m98(#J7 zf#3T#yu2-QG?_@u?`M*4eRoekFZG2HH?!!eMf3_`ap1Q2@0o#5e`|^8zuaBD@~tcw zBk{$(M7w4(3uvw-lY7nQ{uQ!-eoJ{a^X8;scrG9d)bu+zfzPP3KL_x!>YwDozre?4 z2>5~4!%^7Mc)R!2h)wRQt(&Vrm~^%Ugh~I&+?;&@(m8M5-%9?U2kU&p=9p)^`J*jq z?))@}0g8pd&HKwY;ovK1N%41Vu3`Pk@7o1YIS1A#F5+wdIE#T@f8VZvW#Vimev#4N$VUTb z7H-sQ0kBLBq8%1s(`V5+7TXz_W!v1>NKIXarh-XfYt=_UQV>BI{j3ztg?@}{paRLb zp3+M|8~q^1yh~x0r0WqB6qXU!0a_t;s{NY^HIRQG4A-}&_r1`4yFrP>{+BiQ4H`rv z`J&xL#K~4oNED>o@xg>{r&z1H%4Xn|Iwm?xAAgg$odVeoq5Q&_ zbe9OB5};XLnZnxFO9o9QeqIDUanvwDlt+2jEy<#nl^+&fv(YHSm@=oI$^Jo~5+gip^x4tp%Id0ZYBe1k>lc$=1f1YEYb6vx$a6{J=Y z1=V`FV3VYSX04H-b#k>-^tXo%pWxkU9kyKel!V9EfmC3c49Uc*{u1>io>r(}JHjKs zz+$wSHzTs-S%uzddLXCp_~7~mY?|>ge0s)4u^xYOrug|gAY(C+O4asWbkzLQQwvM`h*gA5$X!NVg1AO#OJWnC**_1&n0q5@* zm!O_S-qmZW@n8+J0d2#6lQc?{&d~0%@eTY@w2I*AJ^_l!x#Hp0YC6y@MfGs)s*5(% z%hScuI{M1^@9$Z*Q&F85Wt>dB;i&(epv07>aF0p!JQR39W^I}pSTD}8Gz2HH*TO*y z#5ODhlxP!xjY3#cu1Tng(P;ypbffo5Tkb2351X4 zA~;${+ew`y;v#H!o5jN%iS;@pO{YYn93QYBK4nqD8R;M+QAiY*BOx0(9o@!|0W5}k zl1XGbU)!J{)+`n-FvR*W^ro#kL?}F_rV%<4E9)kR0!4^G!wKCwAm$*o z3iV`5Mqv)bid}QtGIX)-dN9QsIUm7bEy0|~Ws%hkW5t^@6uL|+NiI@cA|Xn2)~&y4 zqGZ7#ikc;%W)X7Ft?-MJNN5Qw=145!K|$q>!1??dD%=)T1(IGx(5z89@BsM;E&!55x`elD+4}^elybWSK!s3vSX zMbWinm7B0msp2;Y={nqup^%a)#gYmNshI&N|7fR0B|RXOufQGvp;+Ve3QXp}7Jb7p z_b8G8;z0t;5BZQl>sDC1cvz{Dbw*ZVy_E<{7I<(8C71NVJgjk3ubbcy((C z5K9#eh8O?B1d7jRX_Pil=LQM(9-c1bZbKt5%}8ubF%aZoSJ^t3UCRZ#>(f)*CZ&O% z&W1L~alRHjn>3VXWrb3ODb90lJnzGuq;q?Ih4tIYZUK$)HqA+)Y3#I%I6Y-&dKPz0 zg>e4MGnR4*X&1>XF$M^EraC0{QcMy@a{6o;F*U!&@KvN-fK^K^*l|46mL0nj$0{W^ zspJPj%cm!-MG)Q%$qx)ub||kmGc!ukwn&?O$*nfsJ6Wa%;j&av2#m5`={QR{8dUX& z*B4W#-g;A$DwpsBPhcM6=HXbZ?yxw$T>#{+j4BwpPz@{h>ey#tTo7rr_WJ~-$|eZn98 z;>1(m2_LljlijCge;0hWFQI7krL;>q1D3TW|4V0#-^ObqhdT-9*^*Zs zo5VX#@s+~d-J8S{i+U=Co|c@gBm2T8F8JTaL8c}2Ju$Q8o1vtwrqYR*B4IQidvn@w zP1M*hJ&`-~>6f{!BbV`0HSmAV8)KrkWncfDqec1Wy{X|RMn~6uc=h_|Aqpm{Ifii|6$F7{;|l3TN8nQ-9GP)u$FBTfmg3a zjfnlJi~R4m7Db#r@krcTrxJghXl8>hb@Belgf7=t&x{=XW8!)L#J#S_5j8#WmA3?qbX?Vwz_qQ8Xl5PI~z?!8&XF{51e-6>5$_sPrJKo}M z{^;vmdO2&{m{#K&Fxn=U)fe2iW(-tqcBTwgB|GQ-3mo+SWDHVFzi;Ah{@%x_iJuQI zg=IVh+|@X?OTJPB-e;W+6MWA1O@aCI`uBzv-4 z*+1t8b*F=alofSrK^$4Fo6t?ZFP}Jy!1A9yPd@TjMuElq_U-j76fKb z(A7i|!{S01z7U5gCWInW3*^0pP#Eoh2x2GQ6hc-xAhkm+VW)iHV)knzxi`rf53B?q z2Pn@E8y=>xsKCQSWEN{Ll&IFqDK*~t=Tu7ZaB=}#TY+%aW&v*Ml4^xqPDOf`CABf$ z^68Uzy2GSJfien_A*)nC19U_+F-<~P+#`y8y`L}@1}rB9DGS!pr4X*@afw_txe!N| zlt<|T3n^uZj7OJxI1NRFQ=TW~4r>!7nYeb6;hAQGg_@o$;1q}xnwgEFfI2R*hY3$o zR+~DH;jSy1-F&`uu{1@fa!F5W>5HNUXSqOKz=LJJ5Jai+#eTMntfd2RH;xx70lL@Q zDQl&mIf{aPPO0Nzh(Qv!gskWRX04QtFNNTaHudd=OdV)P5HrLv@f^=VZKJYFzy|?V zZkY;LQw4qnEi^jyy9fztPyqp_u2oy*6+Ald5TJ+@pZeEO2!@RM-!qhAN)xBA5M-hq zVnEB=$&Db^0e+|epI$6w>dobZ4zCilui{V_WJ{CqV;z<fmpYIwBFgFcGtpX`k%3UOga{udosbs<%Vd#KmwExO9pl>WgW zX^l9_P>U0Rv%DH=TrU}RI7ZS$ks#yYQrM`6K`}!T5F4s`bO=U+ z6J0^1pvXX97D?-w`eZI1wbBm*J%`>FX}d_X*g*e>Z47^;fOv#U$JYs*J(;LgGPKpk zHo-121CqFe=i@s0I5C3AU!E1jK;S&Mh8*A&5CnzMMGD7c-8r4iW~yW*dqPRcb~Iqd zt(Z_COqZEi+I?cOT1$RB<4T4FW^O!+i2=G`LBq}C-MDo%*A_^$32Ze4B}oPy5f8c? zyqt%`-10TufVDf=S`Jii;zjCxDT_KsX||K#`r=JuK8FZQgup9MP-^j4Up>euiYraW z@6Q3Xl4}*8jn_>Fl$K@3&^6kFAZY^!yN=4j7;_`FgyZ#S8U>>vnO;eEP@)2qWJzDg zi413_l}18od+Rzcv6C0h=wE30A8{qAIm1I7>l%beh)Vr5O0uf*-~| z6iWgLKyvQsG|%#g;W(*01j9&DM;jAm&1f@$z^an?@CYV~C=V4DEc51O-$ZTZy@vW!ipo>w+XI5AvN7>QgXrj{OPeSz?V)Gfio@L;*clzh z20zF9sEp3QgB;blNM2DF7OZgPnxITD?Yl50uwJ6X9X_#|t97UscuX?U=uVhtMcU8d zrbBQa6T;NENX6JGd?HXrdB0Hf^g{=jd<$P5=qAEK7FX+gupBvJoeit-+LD6P2b)hbqxLwWr%z}%_`ohJn%CE|% zGq&pMsf$ZP}-k~T`cSUVA$gD=Z6&LO{~_7>n5^a=Q9B~`ex z3HU%IqEHT*6QtNXcE$Ksh>Omh*|#sLy3^jjHM%9M|G?$kU3aVK zPnh*dxrQM&J)t0VMgJqF#|x(w*4Uqa>+Y*tYmD~_qp!Zvw~GkrJYey^nA)=F#G#4E zk*<9I49ogAbN}@H(*q%o7O6u`^fac+>yJDf7ZNRA4I2)&)f{^=B{BYT@X)k%&(2Lu zxH9%jeqScO?{fdRXt>(kzvubXx%u{=E-T~R$%#e&dri0KOZN&KAypM$D+Bd|uYG%c zKziqZ>%`-IOKr=>D9cr$|0^!hJGdftXLD>{a?-?~mw#>Q_OIUzmI>zVQ!fA7{!@Dg zQ~yv?JlZ&O#Ve;Q-^?3soN3DS|5});AKLcLwAOn}qO1S0&o9)$3;t+qX2Jn{G=g$A zjlIv_%I|l0P2^zRqTT*<$+T|h(E2-KOV;4}4-@343KKUCF7mcmhTq_~?Hk(?Ut<`} z;vV1U{KdbOerw3NZpfQndMsx|P0Otq==_=4zUEhZOXHno#_h~0rRUATl8?Hc8rwH- zTgTQze#@+A`+DZqp&`rj&L1cK$Q<})&lg?%Z$FLQoL01R=)>-=$mcpoe=KZSKT+~w z*H0rK&Y!q2lKj4N_1F+`>%z$LR}Z-F%=_qBDR&awb(M};K6Jh{*qzf7HWJp|a&q9u zbuFR8F=wjxFM1)jYczS!h7Zd7_J5i9^@PZDZ6BK@F6=oV3}*~G<%!l8KFw%(y5UMq zMYD59b@gSvFY0fGiRL@RW7}uGHn84qIx+Zo)76qw$LB^po$Oq_**I9_o@g3kUU(^? z#y%A3xKNU~Wn?6A+pGRt{;NqZbUxoc@{7Ob#JwlISAUxLh%9o9!K>apwujjE{YcQ& zn#VTJzg+K+jIZJQ7kv8ZOR0O`+c%QaUGw%p>7tg{;mn^}dhRZKIrseaMd#}?FXcWu zQ1^=I%*fbNSN9A>u3gcwUAT2`S*v%V6Up5Dh3)Fy3+2}zj7aXEdA-}L`xO73G1;6Ns~gU0>g*^^XB=nHdu?r(Qr zr}aM%hnc?o7o!4)`!@-~&2CA^XjwWCE3^O!0?VF1OkhJh^MTHolu!L79)Lh@v%kZ* z;>PdcK^?z`L!2oLLpVL0KWU(jot$hixxD)OEo^*e{v=v~y#^;mSAD)X=h02R-+uuz z5>Q7~BA|z=#P&&`!UJUaXTs7wlkfc2t10hQ^_MR_pR(;}-{};*?5MGQY=o@Uw|dX_{_0Dd>nv7tEK25#w8CPgAX3bhCufLNGt?`LTUwi9gb39~ znJO1-5s_AyuS5m$%kFPcisQkCz2zT)3meN}%0$~`3!sTKu|O&?Y~_B#vPHaX7O@*b zR^bqJv5u@tN0#gW&_XC-3zFL6AdVx4DlO(7vY`PM`ZEZoj1=cE0i6OJfn6xYF)~93 z(;f>z<>JGjm+B^#5ZCw;Te-)IHm^laHs)qC2$*qK0+Y1%tlwe#8XI9 zDDmJDCRXxdF-=^&i@+oZMJcQbCRlDAexMnj8bIktGj|di`nVYyeMle(kq}kk!MOnK zu_{<`Fq#PHI;&kqfsUfUV-iayTcP~>V?7{j7G=O7iEez3}sq>U( zi5`7BagfH#8Yz%nq>!`~SAFz$DnQ)?ny7Y`3T>pU8|2t#D!!+IE5=1|Rw$+)Q$mzi zD9_YV)Z~*O?+^6N5(4wkFwre3ft9+_x|DQH45fiY&{-G~z$TH@k|th?sG}n|O$;c( z-=y+!TFO(x@=N)-Nn~fZNR=M1eprUKFl^4E2Z;#OEMPhW{*DMZSS8I#kj(>H5cm~2 zXt<&QXdPsJYCLe4=Os<>f~5T-$QW`OE0QVeZs>sH@8We-xr~NB$d?HsgX>tP!i9+y zC{iZ$#(+%2j9M9kZb`BfiI&L<2kut9QoGfv$>XCbs5CNk2dMx|vNJ;8ex8LMxj^Bl zzFSgCyGcp;mZT{OEu|CTN(l5L>>?%Jkg;BkSvu?SD*(eGmHx{p&f%5QeK?1U1{Yy&r?7*o zF_#jGdVG*Gi^fA6I)&IlId}}ksdVu3x)$rL$xM3;%3Nc7YG5n4%b_P7VS$7wo3@>a z?Ht+FALNE09@BS1rhh*Of`|k!c7r3Z6@^L#hDIQdZQeEdvM55+Q^#Q#{~nnx;j9tOYwz z9-T+gq`V~SAY(?&lz1Iq1eiwQMYdLJkmQgpnygx7L|aHV>;Npc-e`voL7^^nntNW@yc)8GbPv z(IKYyJ^Kwvdw3*BK(1xMSP6yXe!LMkhS4!fe_5O8}?BCOPP6;;gMP>2%<@YZ>h zN;F+Z@f&5F)!0x;0^%n=?19Ru31mIh0j`l!GzCt2{dT^XgPS~J?LMu1_tlY`M4phaUA ziPI(eETsz}%d`T}Z-Qv37Yrzybgj=myui)iexm% z6!5#`=-v+zP7N&PGyygGe!G`qC7IU3^sl@uFMbrR=&PvW7g z6r%)_9LbPS2iMB!M^vV)N6g_2WgG0F*`XCT zO^sZ2PH9uuwvOwVXOgpOReoJPt(&a1{9|B9+%L4$Lq8q6@gVbaFZb`F5}OM`HY(j&^lR*P^sJ) zj#4{TlrFas@0JI)2PZU_DLXh2m?24?1-S6s2x%pN0x6AbkpHK zkR;sLxO*!}H7d!R1!+A>|;4d8x`}_7sVs<5)lsj`=M+WRv;*5SOdlBy>hGi^Oywlk6MC|rI zAGmp};%KC^-v2iF^5wA8hTTNv2zSF|Yh?zNO`it8VtGowAnlxU;9UPd)blo{Yp^0G zuUogZRe#_M2xbyMl?~51a zCw?)YLi>AYp6gc3tP}H}&vp0BocVcKOY>l`@lRiUe&*KB!MLoJpZ)d9V+Jrr9Qvlt zjTJ@Ru@ri1wGbP)BnY)ux06orCiY$81l0T8&$Fv zz4^J%gg;O2t?xSDA5$38nEUvT)yKp;!K&${JA25k3tK|&K7TxRY&Vgx>=ZTP_{wSO zKQvsl)L(crF4{>?>1-0;Xs$k2^JRYzS@ejbf9s4#R-`uGd0hWQ$VXe| zryrR0%X`C3!Kak5Tn-G!Q zw&s;%-}d)=P0Rj1IPycx#AIC`UcUa(qDRNcKOZVH;)cfvMq_fu3qr-$797wsgZ-hD@`-|RtBd&)${hy+8s5K6Z`hBPmZR;lRpVg z{L?ouxOs~+2qaFA3t`KOEW-n{TVCn=^`?m$zl8mOg^cIg?q!uN`r7H}70)V*>T)0Z zan%@g!}ORxKBmj-y6{Sv6CZ8e)b-apM}}XnJFx$!;K2_@w{dr|zjQU;eP>=``WU_^ z)4T2QzV-vA&+eX`b?Z;Z3;ZDFI@AAz*V*#ytK*};ES75ymz*1Z(+{}e>HSdIr?uGr zUD@x6-?{m!;)g51baWR`29p0jx+S0$dMDY3|LB(f2m3I&*(9wnse*!;!o6?UGJS7x z_h$-^tN*U;X9)i~UWvPEcys6^tuQ`U0Ett@rwe>P|Jbv19Cx?CKw)ljasR_zv~-|y zl2@1{2)<^4QZO~cl!KrflVgP^HBKFq8mH64nb0?P+Snh@P7GdN2H$kRSRlfqY zIu!V)Q*t3fHPo~Y_G_HnZ^q<)No4>GQp#Ea$Jw$L&_<0e_jQ4$YH8Obu>i{j91Iy{ z#@sIkUIRe!PPnOKJQ<4oVOmK{8;5Dc5-f2){e5)#*@@@V^=EOAIsKH6amo7W`XI1< z6I*fgNwf&NZ^_8iWAWG}X40|YBlOT}4C)By$_g-HA$FUPU^p6xn=s6Q)mcCZ#Sx2$ z&0xvM7AJ=kvrkKtSxjgqM1Mk4lZ!HRUjK3D3zAn2q}`$Hd_@j|RBoe-H&AW@EEFQA zNZ(5GB?`J%M57rslKB|ROUtJQ=wh!(5?WQqDVZcWM}Tl2KBkyRItL*fpG(sgIhrMc zx%i$xX@=!!hZKxyLJE@vZYRcMKnYui6)p%s0e#m?{YaPN_E9p(9lft5Xo#EMF#6EgvQ#q5ebP5h+mIc`_c@C~F;P z7*dm+zDXvNRo6nC@1(hSWuSsLPc37Y&#wAB2-Le*L) za$*;cO8on0Qs^8yT~o>5z){>P6?0MvtD&v3A5uhvBV?2nrsV{nB( zM5&8RnJ$CZLhX-9t2D743=*U9Ku}ZsgIVA@7qAE(^f-KSoM4qgHSrxO4shNu?aE>n zG#=)N<3_DPY~aEFhX%`9h!QS?;bN3#uBPy!n9NnDAf7T!a;ffRiLHz2V|k+V0X$0V zm1%9@QQFKkM*`_}EK7Akn=~a&vlus6IFK_T({qd!R!m>WR(f`Lk3iAThLGA_|C|?R-z?s)6BH4O<~EKcE8A_`Q&_2-*BJ^_!CJ^q zgQTq>J~Z1QVigvtnh%Oc_T&==u7EA!H)2yfm&A4m7#-eyeFr0}2_ZC~OF=!=;Oi(DoW7NQ0I2I?;bmhE8 zn3vo@r4jq!bF3C3a>Ve+3z0@%vtmt9hmqy@oX^5llbx(P*(gxz1LKyjV&E@XXD=+hVLr%73R}t4`_V~JtzO>j7 zCWyh()-fF>=H%*=#+-JD#A{~~$vshyKgElc5dXDen!cnr8I$e0ke#U=C+SD|MEM3^ z$XAThr!P?F2^jdMUC2Jh$Szr5V5xa~IJP=bd6cIz#2)O5%NUd$Xu%xBrjF!{QYRZL zUS|p2MWIe?Btox?c)ehKCc9HnmMB5ZSWpI}JVff+I;abEgwH4|`N0lBGo6-$RL?5i(NteW9` zw(sSn9Y8&7nQ^P4?=9a;yTc8C42)BsxKeH3h7JCO{PW4*dIASBq*HtQ_O0sLdp9Gt z>#0q0bLV1u;h|gVBS+`2`AdGTYjgH+I{$TdR&l}jnT&0ho_Xe8bA2x7KlJ*<&qLL_ zoqI=r{?2LZ3BKv|7yMEr4#YikfExKA=?CM=_ku@0nCYzU?-4%P((?L|V=K-kM4nQv zJTg}Ac2>Ul!tTzR?E}Jhx4H&hkC~{k-4@d;eM=XG$)=V4U(cEN-oNODQ;kRJ7M@KA zOr3dU@5p;eMX5hz_K;*>=2sKn4u-4@m!0VmcX>YkW_s}#!+T~}oUMMFc!~nBu)Q@^ z`KD+n^R1U&Zh5(H+sBD(zbbhC=K=ohqKUi5zPb9*oy9TEZw92E@BiNQ{>{55`rmtb z;_;WE@W1rl-n-9zQgdhI{iJQ@fe4sZzJ6NK55vW;9Iy?(IQ$O^luP13SNXkF{;s0F z{uf$CCbIW!KYFTaptAk{Q1v!oQ51Ur_wKlPZ{6Mhvokv^!-}vo%q{~iFT1WvX0bCn z3$whqupm-du!xGOA!tf3=VoUZU_cZhG%`y?EbLgOnc6v>1VqEsP@;~f(~FRql_z3B zL`8jmbl?Byxt{CN(F++|c9)so%lGsB{`b*^H7`Y0p1*}{kJw&0bL6X?2Y-6cEv){NeM`QWO%xjRnZ{-q@0oqHu6AABBN+7c|y`<{IMiI=!r=_%hX zFBre|@^=T%-Z3~hgyZ=PL z3)|Ir_pyOp8z+jtECo?L7G2B>j)b72h1W|0bT`fyeE&-Fg*I$h>R6+4!#wnYY}+)BNV#;SX*dPBFoCh?$)4Nbh=Ey!OM%iP3)oqQDM=25G8cFhavHjE>g> zPYozFECl{g2DJxIMTA}jAre3l5mQjaQ~|&A{J|+G0uBru0E&nJC}O+;pa_5|;4lS6 zz+v&{k-wDruLJnq02-uq4GG-j{PVC9_+u|%9Q^rS=+DEMXR2R-!<)aAHoe^I%@OI4UTRTEQHX#|n^VDFG7JbltS;Xm zt`YY_J0QAq>a5vfrhU;hE?ea12vcIEKU#up!Hr%rOpW~?$mA|K)S0upECwNz10-T< zvw)Mle`^hN6c_*zRoOI_Nx@>F({u760`7)QYdIlE5`buP3S6yVjy;pY5yI7_y{uwK{2Sh-#l{^o+vo=%*!^x{rlK@9nr)h@Cmrw~!?IIx$xX*@(ostBe; zl1WuGUXX9AcE;pkX%FP9taOu%natRLpmYoDZrRc*i6|#XPH87&>|hMY*)+)-!fGsX zzM;xPFN%e&Hm~IaAV=V;NJL;&<#h}~tM+VOLT{A~Y!Rtb!&sb%Y9@68!?lvClsyzy z^+1#sg?a%r;QM%O%4O-miv`$Rd~;TFw@ zgjSyLaEKiQ-nC4X)Whcrppi*rY81Sxh3fmai)!Ux>-7P|Xo3nb7OB#5ic_5^2%Qqj z7c!Rx(l4pNV@|b}k_C-fqjDM$jK^Y005Xv}fGAqQsa>A=?=Ma&7bFn1fj+xl6K|~J zr(>NMBPH>K_zW-tl!gdAV5oO65Rl4kGG+-}C&hE%I5-3U9fsUE%z0^%Z|7H&kj-XX z%5l^}qE3q^%$y!_ngwe~9Zsb5QcT!%7fzNjdss2m5Or9%XmrqcEd+zjVXD>cHiAhf zo5Bu<6pQHlL+G?<)ZWP|_|HcezKrgUr%4ZbmBC1|#)tJNjiO>Vn%2{|`D0aE2+*ii ztNF`}NNE=6fJP_d45afaa)zFiIRV_YvNg9*%&Vp>R-9~bZ~#6qZ{qOjs9J&#l1PJ;;4BYU_8l5q&wLT1g1u8h@8 zmq3FxhC3>@mXDVkg1_GLfRu)oH=95=mqP7vj|DdMO_I zOByytpbdl7l&ISI=&dr)E075OMgtPsL|$+q9v>Qpcxj)QN*M$I7bHP0;Z(CER+q+K;uSruI25bK zbcsH4pp|D?C*9mG>osYE96WX%r|qPESX8t{j3$>M*9n)1d~sL!LyIV% z!^yIEiY7zNyHE0+E*gw|*--EdGNVSH(H3Qw++`MhF74)n3?D~%dSXNHGBj5|(-KD) zFV&FH=uvzpuH!3US>V=6F7jaR36Rpw3%AODWix0 zU}pki<^4>`N}6(N1Fe$Ih$AstGlKoJ;p0n6&u93|tA5%`a^=|i{(S6F z`k+{jy;zh#qsor228@cd6j5#;MMFdeOb29UJE%=9J*2=KuM>Om&T28`w!p|$8~BN! zo-WRPMvmgC^-V{4hVL=B@_EB0US7lsd^p>L^AehxhnafN^esgNgZTnq%5_Lj_k{1P zW^!Qyw}na-T+D-#1VFU*Ik}L9jbg?bn&q7ioKF?uSErDrY+*;ale}Xdfrp@Knog#W z747D)+I?k{8}sSMd3HrTL@Mx0Q##&j{-0rYn`>-<=tcTo);<-@7j6Rs#8Sb?KvrJ{*zS z&K3{*2bJI!Nggf=_GI*V{(bTUad^?7aNF^5qd5BX6W>2IxNzWHFy89zo@l|}#CO~Z z3oj){y3@R^$At~niF0#Le(k%7qfgEDCC~%Z2&P~Bd};WAZS1O{l)Pgwct-yGRAtvF zPDkQnjOWxp-9v`Ehf-Iu8P{GM{hrwMA!O;b*=EFfHVu7ByuSWj`~OZOMQ(w%G_ z+xBHa-kq|KPJA?acSot~4&7GyP4L$1Cqi$LODmhd-eHd`@cp{<>y%qp(pIGPt+}7l zTgyZ%jn^mR51jqbd*9sos>Ftha=HM@r&utl&PT+UGS@6!!uG{pHzOy5( z`*-!y5dWY}$mJLEjh{u(JER{BNTrQ0yPe z9E#D8^~`@Fc#7a7e|sW*`A#wP(~Knh=2OrW7^YH{e?mQZ4ULb?%Y4)B20G!15lCtK z?akR`E5892A4~x4J?9U)zJgB$;Ng zdk?y{Pmv6NVHY@l&X~lq8zF_6ojNQ%Gj3SCsiZXNLnTDzdgWurB z1bU*kucb`dr!+y>nW@9z86c`Rl~g7jgLBqxVhXO0b}_@&b%PV{z)6kJJ4`_g>*~P= zcHSfdTY*WYA;I=t!|lAE8}i5g;iQPA2&+IN}!2^-~{bRlM@S zAk1@B0j!vVRX7_dcd>PF`L@VO*cPmoEo8Ftq&HW@hNzHH^;}Q7rg`HJv#}|@w3fn7TW|OSf4E9JzT6S zrowtrQ#0A(nvRm91u<(GvmfqmQ;sv;yuhe7XRuI(f=Kq0y{ARGp4HNjEzH$`i9N5V zxN7nU$`IOiqo{Sh2+lH?38`5P>K0LeB?2a^+D*9(4Bl9EsN}@ii$qh0E(s6IP_)$} ze-C#qqa>BVPVmt#oyLr#niy6iu<_JZ3e%BLQ!fU76w^2z1Rp^7C=LUkL0pB^LPr$U zjNz^wc1V-r4c&WaQrJq88IM8gJ%u{!)x>4c5tTp$g1ZMs@O$X=mQYGzA_%mhwF!)< z_Rv&TPoY?AgN;36z%-&Pn~FK8!PeWmFuXC}Zb#kO;a)tSVT?xV2m}vXCa$6IKRX4A z#U-c#agODjT9p$+fTP%)fe=yP?aHdsn&nQoC!;i3D8i5szPbt{0{H^1>STN|YSrWD zZY&E{O2CI;paiIq)lLT&P{*oaSY4uWGVHaL|0BVoOtPJKN{A4Ps&}K3Nvleu?Y>Sn zEV%j3Zt1W^z?4OFnvZKT2y!>$WYtuxB!Lg?W&#*Zs#H=_u(RrBlEB^NHK~WesvWe| zkG1GnrMW6%1;*3Z`+Prb7pv?ZFD}^})MDwM9Vk*Y;ev^tB<(6p*iG%= zSz%9iV35=lscM+7<;Q;|+Esgil16y2&Yev)>w0O5Ae~iEgJ-j|Fq$Hv+-5Rqc=o$! zP^76AsO!*ftB$&uS%m8HB@;KvgG@c zS_gRu{9H|wO2wu;KqS(T?l%~0Q-+xJERxnO z>yOAnyAoa_hytDqG2L4BeOVb)v^AOxB?5Q6^w{X5AnZC4bWUH-2O!)zl}2^ zLL4T`5f#KT38}-Tp*<9&7g&qI97xws@#^}+INd?6l@T|x9m3SJs(5FvT_uJOf!@v= zqo$>dGVB(PM#ns=S9vayq`yeONLnxlPyQ`2WhIh=*!1lpy0s;hGC@ckYbF&=O?*l- zF=Z@5Xw_2_1A;Bh!gafDUnjh0NCz&kT9QTp(O@IOx*?Re4Hwr z1Q{J90f-3gC1*wBbJ`89Sj{*RC{X+!{9-=oB zWK%6IQ!+=Jv;u%C4H^+HJrWlHxF4}<=>SneI@M7iJ;EfAxf#^P2hrW4h&dmKL!o6O zACy`A1GTxAY=4)9OkAI}jWJ5iG`AbjYqGWmg3iL^g@(}b$3>nNwhlQGK%=u#4{p{y z*)e5YIGPQzR?llnQ&w1~81RuV_{peCj$jSd5|XnQUzE*1Ey69Sx3Op&7SqD4P8)Z8 zKyxW}PM@#n2liAvQSRz*zC@SFPf}*jXWXeT-Wu51FUxtyH>cHFeQ#U!Hfi>fsNdu? zMe(O3aF?j=!~35xn44)9Gy9kt^@=2OQLDa$d#@pxy+tZf-FN~e4B9@TeqmX|KzK8` zhPs1-v#g~Rn_bb(UH#6oa3iykIAVN&25PKPSwvYyiR+G~b^Zp6CYE8#W1D)S(HOD` z$1}4NWg_aLNaj`_w)84y;bk-rmj9bYRns>0e)3SwH0QUxzw13bvWiUWC1!}WF8}LY zx@JMV|4GWI{>c+Rt}DB@gF1ia;E`a(E61c0uYdQ>WCQjRmOuqvo;QSp&0|Fg@5X*B z3^$Ff-ru-?^z~=n|}-@*mkv!)Y_g# zkFkBtw_lA8eWCC8%gdj$%zEUd-h=Js%Wt=h&fc~3{%4ek{paoP);9MI+--jD??B;Bd}99WP|kzY%!@zUGOO0rIQT2O zipdxnns~JO&FJ^)cCr0SUNm1EytT#l+SQ?nw;YX|NAlA)OIxDn{r2uVj?y`!l{s*PIio=6_G8spWSinZ(uMaJEEz1Z#8ZYru+X~)Ym-uV%+xwUwQ6ReZxm@pGz)y zV{BXSscqk(ku#4q-Cuk-VZ+Mw%HhA^zp{5m!@ZNYH@^O_oI7pDx)%3;D}LL&`HjVw zQd@VGe7&Pf`1vNCf|*|YmIEio?bJ2v7))6`j))uql)?paYC&7=k2(TO7YGC$EqFa zRSDd+`N8d<+{Y$P*k0|9>~4vFCzIdo(L@X6S=@xeEv+0fH7<a}}cEKk%%=`3Qg?)gSoNxYj*Iw8oG!>s2Y52dwqZ~Q1;i5SB z+Y5m5o&$*z_$==Kcz$!w-lkuExEMcYc*&T33TVcrfM(2p-d~E2D`no}#}qJ0f<9nA z^Z}>rp{J+3mF|xGzurpE!z24ca`gY{j_!f(sNxvtjy8hs=sM_*DzA_H7`_YE2zL)n ztsiDLB;UB!Ju%}{A2$ImuyFYK%P|3 z8Uw%T{w8 zg2Cj>P8+e~FnZU7)s#SBo5ZRuKiWhNaj7#!J1XNTgugrM3DOP1qWw{qVi7t39SB!K z=30beNuJq7kOB@Vy71W~H(h7` z42501;O};Zg)B#PSchb8rF00xi?l)L4@WEyHwjS>axr*GNQh(PLd~=YNkyfJU3E@O zQ|NYb+7N+dU^r^jii#X)qI7$OeI$|+uC3G7XS0gwfs?HwrlOq!G*HD-B>8Zm6d~Zd znYCa~C2@SBXrNGkH%L^9*bKz4N8~Ivg+Nk4V{1|yz_l_&qcZ?f!L&bu@VaSWwuxBn zI0^HvJ*>$A4v21q#sZi2&o5rh_FE|rI}|nzi?ek(5tmG%c^F8QS{5ph#%{K*(%J{Rq5cl=48c<* z)sw~P$Iv7}r-Ee+ZW7B> zvpgLoO}C<}$ttV|8mL&_LFp(P-65z%wnwLxFN<=oaJhWmj+sj8H621z7bvX@0aegy zibVxYwuS4#SQxN6X^iJ`#kF{k9-vw)G1S&1Z7teBSDhByBE;Y79$1Sooqe!BkQfPgr*vYfze;fb~GYr+C{ zhl7>$E#g!ka76A+QNpW*?To4!bMD`S*9(kLtxZ?nm$h|7s{*0U!o$vv1{1*Vk635& zTUjVjRr$1^j^UaqwAjfIsKkpJax;t5QLTKNsg2O# z5TIf3HB=26lcFX}jD|320$P<~0)7cRwQ96R7!&M96<*cK!a7RWjTScGrgJ~P5>`eH zu&m^eVzyJTg~6^;ogt%_84MQrV*9mrB9}G~SVKPJtgYSOuYPdp75Xrj zPm@uag;bhkY)>+>>Uh=_q}k16Bhl`=j5$uFjrI^`yLh^lnkCPAE3B1TJx0~+?v6Oc z)MDWr%r5r+)okDXNU;*y5n8jQZB~s!F&RpKTCZHaU8rv1*^CjKlb%AO2~$Z2pV^#~ zgVFCxu$Aei5}3u7PpO3z$;{H5gE`n{I)xt~%SnUJNP8ZRV*iN~-5eFobYl9vn$=}h zyxdEpGix%ksZD&ZNMi|laU{c)xRa*!&$AD8^ELT$3f`UZZr7O>NjQ{|%Y6TBMv!zZ zq@OWl^jlV2PQ!w3JZ^l|j4ywq4zpvVZn{QlG#$t9!5Um4y$W{-?y z4p&d4J?p)3bX)Lb&91z!lY;5igxE=RVsmO^>c}_7uP^fJpBzw<2BJP{$bZLs=uq=9 z`O-VNa%qR7KP)#lnVX%PK<84{@|5u*F2O%uJ~zQLL17WL8L6Rq!v`D2iIQ()a-SRf zWW%HDcKPqTLZ&u6llGXh>(TPl!7IMVoF7-zPqbr8g8t7>*zUBuyd5vi9|-f|Ug@R! zqmLeY`gZla6?F;n$c+Bv$dUH^()UK5n%7u+%hB?QC2n!#v2TQ5SB?zqJj&SF^(2Bn+2gE2QGy`^v)d;-H(2D0ev^)vbkFShK1&VbzH1K7xm>GHGjMA-i8lKzaRbLnO*7ko~}#yc;t(;mu@9*xShMLbjC>6fdtnrx@ARU z!u^Tz6MtWRzwAy#OlHh3?w^%+;$JV=yivUSx5IZgMITQ-Fn+#&*B29(zS75or<8PQ z&0D2+My}K)eELSlF#qy1le|zjk1v@ZSy`feP(ZFIq3N^gxE@kU<% z+l-028E-z7+&B?7zH970c6``-X!{*QO(}N&Rr2$X54vA&SikUPenG~mV1BE&V{reC zuj)5<*LG}4OSpDv$<9@4?Wb741`G~koFC*p=P5vk+qc*~Fv!o2JYXXM_62r$rabS{ zN5#24e^mPm2pHsd`MdrXMeu+zP>!BKypLQfr7=8Gj2BKOd2o3Va8}5dT;KRePK60TzobO&TSa|F`}Sh z^d_JJBX0vLQ1C09R|ypHfr9=?KDC%<=C`pyQ zVAu)P4vf2mBUQBgYCAaMi8^I!BOqqg2_axV3Pdn;2%$}{%Ha+HuhLY>Q~z2mXZI3+ zoF_Y)m3mHAgk~k4mn_pQ(_IvoOIm0M??o*CVHH@4d>yw;qgYS3LZhkT5-uMma&pN4 zm}$or8@l*fIs;q|@y&S+J~~A^lUJQ00PA5SU2RR=Jd9xB0j#D(G690jvY zl8mo*Vo`(KgGL`_(Rh%m{3=hj$Yk@nXZe~xar9cI$KwR=pfWliHxx;$aiWWt6M0pA zi@2Lu{n!%?!hwN`1 zPCdvk1XnnFU6Zs>#w0yN&qgr6V+yA14tYvSv0G(|2@np6;$C6!{+5YsW-GN*OM^1E z8Xh_0L^5Ef9>6qUFl1KIHEJsREsAW0+l!Xe@q~;lWKv0-2+;~js7PX$IX#6Eb{blR z*e~B&gXJxcEr~Q?VRU0*v?$^@Owy05vgFtm;9EB{Gzr@E48&fmISZ8_XX`j{CEBo zEju+3#^eMyC&`4<8qT9tU<55(#)$OkRN;_QOG7!DqM+&!EtXXWCX_r7009KbSyfiE z(uqa==TunobX9I0F2m~wzLZ;85Xd9pYQIy&Gt`VrUC%NS5+^vbg(wZwHX;JW9H_qx z5^v&!cAnubqb)I&zKp@QVu==trb8C!tJkv@wn&I^%zmsm0lm$M=~T9?U&_5_D9$8w z+IS|cEG8+3ndc#Unc^+PWwafS<%B?WfC_v?4j);GVxHrkks!D3ux58*pi?N33Wz9f^UJt~Qj@73Jo&*wM3xPk@G&~Wai|6MG`_5+%$fjRgt>cJ zzgYu30llEe3gWwPcxKY2I2@+^;jU}8>97^DvmVG{c@UJs4xe(8!eeI}Dp)jotMU4vVUde<8?+y&afO6+0pk>q)GA(=A>=}rQHbgU070EeyoCV! zU$u^Z0v03aBCgl2iV`^mj3xtUE(zScT8J8*WmFXs-~wN-3cwCPr)WbSvgB5)oP2L{ zidxjEDVF9@5QoStK{AObM4vdd76&u~BC(Yg!&?9Wo>oPxKX!Ckk@oCrbu_6{Z=;|Y z5SU(kGkM0>gQ{5BU4aeCS{;jN-N-4mOtMZ#uc3%_UXrq_FoO{`R)#hkKra|0Umj2! zQK^d%Ovv!d|HY>aipBT=cvmW1TcDS9qTMbooE}p$Rj&44uIfQkOI=mFLe-ZzJOV^1 zIMsLnnW5}fa4B5U*7sU=2#O*qs0Np|((jAfdd1fK&3v1{l&CffS$LagJ!7L`O+I1MQjW!6gsg@o;@>3bPF1SU^7XZ z&Znqi{Cw<4-D!LwfzfHApN!^>`BBxUC2-W|X*NC9sWy`ux{k$S$3Qy9DZf;urOt4Q;TKiKG)z#V61H)K*P^;u8dEq@@a()h+7eae6m^WCPC&KJA~X@B_t2~kb~%=SzSjlVuLW@f1yck_M(al@cv_LoH#;Uer zq0B10KG*TSbR>*zBXEvjsoiK6ztHSHr(D2UX``$uWIFNB|MAM73P}^%<`Rw5U@}10 z%FC57Ox>x(^jbtS60m|N4>+jS7s;VAz&m1x_zVvcHuHmA1*h6gn2_aK=N0K^Hpu}S zhIDe6o(5ahYrruSf~Qs|XZ243O9X&Sx}t`K#BL0bjTtb5Pzq&PaT2Ik>RlWj%QaWj5`P`I3K-iNVY9sL4{r+FH4tJUaRG< zH4#309J}YB?HdIP7qE45Qc7wA8{!k4ng}^Urdt@^|q6I+RyYqnO|76S=vm+b;tE=rdG(Jn8w**LKjuGDVv;?zbVW- z$Xvo&!6#*_(r)}2E$Po)Czaug9Fg3JTt2s$plhfS-h1}3$~Xw8G;a3SZ9;3qR$y^u z9(A;A$tPbWBk)a!L#5gVUN-0XHdCAFUQCW1pmV4r8razzCt}#B~Y=4P+oeCUgK8*6Q^ABS`qtqcg7914uM%#@i=Fh8% z3F6r&-X4A4n2vt(!@EDeT~SF*NNth##$$i%n?JVZ_^hNQV~_j4uQ@LL@Y2|plVBmg z;+{m6Cf!|0R94S^D$jVAcTQ|eipaUj-1VJ#RUgmnsvrG#Qe<#L)IXQp9(^(L@tfE0 zm8Nd6{>Y5T&9hc`Q?7nJ|3=)pgE6=4RA_s0%MBxz;2K>-RNlWCyKL86Bh80PSKXFs zl8+wy>)+;%e0gU$`zWI=IC^jA;zs*du@gt%^2zBsn3{&?yd z^Z3%Ub+_fEXRm#lBBYJ;g9Vw-b0ci;@U4-0Vsm;VJvs6CaPN(4PrWKN_Do>yvmQ;L z#)bVe_B5Uy-G6JBD_BBqo1}j{QTfy9@zqyKheu^BFd3Xz5PNgGfll5RT=&#L+ql;_ zZ(s6(BR{_RPS>t06FFPb!wNo|u(!mW?rRA4yqnzfH9r1a&(hK2;)P=c^Cok< z3SPLOEK0a`C$fIm-*0^O)WK`Fp8V~^E0ceHY1j2ThW1%|lN)c=H9fw+wyICM_b9u# z`TV}h)O(euhD&c=&+B{kZ-$9x?DKN(>icsKegZe<1kXoD?l|bk@9rCyHCFuhnu%qe^X|s-@zQrH-yQjBLFC7GjVF&aL>?G9 zd1ko$Uiy}TZIf?0-fWMnStFGS!IKB#PaRA<$~PB#Q?BHVFB>X|yjlHBBy-DHzw4tL zXP-Lp+nwa!cD;IU#WmE?0WL>%_}c@ zfBPE-k9&*nx1+0mXxud|+7$;)%0}^Z%e4pq)4{N@I}+x(omjVCz{R z8?Lh@=?Ni|f2F-43tAIG9)Hstl4tcUSiE@(f;jaeTX5ik$lqSDR{#Y8VGrd!U|u@4 z!1yTblZbxIaGiNI4(Nu@UxWr|DimUNS;@Kfd9`&F_AC69$?9J5@ra%A-(CD)dsP-z z67yZ)v5Jm0l=c0=G(UA_Dt`f15)q4grYu&c$cCPYjZ}rRVUUR@Pf_i`99YKcCzv01UA?w-Zl)v zhH&3H__3Qxm$><^eb-KSf9`4+e74MUZPke9f1FuMT@%LMVb^hNa=tuk@Yg-1?Boyo z@MFqaRLKF0RS@39V<98#4yY*bD$d4)C(YlY--B<{&VjZBELhi~+E6qU3SuFfac46g zAf=g*syQ4XXF5`+oQz`Q+98h1nmym<>Rbu49~w;F(_6019On!h%~0ubz*o0T#WC7NL>H7aSBY zy^l!ig1IzXw^WEiq#QDd>MysscNXcB6DNaT;GoYQ5q z$k9;CM^%-lX`;%+d|K7cM!iE=kf<-@K?Z5yG`eQ15O|6O66=e)c(wt5>R7k6KEKtIaj|YUN1`3Zern5pYnA z9h#~%w2M^*z^Ye8@;Y^uM#U&jM5q>!B_Mo)=NLoT&k%-Hb#mYbFX+@*Jccpvlj?eP z7`So@1dhNfJ2N-OtCr75YO|WswFnuYZ%ULJ)Kfezs7N4pK&aA^at-nxCMSYE0tFY+ zPA*Fdh!(Y~s}rvQIdh0sW!47zW2V>5!5p?2nIAK-=}aTqOl7c#xqe0y?!)Ua4Qkk) z5n>l+H*riYJEJIFa6fV+p+}m{r&0r;1GI|!EWZj!nc@`qx`htIL}s%(HNB_W>Oh`I!k0zriUcaPDvv* z3?==aM7)|EA~pOBnh&c|(;f%ooJ)!>1k7VZJc|_L@f6nray1eo_0V_~;`Gq1OnaD= zEgm8GIVD)M42c`lL#1%P=wRIH1VWuf*R*1sS-bObzd%zYs1IGVUSn2+!I+9i(Rc_W zFD6a-QZ{dwV1Jl)QzRT0Hg-RgCuU6SumU=e*lt1u z*<^<{T9YGTK0d^TZRJ8yU9Ez>MVWjdZcPUo(4et)1``t@ivg7Vr~}g>b2I`UHAQ7G zk_ud&A=k48M>5u1rSE1By}?ITB&(cGiM27 zv?dwsyb#*dl9Zx>tQ>eaxPVDQfF}{yHH9Hr0-AyFf@G@GWELlU$|5v)ehDgyG9eiv zcttQ_Kx-O35fO~mgl8Rk|5DWfIWIMeZpFz!_;Wg8-N&E#?DoHW5VM2;Jom|*( zQpn$7C0EWdvu(6nI)i0ORv&%74P7MpS=6GTa(5PY?PJ55sT7+%k#_oIx{o@9Ge6|` zzKDbYL-ZnlI+=yVSbF_bgn2Q?UgpvD^cc^xS>dSy7=U6K^dSYqDG?pNcNMbiEl+yD z)Bv^M6oMJp>Nj>a&R?GYn?(`+YI)C9?wA^@f?EHsdI!y(V24= zHL>DMH#(D?9c(COG3-(NAU~8cRx;oyb&RiA9vO9<%X1`4!P1mc%hip)z1$)d{AIA{ zV)oBT6GsnK#(XsJQ|@}K$?P>>eg5OBjKRz?b;h?T)~!mHP(xrzn9UZM_rVIo z$SYrb{>2Px`FQ*2qbJJa>2&-2pIn9;blHsa3;FNm>v`ipj+Mq;_ulDgO?dVmZ>)bK z|KN(}t--KTx{@DXy436Yz>QyQ3TCj$#p5dmN)yJiKS@}*Ztj@5Ia#<}Rr|?@rIml* zI1tip_U0W~are`AKJQDeyVLi?M}c7@Z)b*2jd_X-4EL@MtonE9np@}Y^{ospymauuGV`Zb69yjp_OYRY<>M=&B633M zkYG%D!iMps#mUKci!I(~e|81!SZUhrx2qE>?i?O@YFR;Ef9{a|sC)e8k^5`zUwSnm z?B%C!>wS@i@gjF}%J|aRkcZyV<`r%o9qMblF>x;;sB;eU+#mwEHXt3NFWxe;Af zxp92`#sbGk*DJ|0Kh6m*+fYz&dvJTQYs3La!w~mF=tg|R>@SG8myyxeGPcZJ@XWn| zFH4`h_04JTaO*P%t=IRB2=Oag?*I9}=AL5T&iNxP?kCVVoq{6z%U`Ad>G|&4r;J48 zZ#FPN1)}*IuEPFf%ggg`r2HXS>hgc;fHvY?=ne`F919;Ed2;^XaLA}XBX(k)5L02l z!42;HfPdLIh(A96IsbX`^YT|EZ!CP-7hOYBDRgDn>Y9v-b?0PgW_k{~ntT4jLtex6 z+5OoQSn8*~1QcunX0zwX(z34>z(ay4w~BvQM?ZbM;7G9AzIeRy*>(QA`{sfjY;^m) zeN*v>c3}u7eKy4`{MKEmG6u!i!EJU#@@ba2$cbjkS8|C z^Qse4C-v;GYf|rmjEC9muY;x8V?=pr(zYaT(zc3%juAG=TQb6iy$2_~X8>6pgw5>> z+ItR)lAD`7o`DbKsmfc2|O5BFr{G9NV^$V5yzS2 zhazQ|^3li|adTHe`(QSpXO>;kEtMFIlw z$015>!%*=;xH=Mc;9>)8Tf_QJ{Z|M-UDt#ec(e&)Er|1h+>|28gIJMbUQDsEq#K;) z!E(}1f}n)A3`w{qibUcKQR)k1lRXh*8LJKBJM}O-G_ij0`;YT`#Se&tCZz+j zjD7YdNd@BJT1M|??+E^f(2X3p;2vMxGq{= zgNUz~+-D`fM8`9y(Jrhrl#EY_LYMbI)gMP!+ms7QnrLNzjnOVG+Oc`P+9&6<`nKPLvZ$)^M9d)t< z(GIS)5mYA@!t@F_FBUdO;7*|&Ro9TgJl4Q#UEOlEJ*1%tVggX5JSK#g4g|_7Ll0dT zRcIrunpzgd&IGUGod4(k%hMTClYrr8kQN;^#B%=$rKSj-p$d(;NV>H;bzQTBp>iR( z;S>0OsdR&~&`daGT0`?3Dio-QA2^UaYG$!GwyNNX+ zB1M{-*=h%SnLuTO8uo)0Syt0f`m!;!1!uhc!XR1H}Z86wtiA@|s__9UV?*?cDx zPs||q7yFiK3a^ko;iS5dM5_^+4XLndoKU!-W_1Wmt3sZ`&9C4AHkkT~r&(W}hw^$E zUtuonf}BKB)pv!H_##r}e#k1R{Z@<{B)cgQzd&f~$n8d&v^j-lj-X++$g7iZsR!Ve zkbW)~z6B^-@j25(gD<6h9-6I6fi1ZCq6@<4<1sF#8S^w9)~A(_xRu3xN&6762`J=Z zkt>9gfv5&^I}QZcS{x(LFTg>BbqOa6oUu&<>2G_GE+jGNeQjW3;kUAVBXYtH?A5r;?Jpv^+zp7)q`= zOlc^%tN8s=nx9j2NS>_jgaH)w78Z+8PGJwtY;7mQFvI{$V52B+Wk@Cs(HvpTy0YblOX6YCw`>NPQt?d}Va;ap z)TfrSaa+ts@}zC?O!VL*=!`NOzmX{-Bf=sKZp_ET%})7v?nT8$#Wh#8@uu8%`gkIxUhn#q$WGF zvoIhCyP%?3Jcxx4MIe=x<<2m`fQtyC(xZZ?WEP25c6xwCOgdQxQBfyTOv^fz@*vlLj5cv0kHO~S$k2^7)q`w?i`-w z#0o}6^70njJ_y%cA&Hc*-}V>$^~%xfCstkAHMhVvwD_|dS1smCy0S;t+A= z+TsgOj?CR~fx9uvwi&;Adtg;=(2)ZLBac43q4@fyvY@1XkgMb8HqVK8F?IjB_>9_5 zUq4mx^!7n#R)O*Q$WhDdi(YOK#}0oxo;5!9*|>WoympQ$bU6Okpextv2+Q)p@Yqw% z!6GK*_}+WVS6nzWoa8LnbIF->Zjc?ctQsF2{^8r9ktfz~IF@c9boo8UoT*P=DgXUK z>R+U>7%X+|=!MIc4?leRV9WK~74aYV559UfwRrTo!V~2K{UdQrk2{A9{Eo7rdwI+7 z@Iwg&zl}AO1%^lFY>(M@88NmPZmhB=jnNS&UKp!qU3u%s8d1nCzqc1`r5J9f|ZRvuf^{W-h1&t$dyZ9 zv~4{U(bIcn-}ccfr!qzsd{O{wl%%cQ)2|#maq9ak=lgb4jXYCnF-@nyt*4=(#cwFw z@a%izUksYsZ)Ih_m1EpUy7ZKyT zD_fo!|LM@`=O4~3SU&R8w{7#T&$kp@`S8KvmBy11n@$wujb_DX4G;Ww?8NTjbhNGJ z((0hH}9A+?InyhPD157>kmxyFa@y4Wi}5YNv)cvc=0PR#ZFjoyL6zx&T2e9PonCro3}RQUSXy3cmiocUoC{Wbk) zRZG;9Yc3gV<<1tLUjM;);Lv$u-CI03RaK0XF9oJp zYcR@8;2AmEJA7CN&tl~Z2$v+s#ANl|Ss9Bo)L?}ESCSu$qJjk#6Sl={S86}T{WFAi zMBB`WKtL<#)t>{%fr-J9Zmxv!la#D|LUufg(i|DcZLYk?1FoE`%n`Zg?UcG5Hlp&&hEcMtNzg72RU~3mr@69| zEjvIls`!fh&|tGn-feHDWU_=(ZIp;4(iE=j5Cf^KtUr^T0GJ5r;5i&^`XT`e#$>tkKYmwDVe90i7tIMA z<=@NNVB%L%2}p2Sw1=LTRLmy2nxk?ho=D0U{&HuCX6l2c!J~9APN`7-G&#vUDH$zO z(!msT$4gDG>QIL2IaaF3P(Y^07uR^Vd757 ziXEMkj6w_-R%_qI5XQ^W68jl;SPCZ=vg?o-Hmr>F6&@pzEukqPC3GvEX$ocfq_b!b z-P@Ftzp#nay}~dhskj$QHVRrimQ?WLk!&aR3Yu=zFg+wfB z*EANi;Kq2|G=S#)@F(M)<`_z^q*wIf_pIbN_9d1gPa9Qi6u5lmu;L!973Tn}-Pc$Gc<{wd^`l zy6X-}QO+6wMQfcL0AiMm#-)}wpihT^2&ZZI^xYV#4 zX~qf$GJDB7Mk8C*EoK2U?s+^Lc7ZSE^}Cb|6RJ+Cffg$*1M=lybqF|{1|y=H36<0( zNS6fLGPp}9Rl~LnZN)U&v#cgTlmIzl7l0&c(XVEuf|`OfQdmGVjW7utA~TTlBUtMLK1^DHdQ69q(M1&CuvjS7gzu2 zQYWI|^2BTNCB(Okx2i9qk{qHeQEjFecpq>if?!3NB+&3SR?S2x&nx0H8Q-#CHIQqG zU=DFX5|Zac`kxfBbSiK;D1wI>e!B!kKZe$NuZx2el?c_q21&(Qvrv!OBJ@%#7$v+_9t`^n8U-VJD}3TARJ%e9_Pmu2 zr8E&la|)~XqQVM25Kg@fgw{fNpxGRBOZ7jlUJT4kqk!8_*M;hMy>gaUqud`TBZNM^ z8guu=lsYNhItfhJ4k1!65x%7)L7FJAP&)N#SUY?VI_U%&sh`oM*X6UbB$-GqLLIyj z1_pnu57bcXq7znWQe@eK&mXb-sTRhfloWu?$T8Ygn{(|z?W%KPthV1V$QvWvBx3v+ z#XYYh@wsF$$>vH4Xg`C1$MJIP`Ork3K#D3_@nuJV8bMneGFJo(5-_8EEtyd@;dZdE ze*ZPFl3PiDrYXQ*QvqvL1r!ui1H84XvkSV5ONKw8_yDvhm%wSTpE~4j2!UTRrU7$B z1z6wUC!-1gO(|Sz910glp=^U$NcD3W4m)MV#nk7#1qjLh`;UWY|NI5tx;8iBzi(Cn zSPr48pcN|=#LZ~H$^efFR>=y5Z6ba!#JCvQ385zV+Z#Vvg2S7r0M2U+^pdgdirhO}&HL)+=I{&wm ziB@$p?OUN2%WfO>KbieURsE-A|I=onv;3zS{HGcGry2a`3-+JS?LWuD|4d~5^HG2i z@&A4^@Xo6L^}GM}(^+pM@2<(ee(m>d`SZX2x^)JtXIOFnA*SNgZDZbC{{LY*ulR2I z&$m+gx08w0+{EEl;KloH8*?I$|G&+s(Mdu9rIE%zlz->+J8u=+zfP=9(p&bFapI$N zEBw>+Tc`ha@{c5MrhhBkI`_7bZzlPV^lwG}eD3XXq4@t|mM69tj1$LOueW~AA6xQ2 zE>IKw`{wah+>7trHZCAPA3o2^LQ)n zuOYXKYyE$d-HDb!{9$}*FAcd}bGND{a{I>tDvQ2dRK-Ms+CR3kWwFj%8UMEv%A4TL zv~Pu8EWK^i+cuo`Gd9=?`rp6XHXO@>+s3_ZOE=Gx{&%YXY~%mq-GZ*)KHb~A+e zZkO!M1pinO7nj^N>h0#CuKPxBm+I{{lTJVT-?xi;n@`&NGfQt9bE38Up~+laecPD- z7)SrdJmG9QY#aaY-)&oX(D&;99n)J0-nMx2c(2v z`1Jpe)qdadN&me3Z~xz}Tona}?-Jt2SYD7yJSa|?iqPR`%+x_8uq2bvxslB0lOzl` zoS`I!bddN9?@0o2FBMt`$`x!C#U;dhx6GFwko%iwpy&&PGPuzYNpab1LfMfH&c*=< zuvs`QALx1?R|dwE{8veyM1(w!vSJO2Yir2@M#a&IY#rt1aQrZTh&L*ClQn34Bc50i zP1z~7lPc|`a@}=&QXM`Go>Y0B$R{f4ANU3Vd|{bsRAR1J(!^cldG|_Try$EGEGl+a z0}_9j??h3;^aXW*0@lb5$ZkG=w3wP)LQ&n#z48G*1~&*cPJe2T3S&AfQH?uVrF%u0r_wNir|&F6bUV|a;mpOu<8Nj7}^?U7_n5-_`|%)|hR za_!{uI{@?*kE=_7{J_1C4vtAupviP2A|{i7_-i7`93C`BeXZ_Tt0iRb+=O{C0B z6J*6ErrO{UU0vwujLM%$(E7{;kMp{Q0G6xWD$DuCO3^LI`Rryap-CZ-22%PqDHizp z$z^k|okl28ja76o7bQoqhGEM{E?1hygy&20=R7ZTF%=rR?2byIRf=LZp}~e677V-R z*z?FR4dB&$q@tdsE7g_C`8aLMmy#I`OA_JrY&hgxM2F|^%eDch`!tO9XjR}Bx#|u# zk|$+@F_5K*X?of9=U^pTiGY`=S`gVvFiC-TrJ$vNFoyxVU6;!w5^CX%_qJ?d>G?5i zQ^{MadRGxK>_+_>Pc)g#eaq#XAs+$;jd@%(Ar!G#Y^L-Yvk^TOzx100Op};d_GtV9 z+#*G-dFVXXkr(>w*}w5W0Q?fA&+j_mj?Pcz$mZJS+1=9n*bDRm`V(VG9bY+uxs&_F zEYkdqoR1-B$DnA|SGdrFNB$=G4DnyZiGDrBbFKT|prIKxMos|Dsc zE;=(_Wg?X&lM-VK7XV@kBzCASC9AHWi&9B;|J+a^2ZNk~~2D z98!VA%Xz|ShH~;&40um#^%C&&JR~KAB!W!}Cyes23?v|oI=lv6V;T?aizJBmMB&sl zIW!M!izr3sP^0 zN{A(FhiNK@wt09( zH!(Yz&8U>m%s0?w9aJ@L2l)qnBkd6%s+V2`4Zcb{-Opt3k+nNT+Hjab@;Zanrgd_! zNN!CMGX+~SmWzui7+@vN*EAEzG)69IVnYN}zAN+enR|#jLPCViTu3jT!=es!7+&_14_>lm~8M0BYX(nsae6-82x^fkYeyGVeuhuq8hpQoPp+m%U`)}}HV#pYS+Sg^^`JAu3m#wNZb<&v;az%{%@k3;dje3TP#y%cwLONIZDSb2C`JI9E zZb~oH2syBA3b63z3c*Udh6z_f*9ByPRzpt<2g)EAu1R7u3-Z5eg%5|SoC=B!Mh}4OQaDp7h74TIykW zKD#iQHrev(kgys*HR;RJ3xt}V0d9erV=!|E`o4#&ZWRi19<7ZJzjArlQ&`tGcp`slt$_55N*;*QsTmN+78L=)RzmGo&_AHpMz%R z5DPWdZ*r7eNCq2Rgs3jpgr_iqql8PU;UZ#Fd``zILsVg`j%Gn_K8L**39m6ZJ{FPl zbhi{EN@5_{KX>L+a@h}|7}tzV( zMX~`@q};hgq8yY0CCXVE@ZI((5tGOo*FK~oIvx-Hm<&KH+<#dqDn}=9RwV;ae?~#^ z3O`IzlB}N+1MqgvG)x33Yzf0;C8;nefg-n`MNqHMb34I@!jye8KaF~6UgPIZsSZe; z+-DgEsncQhH;Clj39URC z4B8CIxCFMB1tT`e1n08^tu^s{6u|?fUy0J7L4%w#UTsJCFeEd^kmH~%La#s^z@yN| z5EY>%G8r_u8=d4|hh;~dX4GPd2H}D=h|5O_HL2uCl={d{YC`%5QnLv`tohE1v>Zms ztce$wN|s74hXThiCcYKbxH#3^eg=i=0R8tI#z%*uheL|uqdjNfmqtpoH z5|ld;A}tyZ1!C7h6#cv;mx!QX;ETXgqD?&<9__H8nFxU}t_~6=%|W@U=+gUy#F~)g zZn+49AxcH05`QWLu@V+_*sOJW+D3pQ8fk`#7kNs|W)bVmQo^b-DI=T)&WTr&Eayc1 z9L@M!=+i!^GlViqO5pVJbJTOWb|RNeV?{f}P6S1OnG!Eh3Vxczh?D|Pkigf#)!)f` zIz3Z`%_3h>kJ)fiP>TstE{7^k3x~n`7ST4;Ac;zYGLa$}{w^1*lu;K#72+~7R^xOb zlj8F`6~SsMjOVPitX0^W>JJy!mKzd5Yb1WQ`z0(00y31x(+O)o6Ko)I3CWU5uH@% z@E-=pQUV0$_+oNUkBY`z(^Q`hDyyncKO#iVB7CL`k<^lp%Ra?|qBT=%47H+MK;}np zh!u#jE;7s%)I3v+BrT>wA}UIXJhXxQw(;j(eS9n$Ay%Plo;Hu{+M>3V#c|(GYBL(Br%cDWu5ywIRffKY_cuR2 zcVX#UQ5z$ODaZrmnaNL44>6l@U7z1mc)ee)PqMO#)}9rL4KzUi>iyUD`1Fz);d6z4 z2j`4lQB=DgT_^QW4ld_WJv{}P-rs2&X54a6)ThjEWrm6_!JmH|J+ovhme95046pR7 zK>^gBf?4;3#6_!G2>bv$phH&FBGwF2AF3n*qB9n=E51A4<8Z#DUuge3^$3}$u?VrV zi499rho&U?uJB!P5uLyH&`*!+Mug5s20%`uAuumXH!|mGi*qD5>;ievI6^WDs!mi4 z?#>T-?KD6j-E%EEhv4x&C;Y;Vp3s0Vy>cEKPv2FJz z%n7oLuTJTGEqO}CeMIWo0Wmb_!Rxl(2y{+#<(2er+GbvgMXG-p_-S$0qT#2Rs;XzE zJUQotWqkdb)SsGCQt3XqXV1X4`Yk6LdLQX#3sWv9JwwbbjQ?@2G<+$>!an0{M6!Mw zokK;2S>7I*oqtL!!p>nI9De)0(SSP3(?j1Gb~KIZ#5ai4;{#vt0k-j<{%-q)Za}h* zUZ1kfvUGS~>ntP{eHuGQUOgO=IQ-nXSr5$5Y$@$V#&%7Ac%^0bh=Y5uETZ-8ea;6z zX$$*#{$R~tU$dXWo?wo?Up@7U)Jw~HS3mbzW|*{52wQFWd0-iH%75gw zU&fop{^}F={>TU4W=UhqN-Zmg`rlu@B}JN*Vp)GVW#hBCC-=nJij3X5zJxJ!Z`SLh zKdr0|zhdv&ac_U-(A$k0$jkNt%Y!3F_F0I1TiU8ekNnMY@SE^~tRv%Fhnf7BcaKlM z98~@NgQ=emca5BoetosSqV>bevxgfas#2u^`vZZt?YrBy4lK=#BZe2(#o4c$_7{ZQ zA0LQWiUyx}=0wP7T;cdvXBKVaP9~oE>X+}=c3wI6`+Z+*|Dfgdfq}st$h8MvuI|15 z7xVnT6fj+NVVMOVjA0$8W*7Pn6UO_=`=bjA$HauJ_lJ*esur$$e0=>rY_*VAbe_1y z&-J%9zIxDtT)1y|sJ^9e%$+{oIlO}3u0Ihy6!7APu5-U#I(zh!edBv?30h&1fi#rg`V@oVE-$is|{ipejuOcfv6K0^dFEX z{LkEy*zkGW^E5>K@MgpaAft=)>>k#8b`78de}+U9#2&i_z2bKb#a!&AHx8wTbC@L4gR=4=2ytDMx>xAp^O<6|!; zRUI4__uk~QniteNq11gj=eIV;b^09eS(%TvO}}pLA4jgab57m74a73`1Ap#@*9(tc z1Jp(*pf;GQIN-9Xij>+Mptk3|4J7wo*m3|M)L~*J?N`pe@&8=h-L}APjmb=pzqPs;*|Ev8w1q zuL5@s&FseW1RCgfjeMSv%#7vu`)BZJJhKrZz!aJADR$yq7r{j8tW+oV7`UWW2%uiv z?0Jm<5?*z=^q5mF(&w`<+%7*Z*IMrYsaYh{uL)m~>#**{U|wSnS%hWh_?c^J%ykF` zDtpPyH>`&Mz$@$1;}mnk+tF;ne~iS^c3V}Us-RFIc1E%)l3_xe;AcCzqy|q*Z>jok zkoIN}Q7EQrWDYkY>i9CH7NaQk5K@o%*9kbQkBUJA#S%x-6mQyCIM%V-8Xaw=a|~fj z+I&h8GDxug?@~(I9+hX5*_q~SpbPbn_+`sIYq511NSEOvvP$kOn2{XiXs!Hm{hv__}a%PHbW-RG(KqHzH=0L z71RCD=+pKz7+H{oS3g`gXq z73=kK9as4!Df)nDUlocIxUDJ2r$!9zL>`K5-E&}Oufz_R?NtqlYbCC=nV}^Qb$p=d zW$R>4>mdcssPTYVfJ$Q&kMVM*jZqk7bTXrWr6bug9?vf#NmV zUJ^FpkE``6pcrSA5{|**dlSk~Od6-qt1Ycb2NE1aot(hi;c0Mb7yzXPix?O&`vJfr%H(48iShhko8mz^0OB@ zL~Y7QKz5DsIwC$pj(;ns2<6C!7-JW+%cIwI9TYa{t>{_oh-hbV2bLJ_p!j2?HvCSy zrEuPZE+!VSDp8-@8o+%Z9e%cT*j)^n3rUfT^X1(;~DI$2OyN3V~3#7@5(KRt<%M%o@f- z0+>R92<9j{81rDR9!eR^qiQ=e5!exPl5#ih@*q~4k${F4e+)>2nA}8NqDE>`SQ8r& zI?*ZE!;v!#qeS!?BX_n#?J%fF2QHXZrzwG~!B#F8-(+!>RgIdWXS$RjR1KNB;m_WU zQvW;*jc4*P)YZk?9fHf)$+Iu0QTC0_q<+~<(GuMx6P0~pokW3*J+cRux|=Fb(_Ls~ z1M3GuAcjUcPxcd55sVLjs9lZn&iYdFlh?K!aeS`FY7u{qKw6PIITQn!J)VJ-D&5Qh zSm5O$cqCK7M7`vuc(sV8t*t~Bays?GvqE&V9aCl7m$d@^-H+U52ms&%QQJ%Zg?Zos*EQ3>QfPe_eQw1d|c)jJZ@+NCEgOgLS2uUF;WXg(R>QDfWq010| zwTT@FmqL)HMlRd~m6JNk~e@8M-Znut5g=!M&X@$L;$fVE+0huo@RZ3JowcJVOKnEc*eAol9 zkxPWH!}%^THhfGvsMX-W`;2Sz5iR{Cs>V`ytew$m=Cj#6V<6V~F@>d$hRwNLUc3Kd z#Gv+ZBD60a&K_t`QRTQqOrh~L(R#a+WYEwC0`pP%ipD(rO*x9jE7jztqAkAYU0XGq z0hBL-Q~uIICSD_nejQRkeJ?`5%8yrMxKOSEk8jOrBnTmRkQ6@^Su2BraJAZna0FjR zYjF+k-z5Q>Md3`q0G+@}G|EbXXvLM<8eV&z2KqJNH(?do849xokS9xF&8Nj#6jzC9 zCO0ECvbfxiY!;?bfD(_c_c%NU!d>0LR=F_2_bbqzCoI^lRg>t40A!sj8y(HX1T1U&1%$P219e z7JEMnd#oY(#4JBu&ofAl__8^?V^_$ao{XqZXppig6FoTZLU1vk&jsRwuMtTC2w*H; ziIbDmsAugXhCyI#^ z)LW2xF^d7zWU+5B4ZN*cncp#Kw?nw+OU)L!&8_b>`H4$ z!PJohUoKv_eYpJH4ewsNKl;Mx(80hRhfn@}JeGR0!$OZO{##q&u-+E8^6~Pgjh6$B zFYj-AW~hAnjh}b?l<|P&rO{VP+IEjv=8V5_skzD0^qsl;C!j!n=bN!Ft{2u14S?ES zPwk+o`NHMF7Rs{b`V++uA8C2D^{e;UVJ`3cB~cNp=FQ6L7+i?N?H)#_#MSPa)$;No zba>Ug)TF;P6{17)ZQE-~FFo;43cqy;UL88VulUsR(ZDUEa@OlWZ`F2S>|o@D$icrR zw)GD`*BbtGXHU^U);C$i<+m4ER`(g4pC}#!d6c;7R~=5rvFfH)=0#s?`*Bc zdTV~Ky^+_{_UORZ32}Yb9uV8+_Q#FxIg@(qa{9&#mxn%nX=<&7c&c;!ld22GzTB^T zpPuzN{axp`ahC)3e*fTw-$!5Gn^k(P-eB23y5qGIBPSmMC6V!}F?8EhVFM5rzy3kR z1;>#6#yekBnNM`|?Yn9&D_Aq!yYxcWx76Wp&za99k7r2BkA}49hgKJSn!f!lOWnZA z+#qt4e*uV&_r1S*x~U%q>h#{Lmy9bHV=r<6%nov7RZGiZhp*Hy%CqSoHD4y*+`6yK3@(=tuOw#?FKlGtgy)Grs$)s2#trGpt+L+5FD2 zs;0fRz@uT#6i-MuI&WS|j%v#qFpwyBRb=d;YiMc z42N@Z$hJodkm1VQ)Wer#GBx%~8rD8RhX#+MzK1|-ybkEJ>bzRxrDM5p*R}9YOAV-j z#6`XGD=cK>(ekW~UeytK=Nhl&&GL@CF)wN6o*`oh1E}+ z{}uhwjdbcdP&Kbh-$;)a40ueb^nfSgL%nY=+}SziCE>bENtT8iuv}{J%9InZX7aiA z*(2?sTS|LE)uBp%B`|7X8fi1`)f}lYd3pVr&>03&Fe`z=H=`NI9%X>#Aj)_?ilpu5 zSzuYZ!&eGqKythtmk<6xN13wAvjy6AmL-m&A)vUi66F0zrdO;1+EO8kq})stPP282 zcVN?23q({=hln5%Q8T37DTN~fdZ*-m0uyW!-^`f0ZR|SY?hrATF@k2ZFC&zo$QC&? zTxpfnmX|dft7;H}Ksh4Xu0+EfBBigvSsK}l&%gx+=@9k(%nM|;qf|{Z_R0=Ko5Kp( z<+?-EU8f1PZ*H16g|s#jTnM6(bR5Crwnl?s)%f?Wm{&ymm)53&v<1EY&IM?5HY?^D z`|M{;9SoPBSB4(|BZ;bt^~c9xzjza4muni$ROJB<53S?cn^>mgRc@=;mD!BOmc??S z47NmCjN%RJSY@{SIw1;)&-0?dTEwyUKGZ%zX;_H@p>LHItz%){p_YL5w1F1N3CU!0 zO0xupur^Uq6$H|ee36r}T}ZDOElP+%!x&gzh3BCJyCy^}gsRKW;9)TN`<(6{oO9go zAYI2j!nlRb*_rKVlBf~O*l~BM?P~b`PqwQlEJZIW$Pl7ORGQSr_r)kdVRdPC4MV ztEu}jYN0b{DpTEq7BVq~?>5+WFT}UZz-xBn1NEWL#ztUFXfFkO=I7*o5=p+xxE{%1 zeTkX1Q_CCt9Q(1-9{d3107)3#AdN-%@hvjx=u0S@p24@UCwUK7a=?I(;e4tw>X;vz z+Zo2}XOv7sp~Ml4QBxQizmny3F+NRvX)(~kI%DZ7DKwX`DVHnVg^l%k1>>)@0|PCt z+Q?{=JD^eLp(YQnt<6uNnbI@1oK+<;xP_vzb=cUG-%Z1}mf1Z?dL%l)FMqdo4;sNx z_HI^L9*}dw=0lA%sdlOkd9seLkEhCvNxDoO9=`#vw zdgi}&bx&i5c!g|!8 zP*|hFt-U2m1(0@Wf%Ss2=HtmKMFT93lsFNp`K}2CAB`x6+Jt~HNUus{M70YvyLkZ8 zQuP$hT*D@}LrqYytilPEkw8Ib0#;8Mq;?FE1I)CYL-Pq7H{J!4dHNzlEih4_O@#Ym zZz6s^F-9E<%tjWXW{uVp?WbDSLE|K0Uk2l!CW1TFpcZX)Onfa5Qr3RwsVFe)b|qte zgeNJ!yNf#Xsy!E$MQf-^@XY9xlMa;0yJSDmjFj;-HSac!oc_EMC(_6~z2G3M3;i-myIJlF98-gkU&$Ed z6!FJI)EO?#ff+beMFk-OQx06&!N4J=vT0VJtrBQDG6of*oeU&ZL67rMjF}zLbli3Bg~ZFG81;F<>vN_=1%*Q9%T* zGAB|^(L}gFvc?WN6t)+x%_cBtf2OEtt18B-QXp0{#vJDPSVo#EX#4O?aV9Ja$QsU; zBl$UUD{2UBAM8S{L&YRkxI59Wh*N>=iQr%|Imtz<;@?JTwV4*iUjH#oeA9=~_#jRK zp$U)6ff_t43O0Y?G>s8B5-q%1C`jE5;Yd=1Ie1eIr)M-0>~K^vVgrr(A*3VU$}K|E zaLV36VA@vk4%nwbMQUoa|GkMwvNBl7<95(a1=}}^O2HbJMnSZD(ojioDNAVBOR}n6 z;Gi>&uLFK%t4h@8HwG*BXgW=J9!WK9CIyQh3y}7mm{C-*R5txNr=~uq1WH8+_B$GUPCW;%PJwS*SdPf)?fo9Q;#^nvh zWM_qBc6f@X3Z;*;J{?4$C~KS0he?~pSJvH~h;FM3fPQRWr~eC!|Cth+f$Zi=M9h=Y z{n+v*Wac1)Mi5Eoo9cyWb$R}Xgl)X@C4e7W@EFftsl!|(7j^aU14;W{+g;^G4N{`` zE3!Uz6{4_v&@fY3Gb5re@~_Z4n70gLh*%{NpObxLKiBp4-yzvg$oZ7LKf1N)j9g1v zeo=2i!|m^I>EQC9*L|LKwqb+oEnf_kejRc3*y_hKa)B6<#Ycax`w98^y}^&r z3y~vJ*984|1r;BbGpZN9UXwa?^qs>&&Ow^)UNUyrXz}@C|FvJA7=Qho?h@Z!T|Iho z{)P81WiH#X_X@e^qpylCE&Zg0TR%AbT8G8n6Ogz4MC0XcA+Kkgh#&v!Lj~@$RQJAj z_nqk){wR!k&TvW^xp(b`w+7}z^$Cy4OVNstj`M9Jmlw1wu53I0OKu;xu5-X61$}uX zJnQ71XF?W>Ri!7}{?<6YZ{SElOVIVjf7?-YY3!+j53ePiICb>;sm$?Tugt71U@mv2 zo~pW*ezFA_%=+ToC40)rx2{W%RHr_2sdN2>N5Fgb*FZXF5I3)T|e0LFjJ6Ih%W3ogOK1xbIcGd;EK+OfL0!RKB$IBU>o{PI)7c;l6~BC{?J z|8m_j@WGbiEJVHul2)$nhQ3sxX^>@$9YaUIYY8{J%2y(@&=SN`FE1A5Z6k z_A7sXCCujgk#`M4N;A(nu0>B*&AAzmqa3kxbBj5HLZ_gZSrPMNfuH!GZlK$s9~^jPMlsU`+KtKU(6cO%d99pl zFnws~dE(v$$A=AGp+$qkdw95FB#_y-4lFmIsh(ajbQEa02EQ`+cBWn^WPSs&MYjcX z7OS2+Y8mjVsn^_+RIj=2&e`DAE-6d*ilYx4HD#F#k6wT45B8oc5LZ0rRao@OETWe` zZP);2qNpsdS_<42J8lLuQP%lF&*cLkvl#RX5KP8_I^({1UW1Pf3_h`7@cE?S@1F4- zHL4YXi7N&rf$G3(%28NFucUg80PGOw@>xNvxyax^z@?O2qL)^nT2PfJLrROdd^TPa zuhDsh*ad?c(i)DF;jV3fvS*R)}O}HYB~nN9_b{Kbrr9HpU2H61@4L=6-H2ZRYcG zchd1MMVIxl(LBG&tdHiZ*oz{M3!?J^HYp5u=jI{2IXXEQ)o+T@vuU+#2&J0F0c}KS zC%ahyx-{i!S`_NU5&`)$qlj0b6uT7{sZ23YB2cQ*FB;qCpf+g^YS0AC}W#- z?v;Go_Edyt!Ht*Y6sP%URHs&ysKFmKO$=5^vV&**^(qEU`mdUYeB;5vX7CcCR5m$pj9e^Dtw7+NGidYl@b!KR5Tk={>*At0)L7_O49O={_&F2VR3w96-EXSJcb_NZ19)%a+$s5t z-pTXUO!Mrz$~>Ag@x27*5HUCCA@0hw+k_aALM6XWfeP*rcJiOk1)d+iK1{adGQw28 zg!w@t@dX)lrIPR|lyZ@Fo-AVyiQsJNZAp1(R@U7PVwutp`RgLd&sS~h1}Vd{Odh_n z*rfKM>UOw`(cSni%3(-B2>(A#)0>cDM?SYb7p-C9OKZfG^wPX2=_Q#rcAH|8jgk$m z!I>9v`wJAJ9cKKqmsg>}o9JP@VDyv@p_2Ji*VrZLtH zhOX0u2ITr?ELW0N5z7=qKoXwfrRTv(P?sna5y>*Rx8BDJyHRybm|KwojRvtAdvQt@ zhz=b-SE}(Lkl?$Rsp$l+RU!Ea%~UYc7s`|Gis;~lY6btZq!WP`EIuDmpg_b+sN?+) zu}Vb+v_Kce6ND-c`%EULV8RylL5#2K+{~lRir{saN)&}kTqA*PK;c#j?V-DRL=F)# zCQ}qL_4T-oQ5lFDEJ29RRMLkkX_Kg5kYS7kV*`^0ydP9Rx~Dsfn`Z5xN+fqA)5u(+-YqlJyLOsv&djqDdGCKVn4_d6aS3nzVN) zh`F6WA%BnXIaVi?BQZLbQF8jIK>H_L8pQ-Wl-<~0lZMZ6?rFqA2-qIm7NO3960Bk;hA>Q`(iKxNtx|z& z&ttq=o5|w~#ENft3hLJlCjMk4IPl}_0^B9$$ykJ3uhj_F3_c6HLjtTtIi(PiR3VI7 z>a5k{hlx%G*6P+m@3IdmrKKpmQYpH)9C;H1)A75k{;|Ep6u{5WrPPLeZ9nv zt`}l4>sq$(sr0My=}RADgrB)gaYjbCshj)`?M|u>FtSto$YP1jrNYh{qU-cElCDd5 z{{`Q2#^gbP?l?IX&-#9H0*r#ksO`I@?UJr2F_+pKRZ8*kw(o7mOt)@{zxD&Vc**+Z z(`~O&x+un%m?~|=Mw#FTayk1pd|1qo>?aQlL@kVS5BOk9quA|8h&0$)AEYb9d}d;D ziuiojM_(2$DmE9|)iCyK!kkUnw05wz$hu@#sZS0%!`V<%rCZX8g*#ZPD#*`aSTeAX z>gb(MokV<|@|o+uvb!QjAlw5}bW@XFL%0Mcux@LYG@t79mCBE&$O|Iv-|{t`0ZlTw zQ3$v{ENbEVWy5oE+pA0gQm7l&A?8BR_v9BIz1LXN`bp_hkPCR;@Nm2(j5~uC+pa7L z3dBF%^KOQ93UvQ4jZr!l2b>@IA-FX{udDXJ&O52SS?~Oi8 zjXycy=QB=RVqZLUeXJ&;VCs#yPsN45=3M@0W!v)cch(ksv}#`f*CGrjHl$7&eD|S^ zf7{SGSOgZX0@HOH(YAQ)?jhN8O4ty&sNofH!WeRDy*zdmWE0<+-_O5_ z&96AIXSDUbxaETvetew^khfl6F>+z`2whn18GB>q-q$VE=#-6de;K+u+v5JRad^!e zD-ZW}XAC^>%?@Pjt%uuYj~7za=o8Gz>(_pGq9tr-_K)*7w3y#whj6)N_2|gc7q%~0 zn>)B5DJW`mq2J!7wx-@^hwY}UZG%%o+V)&|o3t!1bPOfd6!>4;__wUXH#S6^TGYGs z#-0lW7p|TUEhrla%S)XxkdDMPU9bA+v)u)uProyoC~rH<9PT{$^ws{AF`3-(OW#AVggW}$vh&iFsmsS_ z-k42fZR>qtEcKk_oe%d6-FWoEqc;|HfP_1J;?eQv)~@|qPEpF01V>QA<4cP8!TBjK zC!Ja}wCrTsV zc&{(MJoWRn^&ecAIljF<8T?l*nPbs$H-6jkfB1U$uqMuZZ8%BOUTIg?-pphYh8PGl z8DIhdBt}K5!VD7_5X1yjY7Y>^7F#WXw56vdGZ}D#90a39YfC{q)LN<3x@_wzCPs@@ zOQC3K>na7QOM4K3fDuvNhwlA;*Z0?}SLPBjPY@C&&;7ekLzDXlzY>+V1-1a|cf~e>D2rubrNmWr9w)e=Ph(aib6|T=QS3X>Wb-Wr=RrSai|b-hU_0 zoamex>v(D8)&us(h?=UYL(|0v9xTT4L8Ifr^qzA44QYO z0n&XFrz`*^EJwJAC0~taVpWG2|-Ra&jkGylCevprObtP^01>0*xqH00)W1spZ*Ig1pm)BuPP3u{@v%<^bsf zuuhGl<}Vb);U{4l<7NR8%2SchY{FUt6%!x80rW=>apjnhuiLy08@ZRAJByGj0me9 zSApo>LZM;^f@J!$R19xf>kid-Az^WVAYfIBUpT~Jjswxq_&L9#^3V(#5`yAsCh$9p+J^2eAq}tEOlrH<6R^q}* z*xRL}do)EU(L5@y?Ts&Bw+R{JG|4>IC4jN}91j&u!FB18O*#Ad%vL_XXs_CAKXS}~ zAa1cJ?NKs{t&-6hW4^E6$1n~fSdO(k#Ko8-7{AzrLZ<~K4>9Lyo)*tDHp+W|g2G)d^`4%=tT#tyy1y3szfffrUL??7$Dz|Z`kTJvnBSI_Dq@i!?_vMSk zX<7)73psX)QXV7?l0p<*W#vK($W;o=h$I7~!Ww0GlAJbnkwg+i<1J`}09t<(5;dL!b28w^UKX$xT#_b{KQvSC3I>nJG=ZSkS;ZE#Dx| zy&Q*PzBsxTianDtT8)HI+x1!KWxBV>8-yF_M)*6wpfUD1q`(KX^*}TfrHSG)q}#aV z{4%)ECSo>b3AKX$z^=96?(ixa@{)uHRTaUZV*uI(Q-q_-CJ1vjtiUS;g=GFvMjXbm zOazqvx0EJPEn5y}AvQ9d1&T-24d$ecqFERFF&xjWciY})LGY^9|FY}bc(Yc;Giy2O zlgpL3$^{?pNj4i7xxuc3swJYSZCIM60ojTKYw}an4cH|(0O(h-vb0{Z(GqYGTRbS( zglFJI1|%0-x>bnqC^02&g0Gf?Fj-@R!QzyCWDlukc(wR&9Z~O1d{N}*(vVj0>5)yK z%09r8srR=q`N;e9*<&m`gyslzg*;g(Oy(pRRz6!A`fxCt+{+XFh}jql0Xs_x(4X-_ zgTU+MK&C}j_%nD3F9dTBwn%VnuiPOAzA!zhmsjEP6bdMYXi1Qj1)uwv2OcuAi~$xi znGHiRM&hcf674)BCW#DyNl1l);F&iU#fkX05Q3N4t6UTt#ukw9{OePo39R-C zYAGEI9+Hz9yEq~w2Pt#(+abCDtpl^33s3-XIR(hpJ%(}bJBkaac~mI&2qMsk>akEc zMKIZ@i-X)XW`Y915()S;hl2|&w*{(2NOCg$gp}7khn>WzA&CBj8)Z3f(j%g(pI~W9 z0fmwZ09Svcp9s0lyU&AQ;baeGCnU2>5KSO#j5^*0G1CE*r9<&e@Y zM6H~SM-G7dc|{nhpspYF_?s>LJLViXDdM5F0IPc2bl;SQQhc5w@TVdt=ZrYHOl6@0D#`M5Jz2POyBn)Xv zGl(AaGtJ!$WKM(5UanlE49>323wEl1c9w`PIJGF1-Bt4ap)ku?%-Ik1G3*{*wB(2p zTn$Qo^4{N7c4RdXN2h=iA(N$A#sh&VqH3VjX;uTPS7U|9TzWaypo2<4|8C3G%P3T6 zt6B*`ml*9ZE^P^I3#wjQ6tOPl6($9FgxJnUr$?AAeV`@4qDAm>zKC3rUR<>JGI1Ja zBXG#rzpT%MYOJ^eDW$JC*jH27oSc-W+4?f;Zj~*C(3WwaHu@D|m}E+;%y6px&DYpm z<<`Qj3_pNa?UwK3uCBVG?jvrR5IDIIt(u2bBR13b-dbc`TTrqU^6uPI7ZR!W!I32e zTd`;X+u}|xUH<*ElL>27;|#y3&)4_#gTaGYbyG(VY)SW5Rc)D`+*s$hs(f%j-~`mUHu_XYUY)=0&zW~7=KM5s%I~;V|J!7AZKrp%Yf*jF*eA&PyO*!(-nuKs&veX; z80*!g&-bf*_3hgZWNjU9FK_o;{h%!4Gsk%B*^M>ru2Jt>&qw8TDYkqtaR#m*o{7IP z(s{>d9NE?89r@@!vS0*Mq1@`GZ|r|rJGSR=H$8>FvTxPstHXI6cji#R*xRmmGgkTz z9vt}j!LJ8EIigTkTs|EeyR4=*qy6)#wP6G5u^>i=-p$pu>!!}v&U`)-G^hD9{{=_l zo(F~vf9|Q@IdOk+R{A&s$G$fG_MUC;cAuF1;-dl2kow1p3(Z!M4YO};VjQu4cL^&r)G((=c^*AI^F-*Ri}Kvi*(zw-Gk+w_^V z&f`;m9^R5YS;XiN|Mzp+<7W1MJ#g`Xf9cGp_r)`viy!)2RfZoZyCQtiYfow z1G*pX_r}khnEK;CiH(yR+10Ksg=71E>puKo;~(AE$Nv3w?bjhUUY(qIZQ|{-GxzV= z-zzQ}ZQP|h**`JieX0HMgAF%F&Wx?k018JhTYTfU=kMn{Xn%3s`*m!~53To3g?|a_ ze<;1W#TSzhyWf|bzBp%hx6ju$40=O{4ivvIB~%r&{+JB|P36n({W_>inKXuFANSsW zYR#6Y2jZoH-|jv8ROjw#?tJ3cQyX6zsF`?2*L?2Y0dui^v~lZ}-S->*-F|26R{Iw9 zq!APk4s7sUx6icBEc&DV_o)l%?T1bUP2W7$`RBy7DvuBR}4rx{!>o)g*{z~1E9Y`~f&gpI~g25yH^Q(*T2^T@T z{kg4N^o?shX7hh8`sRRM6)X|M#%={DVMhTM=*&iGQu>hQXRXcvd|3zkQUm0=n5XJ+o`vvxh;j=BsVx zc|Zy`F09@*%L@T1+y>x=dU4hWG^@Hx08+RcptZ#_Tiw!C54!EY)PAm>W=;giDnJ`0 zCQ>oNZF`M2rzlAVOtoAc>;>C0RM095*MyO@Vw3$hs83WlWxE}-kcg8-8xeI4d>#0I zC7WiOUBvC=c7u43tFu*tEd?{{9O7bD%{#+gp<~?6qz^pmT)5nN59 zX+2cLvTdh{Di{=3dq|CkN@6|{3Wd2$75*rFppmrnrnh2^>5V+MOW+a3ZKsWGW2zn# zuxhii)~m-U08`SkiAqsU?_zB6+w3WY9|VY_+{`hfTa#I+FQGgdGS*Vai;3JGVLg9J z$w6!P1r@+tYJ6&@G9d#`H3ov2rtzt^HX*yLF^67CMT;BVRc(fiAv=(V(^!r#$#OmmI)FT0&Doq^!eArp4;ynab0MAbSim850ADW1EM7J_y#Waoi|})grdYwuwv=GtF81~}tG9=zEJ842 z9EBVy8|(veDI2Izg^Ja1my&al+8)8P12WAK)E(9WE@hB>6Cq`FNHoOlD9fF~SEjiz zu@-bl@5PMNW~!H?6QIb&dS^V2#d1E}dk}g~ou!grf+Hu`T`4z+2G$nE9yMhullRgX z&KTq*`qp|ejK{h#FUc2Rk^--e6l~CGTP@Iw30hboI=JChpgzp!lbH{U6wQS>1kNu+ zQna&FpoPnPA?xg=OF=|Veq|k=2{LKe8kC>h{ar=QGPDw?_&IHkF|7o|EKwjwp&T0$ zpyXT*-xLRTKpra*#Rj9f;rq~?pf3ivi$G=8f{X&h$|yJ3k?>NQgXW=ndJv^cMaE9U&h_5h*)RDkM`5=O>?8HhfI;Yn6q=0LgUKzK+#ovs2J)9tqW zu;xGiUf~gtTDC$4&5h(kX$a+ewQ_{QDr84Qd7A9wG+ItZBT9Kb7EA!|VF1FBNEabd z5*$yNsR}8J(8gkNdKs4@ zqtkY=Lg~kZ6+UC4^bK@iGRbIhIh%>E#28X&EaWAT+$)fu;xL?MKeh;9z?4oLvq{sr z4)hUVa1sI(0OkfTPaha>0)9P!1^P*{P^4;* zv$@MKJ_(V-K^!6lSG&;o^ni2Z7|@=gHl^uu5R`sFWu?q@raDAhCmuY29-3QyX`+o2of9$1u)bgP2#vxcS!~ip6zZWAjrX> zZYQp4gEsMUuzz=w2=y`IGSVt5M9-x*QIs8kUA!SP71|C}%LNG?3K~}GnT6?+9Khj0 z;3ioC1xTUR6)+L@kVL3dNFXA=O%nP@K0A9SXdjg@Ns3SflTV$d!)P1c+59)qy^$oX z5L#GCC<>Z56cR9MOrqpfD3A#n`#`t|Q7t9G=aaxa0N2Z)d{F|epcvrwOj67}6c!(@ zwW4@KFldlc4ueW$QY%CH0(n&vr(Da%1!wTgYi7sJY-k&qIZx%}PclH~_i_=11w!8N z#rA0ACDzfe0dFS(L094~qXO4}PQ(YPcmOKJUVUC{VCdvn|MHeboTk@fc);tAb}>E63P zkLos@ntIuI_j!93GX0LSxxoMR{`Rh^Pk*XE`6jRgohd#%b>^0?$$vlhqXWA04{d4n zEsJPhchB+7d&<@75tqjs`-Fd@F)L(>8y33oW?!5k6-?^D1t3uNMBYb2kF1WLF1Xc}9^m3bnd-U{g zy_0F{iV`|@bp3uAa;?444|N0!eVeqB4f>&M-`+IMEYADj6+t8nzlAC@sR zVY#h+XfphT;?>JbqQ=RXM0fVv`)!93`+RHHcd94Xj16?(?Jz~*iRN2N?)!U3>K;to zZMTkXv@~CtK9;zV8~JT||8HB~y;uA7KTkHdO;_^+br1F(Y@eRYtSOEf$HSlQ9q_&K zQ*n%c=JUiJUt#8j16fD!@x#S0Oke-4^O^Bg){p4m^nJdF8#AxppZqXyWa{{W7jeK| zVX0XYcV0T#{mp%N!%LY1E`L|-Oz+ImRayHVJTPaqT|PXaDTs|2C;!y<%`1(%e9zv} zcC53*w{CgX@kw@b;>Isd+{8R<6YFNCdfGduhyOjWa*U(~t_**3PmK?}@Zhkw^Xa=k zTxdSouk>Bx?|q$h_1?Q9o!2{B?;_zF*Xc?pu{k5{{#$ouE>B`)>aMJ3r+*$f>Urbq zf%v=D?B*61{m<~MaNniTyo9^|Y*ADDWYx`2P>ZLXRA$3F&s zn^80E7w$2(+BKky^7W;~=k8o?*ktlj?b*GES)+X=)zvk5DK-{zNF&}Ms0`R0qj(*q=KJH7kdgV)^l zv!g=kcRs;HWdSXmTZ8Iu#le5YB!KXP41i#~vmKN@P3F?*n$8_%kv>h@LAt$XSL8^; zmB_K0&9%VJ^F6ThB^C2TtoyUH zd(ma%xGVdTX}~y2J&^?tAprS!Z>d3a0zf`HM_=(qSx1sj!4vV`SnQwL2kNIr)c*}y zj|yozR3K+%YR*GckSL!u?K~{0vWnHU^N2hjKB*A*}`b2#t(XAzdVcQz3T45sZUah-+;GZhlD& zgyKL~9f>f>c7bV=6xHmutrYDbiifTx7C)S#QoK*ZWq?>d4ekqk>KCyIgI17;R_e5& zB=9kZTiLlJMMajGxX)NvIya3sMcP>+6vqlEN>W6vfLUuLDm$I4k1U~FMsx+8wjd2d zgBk8Lg+-!*yuxjNt9HkK8;I}B&>;$6{449R#q;_uJiSAVOFpUw5oWyBzlzkh2pQF` zi{&WE7NEKyE9nDzgsV_H0P)4vn0c(mCe){R)6Vwc9CSRz z?%+7HA(@jpWfj3iagJYU{CP>{(}HBIiwo>=qPe9yPo*2 z(hCO)%M+}NU#%HhwObPd3LZ;pFx@xq=eHWNU>BJQs9ogEguxBprTIi~D#$CT+uThK zUWtcegeWfXD@=FGy{?`dB`9YvvQ(4lKB)X=!MnhoRYKi3qWm@fd*k{m`kVAgxV%I= zHW(6fw$_ySe^1?aZNn%DPPK!FrRr8He{Pv)iEUT~%y)fgS%N(FE58!!HiBHs9@D}a z?U&lIRB$l~6vBOj8lcVn#Nvn7XNpnOyY7R@V&Yd~>AyRGN#lRc4H=`}!&eJ<-cicu zPS_?CL%V9DsNnMv$xe`v5(|Mb3Aqf7F6c(NrMkQ-KTOO%?oIHx#%sdK1+JPXs^-lE z5O6Z^z9@>J3jY87QOhCG=cu#kvXxpu~zIjLs^;05bWuRcL|%4~Kv3`df@T1ZaXs z;WUj`3_Zj+9nHitqiIC37AwVEY+@>i3Y&Z(=oO+6`ZTu}8a6abLyOt9l93y(+o~~CYwrq#uOdrS%!-r{WO%`#I zMdSH>m-m_-ADbB{oFnj2y)(@P|3Y)QbTEZK%?jZ%=1UrN$WjVW2VxaSjw3~od#R!4 zBk^R4HxrH#Qy!_2=W`Yl!`Y2u70nhfDWL5VIDWdmO&7iC{9Gn)v7CA~YJFUqfhxhx zP{VCfom5p8*;6^eBXel-tQ|-TYZ{q_d>ZG4uzCXS6XWOwFmr&7j7L901Ymig6j6H( zeO#l3Fj5V1SOiUD@CLkOXBQQPR<2}$#>e2s)dO#%n^Y~0L4<(k zaB{`<*AJnNUQ`B!cZm3LRRRr#LUG~g2)J%zgyW2Hdt`vvYQW&P3M89w8EG(sF}y@C zi|oPz+!Q$%mxML4zYwFTpG&Bu_{O~eZ`1-v13j7_$7~}Q3?{*47K4)HrwO9fLQA*f zIj2EzNg7WIj7ZBNqm0KOi7|NtLI%j*hp`l%_9l!GnjE7;8WJ=Y;RFNSNNmS-qP2Bt zgDbVMXqhMMB!1H5B2=^;Vt|w_U6#f+8Ug63j3b0)d<2F^VX6+Vyd|I3+Q7XPq75TX zNWX%$jGe#@cq6=t?qC}Visxm~@)fYsi_c=dxyUP^99AN!pcpA~8pl{k7-6GvrbZeQ zULlhN5Hgw!lS{&e@myLWNt30~s2tE!l2ePhZ*f@!0q>WEWgDC_BPZRi3I$1X5A!Wa~|dL&9lv4RGqB7BYyEr3@P;V;qv+tD4gg_2<^ z6pU=(3WO#KsESrYMLN4i&^BP9GGbGZJU~XzXXO}TfTf59;8G$K;|Wt63`>?p+R1dQ z6-?b8IZa~(UUtR??|`Jp`&jbBDhPyX0BLowicp2w8W^S316MwZC83X)1*42y22^?A z$zYNmhQO5)@)$nwKoxK!m@8<)fy|GQ2br~8A*ia9H6N2j(LtP)M3dBXn2im<%W*7c ze!wC$?V&Cz=^;rtZlhPQAR)OmzEV*`HxVkuN*l(JD(P`VCEYKdUrJeRE3A+humcm) zWd=@;W~P7gm;?b&fRwBd1(_g7z()`gfXN}CRwcnb0xu|SAaX+j46Z~H4QXTn&?BLc zj0hN8yM&NvS*izO;;_(2X+8vSriFBIJ1LKIJH@F0#%z^H!mPq=5v2kYPK5wMCm^5> zkOi=EFU44R1w-MI(@y0w1?P~$(3(aBrMfcl)4cXOMjGLX5u9cc)7ydex8zzbyqsL8 z2-aH~iETtaX0#z&dDY`FY*Ly%-2f@T&u&gvT(Ao>@V0$|9uB^|Qc49K=Z{Asj}!AK z4{;|PS%@!DE=e|6O-tAa(|p-NO$2zYRhfgd1>olco~Nc~$d!(45|V7f9P-vMrVv(& zu#HpYqSjz84Q8m`c;rb8e;d}yTb}1JEb#g~)D^B`AvgRMX%TF=K|l%$rW592bHeh` zU@RY^nlX4MYHUD_JM1gzn+4}7Rnd-|w|P~0Q*03Zwcc+x%F#pKjw*>A=!6Yrs53Fq;DCG5AHIe!+$?ZW8z95v~^%lLx+wXwEKVUYF<3^^~S`r(|z<$DPKIN%b7l~XCTUd zZM5_1OovK$eEQv>PSu^Vx0-*QNK4H+@n!Yv95Xq8cPBc-1pwvf0V!UVq#cX_Rz73wME@4C$sgsFZwgb`2))% zzwGUvo^emt7oPC{tJIfCb>~dFcQk+Df467gnVB=Evf_N_PsTzMZ{&{rdMEeAIVs&2 z{rrI=L#EMpKT0f`62BPu@U?`#%hS&k>W=yk@fXD6+^K!X^Mc-7wkB>)>9a2^FVY42 zeyA%hnmYISm)~_>_Feku-I!+obaC3-eOb`Z>-T56J3qS1mR-W57~>t<78RaZ*xj2l zwDtPd$v4*K9e;Vwz3gQJ^L-mj?w``VHg2uUiux|)p8HPczo)OS=?=gD$4IPYawC%$46tb5&Nro;9tF@dPFsuuhZJ=GjB`Pv(uJ11ymdz|l$ zr~dI|-j(s{eD)T8Wn*IDE3bS#lv+&o!-e2=bf?Usp;h#-@dZi23&bR`{(>z zeCGJmu2oUiXKDR^O3!A@Vn`5q2Y9e(`+p$qs>NCHt3LvgzoEZCA4qWkMA%;-(h-pz zeIB4q^_!ZW#-$)zP!!z_SU~tRvR-x)E!7;JI4hfcgjk$>_7-++B+`vw&0m z$I1UW)17eHe^yiJ8w~j;a8&^h)>TKj$<_6t9)v>}mTJ-#FS+Q~P+ODRp|W_NX6*%R z#5$=p4S+4@xbW&FQ{ErrmM4mDjIRsH0$}ow7iM8$GB9#25Mr}^F<_JFiv)*VM~kgj zV#dG%JgXc4O0e$uSe0q@furicb0Fp63P^ca_*E?Jp9i3%9|lm;ue9HsQm=Q8S8jHW z3*ZJot1wn$3fvX@LW%tb_&Uy5@OAw0-Vc+zlc!;NmJK@r(j@G~#~x3o<7m1RWkE0BviIo7Va^fCZB2C)DjMJHmXR8Rpx>nVs&Zi==g&Q6CBFPxtcf_ z!bPyx=_hbIe377sY`KOC@Xl02rxXEUP5#=rtu&xo1QU(#2F?Nap*jRp`*DIG(Xb|E z_{*(wCG94(ZLn=FAL_;i$&2v?IHJ}&H_F7SI+@mUD(A})4;o&Gi>NOG9N?uJSyisCQ8>E{VP z8TZp+&iJxLS8`pXW#2A~pKZ+`3$bc>{nF7VU)zMm6T)&O#?c>Yg1l{<0rC*qa&;Uo zu*ybao)}h2tR-utDMN4Cc>_}!j~l?h;p=P_;%MyiIp;0;3ln64sxD_pv)V&iT-u3*>y^k<5ai4zYvqr`*V_)(Oz~ zH8%BR=}7R|BT>A`a3g$gTiChYAB1!4jVya_k>&=NVJ#+i*g+bDl7y?Ik?;^ByXfJ(S~*(5Dqx%=z%V*cfForp z#_9<5@HCNx51Zou5vI`F=`aQS@d9ZiLyGe42nY+WU|jl&wX{)AY)8mwwnkPIVAtoT zFNbj&@MK_5_{yV^LL)6CbLn&uF79cd9kh)7n3qM$cQtUqHQNuY7MBO5xFMAvk8}2u zV}Wep%~9OE#28EmO_OZw8hDZA?Q=0I$FacSaBDoYsb>!)QuRS*{6dQz_z%vTq0|Hc zx-BNR)4d+QMO>{%>v*UREr!Y*8EgtnYd_`ZyY>Tr)pAlhQP*X(3(2nZBlfn)!7KAN z3Souw9P*E$0Y#Uo*ZOgtE4SCkiAO0K8L z1|HEL7fsd(nj@BRl3IQl)r29LMFFMOLm({!d)(+kBd5_5o4t%0q^n`j5Yix|Lpek> z<<8jU=u?XY3`wIY1QaHP-v>ma0VLfSZp_aq^dkZLY2YI=fyg*D`Do-#;lCnC7!dbb z@C$hqT~4ax)t&@Tn-y&l46W!E{J-;QTFIGVDwOG=F^x&Z=99JxM9L?%Ayv`{L{cN* zU2r@wTA@mKzb90RYefoU<&umh7#HaG(SY@E5ioPL5nTe2;kmmul^CZOSkzc)wH-;v z_J&i2c&!eBh9IO0A*vL~(qubiGmui}T@IMaA}L`d9#R0U{~veR58FJm|&R1yAIr6OonuMJBmjOX~%O`kl> zNMHj&aTJVs=rk;c0ItyhXpkwV2x=uP!Yx`6r1t$1DTPw-ULuaLxS$M@0uj~E!?8FnD?qrorI+{Rc`&Sz3dy-15T z0Q;Pi-saRGlEXlP&~w9Vc>fu)+Kq(s(tKKz3npR=5d*?E!VYKy9zue6sUYYd%~(=@ z8>X}fEoI^7(Yb=LL8y?@WWHB|Rs0tlCWrN$ls8H%FxKpboR3g(ZY@aC6T2|AJf$(N z%3M{riE|DQVIB(KgxOky6j2B#G57;NB?8PC-IM}LqbfO=W7IuBc8GwcjQ80};H?FK z&DA;w6uXciZc=MTDCRbU2G|>49_3jrGU}uPTwIMD#x4WSDFkcK!v193NyYO#kz~W) z8(J&nlH`&KVDXcvScOCY92c+>3JPvJ3$T(Pamu%mNeZh3@N6n+k}MvijY|S3DMloj zaEb29qm(27M3&D^%p6h(WQ z2uCvoZ>1`PVMty~THBQ5VHavSiMbI{DOaI`?(*awnn7$Zr*TzBkabihc*3eFaWE#1 z+Wyktti^tH4l^ODz!7ylC=d5*T$rsad@{VX9%LvY1XOQybnpe_5qT1TtopxcUHH>) zn(WY~DsC9QOaK=&?1GMn{ex7Y$fS^7(b0o?sSA`A*gcm)X;_!7?PI(B5L1i1%YZk} z47SgfOR1D`2Iyl;S6HC=8Tia0GL@_g4u({lvEGJZG!6@d&GV=sJQv$wB@~bXMIQe&v*CySsWE-+250UYS(A0 z{b{7`g^|stG>cd24viw+Q7yXEp;cptOiy&^$K55(F{5AKZSR?WV@>_86U!$F zdMN7mnW6EUZFOhcpNRZ4)6ZnqpFBpF=Z#G)t?%7clZcI-UsLP8IK8m7bLP&qgu|@| zqNvWppQQEmKiKni{pHD`w3ouV56`UGR)1#dh&g6o^m*ORNq26&`j4EMmA#1(zOU59 z>pN2JnNqhL8GmQ(mYkW=A4dX@ryU8?9iDi-u^t<(HpOChY(K{CAKe2l{WOoeXU-$K zk4>yz-@b61d8!%nWm8+idgkA0n`!^)-W$f^sC#WE5-;3I_;X9={YxF)Tl^Z!YS(wZ zi>kVTtVIvD-0X}UKigaX*?r~t&alziSBgKs(|RIt>sW{BXk(&t#^mn&*Te^}4=j9; zT{M79hDA3&=M%o@KJ&X{DskS-srx-Y=yp!OY|YENGddX?JW~=ZS3P)Y{Yz<%jvJGEKL2u0tmEE~rQNmn8~4O=pP{2C#m!%36?4AC*k`lfU6Tlv z!DCii-b;5rSlW5+^AqC-P8>Y}a^=4~Hge?dpM!aQef?z_{!D6S`f~aG1vh4{P5tmx z@P$}z`lo8$zb0mExFVCs;=jTrvS!pXG@yM@B8WM4%s>9t;5ycbjVx&-yoC0RSe| zW=S9|Vpc^6L|ZWewH=TZ0_ZJ)<(UK(E@!ZCq}1N80gAlJtN1B+h?EjFwADkV3gLvD zCWN;EK}QBSbI7iJAaC!{N=1s8EyN&U{i6%-<*($Sd<52V^Ui?OHoO`tv@`oGk2A_b z+|s}TgEXv?st18YEZKvw3{L^OjNBUQl-Hm*+X9BIRmVl@0EyMb5!EIulGH$G&^|{w z5|^H&h^g*ABg;ZBx`12-29k2DEq;4rcmcJZV@gr^4~!QFZ+b`t2gYr;IYfiA9S9<@ z@=ykH3%A)uY`Z9`kKt&eaGo-?l3{~Ekpu-%^2TB)m;IKPa}lVn^ojqtiqyci6IP(& zUc}}QnLD-tGebQ8oSoZd3`UB)q{AmrOU2Arb{pfwd9MD|yta|q1BdV6jl_kn4b&(@ z0>eVIJBx2AsxYJN&<1p0%9xOQ8yE0Ya(5H)N)KILM1jl_BK-}aXg|KJQs0zLWL5Vm z|E`ZGY#1E@6|CUF+qlt6YdkCWH3j0VV+fHQRw)a^fhwi)n3z*Zs0$;h7`=0t1iJ_m zOHpj(XtKaKu_m_x{#*#_BbrQ~9)wie%%BC#b^#S}5FX+^F8FD$fF(+t`U^iUF zry9z`&NC5Q3@b$Tebv@jvo~CW_~G+)Mfmd|gWNN(b=`AC!39}Py{Yz9;o{hOCgaBb zA%nH-Ilmf=cAJ>)^N)jV7ElX*T@qRflZpV(A%iO@83V$|_t|-HAyfTuKoP1^=vz$r zG#h%%*~lTr9{d5EzX>+G#>W4pp>Tx1-uef(Y7h2%*gQA~W$m&)&u;puv;Z0asuZ zDFI$JG8C5+K+mL?>0y7z4I+Fjf!X0erdYgX37bWp)W5AEUqlnn?ZBe7hsz1{Y|(N; zHz@c%!!z-A>v5%-T5h@`92e*Fh4IO`{0918-`x-zR6??eQ=vkQ7%aw9T$Oq%9u zCDQbKxw@A+09Rprj*#qm+UVsLm>A_Cv=^^7V@)(_XyNCEEy15Xk5YoxCPb0y!m2JF zT~1xYf6@-3jflR>G#BxZX95XaApAsbSSbQr5M*W9qQ7IyNi+qxydvOjRMpzEI2MCM zQ+U0-zevVe;tQjpZG^$lYqTTV=`7yR#$j_2Fo;m)pxamt@}v;jYwsod(ME=w1Eh=Q z9YlI3PP)w>lVr&u{1{7{4OwVh0UARuLt6~{$vXA&efunmabT4}wlTs+Ldlr%Dq8A% zn#xCcy1j=<2~yogG26)uCZ~m`Thbq1!tza_AoUWFXm5fEi2Nwf z(n-)KG90}GT4aPz^PMlTvNT?v4^)JVl})1iI5`F@880RYKpJR~W|F$7YPbU~5&*c` zO0!;xgvYADzE)6Fr6@vCSiy3Q6^%TsXGIUWFO%*e5ickv1a4ZDG$5w{s(?yaGX?g% zE9SGj2i6u4b)+6Y1UAQfuh45L6q95tOhOGQ&(}H>+vz+`#v2|3qXQ@uD9MX;6^%@VoM_3&5sD~+sp_)qcw8k1+fhu;WKtlF1!11fsi~F+z})e!N4@#NCRz?I zG~2o=NNGSWQT-@SZLL9rKvfA$mzy(_FaN7D4cHLH7g&-px9hmDVNm9H2orI zhZGeR{;yt=AhhZbp@MU{P1Iw?hqO$Y@V8)AnG0nwB@iMvuyM3Xsw`y80g+zN;Ajqe z$O6gFrYZRCdOj|;MiD`6#3j*%>Rcl$!M$i}6B7^L@dm}v zh`iF)q{^w8$Jv5hkdtvTiVWmBOmxw_UP=V8NG_MpR-Pvea;{Qgkh2cdYHZ{K_M^+l z3lRG*D_KE=_J|l{))1XLGNq6kQ#)lT6rz|*t&_7#n0a&s&jvfzEv7K1>|2Iy& z@HKK4@LJIf(>WMJ1p>^Y$*F8qB@0G3Dl+1Jnh_NGIGYo~ISZ<|6z%xiEYoxrLKOKJ z=#v6?DohUGkpyT&l4VKY!+;!)k^qYpt_7Jo$<%+f3817aKy9rKU<&Afv2R|N&&z-l9fv>J^tlrrlR7w>#1qV94DH(;NIn6~|COEo^ zz@X|}K9bF0FqL$}kg(RRlj*ujXFnRc&*=sF44LJG3p5_jTYTJmDbXb z38JNY!*5`aZ_b4k+Hmw4QB{&w*s#^L^GYfxKJc)}d`Fe>^^9v{TQcEh*evSmq1RA( zKD<#?i$7y0MlPQ!s`|Vh!NLZZ{p{lVqsgTlCWwv%! zYaHOilh@IO#D1kTkO&M*u?xakw&5FZ<-?0t;bLs>Vn;Rdka|tQfl_`CoYV+3wUZMko?7_Ts`{p}ux^7t2X6o1_cJpQX9JND^Z4Nfx);yG&%F56voqvO z)Kpg11hZ}=b&@<1yX98kt4m*L^261!gc+>yBYTT;;?kBxZCN#GD1Q07FGjPMbvC|= zOgMLUzI*r8@Mt7fKMrT#nMi!v|Kf9<32y}5-T1*kk57E3Ic)UbJ7%8wqkOu`v;TME zI6fH`Hm4PoBYlUw2gmMf?RtrP=jbxqIfCOJ0l^3aL5Ml;>TKivP(yzqK4Hoia|Ywx)^?TrF@ z#H{<8b$M033@-2fsOB>8Fl{~GZk(!QKj^cAuaKplJUFD=ayMJ^o+;AL8)9zUa<)g` z{r7h>J!Q=O45E4Aoqyfed9Gf5uz?t8n%?nK;<1_grh%V*jx1f!z2}c)y>JX9EVd^O zP4`5NteM$(ZszRdx{b{sgs5=j!Gi^RqpL5O+mBr3Z??qO)&G(3Vf09G>tu06z0mi? zgpzKry0+6-Gmv=mZbJA*xOnY2yehWmcB05^ zqmTVDw&lw&@TPe=JW}`Xn)49K2m1_XZ41Sx-~(g zv)F6hEcU7a&Moi3i=>(m0c`rJfnzHl z`~`Y15MBNb4|C#&P#x^#tzAi?4L~LpY2ze+<(fNX&Ia#nCDS&H-OA;2WGWY4$Sr;X z7_PLGR_fBfoWd~=TX@#YWuhu0V^3j{@O6cuasf`APmq*aMx2utJ=sJtcm?i-!R##x zX~<}B>ZPd(9?LRX;Q~7aK@n9cNN&GF-M@6&f-zdk1RZ3M(-tB_aj_gCkasDPqVmHq zIz^6hK_#Hvn=nWTQR}5Lc;sOqBs>iZlB6b^kT!^ke1BC}ilh=|fr;G?hoXva;8RZ! znC{Yl?xt;v79DucYsVdH!ZN}Hu3{6QHK+! z34#eH*;cx;rj%|&7vvI2q6a(6ZpE^W3{{Cw zZ#AU%nKa_(Py0pH!IbbD%ow?{I;?u7gW^>~b;n3yRBwrG?c!6DW4IWhp6Sz^^Q6Ij zTJN!KLM%a(YYsT3X*OdBpZNNZxv-@qSCEQl6~7cINc%;!kbuKQ0WPBtfl^~DZSq%z^kmN`Cw4Ykrvm1cY&aXC-5=8T6$N%<3kWFh5*Z{tj|nt1>}-`2^%I<{8X zM8aadFVt$v;(VGy`apU(!MW0_K{UCN1L$sEX38;2L5s<@-&s<-(2!mtpmQ8FJ|=H| zi~9{tZu73R*T&b||3F<6NORthU`a4VHP4YY7l0#mRIr(z1rjWI>GtI^&gIwV1k&ihtJid*V>cET4}4(eh8aA<4BXvqD zriXkPy6oVET3&J9LW|0+Vm}?;N!c^fnz>l25(Fi7vBXSn_CoP~0h9MpsS?x8NzxWw z54(=3z*{)+&zxxQ4^;d$^bu9sR)~XQ^L>Fq2Lyk{7e22MMWL*iih|J)P7p z=S!j`-q|ZDjgnLVfgM&@$Ah$+Syntk(p-lfdH2a^3uPmnmhGYWcp=Oa#uIoIevAtc zrsjMkQgS3UFnlF8jG8z9LE04Z9+5jxx8-^8fOl$A;g zgM`$>3A-GQ&oyY3HCkx|HHubjz;t6u}`GR@oXzZcTDzP`CJQ!C& zNhOq&C#G!o2BYv2rjssLQQp-wdLBC^5Ft`qGn!W)#5U%UOh+7&#%8l?8gc&_v2wHm zqnwNsqD&WoZ1@mw<1qf>OhK=hRWB5U3(D0}t_W1wB*M3g#v?e50wlwA(JWfxQ!b(v zE_j`$6S3SzpdsOT97&-feNY9MQ!S_ENH@_z=y_0JRZ=vk33i46AWVm%YB9mc0NP6u z1ce>5N}$`o8Tx3hjwBqu9epH4gJ@Nz(~|K3eUD=xFWq)NaAoTm&YaW<67qca1-g}cylOc9;Lh7)9)mYFThC*M&Lml~G!Qbu$fEMVk>7@Io#Udy|&Iu=oI)=`&(h3Mbd9XeK(( zAwl{P?}M@9^_V})1n&op3(J+`9LH$|>980pL>K_rt34s^MppL9DK7}7085Yu>=nMd ztK8M$;Pu0#+gYm8^0)CN`;a7QgoMrUJ2+ z>;&TM*-?wPBQAnmR4Qf=<#`{+HiQLdr{;#lU}wp2WnMV+FA>w5UBXjrWp5K0XMJVvX8nx~zG<SyOFXPREjotl8Sf6^GXqo@Xp*7W?E{igs|=3OW{dcte*I;Oqmm zma;TF%NZEVef{2G|vh*lS6C1 zYBf!M`F`u`x6eiH)9&BX^Zcz#_^Pz=3vVUc?!41Ef5H4D&@r3;)S}6e@~FkvX>3(v zlay@x=bvv*l0|E#zBjCTu;i)FmfrHemYnRZJaVzNWsDGBlaD-8D~;)ln=kYYg*~vU z`^G9)nBmzBkWbHkbnC|3H!e-B9nvNhWsNs)`^fz46N8KHd~&i#JIdDFCimMW-jZ6W zA@}CwxT%M9tw%?~SF{h_-1%es=+K-c?|xgvOk!5^oY5Em)P7{LVZ3&7%i^ck|E=nJ z%l=iHhrZvP{J`Yy>p2TP4f)ho_WHZ!$*aaU&s#g}rFNdUzxCWJH_3HHD<g^j3u6%nWJ!9+j(MJa_ zB~N|*-egUPNx0hDa_j1stvkoB{5TjG-6+(a8o#yXf#CgT?tGW=(M;h1 zd-9W`j?gIV&a1sSMJ1bW;Z`#>?r;3_PnTBRSa)da)~Wex!AqDGw=TMQ=&78hv4_r{ z`^Uk&Bl)#!uRo{%^xW=G=MUP4^sACzeR9cH_m8G$n6HnXnwolc>cM$MYmV-{y5(k! zd5Rjn`bqMgTREP64}M%1wf()_H{&)Z&l$T=*Gi79nAvU_ySa1f{afh^^*2^RHg3X7 zC0J`exbvs&t>?xE{tH4lQ^FUOIe(etyyo~ne+h~i!4t{&Scp5!njAKIVl*dx!fIU8 z7t?RM{no(Xmp7l9U$pgRLBT4n#4!{&nY?u>_V?$+(U)F2*Zi4pOqafR(cr+?W6#kb z;pb?b(_<^u1w7w$=WB2IAekgtL92X;yy~oC>pz!DKNGnkeDhDdbZemzLMcl`-$=l7 z8_PNVZg$_#3984z$O#?&HgX9hsQ4{Uy;L4+&pPojB&lW&5q*zZbbIwXpE}q4OI&qemSZGY-)4=H6vb@pvstADR)%C(odv}GSC z`0axTXM~N*Y1!-|-D| z3QZEA2`B|t0?ljhG|g+<5GV!C`B$4?Vlda$Kz~JFTqI*jeeOv7ga-9hE}aBG5RG2HG+( zO$RvCLs)PU?4Ej=aEa)|om;R`8N+5{X-q7;-5P2%1Vonq84w6>?pQsUCB^_(j7%dm zs%aVYh5w3~Hr;?*ff*YQNZ*uXVnHF;mP;W@sU77ZFco5N0$*|+eEpwlHhFC*m&Xg?R+Q5=3cI|E97)Fu zc$(z1@iu$ zL9*jPf{&^gH;UfKzXl9cpZtDkFW2CDwMnx1T^(c##W*EM)NK&%i`*W+l+H)NktIM?)ni6c;_<@(V+-To6iC~0vV34W zchU2t)J(C47H+4Pkc9m_*08sbylC+8*8I3pbmqa#TOqu$AMIsC+5KR83BJ~DOGwiD zpLqCeIn|a{&?9I2K%|9Rz(g4rRQq+K*oU)LWT89RgE7agLlPFn_cw)idp5JOTX^Z2 zhkBXc>`$HOVt4po{YJc?ztVZV-1ftlbbi71VaJ~<-@n+0&7QaHu$~Q5{j--)3ESo(< zsZOor7vP{pl3FDQL!nPzGhq5W`> zE3h46t=liu%8iC|30>sJbck)ithk-V)Ct-fW7D>GDH@qa5)$-n-{lbpZNzq~-kg8E zOIk_QNYBqaCdwm%ui5EpSSC>=Vh;6J?lvaph&F5%UESR~Z&us_gG`4gLgaw4ywjKx zOtLw)FmCiRM=Qza3qsEFU?^&?_Z_S2>x7`7kziu>a#ZKR{~>2nx?_hO@`^g4dOhPb zKEv@!-d9bb!-7QZPGUI2t3s?eTh=8>72J^a`}0fzn#G0smWsx8fO9%k#i^3ndhj@_ zY0T^;xVJOCL^f5^tX(KScwbb-mw2}{;1>RpjH2b3?NGnolPfugG(Zaa;V}`qLuKPB3{JgXlI& zVn{J0WHfH~X=NHGo4l;HlvGA5jGa_IC~#D!dZ>&#I?JFTd)!uH8^mgNRWypbsBGQr zdL~m5MrkCsel?aB&!q`e1723*9GW)|k{9I$MT$yupMhq5AS=qV0^qe$%9RJ?I4=vL zi5jAbWI;Dn1fmbVBcI_rd=#&_7YP?tsqjkA(%fp9Uo`(GlMT=5Y(bCe9L?S~-`!fQ-co)`&~Q&?M{ti0P49 z!o$Jx1|G%X0!?Nn5xTxGUMPqAejEDdSNO6*VW2SLNaM zDzpc!+esI}14~wiR(3O_2SUD3Wg^dps6z*UhE>Nryngg0YG@h3CFr7ildrCzG5lPxn zc!~)kr(em>2kDsIjEu?|hUMMyetfwLPeQ+Ka2ZD#pEkcy+~$c{LULj(eVOpL>=}6o z(|cq*!V_twV$d}hc^OkIC?m1~qW1JwUko2Q#;mFsLmT!#_Z@pdZbZZSBNwfbuRpjVd47R=<+{_y zeM2^U(0F6n=Aw_s*g#Rj*vg@EJ0^QC?rf<2%apHqXT6!37{1wh^xMoenOIx%{P`lxpnM@)7k$0 z*m~!s?w*IoZ=8x+IWe3Fm_F@;weq+$(`>l@`*r8=d2fH+wqS(W&>C90e4Gf6;(A`b z@$dt+lONfKFsg|EW{rPgD|sV(%elEvZvDDyG@Uv3#>C>t+QzXJPfvY&V+9*!nsTp< z8k~4#e$#b&V8T%En$`I_Q;-9>nBp5 zG55dq$N)rlE6m@GrT#I;aZk~lVN3jTo|SppVzdQ)?%Bw9CjXf8{g8EDiad@o*tb-0wKU#{uAN|AD+O;=w0)`)2UZ6K&0A z+vJIFk{90^`DDND=EM(|TqWd$DRF9~=YyM9GcH{p%~@0QYVX1!7nhtgy7p0X+vJOH zv>qOR=N&V1vu90|c643NxytL$4Yq$)O25b4>>r8BzxfVmh>WH#e8l%!TrH zBzoiIoS4>wHe3tL$KGrDalxHWerRpK{loLg zAKYdQANPDA8OOrrM8)4OSpv?>cGtF7lPzQ3C0m~wTSB$JH~FVGiZ+ZlwVC7Ex$C8A z?We~6_{dcK^^K-|Jvs3o2Cv57UdRm&T*vZvzR*gJrmtvSHfni%)12P8()&N3n>6!f z&!a%B((l~txbkyk<(LTQ@_<+cLD)mTWS>s9+IxOR{zbj)8H%zk+nK{$Fb2k zS?8c#TBNI59C>!p=b7V}bDP~f&8xyZpO8hacl0Cj*3&?%Iz4i7@hW*lp10~$--cq( zZ4m!E^)o{Xuzm}3K%GP9oc^)?^v$TXr-v(^It>aPRlxZIk-_?fVU@Lj^qXjjjH(=; zS3UnVsA*--0jmng4C9z*TGj)E459wN+Q`H8^PmkJXPQ;zn`Tu_(4DR2V<6TpjzL-r znnXT6_1269+#LHNY^@tXrei1(5A9;hwuD@#sZZ5UPz~e%@M8X3?E~mF--5~R>yexaJqk<3s2VtQ6kod zn@*7H74wvI79jh*Y=o)o9+OLyGkYv(7b=G7YKi;Y3FI~a*MO>780p)?d#Ow}C+M+@ zaTv&SQHPZ}H`yvEw4B%@b<(?NM8^e;TBQ)hNq9dtmp2obC=&6(5PRJmt&)wy3~V!o zpOCb5;kjTd>PKZMXL#-#`YX-$VF5i~PL`nkhln4jdud}aUg-W)Gwn!XtMB=ApErv6 zOzt5I#F&S}|Eaxl!Y|FjGUH05t6U?qJmAzz1>F634gR93l5}{gZ%`!2L=9IJv{!k^Or^H+0#|aPp5$V1 zvW-+PPG>^`L9Ed~i{4w$E|v(2qrC0Lu+iY<&YU2a*>|arSJUd?dUV1V2rN5+Py=3;}i*Yw`YTgYZ7{-OX z!@W=-ywqPZZVTot5PKU(I=Q{ipp#dyMc&w%&9g!qVtP^+P&sGY(9v>FnwZTpm$;+l z!x!}Oi;GS*X5r=na(qcVDDse%iMVk9eY$0!ZakmbMwlJF#9ra>a5Y!?K7XagiXXvF z4F?ux6h^&dw+If9wCr$~Q7k57e0nj`xGt1MHoR2g=R#hPOrUU@sO=5E=}F*(9CJ}{R(@0J@_y}+R}D%;p50;RU!74G4- zQ%!6NW(%ILglwQ5$55ZG!9;m|e26-_2QXR4`2xI=$feQf0!9|O6o%qy?8**#y!P*S zTpj!B*Ww;DQi!iBuCijg`|QF1)w%nA`-$B-&JzCKh)xK_zxJI(7YJ>iFz)&dZ-r+| z$LC4AeF*~zo+Wv*VL7`%yM-S}Hr1>`ziFRX zuG|uynH zj+b!dOT=g^E2La$E5K?!vXa8ZSS(F6c|py+Lu5jlC3^+W&JZ{FNePiN@)o$XHGFiZ z7#W{>S6VX>x;`$6sGc#O#md+q^6sqT+|-B2Qy%b)$Z(YvhpIw=VNohEBheJve61IwObaPyiZxdohI}J=;dzy zED8bzn6k#lky^%ui)Oqr^Z-E%v`$o=d;Pux^d_H8BynRtiNs*2o6hCuUJT{&i?CKl z#Vp0=Yw46ZF(L7|Oz|MY*NH|D@hU_olWbvXV}y*yu=WKKvHd9OXE9@sgcmd7S%JdR zU5uBd&*O_r)Dm@8C)0F5$dS6%mKUqi!Cp!8LPOF_tOk zsXc7DtFcOjQV|@c1==8ZBc!t~5yJVrs#2ZO1nywUqDi$zA?VWyKNquwsT1fXQ)#?# z)n~t_>Nw7QDXESfWLNA+MGJVX8`pOWYzgM)BZ%@Pn3$=G6{|dKw%CE{ZTVpaB1RRB z-X)XrY9d7l0gaMqw8^k>@$;lXtswzv9;o1Dfxnx}4e)>=p_S~%1S`r+o-E3I0TCPy%t|?e zPKe)xX@_PSGHAnQ6kR8$1ykL}A9qBAR&sq*p7?;V@TH5Q)`Mnf9ZxPPSQ<&jhU(mo z7&#^oviqpNTP#I?m*elmYPP>-nNQNQMEy`WP8-_X#X8HUv3be*Zd-Sjq9$?uC}BT> z5zgZEs*jsJ^4S6`bUEJ**>ZBb7B+B|deD*7k z?WrEZ4(ZrKN!iEOr2E^$-RgH=u&_Wl~U@`>@a9-Mfq{FExc17`MGqgt=Ns zgP1qIVCf^k8_%ceW2L_lp(XZ0x%o}5dwXwv09>!BsPMVs5n(2a#Qs~Y z%GIjdZ-?&FPWAMhz19ATd2r(TJM9Z5-(N9zbM^}x2ECtK@7$=HGT$)K05qfVRbw~S zEl!RdnLB!Ea%647wvVg+tL6B`&0D9??)C+r-9K?=M{UE+_9t_CZgn;6fBA!!D^)+l zO$0v4$(;D>d#iMJJ_y;5mpuD*)~$W9tG>87zGv{tox_eD{!b#V9De)7JvkqZzy591`+rz* zd*kabJELq9Yvx}1%jDTt20z)qV*4LfjJMq0pYh|f&VKLcy0t}XmnBEx$DF0HqmK`+ z%D?&P#+-riwzi^$H}_6niof;!ju+ckwzs0cUprLLylQIlmFq=6-ab0g`q72CfcCU= zkG>OSywm!Z!6$~-E-G46V(guFgIZ@kbiL@v)+es+ey3nmXfgl!2j+TW>VElF(E3rZ z-S*SzJCk!Rt-B@lBojCLUzp|FKJGugwea>QKScfggVFKOwdYbt+3mG2kC+B>HrzV( zQ_d43k!N>bvIO%2~jp4EPRcyQ{mM-%DP@hknU3Ad={w)#hXQhU691&gso|n3y7PhVS_Blm>EhvHNQw8{)>iH)3@el4C1s`R><`e z({)|tQ~xB3J@S^#f2X$0>jaT9z5Yz!_v9k&9pC0h<(<~G!zUK5Ee(VWe-rt$RO0s= z3)e&jU*ocZ2m8pyk%t#-1$D0_qwzchV(}1&{V=TcR1H`D0scXZ^zmYV3H}A*qjOI{ zeDnmwM}uiwHs36q&T9dz&@!Fe0tc+3;=P5d-rK|EJiUk6`qQ)l)<)25hi?4EHOmZn zt#N1rsk2VA9|9{gx)0jyDa?U30AYlb8?-rR0zTNyUt|)eA&kkd4nZ3d+RSpD<37~w z{pm;7;LF)mJ}qWZCkjdei_|z!QNhT{*8xB%-?ZVcyj`&q6`6qXZeJg9%|j%xFB4>Z z$mgOo?GsFT7z_uO+JY5gVmUb-szE4L<0DNgwc&m_7O;s&VR5m5srZ_9R~l2t8y|bC zrk+VrkfL5`@G}TmEmB?{6<41Mtl+2UzSHzGOvO(?1mL_WHN?SqwH84rSj zhAkRZonnpm2&_N}5e}av6@#qA)WGkyUy+q)u4GhzSEo|bFNsNXO4WmcfEtr7gwUu( zz#}_Xhn7(d4kAVf2nY*qOKIp#4oT$#0+r6nit~1Q2E}E{QoU%PXgt1lrU}Q{Ip}~*OVm8s- zLf6t~dMykWO5gJcpMb~DNDzES*o9r$+us854rzdLjFRcqfr2-IWD`{7gy@5d$Q_+= z0biPwocdeoTX+!>7hnYy@qUn~|PK#@QQlkeNjq zMg%O2jNSH1Sb06L*UqlN9~{^6i-TE0q%W@ixDdv*GV@!U#l`{h8OueggdP`?s%f`> z9o=`Tp)hhIS#?}@Y+=4^{u4*tXO`4(`-rmpz}<{jZlmyWrIEKX(VP{HhBsUd7(Zzs zJ4wrkBolHx3Kq0@l3*ZJ+xXc6K}I(U$R=^_;n}pNl%8QyR4U7OB_%rp!X}L95(43Q z0?DQYMIyITWCd6r28FV6N=3YhDX0S>8oaPysLS0DeymM_MG|GI?XY}(99KjN;{FfQ zJ!nl0xp4|S3FNd-`8BaW) zUMr}Khd~~5Np*E+rm>l;d?A>KN2YFe=8JaD&R7JSse#uD7a2hG#)f41FtP$-PKUm) z(@)7rHeOZz!mz4xRWz%{%1PC=C3g_fLm1Pk_^S^&xNPQ^MCt73&(t{aEFX??7~4EwP2zI)m&4D?qGNgqIEcG0bPvrOYV9dKusf5qQCLd07FgX%XXWRz%~|!U@YfvP}*tcBzrFzVeHptWl<@ z7O?>lQ)PdAQ1o<`Ny9YlP}@>wM9HOD>Q02s5Y6P%SSDycn3x;@R}y$NHOgl0lOZ^u zB7L*`F<`?h*U{%V3_#-1qpYy60+XZJ77;d~K809aN9S->ynN`DXJ+#ifR9HYA)`WA zBf;Y;F+~t&X!2Wf1(_|!RJ(YV?SN52Ar&C=FF>g*6DhKS*e2?fG9pKdB22g)8Jn}z zaOQFcUWKV05Yr&M?0`{7%;rQkcY5!jQ_ny)6tYnSasVx3)f%6wT0w|%idr-Nb>ey2 zB4iQV?B$8riDqe^gYp=YKvFZ(QGJHZ0&B=mU72uKvrR-8jIC7ld^yoKpQYH$t0;e5 zTi>D$Fb+Rss_19>VY%!>uT^!m7Y`2^vn{?oTW>w z6@4eEsrLKCTsfD5Xc8Vc8v2TzO*mB3DL8nlIw1c@A)GuN27-tTe99msEJwk4na~Qp zMgKq$5ee`bb$kzxsaTBwqLl2k0tj@m%%-SC4wkkcAXh*;hN)JhKrUB=4o8S&y!?{eKC<4O+ z4)dy{1WZM=N|uq?kYxnA9I)BTf_j*!I0UIu%qBD!nS~#~h+%<|2b0d;kNf5PWdOzvGb_3^S-iEQN38DsWlZ!KW9`tZqcx&-@Rtv2r?L?m&FzxQV(tm^;c~!hv~3gCIW>BVp6~l*cVbZeJ`gUkpKBt$Hc+A;BWZA6EXcg z^~(oN`RC#JuRnkOJzA0cLz-Wh9tb8-=z*OSaL`C!|8vn!jQFJp4$oHMFxW0LFr0s` z^}iI^PQw+!4ggFueTwjXhUlli1rcN?1{Vp{W#~${zA!ip?BRc{R`_$#P}6644O~BR z4TInTuBU`9fJ=qm|G5Wtgpyvg37&5@*9Hbo}?R zmD8tVgOdN_(Elm|JB|PE1mT#MneK?Y^l-WW*qc5TieV|FOapypr>Rzi-mN|G(qhiGSVce_szlrq2FfR=l-n(SO?4FWax3`@gLC>q-8H4*j(! z|3e4;Iwt=^2mShV|N9R5bqf0T{e%2E1^tH(`gIEW4;}RD6!h;q=+`Oe-}le2Q_z3t zALQ35=s)z(uT#*!@1S3&pnu;#zfM8_p?`jzg8own{W=Bx`yTrLHwDQio>Ih#C75bq zF%_gKip%Az26&n-kTIH02W2|l37XP1h9m-8hl8|dp}h?#Lg~#s!GVW`GFtM}u%O9i zaOZ`BPOt{{HS>b71MT>_L`acn7O0TQS=cV^JQbB0EQoKSdC2z>G6ove2my!zhUwtF zj7FwuRXLgG!$75hu={DsQNRhSxil`5l2z$6DXLP&qgHhYvmB4O#q9j5V$4fMVuYDO zmDDa8GB=E|L8w;E;?44_Jh20%&7=Z&S`0hA%zU1AXJ!jXDnnX?`~zsTXr))P6u|)4 zr5XGUt5m>t+kwkS~P@#z``8vaU3&?E_|v`Pofx+z%R zyo=G`NjyWrnyGLA2hJ4A%L_o!ze74j3bpPG(ad+ z2n`fI9b6!kJ1I%#@?^*^LcW8O34}tTp_-DTxM5}I zqzZ@M#PCu~k-&;(ms}z%Gl4?pm&et&tmb z4d6^OsJ(}YR>}w@*;Z50Dz8wcIzSU5Vq=ZU**IUOC~KxtWV)U&qm>AY2pEGLprVz# zcuJsB0ACz8#epx1GVF^hMd4KmrL8h}Z^rLDK7Uac6# z(nbD}Odt+7k!<=wj1XjJi6ASt z2Kabo2gcZ70+1<$bW$*+J2*`PO&}Q(3E{n>pGOoj^%aouXcW_5Fl66Uym;9`NSzVY~ zTp!3ca%`W(_sc z1#?3i&jmdq&p1P9rXV&qpSLa~8LXXuKVpYHz;fA$cWth66^JI-cb}~Q%B_EnM z6p>{3CWeOzqn9Z0_7IXEn||cL9a9qL#$gc!; zx-+Jy)G9o&jrSgqEEn$H79;OQrCzBdVc=*9F~BI(;-mQ9x-EHKR2W;q9-(6gc1Q-H z8I{PZ{CL}Z$jG6Pl%-b}BAXbTSBWfSig|Shx=lW$MEEi_6GN)1+&B^|BLd1`0)p{C zoo6&^PSYYVo2Z}9e;>hf<(yJxWG2fItvIRD^2L>aS;@_m%Q=QqYt@bhCdaQLbLncV zpuRl)F1Z6{W(uiByL4hT@1lGan1xu)$d_qlCE>fUiA@NE1{ z+%3gPjq{igwbw6H9M;ZiT8T$;u`A*R!h7SM2{}gg3)S;NNN-kvkT`?I_sT(TsaqBR?L|lue^HW| zPGTFCj@nXz(ff$0-pA^LnY@_V^XeSo04J8y+?~8f&x1ou#ZKPlu5P3qg=ivH*$jdQ zTZlbI!LeR;N_THNv!bWDMXqLxkEItUF(wRzc*-umqRJ5P8Yh#LfB8^=Jg;M03_BxJ zJyN)ZYAB=Y9@;@V`Lkp$cnhb+FQi|>4u&)ReAI7&!=*%MN~0hFnxXakxQe^Q6bifu zG1A2Vj(r6TJq1|xI233H>8|#&2#N9``FM(qHM2OzQ!b8|GkD!`(CwQorHr>nBA2mH z@C#9~$m{nuXwWVU??hM{S;I3fNY;0WyJSknLE=O`oTNT1@`alTB+$|>o*z%S=g>Pfza0C`~< zp;^twqiC+s+gS~e7((=mp|~C;6cihp30O;>;0c&-@(2xsnzSzwWfCu3lsrD-?7cif zie(^P;q#F86I@EU1y51urKmThzlIVM5dww^k>V}Ea8c)A|lxizZ^*$hJCEKnnh44 z1Vd39yDJ>(vVx1`0bmBtVJK?jD-`Gf$dVIsX0XB@iCNO&RSOnv`D%Ogpk;DNMn~Cx%dcb9g3P6>jHYT2w#f!i_Bv7VVtHvb*sQ^Ht75Tm-<-U3f zNm)v5%qyV{To1+eFlZ93QI}(Gqij$b>M%SKM-JdxOl?OQ0?#8H(p<6`zMEg-w*YAX zup4*#S;U8coVv-UKsGMCAx|S_kg_TTu-TDl^?_-p(CN&6uEnQShAV+tApze4-u6=N z3Wuz{MuE@|V(Dsu3WV$vLTOYvn|K#3Z_qi3q)axj+#})m zG5n=qY?N4lMq4oVw(u}CO-Gi~4I+zH1N;53$OgxjIPehgP8GS+4Uw1`weWH5QSEyF zMkO+!RafpMY8la9LJTLNVmkR2j>@4;qM1F28q_HIf+a+MG_;to5V+`YF*v*ssaTX| z3BDIa`B!KzQ(2`Ht&hEfFRP16%Cqd53=NOM-zf!i$>ihXC$_eFCl750_Ii2L121oV zV9Zgxf8LF_gr`Ct7Wan_+m22BY5e1ntwp!LJhQcBypAfGcYW(uQAciFe6H2Lz6(o! z^|QCe#e+Z__)|!Y>9MpN{ML)oyA$T#>%Sjcl|7cR^2r7&2OBPW>^UKOW2^V+dUaIq zt@7%XudkZ*{?##ozkz0n^A|)OD%yE0b*g!9?UB4g*(F8PThGn={sD7DMp*rx3+M>y zj5>AWkDgV3obaFfV7__QIk?v9hav}j`Qp2+N| z?{19UIv4t+Yst~5p5X+~s^4EB#ojiUUj^@~&4jXM7 z&R&u8mz%!eBUnPd`MY7`hSsp`%?TqJ&IjU_PKKlV>%ZG}!}DqTmhnq#roNkOsx%iq zz3swN6Q88D_g;T$aw?=G;j_PvSHxws4Q`k?{ZI4Yol|Fa_-d<$y?=P(toiJ%zj#+2 zDqL^q$9t)X7Y??bx%tkHNfHPW!r7eXZPl#>Hy;0|`Oh~T!mB+k!&LkekGHNHdt}X} zkH_n@hU*Uoa|*|wf4B9_-;a*2-;(pi^}znA1-BnHnm0_=Rpu<%5;pbX$L*t|o~=`1!wKYPx5e76 z)X0ZTgHPZ7aXjk7TPI#uqWBc?YrB5{PF5DQ9~xr zrQU&`CTh$7k=DNK#+@sVWXx}VduSGu(|_Ij$4g0LPZ`b5LN?1?^y&Bxxqb5LC;ydK zn(1=vl($-jnuiA+qc@N5{4yI9)kmMP4VJu1-yLf|!oFtzls!02q`)6E)q<=tFeJdz z2An{3*ZLx3#c6BLHD|%A=7E#1*|(yLbjj%A$j3c_Rkme7rocu6_h;#%KAdJ<#QMWN z_s#zz(ih7`p^Fwi95~nwRUh`89;(=Ua+)oF@_shz!vNTj7Gr<(d zIOxCn%~0gxHA{o7(_{)AFwTd7r9KkrJU#r%veU!zlGDQ?>I{qI(btLL9A3IY{= zaGDR_I?adw;bx@sAJ%inKQoQgF9VNJ5QbiO?#hrOvi8T#EO?W$)n;(ai72w))IHP+ zwmAZrhAw=2(fg63mzIIfC*v~G&7k0N&C{T-CvZY911GD`CMu(uR~gSC`c;VoycldM zyDvNdTbR40ba3isjVkJw4ZgDbewHLlAyo&aixUrB*mecXM@bop!}1s&$c`tvaQ|wl zKHAYtYf!0?)BcqjMQM5(CC`+zD9A_|d3r;w{viUTzI2x!U{nbzI0rD#i5MHcp*-Z&+PF5hj?CD&zK^g{Gs((fmlQ$FbiX>+omM_mjxV$)vO9vU z*lh|u;te0AompfpvAJ-VkFV}*N%xozi(X+r@tblL!f65pmoZvYXq5V6J|%KgZz1&R zN=)rROw($m1$IBdrl5Xac9wE#4tYZf#iV3sRnT$G_iW2cQ z@jC(i!gqTekyr`rl16%%L1Vc;#gJS@FR{lL=_5)mH|niSc1u4kXVAHfsB_EPdxbhG z6W$iV6g~rYV($EMFD|d?^C!{R?m|D8OMfkc@J|Pm*(W41u>lTvmbMpI)dCRQ$LtqHJ?JZpy2G2=~X%{r{i)X!7{j zMrzY0-_P&!=G@5u(6N7=g3%eo#C8dF)fk=t-HImu;sQv0hFF3 zMsFvyR4WXHV4!71a4*M1N-xcV;0C|K3xvO{gr*_)KrFZHoN1{t1|3A$OiKN?!^#TW zxKzQEurY?tpN6F+=(>AGFJj=5LjojyWV_`Tbf=g zenV>|da>LV*s&C$V>z9yYw+(O*b3~U0~q&f(u6Syb%*oP3#J==rA9zHDX^PVuEWSPYXnd zn0bztK?>9dZKdUKBgGODz(OTrCgu}P zs*y$^6}*uUtuRpyHl;(r;5agddd&I=QSL!vT{Id;6PPXd@ZjH(W${TgMOIKomNfG| zPY8hv7{SOOk$?O8kTe;1AJ|6#u#f2#lKBwGgq@|%@d_74DLFqRcY%!IG&&Eq5DhvN zICa}$_KjU;1R6tGlB%N%(56{Xj6@da ztl>Ct5v-GiGRfd7W`?BYSaL!t0w@A=HeyC#grXRr`aT6lZon&8P>ScZx zf3#wiR(PL0+(_DjIH8c(PUhu(%3VgPpn1N7ug3zQ*N}>^UjLW9aJDCllF8{S);x|@ zQ>AoiE_)NxQm zGQfI)f0^7I#_+j(tS>%7cnf?{5-8B!3qKdO7P9nH6u5u&Ks{K4JQAp?vuFWAdx_GB z@D&ifG;+2b+LU`C3RbtE_Yga~2Z}_LJ`eOHGmB16S7zCopfq`|298>j^TZ;A4yPLv zb|Fspy!`oI6vIq%MrbNNAEXG;C}m@13u**$UW zr?>5N#n_zJQg1IFyFF`GOIFQIe9-XE`sc>>!`GW0dJWOG_Vt6h!Z?kdnV8yfw{dLe z)wi=l74_ax&AKh{rvu}iNIf+spmA8#=CxVUYZlRqRHJ<-yxihQ(($%47@=}_H+4ShjQFa|DsQK5$=|4Vc_zY^tbDdpRAMERI zd$&wCyuS92!g_N2)3>UYbRnbMaDMe`&{zgF>*aiIwB_F^*B`!a0JsUv+s^x&;@cLD zudo;G9{;C$>pStI#Dcqyfr<8x#L0@w05Zu{9mGKF^ZD(ghyK0)jmcH$+kDpA?(C7` zg&m-CB2!$n==?S@4@=UsYo^jiIf+y9&jr#7VSpZj~tv^OU!(9cg@J=Rrs z(c9|<5#IX)e_ok zEnT(2yp*$}g|YR4spfB=C%5#M`D~Xe2h|(&m&ZCAzP{51j>+5~oVa6o>2}u(qb2=+ z9_gy>jqknn$EKb%e&f5WJM@qvNJg743H ze%nvGto55Giwd*&!SzJFZRqK|tk0%*e)DZj$D*r;hviSrBJVyo`um+NCtu4S_Pwbd zR_5eqkK$YQuOIuN@@~~AL9WcLzc#UizFsq>dFAuww)cN}w-;}jo3-SA3c7J#km|7X zgq4POLvy3*9Lq8Z@bLv28Xyqc6ZgEu9wu6`HNdwhJ56h{4(I7T?))w!j_(9+vYb2TCRNsYdQt_Vz9vY!4F9QM<}U|m(yXp(W{$n)o6lza)t>ISb!YEB89b(pPR>RlSAM) za=>KQAbtU6fT2F3RLj_@wSGMHBn(Ke?MRXUpwBGi28{-kSZEOV%V+*9_=MO2L5^8{ zxRq`t9h%2xU7Q_GuW3@q2&4)}w-TrEa(LK-g9*NbV$RlV1wA2eu~rMkOMkmUYGl@C zEOVX3@0l%KF1FvEqm;FVDWqz69Mh+?F0+5_$^LTHS0qH=H}ki!RA%q4dobF6-1=R8W~PQB;&*m+NWc8 zNNtPUxY3Qso^5jHs+64$PbM7FOlP}1LfrP1Du!|8F5I!~TWRwcv_q%|w? znlVdD92TBj{krB#gpbhdh^XT;8ngWgOs((_Vf5$sKlJcwDTkcaluLmZGn6mD!P2x8 zH-kPqfwYkZ2#FPAs7jF3A#6C#dUZxTla66MB`a75ha7;xIyr+#*wY+W;}RMVpcr9m z8*;guk^jl1XqUn)1?xt%4E_G#`9q z32s9pp!iZ$Xn0pAwl=iW_&EyJ0Q?=Zyw#7e=${R93hi~<+!$*=S zZ2&Q;KLH<6`${~BWE|&=IQL3tUYJaoW?Gv88&HZ_%obdTFRpB4pshqGQ7dT7Sk1`1+lG0C?&T{}y8)FxIrMt|;>F>_H$ww;M*C1mq=d6Lco zIOHPXD=HQ{QBnIta47(+_8;WkMgD2H)j`%50X0r)kuID}M1AjxNLI z56og(z#F(_DnaxenJX87C0e!<%|j9J_UObIz(C>{2zw0CQ4%l6F_sV_;7KGDApTh- z!mycLN3Ki|c_B`S0sIfB_<;}s0Uq4HSRJzgFK772_(G9cf-2;Xz_rN$Qxm8TlVLDW z2Z0=HSaSMWj?IszQJq==w4SPJZ&HRd5!dvw9fjP<RTM1hJWP zBD{ZBmRKDIKJVUH>`tzjL;*l7vy5Vxx!ZFk88$)HuT$d4iq%Y*y+V=aP15NBQ}rF< z!Z{X-$c0qM1$S&R$eGAC(DH*2MjW6L@{YEl$@1z(IwOdx>5_OxVl%*|E@9pY;WBJ7 zSOHg)VOcKEkTFr%GX$}>p9kN6tDVzOop!GgqP{m!k?s2A3mDW6QMW4W{OjvDd*y3H zp(!0+%sMPbRk=9PhPfOcH&c6jQ50%S!eUG5naSof{FS?jN=)-5&PsysMdTQZHVtKO z%KzeH7WsSEVr{Gj{V{HUW_ zUVQiiyt6f!_3TuqzoUA5qNgZz!l$whC)=+F-#hu%!+nv@jVW}I{^^H~H@EzJVfnpM%SRZw)`#54E5-vzRhcOA>pK9DcUl8>y) zYCAT%#HlxyuIaX4**RFfr)}ZM=5c%3{?{H{zmNj;c!z)M|M5q8xqk9s)lk)qkkDLw6?u7>b&_Lwj@x`Pkj23 zo@{+;&(PgJ9`vZVdS>$c`RHw*dnN+6ub)5J-s5Uc&g^Y#yS;6!|NYOXFD}(rjt#$2 zJ-leebYSxQ5q<4Nav06{;@A93Q?=*X>L-4#O(5fk@PqG8{l4{E&$S=!Ql*(AnRR#9 zPako0-MkM1w!Zz;(~tekjJg(gtxP_gxFcoL$cnuEJB=Wy8?*0UInw*-^e3Nv{+}1e z=Ni+CpLKM-IlMMauK|hDq1l&x_3w`FIH*@m&$rkA@o?9VA9aTf|MpG(+ox_%?0%54 zbmEv#5A-l4ZS?5-J#F>3yQZz{>giY3{&sD``a+v?bk_3g>nFbWaX&T^PVILMyz~a<)nMlSx`!oI&fy;T2R}G0*VJJURzi8>OMYhO{D)L)uwY6ohZYwh!M>j91+^lNu`_&Qkvc)oNNUfsvUQjjzulsWFukhhl zs|N+Jom~t9iv>eyMtY%@`?eH0TD*kgSG!}UU4tTI0i@t zY#`#eq&B6h@7(`A#6EM}4EQOo9^IQ$J=g%Y|F`KAw0(l6PY|tD(Psm=2Ly3(VD}gJ zVSl|t2s%sv4s)C5HF+lot`JecH_mAh5T&vWE+EUrAe{^_M4s};qXj=z4F!Cnh?&qW zpwpDrfa6XJU}19Rp{>3HzH;whh^N*ds9>Urv^Z!u-Y^nby$z=XaFNHkScyiE&_swA zvvyKA6i+&MulXyCsdnHM24i_Lr{hadM%Iw@6&}S}0&sysUHGS}6ft-(LNuq70&AtB zr5H!61Sr75`y5+#ixG!L7P1chj^rgkT#1>fLfEF}=_ZbBSjLMqFX75gBY}G2;21*$ zSpQ5QX^`#9DSeP_P%zmf@8=ef7$ii}%K*_uMl|Hzz@$sjf-3bQFIvil5`tVBjaRJV zGC{V^Aj)B^5b+r6{}+*@ z8!3EfF~x7hrFwc8WP$cjn{ly~^9hM-3G@nh_nAUE^wJG2UCe-v3?J*z_GQyZ0M0Pj zt=)u|WWxeNt--P#+S>ptI|JD`nvo^}YOELfZgSxET^XjwP*r zGUQ7;4YD}mG4TQX08lF5(-NR8rkZCw;sQZO^c!59C|;7*`d6GmS~Ez&jgb*I0`mzL z2cZUg#i_#Y#Znm21SqC}MDUO@-{S@JY_U>S9!QIMoIL!I-e^C1GRh*G|^YOa5}Xgq?(xUM5YQe z0i9(U)!ZU-BP}$gDztH0f#ZkWa}nCzM8_E66K)pI@|lhy>PCO=Px{L3!+(uv`+7OmCl=j4|+Y%pB}Xj)fgGfgces;UnP~8R?cN1c{nD zMnm2s2zj~*j>GSP&?efk;f7o6P~kimg#6E9se%AIa0@}MAZ$<2QFLaHh$Ltm50Zs> zUP1|?`Hv`!g$!11fcaRkR9`N!Wb>l!u&_jF7Q_Y0?_e;OiIUzFrHW%3Aq@heMLq=4 zD){5GF3R0FFP)EMx3zZ#9GX0pqf`% zn@mBJPO{d2$cAUv#Ml_z`a57(;*oQjFFXjBE12^j<4!+&0xFj0A7hCu;12Zbdf1SoTJV=Zh-2G4_m}y$dh*A;Q)+!egQMZf$jBG_vfJHMxz-2Te z5+OWADP>AniYcTb2(Uqqp)g@V?MP|^&Z6KUETr@GoG{#As^|$TPLs^BFRZx2Ivg&d zf-6DC2!1X}LwS4zsGyW1QMheDsiNNSDl5F2v~I#T+fkTIq9)H1t#Q+)rb zwNPCAEF>CFCeQ>DQ%ZI4mEB`4}10#NwzW z-l*O+enbzKwn$fk*K;%cWh6YiHMcHdD`aJN8d-ZBwCX11)GV>=BxR9`P)jP+YEcE9 z0DV4l70EhxfBCCfj)9z2T@@p2T7B#g-Pe{eIo4mVop>_>RD${j!Vac{4MlSuQzMSl z=p8-Yv8vj4293mZ>h-pj2S3Y=ZW#UNrt~1l;%)l8o_&4i6@0*%A3Z!3{Kp@#{=~2& zGpp)&=45*~5b2D**JbJ%Ev4-ZkXLYoCxNuRIfArhV z>H3G)-cJAIS>kzl$I&70(f!>+TQ6MSRZ4vyHhB2WyYKzh-5nefI<{Z~s?|k`k#+fZ zD@M=%J0)%Wts1@dfs$BkYg3%~ar#+PJ~pz!x+hpKjGp!VdMkze!j ze;H6XuRoj~`eNbUng_Xa^(7zY3=SSGnmu~lJ-rg-b*3msD|Y0+_&ag*^`X6^daM^e zy1M_?h!Kx=SO-gODWM~Vy` zmZ=;^D7+sY`?#atG-!-i*xd0+PE<; zd`tA5sqUeF9MPwZY4FWMDcX)bWeE@7@4mkC6~}AZ@us%vPaa^%<=Aa|P8^N2bnG0V z=%OVfeJ7?*K4@sszc`K)MalQycs1qEJ1YkkEWM75u1(Fd4d33I1q~kgddpJ}*>(FU z@4qd3kS&{rf1ld&-1!f=34-+&ZxAGKmVID?1@{m4{%032mnlB|BM=h z9R6t2idujmQjT0e2F`?|phAWV1vu^4{uzcN2 z9`PS|)=5AX39r`S`R@-=@mb_1$Dg3EWvp2V5RgHbw`-Q5{|I!oq#PaA33@Lm=REqR zF6-njKp5@PfkUiXaLC%pca@=+W^h(5_+D*_09eT|LmA0ayZ&!648Ug%n*e15wzCUn zC?mtlbAXrv8|a@Y0ZP9OLA?b4ruP8JbP5Ks$IvM4Curid;eyNAtuv)JHq8)5)pl4| z>qjHN;AFxaCg2D(K|g}NNAMaR_mkhXKp6aYYN@8eq4CEew+ZT~Py)9@ z**aXww=1YSEe0+fqi}k$Cpqg74?P-+ZESWx@lcSsfwc?N-;%9)REU-lyfhVyF~PD| z7vJLqE9}h+$wm**$}~J4hm6`Lxwwj^SfY(KCT<6H7UEeI2^a-R;B*pe3Ahn`z!Isr zR5QC#&$|(^jwyhf#M%!=MGUHxuYQjqG+y!7HcevaGmTP z2iqu^%RP&S5=m7qcz36q)D2^{DkuaN5CaxRgwh&u4sL`s&J8dK`rIcIG$vH?rk&ZmAR1{pkht5 zCy_N!r-fJ_k%s%}IGWszNVUyu3(NX2xtDFW@cR~c${SrRHt`uLz=~%c{g5PNL;|+0 zH+B`YOinB4t=Wbb`iwW5J=vOwEBJ3FEEhDd=5nC{C=ONk7W?@+AE>4{1qb8-3M01= z#OyWCU8H+CX@~(==a65ua21YqHGH?p{XNbQr(4aUgV=HbLw zgIDit^dJBQp)@Xlf&-xi2g(rS7=07%XCyR2Z=?%hifPhFNs)uxh)EYTv$nsPAq$Ww zG7KeB@Y3%{F_e_5>jg8ih>Lu_n>3dZ(q+C6mm{}9_fTaL(E8laia(_6EL(6$gMgKE z4-ithWt^yhZ4p%XF*e8 zbqkV-7QE1W^ah?bg7MW(7u~dhs4i4SHeVcUChU={YLafMVseu4ca50UL`2)Nn_gVE z>yAy9QWYY?i56ubtRMh*c zhH9k{M8LKRKbhFc=$vU7b2RBWGe%^?TvqZ)M)D->*^Zp;`&DbleO>3-Zkijt~ zA;58`1M#w&0BgZYltGL+P*?{sG-C@CmjA8X&)cq$$9Dfs)hp0Wu2vdN3BDj$wy5zz z%^aI|Ub2*|F^0_wRyYH;O^~OBTw8szP(q%zZUwHNIu-ya`Y;sM?m^B`+9q8UwvzV1V|VK>UJX#iRQ5|0i>*kv=Ed|42(i)v>>9PbP|oi8CFyVAxi-w zF+(^oC`h0fQf_;EMmbv1lO`j}K}nA6^j8P}o{7<^#S~PMLq4(uNOJHu@FfBS;o*!G ztP*RUZqX3p&=!FFt4I*dP83?OxdGCMW+1Dn4H@BltOI8?Kv$$}0$;00%+l(vl(eg< z_}lO>&d8l~C~uKzFOio7Spti$8{VB7Bj(Jq?Ua|rL{MsrP);||Ask0zyi~;I2oh48 zN2R(v<={eOVd=jO-nq2njeqwQQMMJnMT}!)gimv@yBBk%0a~RD#sBzIg+0vK?|V+Bmt*6S#a5^ zb-`#D7~WZr8Z+T}q+DA$NeO^vy2!sjWwquQ-f+Aqh?-GSWi;y%) zCiD`%6e>44=+lV#45K*)GmUIKB;!I@ddDG~%E%H*fW!)8QAHjquo>Q_NcK%Jfss6- zX2potOt0bNGbH7WB-*w3e}_03p>{S+bDVM!FA9?$yizNPBq_G`92%30gm^tW)CQ_r zYazsukST*>#Eb}#fM|{6fUl1ZITkBZ|AzNuOA8osDOO2>*55P~?hVXwi@Y;&u_#80 zIE5EsfW#R_fshUqt%NW>2xMc=XzN6Xx|uF7gkXdLXUUum@gndRV3-K}Y72eDDx)Ay zq=B$ziYUNZ0Kw$pK^!eA158u77Y6+^L;)#6`4|$(0Zwi?=qbwvs&atB%oI@j5zBBh zZCbBzP`eva!Kx;?yt={gu@A6whSYtYw6b;U=_>jo%gd@kG9&ir>>%5Kfa0OPMrSn& zhhrUpUqzQFA&8E@g11syMQ3(x55hIsD+Pl)f!s#$^L_Cl$8f?xgc)PCjh;BXy0lQz zdU)VgZo!-APUcJK&?mHG#XLHc!Q-5S!k~?Y;9f`?hU{#9hStKXBLv)5#){jr9Sz!I z9+QtJ&h3_?OGp-*$G@6w-ap6S% z*u(3}CAR#PJ*eu&6>)03Pw*=&+4sg}?>=<( zp&zsSzSg$-k!x@39qriz$Ad-d#{(a2d2OoW?dL67xmQ+>9@>>ZZwzo=-wZ15zOmy( zlYY_2?B0Cp$DbyCrRHV4L=?Hk=jQzDnY&M4dj8rglSS12+{q>Ctk;LvSDhU_kI&K+ zwVZ$9u5Q?QJgaGXxar>F>}khniQ$iIebYz|{k;16o0oI%uRaz1$I0VE#4-KYEz4xT z_o>gbu1~03S#KV5jrHG;X73xb^Og7Q^Ya^yg^h%DKNWplIa;?q<;p*9A2SXbk4~5U z{=?+J+5Br`e~c8_N7q_cuE>97kn?BVe7N@Ku3-DsKhS;tC0|^Bc2sbImdv%aS!sjE zjzxd+fMD)EJA9}=|Ci6RN7pke>HMitp{48hJC&2?iMzF9fzG9!U5@0j*+2D7DJ>np z4z7Hvqh&ZeT^~D8vg*3?^1#r0Em;ZQ+in$3hZhxvKYZBOwQVwUy~g;`*B?wzPRB1T zl3!dtu!`EZD%v~J?Ty|we5k0SY+{wJXy%~TrmAjTSB?K%b^Y4J^0h0o!Ha%&^zx>Z z7p79q7Ilt&vnmCflwY{kaQ*sli))K%f_mrq7mC=A8t#YvTr@HEGn17)oaxw*xpGAo zJ=zsl6qwX}mH6jfvbS}T{_4-YcNe}~{I@tuB(M~LZkFz_xuFp=%+MEt9_ZZw+Y@~X z03rxTC7;1cnOX^l^xk}1Q0_G=&zRD!X-s2IY%5`5C16;FcX3IY^WHsH@4Xur+2L&yYx0TVC{sJoXOa6;(;29^q z>%K0`nt!79FK}~l0cdr(3W%rrqGHEy|5e?MZSnwgv*Y1RIm_hC?ri{XKKG0Yo3@f! zrW2kSsb1}jRBzi1TlK+zfmce^ZTi##@borp5;SG@efeqB=ZnM~!RcU^6GAu-H-m>N zB(*ZZGgF1BC`7?R+49>oB!j=MJjY`|lPXbFkgyy>aRl8dLzU8Z;o(4QuADjcdp5dVi1&4FCvBcWB4n&Nvwa!R(wiVM5(Q=eNP;1= zklBb+ZiX5uZ7~HG5)hI|&L&~^6+(vh<;}-7s{xOc!7i6 zM0@dw$B-`r={P}yTiptL_(;<|fexjC(IA(*%D)U4H{e!6YnJq20fMCpXuT>|xJL_s z;k$u=0_WFlze%Pmh{0I|2y~O7^Zy=uI5W)CG1XoQ4X?|j3!GkD%TRl z!x@7(8i}2D&A*A15Uk-)D8MTvoqiaK+hD7Ct+K?CORIZ`e%cOWi4^t?=I$|-60a8m zsa};%C%(s%T{$wj1O|!uA+6aWj8GBE28argW}&4pD&1(2#R(xiic7*8X}3&>VZ^CM ziUL!D=FtopzTL~t5@4JK5jAWp3o_YHpOJ^cEs%zJB6@oaqpWvXd85K+-Wf?kCJzM%6o>xq5b4RCU8X`|GAQ$RdE zPc77{^fcf5vlW>i3JDbz(r4)SMc59xG>NEInwZaUw~=+i84QlMP-%TmNgaV`npLw} z!U7zy6iFCuKkUo+aOsZ`#jz3Y&8u#vb|!0&wF;6r>X*l&)0!Nig~0s8e3<7W3Ou$l zniWiofq01E9@Pzb_OTkDay#K}AhH>{8YVm0W~%ZEFSQQNPAiAvFyxbLgH^X0)FLsG z3>-n;rK_dxL13jPYnWEb-HB8F-5!gJYTly`Xi!=vp|0$bu2#GcbM6e|NE{caL<5>Pqo7kG?U;xc_M=|EuwDSrYg;5<#{w>(+T{ErxC z1#~)0R1Qv~2V-M8@dg`4OGr-;1CwL9L>)AmJ-{r3+r*-nn~lF=z=uk$4Jg z=3?<=JQM?gLUVMvBAR-cYLN#{lRS}(rNoY}YP(~=F z$lDB=B-BXCZE!OgBIaW$<{d5xrkQwDc$}<;uh7{CMS7@-PV#J{;>D<$hXPzJ3bk_* zK_yAUWvmbr7{1^IN?UY?I9bK_ABMfShiU@!9wtK4%8Df_X+)65NVQjo)WFh8Ou+j* z((+y|k4HdGf)9%1$e1y}kHI{j>`B0Yo5l_yk#Y|zy-8$+ zxEXvjq3=kf#jy%2L{^F82!)JKJ4rXefG6f7?CR5Mqnuqu)!6f%9tFM624GlI^oHNY zTY-R^hn5+1w3tMA8x_wvT8SF*r$sJ&2ucQ7#V7JA4E>yt_3K2DZPk_u4;Hi!%|RFhk8( zc9%hf#pN_aQYm;gw#~_+&tO~GHu9Boc0``choZbP$bm~Uj>qR>iJb1HTJFapNxtGU zPJ&>3#ZjPq#3K!OnhB0?l!HnGl7wQ#aZNSdIC7Izj~ROW0u)IdpyQy3H#2hbTGU^q zYpDQ#&#FS1%I7q;Wax&WA4k1(g|{!PmuQeb6^2>JV(0~HRM<)qdM7X5`orR6Bz4@l z1KR*aaDhY0ZfKwp$&ll_wb5vwRw`eELXp03e>6_U@@3-;!C}!$IY9lVFK-lG_=*WPJ6!^zkhp{k>?; z0LK^Ix~_iRHaPyIUVEY9iL9^he`DNVd;RF7ZN-kkJV)B(#jBd}+?S&>f5|y%KZO)? zV{bg%+P^eCMSp+q+{jivR@^keE!>YxTfX`X+{5%NO&fp zxou>wB~l%I={{EY4Hbo@v<%?uBVWsJ8vo}rZAZpo!&7^+UVQk~?v(d`jJm%URJm{9 z{=M${rvsaI=}!!NW$GHZAMMwT|G>5l-Vg74!>zwO{5|}lHdDx=U%ooE@`W~N`n^kQ zPH0cDqkYS-pBU2y(>JGooQ2&%V#mpc`HHE$&i7X6|2W!kOZ}Q*s5&7!Y;@J{347-r z#jbb;o3izqf3NAQ+p(aYcvAItUR&G)bg(GP(s$<9Go!D~`F=#TDn&hUMu^3JR+)enzd>-b{&`{e8Br0R#duR7is zXnp?r4^tIQD=R-I-hI$;sJ?mf{xjEC50^cF>y^VUCS~zxUHuEEO0PKwgMn?H-DCDu z0OZ`9(7*pr$JlW~AOFDJtQdb_Px<`*{Dbo#je~DX`Bir({#4=AS7ecH%)@WJcxdA0 z3vlGxAJ=s48eG0Ax@9=b66cP-Jo5dkTjmcvv!Lk3ao@3``O`bcr~fhjk7)hflk})g zx9ie|(zZqS7xnAcJPg~j<^AC^KP>cj93LObOgVM`?b%z_J~;lSo*is>IrDbg>jRUS z`M!?qcJh}M!>*E)KR)W1a`Z+gj_=A|xN|@ETlnMvbN$HZk0pCrK4>T++kHa|4u8I^^wP&)25#Kraun%zT0@E{)6%M)qC1D8iLdb3m|;F>u&iS7jK$g zU3wcxx4&Izec)Fei~e(lnb}*m>8iWTaLF{eAnu#M!EW@QQQfF=s;2m2D@lQp$}0U4 zYNGFLWtrnVU`8S<jgj-S~F?U&PQC+A@PM zX(HA|)GUrlT-lc~8J<~h8CFp2OfEP(qjdAn>}~@hY#aR;m!CBB{tjL~!w>~A;{H{f7b!41&! zNcCPP#eu*vcj{0r5laQUOB*%)y-mDequBo1cBl+(h^^sVT9Oaljp4pj1I(q9&iRky zEFOhbv!1k8u2x)Iw)uZ=6DV#6!L`Fdf!PNyqp5cTHaFwwm(yIps_mv-jY%NKtR2n6 zf~Htmlyiw^Da55)gpfw-=N>f)5xaeKO*4l;arrp2TEH9=NWt018ES z$c)?5pg2T`;Os_o18(g>rI>fN6#7nUC%#LC#39geiiW9oFm;fOl%tOA*mlM2jBLbe zfU40))Kq0J6@XFeO_!Gg$`XW%kQ9S}N^Kz~qP~?UX)TgGcsrRP&BAv?BpFsoDg{b9 ziww)9qG3d*QC4xIEcyR%-FmQrdOsQYnu))n5fe-KtQHd#8M+KKj^&da zGzJTaKDNBK<+ZE-lc&llk2ppQ6E|>Kiy0&x!k`4aMr@>6IRgp+%xJDeI|_;xWyHo@^rU2+09HriT+q ziCUH_JtJ02sF+S5x;sGOD4tFgcn%;3fNTnsRiR)2ma$c|z%1~3D$@o6Q_EQO-)-8n zj<9Us@e(4eS8$Td#hXlD;q71vT+B-8AiIPJvXyX2gQunk{#Z%2Ysk4!TSSx6@ZO8|PN~1jTW~x@9d#pB@=^{_Ut^nn3#cI2o7Z-Hn@GKG<(g{47F2|_wN1)OqlQn8&~PWFOnOud4`ccX%YslLU)&d$^p z4Jfc@ZM_^Sx$!k1Q)~T%wb_#wN~j7ME+fDq2N5Y;-Q2BvRbUOHPMlC5i9%(5-o!XgAKfXvx5ebBmgoN(c;r`;`CV@Bbe`C=`vy&7h~Yz zY5;#*zz~#J8=K5J$Rq@pKVCsCXEg>CN<^t;%{5*qQrq#<-$l8#V$d>)RL~884wYe` zWQ!1GayHszF*Bg55(WmOa!P_n62QGZ6JZ9BKd>p9#UL|G8cl;CGtSe3QcoLBgv=$v z#9T-T(ZGgCV{_~cq8JG$QWp~rl2C+6*u4x--vn~APMDb^({N}r$Y%&)3xV{q4tD3d za5zE|=0MLQS9YEw0Q*+pIV{#Xspc5g-YEbPF#;hN0}N+PAuJ-Rz-f}vK8l@(U9Dyq z_}Vy93eE7QiflN<4~d{qftkUtf*B}vL5nBN zWk51K#EMAQ%4#8_^3>wP!2V?xL*N|XjVthFTRAL@D6Csqi9|Y;J zYeBeg9xeg_HU)BX!!eK}bfu+kkVT#HGHdDA715XjDgKjJWl-xr;T5y;pp|Hau-Xka}_;ynZ zWtQB)BL5dba3Q3`LyG_h!n1(>6>a3iA_WBU)IubpNN}Su`{5*n2LG23>Io5e-5zLJ zFhmSaha_Zd<+s3l#fn&SAq$QaAxSj&YXC9`UL=Z<0$Ug?2fn3ch-eW4$^jueR#56i z$|13cz_9O(i^s#@>=K0oq45tHSp^B(e0(UUEm5Gbb+tlqMIoVfLSjw!s_HBDZVM}2 z@2^yjKvWC(*kd|z9h3?gw}$NqgBr{%%}UIxvh`H5vLT8JNAD@&>f)vF5An$eP)KxC zJfYB1t9eSOKswVHUc|VTY1KwD;u6VPS%au=IkCViWqWJT;Zv!X5qDk6@h`L7a|S!=8)dP&u&4ZA4_$iq%R*dXJjz zhJv0=;-=DYUoOIMDDEJC2{+?{KSVpJ-D0p z;3HKQH303oJ2u`uUOzSUdwwKxbx?O?dTR2^^y?Szzxr$b>N3wb6c)X6)Md>Ijuze5 zcXYItxqq+?*spAPIO%JTPWbFU7r!5JTBDiCYQ>>4WOBu5QP#sBSRo28vJCz6Qfx4} zLq4=(0ZTYx?@%E17+jqn5+_wtyhx9ypSLmy-%Jjh0}pn=`nro;X{F#UhXdjGH{?sRWBlTJNp zPoI4l?8GruQyLZl?-NJnF#OVKga{lJv+C?kH`{Tn` zKM4FWzI@un6{BCD%f2_>f2ed}895mDYC`;-ukST3xF3t2MNgz(?Y{fd`Kw>WmT$iG z`S=@0wx0R}(Y9x#*n3qRUU#c)!T5J|p*6$Ko|P-cet+Qn|J=R(*=gcf2?V)q-FxC9 zxP*VqXuRJo9UKG~{oK;6Hsym~XD?{08Z!FZ_8j*dFX{a>cJ7;7>G$p*e&=LzaLwS( zmox6%Id*z{+IacK{Fj7#4QDbAkFvkbR$@1QJw5-0Tz^&LG5_ONuiWeU+w(`>c|D)$ zDIaLtoqgxt_?^?=Y!5sUxY|4T_D|zqjpY@dUNn0vfiNJ z9u6-ZzJ+2lrtV_Xh;G}N3Qmk{^G7ss)u1NJA`hA6&^*`{R`HYZkkWD&U=EM0+aHudp`P}*Ed%$3dkyuO*LWID1Y0t&7z zFi#2Zlq^ust*+q;dRIX-S3o7DHBEb;=QQPR38&WTBhtqcv)3xnsOFgPqW z(UYpV2T6lE)7Pbqic{zo5Xc(jR{0l#$^H`ain+hhb_;Ta(n%pQCw{kD3)5+UbAaru zIYeo%a1WRXyizlraA;OBNU2sZZ5Qn-k|0lBC50b!L{Zoj79>r*W>$CUjH?XpWAsKu zFA1Gx^nwV%Ix8S>GmK=shMA(P%tDqOVo7k%Ecm2Gg1(S!FhKN8cAT52Ug^c$J3Y8o;%x)lc>h3SZs^?HzNHIl>06}D-_+_;sD5piaS|nf= zPL1kTbwrFLzDnlxYEkPFpcJ@U4-yQP5U_*qf2YID6F?AGCg1!{^NWV<*-WHhh+|A z{d(Fjb!Mr+@)Q9(30H-j=R#E&(x)Pg9t7u!@PX~nMHsBzi?LuAsHfz@T$RJC<~l#W zXi~$VN~t2#QKS7<;BJ0ogE6{>##68$1fxuQu@i{C2ZL+5H3 zRXzJK3~K4TXiIG6+kTxih1wJ2Y*j7(%9)b0R{zuv#eW6ORPjQ!_b7%^S&NIhC z9A0B-T)5_jXpUE`21C=iN~X##ib)#JC>P2|q}=;amaT<^tY0->OKXdxi96su8+z7_paJk^RgBCSh8G^apbJn^uY+7tpe`&3D# zrH=6$m#CI_EvsQuq(hXM((K@*mPlqQtyK$rcG`c6hJL|Lu40TzmdJk6%!kl)G&3gh z-zvQb--I~zAH|UAP>IvJAOtQAg?N*%bm9W+?W)>Xs8!X#3Js(vU& zFOd#`I7SAg;)Vs6ytvh;71+Kg%u~_@N)1{TzynM?mN-e*qN@y+tRjUV$mP)~kqDJX zkUhSDr*dE-oy35-tF}v2>7&m2|Ku*4cujR`?0mXPOGXg9KG7r*pm!zS&eX!p&*{|; zygo!nSqDL@^`K^zHK5|04Er>N=zzP%#RLsN+8 znPHE2sA1aU=J+XklTO}ZY(@s3aWYb7Gof^^m7zHO!{Fn4klQ7OLzCo`fW$SsvZkJW)}cwn713-~I|9MVK8boL z+zo6fve4xOKM9h!J3;Mq07)St5xKeqhEA~xyj6>nMvXw$9;fUCh`HpXkXoXQbu5wwfp-w}8wu{cGQNNA`^1&`N=D$X5}o9QZw%nF$$ViFsI zer?W+QPr%M?7pXJ5F1%Mp6iCsz*iP=$V1x%c9&vV{*pkME8I=%KXX;$c9Gf}U^i$? zWkT>^x}2ic6IO9%OviX)g!l`+dX1IL33cogs*Bk47S}pa->P#By3%~00rv1si*oyS zl|(p8?5pYfIL4*U2mhbqwiWH1R^5#(_#Y(cPi!q7+Er(^NtV@eI@6ib=bm<>mEdru zT5cg%#F&=CN)Wh;Y0Dv4Ii9HW<&x&YkcsD{x*H~^v$Z{pAEZj|2k9N0N z^;4^Q_yGT=(qgFuBM*yQG)G8%K_u9%q(JF| zcJ4&)++H4kRd^+^nwdhS(|Ob`sCePJQWpA1A(WT4^s(zk>3G~DjZB|pryA@2@BG}^ zOP`86@wY#XIhmEq1|Cf)-9PrmKaQl1hTbVnz5ByI6282DFql2-xg($N9k#d@j_y6$ z_{sQzrxTX`nD492lM<-%wTs_LIC`&Y{jH+s4uCVo`Ng!48|Qq`{p<1BD}~`CSH3v< za=7%_@7dVG<41mewt2UZ(J{1f#=5Gj&wh3J{vliGnbDU*+w1!l-Fxln?IU+j&H|Oq zTxrqa(xh5?&qoJdn(Vwdu*E#iEI2ze+a7ptO7`ikM;BlJ z^VqHZr6r^L_h-z#d+VPoe}6aKeEP+2;$lqtK;yi>934OYW9hNMH{SojGOf5JVX%DR zuz+@c(YEfrlTTTaiMF@z?cJR{XLM+|)H%#`xMCk(TDg8~)-zudD~)%fwWlqYPWAf- zgIwd+F}--T=DUS=mFkS;qss$VOGcBDx8E91-f&(ZW5xGNcMLDs^7lKhC#^gD){@Vf zlM9!9de!9}%(Yx?x!(Sa>)G4^&-#R(ktK7^i=%HI9DirDdVlF}@Ae-|n0oi`YsLrf zw|_joWNZ^w_WeNIw74{bMgKQ+CHZ>+?eu&ifwu4|7hx@%-yc*#!IOCspr% znw@q3^Ktr-sWfX2k^RrH+1rmicYk9_ z!bg{t7+-X&<{$5DzI^|F?6cm+`m)};Uta#KFX22$u}l?n`zX87G?8c4)tI$)!%cn$ z%={BKG}b?riTen&SU_JbZuszsv&RJHlnJteGK@twf3DQ|;ckn=|DTN|?(CdxGx`EA z%#C(|;pN4ImXeQeW{pUZd|*HlKGnsdMtj2jGIB!TH3a`?ZpsUPZuzL{&HnE`<`;kL zJ#sO|ixVl$aCm9M|1X&AJOq>7{J9K`{`4=Wef{k4c}OOMwP0*wo%pvo-%~r%FtHje z`(JbZM`T<}#?x@#(*v%F{Ig}F713M7?X2jy6%I$rPSTJ~*6118^Z1S|NQ0J!E*TU0 zhAtZul>S?=Q2acAA{l2#7q`Cn=@I5$R`ji&M(3FE+9&=0=o#Om)=BC#@)^$1MKY0J zP{eecm)cqC0y)7x@O3hz_<;We;I+8wsi>Bh`5xvNm8Hw)83xQ9`}oB{VMdU2OiHLe z=LzHSLKpilsTOb+jLHLNUI-c=XByE>ldz?b4RW$qy%wS>)rYN0Egr_3xF&rO#R+=0 zSYW1*@VN*{F5T?JTvk~@w}ebV1vr9LElI)^DMitUX~-@?2*1cLFW&Fdl|?l*dikRk z`sxP{*0q`}DGZPCvQ}-@Ff}M7i%kU)J#<~z32qY$2N0ydm6PQNRSM?KA}p{|u!P|e z6;drSFj`6$`ci}ziY$mY-Y2qb`v0gGF_X`xG7y3~hanK7e?W`ux|$*q;`)2Y4r_%S zshD7Vkp18Rr1Mh&CQ2P7CQTuCdCc25;^8$cX-^QXZWorcB*dZm!s<+)1wTFXoBhnE zB1_PS`ia#TCLRBU0{kpN6d>O~OLx##sftiFaqTEZ^$U36JTy(M#A^IYr7Qxm@%9cXLP4!hL=3u=+=wd^ZIzZ7y@t`>Di0^(Inm z;a0KeQ?9sTxCC<6?I=%rp~#od2|e_6C31>yW_=brf{i)kbSGb1-_mYUdgpyKgC5`#i;hyGn!7pbLj7ov$lGk>N=AJA$&^-$( zd&CEXG6V5Jh-q2KTSOV*w7Hw2+o>I5lq0J#RY<7Ugb7kfQHwI2C#Wvacp~?obuP7G zke>4{)5jxL5evCgjVmH?JbPTJzt&~vcqeD)YSYy^Ty`_R6;d>!D0#0$Y(gE5w5Mb| zv&4KQg4Z7vga_qm>^|Pp&?>P7uL$+tF1|UlJIvp#>nWZwnNqwE@~YLi22H?|p$eMw zLIf2ilk<2hWd>MvcN0sbU}+B{eb`Ttui$mQjx@PDvPsB_sJd1$i5k1);?(h!t5*^x z=5Ez5Tj!`U-L)F{{j_Kefe@7$5_~`{AWq`I$K1|Tf`ngdW02TMR;tYyEP$1m$0w^e zB5Z|Wu!#gYUiW`}Hz^=4LhXuzAa8>b$N=HmMuwV%B|sENLe!rJO>8qkF-ldk?NwGi zwxZjzO3XASnnU(h6{^GxY7#XilGtPpDHGebLCv>){(vg1;b@LWc3E`b5m1aJ$~=0g zUSrVkG6$C^E#6*_5fKqE6{Ve1wBTk^>F8pP5kcZegtFMmbEK;C#Cy5)7jjEHrB#Q) zfZ$L&{IniKSn)`YcY+R*pvx&ATT9@8yBPd*CnE~3H9qa9B19s?4;yj_Qb?HOEsClP zPYM#FWr;y}9m-*~ONWFq$$*jHikL;eLOD<jESQ6sc-&Dkk;%45A-DoN zrEjhhIWChh;f#(zU{0CMuTm1#^})zbGsgG9M~lQS{|}#$z!Qr(u&LnPl@x>NWV`_) ztyRlHg4=*qV%@H8R6seZxMNgtmIp%>U7$)jlQCAZ&ubw9pFvt<*|&B8RJ>%nNe; zWn7dzII%CJ5(HJ4UqOasht#@|F@zOd1fZWvrgRFnih|`{>~s^AElA74d1+y`>(+N) z6L=t{56~Td2(*MBGzY@7o;HyD}nWk&h**Wj5*UDLzM|;tkAx z!=4>wQorIasqz&HUx?1jL?0W_AM`Un&9K)J!~vwn*F1l4kQcv7ia< zl%^2XEA*21%5vrdc^fJWC7lwQtnRXfej%->L`z(e0_=cXEBeyG;()m$EMMFIjP;+E zSEN6M!mp%S)6o+Qv-}y;AY~+tWqO|SI!8rCT%?PI7iFs0IJhn0H0sgE5S#P;Nb_lDY|ht>C3mV!>j#!RarNlEm!94J(R2H+emuhF zwTYv<_hftSpSaTYmuEj7BIC~!x1|}MuiH+H*7RJZ@3mGx&p*XJzBYgLy^!bEJ=vp! z>FXOqF+je)`1SCXgo`m>{kjc*(aq1zK0dhCJidRZeJG=7+{P`d;}&gf{H{+w{50D( zqo-$h7W$iVI%Vj<_WT|9xA3KFkJb$+=Q5P?ErYMTe&!0hg&$0t*BBmn%&G6TeDf9~a@ZB^d| z2F`vqUOV>9@AIWmZeFQw=((-Ad)vAO{`Te7GsEeJZj65V&8>gjpa1+5@%f|M77Z<4 zoPBg)#`MzH2k)=RUOYT#%V57;+m8meJ*U5uZX1ugyd=i(@_GBclWP*HehB^g`t&1d zM}@PIj30--A=^fBhD0_)jFIK%EoErP8T{Sqgo<+4NQS(aHcGj0c(6Yh<^w)b@Xood?xTSnZ_Iwj+S zzQ2#v-hx(_5~<-_eaXb&lhc9Y+3fJk2rE-B&#Ijhr65K*#79y4+}CD!neG1 zPQH5}_jjj&TyfF6~&K)>uFM$153^?3bpnAkH38UNO<6>=M&0q_wBxV_}(8P8J^KuN%=*CNtRO6J!9_q$h{ZRSAKLk5{vxL zt<%4j%-?9 zS>9M|`_b{~Lt|Xyk-vVKe7I`t=FR+`d)Lr}N@~K}VJCsV2!04EDc6rF&cPlV$e*x; zr~l=N&pz7}GG8ReQmKty2fF$XbOk>ncW!R$=;wD+uy!c_UORMg)sfj}r^(6AXRPboZJeP65CAM9SCfJsIvX9fU8B zkrM|v>3&@9+vRW)KLjV)wojat4=4TnG^`O%PplC+z)R#ztSYcUOdKW$Kk2_k9Dijb zyzG;#{B3){a5CV^%7??0QrL3tU7rY3-cp}^2{c*8XruE3BbY(J2XcSv+3n8XI4}>G zU{#f#Z2MbB=^yYnmlM2#l4!yCiqen>to0?*gL@M(Zo14Xcq^PC{E38 zf`pL(k9e&N0xL3JouaO^8Irgz`Al`mE14)!5z?$omlVF zKTg?&rcNY$iv+2-nW52dNw#0E5W7=$i2`R<7UEMe4NH46G6Kc(amc|`sp zwh#4KXGR##@Pe;UpB!4p76jPYJtaxamPS(fXf@|5D=fO6RxEeUO&az@D?vl8F)M1o zAhlv4r2;bKmn;BEL%hlv)+Dx5TE2;{1o_H@&jUmWtGG^M4xy-A07S#RxXw$?>ZA3V z8bNSq48$R{slFPopG2h_On7~fFpbj!;+c-*I!wwuOu78Bsu^AzLM2nAM5ZA5^+*Kj z9^`Ei@eo}gX$$4Z?|o3f>G>tlrZTs9nO%Z6)J(<+jo^hGF*oOW}Hx6AK0w%F2mTxVN&C>#iRs)J#}!(<+0-aV^GZxn7|O(MCI~s??WvNbusO=&;6nC?r?Ptdvp|Q58f&m1W$aD@x_3Z@-tT zCbb%}UR`gaRA!=|Di$*1sY=XeSfg+fvA+#qS5XR# z{3lYj_u{uA!AoEl0P`m4d0!--Y08Bw5^W&6^)EBP zmH^!;@hOzlEgbaQ)9Do87L+bhd;wZ@6js?KR((n04WwjNZ!BIFrt87XK_~iZjc6Mw zUWxQ{H&azzG$aZbi=qa^`9fqgmr9m>QVw!7lkk8vYAT>Jh2y}p=<9+VRG8*55tNtY z4wjXZ^n8F!5RC0y;xWPcq#jQR67o!p^7!;wDxM4I346druYu~7AOXFns`zf5{y~RY z(cwH?ydN==K5NxBJ>e%vB97n&wEmO0eComNVi<@JqQGmsz@>A@xx)fwa?MfSsy(sh*Ucj(+))*kztfxtGV+ zuscXZETd-h&`qxCK9tHeF?p%F9ux=$p-ug`uZ-NS)1orjXR|aFzlOMMhV;>799e7H zOL5;)!N3bwfMP@OUu6N97OykQ?rMy^f6{q5)Y9s@xPL`ki?4m zJn;!W+*-23zURRL9eiTOg=gm^cah1W{5G8|&qqnEl&ckmHKsN8<0e$dByc`k9Os@H zzk`uDgSEcF$xT6&hw8DP6BqK`FEOmZJsFu%U#6Qw5|0w;1X-pVpcp<4PNpNF{h8M;`Ba&^v~m(J(kxz%`QxTYpGzx}qr zXRIruA9YUIwtyJ#9-91kTezPX(9O(ednyLv7c^E4*bGlj%_oL__r&;tfqBNO;oDP- z8@RJ)t{%TVdFx8wNSf*V;7|^+==pJZfS!B$`+>h+UHRDWTqh0STOG*F)eU6LYkOm4 za^9sC^=+@*vzBN3p-&{^Z+E?91{IK#n}CujDzCe@Vfq4lT8}Vr^Pej}z7silWW{}J zaAo)J`KwQk@4j4mZmi=_#?ANtdP-O$PhW5=XXuA_sB!LYk2||*XwmW$z1Bg4Z9cd4 z;`w6(zf0XPgU$Za!1|1~nV;_-p8M62oI!DYL-Dl5E4K{!=U$D*;>(s%*~bT#um8(a zdf8w}-uckj%V%!AaObO+8td=x zyua@7V*^sj>Gy6gJ#GG5^U$){Z6|O0<4+T1I^95=J;OgRTQ`2-yWnP9Mbcn;YCboT zu>Rf)XKS7=ZrGT&Id0kZ}NZKXN|Ym~hW9bt7r)u|aJLb$f0} zscq|%caSU3dtSP?j?G?o?Af84KV`R9_E6K^Uzh{l)(U8;i*R16O9~w6d^qVXd6Ziapm~d{) z?5@kw1zU+M?yu5VdD0$nwIQvKkOsE|92lL z`=o!|cfvHHEcUmY7VI)k1{*SOob2eb>v#%7sjjmD@!bzUf5BENbWtto=O5Be4rN*`-2w6eQqt8 zXC@cT$dt&c%Zhx3J63{m#wbsxg(|oRBuSc<2!O`jhy=wnhT@^beX5v7YUWbMnLbfn zWIbdC#5_avhsM|B9aW^GB4*Hl`u7!_rbWWZV4^k+azqfJF#rtuN0)|P#V9rwf`~EQ zInhy0C|4pFsH-C>YDCrwY%{Ts1q5#%_(X}2(9>=^OKU;#1+Ua1#)B1K03JjQ@D3t4 zO5_U2k`HCS-NANMn-GbBdm-YO`d%_Ca@;@?+h!4k_R2^vM>i?$dK)+!Wm8$m4&wa7 z7#D4O{ee*U0Y)2v@JkMH2F-eeDF`f$O!#dmqD#SOs*1oBg8`!p5Q^ixatm!xt2$^p zU|`7!f*tKd8b=7>W(8A>y+^HImG&haTg01X&t zcC2E=YRvKjfsmqJ;+Gc>FC@}D7_)bAvuNj<`D#Do{A#_A2V}I1NT(vf>E2%iTICt! zjuuFE2S~3WW=lnC)s$9LhzB4+sLNW3Q-EBuFj?v~WZFYouuf>B*|B_7O(G?JrG0?oP%Ym<(OJlMq>W$Ffw%Zy*u<}3yXzti9dW?Vr-Fyosyy=(-&^0 z1dZ$v9x(bt01$@^FY($E*-^~OjyPIlzJ3%}QnF}7vPPm9x-}HugxH^$7S7N?eM^Cc zp-5(&e!-~!gSe(0$qG`|lC9Lc64uGy3jc@QgU5?Dy1-*XxR+6L`;Z`mN(6#>NWzU2 zjf$iokqCa)7Q!Hjkzz)xMzxdR(XwjjB&wAQV>>7ZUlL(djdJvmvx}r^NmvGmLJ`DS zT7xG*$ST=EDxosu)Bq4ofV!Sfdce@i@WQTXNj+IyFcN0e%r7L_sW4N`vSW%GEFWny zwni;)B8;Q1Y?Zf8znE5OoA^p>iJ)N|M8MNYYNJF7eh}1h8c^{+*hvz#lZYfW2;Yt1 zLZI4hi9~G#g+xrI1$q*~5oX;aqRRfi13_Y@8V-N^z6NCbRBO9Phz!I7H4IPk zQBye`c>tbwx~h9*$OUv3kRYN+@QIkKH9nIsi1?5TOU3O{K~ZR)D}>Qe96>` z=E}Vp`8j5!t$zlX`M}&q(GAf2~Rpq8FlL$lMP6NuKHyK4M4TO^lWS+`Q zo};Wun^=u6T~<^|JyO%$F1jAuB)YgtL?nEbgXxB1F~UCS3ZK#`WxPBU6Y1A`O)g`a?n{Nkn8rp^tcqvM)NW4eTXn_g@<&+zj6h#H^K_ECdw;B|gIOq`} ztfYlkDU~=!!eYXLF-s-ZM}w*cns;a_eJuFN6ESdJAcyF}9crK&Rf&ECdj#m*%tVp!C}$0MXKHQk=X)l%RYllQP<-j?0S%b>6Kxlb1Fa zT^}>E%2MvmyJ+|O#XiO(HQloL{uQ}^uB?}s(N9o?I z>)cQ=wcr`u-@Y5MOwI4^jlV6-uzcD4URD`7VwnEEZUF`64}<;m5BB*rL$~xXdc)Ug zXPeJgz`C$KIFfEW?=Sb>UH;gsbVJ4uueVvo=6rnmLt>J7VEJQ2L;8_}BPn^Vk1hFW zfld*T$dr4@$|6NA91x`P8dxu227Q^4-P0zofLCy8A?Vp19{u z3e)!DNcLZ^c3n!^oc5gek4w_}iv|~^=Ep4@cydNt>^7NF+OlNYU#89H=cgPgFIzD5 zY}Q70osgY8P-4D%;`3X>X`kI%Hkh~Z)sjYAZ0*d_ilODsN6S`n0}=r?6=KW#$1|vB zk8Shahf7@9;&T7M;^*gAJm0%DXXVn%OO7)!_lcD+-0As8M#_l0HDTVsl{49ojyO+b zEPDUH@7~^-vHt!2?+*<|dpeOBtLos}vQnNyDk>x2O^0hO54<8}Aiw{H)~F zVD{F5;@PF)!OewG8%bFU6T+ANG}0A+WWl}Wy4>0fri-j;I&vbGJkner6`}B#MGe_FL_;uF!PruWhJbrhUy>#21lcC0!V{-%9{*%Rn zUg>M^)#m?x{8wSYx|$Qn^6{gMFzKa1ontAn`P<*XYm7(7tG;zZoYbWK(XbKz*<-m4)?PY_ud>l z9GZPL1w0NA3N@G8*!7m2LEJaAPYs^uuVsyVICrNlpC9ak!%&y;9WvqRIkvcu5`@vs z^^ZcBz_jio&STU(a$5gCn5j(%F7=Mh%{{U>X3TxVf5duu>R`g^w`Yt`v_Mw>@4}Ee z4hzHG?_gm_mabU=#oF(fqWb z{)GIA487PlVTRd@!aK!lmdD3*>uqI*lZyrZfnl zv-Np?9FVzT2HdyL`$8Z1=OX5>e# zv|dfn`j13wfuMCGKlLp^iHz`n!BwF$BcBjjO6k;26qLBs2URFiW(}9in$S^jnTG{D z4}vGfcr^;ke#RrHIftL8GG70`Y#4*MOxB>+FsL($5WHv(Blx-sXfG2bDMyn9Vn4hA z<_X%1WisNND3oHj$r8JY4(lIQiG`9mgh|?FsKI!PQtgW56R7~=Pa$dI0&|q3i51QQ zfwJ`3gdk<`6`CqIXDjgx4c1YM&mg9m1FX2B3#FVRrbAgn&4=pziRVy7M10eE13+;RWeFE;`#el?nzFK^6-rU7+BpV3?KvdEv62i#RDk(MA2-*Rb6m0D){S5bR(J5XIe`ydH$p6Stus)5@@IH+c@t`d_dEnsn2mtMj$ z63G!kI4LU*8ZlH|F%#fw;n}c*EKu7*O4@fgKLJx;N>pl13E>8{bmXo&1J(pHXO(n8 zsKLNxkr5>^UFwAYrt5P!fpbn0cyRT*@f1+p%QA;U05YXc#1|4jDwtRamI=GWM?qI4 zl57e_3S$e5dPV_wRTWb4X>t)+fc#nvM$KNT7{T;6UF38}3D$%gijAw#WTX;z`L(Tz zUpDkg0oj3gjcT%_f8+u|JpyTBVHV#hR9^r2A(b0-6OiWfE~Vb3SE)Pz11I`P+Wa7l zU`|5qC9p~oPmO|gCRJ{w%@sVZLgo@SCn9LotNiRiyb^lHnQ(Oa>d9(qlh8ymY~>+R zOzn!}C4v?ginv*ZJqtaCi=?O9_bt-UIb?{SbHv0!F_0*er|47CQ9XuEisgMCAn?L_;Uc5~eFf zh=Ea7ol*6$DinhB-VT9dD>1QPjTR$qB-jY>L<$QbqmR;dS@$sxY?c}d<%LiAuvoZZ z?>33oFv{!H^AQ@}CQ*jV<5zKnL;cn4aVkk*Fqn?_Q62^c5 z9Nk5g3?{%3jr0N1_*u$|pZu1#*PY(P}vbhTCFGtft)&f=(Tb zbz(~t%*GqKeV}}*B+gR0W90-v`9!FBft@x_gm{3IGJkq+<-Xf|{rPBH+l!(#s1TF&qJ%Mc` zVwDjJ{+3YjEeKc!RiINuD%CIfPh=t6Bbh&?#v}09dZu=kB&nM`S0V%HxowTEg-!t3rCY*<-P)Ws}-@l4uGPodz;zTgQi3!XNmbr#}NxxTO6eW467JBB4*!DNma zq+gWcH!laM>(a?^BqpZ1iaI#XjW2rLxezmVS4knBT6lm#uB9NjEGO-82_i9rG6#x< zP9o17-!25eGPZIc=q1CZSS=GbUDE|7(BdTFsI}%U5$^8 zl~m^+>NS0(iv^X9?8>aDaO9(+%MEPWabd8S`*g-0K4JP#Y+Mgv4P>p%d4{-X8{SG~ zINu}NH*F)GyDQk?GA`Ga@4P1534QC%iCTD{DW z7c5;kUall~t&|I72fpL3VUbwr9^LH9Wpj(Si@zRNQ#yUrbuA%l`!@q;b}u@+GVA_X zX1hCP&Pe$ASoPrRO7@n!e}ALYG`v&FU--gP_lkqL()PzHzPk-AD;<~lE$(d#uN7bB zVr#DqwQNpc*2O)E;!hBL#0_F(raNv+hVY(!h@uu$y!KIP>T|B4W#r00j45`;if#Eh z-xvKU?)GeZw&k|pIUi+^$55>J`-I;P0-BbCrY>1=LO&2-R>loK9WS3xck;;r;ESjzH~pg|I*;#XV*6V{TBOT@r|XIsbNch z{?gIaN%L%!Z zSDxGa5sdMs7i@c?kgoQkp)2URmNnZ200*9_!aOnU0{aN4L;s?K9eV!le zm^j=>UHQS_b#~d$-wy}t;dVH~y>0baQ53{hsnIuM)1xUb{k(qo{zWdtP4EGoRHwKJ zMUgiZ*(q>eLwYTl(#v7!Utd(n>ET}hd`KR$$`*BfKVX{3ZJr6_Xwvli)=J`X)^~xU=KcP62PexX2C@vUd9&sgoQL` z=Q_nY!pbasa2Mn5kRGq{;@Ye)zLk#A#U+vTp~nQBlw?E?Wx963gc2`mepzjOHv~X6 z_XJC#q-Hjew3AM?9;Z|;HKJ&h$c2!|YQyc4iN!kC==K(`@+y_*%4$Ad#W_b=C2XPdb%}5-?JWGiV>6!iCjL z1Y>uZwITd1$-&xfoC$Z5-BN_;WW9Dz<#Q;~UEL{NU>;eyKkEz=A1a0bnhRveM+gkk zA~k0y221z@R{evj<^sU!a)|n)0xgE!i3LP<6fN6hD45&)ZkxMvs|b9 zT~XbqtWW){QhyxOQi)6M^Vgn^w zVN!_yM5?!i#8h}fR8o!N&Z%B0AmN{WdxG)1<6OSU*fF{)063zs9JRTQU46D8q7XPUmp^q+vkGEIsWqtPmu zt_V>jk`6Hlt<+jsqY~X%C!>l$)Qz=}f}fSDq)AM*iSg2UHlo(@tt=WS>;Wjn1083%(De&f$Hen1i$wR5@rdAEJpkk&efF-fgG_`s@NBBgbnJp^gR= zT7;gzDHcbhM4>gbPe}RF6lKD6i@3|H$O@;`G#uFc$OKj#q>XArpNQoVTrMlP_A8v= z@FB{KuuY^a%Ed$-tT}>e7n1}L%EAqzQ*yq!5?5P5K`e z{L(i@8AVkoVGKa|1^iCN9Rix*;W)#*d0;-rd06kKb1D(AcvWH)wtOuPmjJj#Xfd9L zKjCVj0*kdO6J$iHUrz0XUoWWe04{)AC7c6mj{`?43hv8-t3~Bt)hZ?tB#n-TKpcoL zm1wey=_0!T)x}6;3VkE)CtSzGat7DV6elafDk>+CLs3iHk%PzRtQlltBr)x&;0O?|q;e8TSNK@3VZL#MI zSY;0rgl|Ad7b(&Rz?$Sa0fM&5uK%a9_m6L)OxwjL!^lRDyC*Z9wxJZ7nLJIWZQ8V< zKvl4rCzEtq(uV#JS#@m_QmB9wN=4S)mCSUAL#b`4m6vsWwbZUwmlZ)|S=V=ML%@Ql zz~YZ}eO(J(Mb}l^hFY=0xl`Qz?m6Gj`Qyx|oi>xnWPU!+^<4LLUpGsG&oIA8%;^T8 zw3^}5Bjm%%&_~79dcVcYg;syO9;HU;4egb>7t2X;L6O5bHskBnP~{*eFpW$pEM2RgUBubyq6_U`O_@OI)%%=)@LuD zLT?;-e+*H`6oNB-lgPUzX=ed=@Z6Z)&|9vIoAUn8E=xIA7yHjDtDQ5NT@I#l!N zl4n226>oIbOZ6uISOK`Qn|)^UgTT-#wzH-kbZ&+&#CPm@j6``~A>` zl&et0UYsjAm~WzI95+uZN1wF6{Lr-8`s9%*FIhB`ls|vIsr@}ZuH%a6{`t(GxvPt%Z3{<=-sWCPif>Nc zaQnRKx}pP&)9K(Y@Ru0rXQE^2v+d%4Vc^_evS*6T8khioOu81lnGGe0tf=jbTk&mB`R-W9iPe<{-&-*8zK6dr+ zj{svIa*ng2bttfEC?IxhzLTBF2}s~<1$b>MVDaM3X^;^>PdgE$4=^)e99EnQE5b^T zBxl$Q6`#42W9MIT87AsFU*@0fdFt- z;&Fa5-Qs-x8b^FGLa_j8lBaYM!8ONJP0Fak>r&a+fe}%u2 z6Uzor4uHIgnf$ZLLeg0o(}1f?*ClTX#6+7kq=6wTq!Q2usICfNod`fViE|7EVOjnN za~=#aQ9D+n{7}A4L3@|CWoT!a9-zB8B~RrdBvQ~IFWORurPiVC>N4=~8&;E=SyE17 z_z@tH>uEp-*d@klIqP-UEDx>#oPgaNQm7!EM1kho{1l`V6qeg|U>eidShZue43Q7M9P8wC zVU_Fxg+8HLSqfA^44l+31Xw^14T#UK$iPM}fv``ECQj2lSU}#mtKG~jp$F)V3QH!N zWkYNSHaunIEV5Dj^4T9rHyO-Kc8_SzS6nJ*;N@PnKoTv8r7YKlDL7U+OqEeE6vVtB z1M%x>lLa6dIU#Ep_{=b(cx<8a4_b|B5@lLNd(|pYa#1Qrq){-Qf=(EIQ;@ z@FmGQc-w%jreNg5j6qc*%s}6tdPI)rVD#Z)VhWO7-l*i#Brqu^V3>}2SQCP=v1u1a zm<9P^2)J03LR+ig99nKC^7&LLf;G%SlIx(n1Ad!!mnBgZ8l9xAl;lD&KyW^wM@>j1 z2faW?&(j7K0$51EjwTL43}dTVR$@Ag>Nx#gP2SGhqOwP4W0G2{@yiFo3+pnAB(ajV zv^V1hxqO(3XomTc3g?z6--FYIbGR7a!J$pq5VaWFG^EEgU%w>J(_X-4b)}xGWd2?l zHoKDKpu90=bdwsk9g)>Na9339*wL+ib^m%7V-Q`K8Ntv3ySVgZl7kbci;&m=>O6ZZ zoCR->W}?I;g<6DZ$#%w&CDgb)s!Ie{)~^x@-zt+X-WVR%YC2(M!aZC?xD8;j*-H~d zFKtl_X6~cHYY>~L1yPL4K>rwq(@+nNCM>LG}J+LxGxK;z;z=~#*Hf~WA}WVJwPW* zwK#25zTS6H+}pEi7Yi2EG=q}Z9!dRiks>8QvkHc^-Et$deRv07sXV&%4X(C7nvD7#kY+j&x|S33vrR#`q< z?A*zk!#h}pT*J=)x)+RkPbVkGsv$DTv~9vw-g52`u41a))1tc&kTxXG`Hmx>G$Or^ zWA@DC#~7|~F4H9N3?;f+8sEtb`jSK1sq@-^maB1HUY4^QdFFrITAT0nZyu{@`LR5X zp8476Huu*rz3mSic=rHvpz1p|Y28l(O(>>W4@pN>Tm&HoWHF2@uk$R3ja(t@#P-+SY42q90ed(=7<0qQyHvc*G{rAVq zJP$RNoH9>pjc?hUk-AmD>`_8^W!Jq81A&chd$VF^J7a> z>q@2?3YS$mGUFo7SP>05d}B3_I_@12pQRo2r9Y+mtA0^+Caa~k2g`op(uy9(Pluv! zCfCv5)i8H6ce8g^ZEN_ccxa-}>=%cn;|G)?sm}aCZGX@^rqyh#nzr(t_PG7K{~X@G z_tJ@F4_^A~qthGOUwyyjD2{3Oiod&3^Zfa3{2jM-M#dW(|C;l1*5y@C`|YFnLv5;U zZRfznl`Y$+R()1fx9DtAyk<*X;YiUTcf1s5I6qtbt#jySk7jWxpbq5bOwXuoQQ~5(?yk#= z#Hvb<-#32ftY5g2bE>3hV*6h*gg>`_Q@SeS>en%EQ`=Ojp4Hf)<_;{aaNIgM^mN^# z59UvXGM|hcY?$o-BtLrZXqN4*eWUgxpZy#k99}Hi&!vp7S&@;siLPNv_?CuA<#vDe zf#}$7Hjh~{_Q-9Hd1p4ah&|FW$ulZVrJVIQyyAXu)pxb68HM*Hjn&|~`$ozxML>A- z_p(OW{hsvsT^Cn=UVA9h>8bEk-nK1wTspe#?3LHm&ZY6Ho%?r9J=Xfy2PO_wzP0bM zNS2({=x>bYpZfd2;s-Zm-YNZ6-E!~W=8u28x-REKJpFOsn|R+;RDWilKQx{G?pIC; z3S1Xeh`D0=;gndQZ1kTj_JUZ3or{m`w%!-ewr=j%95o4u-Cr>TYu=iYzPt7s7Ekcq zaWLryguOY{3kbXap)7a)OyRdBX?Y+?IZyAlcdWYo8p1w{nul)4*szCBWbz*OJ-}-Z z=Jdq&X3u}8d+C=8FFC8SsvXHKFa!zQ%Wb3IabDhDW4{dedOU%z!EiA(^hcn(p9i{o z+NmwBa8yshkhglOIx%Ac_gubRY!b#Fn&G=&(%?gPuCEiuj!7A7H;M7R*FIHp-xPn$ zv1vL7gfrj4jDGU@riIfTeAAM6JKt0s*R5;zW$bG{);#p!g)QRGM<&H~z}N0JhxY@1 zIzN^d-H#s+e)@#hasTzHvT0XQl?~XUbJRGQtu_H$et)Da&_lN3D`mR0_))rB*YyhnMdZmRGk^cTuB0dDgs0J#^{P ztNreS>J7Ov;Z3@)d* zb)(XTdlWtyY*&_RstDb`Nj}3l5b%BWzrCBspeS#H&!P*d>T7f@dS82)mx(lOo6J})uE>u9S8?8L0fLD^jM5$Jv`b7=K6px zK}i+HhLwUUn;Rpf3W0A4L`a0H$O(?jDjN$Bv0TQ)!`#(*vzV~RQA`DRwwOQS#{gtR z$goVW>6BUUenWt%H(IFP<7l;oJwQ8semaA2B`FXg_$gVcXt<*pw zIrw*Hb&&{D1zOk;oKHkvU7 zH?(NZ(GB(1Ha8+I5e)vndUC(=kYG;Ut0{c;4IDoZmV8L{7L^asnEP=a5e$3A=T;@%dVjQ!cl-CGhQR7ube@dOt_;|s9g%`AL z4N{R;YCD8%#o1WUr`kw9icKMmOM_nB*mW}7{2niFns;428>~#CK^F~Ax0QpK0NL1u z!=Pw@$5SO-lw~iU@D?(s^M#5vrhpZv!LDP2#<69Rfi2+S<}=0iA5{#T2WWfQEpOJy z2uVkA5~%u%7&;Rvf+8GX!F{rbC>xPUNnM7Ck038&AEh&GdyA5c^LVvX5L$!0vRKKm+}H{V7wHRs=!jM z*+nVhPLv-n zo#+*14~!qZv&szS2x%8**9XA$^CNywKOuxwZa|o$a7F?oBEVF;3#7t@l-;2j^XmK4fRWUR()%H3~Q)nyEUaz+HBr03&al^MYHK18VIx#oup zl`vh*cGBiPmCseX6fOHMZL?WxLB&eaTKT+ft-U9rpWk!SKssfbohN3`s^BYVv5lM3 zn6g66+s{a=*+MRA z=cx}okNt1%;hS(=4}RIchcESZ%JiG}%}3eIr59K#uju~8{w0%aXl~EF-K9clRR;Ut zw)ZkGU&0P|ZB=E!Z@c%w6z!X*(Heo-<5+vJ+qv7nYFBqf-x~Q=wxZ{rtI^PvXj5rR zs0ZbDXDv$^yKU^rfkoYE{}uag>J>jdd16^AlOeqqT$__0>^%IkI5qqxyKs{yE=!%w zS6YLYo^QID-RH|L2EVl(Tvoizanb#E{H<1$ zyVJk=yWolkN1Hq?s9()_Klu084;^{>w@v7cJv-<4W3L?fL-2BxuY3Mt@Cg6F-ig*v z_uIC{E?2y^)Kh6+7I}EINjlOuxzD?Q-(}cY0odvN!&g>c;g+Ipi^gi*_lgTz+!tET zRe!y?XB*n4P4?_|h<{%6Q*H9?cT4WL)Ysrh9uIlya6Ew0w|yKxY%TspltO;56XhH|xbBX(es$=~rUX~x8g5PO}Rbuq}Of!I4Fdg?32%}eye>75B~=0^TmfxI=Vl+ zdv=z4zUY`S!AakeGD83VbRtmJ%d0Pjk%Joq<)~uFIy3?tHt0lB|MpKciDw)D_NE2^ z*yk{0n}^)HE-oX;sMNbdfOBEzNL>Z zJyuc^=RLqQCuZ-YfJ~&R_-m~Ol;<zOvu1jBxK-PiF<0Z2I3FrF_3+*Yx5i2ynJ$JB$cfpm z-TSsB11-I+IKfSCh1vZH&wx*UxC7C`d{Inz0@-=6>U!&|4{ zxk?ZTIR~+vPKrTSngGqkoMgDRkbq?-O74nTM*vB~GN?;S5KtS8y`F$>CIW4$AeQ36 z#utC3`pvAQ$N_Vvbch~K(FcpX(VnDpsIjPkb8oFK)cBMlMm1Yk;?sCXlm$O}pMF&3 z0aM-ZJg5^D)zDurAc)Na4jCPls#@RcnzhD zITcAcbPvOsmt%9t&F?};1k4Lvl?5aQxR(o8sX$(ONg*2==CVEDnT80(&YY`us@ZLr zw8&&QY9p)|8(anxkj}HZu!{^rG+hbECJYoz3V)+aq#=<{a5yHdTXGqKqKl*0rjwv! z@71_mk*#D*=b3qu(`GJ<@Izi2yMe{6VA46H(bOu`sxp!5%NdR1S&6(Gc}O*PyU^8u zUEN4T=mc3t?U)^s=0u~COV{2ja^5Xe@+m+Fsr6RK+#|CvC*0J`D6GQNVzk6?3){bx7+K(kK_iq(Si9Mww|M2V}s|6H*&c8HI2eRj;K}uPk06 zgl#G{hssok-5WJ^m~oMQK+CRBwh4zgJwTqUh;4@5B~{I7B!yuR|L}22u-D(#O?0 zT^ecTt?50G7q=(pI?>*U&4bY}?QKR>SnS~k&j^AuH`Bh57~+ zFkX06G!B#{D@MW{f(&Bbf}}oMlNqalu3#zYeAqlv?UsCS`Gi7~cPUIC;;^}MKsXJ1_>li2J9@EqjR5N~jZ zptRtY(P0XBf1+F=eF2H^HPUh~SEj2y(88Ec&axt*y;0%;RuVZ7>>*7Wb(=A4R?Ne5 zR3ae{et~{lq(_C8?J?FI2?;(@l>{%9B??lm*oAclHV>Y!YM47o2jL;}g;aPNud|z< z>ksI9oB1p@@{())+GvOGE2aD+ohlvJf9A$eF@Ydv23Z9vDdcF3hPy*(?J5cA30t3i zNs!A|nH)8$N|2#0M^{l|7o&uY5)YS}5O>PN#cXmX(g{luUzt4tH$Y+nYz&G80tSch zq8ExJ>^M#;(S9Z6hW33zyLwjL zBY-M<2P7M84`~nKf`R3F4n-5~k;!BKdD`2MwZ@zM$cl`G6Zg~iGwUwbE!@f;4jkIJM%)N{H+V?*aPm-!ZCVb z>g^@IG2D<5oGMbEV4Ir98(ynhaFPCIGO$$2A^nT4JaStJp5&g+m^*QdE@U=!c6MbEaNNTbJIc_5ZT-MDEu< zx#`pc{KcG=-j05-Do5%w>Ras}$h(Es@l(;?uJ0UvP?#QgZdH7E_$z(?=E;AoFLGpl zd%QNUxim8?vn2Ul+s6&xwx}iB4qW(_ecHeIa(q$l0-#Zn|dF#{_ef?X}S5}Yv*83*y zr@nlCT;A7t>fG>yZ=TnV3?IL^e|qW8ITN_3Ddkd5&68qloqysr8jK}Vk7neJMUzT4TxDW+N7jAfUpEoy zNty=XH#V20h=!|*3huVukw+`}- z8AbLnr&yOzWPgveb3g{d{2SCROZZZr7al>^IBN8-6#qyPA;<}q( z0;J8{xuhw7>~Abcxo5Q50JTfjTy#%6k9ETOM-#JqPFzWW-^i*Hmo@l3mIHn;Zvu<{ z(1z6Gpvi6rP4l0i%j-)0HAHNI~IkVRlK^M_Y{eeE?I%a2={EyRd^s+ACS(fGH$td>DtcNMp5E%IYtx?Q2go|vh zAa*ZMg>uG_CCjb`NiBdL1`~^YdwRiytZjwZ_5(bJDU#Hc%c6UjY@n-jeMNa#@0P@R zmG~%TJOLnu(3Ugve)-~$F`vtJVV1~*D6rk&s!DKF5XXeDaH6kRPWucXNOtW4;srnp z4_yv0O`sW<6~PU?$5)jp1*&X=oHI$aNxZ^~v&u;?4oDk$bO=M7kf)F;+N)4kN?(|X zvV%ypLod6m(bNptcmujehDs&`DAPZZ7}mI05?j@+fDvy?{ekrm0s{mN&KUC*9Mv4W z8oE7@CnL~|TST%9IH&ngcgTfC&2&3^z6b4R^opq#B@p7Q)wA4Kgg00lq8&2?FrbIVX8Q*7OTerywdE@sS`2 zWN(Ow^r5f@GH#M9P``Qym{{3N_*f}Qi{R;Dwg8Oz$ZNFo*#-+)gwx12{X9ThGn{70 zR9u^#Ee!}5V)KGsHrk~d37bTkjNuQ~mb~wZVv9i*0@+~E18Qv}k43xG&mlXgi!`2H z#hcx7G^LybG#CzGQ&eU$_mqc8AZlH(N0cTGYPpC*is^hKJN4M#2zUU*deE~dWO%Ov zAr6sf1Br-0SZ>tAx;l{1#K7Gr_U{RsbxI`!p;tybG%^fVk_ZnsJavOmIEP||d5{Ib zgvzp`d@mNQLkNZ=Qa^;bM{ZXzXmTq@;6cK0Ah@^|>M5 zt5N)FbXFpv=$Y8+#ERKE+cThc>kJ)X68my$rfM{=@*4r)ljA_4&S_B}}OS#=n zw%Z)#)m%6VMGsSg2|^&!Lo)9*T4E|rzvVBMsAL+#rU=g|yEr@7$_Fr0iIPHc3JVXb zz-3cB1g%1XjRMGghPjA!YB;R5v5>srBC+N*Vl6DhbQ2Xew#9$(SeF%BIhL=*K{Xq- zZBqMX-!2T6=9F9}JEg%0PNH&f3s0pnDhRV8lsGS732CmN<{Cy?IR>?iuJ4FRF6smo zp|WJGE!QgCNB<`f&0&!wpczZ3IAYLlz;h0wmc-z%9v(kvM-rTLqQM>v?(mVwGQK1T zD@mr{OQajK z72iS098;D9hcK|+ii$*UQ8ZT?lpqGmiZ-jaoP|RVpX>LC$wqc_+TnMCPhT z&6K-Xi(u5x*K01aEUNEl(|Tl@%ZdB;eT8}7c+%~SYf$poqLz7UDvxiQdw{t-ROAm_ ze!9gPFJkjYoAM??igoDNnrwejpeXOyPloJUJdf~D=!ttKb@lyhu8>iAF?i5Bd6etW zo?l&8bWkd0Dnr{!evx@0YwWpG`KRVPOVR#;xb5>iZG*I?uXW1Z5%Q0=yg7MNedAP? zP`g(deLe(G6kO6=aXMNy)*I;U#0w-v>%P{JC*lY)95RW;~nLWf$3=Z&i=PP zvwnytk$anTzUZZ-n0vuwuxeY`)#}WWwcjFU-4O?VclFoos#~7$FCO=L@lwUF>qvf@{3A`@BQH^O(vu;@=&cv09(WM^tAN&Uhc@{tg7e3c-i6N(RQMpF%jiU}i>3o|C~TPkK8Q$Vh}PXe9v zOxEH)H46hm?uMkr`5%UE?YV2(>B)z5#ZmBM50rsOx+3Vm>0LCweRD-0;A4@m%i9$A zdJK>*Fwvq`Qo8j|@m0qhRdEny(36STJ1JKZ4EE&q&7g03G%-8otXndE&UyQWe+S5= z-|(^hHNYwFr>`bvPkjC*{c8JUyZd!Wc0APH{MzLqq4e{NeZenMwKZRW>-*~V5}2KO z_KH3BELgEW3+9JR++G4rW|fVFV&#C41rZ{F*TfoOfXxIA|df{6dTiv9@Nz`m0HQmdbY;&tD?6GRdQms#?R&?n+>{C99{(6 z<{}%vM-p)x8$(z}LPc=9M9M%CkNTKlG|&|bd5e(@sgL#Q97@H?@S|gw#z6&uWpl44 zBQeKVR$D#CDPbb$0-r?=WN;YEWsD7ctR%~gCWK@s9^wJe+Soq(_97HM7+Z-1uN{OE z>W&0WxKSVe%~8muA;54X(HA7T2yr<>fEOf!x<06KE~;>4f%;R`AXsT?z^57JkP;rOCAgKWYNdeowSdQ% z2m9*>+os zQ7ea=3zdQ892Gumoeh?L;aR;L;&{=_x3$I)k#P1RWZWijd`u&HA2apvY8Mi@wl$L4 zt10r(XR;8KA#F(S7BoTe2r)@j+(NKj?b0?(wH}4yq?{#*bYO+FFlQ597zErOT~&lU zhf_thkx{u`iRkjUBvmMs`}c5I69~Xlhy?s0H4=ox)!ly`>{p=<|A$3v0K-8rlty!| z2e3miAa}JWlpBN|fP0RTL>EseGnWz|&-%gxV1Uk;i2H4T!pso-2kS zG4&&k3z}hIK+qDBxH4mFt@^Mk;Cepngp@k4l_R8H1flxzv%?@!p2I0{3mL%IAt9P4 zSW~x0RDqFXXX%-g1#vwv$U+9pz<`YcC{KW9nc$Xl1c3(MaLSnrF&#l$X+;Ry#Yl==;!A(T~t&OGuu}{Hy#V#go>gT@)qLr|yD$uP2 z?~?F!gogs#9hV}}AzF0XEU|Z6x z+Vouvu^bU$+5p-dsH+O;8HCJOc92ZHJuwyr>}bkw^dS5+5$Ey-C5#YkT!hjIB)9wQxT$OWTYg1`hXxujb8 zlw8{IlznN+=hOsBVP#v-w3veFq4I)6jn$#BKVQkRtmBm&t^~Jm`{%p);aB~KMFky0# zo5#5DY$#pFrEA(kclr-k_PVWLRzF|#^7lxLw;y@63zB#|BtugviV6fU-90(WLD41I zxIUao7NEPF$n}GTpbY6rabb=$DMO-3sutZM%LeFhHLZt-c_MvBe>Vue5Y4lDDQ=(x>37I5A?M$_rz zPG`zk>FwnYE}|TTg>>@X+C2B1S9=ETs>6M?xk|?TmYyv`&CK{Jrt*Lzf6^Iwr$5qE zx*9tI7x*)=3uxQnLun6a@3%Sa{-;~=ryFrYi?}l6&}!c-Uol`iIj{yFo5J3G zRn?S=e({o&vW*={pHj|b)V_!s*plooSHE1emU9&DuFepaVt@93r5q2rd!(k!2C3<( z_*DG$+TWb&)Z%ON*H6m!d$!2wD}rS$^0`P$Fq*^V+dVOPO@F?{)G1z8cy@g{O(2hDGNTag8fkmw~D!cRYvNS`#s53^gR0BRKKT%jeCl= z6;7WylRBre%3pJNXtVtft0oTHitpa#xJmowc=Lw-Cee0K`np+a@*Jv;=NIkozj_Yu zN1xj#rM16BmF1rVQ~Mj(>eZd-+?xl>-_ak)uhoy8?HFGTSaUKz(%HU3>+G*ppWI!9 zoKo`FJeOUV^by9fl$?naJ}s$_&u}ha<}JQ=Q-*hoM2ly*GfDSVjnP#pFaGKCc}M6= zRj4laAGQMr{}lXv(cbEeoR>FWSoS4qS#&6L9^2vwHCewdN1wDhp8fGahnnwwCep-@ zhN}040-5J*E%M>~mbK@j%w6*KxUl|0TnN3j@8|fj@~r+-lalb~{{do!IEWQQ>rBGk z|0Y%t<0C0q;*6#NT(lwQ60{GmFtL$UP)`&vtfR0df3y%v@W^x&wjny(x1+%TQcXR|67YKg`^>ZU+>}?rlo_xbWN2&Gw03-*2Dz zn{#fwDd)w&)u&VDuJ*&{fJ46}tI0ieGt~Z>N=wY%4}5xg%RRs4{eL_sjBD0Zq^$Pe1;ktPzFD~BQ;H56d~g6kh^#Dpsd z(p=HZh&=7m)DXkaVu}HA%$@FyLtueK4ANmNQS511R1MD_(kRRCd4oL&y4@QIEgLG3 zYs8Xs2X0#XeS7fcrLbxPo*`c!+i9{T* z7le2991@x9H#&CfM94aJm5RijrkYPhIXiF2+ zh|UoJaX?g}5f*^I00+q~=~}FiI=yL87OWJskU+aZ>=5+Y1ke$QWc~0d26E(x@GL?b z1hqDT_r(N&OmuU~lVAP-0hQtwovgG@5$!@D@1s=>YmHbO#CdGFnPfyHEo+rTOH>ks zvLGbhi#J5Jj+$i?jePGcu~2BO)z|AYqHuhA`L7 zm=rT2BU*o-9PS3UUvrLXz^$|~O*Yyn%K)Z7(nwk^kboC5#ctjVHW1%WaG2jurdf%9 zTx3G(_^+wt*~BUP*YvMj16&!djT+Fu`g}C_3pc2EW>(>5=CJ231NTo%zyc8kTpkH` zAb_I84M2SL?oY36`k(jS%qv(Waib^+toLtkELjwS1v6WlnI*pC+PA@{ToCZ&W>(f{ z69t=wTVvy0Gef?VI3(|NP2-zIj)k*8pEMvlxo@0Q#UwxGV_H9bi+~fC6V4mcdI*CEiZ#%+=l3 z!#nWm|Cr!7W;T>K#P1Je@Rv2z|FPEp<>l2=?kX`og%YrJD2Yo&yhUSTi^`^)60H}A zY${G)q!DwqnK$k556Hf3@UAB;6pE~^{cyXXSF?&q4-DP#0^}=(f@SYvRxze(>_b>^ zgAOA4>IAtlK#5MfVNm44P+*DZaC!o6HJu_-y@Hs?z(`Lg(^F>N5N-Wtcw==tL(MEN z9}d(*Kp!Bo4#WC-ED#a$t@{n>vy*1a2vVe@Vm2rs5`%p_C?;C^x!Rx@QO(Um(IL)a zoC&KXQR$GI$zB8~KPo82Oln^GJbv#SpP_6ejyR>n=S(q;h^Q;0Z;f63f13UmS9>&$ literal 0 HcmV?d00001 diff --git a/fpga/rbf/rev4/std_4rx_0tx.rbf b/fpga/rbf/rev4/std_4rx_0tx.rbf new file mode 100755 index 0000000000000000000000000000000000000000..7dc16e24ac0936fe25cd9ae40d5dc7e8f6a2b95c GIT binary patch literal 171213 zcmd434O|;lzCSz}NB>#>-F-5X0Rp5=W^xDvqyz$Ov9^*q8NxuJkr&(g3JGb8Z7r5! z?P{;h4AVG8q(Ir)^|~t{Dr(o-+SOjKcO^8f*zMXEtM+=mS}1mL?N$jXMWpn9Le+KO zo@ej<+~@f`L*|#6lXK3TIdjgO@9%rQhpSird|UIuRVTLMJdOSJ0ruxH|Nfb9TcvQ@ zZ4D1BfAE3jn`Z2TE0?WWxorNtayI4Exy>Jzk#YayA5z1mvpARD&Hm}*V^b&;guc*) zzyDA;NNH#P{~CFSjY4Q4n#c0;c39A%9sISi5VlyL5COo2mmuqbGiKcH_qb{(j4>=2%9KnG#)EzI^KgF*ENk zN)#SjwCK=v$B;dKC}!RpTfF$w88dVGU(4vY{_D0j)4dU^wFbw2kmu!p`lnAnjG4D% zm#|F8vPJtpT)3%2hw`^v`S8Q7{}eNeW2cLd$(a?i`LVM6gLnBqkkPS-&34=|Q-mw; zy_dgu#>|`|^KFS@ZQzG3;cq^`|5iqqA9$c@dCU~Xn$)$*{{J+i*u@UvGned-)kOdJ zx^>5o%$S*qnQ7!Rts~aD?6$u)mRU1_|4>FVooObcJyS=I?wv8;XZdFt*~WdojQAu* z^QWQ>jjvz-<@uO75-S=tAxV1eKc3_NLq>TE&&?F(SI=`U)1eh9X@QFHBE6M^r-_h1SA*TN~fp4SGbT((tV*5xj$H-e@XE&5ZadhIZvo%z1@^=%jm`KrC>yQp&P zKt>T_znZnN5849;EvCDc7Q^~-EB@Da(Pw_guxlA!3;f~nS69CNHs-gXv0T;fqNBW} z?=!;sy5XNrVzIv4zKgGZUjl5$^Z%Vn_%6e1-|Dq1IKR6sQ|ABmg9x!I_R2@Er{ESX z#>iL`fhs{|NNA1~Er?@JCGH?72xxR>enTcGGmfz=CX&nvYL+=KSj`n{A?9LnRAmOO zsP;)R25ee00ZBiJRdbjwVtpNprG|?Ps3;;p1y!94fiBwOauOuw#32SSDHlb-0=Uy# z8#}J z$%JgyU|g&Qp@`zgY79M8H-Yhxfo2*PAUXvot*DdH9bgw`m!NcMD4DDgIkOhSIt5in zV0~Iz>n!+;|fKIG47MVMTK{yuW}5cG)T|^*k=7h2_TG1{dcQ zF|N(p&u8&07tq2KTuGaF){QxZaz?~-8jL~pDHf2ZDHPzdp_$Tn(-^!S-=Le%$fn3;EwAb`)53Sb2!E{G%` z0Y>V&(-}-P;{nj4IyE$Ukeq?jwg5U&o51oUWL4C}0*3xO&fP^h8D4|YPTYn=eKDtyj;c@j0EK0cr{9Z*h#ZVt#?6O}EcYcbMz z2F?o5Z7^_$w1kVpWgsXZju4zQBvO=SPPx(aFkxlEDTc7!P|L#ZG`yH%{WOG-c6(VD z5yyf`rd75OOo;(cn>E)Ph*zv z%FM4p)PVMIr%0-u#b`D~kjwc@kl78`=lX*QFtL)yO0-x?8AZ<>a!Le{f!;tz86`Ub z3UsVmm9%E%jMTKE3-E;;2-b&*M{V*pB0SIuv3vI@h}$qkgLh+rS#glM9$isnuvTy@ zT~I^0sT2ajI03}teM%=ZDvCmge373nW$4@>jTlXMtN&D)JQ8CE_Z( zbn&Zg&^SbIXwQbQ*hgo$>7}wwJ3uDB$%Ok^F|kL4b5m;VE1Ceu4b%i93ghASE2n^5 zFGM8PYORG?-t-YFkG0FE;jCL_rnGj6*tAKK9e_>feso=22gf!7x>k9iUCscQ8NV7W zJU73?qCW?g=icnUZP+@TJKu7jl5De0oa?ev!^UwY=*b)hl0B}HuLBcGO(tSo9`X)z zlR;NLm|Sgr8MOSqj(UnUxrb^eSBK_$Ggq3HPFPtFHBEU<%O;+;c+!Wt>6*EZ3Z}e> z(x2ZEDFLR*hdz@-a(bpdZgepJDg;n%Qp^F@zInN6Fv2eZwd62Prj5{ zxCmjtiI>tnk3`-n&h%EfQ4)JPytMAKKT6L}Tpaq9xP(0}M8(kS>AwXVk3S<~O7saE)8KO_>p^Vwtq`&mPLBCeM4(Wi|>`RK)MC zE1!Nw*a{*mT`j9OPPyd#MbRGb*38M(J@z%@q370i*TKniR@1u4)q{18Y4BNo;r^B5 zDT8%zx@Ozf-$X7zQ{Hdfn-6_60ILrEX8q*qXH(ahF1%qq<9_J(7Z**|4cE1wE_uYa zrR1RS@w=Z?Ouy?ZO!wH{a8JPgRL(Vh{>ZtH*$KvH%55kg)g$yfyT)D_NoD5pcANNG z@JTk+X1XQPJ-B*)6&&}bc&PE=t}1uEYkVbJ)$lR3$YrukxI&rdwhEIqpP{<$>AtTA zRcp7k>Xzx}yq<;8)xcCa4!n0l&$7vLsh_?a3IG14E&Utc`NN{=jFGy^$(rGrRQFD> z&;Fh>P5<)9)fYDj(b{$IGzb&xwk^2mS#y5fQ~ep@yYk$jwCUT|f8`J|dAn*ZTERt$6c zXvo2vY#P)0o2Uf0x}Xpt^2bAaD^Af{l1>^PnRC*x%-B-%q0++grah;&)rX2F23t}# zdylCLj?7l=u%~}7Y!APn{Br%=gcIcx6rWmdCmYyH<=*?4I`Xt5qEy%>(H=QWnLy-O zDq)pr%?59@E8gUu%2DzQB9_DUvM77lPR2~)2lRBj*OND{Z1ixE8FScCg%UfKuQ#nn z=>}1{iFze}`GhZ=Uon*)wv#jFmlx~E=@uVK+01(KqRs5`mrZ->!;z5v{5Wqzd$S!* zxGvb?890@$WQ6y^-M)7|iXZ+3!d8?YVptY$L@!v?GRUEqCdXURi9XDuS8g8FLZPpj zNcZytyu@PxgAcu^1Jp3oew?>Q&EQT@s-UspI<{T5;>BDzs26B&akh}6S;?%R?SKM-*TPQT@hTTeetR6;_Oqn%_5LeUs0cP}ZhD5vs&z7xdkm~I#kX7dm zkPo8zomJ4-tMr(|QW1{Opi|qzVz30SwmlBSWD6pp-5UABM)sXagp-q;6&ovz z6yg<$=(u0*5HXL4GiEW*O7@9-Q~Yk3f7G^}XsYkhT*JLh+JHPOc7GU;^>Z?q@v21$)Ncw?SGQ8b`9ipjI7Jdwwm!%CjF(*Uplhf`_l3ecWrxlspj zN=`{JXw$TDaG
    1. Kc64kz6rFSp76`63yB`r0LfP=f~k#r{dC7^8v067E)L%g|WGA z9Dz+X+ku(0<&qnUIZDQnGo@1q8+t?mF^QKbEvA^YQt4ZI4k#Gd`0VnVZ9Z+uO8i2O2Uq=*BWx$L} zf{ZcEgpws2Z%)HFOyqb@EW$bF_Uj5LQbYPsqjzf5fJ5d26rLcMi39;#!_~ub8k1VP zMJ9;ge$Xcbi@lsZjGtA`obrQ`9wn`k6MbpX6PQ2HTW)&Kk}X(XpaVZLuq*n!0YMrz$e>m-7crGIwNz3M^~>yt)CtkcLSVOndd}aJ zDq?aeICfJ7a^zzDQ%9gajW!;0N?P=tC9y1O%ds9k1Bzq6p>6%=I$ERGCgLQjA>_+& zH1aF2{e(Q}7|=H2Gzv$r3Q~t6B7?&EMt0ur;EdKXN=&6>yCG#WpIDZX9Im_1JI8b9EgKf3 zJQ>;bo*scE%Y^bX`~0VKw}LT6$)Ep8$Sau;bzy|gJf_qEiF`!;Q@7+HO=eY`Pl zb;5d~Xx#f@U2=H&eY@(`y!!SiUy&ibJilu0*vXZJ3-b99?_@jev5Zz6F5RDzX4*1k z<@r*kYW~!-Fmw4AU8Xf-M-ojvQMJ*uX0-Ap)9|#dbnCiyVE0Y-F!>iZHE(DgKZNJcjewbeYxTuW-Is^pP&6e!)R(`>xMrr z86DeI$4<;|-@0b}iGI_vE1TwBd}b>jWq8lB3-OZ);|uItw_HB(*;a5+rM6UxUT*@^_%4pZ$T9`#ST|BY#yAre9zN~(@USse`;h; z^dPvCbrLHc{;OgF;aHZ9~JHD6yV&v+sh(GOkWpsr7^o=Q@x9+)#683oS zg`Sa~i2?TbyNerVyC1Hv+As=v6Vp*)nl}c$RjWTPpA6+Ld7<>coF31bOO0Kg2fvQ; z`NDV#v%bI+|AF^kFYg;g`sKr*fSGH2j&jUJ@&<#z3a58E(H8tk$B!RN_lJ0UUUwj z>mlwvFcxx@QdPDPWm^AJs=*sp78Kg~&5kG)ip3A1_=7d0@!nF(lXtm*@^CxpD%*Qt z^f2|+;I33eS0k967K?s(uPZ`_o;gX~GN+DQX7l82DxFl=f=DR6p#E@iWUyskgZE>8 zbIk?!W;Tp4>#i8kUOM-4*Wm(t+3(Av6rWjOCqJOa=kp%Jc(7s#S9jB|6$G`DZB?1s zgH`LZy{7g1yc0Rf&5xSOryLju~>-g{$Oi>iFX|kD(;5sr84aLurM3Oi$GhPxIXQX};Iq zKjHdqX7gS!%_+a?-vK9zhu)dYJYo<1ME)y8jo#RQ39=D!!SR_2hQ&}e!erl}Y(G5F zm4B$ZQnWC&wE5)~Y!N)=M|_#9DXfTsC?pasOps;_l3`mOZ*XaO`e=WbpA%?-W*=9~ zvl>;0T9nk@%cz!qku`-4vLAg1$stu3=7`6{PVwn-O|n{~p1t18lG0CZMM&J4M$obG z5mA|Ocrg(t;h34gnyC8RA2;EsbXkYd7#+m*@)3yL4)7dy53TylL_ZhUZB;vi-r^e( zqGetw!&A7tvRh?YuV_J^dV;~Z`*}q)5NOC(Q_c+L--kxJKC+tZ<8_D*A=7Z*YzB>- z(5RvMc#IR(G&#LJB#h`ZwN5C6jVPOcq=2!gyD_HHe~1xt)(rLdywuwu2JHRG$mzFZX|?mRHGs93sA?#=+_ zSw6Pf;bM;}2({H3?pNDY&MX@6=ay=nLY`0!CEadLvMpRXkd@QPw^neqYNFH+R9MZV zbN#%)v2%oyUf3xHi06cTQ0nGHrZ$xm5tMfMYSFw|5Pyo0@0U?Kp&9u68k&W|Q^3c0 zphCz}hG;x>`G4^c6;nhcUw|W64vSDg?nPD#;O`e|fyHl23IEYavgH&;C&@e;ZVzaR zyW&ZQ8~7nx$uyPIl!`4e7;#{e*f7PS+6IVYqC#*1fgw?+5#Ep6Y(Al^f-HY zkqNATPNK+APV2x!HjPWLit0jGLVW~#RAGgP=3w1778$~FU^63&H;|VT<+ zC-=)ee1UAyy0pn$QAiQ=l$4jPk|ddyr%xo~PNfV1ypZEMR{7`zkq&o2dTDGTB~3i_ zndoDxnNG6WMW*uDe4@la#}fq_qu7`zodg;fkhH0=#Lz7>B17BJJO*gW7V|mwtTp`xa|09l=G?UzP3~Lpjlg&eyqjYa(-MWImSR{O%?69qdNjp_J{ZPwsEfru1$d0En2A-Spb4azBTPp~F>hS!)M9t#-jb5dRvJ>gh9qhg z;O?e+11weMolTo@{pOkjEWMw?vnVv!DcLPGorb1o44mstFJI|OfC+G^bTce|GozPJ z-0jl0jbwiVX0wkfvP&$l>@TPb-&N1oo`xy^1_yd{M(v~QS9d*{CEUXn=kXBqC%|2R z%cJDfvL*MfWtxI-^F_g39mb9WaA`*ZK*&D543^|MtaLrQf!e^Hj(^UJafSj)=%g*-$Qwp?~2bSN0xp79{y}UH97oXm2caoWo>#Be3Kd% zr2KnFbHd5Bo=rdPAEml}It6#yt0Hvw!@LQOD~>9#F#h7oD(*wDb(!UBZ}{ewRrFL_ zyS-v09NG5j7yWOMkK8lSmUG=gSapSJnI^TUEblWO7^cPj6YXbWi@N{a|XK z$sT^lH>Et6(f`8qQq|6#Su?)p?#B1vCB4N{p0g~YazS?Hyt&@BDRmED;i(tD0if>A z$?tu+myqpSx`Jh$@G zi}k`6^wi7G&%5GHOBRklbgE*ahI_Yo2i(=1%DsEkzGm0E`2(JfzDxDD-86oiK9#n| zz3&>_bTwRm_p4hy5q4LLqi*%rr@E@vU+Mb5bjQ|Zqh7%TqbZj?i$?3W<m(sxa> zf0F7lMjfD(M}&Ay$m<%(TX49=;hG4=_89!OZ15_ZH!7PQVT9E`qTi$j22s4f!-Xft zqV08^q8B9@Z<#a4`_3>z=p!5z4W*YQ>>*7T4I900GMj6jl2YM7j0f);`TXdtD#hCE1&*Dw1z8;KEaGTbTdX@ab&12DxhwXPp z9Wf?6X2$8kx|_y3HX;{7LFtgGvW>;a@L1CCsc;8MI^hVvRWY>?LG&5(%ZpbL70!No zjS5HoYWbcR6+RuxL?GRU_GbH$3D+L`k&la~)59+y`uv4m7yjtl>izLGmODWFHSzr? zcAP;(=l5LrpP}@=xfLJsy@sGaQFaQ0q8F4%GW%2BpI*)BAsRdSm3ZkciqaDWZSw8X z?LaNS%MxpSW;g~Hc(M@Bh?-6V245*7u%)CM zN0Xu_ND0lNnklA7jKg84A&W^ueampVQjn9+F069Erxk+2pOfn64OP*1@NM0U2U4Fre|X+F-V7 zWfmj#yFnK3j0rzxeRXjFP%9j^>x}>@rYM}!wKEJvVB6B5$g-w|53nJg!UW2>k7qTd zJeNhfIN2-9q(K=VYx_VaU>@(m_yC}DYn>{A9k3LX3)vi&%5XL!qtZzjoC3pY01Gh= zc@j?iJ~|O^jpqso76}AcasVNAN#JxNVuu9GoS<-8B(;Jr3KGu54W-u`xpxEz0=Zn&4e2)`2S{ZA1{1Z_qR=R++Mk0;;4)}cET|Q*Z7LE} z4FIVnyke*1>Tn^bstnzW^7xU#?Jdy_(Re4%sbn>yllGsa94YcHB7@>}bU%YYs-y!Q zYAfTW4YG)LDgt&tr=aG-sF6kEn|kctXV{U zD^a0}>I%-Ob|}0e^JvO{yGS^-eoVYoZW7OQ+_bhe-T+B)At@pH4F@Iqc9L^vBYrtt z;nF4;Yy_kO4FI=r`i|_>%FS7VRZ{r^^WEjl2nPez*8%3IoBHDbA>R@yPg>^t1fh8&i6}94^ zrj_4DU~UnYPY9O6T&gGx6MJ~hDzQC)O=C_`%RpQ=)Q3P{WnxHSRfaYn2I-Zcnn}8Y zW<3CmQhrCWU+5&cG(iK!#&*~k;YGccvxaOSumU-nF0mGh;tO<>VL;fs^(Po*z^E9C z3osg5k7|`hj;B*IP>mdYp$)k>nrzkSRaBU3paZyUCX!VrLON|R?N{ILTm+vkKqw17 zeg(-fv=vnvj{)A!LbPqzuu~A5_6w{5Y!+Bi$>Rm6 zO2s0A%_7$xu6pJMYAG-iW+6quvuN`OGsG)y1uAeGau~%TvZttko#>Dq%zmai1yj?s zCQ!V>(%M8mrjQb+m`$d2kh9s@v~wG?n=Tom zz2yeIuiVL;F9SYUOsLpd0o|JcBS|~t@GORk!>JgOMNn8z?e|j>UeeAi!kdFa6RovQ zZ2f0MSW}R#w#dNsk}3jOm65ZTw*6;PTE|WiNo!cW$g;IG40eHnF0cf^yj0p?R+tWh zK*fPmqE?{8M#Pmk4HnL!G~UpUeVmsT!_n#tEQja_UE3^4ngAZto|t_U!qwky=p5-7 zZ;2uw9zBe2HyI0P*lWi#0N#vVIA{~mj&kdJqeAY0B_xmAhWOKbm`*$?w97(zZDj`S zVk;{lzl1L&lO}-FhaOT#2g6ZBhoEU;JY|MKYt={X5!(L;O?9uynFxmAc)h znhl`Awve}K6BNl!4v5VIFE$I}LGFyQnbcO7K?}cu8l>|m>O9-6y4v~Mk(!9skd}_F z){s|i;hHw*ZzfckuRK#*DUHjE-@z%=-MHt4Hwa@n2 zEnBijS01o0&Z8g9^uVzVUQgk~A^GJEch6g@EVymW__9qUC;87kQ*2?&=;+Nq?AH69XiL0O-?(a2e&cG|XWPD+i1Wx3 zY3n{Tx+YfkW&+Qg@n>Oaf8iVipO5`p$^M<^)f3WWC({WXWTDcDTnP@-YNt$MWXYoPDCFy5(0uTLK%5Xz;dG?*X zRa7*pU)#|?J9N*yCFM(L&!UHFq6g%RpSPUL8Q<5RpZvc6N;yc}w%+-$sPaxaKmVcn(Y6usk>-|iu|$mb@fWx@#bl6orx+xW4h&o-|q3r$A^%r zLllD}r}h_29KH?QH2t&kd?8XEC6u9_Ts@|U@ncUtpH$5POYK)W{?m=;b&a_saM)+@>HB*g7_^Xm%X z=`&YH3tkp>$dgJ>aQKe?M$bLd&xB|DpXl%iQO5h9;_=@^3Y8s4UOaZZ_W(R7j)bRr z*VQHdB(-8r!3 zz;NDz0uPs?Ai;`YvUvfDT#gv>{KDQ?T!g+qLg@QfgXcot(DynNsv(q)*l|m}_kz5+ zW{;c-)2GtGy~d_rW|r9h14bQurjSn#!zi_}Xgq%PglF@k-vl2#Sha2+|ILwjQ~c)$ zKaUP0n%nNm+jz@1d%|$VL_3cT5bEx#D?3kqqda)9F7MH?w;jm`wsK?MjvtCv7NnXg zrW{LlR7_DZ)9(G@~dOHEh?wl2rz- zc)+Tbu%N#e)3&M%lmst6lGW>_ARMHvl<`PGmV zjnUOyD<8ZL0T4O^V!TrmxWj6tjRBa-o{77G#}`&~>O{ zKr5<=HyzWlczXtI7TI~gz{IofbaNC(I~h_SWvzRVBjkj|#kEjIBUPGB<0i}wrB~_z zYBenag=1Og{*W*q@#vEn{`RpPGlFcHmPa=!I!uxqu&bdvHvqGJB z@k&`UXrGZeO*sV27)P+P%doE)z9(yx3@H0ckj0W0*yvjX!XGbk7c zCyI=4UX!LtgCR~+YjCKPnI>8lQTL*{UDHTNK*AJOao(utgnCY^xZ#cR!HS4_A_+c$z5@4Kl5b8|~c$IHy0?fK&%G+fF$pBp5@m-`t_!O(WQSqrmAUg=^!T zL@F8W#SNBeDqcY1*@8d`)az3`n=a6;)A&(We3j)%f-zugm znENR6*3XJ?9jP&-X&}-sQ~Fs;+tEByIbh5^bhZu;XxXzA(WE7j{saLuBcckCtXL;g z#EB3*$;(hJR&Wfk7v@`-loUvoQ=Cy_NTvgtL=EybbsC+6qD5y&Vl(xkAqa6pAz+;Z zE1Y!?2;vLc)*D2XTRu~JO;YDp~62=5h7qkoe-a&k?h?G4&5G=j(TuYBCcJcxG zG;0;vJ3zO~x84`D5@@aWxWru_;uNh78?L0|Q4EaoLwhn20cq4oP zxC_LUGTraav*>P=Z#5)F{@83LbX{~c?-SGjo>ankDG$j~08eM0qXJBGKb_n>8z7xp ze~(x)MBW(aXIdFDIFPL%SIZI;`LNI2h=lf}nzVi3MH{E6yXDM}HZDOf7ox3W&>1}n zr^YO4QPpEEwI7A6u}~gxn2cy{Gl6D784UA`|2Xyw61brS7ECL2Y5;ouBG*24s>6}@ z7Q{gx<-7r40z%#>sT0>}6s+&~tEbR>M=B*UVp^~vc&NOEs^)n2Dc=1nNN83oU-(1i2f@$qpv%e(V`CPcAx@uI()ay=M`*P*PiN z6&U=;3OPf3Ongaf>=kYM)#yDfw60A_EMpQkv{4K%bu--DuA*{^rLBCI&(;IYKS?%{ zuqBsU3Np~hkc1oCS)(Y)vV22-bAzGn6#W#^9O}`E_cn$U6Hggrp8{y$E-DUx zw1H0LlXBZdxiyz_aqLOUVfMk_M3|<2ZWIj3XXc@nhveI5b zm{YKDOHx?CgdOCoumddZE;uTK7FKcJ3y#z(t4g@LD3~d+B-W%vmhGaKji!`WxrUi~ zVU(;lEm;mSerc*$6n`gJ`()K^k2Dm%`uvoGTDmQ@tO`!O7XNO}#hoV00j4Lf|qw~C8x`oyCU1lGYp>ii3-M4IrX95lR5bE!#RfwcH~_>{Zanx zt8X?uzN)lk>pi<(u4?vi`AN~@UXvlBz$bpQzB&KYDPha;P2N8|*FN-^_;`2S!6@wB zQT)N2+`TE6e3Xa%ASH^N#+1RDOL4v`!-uQ8pUZfrZpnMTXv*_Tw%u{{i4^;?ZtGJ2 z-Otu79*o})-)Mhbx{WN}^Kg}TsVk?jGWod-sV<{2x^kPn@ZhP-&p)wgpZ|2_xHpua z5f>GH_tx6Wk5fM%e(K8D&QBkxFN*Yr62f-zBX)$EDzepmJX!dM-#xkjy1(ZA$M4u| z{i1oKd9r)xaroE(5^O)UKJ}^GeAnfQ0?)ji%WsNSl&u=eiB@G#9jLEb|BXYL^IX;1 zUpHQT@cDb5urGUK!T8FQrIJ12jhr`kUJg}U+;?Xv`F4}xQh48;haMiRvyUEr&F-3r z@5x^~CVj9qVRQW@-?RCAG=;BRMReyZy>+*ru_dU&hZGiTsuRr-bUx~;s7Wy){wCNXr|EaIx;+2{fPsjLN zVb#~(v>naU8E^-Cnv3)gJg@AqZ7v=k`rY1N-0pI@Ni>2G4mN^LgY1NS~rGN+(IN~CO0ZKKbyaNiW3ZDaUxpN&HEj!aS8%YwWFUPf{6So7&BnXtETMPtPTb z2p3V@Ch4QJRE(I__>PDwHhEbgub3I3N_=|A^KLH{r7j8;8$mPfsxaQRz@^XDi3*5T%$3Ec|&ntoNU}SY)Bgd+m&u9 z4L?Jvi*mhYe74^?V)zkd$f?bJ@g3IOFQX+;OVCI&5a=I3tGQaBy!7G5$FzxBC+@`2 zfCJOe@PXih^Exb*MXSFM8;1-gTX-C^2^tg!V+s(#3S=E|D+O1McE4yI1w3P*#I%&8 zF20)ObfY9}C3R#a<&qPKEHWVBA{x4-c8D|#D6cdEZdZxE9tH+jn{tY00qv*yF~sf< zpStDgvx3GZ_0nP{0(dOmN4CNws*I!yeCz;MfXB&R)~NBJg+*il(S_Jy+{ZXI7*?P`>>4To0zVYaqm^{1IDHbt)){b- zb1GpVazy}$1Qfj`ITkFyYLXNmRG0A8jF}-+xt!(9L;yi|jsL_dI-9zmrWwsH2N{4J z6mOIq!A{6Al9-6!3J_-RwgA|!rU6_MUtx(I`dMq`3?nL0yi_0yKvtETsV!Csr&lDB zyC}D$=`2PPYUGm$Mnexm@52;cEkHxc0Ckj1;Y8wJJ0px%o#xJ+B+a+;QEih2soh(*_WZD6|DG~aa5>7*v7!*>$ z1)ensXUy4#jD7(%lMzviv1-p*Rz{F!F8AibuGsv8nNbF4jCEzxok*+0o}dd9=`^De zxN0_u#6ck<|Iiv681R9lQ#7f%x($KrS8DrM9WIEoIY?txoN1=C%&na1-*K}HROD2d zWr$XKGETyQAq78)wC1fy*$g$U**p@MGXXs1NADsP6=_2RFpXsZ8r>4cxbd^)H;r{N zW@1Hvkh6d_oQqNEJgKlUn&Y6C6p)EbxzI=TSp^$AU(qY|e%cG!RE8_mKUGhip?Vb| z!=;lTp2}8=KkJ4Fpu+&w&NndkHh)mPI&B-%O_DqB$xB0avm}2*P3LXra{tT3M$iouC7BEd?zc%@K{m z6FI#B1#$N1;bSn?stFMZO9-1tULknCn0n=$!1k6z^*{Lye+P+^~G={RGHkkA?US81zdseK| ztfwnE7ubfY#p((=DP6k2%O%&Rwb6E@5KCG@8xku7v$7v>^`xI=Kp*pXo3*T$X%yHS zA8leDPtOT+dKE9$_MrZTrFR_eOR1)V{B`vD#+4x^$r0pQy`sJ>9?b`wWJVdk-VYN5 z1F2Umi}*sinx*K>khq8*D(5QEqKMa|Z1E_+P%>D%2g$@6Pq4BOLXs`#VF>grm=C2K z&>#+{FTA(p00p|yTF{+zYbC~(l6@50$GF>o&%BSCWt^qPw}B@I(^)PrEXajWesLco zbnqpondb1bg>A-l(z+G$(qIvLj6+^f9Ghu1q|L8w-pswhBmLGuziKd1%WGbHq@g}Z*euQ6H2j3@O-&AHv9A8kdX5tzBZ(!Bh3t*%F zv&8*B+d~)Lwkz6p4z2mK#*xzadl$-RfEDj6m(eU^Lg*FG?ZtXj34jys=w38`;WZXe2hYv(xS z|ED(l9gfp?oF+fNBQne^DYa)`;@j=;VI@kZ+!?KcUw0K`ypvH-C2aAY1XnHt{b<>T zUp_gm@^e-^opL2&I-a)b<$oFXHub)YrWKyHPP&@jS~%YQ;tLV}SI67OnXb1MM!a0c z`MobX`XB9iDg1K!mrEm0GPw`N)wwV0YwEy;ihc0?vf;vSyuY@u+4o-Lx%iSXU%Y8v zWK-qr!iPs!FE5TVgK1N%e{G*V7A;Kvyo&yO_Mj=+7WKsc3;en4X`#oR&bbRz+>A$BQ%>UQXb4RPjzV`ig!HcGs53*<2 zhq@z8=iahTuVp`7_Q^fbTCeG~$$JN%c1*umyCeO4)AUlgMYQ*hcYSVOmiLFn3ldg& z=Kaidk3IoB;@ZkyTDJ4y(;jA|=9_qGt)r04Uws*D*t+q&dw)ULYhpiZc=)q(Rr^1@ zLY_S0ot^x^YZM!JZvuh5YPYtLipfmg_y6KZ^nD8AuJr&QqpUgNW81UO&o9_QHt@xemeVbDkMU z{T;3zM7TP(sB%o%xFoO2_Uhr7pk(Q2Y%yl^nb^uov?8-`D(A5My{Ux=k53~|-uB6y z$z|{C&5QIb*@0GMx^{5&pG}6+Kg>+H@WlFr@ayYM%ETHazhh#}HD;TQQQSlCOk0mF zZ8mGKNkw8XIzTDyN(R$HaWNomC9Fs*$t1Xqes~sA!Prk8PAUfo=GiE}uiD4x>iIJi zji`?p(stq?memRVmV!=54N!VcrO|)5(A+~}u2jV#r2katY8OicNn^B(K%t9?_rbsl z#>J#d)U#A;wl|%`yJ*+@<>j0JN(NZ6r)(Q;6}3#Jx)1vWpQde`us_~8U|@?$Cibr< zutdU8TXcQkHK|7yvkI_4F)0l*I2twtPDXs525>rfBbvW}D=1)g$Z_RH-HngRPI)s& zX-{x!c>C=CL)W{;QsjwnJ~#5?sctet#yAiIV&0Px=)8=5hW~#O!Qcwi>l<|fPqCOg7I@e;nedM z6$Gerd9u}j0^GKeS|)|i-y0_ALR|O`nR;R?vlFpV+Aesv6opWbTHp}u7&40jJPUo+ zxfGxs5x#lm?oW(X4_Z(YcXo+kr8F{^h4c^^0j^h< zuAA||Pu3nzBrKqIq)F#aj?`pHX9};ZYg` zn=s*ffFRRpj!MUMb7_JBIS{lbmiK@sQ?KFqKYp+fjHLAqg6fIpm_eRFp{{J_NuSP~ zj9DlqRu2lHj}`gf@qG4~Xtr261#V z)PYtlA~;ZlU}LoG8W332$G`z|$QpeE!_a!vhdLFw-e>`D_Hqs#QUWKz++H})vG*#- z^Rr$r#1g>&Y2m>fXSFlbQjVs)z#7x=c`+Dm);R7(JjrwtW67gq=|-_Foz1ffb6FP2 zlQI~Ia6C|5+(u7g5Pduz$d>hXLF6M+;5;>GyOab@Kt$gBj4%iug|=S4#>TKpDKSx{ zYcA1>&ZGlk+`@J4)YYg|W`nvz#z2q-w4U@Rrmtvv z8Oc;zLDrC`Ac)cxTNt`guA$BU;&rWYYNOKe*?)QT6l&qM0&9gr@;IUG5>{eW+Hlsu z(c-;OiIDLWCRa*fv<|_Q8m^QwuxNC(27?RK)y5;0+PPwJRVi;_wVQviK0qRO!LDA5 z@qn0pDwJD3EgUSZ%saIXtxwfKqY7$fhJ%mXq2mDn0}Q^h46bkPY95q3J&T3VY zC~n;OYw%oglE7QF5q8eFhAR;w)N@&~CPoq@pXlgSL_426rz(n{?)X zbjOVY3f@G2PbK#liq!CGYW$m#$|9ZbG(JF{79MbGB{-mk@r5EF{@nJNRgriC_ORbW zlD=Ygb8$B2qFvoYI$uI#24aA~jQ#j3`~+T$$vExjA%BVQr|=Zakc!b*1m?k|YKhF} z&5gV(Ao9D*mGpZV9y{WdRX%}TnNE_8HB@Juc3RtehF?ko-mSCtguTW*wlHB@^y8mT z`>gQc_{jAxGZz8jk;1~0W8%S!CtEAQz!-TqAa$m_GdIYnI$i%Be> zoHsEq9GkVeB-qbKdI~ZEJHcGo9hU3b7e0i?l$Bgh5fJpp4$Ut**W~VJueb18Fv~NW_(n8^`Y*> zr-n|lX^!mgtiD|_V%5GloENEFV`skSn&1oMEU8*>H{`cVM?&7qgBe8N$Rdjo>qBpJW?<I!nu~f$c*M2n0xDI#c5_l7S@l9tY|yn4nFQqaBoPjTNW(c{6|*Vk>E~n`;GNx!T!pZ-#MSw z^k08@Ci{&kxOu8E5&Lh7IWyq@pO6uIc)I)l(_aI}jGI3<_7kUwbN??c`hs_C22j?! z{DZ%7|4V@lTy$)3aPtH{{IDA=lKfiw0%UuH*yyMq_s;q)64>aAA^CO4BKa)=WHf|> zGyxACXquNp7fc%BLIbGJ%OF7g2j}H~Ktp_f8?|RtFlO5hM(}^oE3>|B|GH*<^_RR>YcF28E z|I%O|8ugog{ySItN3=3pT$`o<8+})P9g<+b`o|S~>OkCEaY7*pbOn{+{E5TpwRx0~g6S31 zjLBi$m@iqP7$=&+QAR+L6poPft#cKePv<9!Iz>)(6a6AY5D4{|@3ASSFsZl)k@yxe zFf|OpW3`1CGM7PcCaakcg}VThXB;PR9RN=)!#Fq%f~km6%QGs5;BuzscrPyC9@SC~ zw?QrPCtJIAR}G0GybVLMfOuxS&=^M4E@GyLQXTqg zhXR?5x@@^i0LU_QAy`jY?!$2DxO5Mw7-Xz7OQSE65mzY=Y^F!DICTQqgH)r)ab8m` zqgZ`DLT%)bF1!L#`Sd9QlE^FAJzcnXdD;T#-XeuD^&W)>8FQAOx6cugSid@#*d?E? z(%SBs@+Pr~76cPl?$VMHhxD?ou@qK;u_(Dq(dcCo+Sp!qmKtCgYm>%JGU5~5=!9yk_W!y7~_=(Ds zghCE<9*vW+o_v7>7TqYtqXtcWn9c#!4@~eryoY471&7Y4bI+IP<1Ff5sixpaB|-DO zj8Uij`S^6-rA!`UTe)1g91WMXrky$gs&w_;aR3!|!o zjNb^-XWR(L)+%eU3Ry!r8B#MhEU_o`@0fr~pq~~S8X0)42tSU5i4Q2TT3oMbf_DmM zngdV)f{+vsz#r%4@;GJH2wij`58ga@JT2w{D2Ytk!gO440w4y$57%o6k*p_tlw$2o zPFJW*T8$axK?ajeI~BF)YoGd>B)$fWvXnuyNM)^7+^R!1w1G`fmwxn!)kt|cE5^}i zE{FAV8l1{8vsGF|N-}lvB;}ydC=3p~22TPa5ZB@*q@;&hZAT2}>%oCyYb98hiOpkh ziT4pBH?tAWj2<^(z@yXXR4qcfKu4`F0T2k#Cke+x?E^TVg3<+56|zY|;BEOD1z!q@ z#9mN1&F&KZ@|2yd>ktF#{5TV*O-aq{CTw<=vycR*a&Wm=FHk5Pse`yrLPM`+K`Ftp zU-W};yi&(mlZBKDuA9w(=24!kuTs|FrAmzKUBNK?L@xB5!SY-dCQH47kCIXZ5#(6D z3)QJy%`C1F^c$_JtyMKEY6E1*6=sq8i`8T+=w-QPYo@M7tk$V;gV~S;_PC$|Xu43e zrDoR>o$+8(oEyeQ5FyEuglP~9CbV)cR7AGPF(UX1!1GR1sZe<&8>uFdkci!qW)dZ{ zJ8XOuYhBg&076j$h(8z#)8(!aXojB*zKG2_LB$aZO2WOtmdrV3aQaliwn(m*omiu) z$7#u{%vCtP?Wo|DNdT~c1 z0bL)&nx|R_4W&|e9NPf+)1h%_1^6!HR8U!%o6Y(jl4BNWos1^-C}`d6*4A#sRx6L3 zPd(0hB!^fm#|+2~loBVDcqFMrB%lINHsP|bl`OHalE#AKig^Jc6F#m1lOv!2vdl=X zWT;|(E-7RXB>yF$wh_`qb3I-qbED_BZh`Y345cbScisv2^DMPjl;9Cb$V9scXQ~Ld zH$c=OKn?o~-#nt$>I66sjvWQa4S+fY^xq=lB2Ek1m68@oQhB`&p463jTp&eKC&B$5 zkTl#DbrxC2g#Hi4S;U=|KgE+-*+gdMMN|_b3hs9`=5c>=WV()@;0JAWw$h|ZxJeix zdT`0Y)2D@2bF{FET~ma!_p8;Z_+p)l(|mgWF*c@`P0eQcui4siFEQvB)B(O(&I%SQ zLKOdJK3}aXd;CAr&&4ib;ED}6$vKosCmTyREGpggItP*|N9^{9@Y=03`!IXt24A}z zL}z>P{AP8MpX$T#JTq~~xk@?Rx=Im?)tRI*rBP6YE+zJ&@MYT^yG^E>ZPg92Uyzfa zAd}_d&A(c+A0Wnat*J44Di2bdAsj~&rgLeO_grv2R_w!x#=}WCRgZ(>(ZS=*gsk_7 zg`An-TMuo(5c9dzL2?UWC9}LVrc~JkhQ0u%91@?XRG`+Ohv^Lm{)}FfJ7Lw|KEwBf z1sBIZ_JJpD#;xgx-dH}rX2|32@C@t@isT!uwR`b4rC{Aq)q;ZF7rf7<->R8$mV9B} zbM7(ORL0&S&ONr|>9MNDf_-D-`N-n3{a4>2!n;4AavMiKHXkS*s%S2YDaq^jba>k< zuOycZPgbtXJhG{JIK%YBCy$<;{dfWPw?ji8<8|G8y?dF_mx+!egUzEtdB&8E>Oke` z#Fzjb+gCd4>h#0$$5Q5yWqVJ?pC}&s+w|PuzkT+Z%#RyK@`$`SSzA^agLw;YxlR%n z){M10`n&s<+_7k=$B;-2Odff~e8o0&WWhV`x}QglO73!xx9-ANxYGC0^{U1X4@UDN zY+Noq`byMnAv!qH_|O%0zCG^7{^*W~a^+XgH`U)Uqg8m+(+4U?T_6AUWMAnzd&%LA zd>?bU?Bd}Il{a5s@e7O3>HYkXv$hX$_wX}QJ6u;y%g*jC+M4$IzKHA39Z0-5vd^&o z!n($1@avC`FB=&0x;t8f5&jRiW+`J~hZ18(`Xkb2U9G!THf5xr>{xNN>U(%>@#ZUU z4*&LYA~k|nU70=9{mOwUBa@#x%Rg&e7kAP>5?OmCd8B_~$JkYAZ2i9dFAZ%O-*RNc zexRWHqus;b);zekjQ{lKz^N@Q3&v)yPq=*kYH3N`h1+W`_r;8jq<8cM8%J~7J~}Xz~wGaK*hx$!}4S@y5=2y-y^pVvP< z-0}0ez^CqOwvxV{?iCx`u4E5?o?iFP=z`OU?N@8O9hYy|k6sDahU6cBlDS=j*wm;= zpp;$>iG2XMcZ0IS^ylEK;CifGySny&*%{5o%c*|@HzPb{hHJ!cQlkHW2*AVYv@h=J zME)CepFe^B_w(j4(Yv=0(Ys*=_`jam+u>~N*(E&~b$NE??3|8y!FX2(c0DwlGGB{Y z)t7p`7IZnol@A@W7wjH#rIx`!CO)-_`xS_4HAGaai9l3C;$TR}0Yvq$zYUgQV=tHY zrCtT>ydMVG&Of8THZ&L&Qelt1X^cKRGE+%AG&1>6hX;u24s0y7vLpFN^QiIHzSLpm zIrw`$tG`Mu*gbrRUB7$v#mj%dX6K?{v+~-sFGk9bf@ow$&)c9a|J3w()aOyRUs^(p zXY~^PG(%W%N&`A;LPWWGWfws0xvE1A86JTu(s#kGMrzP?|k&{oeJ$M4g*(v7m2*XQ{;QUVt-(+WA3c~^-N2${K+;N*FCkJNv zSmC7<3)a(2EFUzi;k1&zS|Is*^}Vuy10nEhD>|-pIDd_)5N*~sypr#EYtBFgiuP?1GtrBUmny7ELZqAQpjThUky=z z3V%Np2}*6Ngqx{Ryi{T3rN$wim;60bWNH4vRvE1us;=JX#6UM#DrCh`5ae* z7fJ?BD(2#_W(HTg*bGk+yOIH<1!XBN+Wb_<2WVI`h(9^xVRTapF2r@4W#euFbLeUt z0jra^UZTbc7LGv?!KWp?b5+u$-5?1uTB*yf_@vV+XbLv5j&@!V6`L?Z9~qi8q7n{F zW8_y6<2W*ji0Cz2H8|+^sakmt4gzGFGkV47V$^46pz1&*?mZGWr)zizDf181)3E~0 z>#%AdM(fg1v5=v|KFdTcng|bRLj{Bj@sfzb8Swj)7-h2oa1}CDLkY-SP=>%YA~?M5 zaQrO%y_s6cL2_W+qy@fG*L7xB)mnmE)MWDGZq6g5bP?{;xX0a0k%AJ-nMg<%38*+W zL0N$cOs(HOmzUtkOFc(19pzfw=F>WKl3N3Dd?r@Yz)K8m`nkJD)bqm7tB=>yd>qrn zfgB&2Dd0}f#xrgFPnp_yyUWD1shG^GbEqd&Hd{4Ui4Ah>Jwzc1XH^Y3sOD4F5elkp z_-#!uwMdjm6skN2(Wc^?Ra0zlO1an+#W^6x6CYq)8m0@!lo(!Ob@+BbT=$72TLaL3 zCv~crV#BE#iX%|mjOi*Q54nTNW?k0%JaVC;$Vf4Ct}1X{E9<^+_`WPnk_dvaPO6vL z5eGL2T>k)u7_>B|FU_ll_sMD|DP~E-5}BGz{veA)X2FRx$m@LKVM2A`Dz0M%L~#hB zuIt5v^LY5+Cvb2V)A&v(s1vLajHW_sCB|^2=slCpMBa}>o2!sdq6&Gvoe~pqoi87^ z0Ss0U4218?Je95YeYK@$9!8RpM#s7M>AxxnvI8VLKyj-X zLNnACZiu0gK$F5TP)j*ksKFo$y;p(1s)4r#eF;>rbzo92Q~}7Jk6qAfNsCstXw?wj zho>S)cQ;(_qAJ~`$?su8k3*HuqM;aj=reHCe<0sa-iKBGr*)7Lb`@DYOeWWjKLx=y zQs!=By;`sG)(cWI{T?nfAEB1=8e1`ocjHM#5PfQ2)Rknuk~N!$Z$7S zMKk9&w<~qdRNCDtC-Q!&4*##jFfU>5rn0_C2{h22@nl3wgW(2EL?3BxsBI=0lWx8awzaA^bQ2;#kxNw-j9 zzhpX_vUIk8>lqo#*NY6w-!_kDRSb%A1e0Fz79$g+d?kQbxrW6 zO$y~0C%%&KZAGH(`qsvG=nv0ln_Au)Nq+HSV7|HL^uY54*TzqbKJ&CcrRdJVe*ajb z@sIS5objWx%$w=5$d}^#s@|`fT6%fFIYh-S+?)GalOekN+|qNi_hNfXhO3lB`dq|_ z`{DKEnef2%Gimek&a^ZJp1hH^KNu;rcy8>pW_(%~cCz8d`)Mt+0w>Gsy4yB9(O5R= zoOftl?{kf1Afi2-=xQ9CQ_OicNA3j=MEccCNyx5m0}?}V>d z_R*6!Qa^uEP5f7I@1t-3@!QFc_6u)b{k*$w!K~X;ZaqKo&WG2`o@q@BhF5#X&wH+^ zOt`i4^<1hmcDSl(-|aI$qzzwv^WuT6fu*h=aw1(V12+yvpSpA7=L6UaUyYu|>kf=f zK9;uOlk_{UPt9HaF@4k6dS!HY;Po{A)~;t38gn5MT!>D;Hox_;=W=fkojG`A%Gy_c z+duS5W!i)Xy;HT}^ADNU}6{K=DmS4H}$Gd^Uv#w0~ zC;P(b(QdLM=SJzly2}5U;7s5``6DSN^9ND=_$l+H)a!2bFJyn!Z({xjiT9}!vdv>3 zhj{WY2hV>QDgX}sh3ugQK%@VdjYl7b5ODYZM)u@3^XAoOl|jfSjNUz2DA>&f2VaE} z00{c;d58<=#%7dc`**bh^ZxM6p~yoARtHmE2a;h(OTK0G zRCHA^2*Vhl`we5oM>{3}q257-h8O_%QP=w(8>aw>U&87si|5a<-!>?GSovI17S zr8i9KX@-!ZhWn5W91!yHC{kEdm`@9&B8p&jQ+b#`m@cA=FlwkQm{e+On-patVMXh4 zTTd8A`Lqgy01Tp4g%@|o-%ozj3_St|+bI&neO=g31e(C*u)w5BhjvPtC6cd=Rb;(O ztJctYLOcpn63qc)r{kwL2xeTzWX37poq}S~wmWDUlF5p_>tE3+pg@rx7b_@*CL0wi z`nu{D9Vw-6aYAhmo~#E@gt9p_#bu47a>xukf^Q?_RF|$1dyltcT}`CLuf!?TAse5> z5K5##T38Pm-_tj_7B!%HvE6yp&jGr2rs4)C*~_wId}Zd*JR2GY`D)dxAW;ElYC3x~ zISf5t1mjYIm_u45rPF0kHXb5V8gOMHu*L?| zMSD0@#lzD@EHl5?na?Al)Q%wpr9TI84>-Al$<)cQ3JTo`it#-FE7n+`n1Z?6qGP$; z)5Y1PTxw=xdZ7V0_*^bes^L~a`X8CpZq)IW3d5tz!`d+^QyayHkxC=UHuA4CsO6k= zPa+`&jQMH;$wra&8DaYsloUT`V=6{)mX6Rw(a`yyNT^R?*qtxY{kd_1>IWL!5nF7) z-?M8sQt9__ktHsysR*YwNC+}1-<~16D^NXATBLs|&e9;UsfdrmON6Pt2HfIdIoy;E zg^KasR0ii2CgH?z6K{`+Z4jYZ5~p!Wtt<`!HcWAaz=wMU9%7A!H}9#W8&;6HH0snS z^tPXgqHZJs154dfoQ!F!6jI$g0pq-kmf&AAWE<@&l1b|xLZs1Nn>;jU3$f7&dT<|g z5V}fuYzbv%?28btT4-PZLBUxgk{c;~GXe5nNGybI&SpR9P@T4wJ6sOU*QP($On^ES6!AdL`#4}y#cYNE8XxttNEgS##(Emu z78K%`iZKyr2!f#&KP3=JQ1~id5Fz9D0lS!WVe01 z;FAvm!L4H5tjNGy#=v7J5gdv`;E{sPC^{A26BA!4foy!Sb_0vAKlE?FYy*1>$_%jM zh2UVU)}-@-CdaXpWjPXB0a}59;+don@PaTh!oU@dP-3l)61yh7zqye$X+@f{NRXxH zkgx#(B_O5`Gw;O-J0|3t?Q&|4IDs5b(RgCMhm#NkD!!=_Y6`2*k2%8eJXf<+iHBRC z!YWP*1W!^RHzP>^xGo_)?30m!Vi>LgAC@c-bCVH1N+QhdR3QcRs2)`gl1oGqQszDf>uMs~%lgR|BM?=2ym_yKjv1sBnac+sFhRQHv6UL^H+dX8=_PeWUnPe@} zz`Uez518RB0&_~d2FfN9fn;>J&m1D>@G&pp;{}U0jML)0Pa!jLQY+NLsn>JEd7qom zAf_IQlL5K!V0gm7>vkxrh)BMN$wF2tanS7q58Mf~!WdT`?r4=L0+7Gu0q~GuswxQ$ zxD-dOjlUnE`E*T6n50vyus5NUtdJC;L|mz8gzj!-AxZFspsL4J9T*~dTAc!;LqO`I zS}riPB;2B9T2?IaI(g1ZlkcNV^f&Sv$Ssv>@+gCjgr$U<%$U~2waSav@}FY+!^u4n zOZBvMkns&3@o>3Kq$!)@YwH_6%329l_$OzsI!O;r8fIr$TM zYcF(*YH#~QzWObxnrW3TnMT&S3vpK|v^4m*ALh-#!}}og&>b|j;1ifb|(Fv z@#I`0mnbq$Xk#YDvXdMAwufQKF^*e~4dyrSC2>XM^z?DiXWk)XHLDSH1NhzRi4CL> zdvBGhT=1r@o9#}-7I5ahSUEX_QBOA$*&-N#T@55co0DCCS5^uURHOSR?14XVil`ov zv53KZ8J#>tvw!lKLAtLg%=`M>(pMxyifOWkH9=UPfoaA_&YHrQQ>b*RUn<5pt4B1Y zvQz~&65mTaSoH0*4FfHvA>v^4l=5YJnPEA&X<$QUZ0!&SQWHqTF39V|`h{S$D|*|= zfoaj|)t3&XO)Gcas7NmOXl#)++t{};(D2*rufD>|cAbm6;XIhuIiOx`64Um3&Ybrv z;ful}Ko5}-{p5m<$ZJ(KiF=197`}~o``DaAISVF8ugWiMIu=#%^qM=vH_PX^r*YNK zeza=e?=Sa0nEOoU%YjOD&a-93ouj5R@--@M{rSK{<7Wz6Z%$9>du{mlM-$xXqm3U- zv?ow4O~HuiE&an!u6t0(Xm|vSqjz4L_ayhjJKx?sJ9~)ZA}gY^&mRli;0{a-k2abWsq{4;BAOrrj=C2d_G{P|qv*3ZD?oBXE}Uk&~$w4BHpULTP* zaCQ8WzwJ8^2BGJ<)}LLYYc}+~J)Hh=V(GA*PMdbVX*hFT-#6E6#~%BlV8N-p+tir@ z(?+h(tgF5H%DJ;sM!v(o_P%?0&i+@nwTus(Q73Luqa%m|a47`IJonD$a`=Ex(r4g{|k1KC=^ynQqM6N78`k?@uet{b=)x3=sX%3OQpd~ogV^_2(S z{k3?=PA4XJT8D}}E&kw?lC!RWd+FKk;H2fz#OM!`qSJ=HI$PH8{5LnwjBlwuV7pcN z(VQFM)wxf!zyDxsOZ(8l#!099)_S8#fw)z>)yG+Hz(FU{m(#i zbM4L7wy(7JguuQr#Wbnt3I=FDG9az)Q_itlLd-k-Pyt}_R~NO*)4rG}Luml!$Gc+k z&!hUyr)&Xr_1U&_AW#2`rk95PhxXqN&oz(DjCsNTAr?6pBJ^)btH1cGKM;C08hv{m zwyNj{Z0+jZ@VafO1K~rvrGib_$0WbOrk_@kHF9%m=t-Wmjx9sp2 zGoqE@qcftbhAu^gZ|eiluXcPfvRb|J#n_CmLe|WKq2bEL!8_RJ&DU#JZ%oY{*{4FO z5M3L%jE5ghe0&vm`SBr0NO3|V;6bG$d2E&v;`5ab&*$W5l)o=-xH8l~P(lM#7`4|G zQ}ow^|5~-=^1p_PHa}RKRyi{D=-Y!KDnG>O5B}DAg}XgGu!HrQ#dSRJNJLJRdn@ zUY5;oQo~sso9K-I-H9hXwzH8>Cf>lRLB(sdFAv+p%$E=>BYsPAY`8?NjBTYXt!6z* zrZk(2fZ)*JSf#S2@qsw#_P5TfR63Uv3VkSb0|P-Ne_~l~dF?;Yy37#mGX?U=e&RHM z$w?5YYis9I)_ww)2sNw6-pX~+a~a6P!1X$zu{JNpA)}m>(`#!8fexiOn~P)-(Rf;B zXlkeGRY_95id$AgYOn7-Tc0^@TN&1|GFB znkQef)W8ArQ53n8-9h^_4PZZnggHnQrfeEO^NbUgGyy=Lt^t&X%K!^#c!v&9P>Vh^ z+MXOcNvg-I@q4YP8;uea0ph=jq-HCCMmh{MNJbqZhOwx`A{i`Rp|POG23rwQ-R)JQ zykV(L=3=htpk!}0=7UErQCiARBHdm&$xf85{ddzjNgFS5CmJ!0WTT{UIKQFXaest1 z6Wk?ku?d&nBTI`ovI_?>jnu`4fgIQ>uc4sm+9h#d_R1Q8@T2;)OSKIqLDCGlWNtF#bNn$ z5}Cs$fnBbX>BUneZZlCYV#k?eHY28;d$R{G#I9#_i8!Qw7g6JG8p@jkRt^{dE(!}HWq72_Pe5buFf zh-l!jdm%SDAJfw)&LsivhDAz{FjU`+OIDsnH(|xdG}@vw_+x7ox)K+)V9!PM{ab>; z***;eYc=U5jSr3>L5H$1$n<;)IytK2Uib|xUnPN07=UA~mWuy(rU{mE!2}HgK^Rz< zYstnMugDO3c3x=1F3fSSgG5bS5#yjZt%K62F`O2dd=zZD^g)cG5YtW}g~j9c(-9{s zwIo3|IcSaO^w0=Vz>O2qr4$G_WN7#*rsGE#j^^2jpNU2x>)dHDO4fYJ4c3bE#0wAu zu3EYUm9VLr2)?Kpd9S@0t7)bxM8Eo;%xYM*Of>!182ds~obAu&U2X&tc#qsc4cc7=xO`R%!>0_|OEy zvfhYvKc3!hubmOkQ?zwwS0l7{B&pR}H>~d&)V6^4l`fh;f zJ9|17+-HCqLyvdMQ=tX|?KEy)h6(08-aSYvMIvb-Q8|es;xvpnUCNUgDqb@_KCG>j zvFL~@tOzr|PKkObwFrcf`6^LYr3)LpG`k#1Dn#UVupq4Dp`Qbmj0#|Mw4s(?D$m!` z1fp(IV+k#Sm%=9lt7suzK=rFI9q83SUd(X?>ur{@uvXlnO_C910}X6H4m;Y-gJ1^= z1-*Eh)e$bOvVmtDsElL{ln5xOhJ;6~~Z zF215WTuxXe*T$SvitvS131UL8sf{+Jnytws^<{Hu2j}brZ-P}DpX!wOiXO#U9B1Kg zrY_mUn$mmuhmGA_whim%4XOV3{O!tYd5I=-t+^4B0O2a`qFBto(5Bsdc*{m!w~@E_TkBJ@^GVh{E|TC$40}kS z|HR}8m}_lnZ}kR=Gs}J~pRB4tr>bRzuq2yrK5C+ zvgLAnJf~b&>8xkIoc@Emj|-MmmaQ9Z5Tbi;m8A5Y>XhDp>31dY{Op$M_dmIv{M+y0 zwSf<+qGSHRgNDVgWKDQ$BOQ)KjJ!BIZDZi#XVKS|E;|r?t*1G9@3+Z;_v7AvXYp-j z>XWvKZ$?+%UjA&F@!G2;cb>l*lT+q8Ft)GyC&Up}%c_A%_hhj&aHJ3bEX+||)t&dhJwbl`eK z$CB$MHw$WmN4d0^i+f-2-+E`#b7d2krY*g}v^|sn>2}ZFeCpR0_q89d7o-P;qkTgE zichu$?2qRBn9=*y!!hUDE*}XTWfC9D7=FeO?Yd?yFCd1zhP2lP60bWCTzTfk2b0&o z@vqDPLp(cNZY_KIRP|NL|JcIZ1*cqN$^NGratnrkC^?&XJEx&8a>!qLHuKi1&ZoA# z3NbA0t-1V-AE(@INK5Gz->KO(4~vuvxYO-728hQ7<}czz0(eR`-qIOZT((}i9#^#NYRS?^ zN(%66n-EQb&p@YU3BO7TikbFFYbs8e)no_`FHPJNtxY0@$E$GSHsgbbwrLmcedc` zYdK5%gmT*$W4mI#)o#3!6a4XOs7ApZUk#E**JKHP(c*VX~V{}mv9`(20+12h6c!xb1pXdSdZ5N{sR z`h~^}z?H=UDSnsM zCyhEOGqhaiTv&KG#NYc+{c13g<^e|%BQ;i8K}?_3z;Y4YR8cIk1gvY}RZtmVE;L87 z4k@8VZfGn1`x!RXa2j6BRGM#x#eeKLM;n@Bvv3!x7h0v*h(^H5CpcJc52#vPpU)Lr zl4C48TjP2;Ivsnwm8b^Nd;)K=9wvlHeAzvP3ZI#e)$+xV4pJU5RJYF2C_(c;j>otX zGReqB++UQy34|U**)yaB3^68C0;IN)aVTg>K+znp!koF8Dom;H$RNblTKP7JfXU0j zOY@RMk+bM*er^X|ZLR@<2vFBfT@8SvjVT;OBb7bXQM8XilX~?!y%v%#V)P`d5p2ys zZX$YUG#7J-Qj9e55T@c`5#Iu`?$F%Q|6MzIV^%_5S4NX#cx_( zF^@Wkcaj`71CKdEH@axhUJ48d(w&EGwfQ~xCYm!*7t|)Ti>#16yg)fm@!XtzF-xN^ z-GxamMarXUxj92PV{>Y)#ch%^6^mBvBK?q}*B!*}w`>s~`vid*o#Azbyo06epc^2@ zQ;Zc-_i&3w&(IiDNl*g-eOw%RqJjdE%0Ut$=Ob_TtfcDG01Tcz+AE4qqXHpF`7xZxebeCWh+|CL*|N~ zsYT~-Sl>VIHRLI-UXaG5WW~T*EIIf+DqTGYY8ncxvUYx*K z1r66EI`>b)Ppf!;b*A@Cda2mk2;%2L=O$Kv8dTFFPtL7TEK(0SL7LN4u@F8qyc*q# z-?u_jPp}G;jjv?HWShma1*t^wtp}N@6;cC3zi0H4dcx}$iK$+tfz*@tXHbzMfO#1& zXCB9tl@LRt7fB;Yqd&Q{WwX!?-S8oa!f`;-fOZFc!bSp<5wA z+aPMg8xLv@Q9zSJBAhKLinj6%1iSPwOZQmH&8TY)J`O5u+PBqc(JX3UBB70^!JH*2 znSNH^4uT)<`dOqajH&R%35d$DU67GYfX>IJag=OvupHx+e0E~0Afgb9E_o;)eOjBo{`!M9wt{LL?L3O42~2ue944PQ<(LxvunN(s+W9HQ7Q0noZUI8-)XX zdFL}ulS?%6d_)OD@jKe6dLSy`h+Hmm$bHAy`>t2{q$a0^l8=dvlE ze2678H7qG9CN6~yOCdA0wG7rQSg2lp<8%q%%ov;T!e*m4EVdW7(0;SH!(#)*;F2nP z%F4D9>P7y&sv$f%6Gtb4W)KR+E`g2@QZE+@)d$H60cV@kB*?GQIv%k2+3Lm33^FRIqNL(vWOs>Zz}i4#X_ETI zR_MR*?pcF*AX%ztfH0&mARutk3EdG*I;-Ks*dRt^!)j4V#R>7>BQzYG@D`0j3w*Hp zXNhd=rv^)!T~Rxab6_LI$Sis2aT@2t@yELf{wJpl_jmQ2bmL%{o;UG$qtV*mT_kae ziBhChHvgJRP9e}&I1@;^lE}tFj~tfATFPmS;;}U`JEVPLGDg&lGZm4bt$7U=W3}C5 z04gP>8h7?GT(^naX)fe*OVhqjmU6)7qjjZjM;uxwGazExRRL?m)z4__~{Fb{H7nk0ddE9D+zye744ufUSc$Xp_mQ5j4t<3`$F zu*F?MaT{8zg=R6g8t3nlO`9h2j|JZEr$($-j z6pQl8ZAG3%r2?f!RH_feT_xPnxX|j!cmCbIx3-9pb8W@3U$3*81My_#fH5W+uN}-U zYJQm@Qw4$RQ7U&E!k5M7ZzU?qP06N+SrKHNRE{mEHtjVJzl`Nl-v}p^RoI&Nr(b-U z93j=PMV>A5qf(Vf_B9++a5!Sn4OZ1Fk2a=3Fb+P}td2L2zR7AoHebNW+ zku9dQ->z*tSFktmbXZG7py5PI*l>aM`t&;W){Ikie0kJpW8>eyfAINR&#rI3SUnUM z+b8umjl43xE_?Wg!Geb2zb|-oQAgb6t=As)7QAx3{St_0;!CoV-@55M&~Z2rJ@f30 zU}tvAwa!_v0MnkV4NsQU&5Z3kc=a5;@gKE~E50r@^bcMQe=zO+RgaGH-hY@{0>caF zD?bLQhaV+helF$0yiU*6h`1l(zFV3*FR%H{fcyNN(W@qJN5gZU-TE@3W$Vd^8*irF znLT_Z=fF3?d5wwGbJw4-U!V8QfzHv*Pn3Q1Y+BA4tpBr{??g344xPPo^`PNE+pxF$ zz#rFtHr)AR_}RZ7c;oFYxnG@Ief7DI>pr}7VEOup8&Q+$w*7&hVs3nHON<>}yC?V9 zzGlBEG3LhT^SRkW|9FsDA3L-pBeDFM1=G2-H3Kt(Yb&D{eB2aRTKmBTemIXhn?6+J zYU%$V?DnHnZu$lO$Emjq-pYl^y^pC;c-grd)Fg3b2_?8@fYII`Dowu)D{`|q$6N_)| zjXQhf&dg&idBY2iT&Xzq$OU0kIP&Z5ss(jV2LAcMS3Mo<)BU6W+S}nuzW(s)$8Q!a zzSA0X8Yb*Jz+9guv>d+q@JQd0<@|$8W?)KK-M7Iw;lVYzM8I9z*BxY^x|4GA)a1v0 zeC3$=)*15D(3gR-^06n{uIyX?+J)?2`G2O|{Lt8OWyE?c`iXD0^_$CMuClY&w~lTq zDtL70r8D5du8xR~7#i6RnK5zi{P6abuLC>V5{o~M9liBr-RSM*??gX&vSncVwWZ9Q zyeqqIH5Hc~xz?@Dc{y?SUO9N_)!d6Cdnc~6U!^(7jx?^p{dap93+^h6?zS*&TVg_M zCOtJB3x|N4CADkqr?9b!AX$3fKRE0!I7&{8Qk(9*mmQGVhFM z%+B?J3Ha`?EeE2{!c=@IzlED-5MtJH-$Q{zR1(YNC+=1; z6&?o5Oy*|U=O@H^OTsG!Z+MS6C=ygy4O8 za&8pKq!x?9R5IDkD(OXD#;6sQnXMTOF*ru_&`y{hJ*_zu7mKC3V%+g3h<2{>9GAKz zO5Dx8PE~2E1~7URoyue=(4_c^1NBog*QJyu&eY{jB!OIv@HBHIhmc&gxShcxVWDv; zQkd%HKuFw>`U^QXMxT-b8j?+hdTPFo&T(#nOm<2=!4k=V81*70>)xYuD@z;MOie9T z?$tucR)R-QpKXHJd076{mQH02iVYAzLPQ;XFD6flRd9j2|7CeqmPSc1^NO59n_A_H zJxYn(8!J}sbhDdXbQLpy`kZDuVnF0eL9Fi-zmm;uxS@yfwNc-!<=aUnD~?h368DGo zDrPKS)=PdovynuiXk&zg<|!7<@hXliRvEE!8CO|E)oA8snc?FNYo>%GI%!s|g2C$a zsFB9JeEdBd=}BRh1%6tYB~4-L$ps{L>9w#N(oado($;z`Rhr*}+s1|c9zms0-{uL0 z-56Q9m%eWUQ@fw`*fIz__Y$Blc_Vdj#GPVDEe)&O*$t5@8+bSPz>}-x6NkrbBB&DF z`608SJbnmvfr*&k+G2Q~Zf|H^%)X}JeMRG5Cm9Z9DKoK?#dmT@1&spZtI}kQ2%_$} zu=uHtrVu)*)P<^Do~de_pX=f%WHVhTiw!t$(MS#jlsrJZ7j5Y`=*)K3iRtPMtQZE0 zDR!JZ0q}|Bt0)H@`CI{NrPHw}Qc}o5y9te{_A1g8teO95icm@+Nixwmu}C7MIV3G^ zV!&%qIrPq^2!EWwCwfc&hpqx|A(o!k87%K{QtK# zyRfV8_rW=wjl&!_=WsU8V2I3xXezwV&fow;+(bpY(IFb9wm>rM4$k2W4+tW28g^9# zl2KWvSz38rI7GwJ5F({3i!dv?rNOur<@=`3@AG*4{$P(s#Twz-Ij{HY^?JS>NKu^F zL9_1|s8Gg*L63`k6J3fUx*NO#!D|b!yijMSn1PnmJj2s=N?kz47QsSIJQv9#muv>0-#DjgZR{*MfY zS{4j=MM1exr9knTdy)5WMK+1SJ=N}tc3P#}&MXXL^X;PWA~!EQi^l1=O`Iz&27d-x5AC(djN>a z?yqZRp zSO($|A*aSeu=Su^u~eR!C_y~TR_GkUu_hXZZp_fs41#tDz_Up-7$@N;RV_R_SKk+H zrf)2JG~Q!nX&y;V&R~2fYvb_}_5DrT^HE@}Hv%%+19vZ5wFOtbieQm}{#r8ZGEJa( zD&;W9!cq8{CP%Y~1aK;hS*$_Rd_=a5i@=jtaunBcj;M17#hO6PDF9uV=pt~+m<*z` znuYm*)M7#lrKO;ZC}1D#oQK6o!L(OQJ5gQ8ywu4_oFtY*me4(WtF!}>MAAYZ`o4rW zOVL7*p%Z>Oy-05?WcEp!MGehVW&86E?PflkHC@Fhhtyn~ks!#EiItr?j#)}o(~5{R zHlh$E;s8Qd*RulPDuZZJ2{Ec(U~-f%+(FFOeQo!4S^Gb;NaNVaV!}a4-!X zLgA1*geu;Y&jTtE@b#g!5>ml0MoFzy0Z!mfh^HMOhU^0NOzj6IyLiB5gXAZj;B`)N-Uk$HktT2NIofksve(4wmDJKDAZA`?4 z8Yj$_>5&3nBAY}e%FG@A??3S@QdWV%wCigEs~6!$1z(;kf?x$$&ZS@Ia#&>-2rko5kg;a*#wk!RKg+ zO&`Y0^F3V*m{^U!Av~Pd`A2nKft``WcugTNJer%#s&4^ecWz;o+mN_k6s+~0V}3Kz z3DbI2Cm#8VYjDbFHdMm)<<*8QEJ0479%??z*9>PCYR|4QQ~SB)9dB2re90C)m28dN zgG0xyD{avFYtv`gK2n`8Rq?y9c96~+MDhH?Z)>xXToL>L?eA6@{lk?xxr1maPBsf< zZ0pTEU@sM(Ox20a6jJTMzu<_FQjr*us=}p&kfmrWKSiTj=~+A|L_~JOb2IwmXx&cpX)1!gaI@kmdcau`dlPL38t@^e*m;UEsq6BC(ko*N9W~N<+~2tr@r5Dk zH|<+ZVn5q$@w3Q!{Wf=l4*yjEarXV@JpXB8{d=p z{E`H6^2@GB?(XrO{imKi@GCQ_+L|LyRm^*}Ag6lfv4t~ZMTb9nY1(4=EheV3EAtNd z-5*IV!hh0}a{3OkJ0)@a(5|8FCG^DV&5_vM{`B#woGafTC5y)Q#=Y7Z;dDJcd^jWL zx5=Wfe`a#h{ii-maL=$0C+PgQ%rj-9J8Wglu#WHF?Vn!Z`uxnMv3yYX?oYL69b;;$ zE_~UVrQ@c>IX8E%`sIT$G$diuNP1Y#%=O1dcP7Vu;z}QQcJep>e?E5cBj4Q~YR_%> zXjVP_Hm+HJeBtfW32m?V*R4-MCO=xfVaLd%Eob5AL;GCLXFq%)X?(+_$P-il+BLL$ z`C~Vxvz?74GvlFUzESMW$UjHFTlJvo(Zi8{jyEQTx^mtRtn<3^C%tCZ!tvdIY&d=Q zlg<6R?>ueIxi+>PKJU)Y>YVnGlC!QW{+Au={b*mp7vndI%kuxv(~qs#oKXA}yW28c zY)LrzQ|`pJqu&_%FHU&$^Sv8tCOT>(AGvjNrp5WWZbNRM^`|n^f1aD@Ft`oW@)hTfVWn-fegbd3z~ZAlaJUnm>98%Ff!2DbiIHr8J@bp_k= zs%zq#BNLLnv3B@cW8|T!gqFIcV^{X&Y?@G?I*sS7pU6DW-_tu@8kzfWqh~@T4XwGm zPhIzJzyli~Z|CiK$2BVEc-GtzUaLF>$_#e)6X2sG2i_}lMp*$ zI=bWZqJK3mpM3BO*X`3Adh*70WJHdQ=e#kqZtUOo#$WEFeV*`&{}N~%ysPh=|IVF} zlpX$-Lpu)TEPSSE`jz3fo@Xz-usi@O-QrJUV~-r1$@Kr3-*st1-Is98U(M8g_RXQG z7e4sgA%fKp>@z16Jy$A@Cy(!d&5v{vj=9FbEn8#pz`I1~#nwe%w8m`HPQOKEe||bF z{Fjk$PV9;gK!wzvK<}hrwc9cb8{j{7g(4gNZh&Y?lRBXH(*C!d_z9N4|1{VO zB9E=vk-82p?d*J2ayUA9KSp zhAa7?5q2@Gh7HD|&37QB{~{DPux%}-{5+U8t@*T$fer62`0&G}yP*Sn3pXU6mWIV= z_re0lh>y-WwsTBe1T=|WpCD^y{UH$+yO{~i&0k=A?41u^BS4h^iK3}W_DSdONPrdz zy;_;|w^V{BW+2fRvKb;u)O;cuD#n8!@GvMSH)?nEA?jm0cXN#mkc4uzE2 zu-^cn%cR){{eV60@7=;GQD5LT#(pMxDxSd_geOtzpH{j7GZdpr4O)~R^kSMw+CZV3 zUBO4&4Qh|73f!CFGqG4LN}nSvtWr#BT6&=#w(q_c#BrbNW@1v~16SfY(JkdsATqR=B z1c~VwvA#948?1j5MxjMJS8K1N6fk#Xots{f3Tupd$o{4)lp5nnCZ#0o@1%+r0 z-_o#ofZLxRXJ+?XqE*t(mL>Y7ygBiT1?6k(g<{RkPCGdteNUTLvHr_Ubpv7LOGOEJ z#GJ*(Na0eX4clGN0@o7ni$E#crOw*KiiT)1ovCR+6UeU%dij!?B7w`NjlJL`SHy~m z`YhUsn3bBedB8z|0`n#{exlkgR+c1EeL9hgHwa_K-{l zwtlEhttjMc{!w8+q;scCF6WXL7#|d37^BNIeu+T2*QMoNw z*lMTUpRG8D)Y6EBEz#Cvq`t5{9J3-t`aHlycTSk zpjtG5+El1y;_Sp863s=474`g^SV4W16!ZoN30aH=`{>nZGWgzp4-;K$IY|u?6bDzr z$a(nT0`fhA?KqL?5ci=ggpDojr0oo}pgc&8C=v<|k}57qU)NPH)VJ#fjZm)+mler^B}hmMzJQkJ6F3%*qa7H+$j~Uh z5DC8D9mL0QfAQ!_VI?8k$Wjqx)TaVUTV@kuLCF59*GNw5Vd3a@ro776eD2CQjy#Or z7kma+gdlySoLGTSY2covycgtNZTFBUula>HAxY9=>OzyqXV%-)=w{vF z#4OD&q#-YKP>h3-Kp$uDg12}|Ft;49Z)tyzC`=T}e<)GS+0W*9Z(=jB@=OIXKdxfZ#Pa(FTLc z!eeNqf`$ZPodROw(35NbDTB49mubk^uyD|;b-;s9Vm8-_P_kKGSPT-y!x*$O7oIy{ z5XyycS}$5q6D_|gAo2wmjGYpMEboA|uo>Zx_$7^Ib)h!zb3=Zsu9xtm>U~Hgk(keX zSs+lGuSJm=_!~wk1t{NuSz0}*uPQ-D#---iOU(^IJaR;LX zgT&WVwE4g)XcPLv>WKF-znOd_x(?y<*@hvHN4?CE?J#x=qSTlF`|k7~+>oO3I|APD z>^TyL#S-*Qc!_vry`h&cYPhHBR%cJE7de9bOS6a%M=I*Iy0{aSKEZBfkiL3Yd?!_O zE}|s{h;FPD`0;<&8EH0MYds0>0i+jNOyp)%#wYjW44Y&4f%P*>m%bkB$}~}b zl6*p@zkphs57O6!SJqt!JV4pbEb8>cqY+e=>63cQ^`n1D@la8qq3HPQlNwW(<<7Fr zGovGqT<>yD=6~!eJl~hI<+f!>_%CI5{F`6tUp<`tWBQdY-}s{RM?M{&XfywW_`#;3 zFRw3|)~)V;=3CoH$E&VQ{(*JhE{kmGA07E>Lx0bNed{YNZ8rjo4b#Wg9m89}VySV>05Q6kT`Q=(d#p4@Uf|{x!S%r?FFI z+x$tsNVfas@&7KHvA^K@Haw6`bS2;2fpu*i4L^4Mx2{un{`F1&2mVi%*IgPbY)si1 z_&g#Z-@oWXSLtZm3kkdZ|5}n@zWvbFaB4^x9&GIY@vim-SJsF&!lk>TSs(rN;AF{9 z{c+jDF^{Eq18h>Gw|8OhNMN(B|En>IbzPid=f5!%@bZFS)H z-#0unPT4jTboWkwx@!-z0))rsl$=Pu``8=LUvT|2nbeZQEJ0jjADAWzC(4Sa>`s+` zYyO7(sh-EukG0(mNV{iR1KiigTc>P~9)D|i@W+HVr!vIm%Hi5ebp$YLXwy z5d$<=SK|L#%-JzfaJegEtg^GtIOv{^PtUou@L%z}hE81DG@NFSY#P;MMY8_Yn>Tdc zeYbH#*8A9JdROf9N9j49iAg>(4Ne?iiQjNB@cZjC9sZJCKaPI&-D3w|S$|wN(7h{W zYOrjkbmyHHj*gv5axET?P8&Mvf72dW))P4fjPtp=H6x8vF821bpAQX8M|{)v&ev}R z{#!Wo^W?{+8=mjkJ9!jM$QWrk*jO>ud$6%`Mn7D)=Vlso)av@i#`QT{KHk-T`K))8 zdnxWhUFV$-x7=R#b-%_@}Qe zok&X4PA}0dokkhBq;}D{HNfxuxn`ef^U3qYX%Nh{DeyzxniA(UE2dnWNP{h%@bg3Y zJ&DsAA^f+W!O}HPM4m~?cG0WYlw+%GDQE3utx%Z(+C`7RZ+#p}v&a8_PU%i)bDe}QG3|jbHVt2A>Y8&e zowIaS&aIk#p;=*OEb>j7@IRdRO1!H3satP|l<6_9GL<~sO%8Q9pO z$`^w{PzFxqA!sFzc9N9$@;(Tv<O;5X zzeeo$QZ%&(DOc=4baViN{mNo+25on+Y#mtxN=#J2z&;w@Qa9*ol$NlQlo2t3DhV}% z`5F|cmC;@}o<=-rBqCRVPq?&+Hnde|-`*|k~tFnZIV38sOwGzs5GczBq>i(1l zF$oI3T%m$4qH;l|OnA}#7D)tEdf`$X1s8I2t2uWq|4y^IZJKRPORHxt%ep0DBaczPScr`WL|Iy^I+*2q(N zJ|D!WQjzC?!q96YvCcfK|M?Zdf!uhNyQZFq(2Iv|k$^X;@%hwa@E&LnB{J4_Bnuc1 zOY9z6$3ZVSwjOgY#P^}0(H6o%??ImyWP05{+2{@{tUx;tR2G7x4@lXh!LPNj7mI~U zXopSW-^T-zm&}GYZ}XdPy??+%q@yU0?>DU=;=S-zYXJ$vbQH-jH3cCc4oJZeQ5Qia zaKIu6=PN4|IaN;6IU{@@@fx8s4NWyABNaN$%gsh2AF~uOWFcT!&g)5F>$xMK9j{)4 zCfvE7*$Q*AoiMqF)-BIN@+_EsM%XT_+rwpjq*p zus;dmqdK9%PAEMzTj>EtYa$&ikG^Lk!AZCQqm(Qm!?`Lg-QM>lKZvw1tO|sIDsLD^ z@5KmR3&B>2M8_t5mEgq=bif&}$C~i{s7-LtNj*?CI*UzEH^k;0s3qJ@Xgp3WDaa4g zt`g#qt?ie^Edi!lp8>qb;Es>x=a$>{~?aNg|p)11HY5wsJN1OSa+@_n{F6tO>PX$gXW1 zA&(*UbCHNSHY1l08Kyb*-((_hwb;5*(9IR)jn)XuY1%3bla@V1sG!O9@sWa56x}Ln zo5k%UdlLm_z0qePDw_$TSuk4KA?EPqXY8nniN~PPc!KF(^5FU4RtA*I-^1OO0p%z0Eis}Ywxob;M z<~+UtxM|QtQp^Gl$D{9k4Z&4sgeH4V7965EhdxSIA#>}X+Xpv=5~(>U^ZivwBp;wb7avmE&}pv&-N|1H@8iNIA{u^3 z#VkzcL(^6m^|ij_abHcZ?tQfPYw<_KDWq4qdSbg{PsH-WiF>;8-y~XZv=-Doo zNJ*jd)`cPoyL&^rw{)|`;1u6S64K3f$Ac&LAf_1PKnKCB{-EY-beI%8+k>{hKo;h` z$1pxV0V~P~pg8sh=1#OmKr;KL{3BTUNnOt+yMKP+TZ`c#6=NhL>duY`J+hCeUuEj!b;U_*ARyp6D2XqepYW-9`Zt*)dMV@cgM|h2A zSPv0*bOZGa(Q7vC4#i`l=WWXIi6>&Zg%1$qC-CJ*nSOOyooeLymmBMcHUDjUU}Vjr zr~0QyFJ>dZ*(2=bq4U>n zmh$Z-XdcN0(<}b!!>@ruJ_uNF)n`Q*Xb48XC`JIU0xPGk&&6Aom_ll zCNTA%6=h3`Ca2;5G+9%Wdgi;)Lrmk1$zADpwl?+zvgs8i{gX4s?}jQ~=)1edQ&&5x z`K<23#0#G^LK0+BFA^a2%PdEH&Q0COniVNfo&8R)(x)6l1HO5>u^%ecMVo6&clJ}I zWG`}dNzVc8f03mT;hRq<@7wvam{176ZSm$3-?PH7uhCMp`4#c$(QLt$-?wmD)3WUI zre(hkIs5#lUJg|3JU{I*J;p^&FRV#9OHBOm>T38eo>*0TX)>uYV>;r)&f^3>9Z{M6 z#KH?52_XTRofTVb3UX+>3prHy|LLq*2Mico#+_jBf0@Xx^wL$(HABIyVK%F^Q0Jw) zYEU&MuC1C9S5-}Y3JtHRi_ot66N)UDQ3aCAGVvvs^S|Hzw?1=Tnp$Ip@^97ue8D=F z2;+zUzvs-Nmo+(1nT;Ad;^0%xdJg^WLIR5&lqfUyi23=cYlQ7~VODmzm0~n;6M?1| z8ttI=lK<1XVzCMb{Kr}|9oHDga^ioo|(DCc+5OTEcNs)G(;%ru({3T}nSVTxvd78ako zmkxDSF&&=QyyOZ4PJC%1sO<3k2Pw6aF6T?COxV&M<4c%LK%B4;9GdnXfr(};l2;2@ zh$0*e{rg_q7GFdKf6PmWOjw#J77y+r6z3Je>;=2C3Q?x@@mP=J1lMVVZF=^Q&?0CP z^T@-fu32Z@stY6Y(DI@RaV>qYfXu>a+?|LlaC7?C8P>9yO6H@L#P^i>?XdgL*$qn7 z00i2g0yxJn5W{G!ge7uegpj@eK}_4pVGR%vE6e6LK70{_S5t9r293z2m*v_e(qp1P zq$0vPpAYX@r_Qn4NWNaU?GSn4MmBT zS3#(c{sPw(5NtdZ!K?Ef@n(LbCrb=|fLKALa;;!vhROqDU)3J_{B4+U||soQ-A>c_2bGx*I6f101suyEj7n7vnoN=(g7j z@j4U*`zUJFWHzd5rJe*QxIwO+Uo)p1f-Nxhq!zZ9N!sVB_KWuDJX7?0mkNPi!c`f8>Q!nozXQOT#xix4|)ErF*rIE+6 zucZZ}&*drHrD#<GpM{1OEEIZ)Ro_oQZKb$;5)JSg2HIyFC9Vju z~Vi4bgpnzip?%6JMlOt6X8%zOqa$WDyf;uRwPTW%Hp(LeBiRrke! z3JTbz?+X>d`Lwmq>7%RVY^oQr1|^x`e^W@eFsJf<(6FDJy>VfYgZCe5AZ!h!dTt!1 z>NA5rfaXznv;hsO2D4?Yj9W+=jxGS)qJf$$#HiI+Pi z8C3sH0p)}9tJsicAxi%6Nrr31k#h4?6zDa$dj*v}*9|8~ON3j1Jt&3p2^w%eu;vOf zpN_G|N*YqZs|x_;V#Pw9Lakv^QG3uzL)BqqA0F)B?IC>(5wr)?fPCjl4$~jPzX$B) zPQ02>Y-peBv?(EF0fBGj{YaFO!DuaYuZ_&*A(DV`a|$>|s8T=_2InC&C`Mu-DA`j( zqUD`J)u4cO&=M-d#Y)Vv21bmQ5+4b-EkSrFhYkv-crPO0kUr3k5aBS0SrA+(q{=yj zfu<&aY2;cI!&x`DpT+byY1RWOFsW^q0d2)284Ve(-8O)*c!fR*e@!OaAz10tF#+L;QjmzK{LYT(IE94}GP zOb|gqhz1jNVIGCTzNI;s?NO};G>h*CIs=TP!OumWsPu6{Mu%w3#R&8-g2A|8rI=B_ zWupk?)?Dc##BC~BuE6lsOLB?~B?@bRU&5;usrlUYF77t|c)Fo6Itf12oRet*x zxrD_qm<_86lF>Q5B3MzL?@cRxQx3?C!b-p$OvJ9TKDJ6wq~6P7X*)y$$gs4z9KR8v zI5xdeW=F1~d3*@LDpOgdEVZ7_Kv^PaRZzI)peV;e&>&I|N68h1wN75vDo`p~sgZ}e zDL6q|0Tlbe6?kP%#YB6%D7&%zC*3OID*dfJ5si0lYRIVUHTJNGFvvexc@bG;QT@*3 zg=_lMN|nWq9vl=sVtbBQoTkjig)itjkt}91IJ3@H$_`pf#OV{P`lYR*8MZNuR_78r ztbnr)+$qW}q~8#A;AvG*j{8@=r&;agD`2(Hv_7+c_@CA@xg%-lMl=S9k7A(=LSaXl zZlog-Zoa^YCkLr@KmjYnLs%&P6qTq$<11IqsoxK3MNJQnI%bR959D^^9ci6XPVGdI z6e$i8+=n=4oj}s+&~BuJs!7sWS234Yt*DH+FFKbwzTNyuI2RLg2a*Ji69EY{68`!a z;&A8@8f5D%x9mM)p(O%ISE~oo0z^7LKkHLpSV6_ZTEs4@>IvH5AywU^J>)<>o9?~1 z`?11&>)}gK)%KD;jYe+m5mph;&2cLi6^4f7kfqdwlm5$9rT5S4aV^o2 z>_7eh{h|Jn@Cf91;%Elpda)>Jq^aom;2)s00Os3L?u@>)p)Br$9bYc~(tgL9(RFC- zp=Vyv-pPDA>3Uk^;Sab$X)KG76jxGR5xBvVcWkk2BQOmF#cW_Qowv)C>5 zRD@~hm#=;bY^wMZd#54g%=Gza%hSmdZ`?>|eoot~_lx3&ufF~HtEb0zd1s#W8#-fu zN}H%t4Rwwm9okjQjJ&nv)lRq^vrFIg-^IH4{KgRfvZT-tBB`$;ySMIq>UQ>p#-h8o z@uQ9{38l~^X){fJSe5h2bi|HuqR|t$^3BYhsfMZJ4^A$6BA##bjw49pSHn7M}U)Or##g4?(H=Ri{4FG z>i?!MGVI2s(T)!qh0z~hOxZN0ZdooQ#QIH!x@C9g-F<#&WUSEn%GP5u&m0;myZzl8 zGhf{J;3@EImjBY_oJ%uoO@HW}dbO+Y>$E<0w|Dy6>oZ5jJ>UH>zGL&ZJI;=8Yi`SV ze|qHi8?L79?;MZ!|N3h})AYNgPm;YjT$1?%yg}4De}-Say5vP&3I971Gfy{hbCwV- zrTpASPME|&BOOa3_x%E&CFRUMKwkAuJO`rd z>|Kyrw+c!x_*!=(oO?^Vk|EMU+^{!!!#lGM*B?c`!9R<@;Ga-?!6&V1c;WKf-SDL} z?RAht*QWhX#B}0xR39d%El$TdELAlOYU05wVzf`(gq*;V(HuIFvpS@|$Ijtx6%2pP zZk;=5=igjvl&9R!iHuYnT9~gcgecr6!DpZ<5rZ;!qDGAuH?-q`b{9bH36>Jk`M?`Z)N>Ypd?S|fndDPNbO^biSwJRYQ#!+tpqi^(`~5^W$e zJn*zx-9TXy{D5vj_4mf`xQK1=n|?s9UL)GT+aQ)w$f zHiODMl&b)(w#PsW<=JS+!X9hbG8lIP++>s$%~&kfDP3}NC-J48f4R*eL6GDuMu}_? zkd;%IB2`)Lbj#phcM=Tj(IYaQoj+&f$}d6Umo*3oq89H!390;R_`dTJK-D488H8LN z1j1)R+GAHX(~s4cE8{>_0~1asWbq~#>w#!)*yf=(5|hLZ2a?3CAH7r6>kZaA$|#<-y^Cc1W~7tzIp z7pHiYBoC!!afEH|N(c}J6uMf7X-BLUT#?s7u|zrAuJ-Dcc0^o>^3S5daz4Ile`P(J z+KU1*Z-Bc1_#W7#q`(nD#oc5&59|zuc`Am;eT^%ZNBPtXAU8s^uybnBhsB_J%pgzH znSsC(E5mRQoF^g}DpjJe+!BsL*oNSg6_giCjKM=hE=DSP&q6LCyz5{)HM<%3^RD>IgxWg`Jb4 z5ix>cIsk@6E3LdTGe{%JvshFkU%j1WvZalP@W`woBo~EpT*=7P>vF|#M2gBU3>T%E zQUnf-;sj0rQ2AN2n|B~N^i4^wyTvKcidOzF_Hl}>Q5;i>BpcP*%*HYST2gsh(^|>z z1ru*XJq70w$XRH{)^%E9O+p+Qo*CldTWu}+suuk|#&}<5Gf1oF7|VlfRCs~mHGmkE zVS14g-4gsWWDJ`r!+^N(qL^`t5|R2$o08Zs0Rl21F%o-CQ1gX+g(tHn7q1B*aQX0p zL}UYz*A;r)PQeY9(inWV+OWzVR7v44o5icSPEKW#qC4w#N`&Th4)&N*GUf^$Gmp+; zQWZ3sW*3AN4Hh|Cevm+QEs0Ts>^*o|JzmMr36q1>xvZtB3JH-&uAWHk4N<^fC~+^& z1mBNlK;Jl71&^$P6Dx_0`UMP6Gu4Sz1e8_0N+}CxAy(fEAvP;$#wh1O6rP7*78-Em zWn9PKW2+}^O>`{=(!6dg`WBa*8#OnSZ$VcRM37PL-h|<*LsUpE_9WZH=dc`%w?`v| zPD7tB-Chl1L|KfulHFcNLZ&i<<{zo*$UMh2ac(ca5_R9i@6)4X6C-VeS;9e5D&PS} z*y`DRd~O`BDoEA_g$*EsXalp7v00#xQ`JQb#Z6RviKf%Pqg49INaOTm3eDUl3bVm*CRHqes+4OB`$s`enlDcNncrBB(`{>Fq zXsx4O+i9t-uQ)3eF%wOfwaK(Ku|;2s+!Q{<+Y9+{=J26P?T26r@M*wKg<>F@S_Ao@ zD+@vic#&b22{}j-g!ypu!#GeE>lC90@e>?+lU+U*&lDt(B?8)@J(pHtFWe^Wpqd_d z-{Gu}d0m^Bxu;!XDvxx$%IO^fpN{d79gYg!!I!ssu+?Al$^6PZm3fEIWPJ)_N+=I| zG^?FQ)K~JH+fP&g6B~oE-!@rGSS(kaedHlu4(Mh3L^B#L)JmHtR5tAC(Xx<0lB4a! z=&G<3WF#8Q^h}SYgr4dG&b0Yt%8AX?>63Lw#y2d=Vb^{2#Nf>2aDRHXweHo)KO>IU z_lAk5oA0Dt8QL_Qp1$MIW7}LXHulB0k2D?#JpWGFL;h`t zLJz<5dELvmA6KV*GO;v!XezJ|b8Rif0vA`z^o>S#)r}7SC-Tab{_X&$EBkFCEPcll z$G;eP!W-ALBQwExd&{ezJDFuEWn=!B7lso3At8|;j3QATxplOK9qO@4G| z+Z+C8LfYOa(Tqn@Ik{ucb9K{qHXNVvjq46K-W=Ok-S)~yzF!KSxmEV<-O$I%hIZ@6 zDl1*Pr|v#-{bbvJCmvb*$M!3_>z>BvMniAqY@K=oG5pw`HuvhW(jT%Q>4n;D-;*wNqP=-=?dOv*21n`Yi!-gR?oMRnclqt%+ao5L&i z?f8JY^K{z>0VcN0+xuYeCu8XeWq~n+b!Oq@^x2%kd^B?533_bZgLUHYj!#{dYpaJl z3;U-gT+jF4xV^4(=Ia^0uTJ~X;k&)dyE?~*u9q#G7(43Pdi&^spNEEA!(UIerocYZ9|6f_LQz0lWleV7X~x@qBrM{(ns(7 zcYW93_`Bcj`Kqg<_qj3simvUGX|E1ln2y-B?d7*$e)ML}=TBXJpm^C2ZHZ4O+-0(s zW&PXI7VxhvEBoe7TSa7A&lZz@K4=uK;p6M*y453_*&N4MMqyp=-I>V#p4;CV8v7@+ zk-D1akzXG9cILM0yRsMji}WtTRFc~D_+-kvt`F|cE4}i>>B_Ea*J`g#-`(lW*)ph+PY)AAG*D+|M~Hm%l6*0Yy0LW8EoAyZy>@zD#w&xT6T_Wfk5=#e9CJYl1QUK~k!QOR{|~Q*KomDt zy7LP@W>bXk_@pVr=07wz4hvv^i9t^FUxl$;aq_u)A%D4AyMs#)u)At(JTdS_`z+yInJ zXd8S|x9jLV2+q@fJysFM)9`zdTnUYmYi5ytXnHbI3EM+!`J?9WYP6B%%s0!65V-J@#fvl+NGNU4p5L`9H2xP-}5+2m*CwLJbnvbYQr;4RTa z6@_zQoRi%sg~;RJ0ksbZ#InSMeRGdski0~BSq4sHuvaN3PHIX>n!-4a;yY09RRROW z;1;cr8Msckdp#%htM&qfH8&g#vLc!ikJBm0!U{t;Mx_)HO_17y8G;OAPxF$@cp)EQ zLbyKkR#{AJdsUCpk7^oGHL(R0T%wkuzM>#VlH2SvZe5r@jU^lN4HXaw3Ev~OqjHd;FCB? z>0Oh_4g%T^&!^odvE^vItpc8ShhXhX#HZ`iTBvA5Fl*HG3H2Gg7gyhsa+jUQMLM@h zHNhN=Vr>NsYP;d&(y}+Vi|4}JBu6xeF>d6+(gJDoMaZ=iZ*UWIY$4M8=3~noeW1x z<*UVNs)>`KHb{Y5h*inqiEW3+4Fwch9#(K>02)vZy)0G1BH7xF0K0Inr4)tCErQ)o z_XaCE;LWG?zGzU2r4>nVlA;C_@GHp-1}+rFIIpUdYAK)a+T_uu5GzZNa%e7bycY5A z{FchIlAr)1BFXNT@p>lMB#>TI>mci2MZU{>W7R;!RQ6p$FyK+7cjP_j7=w#U7peIqtGcQ-}u|MhACok_oOW`e9 z%Xx^V+=su0+OT9!IHCkYug;levJp`|hC~J`Kr9Mu_ED+I45gLy)uL8Jjl_y=1tp-q)>+&!()r(>g zqKw0Mnd&@llk;bN>eM`xm#s8c$YmHWSmCc2C05cQPR=aisQ|@KS%7tJg-NjD9<69V z+R?ur{8+|P+72LtYo3sbC=0%ag-8OKn&_ho5Lqg?KNW_VRCv9VjY2fqO1M;y@WCvL z1{vh3Vjm+9h7&=G-%UBPa0^C+!1In-b|5e#Fwz&y&V?ikuvJpWJ)i-+s0#uZACAgW zx##%mxh#x077~z@K9@=jQsomO#%k(4ECG?16!n*5RF*}t3OFk4| z^9dx@gV4eXT?9PB--AW}GprDaU4m|F-UjrNSba+_a1KNbNJR!5qUUu~JF4c6GS;AXeXNW_1$9AFs`3FW*9YE18aQg7O@|Hw zC4W3wzTcuwBxTv)ocmHY6@-?H#Z11H4xSbWKKkMR$KJcgMQx^id-PYZ@ zg+Z#=+EP5#ZrerFZS8Jb_j#Ys@AKPz-p~7Q(@!Il$>Gj*-?=B(b$zez zSE?)$Zf()NSH&(5yWd0m$V$1@N-T8gpHy!emSWN!G}>) znlfuaGB<~Imj=UGI6UPN(j`zOK{}xGqh_Ow-wertB1Ec&ScxtX*lPqC zm{V;+AI21KL^gv|Xe5zMA};4b-YNl+c&-}5+C2i>gaGrKA0a(QvC3R>;khNFyV!gU; zc@(X)h6Gto+T5!o9*Df#ZZZrS6Fe9KMNHoAt zwZ1&Q*D$ZK!IsG%z{aV~)t=2gV)YuSLmCUFnJT85d!4|4BWFfrHN2^;#8~ka2bCdY zah3#C{1lI5wh?~qMDnOutPd(63N1P8te%MNOh%bBo5CXsuvI<*j4_uxlKDNT#Xb2aFpXyxlXh+28yoVp;XJ1sFh@Cd8FFo3M zVCWURq+{aHp(n50psqeTR5m*^=kw&J#L=R?B~xRNCR&!cczk2u?Z@D-`t{1u*(>Y%MxL8rd%jkzJ2v^E#aex<{_D`rp=X00tnRD7mGwa1 zw?p^8{Qini{i+S?Unof({Pp#Q-%NjT{oKqO<%>?PO3v&#KX5+ttKPCRW4W(%s9&n1 zy>ImWI2`rl>8}fhBhwOh&B|R&&mB!Ixmr0Y?#>&(aXSR^7CRd<=T86jH;H4{7vxiX2lJh+ElE1;OHp|P)G=+9}E@%H^2Ep@dEhxqlgCm*)m za?~AaFy~z!OI=$RGJ4Q8{q3a3wvaDbGrF#%oVm%k)>qzZg5*H)4OR+xTG9{4p`Cv-NTPq$B;chS}$~mF~OMcBoP57k|NVlSEB-X_&9eiOE`7%zhF;o!Yya~vcGQfw zS~A&5TFG2G@n+1Q2mC*fp4>d~*oIGvKPj@lHooEhPXFQc4>ujSp5=M(W$T7pyT5(@ za^LN#?ZG9fLk2_UQ;;>>dUmQVWzi>}pJ_UC=95t+xAXe=%2zs)C;oD-uH|~}i_y<@ zy!Oo-fBErO3xpU4_&jzWfBCmmuwklZ%jr>h4wtxJKYH9)5PEg36mTrHe9LVCDwS4F z&5Nz|zSaUoP~8QKNXRHHDk+Bj7I5G_g>HNbe`c+_{I@^|cm~o*%qs65FQ^pxzv~{f zzqfLz0kTOJD82L=Glm9tQ9e)V_%^A-am70|PwCy$GW2)JvS4CnMaRxE_WBC0D!b$C zIdXW}BX#6(&y#iHF!(QQ-i8sbIIn%AKy5n`eK`2hKa;E1ddn;*Z4(4Q|0&*;PQ;G@ge$vwGX?q+Vx`zb}nkH z;i1~r%<{AB2962h zsMep!f|qWsc@)(8tZn}pq^`xV>>9D4j^JM;Oa+wRX1&rtaw1kyCK+iCUZNUVl2CDj zpq2_j+K6A1)npG=-56-_zc(hAaC;i4INZ;ZYB&nnpNgb@Mw2Y^cc&CqC-)C6$a6E? zI^qIR&l_nrUSgdGC2hVyr)V;iMs9f{guzuYBTc5=XnR{4|9a17-XghKqSB-WmGYCH zXH;`g4h@Aa3mM~XjN=8~6P_UFhFxK`wZPhN>tRBw7R>jw5DFscCk(=s zy_|rwq~4W803KeKq@(h&I9wv6?o`bZ9`{oV47G$?P}umWR0<^(j*{N4wzmbomD$d)7Zg5>$dWRIb`M1cwn?ui7!PDr zu@Uji+UjhEKTd@%tS~1C;JQT{D}!m3fmeB@9c3Nx)+0$=Y%cs85nomM{1!5Dp5y?gd@W zdyym^zJy2EWG%f!L=?gN)`^Tw}*RlV*fh$Yp7OM_h%! zDF729nu?ug`(<=RA(6@v0;S@GEtm_V69_k3pJEW$oL!qR1+4}ii`6}L-0(D03@}1I zPNw|ksf7-m3sZP)jNAD!FqDiFv-V`>60RN!$P#dG@@8DT&##*lNQw>+XpkS0A+r@A zF{F~AYNF}|!Q{~53bKbvFtSTnT5@u{d5Dhyo_irKKADauy0R;@F$WRg>N5!(umT7a zLn3jEJ1bielY#pUZ%~)W2)r&7CEYCw%!j$aw2AHz{q00}vE&!-Icbqdv{{i-bw2HS zT_u`ZsarI#`X1V6W#97CAE1*2@oae6f`xQK7eFWdw9wZceiAk$sdqM1Ygh!4{`nOg zg}`U029Ev5UvS+12ett>NP?2BAf{oClL8cAI%icYE7_sUo?Hk+6fuDwAbf!!Y6t7G zN zE)v)%XlUC79>y5$<$TSAy`V)AT5)Rb8!Qq9JdipBbaWKSNx}Uz`)+=T3M&%!L*XNB zg3Z2<@C_b?n$Wz!{{$(VR0tR(**RZ>n7KuEU)g8oCDRWg7c^ee~1v(;vPaea5-7 z_>TDJlDJmuM0qF?1H=0eViHIO00#`>1h5#W3$Q+p@6Uj)vPL6=B@opKAY*N?#!2f) zo>^?(c~6uU(zXDmgwh%W0dhNVgONLbgZ2V=t&*-j7)7ev;o>Hp$&Mi+2C_s*Zi+k{ z>4g*ens;X?`C13^20wj(d%H6-|JhQLrfX^oY{S8PCK}hVKMl^G1}_}=kA=Qt4ER7I znfvbf=hlDx>xAPGm^NVb&(ngbV9A)hFG=^)x4w`6SbPKB_rGspeXaB@Ce7LVeCwY+ zDL#w%mj8VNch2|IHm9a*={qy-{QX~-^EKaReBXi4`2X77gqFMn8o58+weR1bE)7T0 zzEA)4Z2GK=?0?V#YmgmA*q^>ukY>#Hm!HovqOa99xKis+U-EGDwT16O|NG46MB(B| zA_+VBF3-}i(;cH2DUDMDmxBhHe5NM5hQr`yeUAn7(myPI=c2F&f>i&*2=M2f1*hMB zX+~(nXlm;7Z~@h7p740W;HeyDm`omqJ3Qu14P~hyXf^KfSk1l%fz9OMTMj|~#bFne zQBkadGj4cb$X^FD0TPE_08Lsau8q*bb9ZNx8m57#9z+xKdEaBz1@i#BTl}}(fF;p6 zKKh`~tZVpq0ZL{b3zgE@d;a^*4L%l0HTuLQ^#8p* zzx4GIyt?_WOZ)hn5x;VHLxB!}TlzN}q4#_}C5_|zmI43)dI)+E%$m=`paawVe>Q-{ zx5LB-#?yjXMM;F4Y=JxdpDbN{NALQd?1v!JC;x{#PR*bHKRY7~n*Z63KR5E<*y(3W z{u=}RJSP8*fqs6v|FwaBo`U|heUP80pnqeapQoUIW1yd>pnq+kpQoUIZJ(c~pnqc@ zKX8k|bPlN|YpNAPh;z zvThq|!gcu&=W|LDN=AjDQH3(Xx=_VLX-M4JLLtris8-sEvJgl!wd9aa?<)rpr9y1S zNT<|dGop|zVV#AtpRPis3Z!iqLPoVA`b%g zAWdLLC)^U;qyj3{?HHJXWg%Sz_vxqeh1QLdhJ=Q|nIKf@tkA-yS8@=Aln}BRyOUXx zTWLw6D?mXDV!lon+#qCqAfo9D%Y*IaLExR1QHb#KCQU|sibBGP;jEB&f*n9KR*@k4 z1W|uT|1{IIpU#c?PGoAqOd8NFV@=RJrxxL}k@WGTdqiNAyvDJ-j5v$bw=srRv_j>K z{G99t60_(e4q4fg+!gGyDB5%-&?_0VNVCG%1(x#ubg!~PCn~dcQb{Zn-$5UmidoCN z$DPD^Tq|C{h<1@h@)cR%X5>u*!L@Nhu$GV_u?wV@^D6^#2c@P!5%dcCpi^o$N+`LfJNGdt9Y&ABxT)n>0Q1sxf8V`&45VMA-(~radN62Qh&bxBuGa< zPtssjJMD#sxC(_MY_py=hT$-h*k;^?l5{mk z_S#)CPWG}c7xZK^WujYfGK!L0a9;+5rpabrBu#tqlD|WOJV|HJxhYIXM`?_>in3iS zy91=ml30$V?lOhZ7z>yp(gW$QQ%PkK`&}n|{6cT4QxhNQt zN$r%=Lni4iNH98_8iiD71-^vw0%=U#M72WyLGQ!pacW!|1;)73p@TOl|>$01GL7fB>+_|{#t|Tq#RHW{wy_@i2Ls~yQLv%|;h3pRcMeTZ^U*Ty? zPC-8|$dBjE4Xn704J>P?H8Q1-{qS&L5ufrHc`Y|$_X&m!w{fg^A)NF=j*V66&nQCdy-F!7F zr=8~| z_71HPcsgJWlX{7_%jffXCQtcKghxatp=wQ>7PO-MG*mFAV)s(;;F5)`AEjw#Oj^Tz zNDB-W6-E<_G?PwQcOIS%?f!(ACd-Bb= zV3L8pl~WN4>iZ;^A6g?NfkBeGnP{N(uzvHaKnAViq>6Y_GGt2;^(s??f{J>Zg0W9K%Uc;!O_}SjuETuGy}lgno_7273sJr zwVKc_AzMF_&r>uii?3q)86r+#Efi`c%871uJJ-zjm{?KU>$h0}IcnWCg?^hiYALhM z|3=45NJMKxIK)rFQ6SDqWzHx%LT%X!VcV- ztDJWdy;b`Al7LbO=%Bpa5yiAq^+^0PJ%X6u>Spgvi4nNfD&_T$r}2ETimzdGyuYfr zis|6)N<|93uUJx5E=eMa)S4ntCm;^dxqJliH%irAd-y$*TBHOs%3XjV2I!3m-60^5 zgomF<8KLxAB!~w5kcx}V637oBezaPU;ZsbMT1Y3u6f1t`hUOlBo2rm$38*LdS!#Oo zJ|rcc&1arhT7nd)=S9P1oYy4TRcl+RHoVUEe_-SGIS<_y~mI4`Td9ojl0qBEw>Xs1s zl*ydM!m}SH7OJ$&K=CEB12>>5rCxKiF?!$(8^(qpQ?BmvH)saJp`Xl z2p0rYNGk;HZ8uc0JBI&|@fn3ypco8wn%=MV)6E1X9s+oalCvZ+O8}Co3w(it^!o_g zQSiduOK28|cNb$kV6NCWJWON2NHkEU8qaB zw3RKOGnIIr6#PFVy4rpNf+weV8TiLfMT}2<96V(-RXSd%s!W83t5{3dih%}g z^`W%k?d(iyJHth1NRgua5E)u}Uaw32rD3NU^>yHGb45K#*tZu1?%We9e6h2px+Vor9Bgbh>aDhO zBMGYYt@byX+zs3|zVFpj2ToN_trYrF#!h~pJXLx8>J#H76%TSH>^T3otM5*2JQ^A? zc7Ac@+JZOUxS5yNSw8x}=b2SEpPx0e=TBUE#KV7>c{Vil)(zMF8z0OUyqo!%xh~ ze0u)3F{KOiO|C7=CsWt^pZ>0N?HKo|m3`uBG5vtLeNTs>sP#48dg#oT=V}kKqrKf7 z!k;&cMORLjp1Z%C`*PM)`o_dHQ|VuH`rr7LjC8CgL&7>kN8iNqToXB8ZtXu8SW1oe zoGuv};J+z7uy0bpnk=v2b;Xlw@T(b@S6?svV~o6Yu=Dd=7}Q_D+XKc78im~o}XT^2A{PROqjJ4t1r(;}n(0!R;A06WY=fts8F^ezTw`^P{PU*v!hF%U4(5UUM+BW2pC;j_6L|N=(a!%;@RD z%S(^H)A`&xTdtGo&$k5-otMu%_r%4?Z;oD-|Hj(rh~a1ujoP*Dhc&NN)*U;QG1e1% zHEr~=b?emdM%R<`11z0~M;%8ykG%WM=#9M4BPXqji9pQRhhfa zeezB5jjKT=kB(%=4^)me^f&E2aB4ynGgGH?-Iz(GpcdhVa!-(d2+f&#fWDeA-v~PA{g`2@e#?hf%m97ve>!={yJ994 zdi!NM^qexeWmUV?(VumDUc)NyzWU$~7Mv(JI_%kUT(O$afqQ&Q zuxh<@fP8jdL(gl}m8+CD;pka@)CMTzQ9W1JJ&He4TU1j2t~%zEiSSi<4u4|%sW$YO zb>rrO?>G7+(LpNWqu8Dfy-y9je#!z;5wGko!9H-0D8K#KR~qVugYtF{_sk3U@yC#W zJ1jiAt;fc$fg_iGY#*=;eQ3{wRWR_F_CP6W z&qN_8qWh>%d+NG>Qj8cp@qyvU{lCP5ITc^SQvwAjmKaW=l!6_~o*|%uLz(B!Fd*;8 z7ljE#Dfc~=(+iAQT#XM717CL0K9CF?1fa(778(IoL{{Q?RpSHC#6Gj9*DHsoqBC=e zS|O~SQs8Y4c-tcqfNv%xS4z5PzbdHx-UywO76n50JTLK>pwgmpK~nljI!lrBQ>#cn zO9blDQlv_WEoS$b`0>n%BoDU)4kTZ1~q z`%<$Bm-aJGXS&-Y#fy$XT&H#sGZh~E95?&9poWgZiuILM(Lv51EiitXXstsmSgC*7k2Yxhb#i8_Db zP113JpyI&1KoGjuHBxdm3AKbcfLW7RbO$aFDo7(9FczoaT|k`PWvpZ<;Xb`w>=NP% zx07b2-W^&$@1VuY1z(i3R;kDKGOxs{?}wY~>Frz$TW3rl{ES8THcz?`BxMpkvS_(N zZ5}KvSaV1cERDE)P0h-O5=gSy7$C&7F69o(n`IAH^dnBHDUEmpLk$^sNwhI1IHg5S zpL?8TYYr&!a@upP+j9oSW*{vDyqZBYpfL#o6;+i8^Sq0jBW9^dI)%Bwql=?(rYkC+ zU&2Evv1sTm=n}a3@kAvW8mrSYlrEO>yDLIl1uksCSAp=Z48mnflE@qo=rob(fRRsFVW7oysK3(U;;YGcts?2ux1A6xy2Ki zBmd!)l682CiPSkY{!x-fx*+S^-3r8z4D4MQ3Wu_r;v181ptML5B%TlP6&Ba) zWDBN2stXyrvtCAOPcPMb(r|#)^LpAp0mCWIN@~L|5|pCNu|@WTOK4a;o>D|P%Q+N@ z(i+`GQBis%S2tW`9 z=LLv*teoKkPogH9!XuRh3d>jC?aT&xqc{esMr-23o#3Gp0@4MK9!}4H0Edw~LyV(+ z3NA6Y5X0rO*KmhPORV?L$mZ>7ny{g498sZMGow{7DQ%$TxJbxnyO`>142d_Qabe9e z>!`0+k%$7Ei_g%}G9|XB4womG(3V=w<|?Lxc#mR0 z&D~1yJ@nfgs=sfc*{NatdYB3pV{HVMq|^Tb$h zsWb4}?9Yzg-Dc242((6}sw8k?LAt^pP3_?wSK2hnv2G|EmRFMAhR=ANy2IEb>|g`~js|ano&CizKr& zh${^)qd=pe8c4?#rLs`#q_!ZXT zUnv(<_&=p@lnozxL`x5|DviMai62WXqW!a#z)ip#t|}b7z)-A#Bw^{q>+P-V5x! zI02Xu+k)u4?)bn&=|J$1=j8!? zY2>Ya&n51eWZSmy$_$zwukVPSXndpZ{pqcb=|@?1yW!jF?RccQ+zphWc`pBuaGwq{GQ?Fj`Zy#0DI;y81wLH3>nf*mg89yl+`W`tFGFD`6 zN*Ufz)ED*Ry6MQrrhhlNsyp=Xl%sfh!Q@j5w|;T`dHVKl!|1Mnt#c=WKJUDB{o{^- zvlF4*L!LTeigcgPaggsb+^-jbGyU(fqsS7!0eQ~e$4gy+S& zzu)}ibV#=6?y+rRrFx_|KOuF>?+yoAxzv^ST}o?evx z{QkQA6NN`g(jJbO-{5$YdvCNUc}NiZJ|@wv##&r?WkMR)04?xHXXR7KhgRA z&Bw1cjbDFm+t!j1&n|1~P(%N~>FF2zpP%kLb7R%oJbZLf#>UwLJEtF?b#>{fJzir7 z*+C7Fc;?N?mbdZ_jyz9V9lym#=ae?xe{s)<^gfZB>b3%fbx$6$Uw`lMVC8sxZe?5?F&NT)ct1jQN z8)#rwJ`;W2-}@d0F2o@A#LSWUEk`f2plL8Kb-3Rs<^32~`p6M>{K=WY<#W#LoC--; z^u<0b=EO92-t&ZeO#1C7%yvAT3_Y^c61soTJT&ym?>BSq@uj<~%WcY36q64A#`q<# zcj;Hajp_3uj9IY4H-9%~;5yhbWoaEdT;W@Nf`_&Z_ZR~%gGbQwV@PPvc&R(_!|}qC zpy?e2&cL13D?eVvrnVRM*{{3llDWTk5BK4D?%`wjLnp036JxpK63|NG^>JFUW{pKD ziSeUR;C<|RYpecDEJz!C(poa_EIWJ^t~J?!2V8y&{0Qs1A#S&oFJJmM{;&sh?V^|0 z@rQBHwhJ2V=LnYuV}Uf&U#F0p3V|N|aDU;V^Bs}9sdGWaHE|T<7JM55L1()&p zT9Kn%&*`ht9S(O2@SvH{eC4T2Zr(--v7CvyNTEo+kD26}oRHK5^_#D20(jAzhO22> zwHBw7hyS2|Te^oLEs~(t!%H=CNY344?BV!Lf*rSTm~JL->gEl-6qG1593*<^ZNL=9 zvCahA2DyucIIXe^DS=h|jW$e(unW#3EXw6em3;qeiEG%5(xvtl!Adzy&9m8+_uU}y=oKWs?E(3XWT7^6>-~IItG4488#cW7qA?t(BxWh#>`!z87)=K z3*$12Gr&12iQA<0P=scYysYC8XJ?fQpdPV{RB%@3FV7_k@d#>j+eM0RusT_nQ5X?&@H3I@^~5!9 zXSPvsqJWdpLhRxNYT#kM+oI>GLGA^<2wW>>UD^t~pPpn0Hf9beSu(0Op`s`yrGS(o zd+?AP*?b6ZVev0l#?=SUW*J^o<`dtuTDHKgS!^^5x;45zRJnLE+m@T665XI&=%84N z)IxmO)Z=Y&oL6O?j9I7|cq?8B@8(fl0qds=1MYFE7vhj-25sH#h$KKB%IV3*B!mys z;M5Kbu2y^#d&VvGk~Rb6B7xgPOeg6Y`9*<*m@*_VbS&s3u@QtS3`a$7;S#tg zZ5t;kg^tZ4vy+ynAfl0$^!QrZkww`R2UjyhiTL-f9+opSuz1vSDvjnhm@OE$^STr;!5ONF^Op2AM0>PtzAMb*#NI-!V3N}`3K(+=_s)@Wy| z?{@R@DLjFOaBMT>J}B4(CZY`2yhq`Y7ziU*m)c&%X*Nw8uGRB1@~KTs3c7>#Q@F#1 zZrS2xOe!Q_K`@b};}wY%lSbE{H2p$pz%4U~!1HW8P8xMmHHZ<2euob#6v_M!p7X^~ z)S7;EoX6B1GSFlNNx%h~A(wG?w;~e4uy4y~NCYliXva$F9AGbI@C>xHCZ69$C7&96 z;JEwl7Rt@k2gQo{)K1hwX`;Ax%#W2@C7J{O&J@oDQ`tN(&k;1Ol7TD6B|3^+E)G7Q?h8%Lmu*FLlgP!liDKa(S{PfzGE^ z6xCO2gJ;BYWbI&*M~R}#igitj_(sIa($q#~Ss~==8Ju`q8{ea zD5_ELyXZ&^X~q-;*+)6oP*6j;nB63RC#Vz6y_AT7o}Zrf(x5BxCZ*>XZB~Xy5L9pm z+y-lS?M?P zg=!MLvV{hZ5a9&k1x-F4@5g8J0DfR)ot0PRKwS+462e-Hic{Ntp?HC@i=jmX^0jV_ zvyk#*QALuHv3RPBBm{tyh(KLL`JpTZEIHtQ2;g<#Nh^DtS|v#rMcQ*DoUOjR;uroH z17Hh8@{{>oY)L)fCp1Y4{8*mAeVCD8l*tzmKMv~6R1_ct;Iz0<$t81)CQK-nirs?= zv*UyJU~XACgdf627LbYb8kZrh+eR<2+3N84az$|z%Eoue{tCR|Biu1Wv7K0!EM*HG z1E$&2C?sFO3-~vSB3v9)xP|uuWg44WNIQDdGFsWNZXv4MlHZcfFP04#DRmVab)KF2 z{1)R)pW`S3?x*GkDbf?ikTK%RsnXsy;3#!nTwaP@RAg^f6%}f~OdZO3^~KoLlBJPK zrOOI5DY@bNnKh4)%W`^zO*jx;(Mgp@>1Yn0qulF_wn^OE1pPkVy82ypZ?@@C{hpe# zXwt|xlH2&tGNjA=o}D}5yYRH^7D)UY24+pecs6#wj1UI+-P(YQvL|fM@ETJAIDx-%?!2qq z$ZIhJOGmNQR&40h+P>kN@_`%Y^Ugl5jGg%)GkxT@lLOw7txW?nCq7@cYX8<_2a6|1 z9`3w3a)hXy#EskHjf2t_i(y!9uj`(iZ`&$gN*foau0HzY{I9M|4(FsF+eg>&lLv_p z3>{bZKT%S6pm%gv_u}%BOPBuefMfTKxiMQ^Bg^o*icvDK^XSNLLPNhfxBJFZb}Rca z9TMLZ@OaQobK=1DvrRcCJ}#^qot|1>ckKGJ-%k%r^u6?a#Y|AmzVT4`Yft8#y76oG zV+~s!LkUY0^G1U6ru(nIFmU6;zU;A?j}082e)@2qcOuyR1JMUg0A4~3&9gjG$kxdt zmfhCXSE7e(%Q}wVdZr;WZ9J-U#n=WW)>3zIU(nUC;gt5e@89`!RKVZttpfs>jNs&< zb;iuS?;39`BVS{het)j=@ujymDxHVNZ^bfJd`s!m;&3is;3(iN3pITgZ^6OU*Zy#QHreonT zOCLRH-<7#%z4+~wZTlYUu2Zke^XkNj-^8B&{B(KV&Eyr)SsfKad{EPxvws=Aw7=xg zX!Qq~6qapkiXU2@-g)XqXwJ74RXrz0i{}sQe7a`pmDtRuRt6-_96hRU`uq6q*18q9 zGXoy_E>oO%_uUd~DE`Lu*VmuhnYd_zEUsI&%s+4A$oo%s)D9VHJ_(5iZ|eX)L`GTp zQz?^CZ`J*6q`|YkHTD~8?ATwFs@A@=A7B7l`s86t!kfGI+-%r*wQfAOCer;%T1V~Q z-+eZ8#%o7|K}}#0*HT+>RXRmJ;T~1DoZi5KK7hXL#5y^2!(5-3KDe*#X&)WBWMsf{>WwTfP8qwi(RvyS*x}1d z>&$m#ui>bEHZy9dU(H-Ml*Rg7kVY#%v9ujlJ}>E~6<+Y&>E7s#|5`$e!Xd~PO@{cjKVtgRZv3vgstrZzYD) zPB45_J!whcC6G_WBf1H;nWXXPY`-fqx`b(?A*@y(7%9W~X^yT>h|oQkz|mC-lOKkJ z>v+p71zyWS7|OC!iBKh8K_gSe?KFZbX~Xy%mrhZIN?<8gcqmO1l+f#z=<|hAqi7UP z6Y*?{(4yqNexT=+SxcluQP&l5lR<8$djHxY1qPRAU%|C>jXr9=Ck~IS1p$Rhrc05p z;ZkH}LiQr6OYBk?(jT?3WJ;@a?6N%c{&1YKu!2hJ#geZuVbUR5LuDM23uK5Xi-MWf zF0o&b)Kb#MFkP&;AGJ#i;wqwz=mwobGFHahP1#<$H~%=xFOhT8nFn&W zJnsm;yhoEr)aSB>?b7#Bm~mL)KlU!jx)8rv=nWTB6YOR-fo-v5ks;)XdAaElwS!)W zrLptoN>+uY*St|ne@eOwV}Pr>ct6iCkTV+P3t5M=uVm3rknslEwM(rz$Gk68(U)0o zcFiUC=t*ixHwSqUJ~*7geXj|WWKu}f(BorL7n5v!ZnH7JJ&bAtI&VUQ12)A12&f1Y zf$Rc+K3FaZP$()crsxV{A3S<54LB+a@O-)cszjqsI#))LG-h~HW`NmF_>KaPbpgIf z#UbpB7_|-!1oO!TXAz~yCLB#c17DT>u25QDvc7TevYfUB0CMBnK^6WONmudAZlM_8 zmyH+3vL=t+s}S=w7OtJx&`$3#vnDLC;;xFrOoAGCK+N_KQk=dL`ySwHGH0M|{)@Od zYXYAW$s#P4#3O|`9*G*K7rawlL}w7il+#cg28kL9KWs!VFfN-&n>by3B(OVTE(xU& z%SA~Om4!XR^5aFA8ypA1*kc4Wfy2TnUQ+3PK1&L3YiSAMyD;yo=tkU&d`e55`d=io zt0llSQkoD3&|-SLTqj0j5Z}7JP6hU?~6c!y0GRmS&>?$j!$PGA)I6`BPo<8 z$V$3^6-@s^v;V^w;uD&*istrE@S zF|wk5201Rj79-NkN7*qdHw8oAaB*HfiU)Sz5sHo>*mMR#DDHI~Rc*r)UlK89D4CYt z<_ZNVM$s3f;Tcl0b`i@swJhDnr>HGJMcIu^ly+R;bM#CrGp}B% z!FFOn@s;&i3xHgf?V{4d{rBumh$!b~!0&;wHbs_2vH1Y48l`BdT`;p+fbPCH*HxpH z@l&R$i_84>5Yc)e9G%^W`!&*jwA8{yX=XwKZM*C~L%e|}-xZk4R8oS!j5XF98z^e- zA;!b`wa9@ku^Z<_gbho;*d(?9mt93-7n7u|~JJi1IV`8r4{`Epl+gOsO!2< z?D;dMICORO+E_8Q0LGw=Ai?!7Wlpg+G7^`Xaz0{SpX8~zC$jFxE>!n$53fxK%3jDO zmrC?d^4z6^@dqXDDXyoY_p5{Y?Gd|pPxWQ?_Zi-uzoFF-k9%9ohcRl<-sl{f_ls{0 zqXHog5nUU0#B=brj^iJmU4d4$=@0Pb^$cUT)$tl5BfZL}-p#hxvgrwnZK=gf#bv6H z4rPl)I;th?1B+1}1x141f^>R^82kpaC@PaGaQUNtUgE1#tbum!VWaj&roB^nS&(TM z<7!)=1?HQRHr0}qy?_o*PVv%p^}`H(QJhuu*|L%; zoszPZOnG@ldhy?LPBg5nuFs9lsY@AJB@ypOglv5|qa*AI@r&rO(3B8M-SvrAzT5Xs zXv)Ra!}l+LZCB{&q4;O7?j7Esz9%*DQ{U8N?jQdytn)PFMw;y3>>oFZ1E(LFXd0WC zuHN&VaP;}DjW^a~O*tbkY|UFR^oaDHzV6uAjiY(-Bkg?0M^l?mhO}0m{^KM7f0hle zKHF40Vm}xZ9P>`%;j!f{oz{_<7jGLviSZDoRxR0lV$bokx|WHYlhKc4h7YZ1&+Pjq zIeyvxk;jRSOV>k5|KBdY(t0CwWz+k&$iRWVk%NqtZe2Zac6dcX$0Il9&293OJ~px8 zu{S28=)TI~AFd~^zV5%XNgD4ZJN8ZgX`t!#o6DaXI5tER)_o_k@&+b9`hDV-AKsaa zruqzH$weE#>r5OD9{l=j;LJhhZC_Z|-6~q~K`gV#k#}gcJbr6i1DANH ztgJtB>b0*ru8e*6*6QJi@Wg^sgJlbcO7xjMQ}Z&8H+<Wk1gX;Z>sv2(EH%yCD@tUBiY=`{M=D|h=3_5!_`D&V$^3Lm{&v-G^G0ueoSJCyyk|SVocwruCi|3OR6hIQ zlX-u*Ie^``f8gAi{?SF;0CDQ;XD_@il8S{Kqvj1#UZu|bhwz0{ct)2w{il^-ukqU8_C1h7Dc|BQr!Ut}8JR^V4nS_k%bggszngLC z|IFgpjR8F`$@fDhhrWzY%?n>7?URE47;+x>0ATEMWjoG=wr}yBGh*2L%B;tM_&@Q( zMk$gvPR+ZVI^Sqq5VB~QXXc02&7*9xwcfWna4vYvu(Z!U*5>mzDwclYb8wQQ@+_N^ zZ;u1u3fTBl-99#ccSp*U@vlHjX#@{vNXvjYj{p{2F0d2bDIYx7!8|s_#(&$90LNBG@o^8;$iv@a_s#yxcYdX(oIKFY2yBgmo0~_{zj0 zc!~5F^BKSWffP+aeGerhN+@@-vY?dMf{j!C<)W-j;jXxXXKXaw8d*&}b$PXFsP5l;68Xr8v}>%^Fd6k30`G8!GEX0C3k)08yiGR}X37 z3luV((UI{U6G!1}cT{s)k_RW)VtS@@c zCP3a$jBl(o_IR)dD8QJ<=;g-_vNXOhI6B;l6;~BXHSerH#JpgXL3rww>_tq|_nL2X zNlVpWyk|96VM|YC8m%M79Id_tMiJsmWS)q2h;rq`}=hN)|Jqz6ImYfuoOc61-4ffXo|e z(&k6`k>Ky7X;QU7?l-M#|Z)7OtVNmbIX^_C}Me#QsA8bEZrw%|1Y0FtBh(By zN(&CM+1%Sykz%|opi*xdnl|Spi`v8Bkdvaz*jCBukONf*EeSf>O(`JeTq?!`bgE*I zK`Hq&xuDFnR8FOHD7u!26=j6nX2C0HZR7vq>-*!Hs`vl5x%#X=-OrbEIN)JU*f|{L zn>qP0$tIa{&JJ)G2r@~@Oc-KKvk0@YZspF|0nT86AR3xC7^0C;2w73Ln`}i5Q&FygZe!iZ+94fa-0JNS}HqS{3q7v#GF)a39 ze`9&;4!nkR-HQSsbQvA@SZWOpd4^mc!qX<+lqQF6t`t}&AuybzXe1dtSm_WHvy(}! zyc@2PY2eiiB1#JZgEqB;6EVCUG&dq&L8(_1DM3L^Ckezl;1-ldO)(Vbpg5_a6q3;( z(84T|Y2@b%dMFn1;L-Orq7IU1;_z#(t6MAFdPCCi5|yi732!49~KfD1S&lNn*gA~Z9?vH<0L+#pZ$1@`Z2S^;ov zF(L{W0dQk&vTA`aOadpVq{0aUnSiQmP&gVtEReKMSPI{5IHiX|E}}kK0)jvYJPH4; zRcI7VX88`PTn;M};HQMj7MDXg6iF;>Phb(&X~-5cFg9T;Zf5WVDT$*P|3DOMPzEKi zOD(56oh;Gxfq0#09+U8|B%4i4f=qOf>JnHffs*@NCh|!WT5^907_=sq%b@o#NmWia z0WD|(8GJvZxWwE)UwEg0ahRavY<_f*T*q)tfHko)Hrhz=F%<8BQZ^6Z>l<;ryopfT z5t0-x%|}|IU6RVF8p-(^bhfE?aUq_WSjzfH1XGwvWjd%!S}$o>r$@pPaRq@cj;`GW zf-y=!k|A;w)jXpzc;c&!OcnVRIm=MMB#8<_jGP5WQnA7qdhlnSh4_tyh3!6^PU_G! zqh@6s05G+44ICuFayiO?h%f~ePbEufpm4v7xcgDk%R|B`OwmO;7{m$C9G+ew3dyQe z5_iy#(zAKoKM{9YDdt=v-&_v%x7qS%5PR0i|HE8Ko^3l(GzEl3dmW zc3^_6iA++-$RuT$l8~w6xs8}oCQGr4@MOwo;ZHx&lFerwx?hb#znV;@^-)ri2!#O4 zfq_=h5WN6gR-){p5CG#>X-bPLttl$_{GqmvfUZ@UzK%`(^iXV}O7H63{s6iL0$Pj$)`H_0bh(_1p z#Obidgigw{Go}SLg)OaD5AxrI3Ie%}ZNbAmRe}Q>=Hl_E`*u*UN3H|EZw~7kHV>`b zYNCqKLbef0kEG3l&%WIFoY*gJI8>euaA4@BBF{7Oa4d#utoehWk16>cgnZr|co3Wj zlUL#DF%K8(B_mORp2d~;<149*UanTsZ3V;LK|c|XhT|YBXW7 z?p$>BL)vBfbYVY;HrZ#aZ z!`|bc;%>ZMJ>ndX`6eRMSay`3WY0HLjkz^#<3r76t$|H#Pi}vuv*Q!vAMw`*Ek`3iK?iT& zS!b(e;Tbl3D`v~c{AJ;vKUpMReXqTIVAIVP!JSW&7ZyHadABh6Q?8J|SU0hG_~Hv! z{}?^(E+TFwd=&fp_+@{Q=a!*+WN3QL=AP1tjPA4U>Y>{WVMUc6zxn- zIvWCKzj)?y?31tj++7<>{#<{9JRRHo@|Pc_O|N?+wPi}YItvN1peXqiSJt4nywp;HVkYlpDwK}TK|V_~u7~gceq+x! zFVdQ61JN^Z-Ls&ma`d;h_j(%+O!~fy{pdVC@g@G#+Uoh`qqWBQ&N=!B_XNIbBlmfPV(IDML{dj6t&5X@i@y*c1jH$mlDFywER`8&zG`mkmQ zLxz7I7+q4q#=f)_Ojxta7^v4W6d_Y?W7gtHxJiVYyw=g<`YbSdJo9r1LVksGNh>s& ztlS4Tb0*v1#tS#WqknjckXu#c%>Br$8I9P#@7Gd%d<3G2tCt}Vi9Hrr`ChDVdd~6x z!7i||`Nq2JQ)BP1bd8n5uV2&=bz@WN*<#TML?A=q5#o&(A;&UWc&06S(%^3+CV{^# zdiRx)rzb9VHxi8moNvR08~GO`S?XYhv;;v2G`c$#Brp##jKrw!-eQu;y6G>sSl@;X}Z7IBoVhjo2x?6Fnk@sApF{2RFghUI^OSM$w0;mTo zZ7NwJn?eQfMDK-f;n-YZCJH09GEZQ%U z{?X(cyy+_*w0pfkTuoJ{*7Nv=f^<#4Si>!>*h0HfhFew>Uy$8+H1&yoF;`uZzEG&o zh60x;1a+G0)JbA|Q;I|{P&oU{c0OMqoWNydx^OnbJV^LNgi>2EhvI-(3q(JMgJ^GI zxD-S-5k8_xieb&D30N$zh)whyth9qBR1vqAWn|3Cd%HauiMBOGIHQaS^n9Ky_exp# zLAnAsd()TzN2IGAL4^UVYRgIcT*8#eQ6RS3c>#I!5 zLD<9GZ0Rs<&8cQ=oz7iH4*Da*rHyAn3^K1Y(=Jx7f6G!~Z#=R9t>Wg>70xZodgxhH z7sKH63d!&vxY&o?4htU#dXew4gAhl8qS1DkN&{9IUGA@JA*{YN(jp zJ67=&ynzc?87Fkgr3;^7aq z9j~Hwa2c&i0qq{8MZwq|2`v(?l`OGVv$v;d3zc8+;*1JUH$SIjlBa9)wa zh4g|`L3nrsel+TmiMWe^?_C_L(s6zmOFb|2wj3yqA=20%$ zqsxa88T{5TK|w=k-2D z?PV^R1QAM`z9SWG25%=Auf!3?Xslj}#>WB?*m96B;z+1nuw)a>2DvS%mRiCdXEAaP z=0Vm8;$nFSc#wFp9wE~aJx?`@a7v=L;*JACiYmH~=b3Jah)x9hZkr^5FKG)r&kVNa zF6K*I&<^!3PK6&DsEk83eOL`!qKxEgiJ$^V7{YjWP(fo!H0w#0DgXjCUxeu49|2vG z;l3D-Ugt6A;HYyc$CMsNg;K%lfk6WbG0MX?QfgHrQO!=AUK2!M_n;0dZIvYnN1#a$ zuOJSHpLfegKyi^61<5aYuP~i-TruaBo247IZxn>M^&5yP(#fa|UDNJ7rWKAc=b%yy<@A={vB z=S*=tWTq)YypA(00!vYlq0mg2iO6O)_SeURhY{56NzM`uV9B$z1$xaWis<1pNC9kP zr0WQ=!5=&z4vBnKJ(14S(IztOG1Q_dh~atO)y@xqUx6|o;Fkx=O%G;-!VoAFIzRVA z@^u3xCxR7_YKhpvOmtbWj#!HyqiHWcA5(uqt`{P=Ap4lh6J$SO7B&g9J)9wV zkm$p`=&x2#S@0!OA|RlX__d{%e=)v=gzD}U0#`vB*I@N-&$}tJC2DqQ7BjVUWgBrV z4cA=LZ0K3Jm7Y$`N}gDW!rA~L?Hm6yF)`UA>&G{^i_Bv-`p!^a-`In%X05*cXKE!J zaH>bwCigsg?f5fAzfWS+_NQ)ASnMa~t_~g8?w>4Ll;^+k5S3-Uv2^!r;U(|<4~t%! zs4sr7{KlWDJ?yKqr=w!BHjR%8Ma&rXLPP7+xxGc(N7p7q2>T*uqYb9(sMN+!bZ@EV zKT}%*5?bV&Ui#e!KOP&iJ(5-YLij>-cFEEgs_9V;w)&TA$CsnAw%$cko2b=8+e0Tn z==PIi$;#|+HynZ_~xhLiJwb#D6lD_cFje{>; zeD?zXbN2XWQ`?;{(!bY^xppq&x2Xf&uWY()k@k=7RaY~CSFg0SXP(cU*u4Dcf$>$3 zS0gjM4JY$*`j&28KCwDneeOxC@oMTt|Jc)sdHz7?hU3$8TJo*Tr$&k=Vq<@7eaTdb zlze;k+@srKUOYRQ8k0r$KY8EPM;i_Vs+Z<{{c7mfKaL$}&GQx4o?ka{;^2z6Be4tlumcUH$k`AK|THcYY%Yl#Tvg~6Y5t*qy$f!AU z`|0n0++vtmV95J!Z0?%}u4NP-JvN`a_Rg-1QOY-81GQ~bX%ZK3+`I#dU6L80^ki%KIkDoWwvn-g@ z-9LL%kNtRVTK#CXb*5z*Zfs|5Bf))|skb2N*bTo@-47jz zsceg%0wvHCKeM^Zm{fXtOuIl<;;t5maA=U%GD>$xKzJkF-7Gs6IIoWA4XB^5wg%MZ znN9Io&q&yWv=BOHq!~yh%|IisKCh+Nd&3hxTb#LH%M3P>Vvj)?S)%yv@iud(`t$G` zOT8lvsS2%+oS{cxmxXwYb}3j#jR?U^JWU5t&KVAd?dtoB*1!)Y2LiK%OvWr|xFoeg z=n!*nhLWA3XUbTaS$>ymQOL*{GrfChj3b^jV5(}w$fd<|S})mU$Mv+dl>iKGTU|{n zDlp7dvdUTqGEK<}buXVFh7KO{gQRwQKi`4&;|h#e1=)!KYh6ntpu#3l5XS2L(W0f+ ztE)G4S>n`(!H2!~RMhK?%nC`(oMKnOuF-<#Mx(d}MY@4yCB2VFhxiGE%MUF?^hT66 zW=aSxrbfC@Tj@M0ctEHpqU35Q3bPEDu^J#8ZVDa8=^#BeEJ~p@IIm|ddfV=~W9F2t zsFy0ksIUQXktS>>Z`li%!f#}#scj}dk;$%r3buA=wN~xoH7&k5c-kT!2lb_iA?3w{ zWJN5@XUMjeU0mn^Zx!zH!=BkMY6!zAN^RmI&{JGJ6RZ$E@K{2>fG@j5Ksn3Ao6lgW zJY3_K>_A9=5~)ZFQv`85RU1t?tXwl(Q00oYd^j=J3E3RiMIa>%APNW(X8quRpsP$t zigKk^fje6;7lNOQ3 z_Wz2(bQzqgF@kcrxqvqt5%6R;wR7MLFI_T(G}mwy>LqTnJ=;nGbms{!M2e>w=&!H~ z>LD5yc(vd#Nh)jDV&iZbk?SNF_`xj_zBmc92%^skWJ@^dK2Bt{Ae$#<1Jo&DUOwp< zs851w9+}X%m#)HyL-z?!f8T_ZU~Vf>iMDy?-9xAkCv^iy1Q{FudI5i2>AhDuB|i zfHBz>cz$2>^T*4#h=Xw4f@+p7%`4r8Zl$~70BGjW--w@~weHAvE?{I`0qH~|j9b#G zg#Z65EDMq&7>3P#@8|m+Ine#h8+d``6yypJ;(-F1YzNFug2_j8QVj@IKt>@ydJe@W zK@4f-tZ@u)O+r*Mj!F^~7P3Heu%a9X%bxhJ9G%;XhsqIk0k(S-=I@o;ARMW;5T#Td z5RLjP@wK@Yc~pya2kRcC@H8QwUK!QS&C;nPcT)oDaUylO=syZU=pb;~0J;uTnaW22 z*jp&3z=iK&!7f-2Gg1J*9Le6JOTbg0|7UJ6Y4M>k0vBpWP6+qZ$&8fxznsYmhM~DQ z3dI-DF20mVh?XV7{%e#QCMdoG$9P2GDwt5ttJLx(LJg*?Az{BWg^^+RQg(cv(3nHHYq(`ivt%eA z$B{{r(86m&p!jJAC%}+UnkWndvP-0-h?Gk!h*Q1%y(p!%3SV@qF;a#_-VZgOcq<$j z)Tm|TB~hM=1 zC@w{tF2UK8#%MT8a8>MF{2)nga?eHGPY5K&9o7*>lI%h=YS(Mn8bBo0FglzYj4I^k z6OULa5{puWs_247QL7M>R7tAm5b3@kK7p1w>IAJ~KDI-M6R->h;S|r|C!j?Mbx0K| zX)eszknqDmQ98qcxuaBF503(!D0fip2;>zbCDINfDIj^n;@xbhJe-y^s!aMz(mK@%W|Mm&PAJ~l;NmmygY4CxGwC8gx7rP9)vFw9FYpzYe(lGNsu*_Vmzed0g+jw z6oWCPnH(a9qT_9|`6QKNl;kZcD1$Tj36i2dRc=zQ1kk(`*@QvqHO>J`U(4T6up=#0 zT4V}m(ToHfYTUF35rIrGab&QOhAt?iye{N9$uCAj7+xZ`Ad-?PZDPaj4MGUlDP6{5 zT8k#2D{v2~lanz#Q$ZR;71TUGxKj~^N-+8$N0f17kdk#Ml3-4SQikrp%%q&cg=CIX z$|OI`iPb3W&JH%7g3!@Tt1QYDqS(l~P=x~t6ulrjPB8bC@HCI|42#h@e2_ew4x7cz zaAjdIQXrpZ)q|`;#(0mBh>FJDg##cFqw5(6E@8PNsGwvpf}+manEkUzY}rV4B1qWi z0@G?FUr6&%%L)5(;_D$qg|U_I=t-oTWhD0y5@5M6el`pO8)1S`5l1lN@uo&{?&g@f z%-p)ncvgMH+MYXEj$|PN)CLNQSR=>atSe*;F{*_o-6d(4asCTrWHap~gh|u2uf%v5 zQR2s3O81pxEsVO{gxAmJ*R;^;4t7f+PzvYt2-P5c6q7H(VvAo1#11E&lnYH6IT9Y$ftccGEB1I1GTx#4mi| z|H2bo)pPzk9v!IZ$d%_-3z7Fci$4zHs3tQRP5U9yOR#0iGR7E*R`My?cvRE}o9Zb2IEI!pgM^13dQOxI1#xz5bS+I* zBnWsIa-*A^d*YIF%$D5H`w2I1GVJA4Z^NTg{DG{}&rRp)K}#U{RCQ_2sp_2R;~RU# z+kf8(@zSoa(+~eS(BSLy9;yGiemaf2=!dCa)z|M7^}mZmB>(*M_itQ(1u0wAF!JHA z*I3Wn!3`$@2g$5uhE3zmG0oQ1sNq3vc(Vzqu**+1zynvBXyOW&YRW3;#LSboPmeljEAl<~+J@ z^kq}e`9%ZOJ11WIEJi#uh(ecA^@ZvFeG$mSV_Z+2EK+JEjDTe7%^Dau$m9TrwC z-sXDG>yD*iEnMPM)U7u2t&XkB{uMCMr=QG9nIf*YExWcPyC>!5m@cn% zGW)U9|A^IJe_>t3(Hs3=H=O+EqMPKw^z#wl-~O|&Xv3YTqa(o|alhtF9lv#F^PSeM zrp9L8`CkwNOs_HLtfnlO(1jfsPD$x>b%d#r2R+vX=i!Fzj~KkukPM1UH6^H`?X#8 zE@jktIdAy-8UnJXaR8Nl$49upNaZu@st#2fZvWIB`%XY8Z;QTJJ{EcWKpsE& zYGK)~f27T!D<5kp8`n%!UwFCwNL>J{gKXtbQ&+pc5g-4yr*CW857?0nV+sF?;6``Z z^DbWJzMX@=QQ5Gkzy8*O_uBei-g{fDEuya*n`1YP9e8u(p&P9Wf6R!uuyyk}&BSZ1 z%Px=Y+LU*rUw!LwOT>G(i1}@E0!3ii`D>R$vxrxkj)cBkFclIpl6&Fx>&v+aVGKlF zTs1!T)u(>XIxyVy(V9sM-W)4z0i)5~&l!i1iNwMz-tc1eYN+j7{h4W7 zDAf1GP~qPFUe9l|W>rSj^WV6uNC-7Q5XZf0A>#7lEwg=kn4p#zFpB!=#AfMTulm#Q zlm|yM0>Q~;%(5Ctt_2sL8e5%q+LV|0-+^i~^cb`u6(7I4shGa9>3>+Yr6q0I(D zZ<$JBL+)rGt2XV9%zEU1S+%y&+3eACA`UoDM)s1wA#O+M6ny$0?6|iZN&7nVzw<4%qH9@zm<^2VDx94 z#c@vqT4&B@j5R2VIFE@utG^HIh^hcW98nUrHB4eCCh8@0ckSA-hz5RqPl2K}6a7)`-emtGlGMyXP2aVFXqHZFEkDH}b^e2iT* ztg(q^K&Jf~)`3qL_%t3asE)YK7fwj=1=uM=KfeL?SW9ya2Sq{>d_R1}e+sY~x|%CE z5#mwT<(AmoSnb&ZQCw-dzui!0()=J;>#&rqU<@fN?cVkj94ZT$sC#(l#4D8!b2khb za3Ko7I^qe}J!p-LsWj7MD2%fc!Nz7a5(^dRifz@ zxP?*XhlGu7oct?+d(zH_7;(|B@8@iS*<4^>ZVT&|_#+#T7RH%?e`Ob~rA#H08@%4H z?gq)yPI99W+cyC1Z6rLwtEsURJXR=Xagm4euS_J15NziB0yptp-FjjveF;qf5lz(z z+ZN#J7TWnJ&>!Du{y!!sl`Y6zf;0<1Oy+8!@=eJDF9-i`C_NXIv1)}ax12ZXW%=TQ z0%sGQ4+EPn@w~A~J8K>z8F4~Os>*cMa=8Hm9_F9VUlJ&~21nz-DFQL<)CC=(-)Slt z!e|3Tc=1KL9H@rHI_ThS{EUc^CTGn~bvi>;C8FIoKfw=aN4-6SF?)zKMOuvst3a7B z#awPq!8;y|F9>a+9p`alHrRyR7aTIkGr%K|^)leHmCD>KDDRN&IgBV*(VkLKipb!h zd*0H{ms0XDrJCv>l)2>;p-|sLs8#k$wA4(<5XNF7Gl)9Dr!M5ki&6K%9#cvarC=P8 zt%Nbs45TUKQs^v83#25HL_#fZq=Q;Stz63+Afut>NiPH0jU9#2a_|*%pIS*SNq7O@ z5ynSQa9~2hL@F|pAZkHaGLTy^32j;I$R?2Tc7n5s-DI*7MMFH89=yPL*j&j$kv5E9FWDf!mBBsj_MX;l~4_s!m8Z&;KU9NcY4rDz_{*hjCOakCHk-H zk)e*n$SyiOii27*x;tA#kx-rruZ}u9En}q$mS<(^Q&JYQKoOuCxC6P8ieByr`?Zd0+g^WhpGC~D>d~fN@{U~ z1+OFd^vDw%(JFccZn5DQ1{H}&7`_2pfgL8|3*C{t&Chjp*W+sduTqzL_&8q1fnW}( z>X5K(ar4rPAPzv~TRP#a$H_Eah|dV?U{yMxBo~#dV3Bqm4La~RObb(+f(qxj6vM*`VbaA9tR>sCE~_w1apZhvK_r|e(9gvWsy+C%_QY=B+mAOjDsj@7opS< zN8u^ZY*kA`tV%6)Ao>EDbP|*@uEu$vWMuG08U{oXfKE%`G7=z2Lb)b-$$E1sIRvOe z{gMX}*$Qc9PG^Kt1X&P{s8&diHP)i{rt0?et zfTX!3m<8#k6nfaaz`$8ukjgSMd=X{)LQc|}UR;Ucm0?^~t+oDiq?+`Qwu1|nh4N`|}lLn~N&7SZztD4rHxWCnefTi5h1VdP$j#e*ft-#T8qL#w< zG?l)Ib&@(tV5HBH;p6~)j6>W_rL&!L!i?qT#9~u1dy3vG2XhUU3Bu(N1{o@0;~K*A zSh?3&%@KnVIehBp(x~opmK;%gWRa^Q@>9y)$?-f4r+)Z9ADY*;ej+iit$oTG{D^+! z`H94n5y_*EW>AZ zF|~GU#J7;fdE(`Yha)onFpodF2i~4@D|cV|3wfcRzjEQ*8^>+whbnri&jk34aIboz zU&=c3bL#Dakjjvg_J{@7Lqnf=y(jB~&RgzR^HQeR19!|@x$DPIJRIEf)YMO#i_Uji zpU)oquBFI-o6+s;C&u%ZwT)j3SHBnBc3^`1`!h@5lNu^VZy90|KK*0Po!1NvXKrlV z+)#c4z#Qg@jEw5{r}P~oWjEZ(5l@b#_I@l@Aq^E%Ls1Q-(}A>$J%fzrgU_?`e7EhB z5y`*r`Pas&&9=Ohq1vOLe5{#VoAcJ!StXO_OsBv8?pDI9&jyYbP5izz9SJWjvX5SP z_4G@bIawEPZ)PuAJJ<8$SeKxgRD_q`pBYdE6F38OhW|^~cC%o>66Pi!+Q4V;?tRA%vGSL1t9Uw`-(YyXk&VQwydFRT1DvHqO~ z*N`;e+TGey4fSJhm2LNL6SjyGb*)(^|ETynBXFi<{(MP3vK!A>gT&`xT0D-5iIsL3}+eCR~jHd2H!4&D3t#BkI8 zZ?j<}1EkW>89ogyK5HvNCfv5HnPj-Sm8Sv3H_0t|(7@!L35>3O7V7_?PH^Rw81ZN} zj7m5fatnydX0oY6K68)lf_KP*$Y|`i8fMBhtMkqbLebzA2vu5VP>MUo-IhHC#I}$L zxIrLHfe%IYJOZh-|K-y_)}dnWFuVtNACh->qZw|HZb+puool8c!1?9(PnW*>?7dAC zOrRYqFya(%;%A^rr71}Tk;>1&=A>j@BqYZ;(GClPG)FiEG-C)RYZbaip;kDISPYBm zmEbQL*K7sKAZoV=X*juzHqN-0zA9c)+DOFW7~pI4Qh1uNo`e?ZR45D}8BnvWW{o1( z)rY1Hl!E9FBtfoSk}wBzpz@RjFVov6cEu$QyZ&gP9WJ=lsX)^OqxsLz=@Fn$Vs&R`=dk-sd28ry8F zri^tUTofKbQY8y*VAsaGH|W2o1;l9&aSkJ)N022z9T3Uo2)EQ_uB}fE70oH87li6y z_P8We(8yzSKYtoE17TZ1@2=mW@+O(Q$ddNDd6BE6y=$cuyWREcmivwYR6+)MpD3#= zly!-0qnbWTz`3iD=At-Wh5NNlL?)$er@Vv%f<@GxhC^RN1>llfjCjWVFk>Q)mGLS4 zqLK_Xv0s(*s)$94PPfJz$_h|dwvo?5R*4CxIz+)JuBHve8{D=NIpW$ENH9jSdz5>) zM35CG4oC?L(wrSw$g;jS#>-$>_kD4Q<^k9^p*o}> zFL4a5tfcBQ0hW|435>v(DmTxXt0T&5*iz*#v6YZIDp?6D zN#fY8bZs!+FHuAx4Er-w0toY0)r*&eY*F{XA*-YGfLARCP!r4<8vZU2~80^6~*j|8tx_?!zQ|^>I zKqG6-b^N7kg6&RW`VAm*F&kC zney2Wv!qH)YsN*byOxXPm8ectfobl!IH~oZJY;grwZN^iyXbmE=4xSdEreFS zsemW=SSQJXW-^>ht4*WllyIRONKPqz^A>H(;L!)- z&|T~(9t@A$)$G@vLGj`+Ny!;8?OcaEj^b8GNy_Iq8`C0Vv_w68Z~^TSNlOjx zQaG>{r-aYtWZG?94PnW($Xb%PdIV}f%WF|R&LAo)AEJ_V5&6wKICeU5FRQELM3^d> z%er%Tmm;ygSu|6_bO+*Nb-6IzdKlS4b*JHcaC8$ZIu8))POO#KNx9D9SU=yJ(br_> zV(5}Wq|QZ41!5%~jfA4s8ZkwsW$QT+*j+mrZK23+UwSW^&k%Lm^%%K?E?{I`I2ELn zNEf6iev#zS37A_E2JJqWR$>V9#6T#-(Uwj@+QSF&(jH0wj<9K`h^skb3!rUb+WS(t z0x1sDm|V}9SUDyG)s!!+RAE30ff$3b`3&S;tU}JaXc-cPz+5*NkzIN(uGeubOqzhw zfTXf;f@D1s>`s) zsWepTplPVPOv2^q!d!{7OVNA|%5i|l9nmM6g9}7NY`r%X6{3ORLL}ocs|?pnmMc&g&b)TqL4XI6*AMH1H;f|q&G<*6i~+? zV;ZTT&?W@>=mZ6hJE)qeNTC5g*oQ7;(D8bJPlkb2pjEo3^pMxIG!CDls zVGc+zA`kv?D2*~a^nNWbI2A-Rp~M)DVe_d*6pn2uyzA-x=dI3jXboOh@=3w-Xy;D| z)!952rKVR$huJvwe6OC%@a+SxPsl!8QdN-0X(N^TtYFv=Qkn=M!aWZ0oCR$Uwxar* zB;A8GNAYc$+3NWughY{xn!H^(XRZ+~Aw!~gZ*)h~+wo`xrWSW$8z(;f`&TVi(M+;r zpSQ!-5&66xs}=MMt(n+7>;Up#%wG^(K7p~ICbx;coEKN}hisw^F zUc&DDxPBD~BQ{Bo8hO*+Q30$`Go}Qh8X0TK-T}k&d@Nsqt)U00f+$NjTi>0c#x)!G7BoVa*)4=NvmmmAe#QSXZ8~!b;E8+R zB`cOKdp&*q_}__@zj>y(;AQ;O6NVn*n)J`M^Z(R$6b^!$D}Q`1EO|2Lx9a)l{FhVv z*c&&tWc@J^n4ZUezq;BmC7phldV)H+DeLOZr+zFlw-=9#A1$l9k@-yc;=HG?U3oq0 z!i|IlbABCpx_IJF-NlC=%`;Eb_rCT0!xX7^pD(OT>$}6K-AX`Shck#_;rS8!n7bT`Br)@{D;THQHv-n#5Z!H&F`%>QBEb+g35=GFRW|Pwmfp<)^7%s-gqBBg?>4 zW$DqH8!-#AzPY`fy4X8rf2Zie52=BM(1yj=TJO9Zc(b;lbIQ=RtolYQHnRD~FYnLa zTg07IU z*P(sy_7RiF%Gh%g^N-xA*;aMC`Cu&bsV=a4)x~F~GZz#Me}4u_0>S326TN4qZ>KbD z9R1hNMRhaJm}&U@yWT*oG-AE=#?q|l04hFRGq334;_KvlMYpddXZ)C)wR@=d+7qAM zv5)=(ZMbuDmFwf?hUn|Re_T}iQpH5X@uI;ojEqfN9NM<|<|C^|>I1qtdEO(>Y~ikZ zHusdgoH+H_?jHL@NZEZug>L<~cuM!aY zR7L*V`UEXgcdbv5q$xiBC&VKLh)4WTOn5hcp)LCkq-R3z5;Z^F75JIPT4y4->t;5S zYM3y$Yi0v^9r5mF8j?FD*CDwRa+lYc*@S!(e&Z+lz5P9lA-U7MvXYz$Zn&IxXq0|7 z;t%+E|Dz{7kN>~q&YCyg|0B6*N=0gCM1u}SQrwNlmg(;jI3!f<&#*Ky2XqejX2Kb0 zQ(C8S5XfngBkgodA!_fUW;mY;tP5)loe>kp+q5WjcMLI#j7KsSi0_BESQmzNQtd6- zqJS?)o5vd^D>=5D1(huM(@#jD@Bt!Le^d*{91v@_hOgF3bb(?~Q-SJdpJI$LyQt%@!ax{sxA-Z~&C&?6l zWF>>TSlDZ_-#j~W7QIY_)+l~c4V~`PejwTyj8w1Tz#cy^OIw6rN(#6-G(rRc8-_hu z2xKvJrM9Quhv_{fCDz>V;io`Ei4O~V;9>C+SA!4{qMo;}>@G9EcK}_R!c$H5{R0GP zVjJ=2whit4k5aM*VSp#`p@by}T6OVUH-;-=7?tD$ zP=OgKUt{Iea-Dnw2EuVAALQdob%?S;Kv_#lGb{V+l{erzo-SbuL^S1Bb0>@)3-!+x zGsbZuh*Om@l?iF1eiM%8awgZw9E*)n7tkrACa@ei8C**Oez{FdEELjc4%Fcdys!zW z*AFnY+34w|EjS$A_DZCGsDgHT>(k`+jO&K>{UwwF(sr_^oMu{)Ca2x!Fa=!f3ZeJH z)G$)sNQEZA^h2e?3o^V>co%SN0S9TlJXEy;4-J*Zqy()(=a!eDNx33WZx+(1#cMfj zzc}{coGz-2799y{cd1QUG{nfsv>L?a!^JL0Soky+$X!`ERNUe|Lh(lIFm-{Khk*Zd zT19dW<$RPQoioi?!ssxDl+R*gay6&O-mb#u2#MMvwOCQO82k%+E3)KK90W-;4u0ea zk!(R%i2Np-kfEdx+7Xuk-H3ef{k2b+80~+W%*s>HU?`w?p_)%aR4FY;0V&l;jc5gx zh77Z2u@r?R+A$)7TcG@o9=SLx395`{^27ZgQaXkONh+8uLCU~a7|#Jno>bC$iGQAd zK$7iDm;q~z0_IASlR=22s0~tScTtR6A%GoqjAPdHBBx2i*5fWY4^ozNud4<60d5Pf z%&b3*H?e8Lefj8VVGbg$lV+D2mlG#70{JO#q(bVY+#U#)DV>tUDiQY{JnW1~+XsU~ z1ij>;#7vwGr!uKcV!R|}46;pg84bmcyUjc~H3TJN6E3lwJB3DSOhY^iQs*|KvPQ{0!TksPd`xQLK z<(A0FinJJ{iX^dcGDae$Pz9|1l+b#or>>FTA)R0f2^cw72FK)}n^boY49@#FvwRNX zs=*xvY4$R`t~pGnC{-C$7C*g%Vw}pjTqaGLc;g4HkxmamR*1pPd<-^^hY8Ct{ei83 z1+dULq?709wjwll3YmxKTD*kpL8OKVa&4iN2;|O^B;5adI-$XZdQw7P?gZ@ysg}!7 z&dFt+t;VVxELhp~i7!MlWA`6MMHEshEa~!S8eur7`AJbP%IOs3ejJ8bEI_{Eq#+Aqu`^i$a?UItXufNQ=-|5Ur~4Mx#GiGU#qHiED~Nbvh+1 zVsOoIT@if_|&r264A@Jbp#^u9tzUCJe9;L zQnv9zr2mbTe_KEsaT!Lh01kNpaPJLk35*bz#$6ce<;}* zg@c5t*%*n)S=n~Yf1Hvhq4F+(Xqym%)1o9id1rPL;9rD{Ash;)4@HG8*boc#`w$w% zG5I(EWwevqr(TX|qhEX4gX!As@^Ir@ShK(yHw_9C zgdJNbs`dwC_5Q=^03~46B$7k;R*fN~{=6+fG+Sx}4T&`AuhR1YG-WXqTON;Bx7ei8 z%xyIVElo@IkPAORohCzci*CLUt-rS#Rg@E_Nc|U&r`SEAhn&khmV4EBt$3ITJEC7g z3dj7={D)PsnFUR{CQTKynHa+2Phy%u#$U5P9^*lbwK~2QY@Uhh>qG>zB2{n;Z;OO> zD5Mz0RL*uT60YnRt>p~owl<49Qs}UQ1?k9|`{(oNY-4sMS;>HdMxYxA)eSoRG5J)= zfY@!H=d7T+cTO_2vmGR|7yoYl`NOe?*ze);sQN=w@I~|2n_u31=fX2ZY2!IZvYx)a zf8)px<0AAay>?})(4BfR>;JO%_Hj|vd;jq4x^=d5x~_{EhGke+*cpa(K;%iH)l8Y$ zVHuW11UZIg$s!t=hEJ8J2i+M47@kCMEA&_bkx^MBnR(9XB)g(wS(|3&>9Ph!H`@}?IQLJmElwO(f-vxuI>-#=#y7|@P-o~MV10hM|ANkS{_PU_~<~@NKvq7eP)jD`>%@*{cv&^&y6h_dEo5y+!u3OAHDv}nyxiBhJ<|| zZ%p!;c4Xc^G|m@E{hPMc#QtT|)$=}UT21cwnyXzWC%z|Q^M?%|EFZf-v{E;wLR>gXG;ry}n-?UbZh0R!bd|Xd< zo$%S$Z}0H+boUi*?Y&X`Xi4u4SJ+BllKzw7P69jgXEUo|{?&1ZwwWk(~1Lb!d2 z1Di5#t{Yii)N`Zxa1q<4^R+$x<#5rLqmRdUPYy@ZnH|1@=+x@gCvMIjsM$7oLO2=$ zy!O3i+dmxoaebeC?4kEFqi$gG!(;g;ywN`Hh3z+=$Qg}Hfnr~;_g0NOqWdVj=82n2 z>)&N+$S+6xpF1%5)xnRihrgLw*ngNV62_BW>0lvMX2I#qgJc1k514s7)cPlec07F<=#_5Qwq#j8MW% z7Aghh@jueVcT`w~%qgZla;M=MlXHzzfEA67EpKitSEf;+ zrdqZNl<60>7^T}tuDHauk)7?OLP-M)(s{F~l!Ns>JjvA2c87dF5x8}}$n#qx8pRC8 zMP+oBlJ4j#hB?kCbtz;$E@VnaSQv;dWREazcY`b$_)ee<6BWrUM;&C(GILK6_5vU` zYg=}Nx*%O)-JRi`xsu$Kk>Ox+%k0TbU}5g0w~83Sza^`>8)%uWtO#lntMO!QI*rd@ zX4A4qlOo>=~cEpA7pa*WoNYIZPjosgJ_^l*=Q6v49B$APZ^aJ93foBe(|e5HjTv67nK3(Z+WWP78fo4377mx-$j`QInE# z^oXf6z9TZQ1CMIV|Hyor92Eu1T9r?l#>kFq(SdHTXr6Pett-GpBI;nllFm#CL?d%e ziM(}dP9v6H#-BP!XgX`SlUz+x)5DcS1({zmok&%(dupTvKJe^wjdf9nsE`#^xm@|h z(YrU<6}8OmG&h`ptUhTslb+L1{8oWxu|O%$<2sMf-mFvGDY=$Tb4SN9T%MHDf=8=Q zXfUy11$7yF4Odud=k9a}4Kf87QKinL#Xv=)tnj_=z9uB5Xm|S=2%AsG!zh__l=2DX zkGhz&L?C!Oc49s^8w{fu1GnZlLFwpCIUvtj$z_*ue(Et(Re@+B@xqcFW=nHvl^8`f z;gup)c}%d^2^}-A^8Ji1dIn_V+0M#yav{3 zqCqa~yi}t?N)OP*s+1Nk1Zd*oDP($%QlTksu~;OA>_Oc!!BpkrRJ1~s5VTg;C$b_vA^9(c8lci=`6-x%4;X^}WLQk`X_a)>(C z0tt4;+aT{xl}x^dgW|Ra4m_>bxYxFw#0^$8zmQy&_?yr1(slP77T)?Gjw=w_$Ka-nZzd;SIgiF ztP*0albYwQhw=A4ow_!O!_=@+$5u&OR)|`ls9d_I&U9k!r+1dGM#W^6o$Dd88Hp*C z$U1+n!Xo?G#IK{M^5z1Rco!GnNyt$ZHCrciD zN3;n8Tu~v~g6NeCJblMxqc8-BQTPacZ8c6y~L{(eU^X{A-(ce76L8G zoLc!UfFcpne}S(|U`lJzQYODMjzt5SBz+>q2(tjGneIS%d#SjeA^g!!YHaQmw1Fd$ zR~fK@%N4ble5Xw-TW%-dy?}Yps34n*1KM=$iLE3}#G@eN#!e^GWnnP}Lbd_$>S-Z1 zhzu@@pv9`XpZD)7;$YC>g{hl~0ySyIvUdEs0Y zrDAjO5|wB|FX+|L%{2WM>((24n|G4|AnTPu0q80V=<3|kDwiUCzS zRZa&voeoqPHS8x6PKhcOL5%8TbrjriOaPVuaUv}*Ax;Rdf%gTgqoCZiSm~8k zC#i0(R)`^EQVf@gZWGxXMHVu_beMdG4jIT-BJ<0Xhu2~=v7*4kG{(znqO^&w0p54E zP3XoFm*A;^#b*gzt?y;)qL$V&Pai*mEn=+ASTIR}>AX&i70(bsO6^*9k0hlWV!Ekm zh!rrX(SZ>7YXrfie9T?VlEq>#b^)ZZh*AkYtkJx_&@|nYc4Xsg^gJNR#G0cl1G+Pb znM1o)JmzB{lcx6ju9@}boH*k?!jqBGM^U4~c)+p_Y+ z0G%?q_U26t4SP{a=qO5yXT}_?B~s`tIp3phk9~jAL^g6rt9gE zf-hHgT-P1izWN4zuItQ=HSZNI941O1nQ0v}6?kp^kH4Sk?f-gi?2}(bzf<3zbt?9$ zq4`(6`Mq5O-SdmMe$)O;V(3rw_7j6o{Jkdssk=uV(HSXT+s&nKb{)U*!@Yf*h7BKL zU3>efZ@hzJcxhMJ@VACX5@N63aQ(i^)?YM#a$utVwWDR5*r9FfSLWUft?{1x^OeuP z8^%3lOR}Zm* zt^DSQ)W1KmsBqliojg5slIS`$Ie#rL4i=LWSZ*I!^Vd;j16Kv}$5BqWt z`go|v0pdhYRQED-z%&ALMt|+=TS1*Csz#G!!_zSxKc&7IbYt=ppLgs?NCBG%{`3@> zM?afU7Q;X27foS>5+FeI%kENsp_^bOAl3VZy*NMm-j4ve9+ff`Bhov5Ap6ks^9HIm zS5ukh&zXVG=79_YsgU4aX*S@BGl1p9`V~ngUx>9 zXv!`+4t7x(m{N@Yqh;YqV2)V$xt|Pt$xk2Medq)jR1hij7xWucgTSnJU=T`w-`@@C zcwvwF4Kbh+hmZHLiFqBf01E#eb~toG$9k9k7MmjEPNq9>Ke0rPkgNd$TA-CcX_eD& zH1RCZN`N419tYgsU^4~K7%lk&K|JCQ5mnPa7XWvT6PEvW?_Dv<2XmAS92gW7L1k8< z9oTDhuje4+!gqJ@F+!}bC{fKIW)_C9 zjhN-PmPRR+dZ9MuFeBuMrwg!_ndKj1ZxOlV31Jmq<)d6dJ*==_oZ)G2d;<{C<%x{) zSY!@WUru&1u{r&qJd`CEP)==a#6nnEl~mxWJB`z2BI<&NaLSE$Qzyhv#H!Gf&u82{rCVYL6^K))aq#d;K zf&#Vs=z|Vm$_qm0yT}C{`z)u3l=-<>bxKJG9!mt9nKPjKI%7{*A$rDAOIny!TqP#~ zeTZz3_;0a4Nj>aeN%1u_ygtzSpU>N-lc_wZlMe--!;UaM{Jq(1Oqx3rJ3pDxNcM9*8yj7RD#nBfH)f4&Z3J+L@5SCT-FkAYuKnwxHgYt1I@ZHN*mn6^8PVt zoB%m>QJNirmq1xw8!fO}W-%n5&>9$R9Jn_X;WB6$VGODmRxZ^o~UCb!CkKUBU5vu>q&SD1f{ zpf$9d+>C{LYVE2D@hqbPiwYh%CXjqV*lGKO;56o9T;q%vQsjKAOrfSLGH?;jViD#T zJf?h)M=XTQ%|zDev13O12&R#)89v3Y5d{KP&Auci85Uv7Fo1Y$0<&e!j@#X9>N{Q% z6ZMuPy>p{-rMN&S4%V109ie%p1e3hB%;pA9}&d`M3q24SFY2h^$64|#Yh(D zc&cIgPIpOTNJv^?V5-D!!lJ};_&GvbR}8>?7ld(xOEDYDXkyR)##zu2;y4mQK_KOr zL}C%Qy`)*CE>@?~0UA?+)Evp)&PQg`;rWhuK2jU0I;Bo+cB+#wZjY2AX~>c~j3%Mi zd<5gGnGN&R7;arE(GkL${K09mE<%-KbWm$lv}G&Wgdwz^QkyhlNh5B6a7TqBhDp)O z8*k5ypz+;np@Qv z6)CC1&5ET3V@jH7rHr5M2yAj!i5(eO%pZ2?Rg0x$!gfRkk~&6c5Yn2K+c{a5N_tsI z(NiKpCFpD_2}yfQW~K%4j3<%M-BG!V%oa%-(IhvZ0%){Nr>X=X78fC;5{Q?(sN#O# zrbITC1S0oh2e*@9YB-OK$hd5jD8hxNMoRWAiaKG3WMnmqa3U1iKTaSw$o;j2^b+9$ z$(zwo3PnyeVwZ3c)6zy2sHa(Zb^Ax*q1hM(nU}K&qspmD!B7>TqHr>TRzXb1D5;ax zz@?L{)JvojlED#{N#@lEV^p)`91#?fY`$Yh5Kz$#k~l~P7F8r}4uHipB+^MDFswKm zNz$MWz|1rf4HUJVo%@K<}eaX^-&P)M96i-QfQurz{%|WJ8 zQZTt>fZ;>F!#vc^Q8MB&0`;JknDH(!gO)d8=}~L295UqX5|UA)L8Ia3*;U-D#kqpv zNPWHT6!{XV)KC;#DtmgVW^6z4oUU@otQj_VAG@|VYVOKdLY^8xx#T*M+I=K2w2jj4 zY}!^o6Pwj0GfNK9>Lm_FznaQpO50kxXWdMYV_CxHB4&{_seANaZ!|ZWICp{#0MZ%y z5Wa`(k=V0RB1T53W(F2NM?H)s((vHgdZ+?vQD`U;-C?V`>`s(kIu8b+GTNcjX((P_&)6^IzADb_(2J;sVssQ^c437{))nr^9+$!`$&9+bWc+B!JFAC$OKM`iK0mh6p3&GE`}Npx{|Ape zc0USO`%@px8u$Kw_~PcUE0f0_C}MBClbDgT{j-s6Uw)Mp^NRP4A^O0h!rHNkrI}ZU zw>&!Qn0JwnNC?%>`aLlJ5eo;?$C<5tUk^QC+xP4@CBC%_x*C1sk9f}y{o%+XFKvHq z0MFU?{N$6PeTODH<{bTWfOH&{2coYZ9q*5vA101Z%*p)IkP!dCnWH}p9@^x6^PAL> z!XqFS6xEaU&eqBMdW-%#a`Btk^H)pP;NI-Xp6%P74s%UTBy~j|VuwEaTkQ6s!n59o zd_x!a9q-?NsOT~rt?Ry#^A{F=J@D$lteK||tr_k-SM>F8!PA*?|G;5y1h8-95Un#u z)+H@G@VmPv{!mnNXk;bCPli}a^*u+Ak7f4uz2W=5Vs>*8Hv0LKUEhzVpKi?=3#y(( zfg!NQGrIDl@mF7Ya^Eu}e|@dUHCBgxY^z~zaHspM<0ougZ(iVTm|R8kecvBDdTz|J zZrcw}rGh~ec_8-Od#Pg|+*h-0SozELlCckt)%qTGB-OtxOuzFv|0Q0~;*Jx|3cdM`W z&wq6vjqZ;0_3nt}#+P4sF#r08cG$4^KO&?4a81C~CpghJhoq1~6=jt|W{mUJoI zQ(>ZX#-B0w^^4?vK<9TH==}Ut2zs-=w~zIdEXi6Do8?cIV_(UR1-oVdv{lWwWK~^$ z*&@LG92j^9yYKt=!8&;pc*buefL_ulRnnUEGpRu=`r?~Kfqsf{Kf8G5J^nnqH-MTP z65o!;_;cQ-65kF00pF4X3(t<~KWhcyqJ0~9C&2`*(*3@Kbbg23E9SCAQNxqjIuho!*EV$WD&5Sc4Sj&5GaCdxde>_p{wBf~3@>w%?!x}fzfv6M+L zH0udwqr`lBR)m)*k(QDxPsj5l<`Q>G2nYB%BE0&SL-y`Rl!O^hF`H&Y-b9!8Q@rUw z^lAt;F^J(g-U6fNK=D}FVmFhn*wy@gl;O3uCxHmTd?*ep2mV`K#b)sU#-}-|(pWd- z9yx8jTqCWcG~%U@v*Mf?^JVg^PNuUMc1KQ7fE8V4vr1}51yilbZr1 zCkZifS%I!jQ5G}qN!x#huf-G`azBWj;8AS97Z}lTCj^4n>^u>%gBjt%KqrGY7Hf)S z@dQ=85eLG-W-?-nqM{><)ie;{G44p(oy#nh!IenP7(W~2i)UwIks7QlktNEQ;>Tol zDV0qJdt@ENWp)_emYdn#-vj1~h+c+Q(y>`DV5tI?mQ$RO7%V+_2!>0LI;`J_F9_ z2t&868$U!`K=Z@d2IlUUEAmUIdl_2-TfoIy#~HpRO;hQX%1DcE^^G_wnFsMu76;2j z(sc`v_~Xp!WM^{8f(o)u!W%1KNTIm~MnQxSj~NIpxww=U<6w}-BBvpp2r|`R;4vfW z@(#^TTF7e*kT@#?BMeyu0~dq?KW#djtY-0Y6#(L8Hc(XsiDoE+DF~tmKCN(+k&j3k zg0X6;YiM&`zNw!H+4~#ZauCP9kADtuYuFzSMW3ls1=a~k>!fr`wb@P&FodCzsOm74 zAEFOpy5?{;yg>Rs{Oc=O@`DVw$XvxIIabKeEw3s_NyUo?g*mzc@=~*h&TMYXF3nQH zQq{52XY%UH!b{RL;nnV!lHP|@z)xTd1d##{#pYQy=w%h>tb&fX}3%y@Kq{=A)fjmAm>;l~lhK@{d1xpLL zr2_5X06j|AG8Qx!FF%`jTbh40$ZQpGR)tv&zBRo|(Ysng+44HRTnah@k_~ANC?10^ zT339I>WE59;N^Cq3QceTB5J3>xnhGv4`3U#AQ51gAB{-BGUn*N{9 z8yc+r(5~MgP7i?|vfBU(%Nc-wtcidVgi1GR!6bVwFRCf=V)DBY~)=3GYM4UG`w1% zZ~1>Mc1iXLLK*CF-97z5S_2L-XAl~J{bCxE2A;a9MbJFK7JA44j64`elWGW^cl5|G$4dUGvTd3mbYh%-cp{zt@8D|F~J< z)S~{T&+ux0cX|z*>R_FlXkh#B_sUaC;WBhXVl^`9fh+L8HZJ!sJyJJ6 z=KqKKOtroW@{?c?Ac5Z=(qC_3J^=52t1_&=F8{}}pElgUDo_yu=xyh%fHs5E+JX5m z%0D*ht$Ap~pBmLK5Rk{gUFgIW*zL;cu>HR?jm`J>&i}>)*Z1Gp3N~r?9s^~9e`lIJ z{cmpgYbF0hbN1m&A~q$Gg@81{gGJGcRLs*Ha3JB384!C?)1g?*@QM=Xh@*Icf44U!3V1%^djs4T%ks&!BhmwshZa~2VtNzf-DE$`uw{s zkf!8!ABKx6aP+|pctodat3skAN%C(9&h05Dy8oE;Z4Kz9DKo;}RWOH9 z4e<=-lqd=|fy67=b>FME8PR%(Mqv!17pM81<1+lg8fasGNydL*sDd7%gs>l&(HLb~ zbT2RFfto~wm>8V0Qw_}mha^Cf4Ne$-{agBLO+YDdb4ybv!y(s7cH#VdmP8$-p>&iN zi`D65nxLpn2W53h2j5Vf2mEtDh5*c$^9W;$h~14hrI33_E;#$ud4|$%VEuN1a#644 zkUNX5ri|Aqc@}<+ZT!`rkPc1+-U}${woRd{>dq+ z5Wz`y{CP9T4PclomP<|Xa95M2^&L~ZTSy7chIjQibK)7}Z z4BYwCjIZ3q0ZTg-i{AzazABZNtcBzUGaOV#AaDpr^53CwFX`2AH5h-0gu&p)Ns*MO zM$B*oV@Y?@oO~z8sEiyVK{{PArj;?+5Q;;j8_F6<|E+_7`Ld_q&z>DYwmeep#{EDPTbi9fL%{6%9G@?kLMv2p6X(~cakAO~xM?hiP z&)04ip|vmyvOi~98mOu}FrxJM>A><71F;_@bd>U{z#;4%N zZr^2!2j0(0k>u&S(-9VO9u`-ba4ieT6L2B&K?zTU+ZE$s#)NB0M z5}A(#NJvhkEt~OrynGJ6%44uJa-no+H0tKfFDSYK+4wB6Q}|A#b`zF6bniL3%Qb(t zDst!6suqt;N)!}1vfuFhu53t}Cy+qCBhBCYR$_R5v6>|g(9}87s&!K6l@3)Bk9%k= zU<=X61r*d$a8C-ai9DmWu$q}cScBBguvDI8)0THgh}aeRpJ@p!3+O?+huLXR(lNWV zM5tQDTiGKtpDV}tI-+<5c&%hUNm1FSm9hC$T9yDHQ@3EL&u!1uL$}r}Rf&qIs`S_n zGOyA`&Dmn<09FAlX6<3)dlR`Bj5X$v$;81#RYszbYhmNlNj?rx3*=IXwTVneb1+#c zr3ww`1_r&tdICjA_KC*!qJgq_gsp9?G(}b2nCc6o8%`_*5 zdoaWV^k6AX;dzX#U^^rE8Xh`@yo5^P8W#_7spjIe1XK>7{^sV~yi>(u#WFeva3LFT zHJ#MSDkK58e$vX2!0pe8mG~u(+1l<%g~mfa<<1g0xIRI*AH)bfxglPO83-^NI88Nfba2To0ZoX* z(Y@2ckBGn7+a@*=9Az!wH=vpzpoZDXsPOVEf{wuhC>Lr{Sv2hoi8TnI=Eg`XAJPzo z8%RxvDoSSDGG@#t*MO!ugQPQTu=22j5TrC_;=#p;CEDCh5}5hJHTOtwZ|q>&13vYG`pRltrQ4FYu8*UtC& z$1ur)h7$dKdjn2FdY1;?WQtR(Br4^ShOGdmRs`V@P6C81yf75#wbV$=^`-wNQ>t|D&5|uE+!0r(Ze8!1 zQM4+w6RE9q2S+k5SoCsfFQ=-HQWB2f*y{m^YDCw6kS)13nE@vSXCRik)x*Lc9L?4 zaoi~mtu3e_n@J&oua=@5vhj8#`hqKAyPOlSRRC@u@*R1XnLVWz{=gAjj!?!?I!>g+ z9VuK(7KZP{4R1@>%ZbEV$8&s#jPqgKAtw3`ce&=&@_W-%2DC>WI6j5xqr zhE#2Dp-DU)q9C#*PoX(l&mwQjC4)Lih;vP~V&z18@8|?p=HH<)orjH<|_~ zf4qM3m4$Q1jsk1Rrh<$7#DT*_-Y0z*3nt&>Uw4;P&#ud~P3+Zg&Ki8<$-bn4u(Ys< z;YGP?MncyX-8K4t=E5p>LQ%_T+sUK!h;3~jJ+R=x)|0+Mp++8PKHvJy=)9VRZ;Y5` zPSRs~Pv3!|wToJxop_+U=CUt+&+NAKO+`<+{3-c!*867$h_VLaA%|&Yl4)+|LxOw8mqLzt0Wkta~9iuo8 zP}t!&Grc!>L($r8hNf3D<)M}<-n7Xdv+35s{wGr>4-RB3YkhfWS=uXaAH6#A<~@^d zOg>f>yLQl&wEeD;2NxY38JZQ=dUfJK!FvJ((DEPcYq@^U$)kf~U(DM+|N8PTT3;T! znOXDk$Q$oXzA-YnBQ}4qG+}$>yMLW{WMSA>H`nw%wQAq_;qKWBhX;D|%|o+qLlho5QVtv3NUt_5+z8-)J80 zOCNgh`@X&b{)^VgcZjizJBljjhR=R;^0M##d9AfWX_liUzFghW!J!Y5CXXDo0z@^I z{M0nEX4T|3L;0btJ;M(cdQUuF`2E_EkLUG$H@V>C(TIuX?mxQ@PyRZqfb( z|8R>Y)vvhzk6XQBG0dOhNL?BYvUbhC?CV;0=r7RM$fxJIJTHk0LcgCY2aVs8QnutM zy2U&+-Qh(C!W`a^!RpN)nlsJttR0`X(luBzZ{>;ZwHqCvY3HblwSX?(g5!WpH3Ob? z%q+*E?;CFDx<8ydRiFe)t^{1F|Kn=|z*!wtQy+k7-CPy+`PjUa8o;!&{tq}BfMLDy z0EVqjSZRJ1iuAMo4+rsMXmII|e$j_bpx7RJ@;$w8UIz%;S;qAFfA8)ihwoSDWVJtw zI~h}NU@u^JJr|(vdvwS(5$LMa%FvvgjZ>b-Dl(#DV=x&d5TY5)>cW!2{Uj( zu3)$30%WFYQ%e7-d}9+`CK_c4sQ#kW_Bp^IC{2g7&$UMg+)SEvpudM1G}CPe5kt*l zSG>kDmvVp&9oKbmI8yZkssWzRc05h0tzXsS83^ta_2X<`5G!hefk&4IUJC8d;-fEHp5 zhq9MWsP&LrwKwv%aG>pLTSNt%lPJ;JSzyz0yFoEGH;xO;7K~dlO+FaBV299^Y`Mo; z=e%>qyMcG+HG_z3Kbu4Zdvq64lzeUhyP}yam%h;RWE*`jRztl2+0GZljpUn#z_#qI z1#&^)@*%IesQ?idUE#=L3C3v% z4YuHE6_QNhno>%`jm>##{ol9dTrp{5vP2W4 z){(Ys26J20=41~I?15mbSVW6hKygwYgC(;XX9sPQ&De$lbsDdoDH2Ny^FxLrbFyP_ z(%y#Bfo8k?Ip!^45C7_1b0yb|B`zYyYB9U7PKeVvA0v8?Q3rX8_N~2-6L*IA48XKY z$UAVt%UmIs3e@g7n zByzV4=@He(=Tv)`Y!(-1-c?9|MHDHWk#3uXm4I`ka29z<WFaaPXRu!E^mQOly*C!SUbQr!8#xD0P&7G;;fn6 zLXoS533gKpes*j(7=Mrn*-EDI+uBQN%`8(&S>Wa}f!?8Kr?m~&j>W8Sk#RqN{|FYqlmo;NLK?fElw{ZC@EJ$BH}sLj9WWMAmc>iP;qxN zhmsT#aa){J$aV(sj4D}Etcgub2q#xf3#bFfij2_U)6pR12dP{vhHwh98VqONsYV0q z1q=;1$UKY1Vz`Ek<09doQ=J8Bn@ALyNQJ9+*uWPP`{wVG0klyf(Hz>8-GEuPL};12 za8-ypS&|EwPZ-(^81#SyIys(ZaJU&X0l7>xrb*&lSUaBYEa2F7f+3wrJk3&=(X$Wi z3IA>4{|r!YFbYUW7Nz~OFu^5(iQP7T~4 zv{9xYXI_IC1#KjhP-tfYkSVvnaXAR%wXr<5E1aQ&5<%CehqPt^hc# z9MGpxPF|7*E@a_eek5mG-?4t1&?@#Xd#dl`$b&2T*#5`Hy$=rtB^AN9?cVOe+^wx8 zLn~K$PmE=(_wr-D2m3O|gAZk18D8;O?B22IyZ5~_vf#a=dwmbCsCi{*@8OkfzYY(3 z{>$|PIZyZP9b3L)AJ^M4Z2!pn&CtZ}SEhb?Wnlh{)@R=d>3(Nq?)<)zchY?uS5{N^ zADp#2Y;q`fPUgEe-#-&uzPWHrU_SJ``2H&&x6T}-U+eq(GZitDVx@A0BJ^C#|I zQM7tw#eA>mvk~5dLw{J|JwEc)dqq!;fB9l2JD6iAS~B!NsJC$h>i+rAcDwhyFLPby zy76rni!%G4eaL(M-KD+{=I;B`&>sxm+Tjn!C-;pndq4BxLD!+8d&V!sJn(qevlBlq zfA?e<=UcYkJ2tfK%c7M2`yTq}nZA;KJ+Y7++G>~-M^+YYw+=0f%1B7xU6ei^a!>l* zU6qsXKG%A3Q{kAo5TLO)4zynBo;h4~qwm#=uMIwEYwa0H+7!Eb(cm_|=;TP~0&lZ# z`gCaAZ4Y|CnS9~h%pXR!?=5;{Ffpm<>yd>spf$HH?>jlUGQ)eqw|;e|cXGw~qNn<= zel(delJa5etNmYGn7r9v_+8idp7slgCG9Om9W|mn>`D)&GZW-o)Yio*a=E9L}6|^Z6%lZd~}yDvmFo zG5Pvf;WqCZlcV#C9=V>Blo>hs@dqYWJ~5P(GI^yx z?Eac}`mwCmq5gR*_l*qmo4h9nOuE>IZ@SvN$42hHyQc4Ezpt-sI6B&UqUX`c(eJ#T zp`?>R>h${Fn$F~DI2T+2_n*r-918WXg2y9d)v)S<-*cQEDTR=rdH!HE(qX~YHXWi5X z5Q*x#e=2pW=<#_#BwCUX_Ty-y4z$1ha{%wcjb ziZdd-DE(%MBqsMV*|O>O`SBO&Y?GuSX@oA{gsYhdGd;IJa!@A0I-kvsr8IPVesUA- z)~oGxlsjBanqQvmeB+grNNAv$YUwR>PW1S ztDyKh5m_Jwn@YCzpy%9oC*@#Nh>AoX;g}s9z&`d*%QVaR^%Rm*&bjKO-0~JS3@FO7 z6B$Gb*RRGigaDLv?XoM6y?O{c7gC?CJi-N;v)EGgPCl3l+yW}EK_%)~oHMAENJ718 z@V^(vnYV}nu%1wSC?n;u+=gam<7zb`P?H^($OjVN}9%ZK98s{s=Uw zb!>>5|08FgLA9{uEm@HZOw%11vlyqNa5|G3TD+f4)1Y>9puGijz1!+sov|owF10>w zF=stzb#a0D_tXZR-oh3(T?5c1I z>WmeuFNw6;q-n>+q&uGuVqkEGaWkXzYMZJ`^@-hsDKQ3Pd5;9_IxJIs$9@V`vV_Pw z8K`pz#d#LJBQyL&8b3QN`IJ88n2=$%_pnVQyp;=CaZa`p%z>~#8D}Z>MPp^phO&iL zk8JH}EcMV0-Kn^Jl!-_$DPh1~NHV0C?ln0|1mRv`w%xXoN3S^Yg+)?zNVHrqQ>@`M z_m~VWvmCxe3GZNt6?b3xAZJ0Tclyal7@j}^ni*kCLzwzf)~@f1f0XtD4FV{nYajJ zVQD0%HK{@)qYS^DA&?D;sZw#gj6~-es63bGY!h8f0}-eL;k6mos0-pc48q^#8Y|Z+ zAl4%lno5imfz`x!PZGlL!K71!p*P#I6A#da`iXOlsh^3DJ)5O77Yd@~*a5t%yEbZ)wUwl^VM9`r4X?9pZ+ z4$D(yj@z*6zhY|~NP6q&5$QXs5M6ZL{oiWm@e5Z^&(vf(Nt#&~pjJd!8|Xi5$O3|dTPq+GFS zrr1m&pWwLQX=Eg%f>2>{o*V}OVIIkoouDmmzs;#RD2LM&$#*J-d*6f@Df~Lsz$*hC zj30Ce{GDJSsE{~^5vZ)SU@jmEi7eGBOtKm*4J~r5^*HoRD8kdAwxJ_5{<|u{<+m$f z0_0pfZ3p@&234T}WIlleI2b%Y1-}VkzOeGao-T_E_BDipDt8y0uh`pUha2!I5IL+Xk*Vy=4mcpVf@G*Ef>@XuiI!$6JHvnjq6nc;S_om$T}GOf zo#Y@YmbQteW(U;hzP;00VHc3&zSr7)=y^ZS=l#6ejsf%A!|XD1UEkBy#dV2>b=C2) zu`-wYxBFsf@g+sRD75o|1}%TBB;L#^(Re!wp<+s+pgza#=IuY4|KeEn=YF@F5< z?Rd+<{w}xcMfb7`-s`>Ve=5jv2kd<+zhL8F+Pl%=w*tqG2R(i&yQ2&B6x9{Dh6WSt ztoP-|4@oUw^kQaL?xj@Ew$~F{+%s#6R*f_^CbW3Rk3+#tUiZG}&Wi+VXy`BAk)c!X z!BXjlYxUTxUD1bzs{354y?>qIzCiXb*kpg$?Z2csv^Q9&9Oz%T!nNPCW?9R@-n~Z( z>fLdVLoNT<=Au0VYZg8{XL9O1(it)4-ZjgRP;%As!B1xk6Aq3Q1~i9zFU2Le`@f$J zPu@SQps>HLBD>MO;DyRnFKqOz+_^TVZqv}i{sq4cEu7W8+8bm`U`8^QB&@%f-4_~H z&@#4urhV1WM~(Iw-p@WN@Q!TEuiQMcF%o9fJ-5cWdE|0w!S5rN%A=q5zFyrNKGgMU z^lI<%8&NV2!xUav>aBM#ToQe_H#xcGq5j+g=j-FkM!e0v=C}gVy>Pufp#Q~X&@-$b zccFc&(q3*a`n$I@#P#CXs^7eaUOYK;^+L;sW1qdA;2nJZ;zrc6! zqo;UV23;<9&f5j9k%w10PxY-l1joJd?{M6|{MF?exzyDhK6Z5&{;y%dic9Ofn;)wT zbx&H*GQHQ3T-npVeojlr__@vA-$vs6qgS~73tf*5Zh5@rv?r&iXir}x|M;okzQH9^ zT!mwwCRQ?I`sAG#nrHQ2t%gIt`2*Lg!S%-rRt$agX2GVBpq0)UV}%Y!oim6=sE71y#;fJ8;?Z42(Q4q{l@R! zZEGRXb#0{mckd;q7Y==U^V1`jt~S37AE4&dBLlbUewq0HL1#eA@$8@2jC&0SM9!SK z8GjklJYRw|Pv1?v`^RqXd!)x(3yfO~ZP)*f8W$RY&yfGkX8<>XuFKgkK72Y5<`-<4 zA>Zpc@>eAH&q&#zwj@v*5>0>6K3pmpUbcWnlG6N3TuRdbJw}EsSASSv- zXPm6efUwOOt{&nxD@bSj#|kXl0h6!YZLnE?{qFUk;L<-fz)Wm^=4^`|x`$>c zIbgH*whP^x?~LEW*x}|QGs5lf`bH%9ZoRB84s^lIQ@~{~z-2(cVc2{7790H{6!EIa z1#%eOAtfm=!A!kuh4Cm8k44drYIzETD68fGnthGY!}9lDvpMCEZ8)(B@~P?Pdjtt>r}_AB zPIDn$qLQm+G)x%)Opd>$bVzBjrA(p3+_#&0D0Qbu;3XRb64Ms0Ew?_{hz1G!)A@)h zDfK+tgjYRjNkO*r`gI`O!1;W#Vgq{qg$KiHEX&E4RC58ODc5T#jMYPmASEWZGo|8n zTB5VW_P`s0NGT13BZzND_1ZIe7$U49DXmq6Txd|-C95up9VE{Q-w26*KsAt9#mTon z&_q@PhZ87D=Sc?35nAh)3q}gU038yXgVR{q5O^Lgt;J#5-Sk{B^%&Wf`%)Xp8qKM@ zVv{$e=VM>`L?==}9xbD#km!JiRFiwVa0vY`J4N})*h1-=qDmTlJ?=pM85Ias=5hxx z32LZvIv12Hd6Eupge^(S?Vwu)f~D9L_TA#vNWs(vFN%dqo{W=nk%nlF)VygS-=NhZ zQ!a}U8por;jo7-k5?<01je)J9UOIc#D)HMWg+OQ*sVT&bc0TG|ZzMFiEyopmc z@T_)*VJF$XI$xD|7`sTA^LCLoangqKpb4zLlP-swSxbj$5JU3@~Y+uXjJl6q0+Mr6k35EV<*U|?O6`hWb_($Qn0CKHs*xq zl+NZSXN863a49Eb+jTCN-6_~EWts8RKAd}cJ>Hof#Bp(Z`6zmO4Ylez*PfS39v1p! zHgOXT`5}0YXs7U_bd?bK94J!0j!3QMB5EnVBkU&ep)ey;%!T>6yfZ@ih>y)$E{9#b zY54&)a}Engcf}QSJZMDuNqM4>xtu+~GSI1P5NHs@*|LFVxaH$WAHg$l+ zB2CGl2cf$>)1#Mj*GP~w&X7U#7cM@?SR*J*GcP=b3Zmr@JUyH?r&bGP_Z?fgokPtO z^AeXsn+nY={ve?k+8JpoL>Q`*Gi2%6OkO~Z49JGy!*-kV%>Eof!-y(90kfzrgoDwP zhU8cr>S~ifc4DOsxJ{`M!{HTF;IgdUodbyr5~nW|b3-T5->|%e1*vHiiw9b;D8Q)i zw__Tcm@9`cn%1}KbyXA^5{jm?G*hZ&XuL!fg(3JgOi*FQaQ+GeNE#^R1_S*kza21n zqJ+%A5Fn4aU*%k~m2%u4z(s0e7?YskOSK3Q9IpaRCS_FlsiRRN#4Ab>@iO_a!c4}j zH6)?eR>g=hB^Vk?svnY;`-j)k0Q$(wX`M4o0T&TN$3UP34ATp(uTJ5#QWB+_&(it_;y^`4PQvCXy8C60wTkMw zB1@y#vt*4hpFJ2$Qjr>jOTIDuU+7NET8cAj3fGx=4m$wok$j4iDB=F)6if$|gjI^D zjp0CdnwSGbPg|Ju?A!NaH1HpkChWgbunrP2sQn=rnwif<`Jea;2W*T^0(~|7rvZ)y zzEVSj!GMC(0j(c=#X`pl9Sb6mNGpL99DyIR>MS1>qRL&aKtluSPOBPrK;X0me=wlK zc*M$UtRw;Zf|OR{=sdk5FjpqAfRiX`pw8#C#W9X=*%K=)QN<-9NmWafEmM|LI?+&> zODbd=a%33LnE!G~ZZL;M&RmsvMA2*yMUXKk?Z= zja9@2uJiZgJpJSBx|#ul;`JWQA6>cT+tG8~?>GxGy(h=JPYhkX(p)w4-D2;Fk*il+ zXL^UebFLckt0_qC?e{vj{B4id+1Y%kKmX*swLexke;FJ8&h@SL%+uX%LthHbRlSQA zx6Bz_nB}VRY}$H`T2i%I3HFYiz2$t(+kK_E`8j4xSoNbA>>9hpM~7Z$96$ck_KN2E z-mJS&R9<}h=dP}SrPN;C$+{VR~r$2sdFnd+=z;lbfG~3ID z8!py;G2S`s-0AK9@vY01?W1$Uv*X8x&qY58Z+yk4uAM(L^#)~Cx<1+Kb?v9UgP!cQ z-UWU9;+79Riv{mblQuohX zC@L8J`mD(3tn9me)N&Uv$6gnPh0$)4zB@@ZSg1o^c-BSa5sAi2P>JA+PgnopW0BtOL*5rgy_KV1wYWYR zO(t5z{uh@>gXnbay?!W~}~l<)QJF8wyr< zl&j5UaPSRTmA?%gxoH38zyIh)j2442?p_4uKPd|zuOS8h9=QHr4TMi!^{;-U?cX$s zZ??eo*Z=>pA84VkvDq&^Wb16URd@KbRkC@ioPcha;nA~i*%Hu?g8Bk-n#0{CK!3P> z90+Kuf{(gobMQw#ZPlOnj|G45ADEB-z^?yRUx1F61CcQZ^VfVEUo#Ss&8)vZ{wMwe zc$0*G@+KJTTL<$W3eZcl?{OdZNDyd!8i6)>{BObVXruN1!Kdz;<%ds4bE9V7M}Bx1 zc}mV1AWecVYPQR)12j||$8)?d{vWVMu@e{$3`#>_IDi{rl^pRN`vK6316O8(f(lih z69A=!ACi!82K)z<)e0n^;Yz$=7f6l~x!gyaT&sPw!tYH>3`S#-xiGghoU1Y4DP>aA zQ}mdbkprjzIZPd z!wYf3C;zpeXLyWO1?3UD4&ysM_sJ6iDVC5q3r(DvfifLXg>pABxDq+m)q`%HF>xKC zjF6O%p%fM+I;NpWu^>(edjR|-xgyITDB&w}v8d$9b1t05(fMHBz+?Do%#lxEyC7Yh z)i_vHgus$D3?2m+9fdLizr`v$LziO?>^h+~R(IgCl58e*Ir$V4h_zX`$)pLZrvasl zp_^~2OtI*0?0pvSO)!`k^AwCutfx%kQBp5}EZZjGA}UkRNj;0JOtRF@Dg+0icbaO- zM2VCJgbC_mSy3Ynx$X4&IU4=VHsp9$%`DJYSL*SGwbX1F|}~jHnS9B0wp=} zR~7`{D57gizs8wSBarlmNr~oSp(vyTc=1Up;B_d~H43JwB6^8d=L%3OA(Kz7I5!1J zqXB1B2^D4x*^RYI*a5r^smS2~!34}xtJ7fIb_PSlAg+~3y&-Dk*3@fNP?nTvitG99 z`4~G7W3yNx4fuq!s_w=#(L$Q9fiQV{PBi4hM-!J*M1u#a>h|~m;h_r*_ewq%c5^|G zkXN`-xeK^jFOJf1?l!j))%7O9q4T$c+|oVCm0ckYmw zrPIoRYMR$oDXjzx)hVIlwPd;Khxng$8PI@6gIcbwY!ju12>YytQs_C033X^@V5q=G zWb*T9Q4Gyx*5r!cNGOQslp=2E z`AhsYsSV~Mtj1tSH)+Pr)zl<_^uhFse+1XfVDvxS)55BEB3BSmZWIHC{L>Qx94x{x- z&Vy%8TU9L~*C?4*CFeFl=+yrLc0^Ssv|KulcXpsCCQ);sZD4{zK)%N zA|ev1(fu_(IfG#QI6{*o5Zo1P=1ZokkPwxhti~cGHH}OTw?gdxaxoM=f~yez8k`ob z{1LGO;!>XwDIHi{!wFesyswO-WUP@z)0kGlZ=yA_5W_L8u8F+!(kFB=999RbePRDp_@|-lz_5Ba7)AA(*^K z()q=xwUFdzQlS%br=q%c(t1STq%P(fW*R6nNp z^QoVUIh^0kwoERJHWMWprmd*io>RPZ+UW&vq1(mCUJLC-H~Wv)M?3Q`ByRTi{PJY? z?aPmShTY9xYCrYEw_W_*%9o>y@A}Vz`f=;UcRHH)^ta_^+dfMfPfE@19^4-n9KIwe zIAO4J^|Iau;EtTQ&rCtK`#-z z8V%k!NIYuy`#7L?^Rlopc4am``qkxVrzayS?T9Pl*cA_#5>59ZB!9 z@5AV(cjF!d2~n)k1Pc5_mb{PLT@mN^@cXPkqyzHj;`K^Whv@j*FZd?C`SE4Tr)okA8 z8TmG0^4P^MfA@_1Hi$=G@UVs;DvgM?^)H%auOG~e_oB}g{vzGpGw|DmVCR;?UmFMI zzunpi6Qma|j()N)C^tGi)%~bnb6a0ReA=WIbls%hNt2`Ex;KxMAK!S|{ZTyGvqSHf1 z%=V{;FZ4Z{RM+y$`0dL@!Jbvgm3uv&qTukMguN{bZapWWH^)Ng0an|^)3(el1OM{Oy zbr}PB$yZ_Wk(Txt8bq3+;7{7iN9T`*c&J8!vPwx)UC69=v{` zKb`632J+K_zxH;HbSDkWNUEGVwD(G7WB+2V`KexWwmo^mLko->W^}MHWBGY7TR=bX z?Z4(Gzl-)>hhby?3ybley&z&AEE$3KI)XnNH)h}KKww<+zw8}g$@mu^B0~iKAF8Qe zr!8!6PKUN(60{A?zP2GK#}y8aj6byv@4Dp~!S7xFbzROsfWjz?1`4Ar`oi5AzK-FK zfP82hfWjybasI#Bh9+Oz5CpO*Sf}`?4+Vnt|FjO;1{bsq?uzy2%ztVdW1J3ipEZ9V&v0xAkz0FKN~%l~Q5%zK@n`ka9C0cK^GEvwKU~TK`7uEPFzk-@x+z z8A53_p^Lz7(%2^QO`@WjEiKP$SVBZ8bd-Wkk-mvAoF|TP)l5tzcS6V|DhhG#!LVnD zC}R@QMwy?@=P52WDCJ0M292MixF9oIq1uTDU@dx$p9UjMXq$xOnA#*T6;dX=iatP~ zoS+1-x(3Ce(gXT;1=E-)x!dYE?J0+qRu;@e0eyi-VKETUe6CRIsR zS$q+GK1A-xtQA<`z#mHsLm@m_$kiwjJL zYwEfB6&1CZ^6DP3qOr=DCxvCOrS0^a4<+5_Pj-;I^QUlSwQR*PUgH}K(hfm zkPZz_>B=U;%d~1+Ppv=W(}bfU52LMd76zVDF$xz(p|!Ew!7T_MCS263=J}$?5n;|0 zy(-eoV5SZlx(7e40T(nOD)QN;H%X+;p#>%)N#lC+K^u3B%E9O$Ca^xVdMd*wb9@s? zpb_XXPz*4OQZ_KTa(G*Q{5XLqtdt{4@lpB+ zr#45hH?iCrWnl-K^fr|dMbZ^VDYAyR7IwZb;bA|ONmT7bnNkvklwm-DQy5N*Qf#1t zX|7?aGPQ!3IF-rFI;aSh2yDvzVOj=Ru1D}EHI8=D0kQIq4L2XGELQK<`@;wZIbEJj z?S`qa#n&Y@XjGWI?KbI#C}%QBer1%yK;}% zE(Qt9=txQxUX9mN`;wC;Qv0}hcv-GYKiN*0zAbH^zFzGB5qS`a)FKC}5e0W>7%mGH zbSgiTz|TXg*@Wq}xalHFwPU+k*{Iia@slJOiYTipf)*RNNVYS#^-7ybgBATU0ja_K zRiaKLG*DrMXb(V(M}oT-@l$dIgBof%tCj-gTdb1bwj07O)EVGsx=;3XiYcg8oH@e= z#bYtsMB=+egP>6`(V2CkNEPLR%*1v7R?z_@0r?&5&z&JWxBIL;1r15+GvpF8qUOHvMNjsf+8)ZQ$dS@qH}P;U3Ng_vN4RpK?(2x6i&$Z}dy;HS!+ z#61qR$ZbRBfk&3EK(=M`|3k5~Vm8x*_~REQ}>&w&UfQv{Z4l z-Xp`&&y#p7nMusYbVTW^c-A+xHm~)|RL{Om@7t(|VvV;m1MFfxA`+^tRFZXT>h_3IQl(Fm)*I@5V zV>jn9zvx=wei+QPeH)9qPYfn(tMu=iW_aay$s@eo{Kn9vzJzxMpJ{d#U9W;=(FaF{ zr_GLUp~gRWafg%;KBceg#X4#H)6LGy?u6M;L4~gAzSNfxyrZ|^*5Kw(y{_}0-rcvj z`NI)!kgM1Ig{Qz>^sXl$&TeyW+}8ZT;G>IO{jjdGdLS~jQXW1YM0NwCei|dzO?^gSY!J`QxrL{WG_@eja{r_KGoK@oKU1SNA16J1Vtr*~8i2 z_6IL4_^@}eKKSLq;BC%t*QfTIKl8dqKKiKO>EVGEXZMJ=XkTu^2V;xL;L?j_wZ&2}=-&Kj^T+)`MJ~5@ zbGY-=MP+>UPtKDgGVtcE^DUzAr4!b-}%5o40s?Ec|%SGdZsbb)OC{*%$q=d$`&4x51asgJB^< z-}2Vr2fcMI!?}gcJHEuGOxdMxeyQ)~NXv=AS=+pq`||R-y9TCibM5I}7w2jo*<1uD zf6AohFNTJ_uHOD_U)VQ#kH4GdUtj}gi1!Wmij0wgqGdg@8 zho9Sg1B4$wx62GPzzjC{5cyBV(fSI2#P99(j%fU&T7Nk0Pu2SC=)dkNWy_4ljyLLi ze!h;!zxu?enXSz5VD~mT=W+mdCkEsNWy5gujrW!NPD14y{LDJ`?sb3gG_RK*-Wj}b zv>NvRV*@&+>ji-q?=6A}TL0^!Liyp6XF9;#z;q-8`ZgdpDngGc10@S~{7G*VxsLq@ zJkZT&e0n382CO^-gMfYT{wSCnuAdqAZ%g3jV6}Lw*=JKo1+>^_gx=0!m7LmFeq&-} z8?|L-#}`Q#5p5n9&9z@?r_yqU{(`eR|5fQ}$o9TLl|sA7CZ2N)Z< z6W06sfU~o{^t%`j^ABru6qnB-#Z2tf7(qwG3TTy8By7qiOo4Gf0AQP$^b(bb@`_R9 z1y(K9L#^T0@GNxK^cnLPXAeaCanbqBu9$RY+A;Xv=FrT_C7xba{gAIzekWoZl_VY4s&ND3gztt-=`N1ib_1H|N9f1(OUts1LP!+`fwHXDtaGD*ejAl4;G(6kaH zmnx%DJB%5Fc0xiQfPz@4NM=+92p?NxZqGygx&rBR3_Ejz2$UnvV72quIb~(*8q>3o z`9eiJqktTwxTb9~$(FE$CK1me5;gPkWK?(NY~~wgyiyCPYMm52`C}8HV6CK8MX>1mB&)J&{Xi4o3*~}{Ey<*j5QQfkP-H=b7;aLV zNM3~?Suhz!dxsqRVCMr^sv1DXA3B&Rm`N>u6LAd1K!nUH)4X)CCxRA*3#USsH>B?sSosgJg`Gimy$MgIAFqOhs#{&g65#W_)& zVF~ZxCgo1%_^|k#s0`yuavqZwl8hftQ75ZIXs%(#2`H+MfD^)#_sC4qH~*$%(K2RX z3QwIU{gnoC4qe=yD%b+9R9px1{ccPq!)6GCl~lzLjYgG70d!f>LHb`Lc!iTiOes+r z)wT?%iEJDRFGE3q5t@;i#T_Uqskb=-vZXtjY z=V1qEF|bAmN3*#3)w!nO6r=7aUnsrJu&3`06?Bfgs#F^4*^LxHkZ7cWnNm^c&UdLa&pz?rIW#EQaPQxu68nf)4s zfss(Hakl>pbeV(ISmPB#E@_Cv=QBzuTg#^@tT~)h#VEzGxYexi4I%fLI>l5@TZ~EN zSglfH65B~+H$5Ms*x1IEFdDP6iS=XZIj#)fq-Ys# zS0}fllaut8t42)(PqyVC#A*R8XJJ@Usdg7}0MNNWtx?;FD@IwUA&hSlByvq5Zzw8R zrolf&cT_w4wD2LoOe~WjE|)k_Fk3})x5z$S8XYzz!i<787u#R|3P zpUId|A=W4&h##%i7ba@2!9Qpd36u*7tR62BfoeDt+SIw%$4P^7Rf{6`|Rk&p0%qAcH|cP1&zJavJ)3hb*a~Z0DeOH}Qbqhz1$j zJcpVKf%@E_Mat9;jqg;$aqteOG{FmT)G$S#{U1iBNdddLthT~m2dqPQs$HkfK+MPi z&iWE`284`o3T4v7$Z(Q^hmhbq5=RiJM5VIG&!D0kYnqdQ4y3cL!Yy<%Fiegn0M)S4bL6UC@9aTgf8-e7je3o?`8moM6q zRG5+yAG@Pi!~}MSxRdtY{tL|eOHuK9&Ai%e6=4c-6kL73#@0aWUTcz({%b~ng6eN8 zWIWsObUbf8VrdkCOU~ax2C*>sOF%0Hi*SlgW%Kt?N%^=zYl~2W*{!r%5X3S|XG+Lf zqM@Dmnj5Cd#@Ul^?)~Z9<&ftuKG!l3dNwUD7{B`}mi@hF&!|1q zy%7umy;a{`9T}VMWPdIjC5P-npP%L0_HSPqKsU|F>|StPs#!5l+z}YOuSa>$QXE%X zsl02kC-v=LV*9aufDCk+3zr?qxL9>Qt8i2A#iRnaXT|4fr3Fv-#Z7BD`&90?=KjdY<(QkWw?VC>tc71R1#igG{ zU+MedQo)H0p<@Bzb#Y^Fq}nfh+cB~;&Nb`s5^v2b!E=Y6nErj*?Bu$R-kL^R4|aIb zsYin7?#%w_Lf9Fm&VQ_4m@NbyD>q+R+#|lwdYP4_?Xf-WpHZ*F3BD zO0xIXXx@j;%#j^4id=W&KC*M~%yeeoUHyG_``|;aryc`uG#}+mWd)xfOn%w>aGv+uzBMbmt3BlEmX49zq0a2yvp*Fa9{ZlCoIJEB)BgR~(ognzcD-xo z4&&{ylR|bZ3_jrreZslt$f|*GA-H-V`Ph!x#VuEU6Tj$;y;6B@%<^Ni_W@A!JP+9X z8(?WZk#pik{Km9Du=zhw_dmrYK}+yQ5E3|*|L0Es=?F$=gx<3kKud7)`oH%|zt=ZB zq6d5QADW&NK<86t8d7El&AUDAWLonAPkbVX{(YMPV~z_Q*uTyh|DocR7wqum7q$5| z*NNcY*X8)U0#NZ+B$V7;cg`1=bT2arHsi+Y0MOUMx{qPqdfz&?Z=L%;>q;U0DB^BJS@9q+XH5c=cB z<3Z!;Gijuif~s5xc}YKjmCS^xeV%0q`$HmOkQj(L3)!=*h_LsZ1u9mjiPZOS52UJm zXueOK@uvY}w`abil-Bz14s0dlGcO(6JKj zwQ7-7fLGvleezNgTg}f0Ou0~Gj))xH$x7gWfNTw8C#$Q_8U@kTrZ7@iM_YM2izKQ9 zoIN9hGeD_9cZ8={It zVo)j&Bj$I@HF_SknzTOIGk1q`D$kk{og5n|DdHhH+put3iVq3GTa!f!26DzU22|P92VyDzPS7;p z+4SDCbSz4lE9!Gn#f(lprB2Pl#I@)hir{UzScxk40A{#Y#;{U5gad~i#~16E+#aD1q?=!HDHmO!-Zos!<3&Q9T!{s1S?We*d5iMKEGM;UF;xhQ`mRcG1={ zwE*|~Dhf)E7y?%E=3+I&`2cuG)dq#QUX3|KwMku3$kJ+mnFPiK$yQPeBVuWh#vtD? z(-?tu(yIxSESsiBDmhGpPNCTCPgdvMM%_SJ~95oC*c4 zgv>6-Sed9Q*YoMP%=q&f8Jx>_s@jA-CKDzUKQE)Tmaq;Q-zi%8D})-dNkgy+{!A5f zC-jL{nyH{=nx-@yvYTZqXfY13>>$BP*9b`>t(ixPZ~_t%S#1;#*+cv*8h=fog?+`s znq-F7DwDI=&Q>-_jAP3+CJ(4zc6FwZH!n`xz=Hvwju(&sMTntWMH2xjs=5bK`ID?w zh0?ji9`KOp9T>!lQU9uH5g?+*!IfCXvOSoM6(RKur)R z7^(=CMf5mrPS%mQ%8%8^V5doh{`gs*P=Pd1FV~V{sv@Zn9nGk*XW^(Um;JTe*;%hy z3AIck@VMCfS&Z6*tLBx&05FTdTcn2X>S&a#AsJ58YhcWx3PMo9<&3kDnIbWdG|3{7 zPAH=CSuunKSXCvV++juwL2f7?sDU%jZm99ADG9UkG6ck0I|PTwqdk~LhpTj10#6{P z1U@}Wm`@~Yij_=7GKCPD*ZodRgnIj4g|3tHdH6W^T6%{JrvgNu#{+5tKUO(3kWhe_ z;C^MLLeL-%++z=Dh2D>k#g_X(0Kv*AB0Oh==Manoh2;G}D6%FM=x%CAghM39{U(4{ zShyF7WB6kimU578O?Q#^;}9oH*)(PG7t7!yh@U4SE)tSxQ{+y;NMiVeFv23(G84HH z4P-#@shZa0MDZ~hS{ua%gMYL5fDZmFoYHxP5z924Y)k&cd6dYJSO`s8@A^0oZ)7-5CMMXYG6mrF8*z_l1#te*4r9b&Qb zt=?_^(?<*$2}k=j`)60*WrWHTA2XkR_yIlKyLE>y zx90ejxzpzc>@t=2ZAKAL<$JEMF z>9B?KtXh@aYb3f~9wgEt`r?`HOM~%iqgF;SbIsi)z3Dl3n3)G)`@s)~v;HpLT>Qazho4XGTQaMzzdv}v zQ;p!B<(_Vd{d-5>xw7t;Mt*BLe$<}Qw;{ee;MVEE@RivoyxYR-PF=h*F!PD-*W6?K z>%R4VK6JTapI`7EZ~O~&&h=}*t0-K1n_W+P5}6AF=}Rlm56=8?BoxfO%-YHeAFu7p zp}~kS^M&vI^d5Fq^sTugM{AbMx-hWl$JfW~-+!3hw<`6u-)4_y z`w!p6E7Jy#-JQE<$K=Y2fnz@`OIUw;w(A%7rX>laCuP#Zq0OFteO_h9-P>8t6Mc)l4u>Z=V{j83s7q%(;ae*A3~l|q?i@G*DyuwaYA3x`*F6|NR(HBDHMv{r z;_E|LXM11bW0mLo4PtXP-a@6!ZVAoB>V0i2u6`|DS03e{}W#*=cXZuJzyl$K(qNnR|OVm51i0 zZ21&0_qTg~UX@vVne$9btmHsi@7v^@83@SvDnC2^LvZ;n_{wL!O=Rqm>k@whC>(BW zqlI$9$(svDF`vg51CQ@0b{!yh^r8`P`ZKTwoWX`{A5Q;xhYzP81)RRahtr<~oZgV= zGY0#>`g=G%>Z!=F|M5uwT4jJ$zx!4N!78ZPzrA^C)X?E`_yX$w&h<0LgGS5tKdUGz zsI+qt83`yg0yX_tb-CnI#)CpsVHK>01OFoY3?wpI6RI4;ZotLUp?2u=IN8cjAlC_E zMF+$QgXgGk&aaGGFoEzeUt zLM1{`k5}^vv4J>joc0Y?Cy|7{?5by#?Egma!ad3HKR1nxQ zUwm360>{m2Sq5={p9w*&44n5s6rG=o35$qcbhj5s)Dv3s|z=A_riaRy{R(_3#iJQxgdRpmv4pz!aIFCKqN{Ri+%gm1Xv|+q5wriTl6pihSjF=;t&)LMI$r`vGQ^i_BDfiR5zSmBP$U@M_4AC?J z=xC%Eo(*Tz;BWzilp`b%1OU1R9C_OjqecO}3yzSJee#23LSbq;96W&O1#djqDx_v$ zt-STWf>;?aS%t=+GYOG4(ENjEHK7xK@Fn|z2p^q@T$4L!q(TGZ*KtBq(!rRyIjb;) zMdVbqn02S)B5ftz1Y6w37=c1pFSmiS9u;HRT*u)JM5jQR#EFJ>A?pCcQ?IDSdh!eyR&(lhX)Du!G5ds~3_>n_?TA|(_@WO|nEf6q2 z6-Yz`K295<0UeY(9O*SK+&pNtf4U*ac&WDuPrlbxr z<%DFqF7?=yqxgdkye8%Srd+xhrNZ&{u=O>N`XsSC_}#JdBRPbhPs~A0_+C<+$1-O( zFq#8AeD*0VR$HpUlkb}>V1eo#yeUW0$Kznr%w@}Qu-6;Z_9{hHtU*)c22^Qa=QHIN zb9V9sM>P&s7{mw~3r=*jB_oN98i6+yNzz)OuR{>)L>^%lYVOHPY}0HGZDbC7vU!~< zNsV!$(K2m5mUxPgYfNYs$;D|BS>YJU&WX*hP*+iiP2Awxga%2$ z!nCr!o}S0Bdy`d6BB?R~#IG^68&UZ{qkbZ|6VqkIz_2QRNQKduBou&NO4QowMFrFK zwLfR_SNUoDwd-X})v5>%REvutFlnGo2~gdH6(too-4T=OMTSY#;s%<1l1JJrR1!hyG^vn!1ZN&!39YB0 zIOYH%*EO*^2A)MqlSKh~Bt=m)h-0D&SR;w!pw!la8&Y_VyShhTAPEBt|Om5#u>tT}lbi5dZujUh)#Khl%%< zos%O-TaPRpt5OGuEUC}mug@fy>M~8-I*9h(lTHBLOC>2lTawINo4E9Z|W zY@w2*{(M?uJj*W6nE4n{$z3E^&2m}N$C4HKatv#r8p+bPS?pvES7uR)6_U_${3L8L z9{95ycsQAOgs(ElPsj#gXDY2O-9bjYNlYSAQBhSU%17}gF+3iJkNI-0<-;Rf_%w9PB?o9iM z@#$w%UhJ7p)Kz)d!*lFTw(scKit$EEHs`i9+LsMZ{UN(^V9UYoug;$vh)#884mZy1 zo;z@`!``ue%gVA!Vw8<{UhX>X%_UG5*=8-tN+EB6hI&x1_+d7ykI08XT*7*>T~^K|K7VY zs$j}UL!&*v*ZZ5j{ez>!|LC`$_k>2;yZV0X&t5R_;hOB)-ll`6{g&k{4Xj%{e6FNB zd%$l|-6?ltBP9PEJ=lF}uw=h8qi?jw+2)xVdHTFP$@|5cY}6B_h8yLgwIjbYc6WQ5 z{sBPnd@)+LcckER*Dd!K?-kfa z!fK-5b&nqM{%s`UMF@CZmI_B-xam6eL;288&)Z!C5Xvu)T}`PxH1PSG1^y4aXIU;M zb`K2tFRBamJ^#VMxB~Af_uA(`0RQHZ=#*i3uWRn`Z~gXtzjqZa9b20RaQneg`ziMt zIPP^$uiv7VELoMO2k%KJ7 zGkwm|Zs)k)`MQeO^L5VgSwoelMnJs(Yv0k23b^n6hdzyVb&t#(ZuxTH3EvY>6)H~+ zrq(v!^mv|hx<2(E`*LyRA=@gM&W6#bEV zlLCB2_q?{Z;P%Ep@Y%1=%W3=ipZTEyp0>qcj1Bph4*uWqJ7I?>1Iq1TeCW7ubICXm z#O~~cOq^r?%EY-BjHCGKV+A0*$TWCE_h=5_jk-3M>)1g%~HBT>*(9hKbP_lgVU8 zAZUnVBr(P~*_kLx631~QKywihzNbxg|NH;G--n^%53A_zx}N7e=Q#(c@dpd~RQSXp zao_VlGwOQ>{Sul7i~gPGhv&F%RI%*l=i{{fjOzv!i)umE#_&$sJTJhB|r z{5CqZ(3kc;;K+&Kv*7?C;I5yR9158M3?=&iLE|-0!kh)*4l0^5nEve%0*(97PcyXF zF3$NxD>XCIYnQ$LBW$9FDs^<_%^;X%becKizA#}AwEe()&U=F8j18O?kvctEG-~v0 zP`Ch9)=O{EWE|Jdzshw~ToYIG@LY_$DA(%1yhk?Ev&3f{1=nFrtBihJh^CERH=~4n zywXWSQyn%L_S(Os` zFzl44EGuOMIva>ZPJWG)WXrnoNfJT0oMSEQJ1tj2W;L<3qD2Z4t%*>zn^=E{IQ z7uES_uJk#hi7}V?m7w&2IXTr;?~I||(XKN{eqJ@|mE6o=HPDUq%}rX8Ca4XV_*^pP zVuKdxVU^&w&rf%BX`0pcn!v7t!6szlF9~j~)uxyGRzGVp+7oGnORCg&MeD#6JNl z0EI!FD)`tZ2~oxZJXgA=2d>n-te~E1QK)4wHM$Z6!kI{J2-+-B@h%0@BXdx=2Ra8j z1yx5U=$j(h(c1&wseAzR78*s~zL1r?nk04!2{P!4&bZq(aM+8LdO4KD5<-y5_ps`9 z&DE=^pB9D$>c)VBLX1YOatpE4Z1Ehwu8xRxSMXkLrWV0;T)v@EL?{I#1}K3okcxr~ zc4OgwCyYg?lpLL>0P)!bBHpJYEt=b|8Rv=b=#*58WCR`+usVWyVx!8J8&%6jBvlS@ zL0*;SSYvD>BHEKA9*Vb<0$ED!(SjXVgV2H&Ir0qX_xVasWGLd9n;5m^;CR-{X-#Db z9tAy2TAJB_bF}O|U@l^G8La7rUoYy<*eZaTs-2z@jCo?VL<4#?&0})YTpDc*r(oXB zT!4j2(2N^R0xwQwz@c49m-aG>A(X0OG1pEs19*<3l%=7T{$4i`?P;VJ8=@&tZAmI{ z=6)#@mZ3K!fjEJny@`PBGy@?yjZQ$$_9j7Nz3qjjEAmWOw?R}|7k;0BUSU3CO!P&j zP)#*R_9)O)(RQYh6ZX^XHM)IE2BldH`?&@>Z?mXthEQB4f);}Wn-U`C|7!7YZgz5|w3bEZNnOQh~1l)dzoC3uz3cM5p*OeKPCyWyDq%0@qIS(Rm$E4-Y z%_2JJ>f4lV(8K_ks+Zpo<2A1bdjUI&)n<|l0N~A;L^!iZnb+i+j9T+b$&xJ#Kwew; zvjS&7$hXUz1@$Yl42pV*Yt|r7@Cq>C90dggaSd+wu!n14ubQBdL3l}60Ao*CNG~9I z*pcuF0JIZ)brR{{fFKGm;Z4+`XUIWuPyjfef~gOn&M7Yi!!QO`g_S_P2!~L&z$VQ2 z{C#ZMk}_q!RC&FgWD+!QokUBqH`VP5o1^Hnq-xx(+CUrhDPw+bSLU z!O)XWr9^$F`F>N<_uk}h%@9iUDx^#W__o}?y8ra05w^BEbI6^swCHK2`hw4$nbJH^ zet0tS-&}*Ark(TIY**RuJAGT8&O~8}sXp8GtCt2IUm#!oqNjXx?YvCs>epL5<9Un0 zTYquh%ROcNbapqs95VKOWmezh$piUmkgb*VkICCr5&zL2 z+=m|j`b^fP!N8*GoW$px_X9nj1+H*po$b%toh6Qhi@)v93yE+5?0QoxzHoOOy#DW= zY%X?9jvvYT=q|my`>7XKjCZvW^sJ-jgk zrU$m~{#$CdV`%a2t6#k&9ioR;uKfB^>_qF?zT$f$uVsOE<`EG6zuj5=yP>B~XZ76; z2JcK?=I`Kd+V_1MMq+RFb$^M*!Ff`jn0PEcE#T8decOhf+BykmNUk-|x9&+eHNN>H zgd`?N@n4fqtm|IBWA%M5GeR4_y|(WK-?=Y~kH6-s4)?7K z0Tqh;>{aQ9Pfnm7@nYV{EKfJyviq)kch<{0VzztkuMW@pYIxpuc;~+k%rEoFPyBoK zp4|L$U)P=P^>7INh^J>o4RDT56KgU~r|5$Zw)4k=c z>dHU9I)3Y9@f*Wy%l(+$pYHYlwyF6^(_;8pb)Fmk-*Odj!vs;w|20Yavr7$lVRp9v zAJ5GHTlxaj{A|DH|1N)?*#BU5G54wLW4U0L87l6{u>xcVoBnPyIQ0Ly#qXOr_P;zc z|IY+y%GH}4;~$;@Ny@9BOBsC?oMUFYKONY=Z7(>^JdmZ-|Fx{6St|mw7Az zr0f3L;Agwc%fc{(fALw#UkQGteDgqOXmB$~S+xHS|0=Wk4KriGF!Pw-F!K%=W_~eM zjpI6#93JfKVuFm3TSPFLX%Q`kE?~wDGT14=^eAPa{Mz+0N+KS}Tuc;DSRi?ac|fpG ztPBUY8|b{I`IEm44jrc7Jg&{$f+TvDnPZuid~jL3>g-k15I$K1pcd42aq?gAyWuC) z&bV^77Ux#WlTnaIwWuCuFMCA{(u2A@Wj)#Wq)e82w4}fmt*j|1wS&))4uU387TVzs z$CiH4!BeG@a7o+wurDD6zDN-a|h@0Dz6NJ1B4F=2NVb*_M;?wPsArMp~w&7GmTD<~~Cskih z1u7~6^L=9utrlR`p&6G!7d&vPB&Wgi(k29Gf?_m5sttb*29OB*8ci~Vvgc$@EM7SM z00Y#Tp#gsm8s4N}O-RUl89Lh3Z0yJ}7jV$zoafnNPS#^os=);nl3dj25Q2&nqD@#? zz(-M>2=v#dX0@41Gh&F2iRgVKc9|MO5$Y1gStogm_=l-5VX5?RvOCZapM6c1uBh3x zn!t;*@e>DFJ?fV`E1-QFCB}aE;ADV6@Nk25^HUd4<15vqe}gXGPWxc}g`}2)Pt& zX*4@ku63j;^S~a&rpbGX{LU{OX0i1Wh~9gJu;yhfG0O!q0dOmU0lo|pjNzu%_&Luv z*?J*69L)Y#aT#QjSN#&0ZEAz!sLNQd(gISIdMwBORh;Ua;&2NbMsdlA54p_E|N0x4yI#QHYz*FVpM6YY=4ef z)=88>vM8S_O<@{v6Pr<|Yjmb$ay$Q>Bg#}GxF}^;kkPf!nPM%JB8pH%QCP>1^Tq`9 z4rYFx#sgRSXG~Xv>yul~Wa^ix+bm zVr8*j)>yWPjmtyJ5Mb;O5+ocMei#0Ia{k?aeS$$E8#!wmgC$??y>r7@!7qtSZl5G27RbV6_SbK{gra^&NtAx1% zNIMyy$3t66pwji4<{C}VMZ5@ z_f+8NKm4VC1v{@ASP%Tgf3xr!q0vdO85)@N0D4!AL=)j36_y%nWMZ#OA`!Kz_OpN3 zmLK3u^{^W|XknSwfCQMEeu_(Lso(onx(P_-pe$aSen3zUCdI=4vSlqjvi&kGAD&dfX#bxQ4R=QIz%>eFN}}^_oOi#>z1%!jzV&(bX~|x zW*xPivGvlKrgFx4lQC9yy*gh;7a5UscF|6ygIl6Fu4oKuk@w&XkS*5H4LJTRD6ryd zMQ4kiRxzOIA_OPK<;bP{3x$_NbECw|6_<3$pnhIILsrn5WHC^dWPxJsmt>%~=GH+7 z>hzS?M}GYx;Ch@6ruQqK=-WBsyj7d>!%!7p5|bTm9UlI#7y4e`S=m4M%%L1e*vd>h zJ^62fFX!EomWhZ1*4Kw#4M=Gn|HEV5Wg}f;#D)5}Cz7;?Z(ydi`{3AqxomgQcVE71fnDg^8n`eexskKf3(T>m$2Milcn4Cnw8>c9mEc?6@!* zwc_;a-|+W>c}BN$)Wx~nJu?cVLJ{W*N!(UGs2)5izlbKkjl zX!L5?`06v&l}B6BwfN3M^#kWyx+{M(@A;zNl~-%SWo6ZuM{ibJTgQ%kU()i|u%`3X z=l)don|XI{RUbO?Zv9!SpN&2z(hMsuh^lHB?e(1pEvB}=i6Q_!c#?G$qI}Nt@ zV860+a)i!0>s$A1-wz}Em6Q!btGfFh9eL%|(_H_@>Bo-uKR^Cock(MIKC67YImnHj%fE2RHgVK*?CiwE!N-|AajT+A8vNwB zzLBAoFO)3sxt;>cpj}U;3a%|xc}j&5B+VTv!}ZX+7A^UY7?!uuYNOrbAR>a;k2Us zoE=5~d}ciJ=G9vh$IhNk9=q`IAEdCZL*L$fW;|{E)elGG7ZAfJLvm^wA_#g>=QuP4hw$~F##K`0$dO2Te<%9t$s+~YTc4L zeq(kph-CnR``z%z3(p@D{};ONqfdrRaq3(rzeI}%z+f?NZHENk55Qaafj3Mof!dP9 zXjtO`x(6P@1djPtb%at*R{7QKb|d5Wo!qB-je=h&LmLDjm5xy50oBRM95z)*l{@EV zB+t(fKCb60qw0Et#qeq2Cn`Im!u1?^j>epw5paSnI-7u?kzQKo3GDQEot^I2x5(IF z(ULmr3pMcGjid4lsiFp)+JY+u7POAy%Gg8f!2Nn6iiSwbWPU$a0aKetXXNbd!3V|k zIV`QkqfDg|yQMh__@uDuoZ}!!R#j>5cDK~bry=Mz{9d|frdY4784Ly~Ui5mTc~K1* z3uVoCuWpmu^tfIPKU4=SlEHqFmbD@bZU$;{AZv1)?d@6+XQUfc+F|A@WKC8=sU?gF zE!MndLr6QV*eglEc)Gn-2xs5{hH2tt$(eM6h2`3LX9ou|e6t$JCBfJ%-d;P60@fK$|7P(hOpL3#ps-A~Lo^ zBn05>G|s~~b@0_Z2n3>+L3|6cLtDP;4>u%3AV|-VMN!Lm733RnE$#-SaCSEiGCHTI zLOA7JFB1ijA?xCkvOkqO{AwHi8hBI^;6kHn78~-)=a6@0UG3?ApOJ}U-KiF8KU=BS za}cb`fs{9vp;8k$XXz!aIXc6J<0vWe$u6$6u1ShYc59A<%@X}NJ9QdBnxZ&X_5dsG^m&Hfy@H|9KsB%ps%2V|MYHi1&<3?*nQv9<#kNLZ zcy&{+B8m+p%|!#VMNVXcy;1e97v5#a*><06!8VI zHJk?RtbiTZT;`VWU2Ga3*5w{8iN_IIn9bB-}1p z(5I4xlFMf}LM22BnevaQ^I8riD4DC}YWQeW1(iB_`Z5tMK@|+gXpYE-k{Ik^G%Aub zp$>d45eAio1~B;`0{H_{8W6Bfs?L96N8p3~jsIrA{DuLF1 zMmb1DWSl1LF@|`6Tn(XF17PXAW#$6O{#((h!5D+af*j+q|00gkL5ZqF#3j)U9P;uW z%m;unoMhW-!>7(uia33ix(tc-9N35DAfFe#l-&@$1p&8A09M3KYA@-Rh$BL)9{QEn z=;hN$F4kzW9hTFkc-cH$KyS__AxVP|pdKQLJP^wpSlLF191LYIpgeRL?u{d(C?vD7 zY`y4C!0tKA*~XXw>~j1k2IySFtJtm~xscVXR6B=wmEwTX_f8{ZHB75f;xL=d*;zvr zkOw-EMmflK+I2-_%(Spe%rmt;fj88MZ5JE{xbZ?nnt?`w#chUpRcH!v zP-5srDk(ld?%-1+c?~L*`2^7jpdVNdl_09qr#j)pB7zJ+*jGSq2oy*b=LV*a68979Ux08d7+P#~6f@Kwr=-lAPVt02N99gltu z$549Av@Ti{_0&QHW3{>@ERwA9C9IvL}xs;;{7@;B*)!`aJdt8W`IaAj@tH1 z3rBf^+;JKoD*H}dkOxinaiD13hU`v=}#Gurb;R_th5)2adGyE})o zW`D3}qA7Y))SBAwtQ+oLd~eR5{&s6}?mze5Kez9YK4x8$RWWwE^un<}A1#UfuzBoo zarJ?*);F&n{Y}e+Jnz_nfq6ZP#;T>U>-)O(iMKzl(%)#^fAiR_iPldCzry{O1|u9J zLE=M0Ik^!_2H7nsnZ7lT=Rf<6XOOKg4jZaHlC}HYz{vwI%~`R8o#n~e)jve1Jl>xN zCO4;F845_uin@*e7*MjP|3>GXriu@mFBXpX9L|dWP#Xt3#O2qWO=AAT|9JZDz#Ds- zyKkL-h-?WQTaOuYqyoG8ru0)@zaAZ=cL5^Ens|WV8n)z zs85Px$9~YPMPsP^>82NNMf~RW?y>J*e{ogB^4`2L-z)hslZTfc@=c7ro4^15zH^5T z4&Ry+ac<&RXI9Ht-`j74KxpiBVX|rBAIFY;J9fMJe$k<`!|PsOa^e1sx6dED{imB_ z<>#t(pX*k2)!5PdA79FTf6-9RqLQf2+(#a_uIOKs^UM!m3c4K?ufKZ$;&E?0HSxxQ z;+_3l9-q597%y3#?;Oe-_|v75^!u;8U%cRt*?)Y=_i=!A=l$%$tcO4NZmhigZ9Yrz z9qBE3VXR}%o$tcdzZk_}Qx4ZW|Z{0{;95;LnpH&_HKW@Qyn{!OlBD0TUp44<0Rq zRNQeMAo+vEw?Tl*pY`K%1h_o2DL<}1mCpyI{4k(-$uF(Z0L|z6R-LhCKLGOogXTr> zwMnjr5}-bAMQgsc^^>isyL)zsyL*NK%0m`vpYyMUKUFc%7|OZ=5kjTFy%uw_< z3&G6-La~MpkDyuVd{AZ0BUaM4P2TA;9hDK@ufN+KkzD ziRVNt;;0Tejj}oAHD-I5G!5l;3bd24Nlq|D)+*TpA}2@rQh(o2k?DX=IWxr*FWT#P zjIbC>Q*0vPOu`mXp=R-tNYEIkk!_M#gA+1jVh_uz=w+70crmbzNN&pz8?+2~a?0H5 zFA@`9vl~p=4ACGn4kPeMD$uMd+t%Koux+AF>x92Ezf?0BLRNBmpb_#s8fAK~1kWPc zF0)hYki$a)J)MRAb?!WWq>6lvSBy-&D&uQNR7jJO%@OkrmX%_x!FwI~T}cR?w;-D~NX(B<-3m_U?37Vy1WACbqS| z!$F`=1=A=C8D>L(YA)5cD8`UV+VE1R2(Wuf<#G@08=b_+-V=Et2no{f=IPmV?PAYS6)NGNF>S`OM; zPL|a=yi}N|s(Z>TL@5Bz8-tGt*dX+DzDO+Cb%E|Jnu;^PPZ_XmHK;UP zX-1WEP6sa7KzPq#u|<1{?AVDUuAK0+gwcKSc83WE)Rd4srzU zf@x~fD@=nv3^5z2IFvMn8R&#)lWHdCDLiC5X;_?w>?G26FD_}&V-0o#Zqs1(8XjcU z240WGjW9anF<%40lT^cBleC324gq}rjyUgt!s`TXi_$DolVG9+8w#KtsyUj9GIHKJ zd=+Xin1kjM8og8;2X^jGgTT(xLe5Dt6O1FNrY<5~CCqGkbhyC=u7bi@ifQ7+*k;Al z*r9l-HU(zIO+m-O#4A0lp?0 z1cEmi;U-3K*LJ~DhZRKdUZMy)cxBo(N(YP$UkFyc=;$}NSUd1jF>vDrj=F@a7S*kdWD3_B1d5{pfON5KIN+LGsHFB(=8rc~6N?o}| z0R=#K;IR{XW!EE@=)&+VS|kq_V1`NwL_qBxnzx*27U4=*V$KlT87Nj7VuY}$1TLU< zNp#YdbS4akyoXv;uq9B89u~>f0v=F!=XQ=v;2cR}jl;_9;;$%XrVhvWifL5h8NpkN zpBuuC6s|vKTXD%qUS7%S`y)HSa^T0>8Q{G>P<{S~^VLD4OXmGY zd)A%NO_kjlw^}Y=xKy#LtNm8rxrwU6!ON?LR&2BG7+H?3XfPlLf_|1im$iCit%^EEFodH(+8;SJA4Jb!`P}cc@Xne>wdOohZYuLK~hq^VFUK>{SjC?b4wipex-2O~HrtfkN zw4CqmnwTGKE8giV%q>|xvczFc?9a_DSv$1-x#H(0R}8OkTIUWfJY{`!WX+P4IYVpL zlOobUWLb>NkSJBzGy?;%ggy2kRgLtp%*ujKyDiND2Hx9;d3KXN4V zNJPuPv5d)y@r~7em;W<8|FUmgBTT98@9uN?3gy1ui>)73_;6R>ozd3T8&|hZ?#NB? zjI3~2ZT(EHb@kBB$MbiNT;5TfIe_Y{?!f~C*5`)TAwAweaHX$)*rtddg5yF&if^AU;SX>R$TG=QFJ6r7_QhjIX1eny8H4# zR#61ry7Bp*;fy=oxBhfwyrQ+Q+1GV0##d3oaAQzdxz&+87!RxWLJE@ze+jwFjva7U0fYVq2x{JF$&Y(igdisW%0F$8;`m_O zDCfuNe(L-I>HaN{?mgAXW7?`};itu!*ofA#GknC`yLxuGcl8Xrb*ppq1}r{m8jl6o z4c`auJnQb3GkJ;c^hd(tjKmx%LA26T47KioeaozN2Agpe@9^th5;c&{0Pnt0G;a2r!7P(On8=kgGz+>?FF4jUzM2 zfJR2-#jrX$zBDIRq0Hgjd0r2#EBE$_wH@zpsV6z=XrL$5vM;JjEN8(dQUGO#9wBv< z;#k4M6ofiI)at~5hXGPoUd;BLd)egX!@^D6aXdYSk0AxbLp+l}^ViHx>=6S56lyfb zM@ytPn*;4Lrg$NQBV7tBP8Sk*NeDp_NhHmysPSvlNT!8U3%4luR=HMbcXWr%!2@nRX=%OP7m;)Ch38HFq0 z?T)SpggFqeM(}}ory(>aifv=UJ83nvqn&UlM$GV*a&U&QkaI( zo8~3K5!yltW}*#1Qmm1HS^^%uz~{w~oJzEf9j@-zG?WS8F^~A%MsZ#Pv6g4V07_2N zJ(#-&$eprTjB$pf&CR?45X~itR5~ovqiDhC-Clu#grwzUp`48BLN&UJx_Wea3}q>0 z=@W@I%@#XFjci8g?eyca_{`ubs7k^wK}e-VX91$Lh54N?q|#--Q-Zs55_bB!v)aAc8} zT=@?0#}^eZC$K6nFimmgq?fFuTA&(JyqAwmla_FHlAVixO@E9yB94|AXQE_cK{bGp zAx+BKB40Ni%=X8}P@ym2sXniEoTo`At zXxv$3mSS6kck1CF*g2kS4+JiHN>nqBP1N)P++hxkB5~lf&>NUd6bsBPmo18xE#Cskks38R999R{yiF$5XBk|79zI@yagCzXIY zSVAGN&PRqq+0i8n5`^?(QBw7w^NUu6G;vEK&0giGSaeNP=h`~<;`oXlF@4csZ-}Hx5!h&Pd1B6AZ3Po7Y~2RJ&2Xs6xCv;RCqfk&5)7E zB`DFzodfeV3S7lhYUy?jkoRUK2_agOcpNWTuwk#Jjh4+pV8YKTCkt!E$QBo_0#c&x zh{8`tgkGc6yd0?s&8md+hyrf5QiZ~iUMHogm|ma-K*Ba_-Xg+$AhXSZlu2C8h0c_jSgI(rPBJ0=xM+rBA~mydkewjG z2}}xt21@*1jSPe~5$l9%K-7a9uxG~dQ191twIS?6myGN{$`ZYdNw9v0JqRRkw zFD%dS9*c^|P?)tLR%)&(rsTk!c#XHiq=gg(y+ZFLmdXTe%()iL(pfuy4+UHV;nD!N zi#(jcUbq$r7`p(=S2Cu_kJsS~?vfU`QSulBaykvi@9Mc<#E}h7LL!iW9>9D5f(TE< zEMn{w5w{X_itwcpiUsa)H4>=q6foX_IJ~64n668`fnB1@*)Oe1XI;VCfgo^166vsV z4$%c$oXy;9%~s)5gPOOPpI2%1rTR3tEa`zB$7T-A>CjNPs!S=L?p0NF>zS?6#7@{VV|dl4PX_Kja0X^OHK2b3jU_KcRin`u=P^9Y7WzJNQ~A}ug_ui zLP?6%&x`S^+1a8Tt{sutOf#fd1jF=i+%D0B-$Pisl*5h+ji1xx6ZIRv*e^P$X4M%x z^Fr|9{D5d%QoLFSabB^7W+BZehOx13DZ}jy;8&Yn9XL-e5Se#qhAnFp%;H0J>cP3? z(Y?GeFuGmLh%43D&a|`+T!fYgWxPz)^BqbP?@bxGm{o z^d$zD+t2d~@eVrC*}D^2a_&iM#j7KuPk% z0d3oG9e<}_D7^QXOIkG9yXxwl{R&1Z^jLyTk2qD8B$ zJHYJZ>l05|t%Y~XgNnI(C&iR4_j_z5J0^m}_|%BJfi>TkJUp4SbK>=sIfI|%TDgC_ zIFS2_b<HqDov2(tQe|B~2DmqQpeptBt?`@Itl@8G`-F_(%UNeHFBm^69lJ2L zG&U=)-gS7p>&}r!H|*ZFV`uh2aBhmNKgW?0IXHg>>_E@OVtLFKWR3aD!v62S%W@Ch zsE=3!J}6mud+LyThxOsfH`W&CPW1C73+`fUjoH0*aPWXNe5C9|F&?uWn46sWZt;%c zQ(vd7?Z5HKqyEiS``q8Bm`9qw>&_kO3g~;Z|G&PNon3v^oqy=maOKhat;K~mfog6l z4w{JnWX<@hj7N*EVn|-?={wXi(fWNKUhJCFTHRdlI#xA$z3TMx2g;Wulqp8GyEkxt z4%`pJ9b@f3bKo)0{WlIj-)?pMmHmk61Ur`V?o2Ad1f9$CO!0rOFe3X~Ej^V1;TsQyT`P7$R=K7LS7Y;EZe7mz~ zNDt1U?`gSd{%@EHed;8T->WZy-HY1?b}!N>IIKVZ8{oZrVWL!g4CF7TSU95TcR>WN z-P5+Ee*nNeb>vJEG$UYrr+*{o_%6R^0m@lM2L4}6anR;GOG7r(dwyT2tL!>_IX`+sgK{@V;yUf%)myb!2o9tT`v z5CtvF$nS(kAi(@SjfHlS@N?!I{PF8s;JNCzX*7T_8K~VApjWtZxC6Jq=+m;}^EK`y zN1rU6I*Y|~bLPka{H~xi%t8rT%R%i(iu)zB)00@U9G?dYK6i$G19Rq8GISIJ&Y;gx zuDDcWD&fWUtMTH-7Ocmb5pzP2r6x^ssnK0%PUSUtXcg&gDCMhvJqJn)+0>-1Qf5l< zjM%JDl89BpV!)g$If!itt!q;x6(&R}$>|oI25;BLZ{~^EE3>4YMj@O*%~3%PLFmiO z`5liv``~e+`yVLSO{KaCBZTixW&yP*DewvnDXkPgec(yKoV3r90IS=a#74{61Wge z(){mYnXsbFGQ&@a5n!YN{J7nqw_&CNd{N*Xz-t2$3ID;103}^uCSWwwOTmX#>_*~8 z&X-$lq%#=9dV{KmX#8|@L7I@o2?h&kUxf*P-h#YLs$q%E<-8$;j8XMYgdyp^P_gnX zXnPLpJG4T!eQA-R+PnOn=>G2?^(tC3<{A(qB}=Hl7LTI9Q$z_h95nUPy~z0MphlVV zSPn87(^SSp8K0 z)wV!$bdcI1Zrp+tFsBTdQ3E@iL;>Ofo{-#(-Nr~#0t%N<4)n4ytvI#oh!i>5{wph% z#OKfzrISz4%DS)e|%dmi?2*x3B z!0US{D20SnJ{*oIFTk#_&uk(#tJ4cmTUvl(v_sM^R5S$WeWDU2wW1w`N%2yg*-&7P zgA7Rjlxdp5#WyP`U6ch26xCJPjB92LMYJ@iY4ExUaQQdAqjywPP*GBU&}xfHvUV~d z>H{L0^b@I|i?WzO98+PeAdmQ+16c^ll<39)V~7#P3;paWVYdmYg~AqUv8|pkn{bqB zu#^GR$=?4PSQ^vQ5rfg#|`?Z(X~0rta0JmP=$bse(@>Tq$~*!9+Ib1Yf1bw&-xt zsuJ;zDzsL*n)NC%OfUZ9uU;q;;KLOr@X20PFE{XB%HAYjM1bZi$g@fl)Wno*qQYsm zFqu#jS_r9v;UU_jsQ20-vknJH z#~ra0$JrIO&cOt%FA5^n4q$YgCq>f4Q0oq=5FMwwBPr2=)goSWbg6r1NJ5PHAeLyX znS9Ze4SXz5Wh9Gg{Nc2gXgy7RH7VB29G0aR0MDD-qZcY_xuKl<40<9h2j_`twdy*` z{)=*tIasKxiIFUHk*s>P7x3O>6)tEZU4I8%LCxCUZ&LTz@eVdxR=zh1z+>EqXcah>dfp1}=lX&g?>ki&2&OskvUW zOOmI^BA--SQI(GMFzH&wc60i`_Mqp6*u20S3;x0k*w}~#C7x4tBd2WnOP=tQJUudO z3wtkr!^m?B^PMlOzLYvKa%$7zthIwjP=4;;5^pc)uiKL4xF0wIKN@*%tt&tEo-HUP zWMp_j*een4NgtD+_n14Zx48J;f}L4wM~1g&eR(&{Rn7grZg9azpa8h}$%`B3@)54< z>&Jd5Iu=?aZyZ3ef9Cm&tiK)-36zzRtyfIV!0oz!ReuXTS>$q^YvpV=8BtEXVJY&N8raRCWoFY zS$l8RpQ~THS6iF%$i2mzs^6YyZwF6xzS-JzD|BLGYl=LomcQL}Og({~bRNw)+Fdc$ ze5Crq#CiW)hDFuH?Trz4XOwLF%Hw-Hc%3gGXYufJJLk?Xd1h?z-Tbxvr&xfV2Zr;v zy+1eta-FQng{$+OJ}Ig=f266WF*vGnm>~D$RED!-#Je59$n z<2q(eqMY-`&W)j_?sF3|?Cihl<2P?szdG>*s7iX7?Z9mVRt8!-?I*09&PT-m#91HU z9;iy{6-XuBoph!h#3w(=O8ytKP3Lb4*|xe~S+oQOK+m*;|I6;s_MRWI!x~saJyB2Fe1Mg1vUiNmBp|K-srbe1gIRQ z0n42`9$5wicWhaTe*r}L?6Dy6pOIO~m*U1W$7ehUOHOXpwx(`cAKZDwuPed3J|5>a zs|3@UAS}^h4zxZip1uiB5n!XC<;VbsEP_xVi4`79aw?<%ek=foGdMROqF$O}c*ZXr zhgA4RlqUL37SjZt+U)KUOG({ZVFqoywwNj2)nar7Rq!dy~ZwBSZ|^Im%)L4+cP@dKf(YmjD?Q zXyAwdV*>P4i5i7qm1tUqU?dh;Y$vqT3FxZJoNNgt>7!I2$zxhw#$AJXE+WxvIm)2~ znDdFIJ{Pgpl_SY&5U@n3hL?~kB7$EU6=_7$KDn)w|7?YO8Rv!HaEpp;R(Njx95(1c-!nBMQ+OiyQtE(=xJb-Fr0L%xHmK@ISk5DV{R)IufsS&ls zr7WE0rGR1bQYOYwg8@aTv;`PXz&N~L8so>#DyJD$J53T?h7qRf#5NIDBdWq~e1`d$ zIz+&nS2(2#bGQ~FQ-v^1!)D~+?C>ss4Rn>Esi27Q8U&pNqT5O4lGY@UMXm0(^4bE-sTUTKC=6HR8ugDgfDRkGf| z@xaTOmqvoAB$L65P4Y@H+#rc_0_-Ox08Jd`;_F3onlW5gZeoK37KY2BcyFz^x{-Bw zVEr^>no)qy?WY96xcco!2WMIg1p1u*7q1b7OY=acLNMM8DxlKCB~^f=!+TSPU{sUD zX=O~EwyJa`jY|baeYKg0HiU2Gkt7+A=pe(%a3iNi)c>nRHNY<caV@rcticEC17LJpb~_)jw7IG@{)@mu7fJVKtvhjFxneKmKSm|%#50$ zE=!lgLPF4dUQk13==zV43(=cmi4UvYJdh;@kMmpk6hKvqG zgV3EwG?9O`eGC_#+$J(Is-mkHuUqIaLqsiw1>x0KtaTRl)@RV8cZ|^S0$6cFlwA8Q5m2*DPYY+4Co7D zZ~B{gMd0AACI`!929Pb!F*nGTB1Vl#(!g@VtAku)CEOIc&L`iuK)M^KEnsNTV78E6 zbCVcql;M1esn8fW4>+T_kmdv7@G-HvF%l(VK?(<}QUJ09%yK4r5Ar__<=U1q{5v8? zwQUWZ38X_?d$?wVaO5uL0%HMh_M;*X=U9!h@HkC^KDhy*I7&s9y+yn~59M zaFrAg>H)Uo1IYl?9JGnSE}n`+jhrbG#;Ze{*P*!UayxU)+?cGQT(mISwVR>&)GKvL zN61`Mg)*MxmL6^Ue=55gs3@*`KRa&h*5 z+U68?B}hmr0oxp#rge6lY&OrPjMya%SqH2jMf;1mGV3}eI}?io-|eY2r+$a zB8#FXVBT*QHMZxyzSB8}Vdn0=ckZ3Ld;h=t`+rYgs4H@@*tPf5|#;oXH@OQgyGwlo;mgBWKH`cs2hduc%$iY}+Kp7Bt#IMtctPVVL^^0}&PRZdbl* zu+#VRQ5T-wofe3xW5k$|BNB@dOY+CpW=m6|Qzi%(Y8ii=P>Nlo ziF2l6v{`Z_UrHjRHu(AUIlG zy|}Y}&5z$m{PAji*VTC$zj}S_H(U1n@~daAR92sU^jiOd&;5yK`O@0@6K5*_5^an= z)q2Q%oR50iMxW>o)Fw&>O8txD(-hZ0VDTWIvoxdakcTvuCCY*p4|&R%7_!|XPJPR@ z&*O~Qtf@!Im&(q-iYuwrrP2x!F%2Unfr=5ny}qvT^qXa8%s<&Na@ro4F@SL0%|C2i zA><8-Lvy}V$hk9X5C;GLpw;)YPx_0m_%44wI{fnYe)Zze=CgY~zw*ZwfgdGWJGXUx zSn@^5hCulc4k|AE=+7@c9-E)JtO}?e%Mhuhdlj z^hn9|Q>JrL;PKI#_QKRJo4l3v*YeuY$r-~vYh7ntjg{p$%7cMr?ZF$F`#t8dk!69; zuD*Qq^B2dq{C3;xV?SHA<_9+-(>?7!Uv#6bwZ1&j{n-akdz6D&iPqO%sg|5ygla#3 z;IcguSb4hoQ2Y^cLJHVN2kZL(XiGE@>#VCx*(^S7x^>oYxiNpF(0n~cj_h;2slDUG zP{LDjrERdZG*EKdcbTsa_^uDyE7v40U;SxMWM&Z&9YN za4ff{@aguYPX#Ye7i(U`cAg_w9y(;Yy%KXirel>RGso$?zyk*7F&k}s3-hXo0 zjrVq!lAY`7y=VV@-*hj(8?l0Ktgr{_Mt%0jk7v5wf92czM%Vx0NpH89xqOkB$-xpk zp0owIlQu>G!&|)ZGcd;1j6uc?M()fsK?e)epa}(Ua`@|Qb@^`vXl;m zB8zsKUD0w`SMF!S0K4ndkBvl_C}6(--m4;260T-gLpn^R2PCOXT&Ms=)+~W#a%ZtX$+jr$Z4u;*YNA>e$k<5UXJ99}<55ab zRSm#Um%{zMRbclxm@;!TvrsQEQ}i;K$r|1PL9lL>UMk6Q_8j#*;$zBaHPjlFk z$0szyW|H;M+5YpT6VMuof-=`YWE!GRM-`w9Xt;@Zia>*Brx4l%G0X9xcI*w``?^~X zyHBv<9U}X@Q)i2Q$nWAn{pm6qczyK5g^RCOf8Hn_5kwb8pa@WuH_|3)iE7B;6sQ*L&4($$I(-Mc!*JT;C|RU6T9>7ru!K&BQyT@FtcWCvi1Dv8 zQ?Q~*u|eBHV25j_2qI`ZCJq{|ZFY}O&Af@at77>(~wRv8vvZheFwg{@4*%$^NiWM1MC9t}6Gy;PI7-EALokY#x z(1xNg(X(NO+oU3&Y;Z7otSbb3X@z3LiDPTOfgc*WK_dE7 zM`wgB5}11=Eo5{lSn6t4#=E#nr;Rh+_?)W2Xi*zPdsq$An$Crx0$3IpIQh8f#5xl^ z{$yg|^op^~%TZK^=){W?DYs9{oHf~GeiN269ireM23E&Ub5tZo+f=^NP)PnY8D%TNuU?Mu$9Wql-6#kYoXBj(0u6B0OgiB?F zNrRyTA$%xmn<=sMYHpW{J<&;?Ec1#AwQzQ5v&HW`%S5k{ z-WlQ9W+j94S`uNRqzO}g6rLG2rU|*UjUiHJ*wy!FxSPY5w)O;J`D%e$d^ks*$z+(7 zrI_*8#RQ=P%dZq&h;3CmdK}S*rQ?p@t1W`C0V)}Z39)oG=SS|}c(Wx3*(E6JQfsx( zy7eWrRA-1f@V=Wm9nH!fwfI;?e(KaTK9IA&;?0I$TW|hXOpk4s={|4aEZ*W4XuODBg|N;xw5#|`9*opJaKA8<9ylvw8;Dt@HI)aN`@{E?}hyWE=@5Kb;tTiZNBpD-X4 zghG)%;jq+LJ>Z-@Goy|1kX2;~u_1kk@me#7dMfT|Fdc|p$8B{%k{9EDlgjjLUs#TXYJo-t_fr__RUEjx8?T4D)^bW0RvSuAR^#Rj%%9Xh= za>V;i2AJ7uyKj5Lqb`woS!?PDtIzf5g+DIU*I?~cOBe|l)--sUwG zCzqZy9?HFL+g>ic0C^%Ga_YP;Y( zb|bYHyzQM%gj&J0ENdMwXx%sleXg(^h4yG@)Ik8LPKgHPF=1zY#X${zE97ko-6$hm854a3}qV7gnN>k)u08SX_20700xDU z5M1sCjk3cIH@r_zC3nODCjhP%#jB-`M~+2y`KNgw-m>#YeB_Q59FPnqfv4=Aao$;$FGwWz-R*q0;og# zbo?-H+jcjcd^nv%P&4Ln7Ptl+r))P+#dK7la1VO~j_JTG3^_@_b_mkOu%D6#;`f#( zNgS#@kDwC9Qb! z!MH(}WDd0@bD(10knPKQZ%4P*K09rB-*gvaCMjfqgNhqoR2E{nKy;K-p9<<-iV%*N zeKEx%NYOOHDoql6dHh@zgn%RpQE3q`*GdbRrsM z)ED`PM4A~h3!`m11q7Qm%`h`q70Z(InJ1QBg{!;hReYKICT`NNGCK# zkyiW=@kq4M9TJaMP4TEC^!AI%cbkIUBrzf~dXmm-7ZZ>{yGtJEjU>|?74*Yez<*4` z^fWkih0YaqR5q8wd6`-*qfEt34)PFvclz_aW*gWJH;3iRjE*5`qGq8Ef{EGqjI*oo3g_S%;9 z{;Aju^&{^U2j7G+FlO2o?ZQup)$uGe=EM((sJL4N9%>IBpbyC0MmzL2no}^O>*%6t z0V@fLY?M;yOMH8_Xkk@a!pclRaC-b!&~prtYN4Ynf?m+j<0QMM8SB89WC7rzpHI>G zj75Fb_bvf|#24Dk>I8{mBr4Qm208>0sl5-pR0S{JARD4Z679xUnVq=MKt+wPA2`4G zTNvwK6oXd)$H9wp<+nD&yM1RBBE`w(uQ&Hb6^Ys@Of=h^9$?p@i+|;qK8xm zF`DqDYf&7Vu|$!Z2?iJFRYEOJZD$t?1`6ntBvV3;&BdtAakBE80yVi&gsG2NDIkPP zQ5YpcM@T0rBDFk|N-xyyC9{bi94pF4=yamrAOSg2S}GM4yhM1kiGQD??Ou^0QCGzAtOc*$v6XQ5kfJ_^)aMTIq=d%iCupz3fCq0uOHYs% zw?uqZ5&_UsfeG~&A4}XgvR8x;2ut)<{$OzPCRS*|23u-4vX4H@wAvgOh4=Bz0diyA)k6HjBlq?gv%T2=3+D7{ ze7Q{8%V;}|fsy&9xQr#YuntT$9mB6mZYMzY$fxuPw1CbHl2)}vbqXr4oGquhOJBui z7VKZ16XX{a=kul-vb*17e5YxMfMFZq}z6ZCgMHSBZEu_ab9*3366t}+dC-)W2iWu0;z@XY9U4>*o4yMB^6*SIy|YIXe@*?VKI zH}JHq&tk6qjmrez zzxH_gXY^&g!;GPA%(;`UUe`;m4?M0u;cYKqSd5(5=K@5r?I41Hm*71|K5KG4>v8v@ zb-!b7=GhQK!-0AG+*|wVg}mzfYZgS>BA%>1cVE`a@l1DjpZn#$_fie8BfWgnEcKrg zf*P#59lzlYMLU8#KplUlN$PFD_JN8JWXbRildND3Z-s9db@E9ydwlJmVUYSS!?h9( zu0g||JpJ!*4KW|Gc7tcs(3)3+c#?+Jv@&}nptVooO11}x5Uyn7C(V^C(M8fe8~i`P z+Sb9e1FS(qTfjxI0cCaLdUX7Hu}g{>6BQCMjV6)WO;864@eUJIja8i1RJ;ggKf0n# zh)X~faaf8%dO$GBe$1INT?EY5!pnLPNl}N7&_y)X{Ip0dq~ke2NQwSeTAnv{FqGM? z1FkVTRd4`+NE8ApVGb842TeH@y;Q}q>VQC}LUpE0Lf9UeRD)@feM4Nl7y16b0}KM? z8U7CZQ((4b55pu3g(p%jzovAC(2Y)z@nEMu3MJaZVLAK_IV#arDop&MMFv#<-JE*O zahwXGOB$Mj(pqbrMbIP^4RH-lP1gEKVUsv8gnq5io>#vCw8!efPC(q_i7kFgQcweC z$)xUE2g$;zI(&TVn6~KHFZ5G%Q|{6v19E{`VD)|$;!=a2V0C4roD*6lW7PTbV1POah(14GZeNuL|?&?iLCZ2qSSlKzh#s~e0z8v z2$VG|Izml@9M8DhZ8**ljQBAz3YpqMcnK8QOoTfIYu2LKK7f;S(?DJCy`TZG@gu36 zymg}u+|6S$o{Qu2KP2O|-b_sX`@0faN)fiHqo|IyHw{PV^jasd@Z*N}|m07~tO~LGs zZ>Npt9MAm^Rcd*@+jWZ<0+lcY#zqlKL_vJw1=Ujl*DTSTCS~NQ)Kt~hY2wn{xDdoF`vQc@l!YA8 zY+wJ@dR>cZ6HQNdPTC8jq3Y0rvywS%NK?(vNgyr32d_Cb;mM$0^tyE&A}5S8b7VrL9>ctX;i%6@3X}W{ZzF>j5H}|Z9xXDXd&$tu#6dclWM-G3gH1^ mlVWS=iJ#(_EuCg@!NXE!ZL#*TUR DAC) + always @(posedge usbclk, posedge reset) + begin + if(reset) + begin + fifo_in <= #1 0; + write_count <= #1 0; + end + else + if(WR & ~write_count[8]) + begin + case(write_count[0]) + 1'b0 : fifo_in[31:16] <= #1 usbdata_in; // I + 1'b1 : fifo_in[15:0] <= #1 usbdata_in; // Q + endcase + write_count <= #1 write_count + 9'd1; + end + else + write_count <= #1 WR ? write_count : 9'b0; + end + + always @(posedge usbclk) + if(reset) + commit <= #1 1'b0; + else + if(write_count[0] && ~write_count[8] && WR) + commit <= #1 1'b1; + else + commit <= #1 1'b0; + + assign rdreq = txstrobe & !tx_empty; + assign txdata = tx_empty ? 32'b0 : txd; + + always @(posedge txclk) + if(reset) + tx_underrun <= 1'b0; + else if(txstrobe & tx_empty) + tx_underrun <= 1'b1; + else if(clear_status) + tx_underrun <= 1'b0; + + fifo_1c_2k txfifo (.data ( fifo_in ), + .wrreq ( commit ), + .wrclk ( usbclk ), + + .q ( txd ), + .rdreq ( rdreq), + .rdclk ( txclk ), + + .aclr ( reset ), + + .rdempty ( tx_empty ), + .rdusedw ( ), + .wrfull ( tx_full ), + .wrusedw ( txfifolevel ) + ); + + assign have_space = (txfifolevel <= (2048-128)); + + ////////////////////////////// + // Receive FIFO (ADC --> USB) + + always @(posedge rxclk) + if(reset) + rx_overrun <= 1'b0; + else if(rxstrobe & rx_full) + rx_overrun <= 1'b1; + else if(clear_status) + rx_overrun <= 1'b0; + + always @(select_out, fifo_out) + case(select_out) + 0 : usbdata_out = fifo_out[31:16]; // I + 1 : usbdata_out = fifo_out[15:0]; // Q + endcase + +/* + always @(posedge usbclk, posedge reset) + if(reset) + usbdata_out <= #1 16'b0; + else + if(select_out) + usbdata_out = fifo_out[31:16]; + else + usbdata_out = fifo_out[15:0]; + */ + + always @(negedge usbclk, posedge reset) + if(reset) + select_out <= #1 1'b0; + else if(~RD) + select_out <= #1 1'b0; + else + select_out <= #1 ~select_out; + + fifo_1c_2k rxfifo (.data ( rxdata ), // counter ), + .wrreq (rxstrobe & ~rx_full ), + .wrclk ( rxclk ), + + .q ( fifo_out ), + .rdreq ( select_out ),// & RD ), // FIXME + .rdclk ( usbclk ), + + .aclr ( reset ), + + .rdempty ( rx_empty ), + .rdusedw ( rxfifolevel ), + .wrfull ( rx_full ), + .wrusedw ( ) + ); + + assign have_pkt_rdy = (rxfifolevel >= 128); + + // Debugging Aids + assign debugbus[0] = tx_underrun; + assign debugbus[1] = rx_overrun; + assign debugbus[2] = tx_empty; + assign debugbus[3] = tx_full; + assign debugbus[4] = rx_empty; + assign debugbus[5] = rx_full; + assign debugbus[6] = txstrobe; + assign debugbus[7] = rxstrobe; + assign debugbus[8] = select_out; + assign debugbus[9] = rxstrobe & ~rx_full; + assign debugbus[10] = have_space; + assign debugbus[11] = have_pkt_rdy; + +endmodule // bus_interface + diff --git a/fpga/sdr_lib/cic_decim.v b/fpga/sdr_lib/cic_decim.v new file mode 100755 index 0000000..45b863f --- /dev/null +++ b/fpga/sdr_lib/cic_decim.v @@ -0,0 +1,106 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + + +module cic_decim + ( clock,reset,enable,rate,strobe_in,strobe_out,signal_in,signal_out); + parameter bw = 16; + parameter N = 4; + parameter log2_of_max_rate = 8; + parameter maxbitgain = N * log2_of_max_rate; + + input clock; + input reset; + input enable; + input [7:0] rate; + input strobe_in,strobe_out; + input [bw-1:0] signal_in; + output [bw-1:0] signal_out; + reg [bw-1:0] signal_out; + + wire [bw+maxbitgain-1:0] signal_in_ext; + reg [bw+maxbitgain-1:0] integrator [0:N-1]; + reg [bw+maxbitgain-1:0] differentiator [0:N-1]; + reg [bw+maxbitgain-1:0] pipeline [0:N-1]; + reg [bw+maxbitgain-1:0] sampler; + + integer i; + + sign_extend #(bw,bw+maxbitgain) + ext_input (.in(signal_in),.out(signal_in_ext)); + + always @(posedge clock) + if(reset) + for(i=0;i=0;i=i-1) + bin_val[i] = bin_val[i+1] ^ gray_val[i]; + end +endmodule // gray2bin diff --git a/fpga/sdr_lib/gen_cordic_consts.py b/fpga/sdr_lib/gen_cordic_consts.py new file mode 100755 index 0000000..ab66cfe --- /dev/null +++ b/fpga/sdr_lib/gen_cordic_consts.py @@ -0,0 +1,10 @@ +#!/usr/bin/env python + +import math + +zwidth = 16 + +for i in range(17): + c = math.atan (1.0/(2**i)) / (2 * math.pi) * (1 << zwidth) + print "`define c%02d %d'd%d" % (i, zwidth, round (c)) + diff --git a/fpga/sdr_lib/gen_sync.v b/fpga/sdr_lib/gen_sync.v new file mode 100644 index 0000000..d72b39d --- /dev/null +++ b/fpga/sdr_lib/gen_sync.v @@ -0,0 +1,43 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + +module gen_sync + ( input clock, + input reset, + input enable, + input [7:0] rate, + output wire sync ); + +// parameter width = 8; + + reg [7:0] counter; + assign sync = |(((rate+1)>>1)& counter); + + always @(posedge clock) + if(reset || ~enable) + counter <= #1 0; + else if(counter == rate) + counter <= #1 0; + else + counter <= #1 counter + 8'd1; + +endmodule // gen_sync + diff --git a/fpga/sdr_lib/hb/acc.v b/fpga/sdr_lib/hb/acc.v new file mode 100644 index 0000000..195d5ea --- /dev/null +++ b/fpga/sdr_lib/hb/acc.v @@ -0,0 +1,22 @@ + + +module acc (input clock, input reset, input clear, input enable_in, output reg enable_out, + input signed [30:0] addend, output reg signed [33:0] sum ); + + always @(posedge clock) + if(reset) + sum <= #1 34'd0; + //else if(clear & enable_in) + // sum <= #1 addend; + //else if(clear) + // sum <= #1 34'd0; + else if(clear) + sum <= #1 addend; + else if(enable_in) + sum <= #1 sum + addend; + + always @(posedge clock) + enable_out <= #1 enable_in; + +endmodule // acc + diff --git a/fpga/sdr_lib/hb/coeff_ram.v b/fpga/sdr_lib/hb/coeff_ram.v new file mode 100644 index 0000000..6546082 --- /dev/null +++ b/fpga/sdr_lib/hb/coeff_ram.v @@ -0,0 +1,26 @@ + + +module coeff_ram (input clock, input [3:0] rd_addr, output reg [15:0] rd_data); + + always @(posedge clock) + case (rd_addr) + 4'd0 : rd_data <= #1 -16'd16; + 4'd1 : rd_data <= #1 16'd74; + 4'd2 : rd_data <= #1 -16'd254; + 4'd3 : rd_data <= #1 16'd669; + 4'd4 : rd_data <= #1 -16'd1468; + 4'd5 : rd_data <= #1 16'd2950; + 4'd6 : rd_data <= #1 -16'd6158; + 4'd7 : rd_data <= #1 16'd20585; + 4'd8 : rd_data <= #1 16'd20585; + 4'd9 : rd_data <= #1 -16'd6158; + 4'd10 : rd_data <= #1 16'd2950; + 4'd11 : rd_data <= #1 -16'd1468; + 4'd12 : rd_data <= #1 16'd669; + 4'd13 : rd_data <= #1 -16'd254; + 4'd14 : rd_data <= #1 16'd74; + 4'd15 : rd_data <= #1 -16'd16; + default : rd_data <= #1 16'd0; + endcase // case(rd_addr) + +endmodule // ram diff --git a/fpga/sdr_lib/hb/coeff_rom.v b/fpga/sdr_lib/hb/coeff_rom.v new file mode 100644 index 0000000..c287eaa --- /dev/null +++ b/fpga/sdr_lib/hb/coeff_rom.v @@ -0,0 +1,19 @@ + + +module coeff_rom (input clock, input [2:0] addr, output reg [15:0] data); + + always @(posedge clock) + case (addr) + 3'd0 : data <= #1 -16'd16; + 3'd1 : data <= #1 16'd74; + 3'd2 : data <= #1 -16'd254; + 3'd3 : data <= #1 16'd669; + 3'd4 : data <= #1 -16'd1468; + 3'd5 : data <= #1 16'd2950; + 3'd6 : data <= #1 -16'd6158; + 3'd7 : data <= #1 16'd20585; + endcase // case(addr) + +endmodule // coeff_rom + + diff --git a/fpga/sdr_lib/hb/halfband_decim.v b/fpga/sdr_lib/hb/halfband_decim.v new file mode 100644 index 0000000..2a05ce5 --- /dev/null +++ b/fpga/sdr_lib/hb/halfband_decim.v @@ -0,0 +1,163 @@ +/* -*- verilog -*- + * + * USRP - Universal Software Radio Peripheral + * + * Copyright (C) 2005 Matt Ettus + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/* + * This implements a 31-tap halfband filter that decimates by two. + * The coefficients are symmetric, and with the exception of the middle tap, + * every other coefficient is zero. The middle section of taps looks like this: + * + * ..., -1468, 0, 2950, 0, -6158, 0, 20585, 32768, 20585, 0, -6158, 0, 2950, 0, -1468, ... + * | + * middle tap -------+ + * + * See coeff_rom.v for the full set. The taps are scaled relative to 32768, + * thus the middle tap equals 1.0. Not counting the middle tap, there are 8 + * non-zero taps on each side, and they are symmetric. A naive implementation + * requires a mulitply for each non-zero tap. Because of symmetry, we can + * replace 2 multiplies with 1 add and 1 multiply. Thus, to compute each output + * sample, we need to perform 8 multiplications. Since the middle tap is 1.0, + * we just add the corresponding delay line value. + * + * About timing: We implement this with a single multiplier, so it takes + * 8 cycles to compute a single output. However, since we're decimating by two + * we can accept a new input value every 4 cycles. strobe_in is asserted when + * there's a new input sample available. Depending on the overall decimation + * rate, strobe_in may be asserted less frequently than once every 4 clocks. + * On the output side, we assert strobe_out when output contains a new sample. + * + * Implementation: Every time strobe_in is asserted we store the new data into + * the delay line. We split the delay line into two components, one for the + * even samples, and one for the odd samples. ram16_odd is the delay line for + * the odd samples. This ram is written on each odd assertion of strobe_in, and + * is read on each clock when we're computing the dot product. ram16_even is + * similar, although because it holds the even samples we must be able to read + * two samples from different addresses at the same time, while writing the incoming + * even samples. Thus it's "triple-ported". + */ + +module halfband_decim + (input clock, input reset, input enable, input strobe_in, output wire strobe_out, + input wire [15:0] data_in, output reg [15:0] data_out,output wire [15:0] debugctrl); + + reg [3:0] rd_addr1; + reg [3:0] rd_addr2; + reg [3:0] phase; + reg [3:0] base_addr; + + wire signed [15:0] mac_out,middle_data, sum, coeff; + wire signed [30:0] product; + wire signed [33:0] sum_even; + wire clear; + reg store_odd; + + always @(posedge clock) + if(reset) + store_odd <= #1 1'b0; + else + if(strobe_in) + store_odd <= #1 ~store_odd; + + wire start = strobe_in & store_odd; + always @(posedge clock) + if(reset) + base_addr <= #1 4'd0; + else if(start) + base_addr <= #1 base_addr + 4'd1; + + always @(posedge clock) + if(reset) + phase <= #1 4'd8; + else if (start) + phase <= #1 4'd0; + else if(phase != 4'd8) + phase <= #1 phase + 4'd1; + + reg start_d1,start_d2,start_d3,start_d4,start_d5,start_d6,start_d7,start_d8,start_d9,start_dA,start_dB,start_dC,start_dD; + always @(posedge clock) + begin + start_d1 <= #1 start; + start_d2 <= #1 start_d1; + start_d3 <= #1 start_d2; + start_d4 <= #1 start_d3; + start_d5 <= #1 start_d4; + start_d6 <= #1 start_d5; + start_d7 <= #1 start_d6; + start_d8 <= #1 start_d7; + start_d9 <= #1 start_d8; + start_dA <= #1 start_d9; + start_dB <= #1 start_dA; + start_dC <= #1 start_dB; + start_dD <= #1 start_dC; + end // always @ (posedge clock) + + reg mult_en, mult_en_pre; + always @(posedge clock) + begin + mult_en_pre <= #1 phase!=8; + mult_en <= #1 mult_en_pre; + end + + assign clear = start_d4; // was dC + wire latch_result = start_d4; // was dC + assign strobe_out = start_d5; // was dD + wire acc_en; + + always @* + case(phase[2:0]) + 3'd0 : begin rd_addr1 = base_addr + 4'd0; rd_addr2 = base_addr + 4'd15; end + 3'd1 : begin rd_addr1 = base_addr + 4'd1; rd_addr2 = base_addr + 4'd14; end + 3'd2 : begin rd_addr1 = base_addr + 4'd2; rd_addr2 = base_addr + 4'd13; end + 3'd3 : begin rd_addr1 = base_addr + 4'd3; rd_addr2 = base_addr + 4'd12; end + 3'd4 : begin rd_addr1 = base_addr + 4'd4; rd_addr2 = base_addr + 4'd11; end + 3'd5 : begin rd_addr1 = base_addr + 4'd5; rd_addr2 = base_addr + 4'd10; end + 3'd6 : begin rd_addr1 = base_addr + 4'd6; rd_addr2 = base_addr + 4'd9; end + 3'd7 : begin rd_addr1 = base_addr + 4'd7; rd_addr2 = base_addr + 4'd8; end + default: begin rd_addr1 = base_addr + 4'd0; rd_addr2 = base_addr + 4'd15; end + endcase // case(phase) + + coeff_rom coeff_rom (.clock(clock),.addr(phase[2:0]-3'd1),.data(coeff)); + + ram16_2sum ram16_even (.clock(clock),.write(strobe_in & ~store_odd), + .wr_addr(base_addr),.wr_data(data_in), + .rd_addr1(rd_addr1),.rd_addr2(rd_addr2), + .sum(sum)); + + ram16 ram16_odd (.clock(clock),.write(strobe_in & store_odd), // Holds middle items + .wr_addr(base_addr),.wr_data(data_in), + //.rd_addr(base_addr+4'd7),.rd_data(middle_data)); + .rd_addr(base_addr+4'd6),.rd_data(middle_data)); + + mult mult(.clock(clock),.x(coeff),.y(sum),.product(product),.enable_in(mult_en),.enable_out(acc_en)); + + acc acc(.clock(clock),.reset(reset),.enable_in(acc_en),.enable_out(), + .clear(clear),.addend(product),.sum(sum_even)); + + wire signed [33:0] dout = sum_even + {{4{middle_data[15]}},middle_data,14'b0}; // We already divided product by 2!!!! + + always @(posedge clock) + if(reset) + data_out <= #1 16'd0; + else if(latch_result) + data_out <= #1 dout[30:15] + (dout[33]& |dout[14:0]); + + assign debugctrl = { clock,reset,acc_en,mult_en,clear,latch_result,store_odd,strobe_in,strobe_out,phase}; + +endmodule // halfband_decim diff --git a/fpga/sdr_lib/hb/halfband_interp.v b/fpga/sdr_lib/hb/halfband_interp.v new file mode 100644 index 0000000..cdb11c1 --- /dev/null +++ b/fpga/sdr_lib/hb/halfband_interp.v @@ -0,0 +1,121 @@ + + +module halfband_interp + (input clock, input reset, input enable, + input strobe_in, input strobe_out, + input [15:0] signal_in_i, input [15:0] signal_in_q, + output reg [15:0] signal_out_i, output reg [15:0] signal_out_q, + output wire [12:0] debug); + + wire [15:0] coeff_ram_out; + wire [15:0] data_ram_out_i; + wire [15:0] data_ram_out_q; + + wire [3:0] data_rd_addr; + reg [3:0] data_wr_addr; + reg [2:0] coeff_rd_addr; + + wire filt_done; + + wire [15:0] mac_out_i; + wire [15:0] mac_out_q; + reg [15:0] delayed_middle_i, delayed_middle_q; + wire [7:0] shift = 8'd9; + + reg stb_out_happened; + + wire [15:0] data_ram_out_i_b; + + always @(posedge clock) + if(strobe_in) + stb_out_happened <= #1 1'b0; + else if(strobe_out) + stb_out_happened <= #1 1'b1; + +assign debug = {filt_done,data_rd_addr,data_wr_addr,coeff_rd_addr}; + + wire [15:0] signal_out_i = stb_out_happened ? mac_out_i : delayed_middle_i; + wire [15:0] signal_out_q = stb_out_happened ? mac_out_q : delayed_middle_q; + +/* always @(posedge clock) + if(reset) + begin + signal_out_i <= #1 16'd0; + signal_out_q <= #1 16'd0; + end + else if(strobe_in) + begin + signal_out_i <= #1 delayed_middle_i; // Multiply by 1 for middle coeff + signal_out_q <= #1 delayed_middle_q; + end + //else if(filt_done&stb_out_happened) + else if(stb_out_happened) + begin + signal_out_i <= #1 mac_out_i; + signal_out_q <= #1 mac_out_q; + end +*/ + + always @(posedge clock) + if(reset) + coeff_rd_addr <= #1 3'd0; + else if(coeff_rd_addr != 3'd0) + coeff_rd_addr <= #1 coeff_rd_addr + 3'd1; + else if(strobe_in) + coeff_rd_addr <= #1 3'd1; + + reg filt_done_d1; + always@(posedge clock) + filt_done_d1 <= #1 filt_done; + + always @(posedge clock) + if(reset) + data_wr_addr <= #1 4'd0; + //else if(strobe_in) + else if(filt_done & ~filt_done_d1) + data_wr_addr <= #1 data_wr_addr + 4'd1; + + always @(posedge clock) + if(coeff_rd_addr == 3'd7) + begin + delayed_middle_i <= #1 data_ram_out_i_b; + // delayed_middle_q <= #1 data_ram_out_q_b; + end + +// always @(posedge clock) +// if(reset) +// data_rd_addr <= #1 4'd0; +// else if(strobe_in) +// data_rd_addr <= #1 data_wr_addr + 4'd1; +// else if(!filt_done) +// data_rd_addr <= #1 data_rd_addr + 4'd1; +// else +// data_rd_addr <= #1 data_wr_addr; + + wire [3:0] data_rd_addr1 = data_wr_addr + {1'b0,coeff_rd_addr}; + wire [3:0] data_rd_addr2 = data_wr_addr + 15 - {1'b0,coeff_rd_addr}; +// always @(posedge clock) +// if(reset) +// filt_done <= #1 1'b1; +// else if(strobe_in) + // filt_done <= #1 1'b0; +// else if(coeff_rd_addr == 4'd0) +// filt_done <= #1 1'b1; + + assign filt_done = (coeff_rd_addr == 3'd0); + + coeff_ram coeff_ram ( .clock(clock),.rd_addr({1'b0,coeff_rd_addr}),.rd_data(coeff_ram_out) ); + + ram16_2sum data_ram_i ( .clock(clock),.write(strobe_in),.wr_addr(data_wr_addr),.wr_data(signal_in_i), + .rd_addr1(data_rd_addr1),.rd_addr2(data_rd_addr2),.rd_data(data_ram_out_i_b),.sum(data_ram_out_i)); + + ram16_2sum data_ram_q ( .clock(clock),.write(strobe_in),.wr_addr(data_wr_addr),.wr_data(signal_in_q), + .rd_addr1(data_rd_addr1),.rd_addr2(data_rd_addr2),.rd_data(data_ram_out_q)); + + mac mac_i (.clock(clock),.reset(reset),.enable(~filt_done),.clear(strobe_in), + .x(data_ram_out_i),.y(coeff_ram_out),.shift(shift),.z(mac_out_i) ); + + mac mac_q (.clock(clock),.reset(reset),.enable(~filt_done),.clear(strobe_in), + .x(data_ram_out_q),.y(coeff_ram_out),.shift(shift),.z(mac_out_q) ); + +endmodule // halfband_interp diff --git a/fpga/sdr_lib/hb/hbd_tb/HBD b/fpga/sdr_lib/hb/hbd_tb/HBD new file mode 100644 index 0000000..574fbba --- /dev/null +++ b/fpga/sdr_lib/hb/hbd_tb/HBD @@ -0,0 +1,80 @@ +*-6.432683 5736 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +@28 +test_hbd.clock +test_hbd.reset +@420 +test_hbd.halfband_decim.middle_data[15:0] +@22 +test_hbd.halfband_decim.sum_even[33:0] +test_hbd.halfband_decim.base_addr[3:0] +@420 +test_hbd.i_in[15:0] +@24 +test_hbd.halfband_decim.phase[3:0] +test_hbd.halfband_decim.ram16_even.rd_addr1[3:0] +test_hbd.halfband_decim.ram16_even.rd_addr2[3:0] +test_hbd.halfband_decim.ram16_even.wr_addr[3:0] +test_hbd.halfband_decim.ram16_even.wr_data[15:0] +@28 +test_hbd.halfband_decim.ram16_even.write +@420 +test_hbd.halfband_decim.sum[15:0] +test_hbd.halfband_decim.product[30:0] +test_hbd.halfband_decim.dout[33:0] +test_hbd.halfband_decim.sum_even[33:0] +@22 +test_hbd.halfband_decim.acc.addend[30:0] +@28 +test_hbd.halfband_decim.acc.reset +@420 +test_hbd.halfband_decim.acc.sum[33:0] +test_hbd.halfband_decim.mult.x[15:0] +test_hbd.halfband_decim.mult.y[15:0] +@28 +test_hbd.halfband_decim.acc.clear +test_hbd.strobe_in +test_hbd.strobe_out +test_hbd.halfband_decim.acc_en +@420 +test_hbd.i_out[15:0] +@28 +test_hbd.halfband_decim.mult_en +test_hbd.halfband_decim.latch_result +@420 +test_hbd.halfband_decim.sum[15:0] +test_hbd.halfband_decim.sum_even[33:0] +test_hbd.halfband_decim.dout[33:0] +test_hbd.halfband_decim.data_out[15:0] +@22 +test_hbd.halfband_decim.data_out[15:0] +@28 +test_hbd.halfband_decim.dout[33:0] +@29 +test_hbd.halfband_decim.acc_en +@22 +test_hbd.halfband_decim.base_addr[3:0] +@28 +test_hbd.halfband_decim.clear +test_hbd.halfband_decim.latch_result +test_hbd.halfband_decim.mult_en +test_hbd.halfband_decim.mult_en_pre +@22 +test_hbd.halfband_decim.phase[3:0] +@28 +test_hbd.halfband_decim.start +test_hbd.halfband_decim.start_d1 +test_hbd.halfband_decim.start_d2 +test_hbd.halfband_decim.start_d3 +test_hbd.halfband_decim.start_d4 +test_hbd.halfband_decim.start_d5 +test_hbd.halfband_decim.start_d6 +test_hbd.halfband_decim.start_d7 +test_hbd.halfband_decim.start_d8 +test_hbd.halfband_decim.start_d9 +test_hbd.halfband_decim.start_dA +test_hbd.halfband_decim.start_dB +test_hbd.halfband_decim.start_dC +test_hbd.halfband_decim.start_dD +test_hbd.halfband_decim.store_odd +test_hbd.halfband_decim.strobe_in +test_hbd.halfband_decim.strobe_out diff --git a/fpga/sdr_lib/hb/hbd_tb/really_golden b/fpga/sdr_lib/hb/hbd_tb/really_golden new file mode 100644 index 0000000..2d24a9e --- /dev/null +++ b/fpga/sdr_lib/hb/hbd_tb/really_golden @@ -0,0 +1,142 @@ +VCD info: dumpfile test_hbd.vcd opened for output. + x + x + x + x + x + x + x + x + x + x + x + x + x + x + x + x + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 8192 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 +- 4 + 18 +- 63 + 167 +- 367 + 737 +- 1539 + 5146 + 5146 +- 1539 + 737 +- 367 + 167 +- 63 + 18 +- 4 + 0 + 0 + 0 + 0 + 0 +- 4 + 14 +- 49 + 118 +- 249 + 488 + 7141 +12287 +17433 +15894 +16631 +16264 +16432 +16368 +16387 +16383 +16383 +16383 +16383 +16383 +16387 +16368 +16432 +16264 +16631 +15894 + 9241 + 4095 +- 1051 + 488 +- 249 + 118 +- 49 + 14 +- 4 + 0 + 0 + 0 + 0 + 0 +- 4 + 14 +- 49 + 118 +- 249 + 488 +- 1051 +12287 +17433 +15894 +16631 +16264 +16432 +16368 +16387 +16383 +16383 +16383 +16383 +16383 +16387 +16368 +16432 +16264 +16631 +15894 +17433 + 4095 +- 1051 + 488 +- 249 + 118 +- 49 + 14 +- 4 + 0 + 0 + 0 + 0 diff --git a/fpga/sdr_lib/hb/hbd_tb/regression b/fpga/sdr_lib/hb/hbd_tb/regression new file mode 100644 index 0000000..fc279c2 --- /dev/null +++ b/fpga/sdr_lib/hb/hbd_tb/regression @@ -0,0 +1,95 @@ +echo "Baseline 1000" +iverilog -y .. -o test_hbd -DRATE=1000 test_hbd.v ; ./test_hbd >golden +diff golden really_golden + +echo +echo "Test 100" +iverilog -y .. -o test_hbd -DRATE=100 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 50" +iverilog -y .. -o test_hbd -DRATE=50 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 40" +iverilog -y .. -o test_hbd -DRATE=40 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 30" +iverilog -y .. -o test_hbd -DRATE=30 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 25" +iverilog -y .. -o test_hbd -DRATE=25 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 20" +iverilog -y .. -o test_hbd -DRATE=20 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 19" +iverilog -y .. -o test_hbd -DRATE=19 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 18" +iverilog -y .. -o test_hbd -DRATE=18 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 17" +iverilog -y .. -o test_hbd -DRATE=17 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 16" +iverilog -y .. -o test_hbd -DRATE=16 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 15" +iverilog -y .. -o test_hbd -DRATE=15 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 14" +iverilog -y .. -o test_hbd -DRATE=14 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 13" +iverilog -y .. -o test_hbd -DRATE=13 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 12" +iverilog -y .. -o test_hbd -DRATE=12 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 11" +iverilog -y .. -o test_hbd -DRATE=11 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 10" +iverilog -y .. -o test_hbd -DRATE=10 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 9" +iverilog -y .. -o test_hbd -DRATE=9 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 8" +iverilog -y .. -o test_hbd -DRATE=8 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 7" +iverilog -y .. -o test_hbd -DRATE=7 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 6" +iverilog -y .. -o test_hbd -DRATE=6 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 5" +iverilog -y .. -o test_hbd -DRATE=5 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 4" +iverilog -y .. -o test_hbd -DRATE=4 test_hbd.v ; ./test_hbd >output ; diff output golden + +echo +echo "Test 3" +iverilog -y .. -o test_hbd -DRATE=3 test_hbd.v ; ./test_hbd >output ; diff output golden diff --git a/fpga/sdr_lib/hb/hbd_tb/run_hbd b/fpga/sdr_lib/hb/hbd_tb/run_hbd new file mode 100755 index 0000000..b8aec75 --- /dev/null +++ b/fpga/sdr_lib/hb/hbd_tb/run_hbd @@ -0,0 +1,4 @@ +#!/bin/sh + +iverilog -y .. -o test_hbd test_hbd.v +./test_hbd diff --git a/fpga/sdr_lib/hb/hbd_tb/test_hbd.v b/fpga/sdr_lib/hb/hbd_tb/test_hbd.v new file mode 100644 index 0000000..01ab5e7 --- /dev/null +++ b/fpga/sdr_lib/hb/hbd_tb/test_hbd.v @@ -0,0 +1,75 @@ + + +module test_hbd(); + + reg clock; + initial clock = 1'b0; + always #5 clock <= ~clock; + + reg reset; + initial reset = 1'b1; + initial #1000 reset = 1'b0; + + initial $dumpfile("test_hbd.vcd"); + initial $dumpvars(0,test_hbd); + + reg [15:0] i_in, q_in; + wire [15:0] i_out, q_out; + + reg strobe_in; + wire strobe_out; + reg coeff_write; + reg [15:0] coeff_data; + reg [4:0] coeff_addr; + + halfband_decim halfband_decim + ( .clock(clock),.reset(reset),.enable(),.strobe_in(strobe_in),.strobe_out(strobe_out), + .data_in(i_in),.data_out(i_out) ); + + always @(posedge strobe_out) + if(i_out[15]) + $display("-%d",65536-i_out); + else + $display("%d",i_out); + + initial + begin + strobe_in = 1'b0; + @(negedge reset); + @(posedge clock); + while(1) + begin + strobe_in <= #1 1'b1; + @(posedge clock); + strobe_in <= #1 1'b0; + repeat (`RATE) + @(posedge clock); + end + end + + initial #10000000 $finish; // Just in case... + + initial + begin + i_in <= #1 16'd0; + repeat (40) @(posedge strobe_in); + i_in <= #1 16'd16384; + @(posedge strobe_in); + i_in <= #1 16'd0; + repeat (40) @(posedge strobe_in); + i_in <= #1 16'd16384; + @(posedge strobe_in); + i_in <= #1 16'd0; + repeat (40) @(posedge strobe_in); + i_in <= #1 16'd16384; + repeat (40) @(posedge strobe_in); + i_in <= #1 16'd0; + repeat (41) @(posedge strobe_in); + i_in <= #1 16'd16384; + repeat (40) @(posedge strobe_in); + i_in <= #1 16'd0; + repeat (40) @(posedge strobe_in); + repeat (7) @(posedge clock); + $finish; + end // initial begin +endmodule // test_hb diff --git a/fpga/sdr_lib/hb/mac.v b/fpga/sdr_lib/hb/mac.v new file mode 100644 index 0000000..5a270bc --- /dev/null +++ b/fpga/sdr_lib/hb/mac.v @@ -0,0 +1,58 @@ + + +module mac (input clock, input reset, input enable, input clear, + input signed [15:0] x, input signed [15:0] y, + input [7:0] shift, output [15:0] z ); + + reg signed [30:0] product; + reg signed [39:0] z_int; + reg signed [15:0] z_shift; + + reg enable_d1; + always @(posedge clock) + enable_d1 <= #1 enable; + + always @(posedge clock) + if(reset | clear) + z_int <= #1 40'd0; + else if(enable_d1) + z_int <= #1 z_int + {{9{product[30]}},product}; + + always @(posedge clock) + product <= #1 x*y; + + always @* // FIXME full case? parallel case? + case(shift) + //8'd0 : z_shift <= z_int[39:24]; + //8'd1 : z_shift <= z_int[38:23]; + //8'd2 : z_shift <= z_int[37:22]; + //8'd3 : z_shift <= z_int[36:21]; + //8'd4 : z_shift <= z_int[35:20]; + //8'd5 : z_shift <= z_int[34:19]; + 8'd6 : z_shift <= z_int[33:18]; + 8'd7 : z_shift <= z_int[32:17]; + 8'd8 : z_shift <= z_int[31:16]; + 8'd9 : z_shift <= z_int[30:15]; + 8'd10 : z_shift <= z_int[29:14]; + 8'd11 : z_shift <= z_int[28:13]; + //8'd12 : z_shift <= z_int[27:12]; + //8'd13 : z_shift <= z_int[26:11]; + //8'd14 : z_shift <= z_int[25:10]; + //8'd15 : z_shift <= z_int[24:9]; + //8'd16 : z_shift <= z_int[23:8]; + //8'd17 : z_shift <= z_int[22:7]; + //8'd18 : z_shift <= z_int[21:6]; + //8'd19 : z_shift <= z_int[20:5]; + //8'd20 : z_shift <= z_int[19:4]; + //8'd21 : z_shift <= z_int[18:3]; + //8'd22 : z_shift <= z_int[17:2]; + //8'd23 : z_shift <= z_int[16:1]; + //8'd24 : z_shift <= z_int[15:0]; + default : z_shift <= z_int[15:0]; + endcase // case(shift) + + // FIXME do we need to saturate? + //assign z = z_shift; + assign z = z_int[15:0]; + +endmodule // mac diff --git a/fpga/sdr_lib/hb/mult.v b/fpga/sdr_lib/hb/mult.v new file mode 100644 index 0000000..a8d4cb1 --- /dev/null +++ b/fpga/sdr_lib/hb/mult.v @@ -0,0 +1,16 @@ + + +module mult (input clock, input signed [15:0] x, input signed [15:0] y, output reg signed [30:0] product, + input enable_in, output reg enable_out ); + + always @(posedge clock) + if(enable_in) + product <= #1 x*y; + else + product <= #1 31'd0; + + always @(posedge clock) + enable_out <= #1 enable_in; + +endmodule // mult + diff --git a/fpga/sdr_lib/hb/ram16_2port.v b/fpga/sdr_lib/hb/ram16_2port.v new file mode 100644 index 0000000..e1761a9 --- /dev/null +++ b/fpga/sdr_lib/hb/ram16_2port.v @@ -0,0 +1,22 @@ + + +module ram16_2port (input clock, input write, + input [3:0] wr_addr, input [15:0] wr_data, + input [3:0] rd_addr1, output reg [15:0] rd_data1, + input [3:0] rd_addr2, output reg [15:0] rd_data2); + + reg [15:0] ram_array [0:31]; + + always @(posedge clock) + rd_data1 <= #1 ram_array[rd_addr1]; + + always @(posedge clock) + rd_data2 <= #1 ram_array[rd_addr2]; + + always @(posedge clock) + if(write) + ram_array[wr_addr] <= #1 wr_data; + +endmodule // ram16_2port + + diff --git a/fpga/sdr_lib/hb/ram16_2sum.v b/fpga/sdr_lib/hb/ram16_2sum.v new file mode 100644 index 0000000..559b06f --- /dev/null +++ b/fpga/sdr_lib/hb/ram16_2sum.v @@ -0,0 +1,27 @@ + + +module ram16_2sum (input clock, input write, + input [3:0] wr_addr, input [15:0] wr_data, + input [3:0] rd_addr1, input [3:0] rd_addr2, + output reg [15:0] sum); + + reg signed [15:0] ram_array [0:15]; + reg signed [15:0] a,b; + wire signed [16:0] sum_int; + + always @(posedge clock) + if(write) + ram_array[wr_addr] <= #1 wr_data; + + always @(posedge clock) + begin + a <= #1 ram_array[rd_addr1]; + b <= #1 ram_array[rd_addr2]; + end + + assign sum_int = {a[15],a} + {b[15],b}; + + always @(posedge clock) + sum <= #1 sum_int[16:1] + (sum_int[16]&sum_int[0]); + +endmodule // ram16_2sum diff --git a/fpga/sdr_lib/hb/ram32_2sum.v b/fpga/sdr_lib/hb/ram32_2sum.v new file mode 100644 index 0000000..d1f55b7 --- /dev/null +++ b/fpga/sdr_lib/hb/ram32_2sum.v @@ -0,0 +1,22 @@ + + +module ram32_2sum (input clock, input write, + input [4:0] wr_addr, input [15:0] wr_data, + input [4:0] rd_addr1, input [4:0] rd_addr2, + output reg [15:0] sum); + + reg [15:0] ram_array [0:31]; + wire [16:0] sum_int; + + always @(posedge clock) + if(write) + ram_array[wr_addr] <= #1 wr_data; + + assign sum_int = ram_array[rd_addr1] + ram_array[rd_addr2]; + + always @(posedge clock) + sum <= #1 sum_int[16:1] + (sum_int[16]&sum_int[0]); + + +endmodule // ram32_2sum + diff --git a/fpga/sdr_lib/io_pins.v b/fpga/sdr_lib/io_pins.v new file mode 100644 index 0000000..da20b3b --- /dev/null +++ b/fpga/sdr_lib/io_pins.v @@ -0,0 +1,52 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2005,2006 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + +`include "../../firmware/include/fpga_regs_common.v" +`include "../../firmware/include/fpga_regs_standard.v" + +module io_pins + ( inout wire [15:0] io_0, inout wire [15:0] io_1, inout wire [15:0] io_2, inout wire [15:0] io_3, + input wire [15:0] reg_0, input wire [15:0] reg_1, input wire [15:0] reg_2, input wire [15:0] reg_3, + input clock, input rx_reset, input tx_reset, + input [6:0] serial_addr, input [31:0] serial_data, input serial_strobe); + + reg [15:0] io_0_oe,io_1_oe,io_2_oe,io_3_oe; + + bidir_reg bidir_reg_0 (.tristate(io_0),.oe(io_0_oe),.reg_val(reg_0)); + bidir_reg bidir_reg_1 (.tristate(io_1),.oe(io_1_oe),.reg_val(reg_1)); + bidir_reg bidir_reg_2 (.tristate(io_2),.oe(io_2_oe),.reg_val(reg_2)); + bidir_reg bidir_reg_3 (.tristate(io_3),.oe(io_3_oe),.reg_val(reg_3)); + + // Upper 16 bits are mask for lower 16 + always @(posedge clock) + if(serial_strobe) + case(serial_addr) + `FR_OE_0 : io_0_oe + <= #1 (io_0_oe & ~serial_data[31:16]) | (serial_data[15:0] & serial_data[31:16] ); + `FR_OE_1 : io_1_oe + <= #1 (io_1_oe & ~serial_data[31:16]) | (serial_data[15:0] & serial_data[31:16] ); + `FR_OE_2 : io_2_oe + <= #1 (io_2_oe & ~serial_data[31:16]) | (serial_data[15:0] & serial_data[31:16] ); + `FR_OE_3 : io_3_oe + <= #1 (io_3_oe & ~serial_data[31:16]) | (serial_data[15:0] & serial_data[31:16] ); + endcase // case(serial_addr) + +endmodule // io_pins diff --git a/fpga/sdr_lib/master_control.v b/fpga/sdr_lib/master_control.v new file mode 100644 index 0000000..d42817c --- /dev/null +++ b/fpga/sdr_lib/master_control.v @@ -0,0 +1,155 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003,2005 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + +// Clock, enable, and reset controls for whole system + +module master_control + ( input master_clk, input usbclk, + input wire [6:0] serial_addr, input wire [31:0] serial_data, input wire serial_strobe, + output tx_bus_reset, output rx_bus_reset, + output wire tx_dsp_reset, output wire rx_dsp_reset, + output wire enable_tx, output wire enable_rx, + output wire [7:0] interp_rate, output wire [7:0] decim_rate, + output tx_sample_strobe, output strobe_interp, + output rx_sample_strobe, output strobe_decim, + input tx_empty, + input wire [15:0] debug_0,input wire [15:0] debug_1,input wire [15:0] debug_2,input wire [15:0] debug_3, + output wire [15:0] reg_0, output wire [15:0] reg_1, output wire [15:0] reg_2, output wire [15:0] reg_3 + ); + + // FIXME need a separate reset for all control settings + // Master Controls assignments + wire [7:0] master_controls; + setting_reg #(`FR_MASTER_CTRL) sr_mstr_ctrl(.clock(master_clk),.reset(1'b0),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(master_controls)); + assign enable_tx = master_controls[0]; + assign enable_rx = master_controls[1]; + assign tx_dsp_reset = master_controls[2]; + assign rx_dsp_reset = master_controls[3]; + // Unused - 4-7 + + // Strobe Generators + setting_reg #(`FR_INTERP_RATE) sr_interp(.clock(master_clk),.reset(tx_dsp_reset),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(interp_rate)); + setting_reg #(`FR_DECIM_RATE) sr_decim(.clock(master_clk),.reset(rx_dsp_reset),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(decim_rate)); + + strobe_gen da_strobe_gen + ( .clock(master_clk),.reset(tx_dsp_reset),.enable(enable_tx), + .rate(8'd1),.strobe_in(1'b1),.strobe(tx_sample_strobe) ); + + strobe_gen tx_strobe_gen + ( .clock(master_clk),.reset(tx_dsp_reset),.enable(enable_tx), + .rate(interp_rate),.strobe_in(tx_sample_strobe),.strobe(strobe_interp) ); + + assign rx_sample_strobe = 1'b1; + + strobe_gen decim_strobe_gen + ( .clock(master_clk),.reset(rx_dsp_reset),.enable(enable_rx), + .rate(decim_rate),.strobe_in(rx_sample_strobe),.strobe(strobe_decim) ); + + // Reset syncs for bus (usbclk) side + // The RX bus side reset isn't used, the TX bus side one may not be needed + reg tx_reset_bus_sync1, rx_reset_bus_sync1, tx_reset_bus_sync2, rx_reset_bus_sync2; + + always @(posedge usbclk) + begin + tx_reset_bus_sync1 <= #1 tx_dsp_reset; + rx_reset_bus_sync1 <= #1 rx_dsp_reset; + tx_reset_bus_sync2 <= #1 tx_reset_bus_sync1; + rx_reset_bus_sync2 <= #1 rx_reset_bus_sync1; + end + + assign tx_bus_reset = tx_reset_bus_sync2; + assign rx_bus_reset = rx_reset_bus_sync2; + + wire [7:0] txa_refclk, rxa_refclk, txb_refclk, rxb_refclk; + wire txaclk,txbclk,rxaclk,rxbclk; + wire [3:0] debug_en, txcvr_ctrl; + + wire [31:0] txcvr_rxlines, txcvr_txlines; + + setting_reg #(`FR_TX_A_REFCLK) sr_txaref(.clock(master_clk),.reset(tx_dsp_reset),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(txa_refclk)); + setting_reg #(`FR_RX_A_REFCLK) sr_rxaref(.clock(master_clk),.reset(rx_dsp_reset),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(rxa_refclk)); + setting_reg #(`FR_TX_B_REFCLK) sr_txbref(.clock(master_clk),.reset(tx_dsp_reset),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(txb_refclk)); + setting_reg #(`FR_RX_B_REFCLK) sr_rxbref(.clock(master_clk),.reset(rx_dsp_reset),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(rxb_refclk)); + + setting_reg #(`FR_DEBUG_EN) sr_debugen(.clock(master_clk),.reset(rx_dsp_reset|tx_dsp_reset),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(debug_en)); + + clk_divider clk_div_0 (.reset(tx_dsp_reset),.in_clk(master_clk),.out_clk(txaclk),.ratio(txa_refclk[6:0])); + clk_divider clk_div_1 (.reset(rx_dsp_reset),.in_clk(master_clk),.out_clk(rxaclk),.ratio(rxa_refclk[6:0])); + clk_divider clk_div_2 (.reset(tx_dsp_reset),.in_clk(master_clk),.out_clk(txbclk),.ratio(txb_refclk[6:0])); + clk_divider clk_div_3 (.reset(rx_dsp_reset),.in_clk(master_clk),.out_clk(rxbclk),.ratio(rxb_refclk[6:0])); + + reg [15:0] io_0_reg,io_1_reg,io_2_reg,io_3_reg; + // Upper 16 bits are mask for lower 16 + always @(posedge master_clk) + if(serial_strobe) + case(serial_addr) + `FR_IO_0 : io_0_reg + <= #1 (io_0_reg & ~serial_data[31:16]) | (serial_data[15:0] & serial_data[31:16] ); + `FR_IO_1 : io_1_reg + <= #1 (io_1_reg & ~serial_data[31:16]) | (serial_data[15:0] & serial_data[31:16] ); + `FR_IO_2 : io_2_reg + <= #1 (io_2_reg & ~serial_data[31:16]) | (serial_data[15:0] & serial_data[31:16] ); + `FR_IO_3 : io_3_reg + <= #1 (io_3_reg & ~serial_data[31:16]) | (serial_data[15:0] & serial_data[31:16] ); + endcase // case(serial_addr) + + wire transmit_now = !tx_empty & enable_tx; + wire atr_ctl; + wire [15:0] atr_mask_0, atr_txval_0, atr_rxval_0, atr_mask_1, atr_txval_1, atr_rxval_1, atr_mask_2, atr_txval_2, atr_rxval_2, atr_mask_3, atr_txval_3, atr_rxval_3; + + setting_reg #(`FR_ATR_MASK_0) sr_atr_mask_0(.clock(master_clk),.reset(1'b0),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(atr_mask_0)); + setting_reg #(`FR_ATR_TXVAL_0) sr_atr_txval_0(.clock(master_clk),.reset(1'b0),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(atr_txval_0)); + setting_reg #(`FR_ATR_RXVAL_0) sr_atr_rxval_0(.clock(master_clk),.reset(1'b0),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(atr_rxval_0)); + + setting_reg #(`FR_ATR_MASK_1) sr_atr_mask_1(.clock(master_clk),.reset(1'b0),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(atr_mask_1)); + setting_reg #(`FR_ATR_TXVAL_1) sr_atr_txval_1(.clock(master_clk),.reset(1'b0),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(atr_txval_1)); + setting_reg #(`FR_ATR_RXVAL_1) sr_atr_rxval_1(.clock(master_clk),.reset(1'b0),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(atr_rxval_1)); + + setting_reg #(`FR_ATR_MASK_2) sr_atr_mask_2(.clock(master_clk),.reset(1'b0),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(atr_mask_2)); + setting_reg #(`FR_ATR_TXVAL_2) sr_atr_txval_2(.clock(master_clk),.reset(1'b0),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(atr_txval_2)); + setting_reg #(`FR_ATR_RXVAL_2) sr_atr_rxval_2(.clock(master_clk),.reset(1'b0),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(atr_rxval_2)); + + setting_reg #(`FR_ATR_MASK_3) sr_atr_mask_3(.clock(master_clk),.reset(1'b0),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(atr_mask_3)); + setting_reg #(`FR_ATR_TXVAL_3) sr_atr_txval_3(.clock(master_clk),.reset(1'b0),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(atr_txval_3)); + setting_reg #(`FR_ATR_RXVAL_3) sr_atr_rxval_3(.clock(master_clk),.reset(1'b0),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(atr_rxval_3)); + + //setting_reg #(`FR_ATR_CTL) sr_atr_ctl(.clock(master_clk),.reset(1'b0),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(atr_ctl)); + assign atr_ctl = 1'b1; + + wire [15:0] atr_selected_0 = transmit_now ? atr_txval_0 : atr_rxval_0; + wire [15:0] io_0 = ({{16{atr_ctl}}} & atr_mask_0 & atr_selected_0) | (~({{16{atr_ctl}}} & atr_mask_0) & io_0_reg); + + wire [15:0] atr_selected_1 = transmit_now ? atr_txval_1 : atr_rxval_1; + wire [15:0] io_1 = ({{16{atr_ctl}}} & atr_mask_1 & atr_selected_1) | (~({{16{atr_ctl}}} & atr_mask_1) & io_1_reg); + + wire [15:0] atr_selected_2 = transmit_now ? atr_txval_2 : atr_rxval_2; + wire [15:0] io_2 = ({{16{atr_ctl}}} & atr_mask_2 & atr_selected_2) | (~({{16{atr_ctl}}} & atr_mask_2) & io_2_reg); + + wire [15:0] atr_selected_3 = transmit_now ? atr_txval_3 : atr_rxval_3; + wire [15:0] io_3 = ({{16{atr_ctl}}} & atr_mask_3 & atr_selected_3) | (~({{16{atr_ctl}}} & atr_mask_3) & io_3_reg); + + assign reg_0 = debug_en[0] ? debug_0 : txa_refclk[7] ? {io_0[15:1],txaclk} : io_0; + assign reg_1 = debug_en[1] ? debug_1 : rxa_refclk[7] ? {io_1[15:1],rxaclk} : io_1; + assign reg_2 = debug_en[2] ? debug_2 : txb_refclk[7] ? {io_2[15:1],txbclk} : io_2; + assign reg_3 = debug_en[3] ? debug_3 : rxb_refclk[7] ? {io_3[15:1],rxbclk} : io_3; + + +endmodule // master_control diff --git a/fpga/sdr_lib/master_control_multi.v b/fpga/sdr_lib/master_control_multi.v new file mode 100644 index 0000000..af1e0b1 --- /dev/null +++ b/fpga/sdr_lib/master_control_multi.v @@ -0,0 +1,73 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2006 Martin Dudok van Heel +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// +`include "usrp_multi.vh" +`include "../../../firmware/include/fpga_regs_common.v" +`include "../../../firmware/include/fpga_regs_standard.v" +// Clock, enable, and reset controls for whole system +// Modified version to enable multi_usrp synchronisation + +module master_control_multi + ( input master_clk, input usbclk, + input wire [6:0] serial_addr, input wire [31:0] serial_data, input wire serial_strobe, + input wire rx_slave_sync, + output tx_bus_reset, output rx_bus_reset, + output wire tx_dsp_reset, output wire rx_dsp_reset, + output wire enable_tx, output wire enable_rx, + output wire sync_rx, + output wire [7:0] interp_rate, output wire [7:0] decim_rate, + output tx_sample_strobe, output strobe_interp, + output rx_sample_strobe, output strobe_decim, + input tx_empty, + input wire [15:0] debug_0,input wire [15:0] debug_1,input wire [15:0] debug_2,input wire [15:0] debug_3, + output wire [15:0] reg_0, output wire [15:0] reg_1, output wire [15:0] reg_2, output wire [15:0] reg_3 + ); + + wire [15:0] reg_1_std; + + master_control master_control_standard + ( .master_clk(master_clk),.usbclk(usbclk), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .tx_bus_reset(tx_bus_reset),.rx_bus_reset(rx_bus_reset), + .tx_dsp_reset(tx_dsp_reset),.rx_dsp_reset(rx_dsp_reset), + .enable_tx(enable_tx),.enable_rx(enable_rx), + .interp_rate(interp_rate),.decim_rate(decim_rate), + .tx_sample_strobe(tx_sample_strobe),.strobe_interp(strobe_interp), + .rx_sample_strobe(rx_sample_strobe),.strobe_decim(strobe_decim), + .tx_empty(tx_empty), + .debug_0(debug_0),.debug_1(debug_1), + .debug_2(debug_2),.debug_3(debug_3), + .reg_0(reg_0),.reg_1(reg_1_std),.reg_2(reg_2),.reg_3(reg_3) ); + + // FIXME need a separate reset for all control settings + // Master/slave Controls assignments + wire [7:0] rx_master_slave_controls; + setting_reg_masked #(`FR_RX_MASTER_SLAVE) sr_rx_mstr_slv_ctrl(.clock(master_clk),.reset(1'b0),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(rx_master_slave_controls)); + + assign sync_rx = rx_master_slave_controls[`bitnoFR_RX_SYNC] | (rx_master_slave_controls[`bitnoFR_RX_SYNC_SLAVE] & rx_slave_sync); + //sync if we are told by master_control or if we get a hardware slave sync + //TODO There can be a one sample difference between master and slave sync. + // Maybe use a register for sync_rx which uses the (neg or pos) edge of master_clock and/or rx_slave_sync to trigger + // Or even use a seperate sync_rx_out and sync_rx_internal (which lags behind) + //TODO make output pin not hardwired +assign reg_1 ={(rx_master_slave_controls[`bitnoFR_RX_SYNC_MASTER])? sync_rx:reg_1_std[15],reg_1_std[14:0]}; + + +endmodule // master_control diff --git a/fpga/sdr_lib/phase_acc.v b/fpga/sdr_lib/phase_acc.v new file mode 100755 index 0000000..d00716f --- /dev/null +++ b/fpga/sdr_lib/phase_acc.v @@ -0,0 +1,52 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + + + +// Basic Phase accumulator for DDS + + +module phase_acc (clk,reset,enable,strobe,serial_addr,serial_data,serial_strobe,phase); + parameter FREQADDR = 0; + parameter PHASEADDR = 0; + parameter resolution = 32; + + input clk, reset, enable, strobe; + input [6:0] serial_addr; + input [31:0] serial_data; + input serial_strobe; + + output reg [resolution-1:0] phase; + wire [resolution-1:0] freq; + + setting_reg #(FREQADDR) sr_rxfreq0(.clock(clk),.reset(1'b0),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(freq)); + + always @(posedge clk) + if(reset) + phase <= #1 32'b0; + else if(serial_strobe & (serial_addr == PHASEADDR)) + phase <= #1 serial_data; + else if(enable & strobe) + phase <= #1 phase + freq; + +endmodule // phase_acc + + diff --git a/fpga/sdr_lib/ram.v b/fpga/sdr_lib/ram.v new file mode 100644 index 0000000..fb64cde --- /dev/null +++ b/fpga/sdr_lib/ram.v @@ -0,0 +1,16 @@ + + +module ram (input clock, input write, + input [4:0] wr_addr, input [15:0] wr_data, + input [4:0] rd_addr, output reg [15:0] rd_data); + + reg [15:0] ram_array [0:31]; + + always @(posedge clock) + rd_data <= #1 ram_array[rd_addr]; + + always @(posedge clock) + if(write) + ram_array[wr_addr] <= #1 wr_data; + +endmodule // ram diff --git a/fpga/sdr_lib/ram16.v b/fpga/sdr_lib/ram16.v new file mode 100644 index 0000000..0c93da2 --- /dev/null +++ b/fpga/sdr_lib/ram16.v @@ -0,0 +1,17 @@ + + +module ram16 (input clock, input write, + input [3:0] wr_addr, input [15:0] wr_data, + input [3:0] rd_addr, output reg [15:0] rd_data); + + reg [15:0] ram_array [0:15]; + + always @(posedge clock) + rd_data <= #1 ram_array[rd_addr]; + + always @(posedge clock) + if(write) + ram_array[wr_addr] <= #1 wr_data; + +endmodule // ram16 + diff --git a/fpga/sdr_lib/ram32.v b/fpga/sdr_lib/ram32.v new file mode 100644 index 0000000..064e273 --- /dev/null +++ b/fpga/sdr_lib/ram32.v @@ -0,0 +1,17 @@ + + +module ram32 (input clock, input write, + input [4:0] wr_addr, input [15:0] wr_data, + input [4:0] rd_addr, output reg [15:0] rd_data); + + reg [15:0] ram_array [0:31]; + + always @(posedge clock) + rd_data <= #1 ram_array[rd_addr]; + + always @(posedge clock) + if(write) + ram_array[wr_addr] <= #1 wr_data; + +endmodule // ram32 + diff --git a/fpga/sdr_lib/ram64.v b/fpga/sdr_lib/ram64.v new file mode 100644 index 0000000..0845458 --- /dev/null +++ b/fpga/sdr_lib/ram64.v @@ -0,0 +1,16 @@ + + +module ram64 (input clock, input write, + input [5:0] wr_addr, input [15:0] wr_data, + input [5:0] rd_addr, output reg [15:0] rd_data); + + reg [15:0] ram_array [0:63]; + + always @(posedge clock) + rd_data <= #1 ram_array[rd_addr]; + + always @(posedge clock) + if(write) + ram_array[wr_addr] <= #1 wr_data; + +endmodule // ram64 diff --git a/fpga/sdr_lib/rssi.v b/fpga/sdr_lib/rssi.v new file mode 100644 index 0000000..e45e214 --- /dev/null +++ b/fpga/sdr_lib/rssi.v @@ -0,0 +1,30 @@ + + +module rssi (input clock, input reset, input enable, + input [11:0] adc, output [15:0] rssi, output [15:0] over_count); + + wire over_hi = (adc == 12'h7FF); + wire over_lo = (adc == 12'h800); + wire over = over_hi | over_lo; + + reg [25:0] over_count_int; + always @(posedge clock) + if(reset | ~enable) + over_count_int <= #1 26'd0; + else + over_count_int <= #1 over_count_int + (over ? 26'd65535 : 26'd0) - over_count_int[25:10]; + + assign over_count = over_count_int[25:10]; + + wire [11:0] abs_adc = adc[11] ? ~adc : adc; + + reg [25:0] rssi_int; + always @(posedge clock) + if(reset | ~enable) + rssi_int <= #1 26'd0; + else + rssi_int <= #1 rssi_int + abs_adc - rssi_int[25:10]; + + assign rssi = rssi_int[25:10]; + +endmodule // rssi diff --git a/fpga/sdr_lib/rx_buffer.v b/fpga/sdr_lib/rx_buffer.v new file mode 100644 index 0000000..70c800e --- /dev/null +++ b/fpga/sdr_lib/rx_buffer.v @@ -0,0 +1,182 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + +// Interface to Cypress FX2 bus +// A packet is 512 Bytes. Each fifo line is 2 bytes +// Fifo has 1024 or 2048 lines + +`include "../../firmware/include/fpga_regs_common.v" +`include "../../firmware/include/fpga_regs_standard.v" + +module rx_buffer + ( input usbclk, + input bus_reset, // Not used in RX + input reset, // DSP side reset (used here), do not reset registers + input reset_regs, //Only reset registers + output [15:0] usbdata, + input RD, + output wire have_pkt_rdy, + output reg rx_overrun, + input wire [3:0] channels, + input wire [15:0] ch_0, + input wire [15:0] ch_1, + input wire [15:0] ch_2, + input wire [15:0] ch_3, + input wire [15:0] ch_4, + input wire [15:0] ch_5, + input wire [15:0] ch_6, + input wire [15:0] ch_7, + input rxclk, + input rxstrobe, + input clear_status, + input [6:0] serial_addr, input [31:0] serial_data, input serial_strobe, + output [15:0] debugbus + ); + + wire [15:0] fifodata, fifodata_8; + reg [15:0] fifodata_16; + + wire [11:0] rxfifolevel; + wire rx_empty, rx_full; + + wire bypass_hb, want_q; + wire [4:0] bitwidth; + wire [3:0] bitshift; + + setting_reg #(`FR_RX_FORMAT) sr_rxformat(.clock(rxclk),.reset(reset_regs), + .strobe(serial_strobe),.addr(serial_addr),.in(serial_data), + .out({bypass_hb,want_q,bitwidth,bitshift})); + + // Receive FIFO (ADC --> USB) + + // 257 Bug Fix + reg [8:0] read_count; + always @(negedge usbclk) + if(bus_reset) + read_count <= #1 9'd0; + else if(RD & ~read_count[8]) + read_count <= #1 read_count + 9'd1; + else + read_count <= #1 RD ? read_count : 9'b0; + + // Detect overrun + always @(posedge rxclk) + if(reset) + rx_overrun <= 1'b0; + else if(rxstrobe & (store_next != 0)) + rx_overrun <= 1'b1; + else if(clear_status) + rx_overrun <= 1'b0; + + reg [3:0] store_next; + always @(posedge rxclk) + if(reset) + store_next <= #1 4'd0; + else if(rxstrobe & (store_next == 0)) + store_next <= #1 4'd1; + else if(~rx_full & (store_next == channels)) + store_next <= #1 4'd0; + else if(~rx_full & (bitwidth == 5'd8) & (store_next == (channels>>1))) + store_next <= #1 4'd0; + else if(~rx_full & (store_next != 0)) + store_next <= #1 store_next + 4'd1; + + assign fifodata = (bitwidth == 5'd8) ? fifodata_8 : fifodata_16; + + assign fifodata_8 = {round_8(top),round_8(bottom)}; + reg [15:0] top,bottom; + + function [7:0] round_8; + input [15:0] in_val; + + round_8 = in_val[15:8] + (in_val[15] & |in_val[7:0]); + endfunction // round_8 + + always @* + case(store_next) + 4'd1 : begin + bottom = ch_0; + top = ch_1; + end + 4'd2 : begin + bottom = ch_2; + top = ch_3; + end + 4'd3 : begin + bottom = ch_4; + top = ch_5; + end + 4'd4 : begin + bottom = ch_6; + top = ch_7; + end + default : begin + top = 16'hFFFF; + bottom = 16'hFFFF; + end + endcase // case(store_next) + + always @* + case(store_next) + 4'd1 : fifodata_16 = ch_0; + 4'd2 : fifodata_16 = ch_1; + 4'd3 : fifodata_16 = ch_2; + 4'd4 : fifodata_16 = ch_3; + 4'd5 : fifodata_16 = ch_4; + 4'd6 : fifodata_16 = ch_5; + 4'd7 : fifodata_16 = ch_6; + 4'd8 : fifodata_16 = ch_7; + default : fifodata_16 = 16'hFFFF; + endcase // case(store_next) + + fifo_4k rxfifo + ( .data ( fifodata ), + .wrreq (~rx_full & (store_next != 0)), + .wrclk ( rxclk ), + + .q ( usbdata ), + .rdreq ( RD & ~read_count[8] ), + .rdclk ( ~usbclk ), + + .aclr ( reset ), // This one is asynchronous, so we can use either reset + + .rdempty ( rx_empty ), + .rdusedw ( rxfifolevel ), + .wrfull ( rx_full ), + .wrusedw ( ) + ); + + assign have_pkt_rdy = (rxfifolevel >= 256); + + // Debugging Aids + assign debugbus[0] = RD; + assign debugbus[1] = rx_overrun; + assign debugbus[2] = read_count[8]; + assign debugbus[3] = rx_full; + assign debugbus[4] = rxstrobe; + assign debugbus[5] = usbclk; + assign debugbus[6] = have_pkt_rdy; + assign debugbus[10:7] = store_next; + //assign debugbus[15:11] = rxfifolevel[4:0]; + assign debugbus[15:11] = bitwidth; + +endmodule // rx_buffer + diff --git a/fpga/sdr_lib/rx_chain.v b/fpga/sdr_lib/rx_chain.v new file mode 100644 index 0000000..4031e6b --- /dev/null +++ b/fpga/sdr_lib/rx_chain.v @@ -0,0 +1,105 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + +// Following defines conditionally include RX path circuitry + +`include "usrp_std.vh" +module rx_chain + (input clock, + input reset, + input enable, + input wire [7:0] decim_rate, + input sample_strobe, + input decimator_strobe, + output wire hb_strobe, + input [6:0] serial_addr, input [31:0] serial_data, input serial_strobe, + input wire [15:0] i_in, + input wire [15:0] q_in, + output wire [15:0] i_out, + output wire [15:0] q_out, + output wire [15:0] debugdata,output wire [15:0] debugctrl + ); + + parameter FREQADDR = 0; + parameter PHASEADDR = 0; + + wire [31:0] phase; + wire [15:0] bb_i, bb_q; + wire [15:0] hb_in_i, hb_in_q; + + assign debugdata = hb_in_i; + +`ifdef RX_NCO_ON + phase_acc #(FREQADDR,PHASEADDR,32) rx_phase_acc + (.clk(clock),.reset(reset),.enable(enable), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .strobe(sample_strobe),.phase(phase) ); + + cordic rx_cordic + ( .clock(clock),.reset(reset),.enable(enable), + .xi(i_in),.yi(q_in),.zi(phase[31:16]), + .xo(bb_i),.yo(bb_q),.zo() ); +`else + assign bb_i = i_in; + assign bb_q = q_in; + assign sample_strobe = 1; +`endif // !`ifdef RX_NCO_ON + +`ifdef RX_CIC_ON + cic_decim cic_decim_i_0 + ( .clock(clock),.reset(reset),.enable(enable), + .rate(decim_rate),.strobe_in(sample_strobe),.strobe_out(decimator_strobe), + .signal_in(bb_i),.signal_out(hb_in_i) ); +`else + assign hb_in_i = bb_i; + assign decimator_strobe = sample_strobe; +`endif + +`ifdef RX_HB_ON + halfband_decim hbd_i_0 + ( .clock(clock),.reset(reset),.enable(enable), + .strobe_in(decimator_strobe),.strobe_out(hb_strobe), + .data_in(hb_in_i),.data_out(i_out),.debugctrl(debugctrl) ); +`else + assign i_out = hb_in_i; + assign hb_strobe = decimator_strobe; +`endif + +`ifdef RX_CIC_ON + cic_decim cic_decim_q_0 + ( .clock(clock),.reset(reset),.enable(enable), + .rate(decim_rate),.strobe_in(sample_strobe),.strobe_out(decimator_strobe), + .signal_in(bb_q),.signal_out(hb_in_q) ); +`else + assign hb_in_q = bb_q; +`endif + +`ifdef RX_HB_ON + halfband_decim hbd_q_0 + ( .clock(clock),.reset(reset),.enable(enable), + .strobe_in(decimator_strobe),.strobe_out(), + .data_in(hb_in_q),.data_out(q_out) ); +`else + assign q_out = hb_in_q; +`endif + + +endmodule // rx_chain diff --git a/fpga/sdr_lib/rx_chain_dual.v b/fpga/sdr_lib/rx_chain_dual.v new file mode 100644 index 0000000..6988594 --- /dev/null +++ b/fpga/sdr_lib/rx_chain_dual.v @@ -0,0 +1,103 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + +module rx_chain_dual + (input clock, + input clock_2x, + input reset, + input enable, + input wire [7:0] decim_rate, + input sample_strobe, + input decimator_strobe, + input wire [31:0] freq0, + input wire [15:0] i_in0, + input wire [15:0] q_in0, + output wire [15:0] i_out0, + output wire [15:0] q_out0, + input wire [31:0] freq1, + input wire [15:0] i_in1, + input wire [15:0] q_in1, + output wire [15:0] i_out1, + output wire [15:0] q_out1 + ); + + wire [15:0] phase; + wire [15:0] bb_i, bb_q; + wire [15:0] i_in, q_in; + + wire [31:0] phase0; + wire [31:0] phase1; + reg [15:0] bb_i0, bb_q0; + reg [15:0] bb_i1, bb_q1; + + // We want to time-share the CORDIC by double-clocking it + + phase_acc rx_phase_acc_0 + (.clk(clock),.reset(reset),.enable(enable), + .strobe(sample_strobe),.freq(freq0),.phase(phase0) ); + + phase_acc rx_phase_acc_1 + (.clk(clock),.reset(reset),.enable(enable), + .strobe(sample_strobe),.freq(freq1),.phase(phase1) ); + + assign phase = clock ? phase0[31:16] : phase1[31:16]; + assign i_in = clock ? i_in0 : i_in1; + assign q_in = clock ? q_in0 : q_in1; + +// This appears reversed because of the number of CORDIC stages + always @(posedge clock_2x) + if(clock) + begin + bb_i1 <= #1 bb_i; + bb_q1 <= #1 bb_q; + end + else + begin + bb_i0 <= #1 bb_i; + bb_q0 <= #1 bb_q; + end + + cordic rx_cordic + ( .clock(clock_2x),.reset(reset),.enable(enable), + .xi(i_in),.yi(q_in),.zi(phase), + .xo(bb_i),.yo(bb_q),.zo() ); + + cic_decim cic_decim_i_0 + ( .clock(clock),.reset(reset),.enable(enable), + .rate(decim_rate),.strobe_in(sample_strobe),.strobe_out(decimator_strobe), + .signal_in(bb_i0),.signal_out(i_out0) ); + + cic_decim cic_decim_q_0 + ( .clock(clock),.reset(reset),.enable(enable), + .rate(decim_rate),.strobe_in(sample_strobe),.strobe_out(decimator_strobe), + .signal_in(bb_q0),.signal_out(q_out0) ); + + cic_decim cic_decim_i_1 + ( .clock(clock),.reset(reset),.enable(enable), + .rate(decim_rate),.strobe_in(sample_strobe),.strobe_out(decimator_strobe), + .signal_in(bb_i1),.signal_out(i_out1) ); + + cic_decim cic_decim_q_1 + ( .clock(clock),.reset(reset),.enable(enable), + .rate(decim_rate),.strobe_in(sample_strobe),.strobe_out(decimator_strobe), + .signal_in(bb_q1),.signal_out(q_out1) ); + +endmodule // rx_chain diff --git a/fpga/sdr_lib/rx_dcoffset.v b/fpga/sdr_lib/rx_dcoffset.v new file mode 100644 index 0000000..3be475e --- /dev/null +++ b/fpga/sdr_lib/rx_dcoffset.v @@ -0,0 +1,22 @@ + + +module rx_dcoffset (input clock, input enable, input reset, + input signed [15:0] adc_in, output signed [15:0] adc_out, + input wire [6:0] serial_addr, input wire [31:0] serial_data, input serial_strobe); + parameter MYADDR = 0; + + reg signed [31:0] integrator; + wire signed [15:0] scaled_integrator = integrator[31:16] + (integrator[31] & |integrator[15:0]); + assign adc_out = adc_in - scaled_integrator; + + // FIXME do we need signed? + //FIXME What do we do when clipping? + always @(posedge clock) + if(reset) + integrator <= #1 32'd0; + else if(serial_strobe & (MYADDR == serial_addr)) + integrator <= #1 {serial_data[15:0],16'd0}; + else if(enable) + integrator <= #1 integrator + adc_out; + +endmodule // rx_dcoffset diff --git a/fpga/sdr_lib/serial_io.v b/fpga/sdr_lib/serial_io.v new file mode 100644 index 0000000..1fe43c9 --- /dev/null +++ b/fpga/sdr_lib/serial_io.v @@ -0,0 +1,118 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003,2004 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + + + +// Serial Control Bus from Cypress chip + +module serial_io + ( input master_clk, + input serial_clock, + input serial_data_in, + input enable, + input reset, + inout wire serial_data_out, + output reg [6:0] serial_addr, + output reg [31:0] serial_data, + output wire serial_strobe, + input wire [31:0] readback_0, + input wire [31:0] readback_1, + input wire [31:0] readback_2, + input wire [31:0] readback_3, + input wire [31:0] readback_4, + input wire [31:0] readback_5, + input wire [31:0] readback_6, + input wire [31:0] readback_7 + ); + + reg is_read; + reg [7:0] ser_ctr; + reg write_done; + + assign serial_data_out = is_read ? serial_data[31] : 1'bz; + + always @(posedge serial_clock, posedge reset, negedge enable) + if(reset) + ser_ctr <= #1 8'd0; + else if(~enable) + ser_ctr <= #1 8'd0; + else if(ser_ctr == 39) + ser_ctr <= #1 8'd0; + else + ser_ctr <= #1 ser_ctr + 8'd1; + + always @(posedge serial_clock, posedge reset, negedge enable) + if(reset) + is_read <= #1 1'b0; + else if(~enable) + is_read <= #1 1'b0; + else if((ser_ctr == 7)&&(serial_addr[6]==1)) + is_read <= #1 1'b1; + + always @(posedge serial_clock, posedge reset) + if(reset) + begin + serial_addr <= #1 7'b0; + serial_data <= #1 32'b0; + write_done <= #1 1'b0; + end + else if(~enable) + begin + //serial_addr <= #1 7'b0; + //serial_data <= #1 32'b0; + write_done <= #1 1'b0; + end + else + begin + if(~is_read && (ser_ctr == 39)) + write_done <= #1 1'b1; + else + write_done <= #1 1'b0; + if(is_read & (ser_ctr==8)) + case (serial_addr) + 7'd1: serial_data <= #1 readback_0; + 7'd2: serial_data <= #1 readback_1; + 7'd3: serial_data <= #1 readback_2; + 7'd4: serial_data <= #1 readback_3; + 7'd5: serial_data <= #1 readback_4; + 7'd6: serial_data <= #1 readback_5; + 7'd7: serial_data <= #1 readback_6; + 7'd8: serial_data <= #1 readback_7; + default: serial_data <= #1 32'd0; + endcase // case(serial_addr) + else if(ser_ctr >= 8) + serial_data <= #1 {serial_data[30:0],serial_data_in}; + else if(ser_ctr < 8) + serial_addr <= #1 {serial_addr[5:0],serial_data_in}; + end // else: !if(~enable) + + reg enable_d1, enable_d2; + always @(posedge master_clk) + begin + enable_d1 <= #1 enable; + enable_d2 <= #1 enable_d1; + end + + assign serial_strobe = enable_d2 & ~enable_d1; + +endmodule // serial_io + + diff --git a/fpga/sdr_lib/setting_reg.v b/fpga/sdr_lib/setting_reg.v new file mode 100644 index 0000000..3d31a9e --- /dev/null +++ b/fpga/sdr_lib/setting_reg.v @@ -0,0 +1,23 @@ + + +module setting_reg + ( input clock, input reset, input strobe, input wire [6:0] addr, + input wire [31:0] in, output reg [31:0] out, output reg changed); + parameter my_addr = 0; + + always @(posedge clock) + if(reset) + begin + out <= #1 32'd0; + changed <= #1 1'b0; + end + else + if(strobe & (my_addr==addr)) + begin + out <= #1 in; + changed <= #1 1'b1; + end + else + changed <= #1 1'b0; + +endmodule // setting_reg diff --git a/fpga/sdr_lib/setting_reg_masked.v b/fpga/sdr_lib/setting_reg_masked.v new file mode 100644 index 0000000..72f7e21 --- /dev/null +++ b/fpga/sdr_lib/setting_reg_masked.v @@ -0,0 +1,26 @@ + + +module setting_reg_masked + ( input clock, input reset, input strobe, input wire [6:0] addr, + input wire [31:0] in, output reg [31:0] out, output reg changed); +/* upper 16 bits are mask, lower 16 bits are value + * Note that you get a 16 bit register, not a 32 bit one */ + + parameter my_addr = 0; + + always @(posedge clock) + if(reset) + begin + out <= #1 32'd0; + changed <= #1 1'b0; + end + else + if(strobe & (my_addr==addr)) + begin + out <= #1 (out & ~in[31:16]) | (in[15:0] & in[31:16] ); + changed <= #1 1'b1; + end + else + changed <= #1 1'b0; + +endmodule // setting_reg_masked diff --git a/fpga/sdr_lib/sign_extend.v b/fpga/sdr_lib/sign_extend.v new file mode 100644 index 0000000..2417909 --- /dev/null +++ b/fpga/sdr_lib/sign_extend.v @@ -0,0 +1,35 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + + +// Sign extension "macro" +// bits_out should be greater than bits_in + +module sign_extend (in,out); + parameter bits_in=0; // FIXME Quartus insists on a default + parameter bits_out=0; + + input [bits_in-1:0] in; + output [bits_out-1:0] out; + + assign out = {{(bits_out-bits_in){in[bits_in-1]}},in}; + +endmodule diff --git a/fpga/sdr_lib/strobe_gen.v b/fpga/sdr_lib/strobe_gen.v new file mode 100644 index 0000000..0511b6a --- /dev/null +++ b/fpga/sdr_lib/strobe_gen.v @@ -0,0 +1,44 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + +module strobe_gen + ( input clock, + input reset, + input enable, + input [7:0] rate, + input strobe_in, + output wire strobe ); + +// parameter width = 8; + + reg [7:0] counter; + assign strobe = ~|counter && enable && strobe_in; + + always @(posedge clock) + if(reset | ~enable) + counter <= #1 8'd0; + else if(strobe_in) + if(counter == 0) + counter <= #1 rate; + else + counter <= #1 counter - 8'd1; + +endmodule // strobe_gen diff --git a/fpga/sdr_lib/tx_buffer.v b/fpga/sdr_lib/tx_buffer.v new file mode 100644 index 0000000..cae6607 --- /dev/null +++ b/fpga/sdr_lib/tx_buffer.v @@ -0,0 +1,138 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + +// Interface to Cypress FX2 bus +// A packet is 512 Bytes. Each fifo line is 2 bytes +// Fifo has 1024 or 2048 lines + +module tx_buffer + ( input usbclk, + input bus_reset, // Used here for the 257-Hack to fix the FX2 bug + input reset, // standard DSP-side reset + input [15:0] usbdata, + input wire WR, + output wire have_space, + output reg tx_underrun, + input wire [3:0] channels, + output reg [15:0] tx_i_0, + output reg [15:0] tx_q_0, + output reg [15:0] tx_i_1, + output reg [15:0] tx_q_1, + output reg [15:0] tx_i_2, + output reg [15:0] tx_q_2, + output reg [15:0] tx_i_3, + output reg [15:0] tx_q_3, + input txclk, + input txstrobe, + input clear_status, + output wire tx_empty, + output [11:0] debugbus + ); + + wire [11:0] txfifolevel; + reg [8:0] write_count; + wire tx_full; + wire [15:0] fifodata; + wire rdreq; + + reg [3:0] load_next; + + // DAC Side of FIFO + assign rdreq = ((load_next != channels) & !tx_empty); + + always @(posedge txclk) + if(reset) + begin + {tx_i_0,tx_q_0,tx_i_1,tx_q_1,tx_i_2,tx_q_2,tx_i_3,tx_q_3} + <= #1 128'h0; + load_next <= #1 4'd0; + end + else + if((load_next != channels) & !tx_empty) + begin + load_next <= #1 load_next + 4'd1; + case(load_next) + 4'd0 : tx_i_0 <= #1 fifodata; + 4'd1 : tx_q_0 <= #1 fifodata; + 4'd2 : tx_i_1 <= #1 fifodata; + 4'd3 : tx_q_1 <= #1 fifodata; + 4'd4 : tx_i_2 <= #1 fifodata; + 4'd5 : tx_q_2 <= #1 fifodata; + 4'd6 : tx_i_3 <= #1 fifodata; + 4'd7 : tx_q_3 <= #1 fifodata; + endcase // case(load_next) + end // if ((load_next != channels) & !tx_empty) + else if(txstrobe & (load_next == channels)) + begin + load_next <= #1 4'd0; + end + + // USB Side of FIFO + assign have_space = (txfifolevel <= (4095-256)); + + always @(posedge usbclk) + if(bus_reset) // Use bus reset because this is on usbclk + write_count <= #1 0; + else if(WR & ~write_count[8]) + write_count <= #1 write_count + 9'd1; + else + write_count <= #1 WR ? write_count : 9'b0; + + // Detect Underruns + always @(posedge txclk) + if(reset) + tx_underrun <= 1'b0; + else if(txstrobe & (load_next != channels)) + tx_underrun <= 1'b1; + else if(clear_status) + tx_underrun <= 1'b0; + + // FIFO + fifo_4k txfifo + ( .data ( usbdata ), + .wrreq ( WR & ~write_count[8] ), + .wrclk ( usbclk ), + + .q ( fifodata ), + .rdreq ( rdreq ), + .rdclk ( txclk ), + + .aclr ( reset ), // asynch, so we can use either + + .rdempty ( tx_empty ), + .rdusedw ( ), + .wrfull ( tx_full ), + .wrusedw ( txfifolevel ) + ); + + // Debugging Aids + assign debugbus[0] = WR; + assign debugbus[1] = have_space; + assign debugbus[2] = tx_empty; + assign debugbus[3] = tx_full; + assign debugbus[4] = tx_underrun; + assign debugbus[5] = write_count[8]; + assign debugbus[6] = txstrobe; + assign debugbus[7] = rdreq; + assign debugbus[11:8] = load_next; + +endmodule // tx_buffer + diff --git a/fpga/sdr_lib/tx_chain.v b/fpga/sdr_lib/tx_chain.v new file mode 100644 index 0000000..8f0a17a --- /dev/null +++ b/fpga/sdr_lib/tx_chain.v @@ -0,0 +1,65 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + +module tx_chain + (input clock, + input reset, + input enable, + input wire [7:0] interp_rate, + input sample_strobe, + input interpolator_strobe, + input wire [31:0] freq, + input wire [15:0] i_in, + input wire [15:0] q_in, + output wire [15:0] i_out, + output wire [15:0] q_out + ); + + wire [15:0] bb_i, bb_q; + + cic_interp cic_interp_i + ( .clock(clock),.reset(reset),.enable(enable), + .rate(interp_rate),.strobe_in(interpolator_strobe),.strobe_out(sample_strobe), + .signal_in(i_in),.signal_out(bb_i) ); + + cic_interp cic_interp_q + ( .clock(clock),.reset(reset),.enable(enable), + .rate(interp_rate),.strobe_in(interpolator_strobe),.strobe_out(sample_strobe), + .signal_in(q_in),.signal_out(bb_q) ); + +`define NOCORDIC_TX +`ifdef NOCORDIC_TX + assign i_out = bb_i; + assign q_out = bb_q; +`else + wire [31:0] phase; + + phase_acc phase_acc_tx + (.clk(clock),.reset(reset),.enable(enable), + .strobe(sample_strobe),.freq(freq),.phase(phase) ); + + cordic tx_cordic_0 + ( .clock(clock),.reset(reset),.enable(sample_strobe), + .xi(bb_i),.yi(bb_q),.zi(phase[31:16]), + .xo(i_out),.yo(q_out),.zo() ); +`endif + +endmodule // tx_chain diff --git a/fpga/sdr_lib/tx_chain_hb.v b/fpga/sdr_lib/tx_chain_hb.v new file mode 100644 index 0000000..6cbe29c --- /dev/null +++ b/fpga/sdr_lib/tx_chain_hb.v @@ -0,0 +1,76 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + +module tx_chain_hb + (input clock, + input reset, + input enable, + input wire [7:0] interp_rate, + input sample_strobe, + input interpolator_strobe, + input hb_strobe, + input wire [31:0] freq, + input wire [15:0] i_in, + input wire [15:0] q_in, + output wire [15:0] i_out, + output wire [15:0] q_out, +output wire [15:0] debug, output [15:0] hb_i_out + ); +assign debug[15:13] = {sample_strobe,hb_strobe,interpolator_strobe}; + + wire [15:0] bb_i, bb_q; + wire [15:0] hb_i_out, hb_q_out; + + halfband_interp hb + (.clock(clock),.reset(reset),.enable(enable), + .strobe_in(interpolator_strobe),.strobe_out(hb_strobe), + .signal_in_i(i_in),.signal_in_q(q_in), + .signal_out_i(hb_i_out),.signal_out_q(hb_q_out), + .debug(debug[12:0])); + + cic_interp cic_interp_i + ( .clock(clock),.reset(reset),.enable(enable), + .rate(interp_rate),.strobe_in(hb_strobe),.strobe_out(sample_strobe), + .signal_in(hb_i_out),.signal_out(bb_i) ); + + cic_interp cic_interp_q + ( .clock(clock),.reset(reset),.enable(enable), + .rate(interp_rate),.strobe_in(hb_strobe),.strobe_out(sample_strobe), + .signal_in(hb_q_out),.signal_out(bb_q) ); + +`define NOCORDIC_TX +`ifdef NOCORDIC_TX + assign i_out = bb_i; + assign q_out = bb_q; +`else + wire [31:0] phase; + + phase_acc phase_acc_tx + (.clk(clock),.reset(reset),.enable(enable), + .strobe(sample_strobe),.freq(freq),.phase(phase) ); + + cordic tx_cordic_0 + ( .clock(clock),.reset(reset),.enable(sample_strobe), + .xi(bb_i),.yi(bb_q),.zi(phase[31:16]), + .xo(i_out),.yo(q_out),.zo() ); +`endif + +endmodule // tx_chain diff --git a/fpga/tb/cbus_tb.v b/fpga/tb/cbus_tb.v new file mode 100644 index 0000000..53cc127 --- /dev/null +++ b/fpga/tb/cbus_tb.v @@ -0,0 +1,71 @@ +module cbus_tb; + +`define ch1in_freq 0 +`define ch2in_freq 1 +`define ch3in_freq 2 +`define ch4in_freq 3 +`define ch1out_freq 4 +`define ch2out_freq 5 +`define ch3out_freq 6 +`define ch4out_freq 7 +`define rates 8 +`define misc 9 + + task send_config_word; + input [7:0] addr; + input [31:0] data; + integer i; + + begin + #10 serenable = 1; + for(i=7;i>=0;i=i-1) + begin + #10 serdata = addr[i]; + #10 serclk = 0; + #10 serclk = 1; + #10 serclk = 0; + end + for(i=31;i>=0;i=i-1) + begin + #10 serdata = data[i]; + #10 serclk = 0; + #10 serclk = 1; + #10 serclk = 0; + end + #10 serenable = 0; + // #10 serclk = 1; + // #10 serclk = 0; + end + endtask // send_config_word + + initial $dumpfile("cbus_tb.vcd"); + initial $dumpvars(0,cbus_tb); + + initial reset = 1; + initial #500 reset = 0; + + reg serclk, serdata, serenable, reset; + wire SDO; + + control_bus control_bus + ( .serial_clock(serclk), + .serial_data_in(serdata), + .enable(serenable), + .reset(reset), + .serial_data_out(SDO) ); + + + initial + begin + #1000 send_config_word(8'd1,32'hDEAD_BEEF); + #1000 send_config_word(8'd3,32'hDDEE_FF01); + #1000 send_config_word(8'd19,32'hFFFF_FFFF); + #1000 send_config_word(8'd23,32'h1234_FEDC); + #1000 send_config_word(8'h80,32'h0); + #1000 send_config_word(8'h81,32'h0); + #1000 send_config_word(8'h82,32'h0); + #1000 reset = 1; + #1 $finish; + end + +endmodule // cbus_tb diff --git a/fpga/tb/cordic_tb.v b/fpga/tb/cordic_tb.v new file mode 100644 index 0000000..ed85b37 --- /dev/null +++ b/fpga/tb/cordic_tb.v @@ -0,0 +1,61 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + + + +module cordic_tb(); + + cordic cordic(clk, reset, enable, xi, yi, zi, xo, yo, zo ); + + reg reset; + reg clk; + reg enable; + reg [15:0] xi, yi, zi; + + initial reset = 1'b1; + initial #1000 reset = 1'b0; + + initial clk = 1'b0; + always #50 clk <= ~clk; + + initial enable = 1'b1; + + initial zi = 16'b0; + + always @(posedge clk) + zi <= #1 zi + 16'd0; + + wire [15:0] xo,yo,zo; + + initial $dumpfile("cordic.vcd"); + initial $dumpvars(0,cordic_tb); + initial + begin +`include "sine.txt" + end + + wire [15:0] xiu = {~xi[15],xi[14:0]}; + wire [15:0] yiu = {~yi[15],yi[14:0]}; + wire [15:0] xou = {~xo[15],xo[14:0]}; + wire [15:0] you = {~yo[15],yo[14:0]}; + initial $monitor("%d\t%d\t%d\t%d\t%d",$time,xiu,yiu,xou,you); + +endmodule // cordic_tb diff --git a/fpga/tb/decim_tb.v b/fpga/tb/decim_tb.v new file mode 100644 index 0000000..ecf20cf --- /dev/null +++ b/fpga/tb/decim_tb.v @@ -0,0 +1,108 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + + +// testbench for fullchip + +module decim_tb(); + +`include "usrp_tasks.v" + + reg clk_120mhz; + reg usbclk; + reg reset; + + reg [11:0] adc1_data, adc2_data; + wire [13:0] dac1_data, dac2_data; + + wire [5:0] usbctl; + wire [5:0] usbrdy; + + wire [15:0] usbdata; + + reg WE, RD, OE; + + assign usbctl[0] = WE; + assign usbctl[1] = RD; + assign usbctl[2] = OE; + assign usbctl[5:3] = 0; + + reg tb_oe; + assign usbdata = tb_oe ? usbdatareg : 16'hxxxx; + reg serload, serenable, serclk, serdata; + reg enable_tx, enable_rx; + reg [15:0] usbdatareg; + +/////////////////////////////////////////////// +// Simulation Control +initial +begin + $dumpfile("decim_tb.vcd"); + $dumpvars(0, fc_tb); +end + +initial #100000 $finish; + +/////////////////////////////////////////////// +// Monitors + +reg [7:0] counter_decim; +wire [7:0] decim_rate; +assign decim_rate = 32; +initial $monitor(dac1_data); + + always @(posedge clk_120mhz) + begin + if(reset | ~enable_tx) + counter_decim <= #1 0; + else if(counter_decim == 0) + counter_decim <= #1 decim_rate - 8'b1; + else + counter_decim <= #1 counter_decim - 8'b1; + end + +/////////////////////////////////////////////// +// Clock and reset + +initial clk_120mhz = 0; +initial usbclk = 0; +always #48 clk_120mhz = ~clk_120mhz; +always #120 usbclk = ~usbclk; + +initial reset = 1'b1; +initial #500 reset = 1'b0; + + +initial enable_tx = 1'b1; + + wire [31:0] decim_out, q_decim_out; + wire [31:0] decim_out; + wire [31:0] phase; + + cic_decim #(.bitwidth(32),.stages(4)) + decim_i(.clock(clk_120mhz),.reset(reset),.enable(enable_tx), + .strobe(counter_decim == 8'b0),.signal_in(32'h1),.signal_out(decim_out)); + + cic_decim #(.bitwidth(32),.stages(4)) + decim(.clock(clk_120mhz),.reset(reset),.enable(enable_tx), + .strobe(counter_decim == 8'b0),.signal_in(32'h1),.signal_out(decim_out)); + +endmodule diff --git a/fpga/tb/fullchip_tb.v b/fpga/tb/fullchip_tb.v new file mode 100755 index 0000000..c446ff0 --- /dev/null +++ b/fpga/tb/fullchip_tb.v @@ -0,0 +1,174 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + + +// testbench for fullchip + +`timescale 1ns/1ns + +module fullchip_tb(); + +`include "usrp_tasks.v" + +fullchip fullchip + ( + .clk_120mhz(clk_120mhz), + .reset(reset), + .enable_rx(enable_rx), + .enable_tx(enable_tx), + .SLD(serload), + .SEN(serenable), + .clear_status(), + .SDI(serdata), + .SCLK(serclk), + + .adc1_data(adc1_data), + .adc2_data(adc2_data), + .adc3_data(adc1_data), + .adc4_data(adc2_data), + + .dac1_data(dac1_data), + .dac2_data(dac2_data), + .dac3_data(),.dac4_data(), + + .adclk0(adclk),.adclk1(), + + .adc_oeb(),.adc_otr(4'b0), + + .clk_out(clk_out), + + .misc_pins(), + + // USB interface + .usbclk(usbclk),.usbctl(usbctl), + .usbrdy(usbrdy),.usbdata(usbdata) + ); + + reg clk_120mhz; + reg usbclk; + reg reset; + + reg [11:0] adc1_data, adc2_data; + wire [13:0] dac1_data, dac2_data; + + wire [5:0] usbctl; + wire [5:0] usbrdy; + + wire [15:0] usbdata; + + reg WE, RD, OE; + + assign usbctl[0] = WE; + assign usbctl[1] = RD; + assign usbctl[2] = OE; + assign usbctl[5:3] = 0; + + wire have_packet_rdy = usbrdy[1]; + + reg tb_oe; + initial tb_oe=1'b1; + + assign usbdata = tb_oe ? usbdatareg : 16'hxxxx; + reg serload, serenable, serclk, serdata; + reg enable_tx, enable_rx; + reg [15:0] usbdatareg; + +/////////////////////////////////////////////// +// Simulation Control +initial +begin + $dumpfile("fullchip_tb.vcd"); + $dumpvars(0, fullchip_tb); +end + +//initial #1000000 $finish; + +/////////////////////////////////////////////// +// Monitors + +//initial $monitor(dac1_data); + +/////////////////////////////////////////////// +// Clock and reset + +initial clk_120mhz = 0; +initial usbclk = 0; +always #24 clk_120mhz = ~clk_120mhz; +always #60 usbclk = ~usbclk; + +initial reset = 1'b1; +initial #500 reset = 1'b0; + +///////////////////////////////////////////////// +// Run AD input + +always @(posedge adclk) adc1_data <= #1 12'd1234; +always @(posedge adclk) adc2_data <= #1 12'd1234; + +///////////////////////////////////////////////// +// USB interface + + initial + begin + initialize_usb; + #30000 @(posedge usbclk); + burst_usb_write(257); + + #30000 burst_usb_read(256); + #10000 $finish; + +// repeat(30) +// begin +// write_from_usb; +// read_from_usb; +// end +end + +///////////////////////////////////////////////// +// TX and RX enable + +initial enable_tx = 1'b0; +initial #40000 enable_tx = 1'b1; +initial enable_rx = 1'b0; +initial #40000 enable_rx = 1'b1; + +////////////////////////////////////////////////// +// Set up control bus + +initial +begin + #1000 send_config_word(`ch1in_freq,32'h0); // 1 MHz on 60 MHz clock + send_config_word(`ch2in_freq,32'h0); + send_config_word(`ch3in_freq,32'h0); + send_config_word(`ch4in_freq,32'h0); + send_config_word(`ch1out_freq,32'h01234567); + send_config_word(`ch2out_freq,32'h0); + send_config_word(`ch3out_freq,32'h0); + send_config_word(`ch4out_freq,32'h0); + send_config_word(`misc,32'h0); + send_config_word(`rates,{8'd2,8'd12,8'h0f,8'h07}); + // adc, ext, interp, decim +end + +///////////////////////////////////////////////////////// + +endmodule + diff --git a/fpga/tb/interp_tb.v b/fpga/tb/interp_tb.v new file mode 100755 index 0000000..8a8e89f --- /dev/null +++ b/fpga/tb/interp_tb.v @@ -0,0 +1,108 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + + +// testbench for fullchip + +module interp_tb(); + +`include "usrp_tasks.v" + + reg clk_120mhz; + reg usbclk; + reg reset; + + reg [11:0] adc1_data, adc2_data; + wire [13:0] dac1_data, dac2_data; + + wire [5:0] usbctl; + wire [5:0] usbrdy; + + wire [15:0] usbdata; + + reg WE, RD, OE; + + assign usbctl[0] = WE; + assign usbctl[1] = RD; + assign usbctl[2] = OE; + assign usbctl[5:3] = 0; + + reg tb_oe; + assign usbdata = tb_oe ? usbdatareg : 16'hxxxx; + reg serload, serenable, serclk, serdata; + reg enable_tx, enable_rx; + reg [15:0] usbdatareg; + +/////////////////////////////////////////////// +// Simulation Control +initial +begin + $dumpfile("interp_tb.vcd"); + $dumpvars(0, fc_tb); +end + +initial #100000 $finish; + +/////////////////////////////////////////////// +// Monitors + +reg [7:0] counter_interp; +wire [7:0] interp_rate; +assign interp_rate = 32; +initial $monitor(dac1_data); + + always @(posedge clk_120mhz) + begin + if(reset | ~enable_tx) + counter_interp <= #1 0; + else if(counter_interp == 0) + counter_interp <= #1 interp_rate - 8'b1; + else + counter_interp <= #1 counter_interp - 8'b1; + end + +/////////////////////////////////////////////// +// Clock and reset + +initial clk_120mhz = 0; +initial usbclk = 0; +always #48 clk_120mhz = ~clk_120mhz; +always #120 usbclk = ~usbclk; + +initial reset = 1'b1; +initial #500 reset = 1'b0; + + +initial enable_tx = 1'b1; + + wire [31:0] interp_out, q_interp_out; + wire [31:0] decim_out; + wire [31:0] phase; + + cic_interp #(.bitwidth(32),.stages(4)) + interp_i(.clock(clk_120mhz),.reset(reset),.enable(enable_tx), + .strobe(counter_interp == 8'b0),.signal_in(32'h1),.signal_out(interp_out)); + + cic_decim #(.bitwidth(32),.stages(4)) + decim(.clock(clk_120mhz),.reset(reset),.enable(enable_tx), + .strobe(counter_interp == 8'b0),.signal_in(32'h1),.signal_out(decim_out)); + +endmodule diff --git a/fpga/tb/justinterp_tb.v b/fpga/tb/justinterp_tb.v new file mode 100644 index 0000000..ffbd0f1 --- /dev/null +++ b/fpga/tb/justinterp_tb.v @@ -0,0 +1,73 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + + +module cic_decim_tb; + +cic_decim #(.bitwidth(16),.stages(4)) + decim(clock,reset,enable,strobe_in,strobe_out,signal_in,signal_out); + + reg clock; + reg reset; + reg enable; + wire strobe; + reg [15:0] signal_in; + wire [15:0] signal_out; + + assign strobe_in = 1'b1; + reg strobe_out; + + always @(posedge clock) + while(1) + begin + @(posedge clock); + @(posedge clock); + @(posedge clock); + @(posedge clock); + strobe_out <= 1'b1; + @(posedge clock); + @(posedge clock); + @(posedge clock); + @(posedge clock); + strobe_out <= 1'b0; + end + + initial clock = 0; + always #50 clock = ~clock; + + initial reset = 1; + initial #1000 reset = 0; + + initial enable = 0; + initial #2000 enable = 1; + + initial signal_in = 16'h1; + initial #500000 signal_in = 16'h7fff; + initial #1000000 signal_in = 16'h8000; + initial #1500000 signal_in = 16'hffff; + + + initial $dumpfile("decim.vcd"); + initial $dumpvars(0,cic_decim_tb); + + initial #10000000 $finish; + +endmodule // cic_decim_tb diff --git a/fpga/tb/makesine.pl b/fpga/tb/makesine.pl new file mode 100755 index 0000000..9aebd69 --- /dev/null +++ b/fpga/tb/makesine.pl @@ -0,0 +1,14 @@ +#!/usr/bin/perl + +$angle = 0; +$angle_inc = 2*3.14159/87.2; +$amp = 1; +$amp_rate = 1.0035; +for($i=0;$i<3500;$i++) + { + printf("@(posedge clk);xi<= #1 16'h%x;yi<= #1 16'h%x;\n",65535&int($amp*cos($angle)),65535&int($amp*sin($angle))); + $angle += $angle_inc; + $amp *= $amp_rate; + } + +printf("\$finish;\n"); diff --git a/fpga/tb/run_cordic b/fpga/tb/run_cordic new file mode 100755 index 0000000..68144fc --- /dev/null +++ b/fpga/tb/run_cordic @@ -0,0 +1,4 @@ +#!/bin/sh + +iverilog -y ../sdr_lib -o cordic_tb cordic_tb.v + diff --git a/fpga/tb/run_fullchip b/fpga/tb/run_fullchip new file mode 100755 index 0000000..eb81d7f --- /dev/null +++ b/fpga/tb/run_fullchip @@ -0,0 +1,4 @@ +#!/bin/sh + +iverilog -y ../toplevel/fullchip -y ../sdr_lib -y ../models -y . -o fullchip_tb fullchip_tb.v + diff --git a/fpga/tb/usrp_tasks.v b/fpga/tb/usrp_tasks.v new file mode 100755 index 0000000..00f82b9 --- /dev/null +++ b/fpga/tb/usrp_tasks.v @@ -0,0 +1,145 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + +// Tasks + +///////////////////////////////////////////////// +// USB interface + +task initialize_usb; +begin + OE = 0;WE = 0;RD = 0; + usbdatareg <= 16'h0; +end +endtask + +task write_from_usb; +begin + tb_oe <= 1'b1; + @(posedge usbclk); + usbdatareg <= #1 $random % 65536; + WE <= #1 1'b1; + @(posedge usbclk) + WE <= #1 1'b0; + tb_oe <= #1 1'b0; +end +endtask + +task burst_usb_write; + input [31:0] repeat_count; + + begin + tb_oe <= 1'b1; + repeat(repeat_count) + begin + @(posedge usbclk) + usbdatareg <= #1 usbdatareg + 1; //$random % 65536; + WE <= #1 1'b1; + end + @(posedge usbclk) + WE <= #1 1'b0; + tb_oe <= 1'b0; + end +endtask // burst_usb_write + + +task read_from_usb; +begin + @(posedge usbclk); + RD <= #1 1'b1; + @(posedge usbclk); + RD <= #1 1'b0; + OE <= #1 1'b1; + @(posedge usbclk); + OE <= #1 1'b0; +end +endtask + +task burst_usb_read; + input [31:0] repeat_count; + begin + while (~have_packet_rdy) begin + @(posedge usbclk); + end + + @(posedge usbclk) + RD <= #1 1'b1; + repeat(repeat_count) + begin + @(posedge usbclk) + OE <= #1 1'b1; + end + RD <= #1 1'b0; + @(posedge usbclk); + OE <= #1 1'b0; + end +endtask // burst_usb_read + +///////////////////////////////////////////////// +// TX and RX enable + +////////////////////////////////////////////////// +// Set up control bus + +`define ch1in_freq 0 +`define ch2in_freq 1 +`define ch3in_freq 2 +`define ch4in_freq 3 +`define ch1out_freq 4 +`define ch2out_freq 5 +`define ch3out_freq 6 +`define ch4out_freq 7 +`define rates 8 +`define misc 9 + + task send_config_word; + input [7:0] addr; + input [31:0] data; + integer i; + + begin + #10 serenable = 1; + for(i=7;i>=0;i=i-1) + begin + #10 serdata = addr[i]; + #10 serclk = 0; + #10 serclk = 1; + #10 serclk = 0; + end + for(i=31;i>=0;i=i-1) + begin + #10 serdata = data[i]; + #10 serclk = 0; + #10 serclk = 1; + #10 serclk = 0; + end + #10 serenable = 0; + // #10 serload = 0; + // #10 serload = 1; + #10 serclk = 1; + #10 serclk = 0; + //#10 serload = 0; + end + endtask // send_config_word + + +///////////////////////////////////////////////////////// + diff --git a/fpga/toplevel/mrfm/biquad_2stage.v b/fpga/toplevel/mrfm/biquad_2stage.v new file mode 100644 index 0000000..9b76901 --- /dev/null +++ b/fpga/toplevel/mrfm/biquad_2stage.v @@ -0,0 +1,131 @@ +`include "mrfm.vh" + +module biquad_2stage (input clock, input reset, input strobe_in, + input serial_strobe, input [6:0] serial_addr, input [31:0] serial_data, + input wire [15:0] sample_in, output reg [15:0] sample_out, output wire [63:0] debugbus); + + wire [3:0] coeff_addr, coeff_wr_addr; + wire [3:0] data_addr, data_wr_addr; + reg [3:0] cur_offset, data_addr_int, data_wr_addr_int; + + wire [15:0] coeff, coeff_wr_data, data, data_wr_data; + wire coeff_wr; + reg data_wr; + + wire [30:0] product; + wire [33:0] accum; + wire [15:0] scaled_accum; + + wire [7:0] shift; + reg [3:0] phase; + wire enable_mult, enable_acc, latch_out, select_input; + reg done, clear_acc; + + setting_reg #(`FR_MRFM_IIR_COEFF) sr_coeff(.clock(clock),.reset(reset), + .strobe(serial_strobe),.addr(serial_addr),.in(serial_data), + .out({coeff_wr_addr,coeff_wr_data}),.changed(coeff_wr)); + + setting_reg #(`FR_MRFM_IIR_SHIFT) sr_shift(.clock(clock),.reset(reset), + .strobe(serial_strobe),.addr(serial_addr),.in(serial_data), + .out(shift),.changed()); + + ram16 coeff_ram(.clock(clock),.write(coeff_wr),.wr_addr(coeff_wr_addr),.wr_data(coeff_wr_data), + .rd_addr(coeff_addr),.rd_data(coeff)); + + ram16 data_ram(.clock(clock),.write(data_wr),.wr_addr(data_wr_addr),.wr_data(data_wr_data), + .rd_addr(data_addr),.rd_data(data)); + + mult mult (.clock(clock),.x(data),.y(coeff),.product(product),.enable_in(enable_mult),.enable_out() ); + + acc acc (.clock(clock),.reset(reset),.clear(clear_acc),.enable_in(enable_acc),.enable_out(), + .addend(product),.sum(accum) ); + + shifter shifter (.in(accum),.out(scaled_accum),.shift(shift)); + + assign data_wr_data = select_input ? sample_in : scaled_accum; + assign enable_mult = 1'b1; + + always @(posedge clock) + if(reset) + cur_offset <= #1 4'd0; + else if(latch_out) + cur_offset <= #1 cur_offset + 4'd1; + + assign data_addr = data_addr_int + cur_offset; + assign data_wr_addr = data_wr_addr_int + cur_offset; + + always @(posedge clock) + if(reset) + done <= #1 1'b0; + else if(latch_out) + done <= #1 1'b1; + else if(strobe_in) + done <= #1 1'b0; + + always @(posedge clock) + if(reset) + phase <= #1 4'd0; + else if(strobe_in) + phase <= #1 4'd0; + else if(!done) + phase <= #1 phase + 4'd1; + + assign coeff_addr = phase; + + always @(phase) + case(phase) + 4'd01 : data_addr_int = 4'd00; 4'd02 : data_addr_int = 4'd01; 4'd03 : data_addr_int = 4'd02; + 4'd04 : data_addr_int = 4'd03; 4'd05 : data_addr_int = 4'd04; + + 4'd07 : data_addr_int = 4'd03; 4'd08 : data_addr_int = 4'd04; 4'd09 : data_addr_int = 4'd05; + 4'd10 : data_addr_int = 4'd06; 4'd11 : data_addr_int = 4'd07; + default : data_addr_int = 4'd00; + endcase // case(phase) + + always @(phase) + case(phase) + 4'd0 : data_wr_addr_int = 4'd2; + 4'd8 : data_wr_addr_int = 4'd5; + 4'd14 : data_wr_addr_int = 4'd8; + default : data_wr_addr_int = 4'd0; + endcase // case(phase) + + always @(phase) + case(phase) + 4'd0, 4'd8, 4'd14 : data_wr = 1'b1; + default : data_wr = 1'b0; + endcase // case(phase) + + assign select_input = (phase == 4'd0); + + always @(phase) + case(phase) + 4'd0, 4'd1, 4'd2, 4'd3, 4'd9, 4'd15 : clear_acc = 1'd1; + default : clear_acc = 1'b0; + endcase // case(phase) + + assign enable_acc = ~clear_acc; + assign latch_out = (phase == 4'd14); + + always @(posedge clock) + if(reset) + sample_out <= #1 16'd0; + else if(latch_out) + sample_out <= #1 scaled_accum; + + //////////////////////////////////////////////////////// + // Debug + + wire [3:0] debugmux; + + setting_reg #(`FR_MRFM_DEBUG) sr_debugmux(.clock(clock),.reset(reset), + .strobe(serial_strobe),.addr(serial_addr),.in(serial_data), + .out(debugmux),.changed()); + + assign debugbus[15:0] = debugmux[0] ? {coeff_addr,data_addr,data_wr_addr,cur_offset} : {phase,data_addr_int,data_wr_addr_int,cur_offset}; + assign debugbus[31:16] = debugmux[1] ? scaled_accum : {clock, strobe_in, data_wr, enable_mult, enable_acc, clear_acc, latch_out,select_input,done, data_addr_int}; + assign debugbus[47:32] = debugmux[2] ? sample_out : coeff; + assign debugbus[63:48] = debugmux[3] ? sample_in : data; + +endmodule // biquad_2stage + diff --git a/fpga/toplevel/mrfm/biquad_6stage.v b/fpga/toplevel/mrfm/biquad_6stage.v new file mode 100644 index 0000000..2b0c511 --- /dev/null +++ b/fpga/toplevel/mrfm/biquad_6stage.v @@ -0,0 +1,137 @@ +`include "mrfm.vh" + +module mrfm_iir (input clock, input reset, input strobe_in, + input serial_strobe, input [6:0] serial_addr, input [31:0] serial_data, + input wire [15:0] sample_in, output reg [15:0] sample_out); + + wire [5:0] coeff_addr, coeff_wr_addr; + wire [4:0] data_addr, data_wr_addr; + reg [4:0] cur_offset, data_addr_int, data_wr_addr_int; + + wire [15:0] coeff, coeff_wr_data, data, data_wr_data; + wire coeff_wr; + reg data_wr; + + wire [30:0] product; + wire [33:0] accum; + wire [15:0] scaled_accum; + + wire [7:0] shift; + reg [5:0] phase; + wire enable_mult, enable_acc, latch_out, select_input; + reg done, clear_acc; + + setting_reg #(`FR_MRFM_IIR_COEFF) sr_coeff(.clock(clock),.reset(reset), + .strobe(serial_strobe),.addr(serial_addr),.in(serial_data), + .out({coeff_wr_addr,coeff_wr_data}),.changed(coeff_wr)); + + setting_reg #(`FR_MRFM_IIR_SHIFT) sr_shift(.clock(clock),.reset(reset), + .strobe(serial_strobe),.addr(serial_addr),.in(serial_data), + .out(shift),.changed()); + + ram64 coeff_ram(.clock(clock),.write(coeff_wr),.wr_addr(coeff_wr_addr),.wr_data(coeff_wr_data), + .rd_addr(coeff_addr),.rd_data(coeff)); + + ram32 data_ram(.clock(clock),.write(data_wr),.wr_addr(data_wr_addr),.wr_data(data_wr_data), + .rd_addr(data_addr),.rd_data(data)); + + mult mult (.clock(clock),.x(data),.y(coeff),.product(product),.enable_in(enable_mult),.enable_out() ); + + acc acc (.clock(clock),.reset(reset),.clear(clear_acc),.enable_in(enable_acc),.enable_out(), + .addend(product),.sum(accum) ); + + shifter shifter (.in(accum),.out(scaled_accum),.shift(shift)); + + assign data_wr_data = select_input ? sample_in : scaled_accum; + assign enable_mult = 1'b1; + + always @(posedge clock) + if(reset) + cur_offset <= #1 5'd0; + else if(latch_out) + cur_offset <= #1 cur_offset + 5'd1; + + assign data_addr = data_addr_int + cur_offset; + assign data_wr_addr = data_wr_addr_int + cur_offset; + + always @(posedge clock) + if(reset) + done <= #1 1'b0; + else if(latch_out) + done <= #1 1'b1; + else if(strobe_in) + done <= #1 1'b0; + + always @(posedge clock) + if(reset) + phase <= #1 6'd0; + else if(strobe_in) + phase <= #1 6'd0; + else if(!done) + phase <= #1 phase + 6'd1; + + always @(phase) + case(phase) + 6'd0 : data_addr_int = 5'd0; + default : data_addr_int = 5'd0; + endcase // case(phase) + + assign coeff_addr = phase; + + always @(phase) + case(phase) + 6'd01 : data_addr_int = 5'd00; 6'd02 : data_addr_int = 5'd01; 6'd03 : data_addr_int = 5'd02; + 6'd04 : data_addr_int = 5'd03; 6'd05 : data_addr_int = 5'd04; + + 6'd07 : data_addr_int = 5'd03; 6'd08 : data_addr_int = 5'd04; 6'd09 : data_addr_int = 5'd05; + 6'd10 : data_addr_int = 5'd06; 6'd11 : data_addr_int = 5'd07; + + 6'd13 : data_addr_int = 5'd06; 6'd14 : data_addr_int = 5'd07; 6'd15 : data_addr_int = 5'd08; + 6'd16 : data_addr_int = 5'd09; 6'd17 : data_addr_int = 5'd10; + + 6'd19 : data_addr_int = 5'd09; 6'd20 : data_addr_int = 5'd10; 6'd21 : data_addr_int = 5'd11; + 6'd22 : data_addr_int = 5'd12; 6'd23 : data_addr_int = 5'd13; + + 6'd25 : data_addr_int = 5'd12; 6'd26 : data_addr_int = 5'd13; 6'd27 : data_addr_int = 5'd14; + 6'd28 : data_addr_int = 5'd15; 6'd29 : data_addr_int = 5'd16; + + 6'd31 : data_addr_int = 5'd15; 6'd32 : data_addr_int = 5'd16; 6'd33 : data_addr_int = 5'd17; + 6'd34 : data_addr_int = 5'd18; 6'd35 : data_addr_int = 5'd19; + + default : data_addr_int = 5'd00; + endcase // case(phase) + + always @(phase) + case(phase) + 6'd0 : data_wr_addr_int = 5'd2; + 6'd8 : data_wr_addr_int = 5'd5; + 6'd14 : data_wr_addr_int = 5'd8; + 6'd20 : data_wr_addr_int = 5'd11; + 6'd26 : data_wr_addr_int = 5'd14; + 6'd32 : data_wr_addr_int = 5'd17; + 6'd38 : data_wr_addr_int = 5'd20; + default : data_wr_addr_int = 5'd0; + endcase // case(phase) + + always @(phase) + case(phase) + 6'd0, 6'd8, 6'd14, 6'd20, 6'd26, 6'd32, 6'd38: data_wr = 1'b1; + default : data_wr = 1'b0; + endcase // case(phase) + + always @(phase) + case(phase) + 6'd0, 6'd1, 6'd2, 6'd3, 6'd9, 6'd15, 6'd21, 6'd27, 6'd33 : clear_acc = 1'd1; + default : clear_acc = 1'b0; + endcase // case(phase) + + assign enable_acc = ~clear_acc; + assign latch_out = (phase == 6'd38); + + always @(posedge clock) + if(reset) + sample_out <= #1 16'd0; + else if(latch_out) + sample_out <= #1 scaled_accum; + +endmodule // mrfm_iir diff --git a/fpga/toplevel/mrfm/mrfm.csf b/fpga/toplevel/mrfm/mrfm.csf new file mode 100644 index 0000000..2c30b99 --- /dev/null +++ b/fpga/toplevel/mrfm/mrfm.csf @@ -0,0 +1,444 @@ +COMPILER_SETTINGS +{ + IO_PLACEMENT_OPTIMIZATION = OFF; + ENABLE_DRC_SETTINGS = OFF; + PHYSICAL_SYNTHESIS_REGISTER_RETIMING = OFF; + PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION = OFF; + PHYSICAL_SYNTHESIS_COMBO_LOGIC = OFF; + DRC_FANOUT_EXCEEDING = 30; + DRC_REPORT_FANOUT_EXCEEDING = OFF; + DRC_TOP_FANOUT = 50; + DRC_REPORT_TOP_FANOUT = OFF; + RUN_DRC_DURING_COMPILATION = OFF; + ADV_NETLIST_OPT_RETIME_CORE_AND_IO = ON; + ADV_NETLIST_OPT_SYNTH_USE_FITTER_INFO = OFF; + ADV_NETLIST_OPT_SYNTH_GATE_RETIME = OFF; + ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP = OFF; + SMART_COMPILE_IGNORES_TDC_FOR_STRATIX_PLL_CHANGES = OFF; + MERGE_HEX_FILE = OFF; + TRUE_WYSIWYG_FLOW = OFF; + SEED = 1; + FINAL_PLACEMENT_OPTIMIZATION = AUTOMATICALLY; + FAMILY = Cyclone; + DPRAM_DUAL_PORT_MODE_OTHER_SIGNALS_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2"; + DPRAM_32BIT_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA1 = "MEGALAB COLUMN 1"; + DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA1 = "MEGALAB COLUMN 1"; + DPRAM_DUAL_PORT_MODE_OUTPUT_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2"; + DPRAM_32BIT_SINGLE_PORT_MODE_OUTPUT_EPXA1 = "LOWER TO 1ESB UPPER TO 1"; + DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_OUTPUT_EPXA1 = "MEGALAB COLUMN 1"; + DPRAM_DUAL_PORT_MODE_INPUT_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2"; + DPRAM_32BIT_SINGLE_PORT_MODE_INPUT_EPXA1 = "MEGALAB COLUMN 1"; + DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_INPUT_EPXA1 = "MEGALAB COLUMN 1"; + DPRAM_DUAL_PORT_MODE_OTHER_SIGNALS_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4"; + DPRAM_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4"; + DPRAM_WIDE_MODE_OTHER_SIGNALS_EPXA4_10 = "MEGALAB COLUMN 3"; + DPRAM_DEEP_MODE_OTHER_SIGNALS_EPXA4_10 = "MEGALAB COLUMN 3"; + DPRAM_DUAL_PORT_MODE_OUTPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4ESB"; + DPRAM_SINGLE_PORT_MODE_OUTPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4ESB"; + DPRAM_WIDE_MODE_OUTPUT_EPXA4_10 = "LOWER TO 3 UPPER TO 4ESB"; + DPRAM_DEEP_MODE_OUTPUT_EPXA4_10 = "MEGALAB COLUMN 3"; + DPRAM_DUAL_PORT_MODE_INPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4"; + DPRAM_SINGLE_PORT_MODE_INPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4"; + DPRAM_WIDE_MODE_INPUT_EPXA4_10 = "LOWER TO 3 UPPER TO 4"; + DPRAM_DEEP_MODE_INPUT_EPXA4_10 = "MEGALAB COLUMN 3"; + DPRAM_OTHER_SIGNALS_EPXA4_10 = "DEFAULT OTHER ROUTING OPTIONS"; + DPRAM_OUTPUT_EPXA4_10 = "DEFAULT OUTPUT ROUTING OPTIONS"; + DPRAM_INPUT_EPXA4_10 = "DEFAULT INPUT ROUTING OPTIONS"; + STRIPE_TO_PLD_INTERRUPTS_EPXA4_10 = "MEGALAB COLUMN 2"; + PLD_TO_STRIPE_INTERRUPTS_EPXA4_10 = "MEGALAB COLUMN 2"; + PROCESSOR_DEBUG_EXTENSIONS_EPXA4_10 = "MEGALAB COLUMN 2"; + STRIPE_TO_PLD_BRIDGE_EPXA4_10 = "MEGALAB COLUMN 1"; + FAST_FIT_COMPILATION = OFF; + SIGNALPROBE_DURING_NORMAL_COMPILATION = OFF; + OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING = ON; + OPTIMIZE_TIMING = "NORMAL COMPILATION"; + OPTIMIZE_HOLD_TIMING = OFF; + COMPILATION_LEVEL = FULL; + SAVE_DISK_SPACE = OFF; + SPEED_DISK_USAGE_TRADEOFF = NORMAL; + LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT = OFF; + SIGNALPROBE_ALLOW_OVERUSE = OFF; + FOCUS_ENTITY_NAME = |mrfm; + ROUTING_BACK_ANNOTATION_MODE = OFF; + INC_PLC_MODE = OFF; + FIT_ONLY_ONE_ATTEMPT = OFF; +} +DEFAULT_DEVICE_OPTIONS +{ + GENERATE_CONFIG_HEXOUT_FILE = OFF; + GENERATE_CONFIG_JBC_FILE_COMPRESSED = ON; + GENERATE_CONFIG_JBC_FILE = OFF; + GENERATE_CONFIG_JAM_FILE = OFF; + GENERATE_CONFIG_ISC_FILE = OFF; + GENERATE_CONFIG_SVF_FILE = OFF; + GENERATE_JBC_FILE_COMPRESSED = ON; + GENERATE_JBC_FILE = OFF; + GENERATE_JAM_FILE = OFF; + GENERATE_ISC_FILE = OFF; + GENERATE_SVF_FILE = OFF; + RESERVE_PIN = "AS INPUT TRI-STATED"; + RESERVE_ALL_UNUSED_PINS = "AS OUTPUT DRIVING GROUND"; + HEXOUT_FILE_COUNT_DIRECTION = UP; + HEXOUT_FILE_START_ADDRESS = 0; + GENERATE_HEX_FILE = OFF; + GENERATE_RBF_FILE = OFF; + GENERATE_TTF_FILE = OFF; + RESERVE_ASDO_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_DATA0_AFTER_CONFIGURATION = "AS INPUT TRI-STATED"; + RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_RDYNBUSY_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + DISABLE_NCS_AND_OE_PULLUPS_ON_CONFIG_DEVICE = OFF; + AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE = ON; + EPROM_USE_CHECKSUM_AS_USERCODE = OFF; + FLEX10K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + MERCURY_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + STRATIX_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + APEX20K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + STRATIX_CONFIGURATION_DEVICE = AUTO; + CYCLONE_CONFIGURATION_DEVICE = AUTO; + FLEX10K_CONFIGURATION_DEVICE = AUTO; + FLEX6K_CONFIGURATION_DEVICE = AUTO; + MERCURY_CONFIGURATION_DEVICE = AUTO; + EXCALIBUR_CONFIGURATION_DEVICE = AUTO; + APEX20K_CONFIGURATION_DEVICE = AUTO; + USE_CONFIGURATION_DEVICE = ON; + ENABLE_INIT_DONE_OUTPUT = OFF; + FLEX10K_ENABLE_LOCK_OUTPUT = OFF; + ENABLE_DEVICE_WIDE_OE = OFF; + ENABLE_DEVICE_WIDE_RESET = OFF; + RELEASE_CLEARS_BEFORE_TRI_STATES = OFF; + AUTO_RESTART_CONFIGURATION = OFF; + ENABLE_VREFB_PIN = OFF; + ENABLE_VREFA_PIN = OFF; + SECURITY_BIT = OFF; + USER_START_UP_CLOCK = OFF; + APEXII_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + FLEX10K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + FLEX6K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + MERCURY_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + EXCALIBUR_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + CYCLONE_CONFIGURATION_SCHEME = "ACTIVE SERIAL"; + STRATIX_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + APEX20K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + STRATIX_UPDATE_MODE = STANDARD; + USE_CHECKSUM_AS_USERCODE = OFF; + MAX7000_USE_CHECKSUM_AS_USERCODE = OFF; + MAX7000_JTAG_USER_CODE = FFFFFFFF; + FLEX10K_JTAG_USER_CODE = 7F; + MERCURY_JTAG_USER_CODE = FFFFFFFF; + APEX20K_JTAG_USER_CODE = FFFFFFFF; + STRATIX_JTAG_USER_CODE = FFFFFFFF; + MAX7000S_JTAG_USER_CODE = FFFF; + RESERVE_NCEO_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + FLEX10K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON; + FLEX6K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = OFF; + ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON; + MAX7000_ENABLE_JTAG_BST_SUPPORT = ON; + ENABLE_JTAG_BST_SUPPORT = OFF; + CONFIGURATION_CLOCK_DIVISOR = 1; + CONFIGURATION_CLOCK_FREQUENCY = "10 MHZ"; + CLOCK_SOURCE = INTERNAL; + COMPRESSION_MODE = OFF; + ON_CHIP_BITSTREAM_DECOMPRESSION = OFF; +} +AUTO_SLD_HUB_ENTITY +{ + AUTO_INSERT_SLD_HUB_ENTITY = ENABLE; + HUB_INSTANCE_NAME = SLD_HUB_INST; + HUB_ENTITY_NAME = SLD_HUB; +} +SIGNALTAP_LOGIC_ANALYZER_SETTINGS +{ + ENABLE_SIGNALTAP = Off; + AUTO_ENABLE_SMART_COMPILE = On; +} +CHIP(mrfm) +{ + DEVICE = EP1C12Q240C8; + DEVICE_FILTER_PACKAGE = "ANY QFP"; + DEVICE_FILTER_PIN_COUNT = 240; + DEVICE_FILTER_SPEED_GRADE = ANY; + AUTO_RESTART_CONFIGURATION = OFF; + RELEASE_CLEARS_BEFORE_TRI_STATES = OFF; + USER_START_UP_CLOCK = OFF; + ENABLE_DEVICE_WIDE_RESET = OFF; + ENABLE_DEVICE_WIDE_OE = OFF; + ENABLE_INIT_DONE_OUTPUT = OFF; + FLEX10K_ENABLE_LOCK_OUTPUT = OFF; + ENABLE_JTAG_BST_SUPPORT = OFF; + MAX7000_ENABLE_JTAG_BST_SUPPORT = ON; + APEX20K_JTAG_USER_CODE = FFFFFFFF; + MERCURY_JTAG_USER_CODE = FFFFFFFF; + FLEX10K_JTAG_USER_CODE = 7F; + MAX7000_JTAG_USER_CODE = FFFFFFFF; + MAX7000S_JTAG_USER_CODE = FFFF; + STRATIX_JTAG_USER_CODE = FFFFFFFF; + APEX20K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + MERCURY_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + FLEX6K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + FLEX10K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + EXCALIBUR_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + APEXII_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + STRATIX_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + CYCLONE_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + USE_CONFIGURATION_DEVICE = OFF; + APEX20K_CONFIGURATION_DEVICE = AUTO; + MERCURY_CONFIGURATION_DEVICE = AUTO; + FLEX6K_CONFIGURATION_DEVICE = AUTO; + FLEX10K_CONFIGURATION_DEVICE = AUTO; + EXCALIBUR_CONFIGURATION_DEVICE = AUTO; + STRATIX_CONFIGURATION_DEVICE = AUTO; + CYCLONE_CONFIGURATION_DEVICE = AUTO; + STRATIX_UPDATE_MODE = STANDARD; + APEX20K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + MERCURY_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + FLEX10K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + STRATIX_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE = ON; + DISABLE_NCS_AND_OE_PULLUPS_ON_CONFIG_DEVICE = OFF; + COMPRESSION_MODE = OFF; + ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON; + FLEX6K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = OFF; + FLEX10K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON; + EPROM_USE_CHECKSUM_AS_USERCODE = OFF; + USE_CHECKSUM_AS_USERCODE = OFF; + MAX7000_USE_CHECKSUM_AS_USERCODE = OFF; + GENERATE_TTF_FILE = OFF; + GENERATE_RBF_FILE = ON; + GENERATE_HEX_FILE = OFF; + SECURITY_BIT = OFF; + ENABLE_VREFA_PIN = OFF; + ENABLE_VREFB_PIN = OFF; + GENERATE_SVF_FILE = OFF; + GENERATE_ISC_FILE = OFF; + GENERATE_JAM_FILE = OFF; + GENERATE_JBC_FILE = OFF; + GENERATE_JBC_FILE_COMPRESSED = ON; + GENERATE_CONFIG_SVF_FILE = OFF; + GENERATE_CONFIG_ISC_FILE = OFF; + GENERATE_CONFIG_JAM_FILE = OFF; + GENERATE_CONFIG_JBC_FILE = OFF; + GENERATE_CONFIG_JBC_FILE_COMPRESSED = ON; + GENERATE_CONFIG_HEXOUT_FILE = OFF; + ON_CHIP_BITSTREAM_DECOMPRESSION = OFF; + BASE_PIN_OUT_FILE_ON_SAMEFRAME_DEVICE = OFF; + HEXOUT_FILE_START_ADDRESS = 0; + HEXOUT_FILE_COUNT_DIRECTION = UP; + RESERVE_ALL_UNUSED_PINS = "AS INPUT TRI-STATED"; + STRATIX_DEVICE_IO_STANDARD = LVTTL; + CLOCK_SOURCE = INTERNAL; + CONFIGURATION_CLOCK_FREQUENCY = "10 MHZ"; + CONFIGURATION_CLOCK_DIVISOR = 1; + RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_RDYNBUSY_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_DATA0_AFTER_CONFIGURATION = "AS INPUT TRI-STATED"; + RESERVE_NCEO_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_ASDO_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + SCLK : LOCATION = Pin_101; + SDI : LOCATION = Pin_100; + SEN : LOCATION = Pin_98; + SLD : LOCATION = Pin_95; + adc1_data[0] : LOCATION = Pin_5; + adc1_data[10] : LOCATION = Pin_235; + adc1_data[11] : LOCATION = Pin_234; + adc1_data[1] : LOCATION = Pin_4; + adc1_data[2] : LOCATION = Pin_3; + adc1_data[3] : LOCATION = Pin_2; + adc1_data[4] : LOCATION = Pin_1; + adc1_data[4] : IO_STANDARD = LVTTL; + adc1_data[5] : LOCATION = Pin_240; + adc1_data[6] : LOCATION = Pin_239; + adc1_data[7] : LOCATION = Pin_238; + adc1_data[8] : LOCATION = Pin_237; + adc1_data[9] : LOCATION = Pin_236; + adc2_data[0] : LOCATION = Pin_20; + adc2_data[10] : LOCATION = Pin_8; + adc2_data[11] : LOCATION = Pin_7; + adc2_data[1] : LOCATION = Pin_19; + adc2_data[2] : LOCATION = Pin_18; + adc2_data[3] : LOCATION = Pin_17; + adc2_data[4] : LOCATION = Pin_16; + adc2_data[5] : LOCATION = Pin_15; + adc2_data[6] : LOCATION = Pin_14; + adc2_data[7] : LOCATION = Pin_13; + adc2_data[8] : LOCATION = Pin_12; + adc2_data[9] : LOCATION = Pin_11; + adc3_data[0] : LOCATION = Pin_200; + adc3_data[10] : LOCATION = Pin_184; + adc3_data[11] : LOCATION = Pin_183; + adc3_data[1] : LOCATION = Pin_197; + adc3_data[2] : LOCATION = Pin_196; + adc3_data[3] : LOCATION = Pin_195; + adc3_data[4] : LOCATION = Pin_194; + adc3_data[5] : LOCATION = Pin_193; + adc3_data[6] : LOCATION = Pin_188; + adc3_data[7] : LOCATION = Pin_187; + adc3_data[8] : LOCATION = Pin_186; + adc3_data[9] : LOCATION = Pin_185; + adc4_data[0] : LOCATION = Pin_222; + adc4_data[10] : LOCATION = Pin_203; + adc4_data[11] : LOCATION = Pin_202; + adc4_data[1] : LOCATION = Pin_219; + adc4_data[2] : LOCATION = Pin_217; + adc4_data[3] : LOCATION = Pin_216; + adc4_data[4] : LOCATION = Pin_215; + adc4_data[5] : LOCATION = Pin_214; + adc4_data[6] : LOCATION = Pin_213; + adc4_data[7] : LOCATION = Pin_208; + adc4_data[8] : LOCATION = Pin_207; + adc4_data[9] : LOCATION = Pin_206; + adc_oeb[0] : LOCATION = Pin_228; + adc_oeb[1] : LOCATION = Pin_21; + adc_oeb[2] : LOCATION = Pin_181; + adc_oeb[3] : LOCATION = Pin_218; + adc_otr[0] : LOCATION = Pin_233; + adc_otr[1] : LOCATION = Pin_6; + adc_otr[2] : LOCATION = Pin_182; + adc_otr[3] : LOCATION = Pin_201; + adclk0 : LOCATION = Pin_224; + adclk1 : LOCATION = Pin_226; + clk0 : LOCATION = Pin_28; + clk0 : RESERVE_PIN = "AS INPUT TRI-STATED"; + clk0 : IO_STANDARD = LVTTL; + clk1 : LOCATION = Pin_29; + clk1 : RESERVE_PIN = "AS INPUT TRI-STATED"; + clk1 : IO_STANDARD = LVTTL; + clk3 : LOCATION = Pin_152; + clk3 : RESERVE_PIN = "AS INPUT TRI-STATED"; + clk3 : IO_STANDARD = LVTTL; + clk_120mhz : LOCATION = Pin_153; + clk_120mhz : IO_STANDARD = LVTTL; + clk_out : LOCATION = Pin_63; + clk_out : IO_STANDARD = LVTTL; + dac1_data[0] : LOCATION = Pin_165; + dac1_data[10] : LOCATION = Pin_177; + dac1_data[11] : LOCATION = Pin_178; + dac1_data[12] : LOCATION = Pin_179; + dac1_data[13] : LOCATION = Pin_180; + dac1_data[1] : LOCATION = Pin_166; + dac1_data[2] : LOCATION = Pin_167; + dac1_data[3] : LOCATION = Pin_168; + dac1_data[4] : LOCATION = Pin_169; + dac1_data[5] : LOCATION = Pin_170; + dac1_data[6] : LOCATION = Pin_173; + dac1_data[7] : LOCATION = Pin_174; + dac1_data[8] : LOCATION = Pin_175; + dac1_data[9] : LOCATION = Pin_176; + dac2_data[0] : LOCATION = Pin_159; + dac2_data[10] : LOCATION = Pin_163; + dac2_data[11] : LOCATION = Pin_139; + dac2_data[12] : LOCATION = Pin_164; + dac2_data[13] : LOCATION = Pin_138; + dac2_data[1] : LOCATION = Pin_158; + dac2_data[2] : LOCATION = Pin_160; + dac2_data[3] : LOCATION = Pin_156; + dac2_data[4] : LOCATION = Pin_161; + dac2_data[5] : LOCATION = Pin_144; + dac2_data[6] : LOCATION = Pin_162; + dac2_data[7] : LOCATION = Pin_141; + dac2_data[8] : LOCATION = Pin_143; + dac2_data[9] : LOCATION = Pin_140; + dac3_data[0] : LOCATION = Pin_122; + dac3_data[10] : LOCATION = Pin_134; + dac3_data[11] : LOCATION = Pin_135; + dac3_data[12] : LOCATION = Pin_136; + dac3_data[13] : LOCATION = Pin_137; + dac3_data[1] : LOCATION = Pin_123; + dac3_data[2] : LOCATION = Pin_124; + dac3_data[3] : LOCATION = Pin_125; + dac3_data[4] : LOCATION = Pin_126; + dac3_data[5] : LOCATION = Pin_127; + dac3_data[6] : LOCATION = Pin_128; + dac3_data[7] : LOCATION = Pin_131; + dac3_data[8] : LOCATION = Pin_132; + dac3_data[9] : LOCATION = Pin_133; + dac4_data[0] : LOCATION = Pin_104; + dac4_data[10] : LOCATION = Pin_118; + dac4_data[11] : LOCATION = Pin_119; + dac4_data[12] : LOCATION = Pin_120; + dac4_data[13] : LOCATION = Pin_121; + dac4_data[1] : LOCATION = Pin_105; + dac4_data[2] : LOCATION = Pin_106; + dac4_data[3] : LOCATION = Pin_107; + dac4_data[4] : LOCATION = Pin_108; + dac4_data[5] : LOCATION = Pin_113; + dac4_data[6] : LOCATION = Pin_114; + dac4_data[7] : LOCATION = Pin_115; + dac4_data[8] : LOCATION = Pin_116; + dac4_data[9] : LOCATION = Pin_117; + enable_rx : LOCATION = Pin_88; + enable_tx : LOCATION = Pin_93; + gndbus[0] : LOCATION = Pin_223; + gndbus[0] : RESERVE_PIN = "AS INPUT TRI-STATED"; + gndbus[0] : IO_STANDARD = LVTTL; + gndbus[1] : LOCATION = Pin_225; + gndbus[1] : RESERVE_PIN = "AS INPUT TRI-STATED"; + gndbus[1] : IO_STANDARD = LVTTL; + gndbus[2] : LOCATION = Pin_227; + gndbus[2] : RESERVE_PIN = "AS INPUT TRI-STATED"; + gndbus[2] : IO_STANDARD = LVTTL; + gndbus[3] : LOCATION = Pin_62; + gndbus[3] : RESERVE_PIN = "AS INPUT TRI-STATED"; + gndbus[3] : IO_STANDARD = LVTTL; + gndbus[4] : LOCATION = Pin_64; + gndbus[4] : RESERVE_PIN = "AS INPUT TRI-STATED"; + gndbus[4] : IO_STANDARD = LVTTL; + misc_pins[0] : LOCATION = Pin_87; + misc_pins[0] : IO_STANDARD = LVTTL; + misc_pins[10] : LOCATION = Pin_76; + misc_pins[10] : IO_STANDARD = LVTTL; + misc_pins[11] : LOCATION = Pin_74; + misc_pins[11] : IO_STANDARD = LVTTL; + misc_pins[1] : LOCATION = Pin_86; + misc_pins[1] : IO_STANDARD = LVTTL; + misc_pins[2] : LOCATION = Pin_85; + misc_pins[2] : IO_STANDARD = LVTTL; + misc_pins[3] : LOCATION = Pin_84; + misc_pins[3] : IO_STANDARD = LVTTL; + misc_pins[4] : LOCATION = Pin_83; + misc_pins[4] : IO_STANDARD = LVTTL; + misc_pins[5] : LOCATION = Pin_82; + misc_pins[5] : IO_STANDARD = LVTTL; + misc_pins[6] : LOCATION = Pin_79; + misc_pins[6] : IO_STANDARD = LVTTL; + misc_pins[7] : LOCATION = Pin_78; + misc_pins[7] : IO_STANDARD = LVTTL; + misc_pins[8] : LOCATION = Pin_77; + misc_pins[8] : IO_STANDARD = LVTTL; + misc_pins[9] : LOCATION = Pin_75; + misc_pins[9] : IO_STANDARD = LVTTL; + reset : LOCATION = Pin_94; + usbclk : LOCATION = Pin_55; + usbctl[0] : LOCATION = Pin_56; + usbctl[1] : LOCATION = Pin_54; + usbctl[2] : LOCATION = Pin_53; + usbctl[3] : LOCATION = Pin_58; + usbctl[4] : LOCATION = Pin_57; + usbctl[5] : LOCATION = Pin_44; + usbdata[0] : LOCATION = Pin_73; + usbdata[10] : LOCATION = Pin_41; + usbdata[11] : LOCATION = Pin_39; + usbdata[12] : LOCATION = Pin_38; + usbdata[12] : IO_STANDARD = LVTTL; + usbdata[13] : LOCATION = Pin_37; + usbdata[14] : LOCATION = Pin_24; + usbdata[15] : LOCATION = Pin_23; + usbdata[1] : LOCATION = Pin_68; + usbdata[2] : LOCATION = Pin_67; + usbdata[3] : LOCATION = Pin_66; + usbdata[4] : LOCATION = Pin_65; + usbdata[5] : LOCATION = Pin_61; + usbdata[6] : LOCATION = Pin_60; + usbdata[7] : LOCATION = Pin_59; + usbdata[8] : LOCATION = Pin_43; + usbdata[9] : LOCATION = Pin_42; + usbrdy[0] : LOCATION = Pin_45; + usbrdy[1] : LOCATION = Pin_46; + usbrdy[2] : LOCATION = Pin_47; + usbrdy[3] : LOCATION = Pin_48; + usbrdy[4] : LOCATION = Pin_49; + usbrdy[5] : LOCATION = Pin_50; + clear_status : LOCATION = Pin_99; +} diff --git a/fpga/toplevel/mrfm/mrfm.esf b/fpga/toplevel/mrfm/mrfm.esf new file mode 100644 index 0000000..72b84e3 --- /dev/null +++ b/fpga/toplevel/mrfm/mrfm.esf @@ -0,0 +1,14 @@ +SIMULATOR_SETTINGS +{ + ESTIMATE_POWER_CONSUMPTION = OFF; + GLITCH_INTERVAL = 1NS; + GLITCH_DETECTION = OFF; + SIMULATION_COVERAGE = ON; + CHECK_OUTPUTS = OFF; + SETUP_HOLD_DETECTION = OFF; + POWER_ESTIMATION_START_TIME = "0 NS"; + ADD_DEFAULT_PINS_TO_SIMULATION_OUTPUT_WAVEFORMS = ON; + SIMULATION_MODE = TIMING; + START_TIME = 0NS; + USE_COMPILER_SETTINGS = mrfm; +} diff --git a/fpga/toplevel/mrfm/mrfm.psf b/fpga/toplevel/mrfm/mrfm.psf new file mode 100644 index 0000000..678a7fa --- /dev/null +++ b/fpga/toplevel/mrfm/mrfm.psf @@ -0,0 +1,312 @@ +DEFAULT_DESIGN_ASSISTANT_SETTINGS +{ + HCPY_ALOAD_SIGNALS = OFF; + HCPY_VREF_PINS = OFF; + HCPY_CAT = OFF; + HCPY_ILLEGAL_HC_DEV_PKG = OFF; + ACLK_RULE_IMSZER_ADOMAIN = OFF; + ACLK_RULE_SZER_BTW_ACLK_DOMAIN = OFF; + ACLK_RULE_NO_SZER_ACLK_DOMAIN = OFF; + ACLK_CAT = OFF; + SIGNALRACE_RULE_ASYNCHPIN_SYNCH_CLKPIN = OFF; + SIGNALRACE_CAT = OFF; + NONSYNCHSTRUCT_RULE_LATCH_UNIDENTIFIED = OFF; + NONSYNCHSTRUCT_RULE_SRLATCH = OFF; + NONSYNCHSTRUCT_RULE_DLATCH = OFF; + NONSYNCHSTRUCT_RULE_MULTI_VIBRATOR = OFF; + NONSYNCHSTRUCT_RULE_ILLEGAL_PULSE_GEN = OFF; + NONSYNCHSTRUCT_RULE_RIPPLE_CLK = OFF; + NONSYNCHSTRUCT_RULE_DELAY_CHAIN = OFF; + NONSYNCHSTRUCT_RULE_REG_LOOP = OFF; + NONSYNCHSTRUCT_RULE_COMBLOOP = OFF; + NONSYNCHSTRUCT_CAT = OFF; + NONSYNCHSTRUCT_RULE_COMB_DRIVES_RAM_WE = OFF; + TIMING_RULE_COIN_CLKEDGE = OFF; + TIMING_RULE_SHIFT_REG = OFF; + TIMING_RULE_HIGH_FANOUTS = OFF; + TIMING_CAT = OFF; + RESET_RULE_ALL = OFF; + RESET_RULE_IMSYNCH_ASYNCH_DOMAIN = OFF; + RESET_RULE_UNSYNCH_ASYNCH_DOMAIN = OFF; + RESET_RULE_REG_ASNYCH = OFF; + RESET_RULE_COMB_ASYNCH_RESET = OFF; + RESET_RULE_IMSYNCH_EXRESET = OFF; + RESET_RULE_UNSYNCH_EXRESET = OFF; + RESET_RULE_INPINS_RESETNET = OFF; + RESET_CAT = OFF; + CLK_RULE_ALL = OFF; + CLK_RULE_MIX_EDGES = OFF; + CLK_RULE_CLKNET_CLKSPINES = OFF; + CLK_RULE_INPINS_CLKNET = OFF; + CLK_RULE_GATING_SCHEME = OFF; + CLK_RULE_INV_CLOCK = OFF; + CLK_RULE_COMB_CLOCK = OFF; + CLK_CAT = OFF; + HCPY_EXCEED_USER_IO_USAGE = OFF; + HCPY_EXCEED_RAM_USAGE = OFF; + NONSYNCHSTRUCT_RULE_ASYN_RAM = OFF; + SIGNALRACE_RULE_TRISTATE = OFF; + ASSG_RULE_MISSING_TIMING = OFF; + ASSG_RULE_MISSING_FMAX = OFF; + ASSG_CAT = OFF; +} +SYNTHESIS_FITTING_SETTINGS +{ + AUTO_SHIFT_REGISTER_RECOGNITION = ON; + AUTO_DSP_RECOGNITION = ON; + AUTO_RAM_RECOGNITION = ON; + REMOVE_DUPLICATE_LOGIC = ON; + AUTO_TURBO_BIT = ON; + AUTO_MERGE_PLLS = ON; + AUTO_OPEN_DRAIN_PINS = ON; + AUTO_PARALLEL_EXPANDERS = ON; + AUTO_FAST_OUTPUT_ENABLE_REGISTERS = OFF; + AUTO_FAST_OUTPUT_REGISTERS = OFF; + AUTO_FAST_INPUT_REGISTERS = OFF; + AUTO_CASCADE_CHAINS = ON; + AUTO_CARRY_CHAINS = ON; + AUTO_DELAY_CHAINS = ON; + MAX7000_PARALLEL_EXPANDER_CHAIN_LENGTH = 4; + PARALLEL_EXPANDER_CHAIN_LENGTH = 16; + CASCADE_CHAIN_LENGTH = 2; + STRATIX_CARRY_CHAIN_LENGTH = 70; + MERCURY_CARRY_CHAIN_LENGTH = 48; + FLEX10K_CARRY_CHAIN_LENGTH = 32; + FLEX6K_CARRY_CHAIN_LENGTH = 32; + CARRY_CHAIN_LENGTH = 48; + CARRY_OUT_PINS_LCELL_INSERT = ON; + NORMAL_LCELL_INSERT = ON; + AUTO_LCELL_INSERTION = ON; + ALLOW_XOR_GATE_USAGE = ON; + AUTO_PACKED_REGISTERS_STRATIX = NORMAL; + AUTO_PACKED_REGISTERS = OFF; + AUTO_PACKED_REG_CYCLONE = NORMAL; + FLEX10K_OPTIMIZATION_TECHNIQUE = AREA; + FLEX6K_OPTIMIZATION_TECHNIQUE = AREA; + MERCURY_OPTIMIZATION_TECHNIQUE = AREA; + APEX20K_OPTIMIZATION_TECHNIQUE = SPEED; + MAX7000_OPTIMIZATION_TECHNIQUE = SPEED; + STRATIX_OPTIMIZATION_TECHNIQUE = SPEED; + CYCLONE_OPTIMIZATION_TECHNIQUE = AREA; + FLEX10K_TECHNOLOGY_MAPPER = LUT; + FLEX6K_TECHNOLOGY_MAPPER = LUT; + MERCURY_TECHNOLOGY_MAPPER = LUT; + APEX20K_TECHNOLOGY_MAPPER = LUT; + MAX7000_TECHNOLOGY_MAPPER = "PRODUCT TERM"; + STRATIX_TECHNOLOGY_MAPPER = LUT; + AUTO_IMPLEMENT_IN_ROM = OFF; + AUTO_GLOBAL_MEMORY_CONTROLS = OFF; + AUTO_GLOBAL_REGISTER_CONTROLS = ON; + AUTO_GLOBAL_OE = ON; + AUTO_GLOBAL_CLOCK = ON; + USE_LPM_FOR_AHDL_OPERATORS = ON; + LIMIT_AHDL_INTEGERS_TO_32_BITS = OFF; + ENABLE_BUS_HOLD_CIRCUITRY = OFF; + WEAK_PULL_UP_RESISTOR = OFF; + TURBO_BIT = ON; + MAX7000_IGNORE_SOFT_BUFFERS = OFF; + IGNORE_SOFT_BUFFERS = ON; + MAX7000_IGNORE_LCELL_BUFFERS = AUTO; + IGNORE_LCELL_BUFFERS = OFF; + IGNORE_ROW_GLOBAL_BUFFERS = OFF; + IGNORE_GLOBAL_BUFFERS = OFF; + IGNORE_CASCADE_BUFFERS = OFF; + IGNORE_CARRY_BUFFERS = OFF; + REMOVE_DUPLICATE_REGISTERS = ON; + REMOVE_REDUNDANT_LOGIC_CELLS = OFF; + ALLOW_POWER_UP_DONT_CARE = ON; + PCI_IO = OFF; + NOT_GATE_PUSH_BACK = ON; + SLOW_SLEW_RATE = OFF; + DSP_BLOCK_BALANCING = AUTO; + STATE_MACHINE_PROCESSING = AUTO; +} +DEFAULT_HARDCOPY_SETTINGS +{ + HARDCOPY_EXTERNAL_CLOCK_JITTER = "0.0 NS"; +} +DEFAULT_TIMING_REQUIREMENTS +{ + INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; + RUN_ALL_TIMING_ANALYSES = ON; + IGNORE_CLOCK_SETTINGS = OFF; + DEFAULT_HOLD_MULTICYCLE = "SAME AS MULTICYCLE"; + CUT_OFF_IO_PIN_FEEDBACK = ON; + CUT_OFF_CLEAR_AND_PRESET_PATHS = ON; + CUT_OFF_READ_DURING_WRITE_PATHS = ON; + CUT_OFF_PATHS_BETWEEN_CLOCK_DOMAINS = ON; + DO_MIN_ANALYSIS = ON; + DO_MIN_TIMING = OFF; + NUMBER_OF_PATHS_TO_REPORT = 200; + NUMBER_OF_DESTINATION_TO_REPORT = 10; + NUMBER_OF_SOURCES_PER_DESTINATION_TO_REPORT = 10; + MAX_SCC_SIZE = 50; +} +HDL_SETTINGS +{ + VERILOG_INPUT_VERSION = VERILOG_2001; + ENABLE_IP_DEBUG = OFF; + VHDL_INPUT_VERSION = VHDL93; + VHDL_SHOW_LMF_MAPPING_MESSAGES = OFF; +} +PROJECT_INFO(mrfm) +{ + ORIGINAL_QUARTUS_VERSION = 3.0; + PROJECT_CREATION_TIME_DATE = "00:14:04 JULY 13, 2003"; + LAST_QUARTUS_VERSION = 3.0; + SHOW_REGISTRATION_MESSAGE = ON; + USER_LIBRARIES = "e:\usrp\fpga\megacells"; +} +THIRD_PARTY_EDA_TOOLS(mrfm) +{ + EDA_DESIGN_ENTRY_SYNTHESIS_TOOL = ""; + EDA_SIMULATION_TOOL = ""; + EDA_TIMING_ANALYSIS_TOOL = ""; + EDA_BOARD_DESIGN_TOOL = ""; + EDA_FORMAL_VERIFICATION_TOOL = ""; + EDA_RESYNTHESIS_TOOL = ""; +} +EDA_TOOL_SETTINGS(eda_design_synthesis) +{ + EDA_INPUT_GND_NAME = GND; + EDA_INPUT_VCC_NAME = VCC; + EDA_SHOW_LMF_MAPPING_MESSAGES = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_INPUT_DATA_FORMAT = EDIF; + EDA_OUTPUT_DATA_FORMAT = NONE; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + RESYNTHESIS_RETIMING = FULL; +} +EDA_TOOL_SETTINGS(eda_simulation) +{ + EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; + EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; + EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; + EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; + EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; + EDA_FLATTEN_BUSES = OFF; + EDA_MAP_ILLEGAL_CHARACTERS = OFF; + EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_OUTPUT_DATA_FORMAT = NONE; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + RESYNTHESIS_RETIMING = FULL; +} +EDA_TOOL_SETTINGS(eda_timing_analysis) +{ + EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; + EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; + EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; + EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; + EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; + EDA_FLATTEN_BUSES = OFF; + EDA_MAP_ILLEGAL_CHARACTERS = OFF; + EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_OUTPUT_DATA_FORMAT = NONE; + EDA_LAUNCH_CMD_LINE_TOOL = OFF; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + RESYNTHESIS_RETIMING = FULL; +} +EDA_TOOL_SETTINGS(eda_board_design) +{ + EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; + EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; + EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; + EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; + EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; + EDA_FLATTEN_BUSES = OFF; + EDA_MAP_ILLEGAL_CHARACTERS = OFF; + EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_OUTPUT_DATA_FORMAT = NONE; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + RESYNTHESIS_RETIMING = FULL; +} +EDA_TOOL_SETTINGS(eda_formal_verification) +{ + EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; + EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; + EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; + EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; + EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; + EDA_FLATTEN_BUSES = OFF; + EDA_MAP_ILLEGAL_CHARACTERS = OFF; + EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_OUTPUT_DATA_FORMAT = NONE; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + RESYNTHESIS_RETIMING = FULL; +} +EDA_TOOL_SETTINGS(eda_palace) +{ + EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; + EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; + EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; + EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; + EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; + EDA_FLATTEN_BUSES = OFF; + EDA_MAP_ILLEGAL_CHARACTERS = OFF; + EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_OUTPUT_DATA_FORMAT = NONE; + RESYNTHESIS_RETIMING = FULL; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; +} +CLOCK(clk_120mhz) +{ + FMAX_REQUIREMENT = "120.0 MHz"; + INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; + DUTY_CYCLE = 50; + DIVIDE_BASE_CLOCK_PERIOD_BY = 1; + MULTIPLY_BASE_CLOCK_PERIOD_BY = 1; + INVERT_BASE_CLOCK = OFF; +} +CLOCK(usbclk) +{ + FMAX_REQUIREMENT = "48.0 MHz"; + INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; + DUTY_CYCLE = 50; + DIVIDE_BASE_CLOCK_PERIOD_BY = 1; + MULTIPLY_BASE_CLOCK_PERIOD_BY = 1; + INVERT_BASE_CLOCK = OFF; +} +CLOCK(SCLK) +{ + FMAX_REQUIREMENT = "1.0 MHz"; + INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; + DUTY_CYCLE = 50; + DIVIDE_BASE_CLOCK_PERIOD_BY = 1; + MULTIPLY_BASE_CLOCK_PERIOD_BY = 1; + INVERT_BASE_CLOCK = OFF; +} +CLOCK(adclk0) +{ + FMAX_REQUIREMENT = "60.0 MHz"; + INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; + DUTY_CYCLE = 50; + DIVIDE_BASE_CLOCK_PERIOD_BY = 1; + MULTIPLY_BASE_CLOCK_PERIOD_BY = 1; + INVERT_BASE_CLOCK = OFF; +} +CLOCK(adclk1) +{ + FMAX_REQUIREMENT = "60.0 MHz"; + INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; + DUTY_CYCLE = 50; + DIVIDE_BASE_CLOCK_PERIOD_BY = 1; + MULTIPLY_BASE_CLOCK_PERIOD_BY = 1; + INVERT_BASE_CLOCK = OFF; +} diff --git a/fpga/toplevel/mrfm/mrfm.py b/fpga/toplevel/mrfm/mrfm.py new file mode 100644 index 0000000..0ce4601 --- /dev/null +++ b/fpga/toplevel/mrfm/mrfm.py @@ -0,0 +1,129 @@ +#!/usr/bin/env python +# +# This is mrfm_fft_sos.py +# Modification of Matt's mrfm_fft.py that reads filter coefs from file +# +# Copyright 2004,2005 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +from gnuradio import gr, gru +from gnuradio import usrp + +class source_c(usrp.source_c): + def __init__(self,fpga_filename): + usrp.source_c.__init__(self,which=0, decim_rate=64, nchan=2, mux=0x32103210, mode=0, + fpga_filename=fpga_filename) + + self._write_9862(0,2,0x80) # Bypass ADC buffer, minimum gain + self._write_9862(0,3,0x80) # Bypass ADC buffer, minimum gain + + self._write_9862(0,8,0) # TX PWR Down + self._write_9862(0,10,0) # DAC offset + self._write_9862(0,11,0) # DAC offset + self._write_9862(0,14,0x80) # gain + self._write_9862(0,16,0xff) # pga + self._write_9862(0,18,0x0c) # TX IF + self._write_9862(0,19,0x01) # TX Digital + self._write_9862(0,20,0x00) # TX Mod + + # max/min values are +/-2, so scale is set to make 2 = 32767 + + self._write_fpga_reg(69,0x0e) # debug mux + self._write_fpga_reg(5,-1) + self._write_fpga_reg(7,-1) + self._write_oe(0,0xffff, 0xffff) + self._write_oe(1,0xffff, 0xffff) + self._write_fpga_reg(14,0xf) + + self.decim = None + + def set_coeffs(self,frac_bits,b20,b10,b00,a20,a10,b21,b11,b01,a21,a11): + def make_val(address,value): + return (address << 16) | (value & 0xffff) + + # gain, scale already included in a's and b's from file + + self._write_fpga_reg(67,make_val(1,b20)) + self._write_fpga_reg(67,make_val(2,b10)) + self._write_fpga_reg(67,make_val(3,b00)) + self._write_fpga_reg(67,make_val(4,a20)) + self._write_fpga_reg(67,make_val(5,a10)) + + self._write_fpga_reg(67,make_val(7,b21)) + self._write_fpga_reg(67,make_val(8,b11)) + self._write_fpga_reg(67,make_val(9,b01)) + self._write_fpga_reg(67,make_val(10,a21)) + self._write_fpga_reg(67,make_val(11,a11)) + + self._write_fpga_reg(68,frac_bits) # Shift + + print "Biquad 0 : b2=%d b1=%d b0=%d a2=%d a1=%d" % (b20,b10,b00,a20,a10) + print "Biquad 1 : b2=%d b1=%d b0=%d a2=%d a1=%d" % (b21,b11,b01,a21,a11) + + def set_decim_rate(self,rate=None): + i=2 + turn=1 + a=1 + b=1 + while (rate>1) and (i<257): + if (rate/i) * i == rate: + if turn == 1: + if a*i<257: + a = a * i + turn = 0 + elif b*i<257: + b = b * i + turn = 0 + else: + print "Failed to set DECIMATOR" + return self.decim + elif b*i<257: + b = b * i + turn = 1 + elif a*i<257: + a = a * i + turn = 1 + else: + print "Failed to set DECIMATOR" + return self.decim + rate=rate/i + continue + i = i + 1 + if rate > 1: + print "Failed to set DECIMATOR" + return self.decim + else: + self.decim = a*b + print "a = %d b = %d" % (a,b) + self._write_fpga_reg(64,(a-1)*256+(b-1)) # Set actual decimation + + def decim_rate(self): + return self.decim + + def set_center_freq(self,freq): + self._write_fpga_reg(65,int(-freq/64e6*65536*65536)) # set center freq + + def set_compensator(self,a11,a12,a21,a22,shift): + self._write_fpga_reg(70,a11) + self._write_fpga_reg(71,a12) + self._write_fpga_reg(72,a21) + self._write_fpga_reg(73,a22) + self._write_fpga_reg(74,shift) # comp shift + diff --git a/fpga/toplevel/mrfm/mrfm.qpf b/fpga/toplevel/mrfm/mrfm.qpf new file mode 100644 index 0000000..9591408 --- /dev/null +++ b/fpga/toplevel/mrfm/mrfm.qpf @@ -0,0 +1,29 @@ +# Copyright (C) 1991-2004 Altera Corporation +# Any megafunction design, and related netlist (encrypted or decrypted), +# support information, device programming or simulation file, and any other +# associated documentation or information provided by Altera or a partner +# under Altera's Megafunction Partnership Program may be used only +# to program PLD devices (but not masked PLD devices) from Altera. Any +# other use of such megafunction design, netlist, support information, +# device programming or simulation file, or any other related documentation +# or information is prohibited for any other purpose, including, but not +# limited to modification, reverse engineering, de-compiling, or use with +# any other silicon devices, unless such use is explicitly licensed under +# a separate agreement with Altera or a megafunction partner. Title to the +# intellectual property, including patents, copyrights, trademarks, trade +# secrets, or maskworks, embodied in any such megafunction design, netlist, +# support information, device programming or simulation file, or any other +# related documentation or information provided by Altera or a megafunction +# partner, remains with Altera, the megafunction partner, or their respective +# licensors. No other licenses, including any licenses needed under any third +# party's intellectual property, are provided herein. + + + +QUARTUS_VERSION = "4.0" +DATE = "17:10:11 December 20, 2004" + + +# Active Revisions + +PROJECT_REVISION = "mrfm" diff --git a/fpga/toplevel/mrfm/mrfm.qsf b/fpga/toplevel/mrfm/mrfm.qsf new file mode 100644 index 0000000..ba1ae02 --- /dev/null +++ b/fpga/toplevel/mrfm/mrfm.qsf @@ -0,0 +1,411 @@ +# Copyright (C) 1991-2005 Altera Corporation +# Your use of Altera Corporation's design tools, logic functions +# and other software and tools, and its AMPP partner logic +# functions, and any output files any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Altera Program License +# Subscription Agreement, Altera MegaCore Function License +# Agreement, or other applicable license agreement, including, +# without limitation, that your use is for the sole purpose of +# programming logic devices manufactured by Altera and sold by +# Altera or its authorized distributors. Please refer to the +# applicable agreement for further details. + + +# The default values for assignments are stored in the file +# mrfm_assignment_defaults.qdf +# If this file doesn't exist, and for assignments not listed, see file +# assignment_defaults.qdf + +# Altera recommends that you do not modify this file. This +# file is updated automatically by the Quartus II software +# and any changes you make may be lost or overwritten. + + +# Project-Wide Assignments +# ======================== +set_global_assignment -name ORIGINAL_QUARTUS_VERSION 3.0 +set_global_assignment -name PROJECT_CREATION_TIME_DATE "00:14:04 JULY 13, 2003" +set_global_assignment -name LAST_QUARTUS_VERSION "5.1 SP2" + +# Pin & Location Assignments +# ========================== +set_global_assignment -name RESERVE_PIN "AS INPUT TRI-STATED" +set_location_assignment PIN_29 -to SCLK +set_location_assignment PIN_117 -to SDI +set_location_assignment PIN_28 -to usbclk +set_location_assignment PIN_107 -to usbctl[0] +set_location_assignment PIN_106 -to usbctl[1] +set_location_assignment PIN_105 -to usbctl[2] +set_location_assignment PIN_100 -to usbdata[0] +set_location_assignment PIN_84 -to usbdata[10] +set_location_assignment PIN_83 -to usbdata[11] +set_location_assignment PIN_82 -to usbdata[12] +set_location_assignment PIN_79 -to usbdata[13] +set_location_assignment PIN_78 -to usbdata[14] +set_location_assignment PIN_77 -to usbdata[15] +set_location_assignment PIN_99 -to usbdata[1] +set_location_assignment PIN_98 -to usbdata[2] +set_location_assignment PIN_95 -to usbdata[3] +set_location_assignment PIN_94 -to usbdata[4] +set_location_assignment PIN_93 -to usbdata[5] +set_location_assignment PIN_88 -to usbdata[6] +set_location_assignment PIN_87 -to usbdata[7] +set_location_assignment PIN_86 -to usbdata[8] +set_location_assignment PIN_85 -to usbdata[9] +set_location_assignment PIN_104 -to usbrdy[0] +set_location_assignment PIN_101 -to usbrdy[1] +set_location_assignment PIN_76 -to FX2_1 +set_location_assignment PIN_75 -to FX2_2 +set_location_assignment PIN_74 -to FX2_3 +set_location_assignment PIN_116 -to io_rx_a[0] +set_location_assignment PIN_115 -to io_rx_a[1] +set_location_assignment PIN_114 -to io_rx_a[2] +set_location_assignment PIN_113 -to io_rx_a[3] +set_location_assignment PIN_108 -to io_rx_a[4] +set_location_assignment PIN_195 -to io_rx_a[5] +set_location_assignment PIN_196 -to io_rx_a[6] +set_location_assignment PIN_197 -to io_rx_a[7] +set_location_assignment PIN_200 -to io_rx_a[8] +set_location_assignment PIN_201 -to io_rx_a[9] +set_location_assignment PIN_202 -to io_rx_a[10] +set_location_assignment PIN_203 -to io_rx_a[11] +set_location_assignment PIN_206 -to io_rx_a[12] +set_location_assignment PIN_207 -to io_rx_a[13] +set_location_assignment PIN_208 -to io_rx_a[14] +set_location_assignment PIN_214 -to io_rx_b[0] +set_location_assignment PIN_215 -to io_rx_b[1] +set_location_assignment PIN_216 -to io_rx_b[2] +set_location_assignment PIN_217 -to io_rx_b[3] +set_location_assignment PIN_218 -to io_rx_b[4] +set_location_assignment PIN_219 -to io_rx_b[5] +set_location_assignment PIN_222 -to io_rx_b[6] +set_location_assignment PIN_223 -to io_rx_b[7] +set_location_assignment PIN_224 -to io_rx_b[8] +set_location_assignment PIN_225 -to io_rx_b[9] +set_location_assignment PIN_226 -to io_rx_b[10] +set_location_assignment PIN_227 -to io_rx_b[11] +set_location_assignment PIN_228 -to io_rx_b[12] +set_location_assignment PIN_233 -to io_rx_b[13] +set_location_assignment PIN_234 -to io_rx_b[14] +set_location_assignment PIN_175 -to io_tx_a[0] +set_location_assignment PIN_176 -to io_tx_a[1] +set_location_assignment PIN_177 -to io_tx_a[2] +set_location_assignment PIN_178 -to io_tx_a[3] +set_location_assignment PIN_179 -to io_tx_a[4] +set_location_assignment PIN_180 -to io_tx_a[5] +set_location_assignment PIN_181 -to io_tx_a[6] +set_location_assignment PIN_182 -to io_tx_a[7] +set_location_assignment PIN_183 -to io_tx_a[8] +set_location_assignment PIN_184 -to io_tx_a[9] +set_location_assignment PIN_185 -to io_tx_a[10] +set_location_assignment PIN_186 -to io_tx_a[11] +set_location_assignment PIN_187 -to io_tx_a[12] +set_location_assignment PIN_188 -to io_tx_a[13] +set_location_assignment PIN_193 -to io_tx_a[14] +set_location_assignment PIN_73 -to io_tx_b[0] +set_location_assignment PIN_68 -to io_tx_b[1] +set_location_assignment PIN_67 -to io_tx_b[2] +set_location_assignment PIN_66 -to io_tx_b[3] +set_location_assignment PIN_65 -to io_tx_b[4] +set_location_assignment PIN_64 -to io_tx_b[5] +set_location_assignment PIN_63 -to io_tx_b[6] +set_location_assignment PIN_62 -to io_tx_b[7] +set_location_assignment PIN_61 -to io_tx_b[8] +set_location_assignment PIN_60 -to io_tx_b[9] +set_location_assignment PIN_59 -to io_tx_b[10] +set_location_assignment PIN_58 -to io_tx_b[11] +set_location_assignment PIN_57 -to io_tx_b[12] +set_location_assignment PIN_56 -to io_tx_b[13] +set_location_assignment PIN_55 -to io_tx_b[14] +set_location_assignment PIN_152 -to master_clk +set_location_assignment PIN_144 -to rx_a_a[0] +set_location_assignment PIN_143 -to rx_a_a[1] +set_location_assignment PIN_141 -to rx_a_a[2] +set_location_assignment PIN_140 -to rx_a_a[3] +set_location_assignment PIN_139 -to rx_a_a[4] +set_location_assignment PIN_138 -to rx_a_a[5] +set_location_assignment PIN_137 -to rx_a_a[6] +set_location_assignment PIN_136 -to rx_a_a[7] +set_location_assignment PIN_135 -to rx_a_a[8] +set_location_assignment PIN_134 -to rx_a_a[9] +set_location_assignment PIN_133 -to rx_a_a[10] +set_location_assignment PIN_132 -to rx_a_a[11] +set_location_assignment PIN_23 -to rx_a_b[0] +set_location_assignment PIN_21 -to rx_a_b[1] +set_location_assignment PIN_20 -to rx_a_b[2] +set_location_assignment PIN_19 -to rx_a_b[3] +set_location_assignment PIN_18 -to rx_a_b[4] +set_location_assignment PIN_17 -to rx_a_b[5] +set_location_assignment PIN_16 -to rx_a_b[6] +set_location_assignment PIN_15 -to rx_a_b[7] +set_location_assignment PIN_14 -to rx_a_b[8] +set_location_assignment PIN_13 -to rx_a_b[9] +set_location_assignment PIN_12 -to rx_a_b[10] +set_location_assignment PIN_11 -to rx_a_b[11] +set_location_assignment PIN_131 -to rx_b_a[0] +set_location_assignment PIN_128 -to rx_b_a[1] +set_location_assignment PIN_127 -to rx_b_a[2] +set_location_assignment PIN_126 -to rx_b_a[3] +set_location_assignment PIN_125 -to rx_b_a[4] +set_location_assignment PIN_124 -to rx_b_a[5] +set_location_assignment PIN_123 -to rx_b_a[6] +set_location_assignment PIN_122 -to rx_b_a[7] +set_location_assignment PIN_121 -to rx_b_a[8] +set_location_assignment PIN_120 -to rx_b_a[9] +set_location_assignment PIN_119 -to rx_b_a[10] +set_location_assignment PIN_118 -to rx_b_a[11] +set_location_assignment PIN_8 -to rx_b_b[0] +set_location_assignment PIN_7 -to rx_b_b[1] +set_location_assignment PIN_6 -to rx_b_b[2] +set_location_assignment PIN_5 -to rx_b_b[3] +set_location_assignment PIN_4 -to rx_b_b[4] +set_location_assignment PIN_3 -to rx_b_b[5] +set_location_assignment PIN_2 -to rx_b_b[6] +set_location_assignment PIN_240 -to rx_b_b[7] +set_location_assignment PIN_239 -to rx_b_b[8] +set_location_assignment PIN_238 -to rx_b_b[9] +set_location_assignment PIN_237 -to rx_b_b[10] +set_location_assignment PIN_236 -to rx_b_b[11] +set_location_assignment PIN_156 -to SDO +set_location_assignment PIN_153 -to SEN_FPGA +set_location_assignment PIN_159 -to tx_a[0] +set_location_assignment PIN_160 -to tx_a[1] +set_location_assignment PIN_161 -to tx_a[2] +set_location_assignment PIN_162 -to tx_a[3] +set_location_assignment PIN_163 -to tx_a[4] +set_location_assignment PIN_164 -to tx_a[5] +set_location_assignment PIN_165 -to tx_a[6] +set_location_assignment PIN_166 -to tx_a[7] +set_location_assignment PIN_167 -to tx_a[8] +set_location_assignment PIN_168 -to tx_a[9] +set_location_assignment PIN_169 -to tx_a[10] +set_location_assignment PIN_170 -to tx_a[11] +set_location_assignment PIN_173 -to tx_a[12] +set_location_assignment PIN_174 -to tx_a[13] +set_location_assignment PIN_38 -to tx_b[0] +set_location_assignment PIN_39 -to tx_b[1] +set_location_assignment PIN_41 -to tx_b[2] +set_location_assignment PIN_42 -to tx_b[3] +set_location_assignment PIN_43 -to tx_b[4] +set_location_assignment PIN_44 -to tx_b[5] +set_location_assignment PIN_45 -to tx_b[6] +set_location_assignment PIN_46 -to tx_b[7] +set_location_assignment PIN_47 -to tx_b[8] +set_location_assignment PIN_48 -to tx_b[9] +set_location_assignment PIN_49 -to tx_b[10] +set_location_assignment PIN_50 -to tx_b[11] +set_location_assignment PIN_53 -to tx_b[12] +set_location_assignment PIN_54 -to tx_b[13] +set_location_assignment PIN_158 -to TXSYNC_A +set_location_assignment PIN_37 -to TXSYNC_B +set_location_assignment PIN_235 -to io_rx_b[15] +set_location_assignment PIN_24 -to io_tx_b[15] +set_location_assignment PIN_213 -to io_rx_a[15] +set_location_assignment PIN_194 -to io_tx_a[15] +set_location_assignment PIN_1 -to MYSTERY_SIGNAL + +# Timing Assignments +# ================== +set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF + +# Analysis & Synthesis Assignments +# ================================ +set_global_assignment -name SAVE_DISK_SPACE OFF +set_global_assignment -name DEVICE_FILTER_PACKAGE "ANY QFP" +set_global_assignment -name DEVICE_FILTER_PIN_COUNT 240 +set_global_assignment -name EDA_DESIGN_ENTRY_SYNTHESIS_TOOL "" +set_global_assignment -name FAMILY Cyclone +set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE SPEED +set_global_assignment -name STRATIX_OPTIMIZATION_TECHNIQUE SPEED +set_global_assignment -name APEX20K_OPTIMIZATION_TECHNIQUE SPEED +set_global_assignment -name TOP_LEVEL_ENTITY mrfm +set_global_assignment -name VHDL_SHOW_LMF_MAPPING_MESSAGES OFF +set_global_assignment -name USER_LIBRARIES "e:\\usrp\\fpga\\megacells" +set_global_assignment -name AUTO_ENABLE_SMART_COMPILE ON + +# Fitter Assignments +# ================== +set_global_assignment -name DEVICE EP1C12Q240C8 +set_global_assignment -name CYCLONE_CONFIGURATION_SCHEME "PASSIVE SERIAL" +set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED" +set_global_assignment -name OPTIMIZE_HOLD_TIMING OFF +set_global_assignment -name OPTIMIZE_TIMING "NORMAL COMPILATION" +set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON +set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON +set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON +set_global_assignment -name IO_PLACEMENT_OPTIMIZATION OFF +set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT EXTRA +set_global_assignment -name INC_PLC_MODE OFF +set_global_assignment -name ROUTING_BACK_ANNOTATION_MODE OFF +set_instance_assignment -name IO_STANDARD LVTTL -to usbdata[12] +set_global_assignment -name STRATIX_DEVICE_IO_STANDARD LVTTL +set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1 + +# Timing Analysis Assignments +# =========================== +set_global_assignment -name MAX_SCC_SIZE 50 + +# EDA Netlist Writer Assignments +# ============================== +set_global_assignment -name EDA_SIMULATION_TOOL "" +set_global_assignment -name EDA_TIMING_ANALYSIS_TOOL "" +set_global_assignment -name EDA_BOARD_DESIGN_TOOL "" +set_global_assignment -name EDA_FORMAL_VERIFICATION_TOOL "" +set_global_assignment -name EDA_RESYNTHESIS_TOOL "" + +# Assembler Assignments +# ===================== +set_global_assignment -name USE_CONFIGURATION_DEVICE OFF +set_global_assignment -name GENERATE_RBF_FILE ON +set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED" +set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF + +# Simulator Assignments +# ===================== +set_global_assignment -name START_TIME "0 ns" +set_global_assignment -name GLITCH_INTERVAL "1 ns" + +# Design Assistant Assignments +# ============================ +set_global_assignment -name DRC_REPORT_TOP_FANOUT OFF +set_global_assignment -name DRC_REPORT_FANOUT_EXCEEDING OFF +set_global_assignment -name ASSG_CAT OFF +set_global_assignment -name ASSG_RULE_MISSING_FMAX OFF +set_global_assignment -name ASSG_RULE_MISSING_TIMING OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_ASYN_RAM OFF +set_global_assignment -name CLK_CAT OFF +set_global_assignment -name CLK_RULE_COMB_CLOCK OFF +set_global_assignment -name CLK_RULE_INV_CLOCK OFF +set_global_assignment -name CLK_RULE_GATING_SCHEME OFF +set_global_assignment -name CLK_RULE_INPINS_CLKNET OFF +set_global_assignment -name CLK_RULE_CLKNET_CLKSPINES OFF +set_global_assignment -name CLK_RULE_MIX_EDGES OFF +set_global_assignment -name RESET_CAT OFF +set_global_assignment -name RESET_RULE_INPINS_RESETNET OFF +set_global_assignment -name RESET_RULE_UNSYNCH_EXRESET OFF +set_global_assignment -name RESET_RULE_IMSYNCH_EXRESET OFF +set_global_assignment -name RESET_RULE_COMB_ASYNCH_RESET OFF +set_global_assignment -name RESET_RULE_UNSYNCH_ASYNCH_DOMAIN OFF +set_global_assignment -name RESET_RULE_IMSYNCH_ASYNCH_DOMAIN OFF +set_global_assignment -name TIMING_CAT OFF +set_global_assignment -name TIMING_RULE_SHIFT_REG OFF +set_global_assignment -name TIMING_RULE_COIN_CLKEDGE OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_COMB_DRIVES_RAM_WE OFF +set_global_assignment -name NONSYNCHSTRUCT_CAT OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_COMBLOOP OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_REG_LOOP OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_DELAY_CHAIN OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_RIPPLE_CLK OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_ILLEGAL_PULSE_GEN OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_MULTI_VIBRATOR OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_SRLATCH OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_LATCH_UNIDENTIFIED OFF +set_global_assignment -name SIGNALRACE_CAT OFF +set_global_assignment -name ACLK_CAT OFF +set_global_assignment -name ACLK_RULE_NO_SZER_ACLK_DOMAIN OFF +set_global_assignment -name ACLK_RULE_SZER_BTW_ACLK_DOMAIN OFF +set_global_assignment -name ACLK_RULE_IMSZER_ADOMAIN OFF +set_global_assignment -name HCPY_CAT OFF +set_global_assignment -name HCPY_VREF_PINS OFF + +# SignalTap II Assignments +# ======================== +set_global_assignment -name HUB_ENTITY_NAME SLD_HUB +set_global_assignment -name HUB_INSTANCE_NAME SLD_HUB_INST +set_global_assignment -name ENABLE_SIGNALTAP OFF + +# LogicLock Region Assignments +# ============================ +set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT OFF + +# ----------------- +# start CLOCK(SCLK) + + # Timing Assignments + # ================== +set_global_assignment -name DUTY_CYCLE 50 -section_id SCLK +set_global_assignment -name FMAX_REQUIREMENT "1 MHz" -section_id SCLK +set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id SCLK + +# end CLOCK(SCLK) +# --------------- + +# ----------------------- +# start CLOCK(master_clk) + + # Timing Assignments + # ================== +set_global_assignment -name DUTY_CYCLE 50 -section_id master_clk +set_global_assignment -name FMAX_REQUIREMENT "64 MHz" -section_id master_clk +set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id master_clk + +# end CLOCK(master_clk) +# --------------------- + +# ------------------- +# start CLOCK(usbclk) + + # Timing Assignments + # ================== +set_global_assignment -name DUTY_CYCLE 50 -section_id usbclk +set_global_assignment -name FMAX_REQUIREMENT "48 MHz" -section_id usbclk +set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id usbclk + +# end CLOCK(usbclk) +# ----------------- + +# ---------------------- +# start ENTITY(mrfm) + + # Timing Assignments + # ================== +set_instance_assignment -name CLOCK_SETTINGS SCLK -to SCLK +set_instance_assignment -name CLOCK_SETTINGS usbclk -to usbclk +set_instance_assignment -name CLOCK_SETTINGS master_clk -to master_clk + +# end ENTITY(mrfm) +# -------------------- + + +set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING ON +set_global_assignment -name SMART_RECOMPILE ON +set_global_assignment -name VERILOG_FILE mrfm.vh +set_global_assignment -name VERILOG_FILE biquad_2stage.v +set_global_assignment -name VERILOG_FILE mrfm_compensator.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/ram16.v +set_global_assignment -name VERILOG_FILE mrfm_proc.v +set_global_assignment -name VERILOG_FILE ../../megacells/fifo_4k.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/acc.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/mult.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/ram16_2sum.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/coeff_rom.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/halfband_decim.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/mac.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/coeff_ram.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/tx_chain.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/rx_dcoffset.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/adc_interface.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/io_pins.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/setting_reg.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/bidir_reg.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/cic_int_shifter.v +set_global_assignment -name VERILOG_FILE ../../megacells/clk_doubler.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/gen_sync.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/master_control.v +set_global_assignment -name VERILOG_FILE ../../megacells/fifo_2k.v +set_global_assignment -name VERILOG_FILE ../../megacells/bustri.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/rx_buffer.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/tx_buffer.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/phase_acc.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/cic_interp.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/cic_decim.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/cordic_stage.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/cordic.v +set_global_assignment -name VERILOG_FILE mrfm.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/clk_divider.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/serial_io.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/strobe_gen.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/sign_extend.v +set_global_assignment -name FITTER_EFFORT "STANDARD FIT" \ No newline at end of file diff --git a/fpga/toplevel/mrfm/mrfm.v b/fpga/toplevel/mrfm/mrfm.v new file mode 100644 index 0000000..cf9d111 --- /dev/null +++ b/fpga/toplevel/mrfm/mrfm.v @@ -0,0 +1,199 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2006 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + +// Top level module for a full setup with DUCs and DDCs + +// Uncomment the following to include optional circuitry + +`include "mrfm.vh" +`include "../../../firmware/include/fpga_regs_common.v" +`include "../../../firmware/include/fpga_regs_standard.v" + +module mrfm +(output MYSTERY_SIGNAL, + input master_clk, + input SCLK, + input SDI, + inout SDO, + input SEN_FPGA, + + input FX2_1, + output FX2_2, + output FX2_3, + + input wire [11:0] rx_a_a, + input wire [11:0] rx_b_a, + input wire [11:0] rx_a_b, + input wire [11:0] rx_b_b, + + output wire [13:0] tx_a, + output wire [13:0] tx_b, + + output wire TXSYNC_A, + output wire TXSYNC_B, + + // USB interface + input usbclk, + input wire [2:0] usbctl, + output wire [1:0] usbrdy, + inout [15:0] usbdata, // NB Careful, inout + + // These are the general purpose i/o's that go to the daughterboard slots + inout wire [15:0] io_tx_a, + inout wire [15:0] io_tx_b, + inout wire [15:0] io_rx_a, + inout wire [15:0] io_rx_b + ); + wire [15:0] debugdata,debugctrl; + assign MYSTERY_SIGNAL = 1'b0; + + wire clk64; + + wire WR = usbctl[0]; + wire RD = usbctl[1]; + wire OE = usbctl[2]; + + wire have_space, have_pkt_rdy; + assign usbrdy[0] = have_space; + assign usbrdy[1] = have_pkt_rdy; + + wire tx_underrun, rx_overrun; + wire clear_status = FX2_1; + assign FX2_2 = rx_overrun; + assign FX2_3 = tx_underrun; + + wire [15:0] usbdata_out; + + wire [3:0] dac0mux,dac1mux,dac2mux,dac3mux; + + wire tx_realsignals; + wire [3:0] rx_numchan; + + wire [15:0] tx_debugbus, rx_debugbus; + + wire enable_tx, enable_rx; + wire tx_dsp_reset, rx_dsp_reset, tx_bus_reset, rx_bus_reset; + wire [7:0] settings; + + // Tri-state bus macro + bustri bustri( .data(usbdata_out),.enabledt(OE),.tridata(usbdata) ); + + assign clk64 = master_clk; + + wire [15:0] ch0tx,ch1tx,ch2tx,ch3tx; + wire [15:0] ch0rx,ch1rx,ch2rx,ch3rx,ch4rx,ch5rx,ch6rx,ch7rx; + + wire serial_strobe; + wire [6:0] serial_addr; + wire [31:0] serial_data; + + ///////////////////////////////////////////////////////////////////////////////////////////////////// + + setting_reg #(`FR_TX_MUX) + sr_txmux(.clock(clk64),.reset(tx_dsp_reset),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data), + .out({dac3mux,dac2mux,dac1mux,dac0mux,tx_realsignals,tx_numchan})); + + ////////////////////////////////////////////////////////////////////////////////////////////////////// + // Signal Processing Chain + + reg [15:0] adc0; + wire [15:0] dac0; + wire [15:0] i,q,ip,qp; + wire strobe_out; + wire sync_out; + + always @(posedge clk64) + adc0 <= #1 {rx_a_a[11],rx_a_a[11:0],3'b0}; + + wire [15:0] adc0_corr; + rx_dcoffset #(0)rx_dcoffset0(.clock(clk64),.enable(1'b1),.reset(reset),.adc_in(adc0),.adc_out(adc0_corr), + .serial_addr(7'd0),.serial_data(32'd0),.serial_strobe(1'b0)); + + //wire [63:0] filt_debug = 64'd0; + + mrfm_proc mrfm_proc(.clock(clk64),.reset(rx_dsp_reset),.enable(enable_rx), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .signal_in(adc0_corr),.signal_out(dac0),.sync_out(sync_out), + .i(i),.q(q),.ip(ip),.qp(qp),.strobe_out(strobe_out), + .debugbus( /* filt_debug */ )); + + wire txsync = 1'b0; + assign TXSYNC_A = txsync; + assign TXSYNC_B = txsync; + + assign tx_a = dac0[15:2]; + + ////////////////////////////////////////////////////////////////////////////////////////////////// + // Data Collection on RX Buffer + + assign rx_numchan[0] = 1'b0; + setting_reg #(`FR_RX_MUX) sr_rxmux(.clock(clk64),.reset(rx_dsp_reset),.strobe(serial_strobe),.addr(serial_addr), + .in(serial_data),.out(rx_numchan[3:1])); + + rx_buffer rx_buffer + ( .usbclk(usbclk),.bus_reset(rx_bus_reset),.reset(rx_dsp_reset), + .usbdata(usbdata_out),.RD(RD),.have_pkt_rdy(have_pkt_rdy),.rx_overrun(rx_overrun), + .channels(rx_numchan), + .ch_0(i),.ch_1(q), + .ch_2(ip),.ch_3(qp), + .ch_4(16'd0),.ch_5(16'd0), + .ch_6(16'd0),.ch_7(16'd0), + .rxclk(clk64),.rxstrobe(strobe_out), + .clear_status(clear_status), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .debugbus(rx_debugbus) ); + + ////////////////////////////////////////////////////////////////////////////// + // Control Functions + + wire [31:0] capabilities = 32'd2; + + serial_io serial_io + ( .master_clk(clk64),.serial_clock(SCLK),.serial_data_in(SDI), + .enable(SEN_FPGA),.reset(1'b0),.serial_data_out(SDO), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .readback_0({io_rx_a,io_tx_a}),.readback_1({io_rx_b,io_tx_b}),.readback_2(capabilities),.readback_3(32'hf0f0931a) ); + + wire [15:0] reg_0,reg_1,reg_2,reg_3; + master_control master_control + ( .master_clk(clk64),.usbclk(usbclk), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .tx_bus_reset(tx_bus_reset),.rx_bus_reset(rx_bus_reset), + .tx_dsp_reset(tx_dsp_reset),.rx_dsp_reset(rx_dsp_reset), + .enable_tx(enable_tx),.enable_rx(enable_rx), + .interp_rate(interp_rate),.decim_rate(decim_rate), + .tx_sample_strobe(tx_sample_strobe),.strobe_interp(strobe_interp), + .rx_sample_strobe(rx_sample_strobe),.strobe_decim(strobe_decim), + .tx_empty(tx_empty), + .debug_0({15'd0,sync_out}), //filt_debug[63:48]), + .debug_1({15'd0,sync_out}), //filt_debug[47:32]), + .debug_2({15'd0,sync_out}), //filt_debug[31:16]), + .debug_3({15'd0,sync_out}), //filt_debug[15:0]), + .reg_0(reg_0),.reg_1(reg_1),.reg_2(reg_2),.reg_3(reg_3) ); + + io_pins io_pins + (.io_0(io_tx_a),.io_1(io_rx_a),.io_2(io_tx_b),.io_3(io_rx_b), + .reg_0(reg_0),.reg_1(reg_1),.reg_2(reg_2),.reg_3(reg_3), + .clock(clk64),.rx_reset(rx_dsp_reset),.tx_reset(tx_dsp_reset), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe)); + +endmodule // mrfm + diff --git a/fpga/toplevel/mrfm/mrfm.vh b/fpga/toplevel/mrfm/mrfm.vh new file mode 100644 index 0000000..808342d --- /dev/null +++ b/fpga/toplevel/mrfm/mrfm.vh @@ -0,0 +1,21 @@ + + +// MRFM Register defines + +`define FR_MRFM_DECIM 7'd64 +`define FR_MRFM_FREQ 7'd65 +`define FR_MRFM_PHASE 7'd66 +`define FR_MRFM_IIR_COEFF 7'd67 +`define FR_MRFM_IIR_SHIFT 7'd68 +`define FR_MRFM_DEBUG 7'd69 +`define FR_MRFM_COMP_A11 7'd70 +`define FR_MRFM_COMP_A12 7'd71 +`define FR_MRFM_COMP_A21 7'd72 +`define FR_MRFM_COMP_A22 7'd73 +`define FR_MRFM_COMP_SHIFT 7'd74 +`define FR_USER_11 7'd75 +`define FR_USER_12 7'd76 +`define FR_USER_13 7'd77 +`define FR_USER_14 7'd78 +`define FR_USER_15 7'd79 + diff --git a/fpga/toplevel/mrfm/mrfm_compensator.v b/fpga/toplevel/mrfm/mrfm_compensator.v new file mode 100644 index 0000000..f44b73b --- /dev/null +++ b/fpga/toplevel/mrfm/mrfm_compensator.v @@ -0,0 +1,80 @@ + + +module mrfm_compensator (input clock, input reset, input strobe_in, + input serial_strobe, input [6:0] serial_addr, input [31:0] serial_data, + input [15:0] i_in, input [15:0] q_in, output reg [15:0] i_out, output reg [15:0] q_out); + + wire [15:0] a11,a12,a21,a22; + reg [15:0] i_in_reg, q_in_reg; + wire [30:0] product; + reg [3:0] phase; + wire [15:0] data,coeff; + wire [7:0] shift; + wire [33:0] accum; + wire [15:0] scaled_accum; + wire enable_acc; + + setting_reg #(`FR_MRFM_COMP_A11) sr_a11(.clock(clock),.reset(reset), + .strobe(serial_strobe),.addr(serial_addr),.in(serial_data), + .out(a11),.changed()); + setting_reg #(`FR_MRFM_COMP_A12) sr_a12(.clock(clock),.reset(reset), + .strobe(serial_strobe),.addr(serial_addr),.in(serial_data), + .out(a12),.changed()); + setting_reg #(`FR_MRFM_COMP_A21) sr_a21(.clock(clock),.reset(reset), + .strobe(serial_strobe),.addr(serial_addr),.in(serial_data), + .out(a21),.changed()); + setting_reg #(`FR_MRFM_COMP_A22) sr_a22(.clock(clock),.reset(reset), + .strobe(serial_strobe),.addr(serial_addr),.in(serial_data), + .out(a22),.changed()); + setting_reg #(`FR_MRFM_COMP_SHIFT) sr_cshift(.clock(clock),.reset(reset), + .strobe(serial_strobe),.addr(serial_addr),.in(serial_data), + .out(shift),.changed()); + + mult mult (.clock(clock),.x(data),.y(coeff),.product(product),.enable_in(1'b1),.enable_out() ); + acc acc (.clock(clock),.reset(reset),.clear(clear_acc),.enable_in(enable_acc),.enable_out(), + .addend(product),.sum(accum) ); + shifter shifter (.in(accum),.out(scaled_accum),.shift(shift)); + + always @(posedge clock) + if(reset) + begin + i_in_reg <= #1 16'd0; + q_in_reg <= #1 16'd0; + end + else if(strobe_in) + begin + i_in_reg <= #1 i_in; + q_in_reg <= #1 q_in; + end + + always @(posedge clock) + if(reset) + phase <= #1 4'd0; + else if(strobe_in) + phase <= #1 4'd1; + else if(strobe_in != 4'd8) + phase <= #1 phase + 4'd1; + + assign data = ((phase == 4'd1)||(phase === 4'd4)) ? i_in_reg : + ((phase == 4'd2)||(phase == 4'd5)) ? q_in_reg : 16'd0; + + assign coeff = (phase == 4'd1) ? a11 : (phase == 4'd2) ? a12 : + (phase == 4'd4) ? a21 : (phase == 4'd5) ? a22 : 16'd0; + + assign clear_acc = (phase == 4'd0) || (phase == 4'd1) || (phase == 4'd4) || (phase==4'd8); + assign enable_acc = ~clear_acc; + + always @(posedge clock) + if(reset) + i_out <= #1 16'd0; + else if(phase == 4'd4) + i_out <= #1 scaled_accum; + + always @(posedge clock) + if(reset) + q_out <= #1 16'd0; + else if(phase == 4'd7) + q_out <= #1 scaled_accum; + + +endmodule // mrfm_compensator diff --git a/fpga/toplevel/mrfm/mrfm_fft.py b/fpga/toplevel/mrfm/mrfm_fft.py new file mode 100755 index 0000000..343ab01 --- /dev/null +++ b/fpga/toplevel/mrfm/mrfm_fft.py @@ -0,0 +1,319 @@ +#!/usr/bin/env python +# +# This is mrfm_fft_sos.py +# Modification of Matt's mrfm_fft.py that reads filter coefs from file +# +# Copyright 2004,2005 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +from gnuradio import gr, gru +from gnuradio import usrp +from gnuradio import eng_notation +from gnuradio.eng_option import eng_option +from gnuradio.wxgui import stdgui, fftsink, waterfallsink, scopesink, form, slider +from optparse import OptionParser +import wx +import sys +import mrfm + + +def pick_subdevice(u): + """ + The user didn't specify a subdevice on the command line. + If there's a daughterboard on A, select A. + If there's a daughterboard on B, select B. + Otherwise, select A. + """ + if u.db[0][0].dbid() >= 0: # dbid is < 0 if there's no d'board or a problem + return (0, 0) + if u.db[1][0].dbid() >= 0: + return (1, 0) + return (0, 0) + +def read_ints(filename): + try: + f = open(filename) + ints = [ int(i) for i in f.read().split() ] + f.close() + return ints + except: + return [] + +class app_flow_graph(stdgui.gui_flow_graph): + def __init__(self, frame, panel, vbox, argv): + stdgui.gui_flow_graph.__init__(self) + + self.frame = frame + self.panel = panel + + parser = OptionParser(option_class=eng_option) + parser.add_option("-R", "--rx-subdev-spec", type="subdev", default=None, + help="select USRP Rx side A or B (default=first one with a daughterboard)") + parser.add_option("-d", "--decim", type="int", default=16, + help="set fgpa decimation rate to DECIM [default=%default]") + parser.add_option("-f", "--freq", type="eng_float", default=None, + help="set frequency to FREQ", metavar="FREQ") + parser.add_option("-g", "--gain", type="eng_float", default=None, + help="set gain in dB (default is midpoint)") + parser.add_option("-W", "--waterfall", action="store_true", default=False, + help="Enable waterfall display") + parser.add_option("-8", "--width-8", action="store_true", default=False, + help="Enable 8-bit samples across USB") + parser.add_option("-S", "--oscilloscope", action="store_true", default=False, + help="Enable oscilloscope display") + parser.add_option("-F", "--filename", default=None, + help="Name of file with filter coefficients") + parser.add_option("-C", "--cfilename", default=None, + help="Name of file with compensator coefficients") + parser.add_option("-B", "--bitstream", default="mrfm.rbf", + help="Name of FPGA Bitstream file (.rbf)") + parser.add_option("-n", "--frame-decim", type="int", default=20, + help="set oscope frame decimation factor to n [default=12]") + (options, args) = parser.parse_args() + if len(args) != 0: + parser.print_help() + sys.exit(1) + + self.show_debug_info = True + + # default filter coefs + b00 = b01 = 16384 + b10 = b20 = a10 = a20 = b11 = b21 = a11 = a21 = 0 + + ba = read_ints(options.filename) + if len(ba) >= 6: + b00 = ba[0]; b10 = ba[1]; b20 = ba[2]; a10 = ba[4]; a20 = ba[5] + if len(ba) >= 12: + b01 = ba[6]; b11 = ba[7]; b21 = ba[8]; a11 = ba[10]; a21=ba[11] + print b00, b10, b20, a10, a20, b01, b11, b21, a11, a21 + + # default compensator coefficients + c11 = c22 = 1 + c12 = c21 = cscale = 0 + + cs = read_ints(options.cfilename) + if len(cs) >= 5: + c11 = cs[0]; c12 = cs[1]; c21 = cs[2]; c22 = cs[3]; cscale = cs[4] + print c11, c12, c21, c22, cscale + + # build the graph + self.u = mrfm.source_c(options.bitstream) + + self.u.set_decim_rate(options.decim) + self.u.set_center_freq(options.freq) + + frac_bits = 14 + self.u.set_coeffs(frac_bits,b20,b10,b00,a20,a10,b21,b11,b01,a21,a11) + + self.u.set_compensator(c11,c12,c21,c22,cscale) + + if options.rx_subdev_spec is None: + options.rx_subdev_spec = pick_subdevice(self.u) + self.u.set_mux(usrp.determine_rx_mux_value(self.u, options.rx_subdev_spec)) + + if options.width_8: + width = 8 + shift = 8 + format = self.u.make_format(width, shift) + print "format =", hex(format) + r = self.u.set_format(format) + print "set_format =", r + + # determine the daughterboard subdevice we're using + self.subdev = usrp.selected_subdev(self.u, options.rx_subdev_spec) + + #input_rate = self.u.adc_freq() / self.u.decim_rate() + input_rate = self.u.adc_freq() / options.decim + + # fft_rate = 15 + fft_rate = 5 + + self.deint = gr.deinterleave(gr.sizeof_gr_complex) + self.connect(self.u,self.deint) + + if options.waterfall: + self.scope1=waterfallsink.waterfall_sink_c (self, panel, fft_size=1024, sample_rate=input_rate, + fft_rate=fft_rate) + self.scope2=waterfallsink.waterfall_sink_c (self, panel, fft_size=1024, sample_rate=input_rate, + fft_rate=fft_rate) + + elif options.oscilloscope: + self.scope1 = scopesink.scope_sink_c(self, panel, sample_rate=input_rate,frame_decim=options.frame_decim) # added option JPJ 4/21/2006 + self.scope2 = scopesink.scope_sink_c(self, panel, sample_rate=input_rate,frame_decim=options.frame_decim) + + else: + self.scope1 = fftsink.fft_sink_c (self, panel, fft_size=1024, sample_rate=input_rate, + fft_rate=fft_rate) + self.scope2 = fftsink.fft_sink_c (self, panel, fft_size=1024, sample_rate=input_rate, + fft_rate=fft_rate) + + # Show I, I' on top scope panel, Q, Q' on bottom + #self.fin = gr.complex_to_float() + #self.fout = gr.complex_to_float() + + #self.connect((self.deint,0), self.fin) + #self.connect((self.deint,1), self.fout) + + #self.ii = gr.float_to_complex() + #self.qq = gr.float_to_complex() + + #self.connect((self.fin,0), (self.ii,0)) + #self.connect((self.fout,0), (self.ii,1)) + #self.connect((self.fin,1), (self.qq,0)) + #self.connect((self.fout,1), (self.qq,1)) + + #self.connect(self.ii, self.scope1) + #self.connect(self.qq, self.scope2) + + self.connect ((self.deint,0),self.scope1) + self.connect ((self.deint,1),self.scope2) + + self._build_gui(vbox) + + # set initial values + + if options.gain is None: + # if no gain was specified, use the mid-point in dB + g = self.subdev.gain_range() + options.gain = float(g[0]+g[1])/2 + + if options.freq is None: + # if no freq was specified, use the mid-point + r = self.subdev.freq_range() + options.freq = float(r[0]+r[1])/2 + + self.set_gain(options.gain) + + if not(self.set_freq(options.freq)): + self._set_status_msg("Failed to set initial frequency") + + if self.show_debug_info: + self.myform['decim'].set_value(self.u.decim_rate()) + self.myform['fs@usb'].set_value(self.u.adc_freq() / self.u.decim_rate()) + self.myform['dbname'].set_value(self.subdev.name()) + + + def _set_status_msg(self, msg): + self.frame.GetStatusBar().SetStatusText(msg, 0) + + def _build_gui(self, vbox): + + def _form_set_freq(kv): + return self.set_freq(kv['freq']) + + vbox.Add(self.scope1.win, 10, wx.EXPAND) + vbox.Add(self.scope2.win, 10, wx.EXPAND) + + # add control area at the bottom + self.myform = myform = form.form() + hbox = wx.BoxSizer(wx.HORIZONTAL) + hbox.Add((5,0), 0, 0) + myform['freq'] = form.float_field( + parent=self.panel, sizer=hbox, label="Center freq", weight=1, + callback=myform.check_input_and_call(_form_set_freq, self._set_status_msg)) + + hbox.Add((5,0), 0, 0) + g = self.subdev.gain_range() + myform['gain'] = form.slider_field(parent=self.panel, sizer=hbox, label="Gain", + weight=3, + min=int(g[0]), max=int(g[1]), + callback=self.set_gain) + + hbox.Add((5,0), 0, 0) + vbox.Add(hbox, 0, wx.EXPAND) + + self._build_subpanel(vbox) + + def _build_subpanel(self, vbox_arg): + # build a secondary information panel (sometimes hidden) + + # FIXME figure out how to have this be a subpanel that is always + # created, but has its visibility controlled by foo.Show(True/False) + + if not(self.show_debug_info): + return + + panel = self.panel + vbox = vbox_arg + myform = self.myform + + #panel = wx.Panel(self.panel, -1) + #vbox = wx.BoxSizer(wx.VERTICAL) + + hbox = wx.BoxSizer(wx.HORIZONTAL) + hbox.Add((5,0), 0) + myform['decim'] = form.static_float_field( + parent=panel, sizer=hbox, label="Decim") + + hbox.Add((5,0), 1) + myform['fs@usb'] = form.static_float_field( + parent=panel, sizer=hbox, label="Fs@USB") + + hbox.Add((5,0), 1) + myform['dbname'] = form.static_text_field( + parent=panel, sizer=hbox) + + hbox.Add((5,0), 1) + myform['baseband'] = form.static_float_field( + parent=panel, sizer=hbox, label="Analog BB") + + hbox.Add((5,0), 1) + myform['ddc'] = form.static_float_field( + parent=panel, sizer=hbox, label="DDC") + + hbox.Add((5,0), 0) + vbox.Add(hbox, 0, wx.EXPAND) + + + + def set_freq(self, target_freq): + """ + Set the center frequency we're interested in. + + @param target_freq: frequency in Hz + @rypte: bool + + Tuning is a two step process. First we ask the front-end to + tune as close to the desired frequency as it can. Then we use + the result of that operation and our target_frequency to + determine the value for the digital down converter. + """ + r = self.u.tune(0, self.subdev, target_freq) + + if r: + self.myform['freq'].set_value(target_freq) # update displayed value + if self.show_debug_info: + self.myform['baseband'].set_value(r.baseband_freq) + self.myform['ddc'].set_value(r.dxc_freq) + return True + + return False + + def set_gain(self, gain): + self.myform['gain'].set_value(gain) # update displayed value + self.subdev.set_gain(gain) + + +def main (): + app = stdgui.stdapp(app_flow_graph, "USRP FFT", nstatus=1) + app.MainLoop() + +if __name__ == '__main__': + main () diff --git a/fpga/toplevel/mrfm/mrfm_proc.v b/fpga/toplevel/mrfm/mrfm_proc.v new file mode 100644 index 0000000..80de9fc --- /dev/null +++ b/fpga/toplevel/mrfm/mrfm_proc.v @@ -0,0 +1,96 @@ + +`include "mrfm.vh" +`include "../../../firmware/include/fpga_regs_common.v" +`include "../../../firmware/include/fpga_regs_standard.v" + +module mrfm_proc (input clock, input reset, input enable, + input [6:0] serial_addr, input [31:0] serial_data, input serial_strobe, + input [15:0] signal_in, output wire [15:0] signal_out, output wire sync_out, + output wire [15:0] i, output wire [15:0] q, + output wire [15:0] ip, output wire [15:0] qp, + output wire strobe_out, output wire [63:0] debugbus); + + // Strobes + wire sample_strobe, strobe_0, strobe_1, strobe_2; + assign sample_strobe = 1'b1; + wire [7:0] rate_0, rate_1, rate_2; + + setting_reg #(`FR_MRFM_DECIM) sr_decim(.clock(clock),.reset(reset),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out({rate_2,rate_1,rate_0})); + + strobe_gen strobe_gen_0 + ( .clock(clock),.reset(reset),.enable(enable), + .rate(rate_0),.strobe_in(sample_strobe),.strobe(strobe_0) ); + strobe_gen strobe_gen_1 + ( .clock(clock),.reset(reset),.enable(enable), + .rate(rate_1),.strobe_in(strobe_0),.strobe(strobe_1) ); + + wire [31:0] phase; + + assign sync_out = phase[31]; + wire [15:0] i_decim_0, i_decim_1, i_decim_2; + wire [15:0] q_decim_0, q_decim_1, q_decim_2; + + wire [15:0] i_interp_0, i_interp_1, i_interp_2; + wire [15:0] q_interp_0, q_interp_1, q_interp_2; + + wire [15:0] i_filt, q_filt, i_comp, q_comp; + + assign ip=i_comp; + assign qp=q_comp; + + phase_acc #(`FR_MRFM_FREQ,`FR_MRFM_PHASE,32) rx_phase_acc + (.clk(clock),.reset(reset),.enable(enable), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .strobe(sample_strobe),.phase(phase) ); + + cordic rx_cordic (.clock(clock),.reset(reset),.enable(enable), + .xi(signal_in),.yi(16'd0),.zi(phase[31:16]), + .xo(i_decim_0),.yo(q_decim_0),.zo() ); + + cic_decim cic_decim_i_0 (.clock(clock),.reset(reset),.enable(enable), + .rate(rate_0),.strobe_in(sample_strobe),.strobe_out(strobe_0), + .signal_in(i_decim_0),.signal_out(i_decim_1)); + cic_decim cic_decim_i_1 (.clock(clock),.reset(reset),.enable(enable), + .rate(rate_1),.strobe_in(strobe_0),.strobe_out(strobe_1), + .signal_in(i_decim_1),.signal_out(i)); + + cic_decim cic_decim_q_0 (.clock(clock),.reset(reset),.enable(enable), + .rate(rate_0),.strobe_in(sample_strobe),.strobe_out(strobe_0), + .signal_in(q_decim_0),.signal_out(q_decim_1)); + cic_decim cic_decim_q_1 (.clock(clock),.reset(reset),.enable(enable), + .rate(rate_1),.strobe_in(strobe_0),.strobe_out(strobe_1), + .signal_in(q_decim_1),.signal_out(q)); + + assign strobe_out = strobe_1; + + biquad_2stage iir_i (.clock(clock),.reset(reset),.strobe_in(strobe_1), + .serial_strobe(serial_strobe),.serial_addr(serial_addr),.serial_data(serial_data), + .sample_in(i),.sample_out(i_filt),.debugbus(debugbus)); + + biquad_2stage iir_q (.clock(clock),.reset(reset),.strobe_in(strobe_1), + .serial_strobe(serial_strobe),.serial_addr(serial_addr),.serial_data(serial_data), + .sample_in(q),.sample_out(q_filt),.debugbus()); + + mrfm_compensator compensator (.clock(clock),.reset(reset),.strobe_in(strobe_1), + .serial_strobe(serial_strobe),.serial_addr(serial_addr),.serial_data(serial_data), + .i_in(i_filt),.q_in(q_filt),.i_out(i_comp),.q_out(q_comp)); + + cic_interp cic_interp_i_0 (.clock(clock),.reset(reset),.enable(enable), + .rate(rate_1),.strobe_in(strobe_1),.strobe_out(strobe_0), + .signal_in(i_comp),.signal_out(i_interp_0)); + cic_interp cic_interp_i_1 (.clock(clock),.reset(reset),.enable(enable), + .rate(rate_0),.strobe_in(strobe_0),.strobe_out(sample_strobe), + .signal_in(i_interp_0),.signal_out(i_interp_1)); + + cic_interp cic_interp_q_0 (.clock(clock),.reset(reset),.enable(enable), + .rate(rate_1),.strobe_in(strobe_1),.strobe_out(strobe_0), + .signal_in(q_comp),.signal_out(q_interp_0)); + cic_interp cic_interp_q_1 (.clock(clock),.reset(reset),.enable(enable), + .rate(rate_0),.strobe_in(strobe_0),.strobe_out(sample_strobe), + .signal_in(q_interp_0),.signal_out(q_interp_1)); + + cordic tx_cordic (.clock(clock),.reset(reset),.enable(enable), + .xi(i_interp_1),.yi(q_interp_1),.zi(-phase[31:16]), + .xo(signal_out),.yo(),.zo() ); + +endmodule // mrfm_proc diff --git a/fpga/toplevel/mrfm/shifter.v b/fpga/toplevel/mrfm/shifter.v new file mode 100644 index 0000000..08d49db --- /dev/null +++ b/fpga/toplevel/mrfm/shifter.v @@ -0,0 +1,106 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2005,2006 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + +module shifter(input wire [33:0] in, output wire [15:0] out, input wire [7:0] shift); + // Wish we could do assign out = in[15+shift:shift]; + + reg [15:0] quotient, remainder; + wire [15:0] out_unclipped; + reg [18:0] msbs; + wire in_range; + + always @* + case(shift) + 0 : quotient = in[15:0]; + 1 : quotient = in[16:1]; + 2 : quotient = in[17:2]; + 3 : quotient = in[18:3]; + 4 : quotient = in[19:4]; + 5 : quotient = in[20:5]; + 6 : quotient = in[21:6]; + 7 : quotient = in[22:7]; + 8 : quotient = in[23:8]; + 9 : quotient = in[24:9]; + 10 : quotient = in[25:10]; + 11 : quotient = in[26:11]; + 12 : quotient = in[27:12]; + 13 : quotient = in[28:13]; + 14 : quotient = in[29:14]; + 15 : quotient = in[30:15]; + 16 : quotient = in[31:16]; + 17 : quotient = in[32:17]; + 18 : quotient = in[33:18]; + default : quotient = in[15:0]; + endcase // case(shift) + + always @* + case(shift) + 0 : remainder = 16'b0; + 1 : remainder = {in[0],15'b0}; + 2 : remainder = {in[1:0],14'b0}; + 3 : remainder = {in[2:0],13'b0}; + 4 : remainder = {in[3:0],12'b0}; + 5 : remainder = {in[4:0],11'b0}; + 6 : remainder = {in[5:0],10'b0}; + 7 : remainder = {in[6:0],9'b0}; + 8 : remainder = {in[7:0],8'b0}; + 9 : remainder = {in[8:0],7'b0}; + 10 : remainder = {in[9:0],6'b0}; + 11 : remainder = {in[10:0],5'b0}; + 12 : remainder = {in[11:0],4'b0}; + 13 : remainder = {in[12:0],3'b0}; + 14 : remainder = {in[13:0],2'b0}; + 15 : remainder = {in[14:0],1'b0}; + 16 : remainder = in[15:0]; + 17 : remainder = in[16:1]; + 18 : remainder = in[17:2]; + default : remainder = 16'b0; + endcase // case(shift) + + always @* + case(shift) + 0 : msbs = in[33:15]; + 1 : msbs = {in[33],in[33:16]}; + 2 : msbs = {{2{in[33]}},in[33:17]}; + 3 : msbs = {{3{in[33]}},in[33:18]}; + 4 : msbs = {{4{in[33]}},in[33:19]}; + 5 : msbs = {{5{in[33]}},in[33:20]}; + 6 : msbs = {{6{in[33]}},in[33:21]}; + 7 : msbs = {{7{in[33]}},in[33:22]}; + 8 : msbs = {{8{in[33]}},in[33:23]}; + 9 : msbs = {{9{in[33]}},in[33:24]}; + 10 : msbs = {{10{in[33]}},in[33:25]}; + 11 : msbs = {{11{in[33]}},in[33:26]}; + 12 : msbs = {{12{in[33]}},in[33:27]}; + 13 : msbs = {{13{in[33]}},in[33:28]}; + 14 : msbs = {{14{in[33]}},in[33:29]}; + 15 : msbs = {{15{in[33]}},in[33:30]}; + 16 : msbs = {{16{in[33]}},in[33:31]}; + 17 : msbs = {{17{in[33]}},in[33:32]}; + 18 : msbs = {{18{in[33]}},in[33]}; + default : msbs = in[33:15]; + endcase // case(shift) + + assign in_range = &msbs | ~(|msbs); + assign out_unclipped = quotient + (in[33] & |remainder); + assign out = in_range ? out_unclipped : {in[33],{15{~in[33]}}}; + +endmodule // shifter diff --git a/fpga/toplevel/sizetest/sizetest.csf b/fpga/toplevel/sizetest/sizetest.csf new file mode 100644 index 0000000..4b724e7 --- /dev/null +++ b/fpga/toplevel/sizetest/sizetest.csf @@ -0,0 +1,160 @@ +COMPILER_SETTINGS +{ + IO_PLACEMENT_OPTIMIZATION = OFF; + ENABLE_DRC_SETTINGS = OFF; + PHYSICAL_SYNTHESIS_REGISTER_RETIMING = OFF; + PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION = OFF; + PHYSICAL_SYNTHESIS_COMBO_LOGIC = OFF; + DRC_FANOUT_EXCEEDING = 30; + DRC_REPORT_FANOUT_EXCEEDING = OFF; + DRC_TOP_FANOUT = 50; + DRC_REPORT_TOP_FANOUT = OFF; + RUN_DRC_DURING_COMPILATION = OFF; + ADV_NETLIST_OPT_RETIME_CORE_AND_IO = ON; + ADV_NETLIST_OPT_SYNTH_USE_FITTER_INFO = OFF; + ADV_NETLIST_OPT_SYNTH_GATE_RETIME = OFF; + ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP = OFF; + SMART_COMPILE_IGNORES_TDC_FOR_STRATIX_PLL_CHANGES = OFF; + MERGE_HEX_FILE = OFF; + TRUE_WYSIWYG_FLOW = OFF; + SEED = 1; + FINAL_PLACEMENT_OPTIMIZATION = AUTOMATICALLY; + FAMILY = Cyclone; + DPRAM_DUAL_PORT_MODE_OTHER_SIGNALS_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2"; + DPRAM_32BIT_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA1 = "MEGALAB COLUMN 1"; + DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA1 = "MEGALAB COLUMN 1"; + DPRAM_DUAL_PORT_MODE_OUTPUT_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2"; + DPRAM_32BIT_SINGLE_PORT_MODE_OUTPUT_EPXA1 = "LOWER TO 1ESB UPPER TO 1"; + DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_OUTPUT_EPXA1 = "MEGALAB COLUMN 1"; + DPRAM_DUAL_PORT_MODE_INPUT_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2"; + DPRAM_32BIT_SINGLE_PORT_MODE_INPUT_EPXA1 = "MEGALAB COLUMN 1"; + DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_INPUT_EPXA1 = "MEGALAB COLUMN 1"; + DPRAM_DUAL_PORT_MODE_OTHER_SIGNALS_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4"; + DPRAM_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4"; + DPRAM_WIDE_MODE_OTHER_SIGNALS_EPXA4_10 = "MEGALAB COLUMN 3"; + DPRAM_DEEP_MODE_OTHER_SIGNALS_EPXA4_10 = "MEGALAB COLUMN 3"; + DPRAM_DUAL_PORT_MODE_OUTPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4ESB"; + DPRAM_SINGLE_PORT_MODE_OUTPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4ESB"; + DPRAM_WIDE_MODE_OUTPUT_EPXA4_10 = "LOWER TO 3 UPPER TO 4ESB"; + DPRAM_DEEP_MODE_OUTPUT_EPXA4_10 = "MEGALAB COLUMN 3"; + DPRAM_DUAL_PORT_MODE_INPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4"; + DPRAM_SINGLE_PORT_MODE_INPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4"; + DPRAM_WIDE_MODE_INPUT_EPXA4_10 = "LOWER TO 3 UPPER TO 4"; + DPRAM_DEEP_MODE_INPUT_EPXA4_10 = "MEGALAB COLUMN 3"; + DPRAM_OTHER_SIGNALS_EPXA4_10 = "DEFAULT OTHER ROUTING OPTIONS"; + DPRAM_OUTPUT_EPXA4_10 = "DEFAULT OUTPUT ROUTING OPTIONS"; + DPRAM_INPUT_EPXA4_10 = "DEFAULT INPUT ROUTING OPTIONS"; + STRIPE_TO_PLD_INTERRUPTS_EPXA4_10 = "MEGALAB COLUMN 2"; + PLD_TO_STRIPE_INTERRUPTS_EPXA4_10 = "MEGALAB COLUMN 2"; + PROCESSOR_DEBUG_EXTENSIONS_EPXA4_10 = "MEGALAB COLUMN 2"; + STRIPE_TO_PLD_BRIDGE_EPXA4_10 = "MEGALAB COLUMN 1"; + FAST_FIT_COMPILATION = OFF; + SIGNALPROBE_DURING_NORMAL_COMPILATION = OFF; + OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING = OFF; + OPTIMIZE_TIMING = OFF; + OPTIMIZE_HOLD_TIMING = OFF; + COMPILATION_LEVEL = FULL; + SAVE_DISK_SPACE = ON; + SPEED_DISK_USAGE_TRADEOFF = NORMAL; + LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT = OFF; + SIGNALPROBE_ALLOW_OVERUSE = OFF; + FOCUS_ENTITY_NAME = |sizetest; + FIT_ONLY_ONE_ATTEMPT = OFF; +} +DEFAULT_DEVICE_OPTIONS +{ + GENERATE_CONFIG_HEXOUT_FILE = OFF; + GENERATE_CONFIG_JBC_FILE_COMPRESSED = ON; + GENERATE_CONFIG_JBC_FILE = OFF; + GENERATE_CONFIG_JAM_FILE = OFF; + GENERATE_CONFIG_ISC_FILE = OFF; + GENERATE_CONFIG_SVF_FILE = OFF; + GENERATE_JBC_FILE_COMPRESSED = ON; + GENERATE_JBC_FILE = OFF; + GENERATE_JAM_FILE = OFF; + GENERATE_ISC_FILE = OFF; + GENERATE_SVF_FILE = OFF; + RESERVE_PIN = "AS INPUT TRI-STATED"; + RESERVE_ALL_UNUSED_PINS = "AS OUTPUT DRIVING GROUND"; + HEXOUT_FILE_COUNT_DIRECTION = UP; + HEXOUT_FILE_START_ADDRESS = 0; + GENERATE_HEX_FILE = OFF; + GENERATE_RBF_FILE = OFF; + GENERATE_TTF_FILE = OFF; + RESERVE_ASDO_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_DATA0_AFTER_CONFIGURATION = "AS INPUT TRI-STATED"; + RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_RDYNBUSY_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + DISABLE_NCS_AND_OE_PULLUPS_ON_CONFIG_DEVICE = OFF; + AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE = ON; + EPROM_USE_CHECKSUM_AS_USERCODE = OFF; + FLEX10K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + MERCURY_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + STRATIX_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + APEX20K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + STRATIX_CONFIGURATION_DEVICE = AUTO; + CYCLONE_CONFIGURATION_DEVICE = AUTO; + FLEX10K_CONFIGURATION_DEVICE = AUTO; + FLEX6K_CONFIGURATION_DEVICE = AUTO; + MERCURY_CONFIGURATION_DEVICE = AUTO; + EXCALIBUR_CONFIGURATION_DEVICE = AUTO; + APEX20K_CONFIGURATION_DEVICE = AUTO; + USE_CONFIGURATION_DEVICE = ON; + ENABLE_INIT_DONE_OUTPUT = OFF; + FLEX10K_ENABLE_LOCK_OUTPUT = OFF; + ENABLE_DEVICE_WIDE_OE = OFF; + ENABLE_DEVICE_WIDE_RESET = OFF; + RELEASE_CLEARS_BEFORE_TRI_STATES = OFF; + AUTO_RESTART_CONFIGURATION = OFF; + ENABLE_VREFB_PIN = OFF; + ENABLE_VREFA_PIN = OFF; + SECURITY_BIT = OFF; + USER_START_UP_CLOCK = OFF; + APEXII_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + FLEX10K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + FLEX6K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + MERCURY_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + EXCALIBUR_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + CYCLONE_CONFIGURATION_SCHEME = "ACTIVE SERIAL"; + STRATIX_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + APEX20K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + STRATIX_UPDATE_MODE = STANDARD; + USE_CHECKSUM_AS_USERCODE = OFF; + MAX7000_USE_CHECKSUM_AS_USERCODE = OFF; + MAX7000_JTAG_USER_CODE = FFFFFFFF; + FLEX10K_JTAG_USER_CODE = 7F; + MERCURY_JTAG_USER_CODE = FFFFFFFF; + APEX20K_JTAG_USER_CODE = FFFFFFFF; + STRATIX_JTAG_USER_CODE = FFFFFFFF; + MAX7000S_JTAG_USER_CODE = FFFF; + RESERVE_NCEO_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + FLEX10K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON; + FLEX6K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = OFF; + ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON; + MAX7000_ENABLE_JTAG_BST_SUPPORT = ON; + ENABLE_JTAG_BST_SUPPORT = OFF; + CONFIGURATION_CLOCK_DIVISOR = 1; + CONFIGURATION_CLOCK_FREQUENCY = "10 MHZ"; + CLOCK_SOURCE = INTERNAL; + COMPRESSION_MODE = OFF; + ON_CHIP_BITSTREAM_DECOMPRESSION = OFF; +} +AUTO_SLD_HUB_ENTITY +{ + AUTO_INSERT_SLD_HUB_ENTITY = ENABLE; + HUB_INSTANCE_NAME = SLD_HUB_INST; + HUB_ENTITY_NAME = SLD_HUB; +} +CHIP(sizetest) +{ + DEVICE = EP1C12Q240C8; + DEVICE_FILTER_PACKAGE = "ANY QFP"; + DEVICE_FILTER_PIN_COUNT = 240; + DEVICE_FILTER_SPEED_GRADE = ANY; +} +SIGNALTAP_LOGIC_ANALYZER_SETTINGS +{ + ENABLE_SIGNALTAP = Off; + AUTO_ENABLE_SMART_COMPILE = On; +} diff --git a/fpga/toplevel/sizetest/sizetest.psf b/fpga/toplevel/sizetest/sizetest.psf new file mode 100644 index 0000000..e4fc6aa --- /dev/null +++ b/fpga/toplevel/sizetest/sizetest.psf @@ -0,0 +1,228 @@ +DEFAULT_DESIGN_ASSISTANT_SETTINGS +{ + HCPY_ALOAD_SIGNALS = OFF; + HCPY_VREF_PINS = OFF; + HCPY_CAT = OFF; + HCPY_ILLEGAL_HC_DEV_PKG = OFF; + ACLK_RULE_IMSZER_ADOMAIN = OFF; + ACLK_RULE_SZER_BTW_ACLK_DOMAIN = OFF; + ACLK_RULE_NO_SZER_ACLK_DOMAIN = OFF; + ACLK_CAT = OFF; + SIGNALRACE_RULE_ASYNCHPIN_SYNCH_CLKPIN = OFF; + SIGNALRACE_CAT = OFF; + NONSYNCHSTRUCT_RULE_LATCH_UNIDENTIFIED = OFF; + NONSYNCHSTRUCT_RULE_SRLATCH = OFF; + NONSYNCHSTRUCT_RULE_DLATCH = OFF; + NONSYNCHSTRUCT_RULE_MULTI_VIBRATOR = OFF; + NONSYNCHSTRUCT_RULE_ILLEGAL_PULSE_GEN = OFF; + NONSYNCHSTRUCT_RULE_RIPPLE_CLK = OFF; + NONSYNCHSTRUCT_RULE_DELAY_CHAIN = OFF; + NONSYNCHSTRUCT_RULE_REG_LOOP = OFF; + NONSYNCHSTRUCT_RULE_COMBLOOP = OFF; + NONSYNCHSTRUCT_CAT = OFF; + NONSYNCHSTRUCT_RULE_COMB_DRIVES_RAM_WE = OFF; + TIMING_RULE_COIN_CLKEDGE = OFF; + TIMING_RULE_SHIFT_REG = OFF; + TIMING_RULE_HIGH_FANOUTS = OFF; + TIMING_CAT = OFF; + RESET_RULE_ALL = OFF; + RESET_RULE_IMSYNCH_ASYNCH_DOMAIN = OFF; + RESET_RULE_UNSYNCH_ASYNCH_DOMAIN = OFF; + RESET_RULE_REG_ASNYCH = OFF; + RESET_RULE_COMB_ASYNCH_RESET = OFF; + RESET_RULE_IMSYNCH_EXRESET = OFF; + RESET_RULE_UNSYNCH_EXRESET = OFF; + RESET_RULE_INPINS_RESETNET = OFF; + RESET_CAT = OFF; + CLK_RULE_ALL = OFF; + CLK_RULE_MIX_EDGES = OFF; + CLK_RULE_CLKNET_CLKSPINES = OFF; + CLK_RULE_INPINS_CLKNET = OFF; + CLK_RULE_GATING_SCHEME = OFF; + CLK_RULE_INV_CLOCK = OFF; + CLK_RULE_COMB_CLOCK = OFF; + CLK_CAT = OFF; + HCPY_EXCEED_USER_IO_USAGE = OFF; + HCPY_EXCEED_RAM_USAGE = OFF; + NONSYNCHSTRUCT_RULE_ASYN_RAM = OFF; + SIGNALRACE_RULE_TRISTATE = OFF; + ASSG_RULE_MISSING_TIMING = OFF; + ASSG_RULE_MISSING_FMAX = OFF; + ASSG_CAT = OFF; +} +SYNTHESIS_FITTING_SETTINGS +{ + AUTO_SHIFT_REGISTER_RECOGNITION = ON; + AUTO_RAM_RECOGNITION = ON; + REMOVE_DUPLICATE_LOGIC = ON; + AUTO_MERGE_PLLS = ON; + AUTO_OPEN_DRAIN_PINS = ON; + AUTO_CARRY_CHAINS = ON; + AUTO_DELAY_CHAINS = ON; + STRATIX_CARRY_CHAIN_LENGTH = 70; + AUTO_PACKED_REG_CYCLONE = "MINIMIZE AREA WITH CHAINS"; + CYCLONE_OPTIMIZATION_TECHNIQUE = SPEED; + AUTO_GLOBAL_MEMORY_CONTROLS = OFF; + AUTO_GLOBAL_REGISTER_CONTROLS = ON; + AUTO_GLOBAL_CLOCK = ON; + LIMIT_AHDL_INTEGERS_TO_32_BITS = OFF; + ENABLE_BUS_HOLD_CIRCUITRY = OFF; + WEAK_PULL_UP_RESISTOR = OFF; + IGNORE_SOFT_BUFFERS = ON; + IGNORE_LCELL_BUFFERS = OFF; + IGNORE_ROW_GLOBAL_BUFFERS = OFF; + IGNORE_GLOBAL_BUFFERS = OFF; + IGNORE_CASCADE_BUFFERS = OFF; + IGNORE_CARRY_BUFFERS = OFF; + REMOVE_DUPLICATE_REGISTERS = ON; + REMOVE_REDUNDANT_LOGIC_CELLS = OFF; + ALLOW_POWER_UP_DONT_CARE = ON; + PCI_IO = OFF; + NOT_GATE_PUSH_BACK = ON; + SLOW_SLEW_RATE = OFF; + STATE_MACHINE_PROCESSING = AUTO; +} +DEFAULT_HARDCOPY_SETTINGS +{ + HARDCOPY_EXTERNAL_CLOCK_JITTER = "0.0 NS"; +} +DEFAULT_TIMING_REQUIREMENTS +{ + INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; + RUN_ALL_TIMING_ANALYSES = ON; + IGNORE_CLOCK_SETTINGS = OFF; + DEFAULT_HOLD_MULTICYCLE = "SAME AS MULTICYCLE"; + CUT_OFF_IO_PIN_FEEDBACK = ON; + CUT_OFF_CLEAR_AND_PRESET_PATHS = ON; + CUT_OFF_READ_DURING_WRITE_PATHS = ON; + CUT_OFF_PATHS_BETWEEN_CLOCK_DOMAINS = ON; + DO_MIN_ANALYSIS = ON; + DO_MIN_TIMING = OFF; + NUMBER_OF_PATHS_TO_REPORT = 200; + NUMBER_OF_DESTINATION_TO_REPORT = 10; + NUMBER_OF_SOURCES_PER_DESTINATION_TO_REPORT = 10; + MAX_SCC_SIZE = 50; +} +HDL_SETTINGS +{ + VERILOG_INPUT_VERSION = VERILOG_2001; + ENABLE_IP_DEBUG = OFF; + VHDL_INPUT_VERSION = VHDL93; + VHDL_SHOW_LMF_MAPPING_MESSAGES = OFF; +} +PROJECT_INFO(sizetest) +{ + USER_LIBRARIES = "e:\fpga\megacells\"; + ORIGINAL_QUARTUS_VERSION = 3.0; + PROJECT_CREATION_TIME_DATE = "22:00:25 SEPTEMBER 28, 2003"; + LAST_QUARTUS_VERSION = 3.0; + SHOW_REGISTRATION_MESSAGE = ON; +} +THIRD_PARTY_EDA_TOOLS(sizetest) +{ + EDA_DESIGN_ENTRY_SYNTHESIS_TOOL = ""; + EDA_SIMULATION_TOOL = ""; + EDA_TIMING_ANALYSIS_TOOL = ""; + EDA_BOARD_DESIGN_TOOL = ""; + EDA_FORMAL_VERIFICATION_TOOL = ""; + EDA_RESYNTHESIS_TOOL = ""; +} +EDA_TOOL_SETTINGS(eda_design_synthesis) +{ + EDA_INPUT_GND_NAME = GND; + EDA_INPUT_VCC_NAME = VCC; + EDA_SHOW_LMF_MAPPING_MESSAGES = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_INPUT_DATA_FORMAT = EDIF; + EDA_OUTPUT_DATA_FORMAT = NONE; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + RESYNTHESIS_RETIMING = FULL; +} +EDA_TOOL_SETTINGS(eda_simulation) +{ + EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; + EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; + EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; + EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; + EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; + EDA_FLATTEN_BUSES = OFF; + EDA_MAP_ILLEGAL_CHARACTERS = OFF; + EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_OUTPUT_DATA_FORMAT = NONE; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + RESYNTHESIS_RETIMING = FULL; +} +EDA_TOOL_SETTINGS(eda_timing_analysis) +{ + EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; + EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; + EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; + EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; + EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; + EDA_FLATTEN_BUSES = OFF; + EDA_MAP_ILLEGAL_CHARACTERS = OFF; + EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_OUTPUT_DATA_FORMAT = NONE; + EDA_LAUNCH_CMD_LINE_TOOL = OFF; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + RESYNTHESIS_RETIMING = FULL; +} +EDA_TOOL_SETTINGS(eda_board_design) +{ + EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; + EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; + EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; + EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; + EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; + EDA_FLATTEN_BUSES = OFF; + EDA_MAP_ILLEGAL_CHARACTERS = OFF; + EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_OUTPUT_DATA_FORMAT = NONE; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + RESYNTHESIS_RETIMING = FULL; +} +EDA_TOOL_SETTINGS(eda_formal_verification) +{ + EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; + EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; + EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; + EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; + EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; + EDA_FLATTEN_BUSES = OFF; + EDA_MAP_ILLEGAL_CHARACTERS = OFF; + EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_OUTPUT_DATA_FORMAT = NONE; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + RESYNTHESIS_RETIMING = FULL; +} +EDA_TOOL_SETTINGS(eda_palace) +{ + EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; + EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; + EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; + EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; + EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; + EDA_FLATTEN_BUSES = OFF; + EDA_MAP_ILLEGAL_CHARACTERS = OFF; + EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_OUTPUT_DATA_FORMAT = NONE; + RESYNTHESIS_RETIMING = FULL; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; +} diff --git a/fpga/toplevel/sizetest/sizetest.quartus b/fpga/toplevel/sizetest/sizetest.quartus new file mode 100644 index 0000000..d1eaf22 --- /dev/null +++ b/fpga/toplevel/sizetest/sizetest.quartus @@ -0,0 +1,19 @@ +COMPILER_SETTINGS_LIST +{ + COMPILER_SETTINGS = sizetest; +} +SIMULATOR_SETTINGS_LIST +{ + SIMULATOR_SETTINGS = sizetest; +} +SOFTWARE_SETTINGS_LIST +{ + SOFTWARE_SETTINGS = Debug; + SOFTWARE_SETTINGS = Release; +} +FILES +{ + VERILOG_FILE = ..\..\sdr_lib\cordic_stage.v; + VERILOG_FILE = ..\..\sdr_lib\cordic.v; + VERILOG_FILE = sizetest.v; +} diff --git a/fpga/toplevel/sizetest/sizetest.ssf b/fpga/toplevel/sizetest/sizetest.ssf new file mode 100644 index 0000000..1aceab1 --- /dev/null +++ b/fpga/toplevel/sizetest/sizetest.ssf @@ -0,0 +1,14 @@ +SIMULATOR_SETTINGS +{ + ESTIMATE_POWER_CONSUMPTION = OFF; + GLITCH_INTERVAL = 1NS; + GLITCH_DETECTION = OFF; + SIMULATION_COVERAGE = ON; + CHECK_OUTPUTS = OFF; + SETUP_HOLD_DETECTION = OFF; + POWER_ESTIMATION_START_TIME = "0 NS"; + ADD_DEFAULT_PINS_TO_SIMULATION_OUTPUT_WAVEFORMS = ON; + SIMULATION_MODE = TIMING; + START_TIME = 0NS; + USE_COMPILER_SETTINGS = sizetest; +} diff --git a/fpga/toplevel/sizetest/sizetest.v b/fpga/toplevel/sizetest/sizetest.v new file mode 100644 index 0000000..cdbd086 --- /dev/null +++ b/fpga/toplevel/sizetest/sizetest.v @@ -0,0 +1,39 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + + +module sizetest(input clock, + input reset, + input enable, + input [15:0]xi, + input [15:0] yi, + input [15:0] zi, + output [15:0] xo, + output [15:0] yo, + output [15:0] zo +// input [15:0] constant + ); + +wire [16:0] zo; + +cordic_stage cordic_stage(clock, reset, enable, xi, yi, zi, 16'd16383, xo, yo, zo ); + +endmodule diff --git a/fpga/toplevel/usrp_multi/usrp_multi.csf b/fpga/toplevel/usrp_multi/usrp_multi.csf new file mode 100644 index 0000000..2f5df2b --- /dev/null +++ b/fpga/toplevel/usrp_multi/usrp_multi.csf @@ -0,0 +1,444 @@ +COMPILER_SETTINGS +{ + IO_PLACEMENT_OPTIMIZATION = OFF; + ENABLE_DRC_SETTINGS = OFF; + PHYSICAL_SYNTHESIS_REGISTER_RETIMING = OFF; + PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION = OFF; + PHYSICAL_SYNTHESIS_COMBO_LOGIC = OFF; + DRC_FANOUT_EXCEEDING = 30; + DRC_REPORT_FANOUT_EXCEEDING = OFF; + DRC_TOP_FANOUT = 50; + DRC_REPORT_TOP_FANOUT = OFF; + RUN_DRC_DURING_COMPILATION = OFF; + ADV_NETLIST_OPT_RETIME_CORE_AND_IO = ON; + ADV_NETLIST_OPT_SYNTH_USE_FITTER_INFO = OFF; + ADV_NETLIST_OPT_SYNTH_GATE_RETIME = OFF; + ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP = OFF; + SMART_COMPILE_IGNORES_TDC_FOR_STRATIX_PLL_CHANGES = OFF; + MERGE_HEX_FILE = OFF; + TRUE_WYSIWYG_FLOW = OFF; + SEED = 1; + FINAL_PLACEMENT_OPTIMIZATION = AUTOMATICALLY; + FAMILY = Cyclone; + DPRAM_DUAL_PORT_MODE_OTHER_SIGNALS_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2"; + DPRAM_32BIT_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA1 = "MEGALAB COLUMN 1"; + DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA1 = "MEGALAB COLUMN 1"; + DPRAM_DUAL_PORT_MODE_OUTPUT_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2"; + DPRAM_32BIT_SINGLE_PORT_MODE_OUTPUT_EPXA1 = "LOWER TO 1ESB UPPER TO 1"; + DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_OUTPUT_EPXA1 = "MEGALAB COLUMN 1"; + DPRAM_DUAL_PORT_MODE_INPUT_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2"; + DPRAM_32BIT_SINGLE_PORT_MODE_INPUT_EPXA1 = "MEGALAB COLUMN 1"; + DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_INPUT_EPXA1 = "MEGALAB COLUMN 1"; + DPRAM_DUAL_PORT_MODE_OTHER_SIGNALS_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4"; + DPRAM_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4"; + DPRAM_WIDE_MODE_OTHER_SIGNALS_EPXA4_10 = "MEGALAB COLUMN 3"; + DPRAM_DEEP_MODE_OTHER_SIGNALS_EPXA4_10 = "MEGALAB COLUMN 3"; + DPRAM_DUAL_PORT_MODE_OUTPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4ESB"; + DPRAM_SINGLE_PORT_MODE_OUTPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4ESB"; + DPRAM_WIDE_MODE_OUTPUT_EPXA4_10 = "LOWER TO 3 UPPER TO 4ESB"; + DPRAM_DEEP_MODE_OUTPUT_EPXA4_10 = "MEGALAB COLUMN 3"; + DPRAM_DUAL_PORT_MODE_INPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4"; + DPRAM_SINGLE_PORT_MODE_INPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4"; + DPRAM_WIDE_MODE_INPUT_EPXA4_10 = "LOWER TO 3 UPPER TO 4"; + DPRAM_DEEP_MODE_INPUT_EPXA4_10 = "MEGALAB COLUMN 3"; + DPRAM_OTHER_SIGNALS_EPXA4_10 = "DEFAULT OTHER ROUTING OPTIONS"; + DPRAM_OUTPUT_EPXA4_10 = "DEFAULT OUTPUT ROUTING OPTIONS"; + DPRAM_INPUT_EPXA4_10 = "DEFAULT INPUT ROUTING OPTIONS"; + STRIPE_TO_PLD_INTERRUPTS_EPXA4_10 = "MEGALAB COLUMN 2"; + PLD_TO_STRIPE_INTERRUPTS_EPXA4_10 = "MEGALAB COLUMN 2"; + PROCESSOR_DEBUG_EXTENSIONS_EPXA4_10 = "MEGALAB COLUMN 2"; + STRIPE_TO_PLD_BRIDGE_EPXA4_10 = "MEGALAB COLUMN 1"; + FAST_FIT_COMPILATION = OFF; + SIGNALPROBE_DURING_NORMAL_COMPILATION = OFF; + OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING = ON; + OPTIMIZE_TIMING = "NORMAL COMPILATION"; + OPTIMIZE_HOLD_TIMING = OFF; + COMPILATION_LEVEL = FULL; + SAVE_DISK_SPACE = OFF; + SPEED_DISK_USAGE_TRADEOFF = NORMAL; + LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT = OFF; + SIGNALPROBE_ALLOW_OVERUSE = OFF; + FOCUS_ENTITY_NAME = |usrp_multi; + ROUTING_BACK_ANNOTATION_MODE = OFF; + INC_PLC_MODE = OFF; + FIT_ONLY_ONE_ATTEMPT = OFF; +} +DEFAULT_DEVICE_OPTIONS +{ + GENERATE_CONFIG_HEXOUT_FILE = OFF; + GENERATE_CONFIG_JBC_FILE_COMPRESSED = ON; + GENERATE_CONFIG_JBC_FILE = OFF; + GENERATE_CONFIG_JAM_FILE = OFF; + GENERATE_CONFIG_ISC_FILE = OFF; + GENERATE_CONFIG_SVF_FILE = OFF; + GENERATE_JBC_FILE_COMPRESSED = ON; + GENERATE_JBC_FILE = OFF; + GENERATE_JAM_FILE = OFF; + GENERATE_ISC_FILE = OFF; + GENERATE_SVF_FILE = OFF; + RESERVE_PIN = "AS INPUT TRI-STATED"; + RESERVE_ALL_UNUSED_PINS = "AS OUTPUT DRIVING GROUND"; + HEXOUT_FILE_COUNT_DIRECTION = UP; + HEXOUT_FILE_START_ADDRESS = 0; + GENERATE_HEX_FILE = OFF; + GENERATE_RBF_FILE = OFF; + GENERATE_TTF_FILE = OFF; + RESERVE_ASDO_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_DATA0_AFTER_CONFIGURATION = "AS INPUT TRI-STATED"; + RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_RDYNBUSY_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + DISABLE_NCS_AND_OE_PULLUPS_ON_CONFIG_DEVICE = OFF; + AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE = ON; + EPROM_USE_CHECKSUM_AS_USERCODE = OFF; + FLEX10K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + MERCURY_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + STRATIX_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + APEX20K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + STRATIX_CONFIGURATION_DEVICE = AUTO; + CYCLONE_CONFIGURATION_DEVICE = AUTO; + FLEX10K_CONFIGURATION_DEVICE = AUTO; + FLEX6K_CONFIGURATION_DEVICE = AUTO; + MERCURY_CONFIGURATION_DEVICE = AUTO; + EXCALIBUR_CONFIGURATION_DEVICE = AUTO; + APEX20K_CONFIGURATION_DEVICE = AUTO; + USE_CONFIGURATION_DEVICE = ON; + ENABLE_INIT_DONE_OUTPUT = OFF; + FLEX10K_ENABLE_LOCK_OUTPUT = OFF; + ENABLE_DEVICE_WIDE_OE = OFF; + ENABLE_DEVICE_WIDE_RESET = OFF; + RELEASE_CLEARS_BEFORE_TRI_STATES = OFF; + AUTO_RESTART_CONFIGURATION = OFF; + ENABLE_VREFB_PIN = OFF; + ENABLE_VREFA_PIN = OFF; + SECURITY_BIT = OFF; + USER_START_UP_CLOCK = OFF; + APEXII_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + FLEX10K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + FLEX6K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + MERCURY_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + EXCALIBUR_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + CYCLONE_CONFIGURATION_SCHEME = "ACTIVE SERIAL"; + STRATIX_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + APEX20K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + STRATIX_UPDATE_MODE = STANDARD; + USE_CHECKSUM_AS_USERCODE = OFF; + MAX7000_USE_CHECKSUM_AS_USERCODE = OFF; + MAX7000_JTAG_USER_CODE = FFFFFFFF; + FLEX10K_JTAG_USER_CODE = 7F; + MERCURY_JTAG_USER_CODE = FFFFFFFF; + APEX20K_JTAG_USER_CODE = FFFFFFFF; + STRATIX_JTAG_USER_CODE = FFFFFFFF; + MAX7000S_JTAG_USER_CODE = FFFF; + RESERVE_NCEO_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + FLEX10K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON; + FLEX6K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = OFF; + ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON; + MAX7000_ENABLE_JTAG_BST_SUPPORT = ON; + ENABLE_JTAG_BST_SUPPORT = OFF; + CONFIGURATION_CLOCK_DIVISOR = 1; + CONFIGURATION_CLOCK_FREQUENCY = "10 MHZ"; + CLOCK_SOURCE = INTERNAL; + COMPRESSION_MODE = OFF; + ON_CHIP_BITSTREAM_DECOMPRESSION = OFF; +} +AUTO_SLD_HUB_ENTITY +{ + AUTO_INSERT_SLD_HUB_ENTITY = ENABLE; + HUB_INSTANCE_NAME = SLD_HUB_INST; + HUB_ENTITY_NAME = SLD_HUB; +} +SIGNALTAP_LOGIC_ANALYZER_SETTINGS +{ + ENABLE_SIGNALTAP = Off; + AUTO_ENABLE_SMART_COMPILE = On; +} +CHIP(usrp_multi) +{ + DEVICE = EP1C12Q240C8; + DEVICE_FILTER_PACKAGE = "ANY QFP"; + DEVICE_FILTER_PIN_COUNT = 240; + DEVICE_FILTER_SPEED_GRADE = ANY; + AUTO_RESTART_CONFIGURATION = OFF; + RELEASE_CLEARS_BEFORE_TRI_STATES = OFF; + USER_START_UP_CLOCK = OFF; + ENABLE_DEVICE_WIDE_RESET = OFF; + ENABLE_DEVICE_WIDE_OE = OFF; + ENABLE_INIT_DONE_OUTPUT = OFF; + FLEX10K_ENABLE_LOCK_OUTPUT = OFF; + ENABLE_JTAG_BST_SUPPORT = OFF; + MAX7000_ENABLE_JTAG_BST_SUPPORT = ON; + APEX20K_JTAG_USER_CODE = FFFFFFFF; + MERCURY_JTAG_USER_CODE = FFFFFFFF; + FLEX10K_JTAG_USER_CODE = 7F; + MAX7000_JTAG_USER_CODE = FFFFFFFF; + MAX7000S_JTAG_USER_CODE = FFFF; + STRATIX_JTAG_USER_CODE = FFFFFFFF; + APEX20K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + MERCURY_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + FLEX6K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + FLEX10K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + EXCALIBUR_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + APEXII_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + STRATIX_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + CYCLONE_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + USE_CONFIGURATION_DEVICE = OFF; + APEX20K_CONFIGURATION_DEVICE = AUTO; + MERCURY_CONFIGURATION_DEVICE = AUTO; + FLEX6K_CONFIGURATION_DEVICE = AUTO; + FLEX10K_CONFIGURATION_DEVICE = AUTO; + EXCALIBUR_CONFIGURATION_DEVICE = AUTO; + STRATIX_CONFIGURATION_DEVICE = AUTO; + CYCLONE_CONFIGURATION_DEVICE = AUTO; + STRATIX_UPDATE_MODE = STANDARD; + APEX20K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + MERCURY_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + FLEX10K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + STRATIX_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE = ON; + DISABLE_NCS_AND_OE_PULLUPS_ON_CONFIG_DEVICE = OFF; + COMPRESSION_MODE = OFF; + ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON; + FLEX6K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = OFF; + FLEX10K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON; + EPROM_USE_CHECKSUM_AS_USERCODE = OFF; + USE_CHECKSUM_AS_USERCODE = OFF; + MAX7000_USE_CHECKSUM_AS_USERCODE = OFF; + GENERATE_TTF_FILE = OFF; + GENERATE_RBF_FILE = ON; + GENERATE_HEX_FILE = OFF; + SECURITY_BIT = OFF; + ENABLE_VREFA_PIN = OFF; + ENABLE_VREFB_PIN = OFF; + GENERATE_SVF_FILE = OFF; + GENERATE_ISC_FILE = OFF; + GENERATE_JAM_FILE = OFF; + GENERATE_JBC_FILE = OFF; + GENERATE_JBC_FILE_COMPRESSED = ON; + GENERATE_CONFIG_SVF_FILE = OFF; + GENERATE_CONFIG_ISC_FILE = OFF; + GENERATE_CONFIG_JAM_FILE = OFF; + GENERATE_CONFIG_JBC_FILE = OFF; + GENERATE_CONFIG_JBC_FILE_COMPRESSED = ON; + GENERATE_CONFIG_HEXOUT_FILE = OFF; + ON_CHIP_BITSTREAM_DECOMPRESSION = OFF; + BASE_PIN_OUT_FILE_ON_SAMEFRAME_DEVICE = OFF; + HEXOUT_FILE_START_ADDRESS = 0; + HEXOUT_FILE_COUNT_DIRECTION = UP; + RESERVE_ALL_UNUSED_PINS = "AS INPUT TRI-STATED"; + STRATIX_DEVICE_IO_STANDARD = LVTTL; + CLOCK_SOURCE = INTERNAL; + CONFIGURATION_CLOCK_FREQUENCY = "10 MHZ"; + CONFIGURATION_CLOCK_DIVISOR = 1; + RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_RDYNBUSY_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_DATA0_AFTER_CONFIGURATION = "AS INPUT TRI-STATED"; + RESERVE_NCEO_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_ASDO_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + SCLK : LOCATION = Pin_101; + SDI : LOCATION = Pin_100; + SEN : LOCATION = Pin_98; + SLD : LOCATION = Pin_95; + adc1_data[0] : LOCATION = Pin_5; + adc1_data[10] : LOCATION = Pin_235; + adc1_data[11] : LOCATION = Pin_234; + adc1_data[1] : LOCATION = Pin_4; + adc1_data[2] : LOCATION = Pin_3; + adc1_data[3] : LOCATION = Pin_2; + adc1_data[4] : LOCATION = Pin_1; + adc1_data[4] : IO_STANDARD = LVTTL; + adc1_data[5] : LOCATION = Pin_240; + adc1_data[6] : LOCATION = Pin_239; + adc1_data[7] : LOCATION = Pin_238; + adc1_data[8] : LOCATION = Pin_237; + adc1_data[9] : LOCATION = Pin_236; + adc2_data[0] : LOCATION = Pin_20; + adc2_data[10] : LOCATION = Pin_8; + adc2_data[11] : LOCATION = Pin_7; + adc2_data[1] : LOCATION = Pin_19; + adc2_data[2] : LOCATION = Pin_18; + adc2_data[3] : LOCATION = Pin_17; + adc2_data[4] : LOCATION = Pin_16; + adc2_data[5] : LOCATION = Pin_15; + adc2_data[6] : LOCATION = Pin_14; + adc2_data[7] : LOCATION = Pin_13; + adc2_data[8] : LOCATION = Pin_12; + adc2_data[9] : LOCATION = Pin_11; + adc3_data[0] : LOCATION = Pin_200; + adc3_data[10] : LOCATION = Pin_184; + adc3_data[11] : LOCATION = Pin_183; + adc3_data[1] : LOCATION = Pin_197; + adc3_data[2] : LOCATION = Pin_196; + adc3_data[3] : LOCATION = Pin_195; + adc3_data[4] : LOCATION = Pin_194; + adc3_data[5] : LOCATION = Pin_193; + adc3_data[6] : LOCATION = Pin_188; + adc3_data[7] : LOCATION = Pin_187; + adc3_data[8] : LOCATION = Pin_186; + adc3_data[9] : LOCATION = Pin_185; + adc4_data[0] : LOCATION = Pin_222; + adc4_data[10] : LOCATION = Pin_203; + adc4_data[11] : LOCATION = Pin_202; + adc4_data[1] : LOCATION = Pin_219; + adc4_data[2] : LOCATION = Pin_217; + adc4_data[3] : LOCATION = Pin_216; + adc4_data[4] : LOCATION = Pin_215; + adc4_data[5] : LOCATION = Pin_214; + adc4_data[6] : LOCATION = Pin_213; + adc4_data[7] : LOCATION = Pin_208; + adc4_data[8] : LOCATION = Pin_207; + adc4_data[9] : LOCATION = Pin_206; + adc_oeb[0] : LOCATION = Pin_228; + adc_oeb[1] : LOCATION = Pin_21; + adc_oeb[2] : LOCATION = Pin_181; + adc_oeb[3] : LOCATION = Pin_218; + adc_otr[0] : LOCATION = Pin_233; + adc_otr[1] : LOCATION = Pin_6; + adc_otr[2] : LOCATION = Pin_182; + adc_otr[3] : LOCATION = Pin_201; + adclk0 : LOCATION = Pin_224; + adclk1 : LOCATION = Pin_226; + clk0 : LOCATION = Pin_28; + clk0 : RESERVE_PIN = "AS INPUT TRI-STATED"; + clk0 : IO_STANDARD = LVTTL; + clk1 : LOCATION = Pin_29; + clk1 : RESERVE_PIN = "AS INPUT TRI-STATED"; + clk1 : IO_STANDARD = LVTTL; + clk3 : LOCATION = Pin_152; + clk3 : RESERVE_PIN = "AS INPUT TRI-STATED"; + clk3 : IO_STANDARD = LVTTL; + clk_120mhz : LOCATION = Pin_153; + clk_120mhz : IO_STANDARD = LVTTL; + clk_out : LOCATION = Pin_63; + clk_out : IO_STANDARD = LVTTL; + dac1_data[0] : LOCATION = Pin_165; + dac1_data[10] : LOCATION = Pin_177; + dac1_data[11] : LOCATION = Pin_178; + dac1_data[12] : LOCATION = Pin_179; + dac1_data[13] : LOCATION = Pin_180; + dac1_data[1] : LOCATION = Pin_166; + dac1_data[2] : LOCATION = Pin_167; + dac1_data[3] : LOCATION = Pin_168; + dac1_data[4] : LOCATION = Pin_169; + dac1_data[5] : LOCATION = Pin_170; + dac1_data[6] : LOCATION = Pin_173; + dac1_data[7] : LOCATION = Pin_174; + dac1_data[8] : LOCATION = Pin_175; + dac1_data[9] : LOCATION = Pin_176; + dac2_data[0] : LOCATION = Pin_159; + dac2_data[10] : LOCATION = Pin_163; + dac2_data[11] : LOCATION = Pin_139; + dac2_data[12] : LOCATION = Pin_164; + dac2_data[13] : LOCATION = Pin_138; + dac2_data[1] : LOCATION = Pin_158; + dac2_data[2] : LOCATION = Pin_160; + dac2_data[3] : LOCATION = Pin_156; + dac2_data[4] : LOCATION = Pin_161; + dac2_data[5] : LOCATION = Pin_144; + dac2_data[6] : LOCATION = Pin_162; + dac2_data[7] : LOCATION = Pin_141; + dac2_data[8] : LOCATION = Pin_143; + dac2_data[9] : LOCATION = Pin_140; + dac3_data[0] : LOCATION = Pin_122; + dac3_data[10] : LOCATION = Pin_134; + dac3_data[11] : LOCATION = Pin_135; + dac3_data[12] : LOCATION = Pin_136; + dac3_data[13] : LOCATION = Pin_137; + dac3_data[1] : LOCATION = Pin_123; + dac3_data[2] : LOCATION = Pin_124; + dac3_data[3] : LOCATION = Pin_125; + dac3_data[4] : LOCATION = Pin_126; + dac3_data[5] : LOCATION = Pin_127; + dac3_data[6] : LOCATION = Pin_128; + dac3_data[7] : LOCATION = Pin_131; + dac3_data[8] : LOCATION = Pin_132; + dac3_data[9] : LOCATION = Pin_133; + dac4_data[0] : LOCATION = Pin_104; + dac4_data[10] : LOCATION = Pin_118; + dac4_data[11] : LOCATION = Pin_119; + dac4_data[12] : LOCATION = Pin_120; + dac4_data[13] : LOCATION = Pin_121; + dac4_data[1] : LOCATION = Pin_105; + dac4_data[2] : LOCATION = Pin_106; + dac4_data[3] : LOCATION = Pin_107; + dac4_data[4] : LOCATION = Pin_108; + dac4_data[5] : LOCATION = Pin_113; + dac4_data[6] : LOCATION = Pin_114; + dac4_data[7] : LOCATION = Pin_115; + dac4_data[8] : LOCATION = Pin_116; + dac4_data[9] : LOCATION = Pin_117; + enable_rx : LOCATION = Pin_88; + enable_tx : LOCATION = Pin_93; + gndbus[0] : LOCATION = Pin_223; + gndbus[0] : RESERVE_PIN = "AS INPUT TRI-STATED"; + gndbus[0] : IO_STANDARD = LVTTL; + gndbus[1] : LOCATION = Pin_225; + gndbus[1] : RESERVE_PIN = "AS INPUT TRI-STATED"; + gndbus[1] : IO_STANDARD = LVTTL; + gndbus[2] : LOCATION = Pin_227; + gndbus[2] : RESERVE_PIN = "AS INPUT TRI-STATED"; + gndbus[2] : IO_STANDARD = LVTTL; + gndbus[3] : LOCATION = Pin_62; + gndbus[3] : RESERVE_PIN = "AS INPUT TRI-STATED"; + gndbus[3] : IO_STANDARD = LVTTL; + gndbus[4] : LOCATION = Pin_64; + gndbus[4] : RESERVE_PIN = "AS INPUT TRI-STATED"; + gndbus[4] : IO_STANDARD = LVTTL; + misc_pins[0] : LOCATION = Pin_87; + misc_pins[0] : IO_STANDARD = LVTTL; + misc_pins[10] : LOCATION = Pin_76; + misc_pins[10] : IO_STANDARD = LVTTL; + misc_pins[11] : LOCATION = Pin_74; + misc_pins[11] : IO_STANDARD = LVTTL; + misc_pins[1] : LOCATION = Pin_86; + misc_pins[1] : IO_STANDARD = LVTTL; + misc_pins[2] : LOCATION = Pin_85; + misc_pins[2] : IO_STANDARD = LVTTL; + misc_pins[3] : LOCATION = Pin_84; + misc_pins[3] : IO_STANDARD = LVTTL; + misc_pins[4] : LOCATION = Pin_83; + misc_pins[4] : IO_STANDARD = LVTTL; + misc_pins[5] : LOCATION = Pin_82; + misc_pins[5] : IO_STANDARD = LVTTL; + misc_pins[6] : LOCATION = Pin_79; + misc_pins[6] : IO_STANDARD = LVTTL; + misc_pins[7] : LOCATION = Pin_78; + misc_pins[7] : IO_STANDARD = LVTTL; + misc_pins[8] : LOCATION = Pin_77; + misc_pins[8] : IO_STANDARD = LVTTL; + misc_pins[9] : LOCATION = Pin_75; + misc_pins[9] : IO_STANDARD = LVTTL; + reset : LOCATION = Pin_94; + usbclk : LOCATION = Pin_55; + usbctl[0] : LOCATION = Pin_56; + usbctl[1] : LOCATION = Pin_54; + usbctl[2] : LOCATION = Pin_53; + usbctl[3] : LOCATION = Pin_58; + usbctl[4] : LOCATION = Pin_57; + usbctl[5] : LOCATION = Pin_44; + usbdata[0] : LOCATION = Pin_73; + usbdata[10] : LOCATION = Pin_41; + usbdata[11] : LOCATION = Pin_39; + usbdata[12] : LOCATION = Pin_38; + usbdata[12] : IO_STANDARD = LVTTL; + usbdata[13] : LOCATION = Pin_37; + usbdata[14] : LOCATION = Pin_24; + usbdata[15] : LOCATION = Pin_23; + usbdata[1] : LOCATION = Pin_68; + usbdata[2] : LOCATION = Pin_67; + usbdata[3] : LOCATION = Pin_66; + usbdata[4] : LOCATION = Pin_65; + usbdata[5] : LOCATION = Pin_61; + usbdata[6] : LOCATION = Pin_60; + usbdata[7] : LOCATION = Pin_59; + usbdata[8] : LOCATION = Pin_43; + usbdata[9] : LOCATION = Pin_42; + usbrdy[0] : LOCATION = Pin_45; + usbrdy[1] : LOCATION = Pin_46; + usbrdy[2] : LOCATION = Pin_47; + usbrdy[3] : LOCATION = Pin_48; + usbrdy[4] : LOCATION = Pin_49; + usbrdy[5] : LOCATION = Pin_50; + clear_status : LOCATION = Pin_99; +} diff --git a/fpga/toplevel/usrp_multi/usrp_multi.esf b/fpga/toplevel/usrp_multi/usrp_multi.esf new file mode 100644 index 0000000..df45f67 --- /dev/null +++ b/fpga/toplevel/usrp_multi/usrp_multi.esf @@ -0,0 +1,14 @@ +SIMULATOR_SETTINGS +{ + ESTIMATE_POWER_CONSUMPTION = OFF; + GLITCH_INTERVAL = 1NS; + GLITCH_DETECTION = OFF; + SIMULATION_COVERAGE = ON; + CHECK_OUTPUTS = OFF; + SETUP_HOLD_DETECTION = OFF; + POWER_ESTIMATION_START_TIME = "0 NS"; + ADD_DEFAULT_PINS_TO_SIMULATION_OUTPUT_WAVEFORMS = ON; + SIMULATION_MODE = TIMING; + START_TIME = 0NS; + USE_COMPILER_SETTINGS = usrp_multi; +} diff --git a/fpga/toplevel/usrp_multi/usrp_multi.psf b/fpga/toplevel/usrp_multi/usrp_multi.psf new file mode 100644 index 0000000..68c2d12 --- /dev/null +++ b/fpga/toplevel/usrp_multi/usrp_multi.psf @@ -0,0 +1,312 @@ +DEFAULT_DESIGN_ASSISTANT_SETTINGS +{ + HCPY_ALOAD_SIGNALS = OFF; + HCPY_VREF_PINS = OFF; + HCPY_CAT = OFF; + HCPY_ILLEGAL_HC_DEV_PKG = OFF; + ACLK_RULE_IMSZER_ADOMAIN = OFF; + ACLK_RULE_SZER_BTW_ACLK_DOMAIN = OFF; + ACLK_RULE_NO_SZER_ACLK_DOMAIN = OFF; + ACLK_CAT = OFF; + SIGNALRACE_RULE_ASYNCHPIN_SYNCH_CLKPIN = OFF; + SIGNALRACE_CAT = OFF; + NONSYNCHSTRUCT_RULE_LATCH_UNIDENTIFIED = OFF; + NONSYNCHSTRUCT_RULE_SRLATCH = OFF; + NONSYNCHSTRUCT_RULE_DLATCH = OFF; + NONSYNCHSTRUCT_RULE_MULTI_VIBRATOR = OFF; + NONSYNCHSTRUCT_RULE_ILLEGAL_PULSE_GEN = OFF; + NONSYNCHSTRUCT_RULE_RIPPLE_CLK = OFF; + NONSYNCHSTRUCT_RULE_DELAY_CHAIN = OFF; + NONSYNCHSTRUCT_RULE_REG_LOOP = OFF; + NONSYNCHSTRUCT_RULE_COMBLOOP = OFF; + NONSYNCHSTRUCT_CAT = OFF; + NONSYNCHSTRUCT_RULE_COMB_DRIVES_RAM_WE = OFF; + TIMING_RULE_COIN_CLKEDGE = OFF; + TIMING_RULE_SHIFT_REG = OFF; + TIMING_RULE_HIGH_FANOUTS = OFF; + TIMING_CAT = OFF; + RESET_RULE_ALL = OFF; + RESET_RULE_IMSYNCH_ASYNCH_DOMAIN = OFF; + RESET_RULE_UNSYNCH_ASYNCH_DOMAIN = OFF; + RESET_RULE_REG_ASNYCH = OFF; + RESET_RULE_COMB_ASYNCH_RESET = OFF; + RESET_RULE_IMSYNCH_EXRESET = OFF; + RESET_RULE_UNSYNCH_EXRESET = OFF; + RESET_RULE_INPINS_RESETNET = OFF; + RESET_CAT = OFF; + CLK_RULE_ALL = OFF; + CLK_RULE_MIX_EDGES = OFF; + CLK_RULE_CLKNET_CLKSPINES = OFF; + CLK_RULE_INPINS_CLKNET = OFF; + CLK_RULE_GATING_SCHEME = OFF; + CLK_RULE_INV_CLOCK = OFF; + CLK_RULE_COMB_CLOCK = OFF; + CLK_CAT = OFF; + HCPY_EXCEED_USER_IO_USAGE = OFF; + HCPY_EXCEED_RAM_USAGE = OFF; + NONSYNCHSTRUCT_RULE_ASYN_RAM = OFF; + SIGNALRACE_RULE_TRISTATE = OFF; + ASSG_RULE_MISSING_TIMING = OFF; + ASSG_RULE_MISSING_FMAX = OFF; + ASSG_CAT = OFF; +} +SYNTHESIS_FITTING_SETTINGS +{ + AUTO_SHIFT_REGISTER_RECOGNITION = ON; + AUTO_DSP_RECOGNITION = ON; + AUTO_RAM_RECOGNITION = ON; + REMOVE_DUPLICATE_LOGIC = ON; + AUTO_TURBO_BIT = ON; + AUTO_MERGE_PLLS = ON; + AUTO_OPEN_DRAIN_PINS = ON; + AUTO_PARALLEL_EXPANDERS = ON; + AUTO_FAST_OUTPUT_ENABLE_REGISTERS = OFF; + AUTO_FAST_OUTPUT_REGISTERS = OFF; + AUTO_FAST_INPUT_REGISTERS = OFF; + AUTO_CASCADE_CHAINS = ON; + AUTO_CARRY_CHAINS = ON; + AUTO_DELAY_CHAINS = ON; + MAX7000_PARALLEL_EXPANDER_CHAIN_LENGTH = 4; + PARALLEL_EXPANDER_CHAIN_LENGTH = 16; + CASCADE_CHAIN_LENGTH = 2; + STRATIX_CARRY_CHAIN_LENGTH = 70; + MERCURY_CARRY_CHAIN_LENGTH = 48; + FLEX10K_CARRY_CHAIN_LENGTH = 32; + FLEX6K_CARRY_CHAIN_LENGTH = 32; + CARRY_CHAIN_LENGTH = 48; + CARRY_OUT_PINS_LCELL_INSERT = ON; + NORMAL_LCELL_INSERT = ON; + AUTO_LCELL_INSERTION = ON; + ALLOW_XOR_GATE_USAGE = ON; + AUTO_PACKED_REGISTERS_STRATIX = NORMAL; + AUTO_PACKED_REGISTERS = OFF; + AUTO_PACKED_REG_CYCLONE = NORMAL; + FLEX10K_OPTIMIZATION_TECHNIQUE = AREA; + FLEX6K_OPTIMIZATION_TECHNIQUE = AREA; + MERCURY_OPTIMIZATION_TECHNIQUE = AREA; + APEX20K_OPTIMIZATION_TECHNIQUE = SPEED; + MAX7000_OPTIMIZATION_TECHNIQUE = SPEED; + STRATIX_OPTIMIZATION_TECHNIQUE = SPEED; + CYCLONE_OPTIMIZATION_TECHNIQUE = AREA; + FLEX10K_TECHNOLOGY_MAPPER = LUT; + FLEX6K_TECHNOLOGY_MAPPER = LUT; + MERCURY_TECHNOLOGY_MAPPER = LUT; + APEX20K_TECHNOLOGY_MAPPER = LUT; + MAX7000_TECHNOLOGY_MAPPER = "PRODUCT TERM"; + STRATIX_TECHNOLOGY_MAPPER = LUT; + AUTO_IMPLEMENT_IN_ROM = OFF; + AUTO_GLOBAL_MEMORY_CONTROLS = OFF; + AUTO_GLOBAL_REGISTER_CONTROLS = ON; + AUTO_GLOBAL_OE = ON; + AUTO_GLOBAL_CLOCK = ON; + USE_LPM_FOR_AHDL_OPERATORS = ON; + LIMIT_AHDL_INTEGERS_TO_32_BITS = OFF; + ENABLE_BUS_HOLD_CIRCUITRY = OFF; + WEAK_PULL_UP_RESISTOR = OFF; + TURBO_BIT = ON; + MAX7000_IGNORE_SOFT_BUFFERS = OFF; + IGNORE_SOFT_BUFFERS = ON; + MAX7000_IGNORE_LCELL_BUFFERS = AUTO; + IGNORE_LCELL_BUFFERS = OFF; + IGNORE_ROW_GLOBAL_BUFFERS = OFF; + IGNORE_GLOBAL_BUFFERS = OFF; + IGNORE_CASCADE_BUFFERS = OFF; + IGNORE_CARRY_BUFFERS = OFF; + REMOVE_DUPLICATE_REGISTERS = ON; + REMOVE_REDUNDANT_LOGIC_CELLS = OFF; + ALLOW_POWER_UP_DONT_CARE = ON; + PCI_IO = OFF; + NOT_GATE_PUSH_BACK = ON; + SLOW_SLEW_RATE = OFF; + DSP_BLOCK_BALANCING = AUTO; + STATE_MACHINE_PROCESSING = AUTO; +} +DEFAULT_HARDCOPY_SETTINGS +{ + HARDCOPY_EXTERNAL_CLOCK_JITTER = "0.0 NS"; +} +DEFAULT_TIMING_REQUIREMENTS +{ + INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; + RUN_ALL_TIMING_ANALYSES = ON; + IGNORE_CLOCK_SETTINGS = OFF; + DEFAULT_HOLD_MULTICYCLE = "SAME AS MULTICYCLE"; + CUT_OFF_IO_PIN_FEEDBACK = ON; + CUT_OFF_CLEAR_AND_PRESET_PATHS = ON; + CUT_OFF_READ_DURING_WRITE_PATHS = ON; + CUT_OFF_PATHS_BETWEEN_CLOCK_DOMAINS = ON; + DO_MIN_ANALYSIS = ON; + DO_MIN_TIMING = OFF; + NUMBER_OF_PATHS_TO_REPORT = 200; + NUMBER_OF_DESTINATION_TO_REPORT = 10; + NUMBER_OF_SOURCES_PER_DESTINATION_TO_REPORT = 10; + MAX_SCC_SIZE = 50; +} +HDL_SETTINGS +{ + VERILOG_INPUT_VERSION = VERILOG_2001; + ENABLE_IP_DEBUG = OFF; + VHDL_INPUT_VERSION = VHDL93; + VHDL_SHOW_LMF_MAPPING_MESSAGES = OFF; +} +PROJECT_INFO(usrp_multi) +{ + ORIGINAL_QUARTUS_VERSION = 3.0; + PROJECT_CREATION_TIME_DATE = "00:14:04 JULY 13, 2003"; + LAST_QUARTUS_VERSION = 3.0; + SHOW_REGISTRATION_MESSAGE = ON; + USER_LIBRARIES = "e:\usrp\fpga\megacells"; +} +THIRD_PARTY_EDA_TOOLS(usrp_multi) +{ + EDA_DESIGN_ENTRY_SYNTHESIS_TOOL = ""; + EDA_SIMULATION_TOOL = ""; + EDA_TIMING_ANALYSIS_TOOL = ""; + EDA_BOARD_DESIGN_TOOL = ""; + EDA_FORMAL_VERIFICATION_TOOL = ""; + EDA_RESYNTHESIS_TOOL = ""; +} +EDA_TOOL_SETTINGS(eda_design_synthesis) +{ + EDA_INPUT_GND_NAME = GND; + EDA_INPUT_VCC_NAME = VCC; + EDA_SHOW_LMF_MAPPING_MESSAGES = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_INPUT_DATA_FORMAT = EDIF; + EDA_OUTPUT_DATA_FORMAT = NONE; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + RESYNTHESIS_RETIMING = FULL; +} +EDA_TOOL_SETTINGS(eda_simulation) +{ + EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; + EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; + EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; + EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; + EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; + EDA_FLATTEN_BUSES = OFF; + EDA_MAP_ILLEGAL_CHARACTERS = OFF; + EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_OUTPUT_DATA_FORMAT = NONE; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + RESYNTHESIS_RETIMING = FULL; +} +EDA_TOOL_SETTINGS(eda_timing_analysis) +{ + EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; + EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; + EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; + EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; + EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; + EDA_FLATTEN_BUSES = OFF; + EDA_MAP_ILLEGAL_CHARACTERS = OFF; + EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_OUTPUT_DATA_FORMAT = NONE; + EDA_LAUNCH_CMD_LINE_TOOL = OFF; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + RESYNTHESIS_RETIMING = FULL; +} +EDA_TOOL_SETTINGS(eda_board_design) +{ + EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; + EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; + EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; + EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; + EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; + EDA_FLATTEN_BUSES = OFF; + EDA_MAP_ILLEGAL_CHARACTERS = OFF; + EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_OUTPUT_DATA_FORMAT = NONE; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + RESYNTHESIS_RETIMING = FULL; +} +EDA_TOOL_SETTINGS(eda_formal_verification) +{ + EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; + EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; + EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; + EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; + EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; + EDA_FLATTEN_BUSES = OFF; + EDA_MAP_ILLEGAL_CHARACTERS = OFF; + EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_OUTPUT_DATA_FORMAT = NONE; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + RESYNTHESIS_RETIMING = FULL; +} +EDA_TOOL_SETTINGS(eda_palace) +{ + EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; + EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; + EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; + EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; + EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; + EDA_FLATTEN_BUSES = OFF; + EDA_MAP_ILLEGAL_CHARACTERS = OFF; + EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_OUTPUT_DATA_FORMAT = NONE; + RESYNTHESIS_RETIMING = FULL; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; +} +CLOCK(clk_120mhz) +{ + FMAX_REQUIREMENT = "120.0 MHz"; + INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; + DUTY_CYCLE = 50; + DIVIDE_BASE_CLOCK_PERIOD_BY = 1; + MULTIPLY_BASE_CLOCK_PERIOD_BY = 1; + INVERT_BASE_CLOCK = OFF; +} +CLOCK(usbclk) +{ + FMAX_REQUIREMENT = "48.0 MHz"; + INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; + DUTY_CYCLE = 50; + DIVIDE_BASE_CLOCK_PERIOD_BY = 1; + MULTIPLY_BASE_CLOCK_PERIOD_BY = 1; + INVERT_BASE_CLOCK = OFF; +} +CLOCK(SCLK) +{ + FMAX_REQUIREMENT = "1.0 MHz"; + INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; + DUTY_CYCLE = 50; + DIVIDE_BASE_CLOCK_PERIOD_BY = 1; + MULTIPLY_BASE_CLOCK_PERIOD_BY = 1; + INVERT_BASE_CLOCK = OFF; +} +CLOCK(adclk0) +{ + FMAX_REQUIREMENT = "60.0 MHz"; + INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; + DUTY_CYCLE = 50; + DIVIDE_BASE_CLOCK_PERIOD_BY = 1; + MULTIPLY_BASE_CLOCK_PERIOD_BY = 1; + INVERT_BASE_CLOCK = OFF; +} +CLOCK(adclk1) +{ + FMAX_REQUIREMENT = "60.0 MHz"; + INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; + DUTY_CYCLE = 50; + DIVIDE_BASE_CLOCK_PERIOD_BY = 1; + MULTIPLY_BASE_CLOCK_PERIOD_BY = 1; + INVERT_BASE_CLOCK = OFF; +} diff --git a/fpga/toplevel/usrp_multi/usrp_multi.qpf b/fpga/toplevel/usrp_multi/usrp_multi.qpf new file mode 100644 index 0000000..1524de1 --- /dev/null +++ b/fpga/toplevel/usrp_multi/usrp_multi.qpf @@ -0,0 +1,29 @@ +# Copyright (C) 1991-2004 Altera Corporation +# Any megafunction design, and related netlist (encrypted or decrypted), +# support information, device programming or simulation file, and any other +# associated documentation or information provided by Altera or a partner +# under Altera's Megafunction Partnership Program may be used only +# to program PLD devices (but not masked PLD devices) from Altera. Any +# other use of such megafunction design, netlist, support information, +# device programming or simulation file, or any other related documentation +# or information is prohibited for any other purpose, including, but not +# limited to modification, reverse engineering, de-compiling, or use with +# any other silicon devices, unless such use is explicitly licensed under +# a separate agreement with Altera or a megafunction partner. Title to the +# intellectual property, including patents, copyrights, trademarks, trade +# secrets, or maskworks, embodied in any such megafunction design, netlist, +# support information, device programming or simulation file, or any other +# related documentation or information provided by Altera or a megafunction +# partner, remains with Altera, the megafunction partner, or their respective +# licensors. No other licenses, including any licenses needed under any third +# party's intellectual property, are provided herein. + + + +QUARTUS_VERSION = "4.0" +DATE = "17:10:11 December 20, 2004" + + +# Active Revisions + +PROJECT_REVISION = "usrp_multi" diff --git a/fpga/toplevel/usrp_multi/usrp_multi.qsf b/fpga/toplevel/usrp_multi/usrp_multi.qsf new file mode 100644 index 0000000..e45c683 --- /dev/null +++ b/fpga/toplevel/usrp_multi/usrp_multi.qsf @@ -0,0 +1,408 @@ +# Copyright (C) 1991-2005 Altera Corporation +# Your use of Altera Corporation's design tools, logic functions +# and other software and tools, and its AMPP partner logic +# functions, and any output files any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Altera Program License +# Subscription Agreement, Altera MegaCore Function License +# Agreement, or other applicable license agreement, including, +# without limitation, that your use is for the sole purpose of +# programming logic devices manufactured by Altera and sold by +# Altera or its authorized distributors. Please refer to the +# applicable agreement for further details. + + +# The default values for assignments are stored in the file +# usrp_multi_assignment_defaults.qdf +# If this file doesn't exist, and for assignments not listed, see file +# assignment_defaults.qdf + +# Altera recommends that you do not modify this file. This +# file is updated automatically by the Quartus II software +# and any changes you make may be lost or overwritten. + + +# Project-Wide Assignments +# ======================== +set_global_assignment -name ORIGINAL_QUARTUS_VERSION 3.0 +set_global_assignment -name PROJECT_CREATION_TIME_DATE "00:14:04 JULY 13, 2003" +set_global_assignment -name LAST_QUARTUS_VERSION "5.1 SP1" + +# Pin & Location Assignments +# ========================== +set_global_assignment -name RESERVE_PIN "AS INPUT TRI-STATED" +set_location_assignment PIN_29 -to SCLK +set_location_assignment PIN_117 -to SDI +set_location_assignment PIN_28 -to usbclk +set_location_assignment PIN_107 -to usbctl[0] +set_location_assignment PIN_106 -to usbctl[1] +set_location_assignment PIN_105 -to usbctl[2] +set_location_assignment PIN_100 -to usbdata[0] +set_location_assignment PIN_84 -to usbdata[10] +set_location_assignment PIN_83 -to usbdata[11] +set_location_assignment PIN_82 -to usbdata[12] +set_location_assignment PIN_79 -to usbdata[13] +set_location_assignment PIN_78 -to usbdata[14] +set_location_assignment PIN_77 -to usbdata[15] +set_location_assignment PIN_99 -to usbdata[1] +set_location_assignment PIN_98 -to usbdata[2] +set_location_assignment PIN_95 -to usbdata[3] +set_location_assignment PIN_94 -to usbdata[4] +set_location_assignment PIN_93 -to usbdata[5] +set_location_assignment PIN_88 -to usbdata[6] +set_location_assignment PIN_87 -to usbdata[7] +set_location_assignment PIN_86 -to usbdata[8] +set_location_assignment PIN_85 -to usbdata[9] +set_location_assignment PIN_104 -to usbrdy[0] +set_location_assignment PIN_101 -to usbrdy[1] +set_location_assignment PIN_76 -to FX2_1 +set_location_assignment PIN_75 -to FX2_2 +set_location_assignment PIN_74 -to FX2_3 +set_location_assignment PIN_116 -to io_rx_a[0] +set_location_assignment PIN_115 -to io_rx_a[1] +set_location_assignment PIN_114 -to io_rx_a[2] +set_location_assignment PIN_113 -to io_rx_a[3] +set_location_assignment PIN_108 -to io_rx_a[4] +set_location_assignment PIN_195 -to io_rx_a[5] +set_location_assignment PIN_196 -to io_rx_a[6] +set_location_assignment PIN_197 -to io_rx_a[7] +set_location_assignment PIN_200 -to io_rx_a[8] +set_location_assignment PIN_201 -to io_rx_a[9] +set_location_assignment PIN_202 -to io_rx_a[10] +set_location_assignment PIN_203 -to io_rx_a[11] +set_location_assignment PIN_206 -to io_rx_a[12] +set_location_assignment PIN_207 -to io_rx_a[13] +set_location_assignment PIN_208 -to io_rx_a[14] +set_location_assignment PIN_214 -to io_rx_b[0] +set_location_assignment PIN_215 -to io_rx_b[1] +set_location_assignment PIN_216 -to io_rx_b[2] +set_location_assignment PIN_217 -to io_rx_b[3] +set_location_assignment PIN_218 -to io_rx_b[4] +set_location_assignment PIN_219 -to io_rx_b[5] +set_location_assignment PIN_222 -to io_rx_b[6] +set_location_assignment PIN_223 -to io_rx_b[7] +set_location_assignment PIN_224 -to io_rx_b[8] +set_location_assignment PIN_225 -to io_rx_b[9] +set_location_assignment PIN_226 -to io_rx_b[10] +set_location_assignment PIN_227 -to io_rx_b[11] +set_location_assignment PIN_228 -to io_rx_b[12] +set_location_assignment PIN_233 -to io_rx_b[13] +set_location_assignment PIN_234 -to io_rx_b[14] +set_location_assignment PIN_175 -to io_tx_a[0] +set_location_assignment PIN_176 -to io_tx_a[1] +set_location_assignment PIN_177 -to io_tx_a[2] +set_location_assignment PIN_178 -to io_tx_a[3] +set_location_assignment PIN_179 -to io_tx_a[4] +set_location_assignment PIN_180 -to io_tx_a[5] +set_location_assignment PIN_181 -to io_tx_a[6] +set_location_assignment PIN_182 -to io_tx_a[7] +set_location_assignment PIN_183 -to io_tx_a[8] +set_location_assignment PIN_184 -to io_tx_a[9] +set_location_assignment PIN_185 -to io_tx_a[10] +set_location_assignment PIN_186 -to io_tx_a[11] +set_location_assignment PIN_187 -to io_tx_a[12] +set_location_assignment PIN_188 -to io_tx_a[13] +set_location_assignment PIN_193 -to io_tx_a[14] +set_location_assignment PIN_73 -to io_tx_b[0] +set_location_assignment PIN_68 -to io_tx_b[1] +set_location_assignment PIN_67 -to io_tx_b[2] +set_location_assignment PIN_66 -to io_tx_b[3] +set_location_assignment PIN_65 -to io_tx_b[4] +set_location_assignment PIN_64 -to io_tx_b[5] +set_location_assignment PIN_63 -to io_tx_b[6] +set_location_assignment PIN_62 -to io_tx_b[7] +set_location_assignment PIN_61 -to io_tx_b[8] +set_location_assignment PIN_60 -to io_tx_b[9] +set_location_assignment PIN_59 -to io_tx_b[10] +set_location_assignment PIN_58 -to io_tx_b[11] +set_location_assignment PIN_57 -to io_tx_b[12] +set_location_assignment PIN_56 -to io_tx_b[13] +set_location_assignment PIN_55 -to io_tx_b[14] +set_location_assignment PIN_152 -to master_clk +set_location_assignment PIN_144 -to rx_a_a[0] +set_location_assignment PIN_143 -to rx_a_a[1] +set_location_assignment PIN_141 -to rx_a_a[2] +set_location_assignment PIN_140 -to rx_a_a[3] +set_location_assignment PIN_139 -to rx_a_a[4] +set_location_assignment PIN_138 -to rx_a_a[5] +set_location_assignment PIN_137 -to rx_a_a[6] +set_location_assignment PIN_136 -to rx_a_a[7] +set_location_assignment PIN_135 -to rx_a_a[8] +set_location_assignment PIN_134 -to rx_a_a[9] +set_location_assignment PIN_133 -to rx_a_a[10] +set_location_assignment PIN_132 -to rx_a_a[11] +set_location_assignment PIN_23 -to rx_a_b[0] +set_location_assignment PIN_21 -to rx_a_b[1] +set_location_assignment PIN_20 -to rx_a_b[2] +set_location_assignment PIN_19 -to rx_a_b[3] +set_location_assignment PIN_18 -to rx_a_b[4] +set_location_assignment PIN_17 -to rx_a_b[5] +set_location_assignment PIN_16 -to rx_a_b[6] +set_location_assignment PIN_15 -to rx_a_b[7] +set_location_assignment PIN_14 -to rx_a_b[8] +set_location_assignment PIN_13 -to rx_a_b[9] +set_location_assignment PIN_12 -to rx_a_b[10] +set_location_assignment PIN_11 -to rx_a_b[11] +set_location_assignment PIN_131 -to rx_b_a[0] +set_location_assignment PIN_128 -to rx_b_a[1] +set_location_assignment PIN_127 -to rx_b_a[2] +set_location_assignment PIN_126 -to rx_b_a[3] +set_location_assignment PIN_125 -to rx_b_a[4] +set_location_assignment PIN_124 -to rx_b_a[5] +set_location_assignment PIN_123 -to rx_b_a[6] +set_location_assignment PIN_122 -to rx_b_a[7] +set_location_assignment PIN_121 -to rx_b_a[8] +set_location_assignment PIN_120 -to rx_b_a[9] +set_location_assignment PIN_119 -to rx_b_a[10] +set_location_assignment PIN_118 -to rx_b_a[11] +set_location_assignment PIN_8 -to rx_b_b[0] +set_location_assignment PIN_7 -to rx_b_b[1] +set_location_assignment PIN_6 -to rx_b_b[2] +set_location_assignment PIN_5 -to rx_b_b[3] +set_location_assignment PIN_4 -to rx_b_b[4] +set_location_assignment PIN_3 -to rx_b_b[5] +set_location_assignment PIN_2 -to rx_b_b[6] +set_location_assignment PIN_240 -to rx_b_b[7] +set_location_assignment PIN_239 -to rx_b_b[8] +set_location_assignment PIN_238 -to rx_b_b[9] +set_location_assignment PIN_237 -to rx_b_b[10] +set_location_assignment PIN_236 -to rx_b_b[11] +set_location_assignment PIN_156 -to SDO +set_location_assignment PIN_153 -to SEN_FPGA +set_location_assignment PIN_159 -to tx_a[0] +set_location_assignment PIN_160 -to tx_a[1] +set_location_assignment PIN_161 -to tx_a[2] +set_location_assignment PIN_162 -to tx_a[3] +set_location_assignment PIN_163 -to tx_a[4] +set_location_assignment PIN_164 -to tx_a[5] +set_location_assignment PIN_165 -to tx_a[6] +set_location_assignment PIN_166 -to tx_a[7] +set_location_assignment PIN_167 -to tx_a[8] +set_location_assignment PIN_168 -to tx_a[9] +set_location_assignment PIN_169 -to tx_a[10] +set_location_assignment PIN_170 -to tx_a[11] +set_location_assignment PIN_173 -to tx_a[12] +set_location_assignment PIN_174 -to tx_a[13] +set_location_assignment PIN_38 -to tx_b[0] +set_location_assignment PIN_39 -to tx_b[1] +set_location_assignment PIN_41 -to tx_b[2] +set_location_assignment PIN_42 -to tx_b[3] +set_location_assignment PIN_43 -to tx_b[4] +set_location_assignment PIN_44 -to tx_b[5] +set_location_assignment PIN_45 -to tx_b[6] +set_location_assignment PIN_46 -to tx_b[7] +set_location_assignment PIN_47 -to tx_b[8] +set_location_assignment PIN_48 -to tx_b[9] +set_location_assignment PIN_49 -to tx_b[10] +set_location_assignment PIN_50 -to tx_b[11] +set_location_assignment PIN_53 -to tx_b[12] +set_location_assignment PIN_54 -to tx_b[13] +set_location_assignment PIN_158 -to TXSYNC_A +set_location_assignment PIN_37 -to TXSYNC_B +set_location_assignment PIN_235 -to io_rx_b[15] +set_location_assignment PIN_24 -to io_tx_b[15] +set_location_assignment PIN_213 -to io_rx_a[15] +set_location_assignment PIN_194 -to io_tx_a[15] +set_location_assignment PIN_1 -to MYSTERY_SIGNAL + +# Timing Assignments +# ================== +set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF + +# Analysis & Synthesis Assignments +# ================================ +set_global_assignment -name SAVE_DISK_SPACE OFF +set_global_assignment -name DEVICE_FILTER_PACKAGE "ANY QFP" +set_global_assignment -name DEVICE_FILTER_PIN_COUNT 240 +set_global_assignment -name EDA_DESIGN_ENTRY_SYNTHESIS_TOOL "" +set_global_assignment -name FAMILY Cyclone +set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE BALANCED +set_global_assignment -name STRATIX_OPTIMIZATION_TECHNIQUE SPEED +set_global_assignment -name APEX20K_OPTIMIZATION_TECHNIQUE SPEED +set_global_assignment -name TOP_LEVEL_ENTITY usrp_multi +set_global_assignment -name VHDL_SHOW_LMF_MAPPING_MESSAGES OFF +set_global_assignment -name USER_LIBRARIES "H:\\usrp-for2.7\\fpga\\megacells" +set_global_assignment -name AUTO_ENABLE_SMART_COMPILE On + +# Fitter Assignments +# ================== +set_global_assignment -name DEVICE EP1C12Q240C8 +set_global_assignment -name CYCLONE_CONFIGURATION_SCHEME "PASSIVE SERIAL" +set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED" +set_global_assignment -name OPTIMIZE_HOLD_TIMING OFF +set_global_assignment -name OPTIMIZE_TIMING "NORMAL COMPILATION" +set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC OFF +set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION OFF +set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING OFF +set_global_assignment -name IO_PLACEMENT_OPTIMIZATION OFF +set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL +set_global_assignment -name INC_PLC_MODE OFF +set_global_assignment -name ROUTING_BACK_ANNOTATION_MODE OFF +set_instance_assignment -name IO_STANDARD LVTTL -to usbdata[12] +set_global_assignment -name STRATIX_DEVICE_IO_STANDARD LVTTL +set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1 + +# Timing Analysis Assignments +# =========================== +set_global_assignment -name MAX_SCC_SIZE 50 + +# EDA Netlist Writer Assignments +# ============================== +set_global_assignment -name EDA_SIMULATION_TOOL "" +set_global_assignment -name EDA_TIMING_ANALYSIS_TOOL "" +set_global_assignment -name EDA_BOARD_DESIGN_TOOL "" +set_global_assignment -name EDA_FORMAL_VERIFICATION_TOOL "" +set_global_assignment -name EDA_RESYNTHESIS_TOOL "" + +# Assembler Assignments +# ===================== +set_global_assignment -name USE_CONFIGURATION_DEVICE OFF +set_global_assignment -name GENERATE_RBF_FILE ON +set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED" +set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF + +# Simulator Assignments +# ===================== +set_global_assignment -name START_TIME "0 ns" +set_global_assignment -name GLITCH_INTERVAL "1 ns" + +# Design Assistant Assignments +# ============================ +set_global_assignment -name DRC_REPORT_TOP_FANOUT OFF +set_global_assignment -name DRC_REPORT_FANOUT_EXCEEDING OFF +set_global_assignment -name ASSG_CAT OFF +set_global_assignment -name ASSG_RULE_MISSING_FMAX OFF +set_global_assignment -name ASSG_RULE_MISSING_TIMING OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_ASYN_RAM OFF +set_global_assignment -name CLK_CAT OFF +set_global_assignment -name CLK_RULE_COMB_CLOCK OFF +set_global_assignment -name CLK_RULE_INV_CLOCK OFF +set_global_assignment -name CLK_RULE_GATING_SCHEME OFF +set_global_assignment -name CLK_RULE_INPINS_CLKNET OFF +set_global_assignment -name CLK_RULE_CLKNET_CLKSPINES OFF +set_global_assignment -name CLK_RULE_MIX_EDGES OFF +set_global_assignment -name RESET_CAT OFF +set_global_assignment -name RESET_RULE_INPINS_RESETNET OFF +set_global_assignment -name RESET_RULE_UNSYNCH_EXRESET OFF +set_global_assignment -name RESET_RULE_IMSYNCH_EXRESET OFF +set_global_assignment -name RESET_RULE_COMB_ASYNCH_RESET OFF +set_global_assignment -name RESET_RULE_UNSYNCH_ASYNCH_DOMAIN OFF +set_global_assignment -name RESET_RULE_IMSYNCH_ASYNCH_DOMAIN OFF +set_global_assignment -name TIMING_CAT OFF +set_global_assignment -name TIMING_RULE_SHIFT_REG OFF +set_global_assignment -name TIMING_RULE_COIN_CLKEDGE OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_COMB_DRIVES_RAM_WE OFF +set_global_assignment -name NONSYNCHSTRUCT_CAT OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_COMBLOOP OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_REG_LOOP OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_DELAY_CHAIN OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_RIPPLE_CLK OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_ILLEGAL_PULSE_GEN OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_MULTI_VIBRATOR OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_SRLATCH OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_LATCH_UNIDENTIFIED OFF +set_global_assignment -name SIGNALRACE_CAT OFF +set_global_assignment -name ACLK_CAT OFF +set_global_assignment -name ACLK_RULE_NO_SZER_ACLK_DOMAIN OFF +set_global_assignment -name ACLK_RULE_SZER_BTW_ACLK_DOMAIN OFF +set_global_assignment -name ACLK_RULE_IMSZER_ADOMAIN OFF +set_global_assignment -name HCPY_CAT OFF +set_global_assignment -name HCPY_VREF_PINS OFF + +# SignalTap II Assignments +# ======================== +set_global_assignment -name HUB_ENTITY_NAME SLD_HUB +set_global_assignment -name HUB_INSTANCE_NAME SLD_HUB_INST +set_global_assignment -name ENABLE_SIGNALTAP Off + +# LogicLock Region Assignments +# ============================ +set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT OFF + +# ----------------- +# start CLOCK(SCLK) + + # Timing Assignments + # ================== +set_global_assignment -name DUTY_CYCLE 50 -section_id SCLK + set_global_assignment -name FMAX_REQUIREMENT "1.0 MHz" -section_id SCLK + set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id SCLK + +# end CLOCK(SCLK) +# --------------- + +# ----------------------- +# start CLOCK(master_clk) + + # Timing Assignments + # ================== +set_global_assignment -name DUTY_CYCLE 50 -section_id master_clk + set_global_assignment -name FMAX_REQUIREMENT "64.0 MHz" -section_id master_clk + set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id master_clk + +# end CLOCK(master_clk) +# --------------------- + +# ------------------- +# start CLOCK(usbclk) + + # Timing Assignments + # ================== +set_global_assignment -name DUTY_CYCLE 50 -section_id usbclk + set_global_assignment -name FMAX_REQUIREMENT "48.0 MHz" -section_id usbclk + set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id usbclk + +# end CLOCK(usbclk) +# ----------------- + +# ---------------------- +# start ENTITY(usrp_multi) + + # Timing Assignments + # ================== + set_instance_assignment -name CLOCK_SETTINGS SCLK -to SCLK + set_instance_assignment -name CLOCK_SETTINGS usbclk -to usbclk + set_instance_assignment -name CLOCK_SETTINGS master_clk -to master_clk + +# end ENTITY(usrp_multi) +# -------------------- + + +set_global_assignment -name VERILOG_FILE ../../sdr_lib/setting_reg_masked.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/master_control_multi.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/ram16.v +set_global_assignment -name VERILOG_FILE usrp_multi.vh +set_global_assignment -name VERILOG_FILE ../../megacells/fifo_4k.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/acc.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/mult.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/ram16_2sum.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/coeff_rom.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/halfband_decim.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/mac.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/coeff_ram.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/tx_chain.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/rx_dcoffset.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/adc_interface.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/io_pins.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/setting_reg.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/bidir_reg.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/cic_int_shifter.v +set_global_assignment -name VERILOG_FILE ../../megacells/clk_doubler.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/rx_chain.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/gen_sync.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/master_control.v +set_global_assignment -name VERILOG_FILE ../../megacells/fifo_2k.v +set_global_assignment -name VERILOG_FILE ../../megacells/bustri.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/rx_buffer.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/tx_buffer.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/phase_acc.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/cic_interp.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/cic_decim.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/cordic_stage.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/cordic.v +set_global_assignment -name VERILOG_FILE usrp_multi.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/clk_divider.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/serial_io.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/strobe_gen.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/sign_extend.v \ No newline at end of file diff --git a/fpga/toplevel/usrp_multi/usrp_multi.v b/fpga/toplevel/usrp_multi/usrp_multi.v new file mode 100644 index 0000000..b27d3d3 --- /dev/null +++ b/fpga/toplevel/usrp_multi/usrp_multi.v @@ -0,0 +1,379 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003,2004,2005,2006 Matt Ettus +// Copyright (C) 2006 Martin Dudok van Heel +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + +// Top level module for a full setup with DUCs and DDCs + +// Define DEBUG_OWNS_IO_PINS if we're using the daughterboard i/o pins +// for debugging info. NB, This can kill the m'board and/or d'board if you +// have anything except basic d'boards installed. + +// Uncomment the following to include optional circuitry + +`include "usrp_multi.vh" +`include "../../../firmware/include/fpga_regs_common.v" +`include "../../../firmware/include/fpga_regs_standard.v" + +module usrp_multi +(output MYSTERY_SIGNAL, + input master_clk, + input SCLK, + input SDI, + inout SDO, + input SEN_FPGA, + + input FX2_1, + output FX2_2, + output FX2_3, + + input wire [11:0] rx_a_a, + input wire [11:0] rx_b_a, + input wire [11:0] rx_a_b, + input wire [11:0] rx_b_b, + + output wire [13:0] tx_a, + output wire [13:0] tx_b, + + output wire TXSYNC_A, + output wire TXSYNC_B, + + // USB interface + input usbclk, + input wire [2:0] usbctl, + output wire [1:0] usbrdy, + inout [15:0] usbdata, // NB Careful, inout + + // These are the general purpose i/o's that go to the daughterboard slots + inout wire [15:0] io_tx_a, + inout wire [15:0] io_tx_b, + inout wire [15:0] io_rx_a, + inout wire [15:0] io_rx_b + ); + wire [15:0] debugdata,debugctrl; + assign MYSTERY_SIGNAL = 1'b0; + + wire clk64,clk128; + + wire WR = usbctl[0]; + wire RD = usbctl[1]; + wire OE = usbctl[2]; + + wire have_space, have_pkt_rdy; + assign usbrdy[0] = have_space; + assign usbrdy[1] = have_pkt_rdy; + + wire tx_underrun, rx_overrun; + wire clear_status = FX2_1; + assign FX2_2 = rx_overrun; + assign FX2_3 = tx_underrun; + + wire [15:0] usbdata_out; + + wire [3:0] dac0mux,dac1mux,dac2mux,dac3mux; + + wire tx_realsignals; + wire [3:0] rx_numchan; + wire [2:0] tx_numchan; + + wire [7:0] interp_rate, decim_rate; + wire [15:0] tx_debugbus, rx_debugbus; + + wire enable_tx, enable_rx; + wire reset_data; +`ifdef MULTI_ON + wire sync_rx; + assign reset_data = sync_rx; +`else + assign reset_data = 1'b0; +`endif // `ifdef MULTI_ON + + wire tx_dsp_reset, rx_dsp_reset, tx_bus_reset, rx_bus_reset; + wire [7:0] settings; + + // Tri-state bus macro + bustri bustri( .data(usbdata_out),.enabledt(OE),.tridata(usbdata) ); + + assign clk64 = master_clk; + + wire [15:0] ch0tx,ch1tx,ch2tx,ch3tx; //,ch4tx,ch5tx,ch6tx,ch7tx; + wire [15:0] ch0rx,ch1rx,ch2rx,ch3rx,ch4rx,ch5rx,ch6rx,ch7rx; + + // TX + wire [15:0] i_out_0,i_out_1,q_out_0,q_out_1; + wire [15:0] bb_tx_i0,bb_tx_q0,bb_tx_i1,bb_tx_q1; // bb_tx_i2,bb_tx_q2,bb_tx_i3,bb_tx_q3; + + wire strobe_interp, tx_sample_strobe; + wire tx_empty; + + wire serial_strobe; + wire [6:0] serial_addr; + wire [31:0] serial_data; + + reg [15:0] debug_counter; +`ifdef COUNTER_32BIT_ON + reg [31:0] sample_counter_32bit; +`endif // `ifdef COUNTER_32BIT_ON + reg [15:0] loopback_i_0,loopback_q_0; + + //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + // Transmit Side +`ifdef TX_ON + assign bb_tx_i0 = ch0tx; + assign bb_tx_q0 = ch1tx; + assign bb_tx_i1 = ch2tx; + assign bb_tx_q1 = ch3tx; + + tx_buffer tx_buffer + ( .usbclk(usbclk),.bus_reset(tx_bus_reset),.reset(tx_dsp_reset), + .usbdata(usbdata),.WR(WR),.have_space(have_space),.tx_underrun(tx_underrun), + .channels({tx_numchan,1'b0}), + .tx_i_0(ch0tx),.tx_q_0(ch1tx), + .tx_i_1(ch2tx),.tx_q_1(ch3tx), + .tx_i_2(),.tx_q_2(), + .tx_i_3(),.tx_q_3(), + .txclk(clk64),.txstrobe(strobe_interp), + .clear_status(clear_status), + .tx_empty(tx_empty), + .debugbus(tx_debugbus) ); + + tx_chain tx_chain_0 + ( .clock(clk64),.reset(tx_dsp_reset),.enable(enable_tx), + .interp_rate(interp_rate),.sample_strobe(tx_sample_strobe), + .interpolator_strobe(strobe_interp),.freq(), + .i_in(bb_tx_i0),.q_in(bb_tx_q0),.i_out(i_out_0),.q_out(q_out_0) ); + + tx_chain tx_chain_1 + ( .clock(clk64),.reset(tx_dsp_reset),.enable(enable_tx), + .interp_rate(interp_rate),.sample_strobe(tx_sample_strobe), + .interpolator_strobe(strobe_interp),.freq(), + .i_in(bb_tx_i1),.q_in(bb_tx_q1),.i_out(i_out_1),.q_out(q_out_1) ); + + setting_reg #(`FR_TX_MUX) + sr_txmux(.clock(clk64),.reset(tx_dsp_reset),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data), + .out({dac3mux,dac2mux,dac1mux,dac0mux,tx_realsignals,tx_numchan})); + + wire [15:0] tx_a_a = dac0mux[3] ? (dac0mux[1] ? (dac0mux[0] ? q_out_1 : i_out_1) : (dac0mux[0] ? q_out_0 : i_out_0)) : 16'b0; + wire [15:0] tx_b_a = dac1mux[3] ? (dac1mux[1] ? (dac1mux[0] ? q_out_1 : i_out_1) : (dac1mux[0] ? q_out_0 : i_out_0)) : 16'b0; + wire [15:0] tx_a_b = dac2mux[3] ? (dac2mux[1] ? (dac2mux[0] ? q_out_1 : i_out_1) : (dac2mux[0] ? q_out_0 : i_out_0)) : 16'b0; + wire [15:0] tx_b_b = dac3mux[3] ? (dac3mux[1] ? (dac3mux[0] ? q_out_1 : i_out_1) : (dac3mux[0] ? q_out_0 : i_out_0)) : 16'b0; + + wire txsync = tx_sample_strobe; + assign TXSYNC_A = txsync; + assign TXSYNC_B = txsync; + + assign tx_a = txsync ? tx_b_a[15:2] : tx_a_a[15:2]; + assign tx_b = txsync ? tx_b_b[15:2] : tx_a_b[15:2]; +`endif // `ifdef TX_ON + + ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + // Receive Side +`ifdef RX_ON + wire rx_sample_strobe,strobe_decim,hb_strobe; + wire [15:0] bb_rx_i0,bb_rx_q0,bb_rx_i1,bb_rx_q1, + bb_rx_i2,bb_rx_q2,bb_rx_i3,bb_rx_q3; + + wire loopback = settings[0]; + wire counter = settings[1]; +`ifdef COUNTER_32BIT_ON + wire counter_32bit = settings[2]; + + always @(posedge clk64) + if(rx_dsp_reset) + sample_counter_32bit <= #1 32'd0; + else if(~enable_rx | reset_data) + sample_counter_32bit <=#1 32'd0; + else if(hb_strobe) + sample_counter_32bit <=#1 sample_counter_32bit + 32'd1; +`endif // `ifdef COUNTER_32BIT_ON + + always @(posedge clk64) + if(rx_dsp_reset) + debug_counter <= #1 16'd0; + else if(~enable_rx) + debug_counter <= #1 16'd0; + else if(hb_strobe) + debug_counter <=#1 debug_counter + 16'd2; + + always @(posedge clk64) + if(strobe_interp) + begin + loopback_i_0 <= #1 ch0tx; + loopback_q_0 <= #1 ch1tx; + end + +`ifdef COUNTER_32BIT_ON + assign ch0rx = counter_32bit?sample_counter_32bit[31:16]:counter ? debug_counter : loopback ? loopback_i_0 : bb_rx_i0; + assign ch1rx = counter_32bit?sample_counter_32bit[15:0]:counter ? debug_counter + 16'd1 : loopback ? loopback_q_0 : bb_rx_q0; + assign ch2rx = bb_rx_i1; + assign ch3rx = bb_rx_q1; + assign ch4rx = counter_32bit?bb_rx_i0:bb_rx_i2; + assign ch5rx = counter_32bit?bb_rx_q0:bb_rx_q2;// If using counter replicate channels here to be able to get rx_i0 when using counter + //This means if you use 4 channels that channel 3 will be replaced by channel 0 + // and channel 0 will output the 32 bit counter. + assign ch6rx = bb_rx_i3; + assign ch7rx = bb_rx_q3; +`else + assign ch0rx = counter ? debug_counter : loopback ? loopback_i_0 : bb_rx_i0; + assign ch1rx = counter ? debug_counter + 16'd1 : loopback ? loopback_q_0 : bb_rx_q0; + assign ch2rx = bb_rx_i1; + assign ch3rx = bb_rx_q1; + assign ch4rx = bb_rx_i2; + assign ch5rx = bb_rx_q2; + assign ch6rx = bb_rx_i3; + assign ch7rx = bb_rx_q3; +`endif // `ifdef COUNTER_32BIT_ON + + + wire [15:0] ddc0_in_i,ddc0_in_q,ddc1_in_i,ddc1_in_q,ddc2_in_i,ddc2_in_q,ddc3_in_i,ddc3_in_q; + adc_interface adc_interface(.clock(clk64),.reset(rx_dsp_reset),.enable(1'b1), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .rx_a_a(rx_a_a),.rx_b_a(rx_b_a),.rx_a_b(rx_a_b),.rx_b_b(rx_b_b), + .ddc0_in_i(ddc0_in_i),.ddc0_in_q(ddc0_in_q), + .ddc1_in_i(ddc1_in_i),.ddc1_in_q(ddc1_in_q), + .ddc2_in_i(ddc2_in_i),.ddc2_in_q(ddc2_in_q), + .ddc3_in_i(ddc3_in_i),.ddc3_in_q(ddc3_in_q),.rx_numchan(rx_numchan) ); + + rx_buffer rx_buffer + ( .usbclk(usbclk),.bus_reset(rx_bus_reset),.reset(rx_dsp_reset | reset_data), + .reset_regs(rx_dsp_reset), + .usbdata(usbdata_out),.RD(RD),.have_pkt_rdy(have_pkt_rdy),.rx_overrun(rx_overrun), + .channels(rx_numchan), + .ch_0(ch0rx),.ch_1(ch1rx), + .ch_2(ch2rx),.ch_3(ch3rx), + .ch_4(ch4rx),.ch_5(ch5rx), + .ch_6(ch6rx),.ch_7(ch7rx), + .rxclk(clk64),.rxstrobe(hb_strobe), + .clear_status(clear_status), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .debugbus(rx_debugbus) ); + + `ifdef RX_EN_0 + rx_chain #(`FR_RX_FREQ_0,`FR_RX_PHASE_0) rx_chain_0 + ( .clock(clk64),.reset(reset_data),.enable(enable_rx), + .decim_rate(decim_rate),.sample_strobe(rx_sample_strobe),.decimator_strobe(strobe_decim),.hb_strobe(hb_strobe), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .i_in(ddc0_in_i),.q_in(ddc0_in_q),.i_out(bb_rx_i0),.q_out(bb_rx_q0),.debugdata(debugdata),.debugctrl(debugctrl)); + `else + assign bb_rx_i0=16'd0; + assign bb_rx_q0=16'd0; + `endif + + `ifdef RX_EN_1 + rx_chain #(`FR_RX_FREQ_1,`FR_RX_PHASE_1) rx_chain_1 + ( .clock(clk64),.reset(reset_data),.enable(enable_rx), + .decim_rate(decim_rate),.sample_strobe(rx_sample_strobe),.decimator_strobe(strobe_decim),.hb_strobe(), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .i_in(ddc1_in_i),.q_in(ddc1_in_q),.i_out(bb_rx_i1),.q_out(bb_rx_q1)); + `else + assign bb_rx_i1=16'd0; + assign bb_rx_q1=16'd0; + `endif + + `ifdef RX_EN_2 + rx_chain #(`FR_RX_FREQ_2,`FR_RX_PHASE_2) rx_chain_2 + ( .clock(clk64),.reset(reset_data),.enable(enable_rx), + .decim_rate(decim_rate),.sample_strobe(rx_sample_strobe),.decimator_strobe(strobe_decim),.hb_strobe(), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .i_in(ddc2_in_i),.q_in(ddc2_in_q),.i_out(bb_rx_i2),.q_out(bb_rx_q2)); + `else + assign bb_rx_i2=16'd0; + assign bb_rx_q2=16'd0; + `endif + + `ifdef RX_EN_3 + rx_chain #(`FR_RX_FREQ_3,`FR_RX_PHASE_3) rx_chain_3 + ( .clock(clk64),.reset(reset_data),.enable(enable_rx), + .decim_rate(decim_rate),.sample_strobe(rx_sample_strobe),.decimator_strobe(strobe_decim),.hb_strobe(), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .i_in(ddc3_in_i),.q_in(ddc3_in_q),.i_out(bb_rx_i3),.q_out(bb_rx_q3)); + assign bb_rx_i3=16'd0; + assign bb_rx_q3=16'd0; + `endif + +`endif // `ifdef RX_ON + + /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + // Control Functions + + wire [31:0] capabilities; + assign capabilities[7] = `TX_CAP_HB; + assign capabilities[6:4] = `TX_CAP_NCHAN; + assign capabilities[3] = `RX_CAP_HB; + assign capabilities[2:0] = `RX_CAP_NCHAN; + + + serial_io serial_io + ( .master_clk(clk64),.serial_clock(SCLK),.serial_data_in(SDI), + .enable(SEN_FPGA),.reset(1'b0),.serial_data_out(SDO), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .readback_0({io_rx_a,io_tx_a}),.readback_1({io_rx_b,io_tx_b}),.readback_2(capabilities),.readback_3(32'hf0f0931a) ); + + wire [15:0] reg_0,reg_1,reg_2,reg_3; + +`ifdef MULTI_ON + + master_control_multi master_control + ( .master_clk(clk64),.usbclk(usbclk), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .rx_slave_sync(io_rx_a[`bitnoFR_RX_SYNC_INPUT_IOPIN]), + .tx_bus_reset(tx_bus_reset),.rx_bus_reset(rx_bus_reset), + .tx_dsp_reset(tx_dsp_reset),.rx_dsp_reset(rx_dsp_reset), + .enable_tx(enable_tx),.enable_rx(enable_rx), + .sync_rx(sync_rx), + .interp_rate(interp_rate),.decim_rate(decim_rate), + .tx_sample_strobe(tx_sample_strobe),.strobe_interp(strobe_interp), + .rx_sample_strobe(rx_sample_strobe),.strobe_decim(strobe_decim), + .tx_empty(tx_empty), + //.debug_0(rx_a_a),.debug_1(ddc0_in_i), + .debug_0(rx_debugbus),.debug_1(ddc0_in_i), + .debug_2({rx_sample_strobe,strobe_decim,serial_strobe,serial_addr}),.debug_3({rx_dsp_reset,tx_dsp_reset,rx_bus_reset,tx_bus_reset,enable_rx,tx_underrun,rx_overrun,decim_rate}), + .reg_0(reg_0),.reg_1(reg_1),.reg_2(reg_2),.reg_3(reg_3) ); + +`else //`ifdef MULTI_ON + + master_control master_control + ( .master_clk(clk64),.usbclk(usbclk), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .tx_bus_reset(tx_bus_reset),.rx_bus_reset(rx_bus_reset), + .tx_dsp_reset(tx_dsp_reset),.rx_dsp_reset(rx_dsp_reset), + .enable_tx(enable_tx),.enable_rx(enable_rx), + .interp_rate(interp_rate),.decim_rate(decim_rate), + .tx_sample_strobe(tx_sample_strobe),.strobe_interp(strobe_interp), + .rx_sample_strobe(rx_sample_strobe),.strobe_decim(strobe_decim), + .tx_empty(tx_empty), + //.debug_0(rx_a_a),.debug_1(ddc0_in_i), + .debug_0(rx_debugbus),.debug_1(ddc0_in_i), + .debug_2({rx_sample_strobe,strobe_decim,serial_strobe,serial_addr}),.debug_3({rx_dsp_reset,tx_dsp_reset,rx_bus_reset,tx_bus_reset,enable_rx,tx_underrun,rx_overrun,decim_rate}), + .reg_0(reg_0),.reg_1(reg_1),.reg_2(reg_2),.reg_3(reg_3) ); + +`endif //`ifdef MULTI_ON + + io_pins io_pins + (.io_0(io_tx_a),.io_1(io_rx_a),.io_2(io_tx_b),.io_3(io_rx_b), + .reg_0(reg_0),.reg_1(reg_1),.reg_2(reg_2),.reg_3(reg_3), + .clock(clk64),.rx_reset(rx_dsp_reset),.tx_reset(tx_dsp_reset), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe)); + + //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + // Misc Settings + setting_reg #(`FR_MODE) sr_misc(.clock(clk64),.reset(rx_dsp_reset),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(settings)); + +endmodule // usrp_multi diff --git a/fpga/toplevel/usrp_multi/usrp_multi.vh b/fpga/toplevel/usrp_multi/usrp_multi.vh new file mode 100644 index 0000000..2904a93 --- /dev/null +++ b/fpga/toplevel/usrp_multi/usrp_multi.vh @@ -0,0 +1,141 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2006 Matt Ettus +// Copyright (C) 2006 Martin Dudok van Heel +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + +// ==================================================================== +// User control over what parts get included +// +// >>>> EDIT ONLY THIS SECTION <<<< +// Uncomment only ONE configuration +// ==================================================================== + +// ==== Multi usrp configurations ==== +// Uncomment this for multi with 2 rx channels (w/ halfband) & 2 transmit channels +`include "usrp_multi_config_2rxhb_2tx.vh" + +// Uncomment this for multi with 4 rx channels (w/o halfband) & 0 transmit channels +//`include "usrp_multi_config_4rx_0tx.vh" + +// Uncomment this for multi with 2 rx channels (w/ halfband) & 0 transmit channels +//`include "usrp_multi_config_2rxhb_0tx.vh" + +// Uncomment this for multi with 2 rx channels (w/o halfband) & 0 transmit channels +//`include "usrp_multi_config_2rx_0tx.vh" + +// ==== Standard configurations (no multi support) ==== +// Uncomment this for standard with 2 rx channels (w/ halfband) & 2 transmit channels +// `include "../usrp_std/usrp_std_config_2rxhb_2tx.vh" + +// Uncomment this for standard with 4 rx channels (w/o halfband) & 0 transmit channels +//`include "../usrp_std/usrp_std_config_4rx_0tx.vh" + +// Add other "known to fit" configurations here... + +// ==================================================================== +// +// >>>> DO NOT EDIT BELOW HERE <<<< +// +// [The stuff from here down is derived from the stuff included above] +// +// N.B., *all* the remainder of the code should be conditionalized +// only in terms of: +// +// TX_ON, TX_EN_0, TX_EN_1, TX_EN_2, TX_EN_3, TX_CAP_NCHAN, TX_CAP_HB, +// RX_ON, RX_EN_0, RX_EN_1, RX_EN_2, RX_EN_3, RX_CAP_NCHAN, RX_CAP_HB, +// RX_NCO_ON, RX_CIC_ON +// ==================================================================== +`ifdef MULTI_ON + `define COUNTER_32BIT_ON +`endif + +`ifdef TX_ON + + `ifdef TX_SINGLE + `define TX_EN_0 + `define TX_CAP_NCHAN 3'd1 + `endif + + `ifdef TX_DUAL + `define TX_EN_0 + `define TX_EN_1 + `define TX_CAP_NCHAN 3'd2 + `endif + + `ifdef TX_QUAD + `define TX_EN_0 + `define TX_EN_1 + `define TX_EN_2 + `define TX_EN_3 + `define TX_CAP_NCHAN 3'd4 + `endif + + `ifdef TX_HB_ON + `define TX_CAP_HB 1 + `else + `define TX_CAP_HB 0 + `endif + +`else // !ifdef TX_ON + + `define TX_CAP_NCHAN 3'd0 + `define TX_CAP_HB 0 + +`endif // !ifdef TX_ON + +// -------------------------------------------------------------------- + +`ifdef RX_ON + + `ifdef RX_SINGLE + `define RX_EN_0 + `define RX_CAP_NCHAN 3'd1 + `endif + + `ifdef RX_DUAL + `define RX_EN_0 + `define RX_EN_1 + `ifdef MULTI_ON + `define RX_CAP_NCHAN 3'd4 + `else + `define RX_CAP_NCHAN 3'd2 + `endif + `endif + + `ifdef RX_QUAD + `define RX_EN_0 + `define RX_EN_1 + `define RX_EN_2 + `define RX_EN_3 + `define RX_CAP_NCHAN 3'd4 + `endif + + `ifdef RX_HB_ON + `define RX_CAP_HB 1 + `else + `define RX_CAP_HB 0 + `endif + +`else // !ifdef RX_ON + + `define RX_CAP_NCHAN 3'd0 + `define RX_CAP_HB 0 + +`endif // !ifdef RX_ON diff --git a/fpga/toplevel/usrp_multi/usrp_multi_config_2rx_0tx.vh b/fpga/toplevel/usrp_multi/usrp_multi_config_2rx_0tx.vh new file mode 100644 index 0000000..26a41e4 --- /dev/null +++ b/fpga/toplevel/usrp_multi/usrp_multi_config_2rx_0tx.vh @@ -0,0 +1,62 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2006 Matt Ettus +// Copyright (C) 2006 Martin Dudok van Heel +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// +`define MULTI_ON +// ------------------------------------------------------------ +// If TX_ON is not defined, there is *no* transmit circuitry built +// `define TX_ON + +// ------------------------------------------------------------ +// Define 1 and only one of TX_SINGLE, TX_DUAL and TX_QUAD +// to respectively enable 1, 2 or 4 transmit channels. +// [Please note that only TX_DUAL is currently valid] +//`define TX_SINGLE +//`define TX_DUAL +//`define TX_QUAD + +// ------------------------------------------------------------ +// Define TX_HB_ON to enable the transmit halfband filter +// [Not implemented] +//`define TX_HB_ON + +// ------------------------------------------------------------ +// IF RX_ON is not defined, there is *no* transmit circuitry built + `define RX_ON + +// ------------------------------------------------------------ +// Define 1 and only one of RX_SINGLE, RX_DUAL and RX_QUAD +// to respectively define 1, 2 or 4 receive channels. + +//`define RX_SINGLE +`define RX_DUAL +//`define RX_QUAD + +// ------------------------------------------------------------ +// Define RX_HB_ON to enable the receive halfband filter +//`define RX_HB_ON + +// ------------------------------------------------------------ +// Define RX_NCO_ON to enable the receive Numerical Controlled Osc + `define RX_NCO_ON + +// ------------------------------------------------------------ +// Define RX_CIC_ON to enable the receive Cascaded Integrator Comb filter + `define RX_CIC_ON diff --git a/fpga/toplevel/usrp_multi/usrp_multi_config_2rxhb_0tx.vh b/fpga/toplevel/usrp_multi/usrp_multi_config_2rxhb_0tx.vh new file mode 100644 index 0000000..0673d96 --- /dev/null +++ b/fpga/toplevel/usrp_multi/usrp_multi_config_2rxhb_0tx.vh @@ -0,0 +1,62 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2006 Matt Ettus +// Copyright (C) 2006 Martin Dudok van Heel +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// +`define MULTI_ON +// ------------------------------------------------------------ +// If TX_ON is not defined, there is *no* transmit circuitry built +// `define TX_ON + +// ------------------------------------------------------------ +// Define 1 and only one of TX_SINGLE, TX_DUAL and TX_QUAD +// to respectively enable 1, 2 or 4 transmit channels. +// [Please note that only TX_DUAL is currently valid] +//`define TX_SINGLE +//`define TX_DUAL +//`define TX_QUAD + +// ------------------------------------------------------------ +// Define TX_HB_ON to enable the transmit halfband filter +// [Not implemented] +//`define TX_HB_ON + +// ------------------------------------------------------------ +// IF RX_ON is not defined, there is *no* transmit circuitry built + `define RX_ON + +// ------------------------------------------------------------ +// Define 1 and only one of RX_SINGLE, RX_DUAL and RX_QUAD +// to respectively define 1, 2 or 4 receive channels. + +//`define RX_SINGLE + `define RX_DUAL +//`define RX_QUAD + +// ------------------------------------------------------------ +// Define RX_HB_ON to enable the receive halfband filter + `define RX_HB_ON + +// ------------------------------------------------------------ +// Define RX_NCO_ON to enable the receive Numerical Controlled Osc + `define RX_NCO_ON + +// ------------------------------------------------------------ +// Define RX_CIC_ON to enable the receive Cascaded Integrator Comb filter + `define RX_CIC_ON diff --git a/fpga/toplevel/usrp_multi/usrp_multi_config_2rxhb_2tx.vh b/fpga/toplevel/usrp_multi/usrp_multi_config_2rxhb_2tx.vh new file mode 100644 index 0000000..80c7fbd --- /dev/null +++ b/fpga/toplevel/usrp_multi/usrp_multi_config_2rxhb_2tx.vh @@ -0,0 +1,62 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2006 Matt Ettus +// Copyright (C) 2006 Martin Dudok van Heel +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// +`define MULTI_ON +// ------------------------------------------------------------ +// If TX_ON is not defined, there is *no* transmit circuitry built + `define TX_ON + +// ------------------------------------------------------------ +// Define 1 and only one of TX_SINGLE, TX_DUAL and TX_QUAD +// to respectively enable 1, 2 or 4 transmit channels. +// [Please note that only TX_DUAL is currently valid] +//`define TX_SINGLE + `define TX_DUAL +//`define TX_QUAD + +// ------------------------------------------------------------ +// Define TX_HB_ON to enable the transmit halfband filter +// [Not implemented] +//`define TX_HB_ON + +// ------------------------------------------------------------ +// IF RX_ON is not defined, there is *no* transmit circuitry built + `define RX_ON + +// ------------------------------------------------------------ +// Define 1 and only one of RX_SINGLE, RX_DUAL and RX_QUAD +// to respectively define 1, 2 or 4 receive channels. + +//`define RX_SINGLE + `define RX_DUAL +//`define RX_QUAD + +// ------------------------------------------------------------ +// Define RX_HB_ON to enable the receive halfband filter + `define RX_HB_ON + +// ------------------------------------------------------------ +// Define RX_NCO_ON to enable the receive Numerical Controlled Osc + `define RX_NCO_ON + +// ------------------------------------------------------------ +// Define RX_CIC_ON to enable the receive Cascaded Integrator Comb filter + `define RX_CIC_ON diff --git a/fpga/toplevel/usrp_multi/usrp_multi_config_4rx_0tx.vh b/fpga/toplevel/usrp_multi/usrp_multi_config_4rx_0tx.vh new file mode 100644 index 0000000..36176be --- /dev/null +++ b/fpga/toplevel/usrp_multi/usrp_multi_config_4rx_0tx.vh @@ -0,0 +1,62 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2006 Matt Ettus +// Copyright (C) 2006 Martin Dudok van Heel +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// +`define MULTI_ON +// ------------------------------------------------------------ +// If TX_ON is not defined, there is *no* transmit circuitry built +// `define TX_ON + +// ------------------------------------------------------------ +// Define 1 and only one of TX_SINGLE, TX_DUAL and TX_QUAD +// to respectively enable 1, 2 or 4 transmit channels. +// [Please note that only TX_DUAL is currently valid] +//`define TX_SINGLE +//`define TX_DUAL +//`define TX_QUAD + +// ------------------------------------------------------------ +// Define TX_HB_ON to enable the transmit halfband filter +// [Not implemented] +//`define TX_HB_ON + +// ------------------------------------------------------------ +// IF RX_ON is not defined, there is *no* transmit circuitry built + `define RX_ON + +// ------------------------------------------------------------ +// Define 1 and only one of RX_SINGLE, RX_DUAL and RX_QUAD +// to respectively define 1, 2 or 4 receive channels. + +//`define RX_SINGLE +//`define RX_DUAL + `define RX_QUAD + +// ------------------------------------------------------------ +// Define RX_HB_ON to enable the receive halfband filter +//`define RX_HB_ON + +// ------------------------------------------------------------ +// Define RX_NCO_ON to enable the receive Numerical Controlled Osc + `define RX_NCO_ON + +// ------------------------------------------------------------ +// Define RX_CIC_ON to enable the receive Cascaded Integrator Comb filter + `define RX_CIC_ON diff --git a/fpga/toplevel/usrp_multi/usrp_std.vh b/fpga/toplevel/usrp_multi/usrp_std.vh new file mode 100644 index 0000000..189cf14 --- /dev/null +++ b/fpga/toplevel/usrp_multi/usrp_std.vh @@ -0,0 +1,29 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2006 Martin Dudok van Heel +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + +// ==================================================================== +// Do not remove or edit this file. +// This is a redirect to usrp_multi.vh +// This is needed because some common source files have a +// hardcoded `include "usrp_std.vh" +// ==================================================================== + +`include "usrp_multi.vh" diff --git a/fpga/toplevel/usrp_std/usrp_std.csf b/fpga/toplevel/usrp_std/usrp_std.csf new file mode 100644 index 0000000..627197c --- /dev/null +++ b/fpga/toplevel/usrp_std/usrp_std.csf @@ -0,0 +1,444 @@ +COMPILER_SETTINGS +{ + IO_PLACEMENT_OPTIMIZATION = OFF; + ENABLE_DRC_SETTINGS = OFF; + PHYSICAL_SYNTHESIS_REGISTER_RETIMING = OFF; + PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION = OFF; + PHYSICAL_SYNTHESIS_COMBO_LOGIC = OFF; + DRC_FANOUT_EXCEEDING = 30; + DRC_REPORT_FANOUT_EXCEEDING = OFF; + DRC_TOP_FANOUT = 50; + DRC_REPORT_TOP_FANOUT = OFF; + RUN_DRC_DURING_COMPILATION = OFF; + ADV_NETLIST_OPT_RETIME_CORE_AND_IO = ON; + ADV_NETLIST_OPT_SYNTH_USE_FITTER_INFO = OFF; + ADV_NETLIST_OPT_SYNTH_GATE_RETIME = OFF; + ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP = OFF; + SMART_COMPILE_IGNORES_TDC_FOR_STRATIX_PLL_CHANGES = OFF; + MERGE_HEX_FILE = OFF; + TRUE_WYSIWYG_FLOW = OFF; + SEED = 1; + FINAL_PLACEMENT_OPTIMIZATION = AUTOMATICALLY; + FAMILY = Cyclone; + DPRAM_DUAL_PORT_MODE_OTHER_SIGNALS_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2"; + DPRAM_32BIT_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA1 = "MEGALAB COLUMN 1"; + DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA1 = "MEGALAB COLUMN 1"; + DPRAM_DUAL_PORT_MODE_OUTPUT_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2"; + DPRAM_32BIT_SINGLE_PORT_MODE_OUTPUT_EPXA1 = "LOWER TO 1ESB UPPER TO 1"; + DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_OUTPUT_EPXA1 = "MEGALAB COLUMN 1"; + DPRAM_DUAL_PORT_MODE_INPUT_EPXA1 = "DPRAM0 TO 1 DPRAM1 TO 2"; + DPRAM_32BIT_SINGLE_PORT_MODE_INPUT_EPXA1 = "MEGALAB COLUMN 1"; + DPRAM_8BIT_16BIT_SINGLE_PORT_MODE_INPUT_EPXA1 = "MEGALAB COLUMN 1"; + DPRAM_DUAL_PORT_MODE_OTHER_SIGNALS_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4"; + DPRAM_SINGLE_PORT_MODE_OTHER_SIGNALS_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4"; + DPRAM_WIDE_MODE_OTHER_SIGNALS_EPXA4_10 = "MEGALAB COLUMN 3"; + DPRAM_DEEP_MODE_OTHER_SIGNALS_EPXA4_10 = "MEGALAB COLUMN 3"; + DPRAM_DUAL_PORT_MODE_OUTPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4ESB"; + DPRAM_SINGLE_PORT_MODE_OUTPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4ESB"; + DPRAM_WIDE_MODE_OUTPUT_EPXA4_10 = "LOWER TO 3 UPPER TO 4ESB"; + DPRAM_DEEP_MODE_OUTPUT_EPXA4_10 = "MEGALAB COLUMN 3"; + DPRAM_DUAL_PORT_MODE_INPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4"; + DPRAM_SINGLE_PORT_MODE_INPUT_EPXA4_10 = "DPRAM0 TO 3 DPRAM1 TO 4"; + DPRAM_WIDE_MODE_INPUT_EPXA4_10 = "LOWER TO 3 UPPER TO 4"; + DPRAM_DEEP_MODE_INPUT_EPXA4_10 = "MEGALAB COLUMN 3"; + DPRAM_OTHER_SIGNALS_EPXA4_10 = "DEFAULT OTHER ROUTING OPTIONS"; + DPRAM_OUTPUT_EPXA4_10 = "DEFAULT OUTPUT ROUTING OPTIONS"; + DPRAM_INPUT_EPXA4_10 = "DEFAULT INPUT ROUTING OPTIONS"; + STRIPE_TO_PLD_INTERRUPTS_EPXA4_10 = "MEGALAB COLUMN 2"; + PLD_TO_STRIPE_INTERRUPTS_EPXA4_10 = "MEGALAB COLUMN 2"; + PROCESSOR_DEBUG_EXTENSIONS_EPXA4_10 = "MEGALAB COLUMN 2"; + STRIPE_TO_PLD_BRIDGE_EPXA4_10 = "MEGALAB COLUMN 1"; + FAST_FIT_COMPILATION = OFF; + SIGNALPROBE_DURING_NORMAL_COMPILATION = OFF; + OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING = ON; + OPTIMIZE_TIMING = "NORMAL COMPILATION"; + OPTIMIZE_HOLD_TIMING = OFF; + COMPILATION_LEVEL = FULL; + SAVE_DISK_SPACE = OFF; + SPEED_DISK_USAGE_TRADEOFF = NORMAL; + LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT = OFF; + SIGNALPROBE_ALLOW_OVERUSE = OFF; + FOCUS_ENTITY_NAME = |usrp_std; + ROUTING_BACK_ANNOTATION_MODE = OFF; + INC_PLC_MODE = OFF; + FIT_ONLY_ONE_ATTEMPT = OFF; +} +DEFAULT_DEVICE_OPTIONS +{ + GENERATE_CONFIG_HEXOUT_FILE = OFF; + GENERATE_CONFIG_JBC_FILE_COMPRESSED = ON; + GENERATE_CONFIG_JBC_FILE = OFF; + GENERATE_CONFIG_JAM_FILE = OFF; + GENERATE_CONFIG_ISC_FILE = OFF; + GENERATE_CONFIG_SVF_FILE = OFF; + GENERATE_JBC_FILE_COMPRESSED = ON; + GENERATE_JBC_FILE = OFF; + GENERATE_JAM_FILE = OFF; + GENERATE_ISC_FILE = OFF; + GENERATE_SVF_FILE = OFF; + RESERVE_PIN = "AS INPUT TRI-STATED"; + RESERVE_ALL_UNUSED_PINS = "AS OUTPUT DRIVING GROUND"; + HEXOUT_FILE_COUNT_DIRECTION = UP; + HEXOUT_FILE_START_ADDRESS = 0; + GENERATE_HEX_FILE = OFF; + GENERATE_RBF_FILE = OFF; + GENERATE_TTF_FILE = OFF; + RESERVE_ASDO_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_DATA0_AFTER_CONFIGURATION = "AS INPUT TRI-STATED"; + RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_RDYNBUSY_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + DISABLE_NCS_AND_OE_PULLUPS_ON_CONFIG_DEVICE = OFF; + AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE = ON; + EPROM_USE_CHECKSUM_AS_USERCODE = OFF; + FLEX10K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + MERCURY_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + STRATIX_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + APEX20K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + STRATIX_CONFIGURATION_DEVICE = AUTO; + CYCLONE_CONFIGURATION_DEVICE = AUTO; + FLEX10K_CONFIGURATION_DEVICE = AUTO; + FLEX6K_CONFIGURATION_DEVICE = AUTO; + MERCURY_CONFIGURATION_DEVICE = AUTO; + EXCALIBUR_CONFIGURATION_DEVICE = AUTO; + APEX20K_CONFIGURATION_DEVICE = AUTO; + USE_CONFIGURATION_DEVICE = ON; + ENABLE_INIT_DONE_OUTPUT = OFF; + FLEX10K_ENABLE_LOCK_OUTPUT = OFF; + ENABLE_DEVICE_WIDE_OE = OFF; + ENABLE_DEVICE_WIDE_RESET = OFF; + RELEASE_CLEARS_BEFORE_TRI_STATES = OFF; + AUTO_RESTART_CONFIGURATION = OFF; + ENABLE_VREFB_PIN = OFF; + ENABLE_VREFA_PIN = OFF; + SECURITY_BIT = OFF; + USER_START_UP_CLOCK = OFF; + APEXII_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + FLEX10K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + FLEX6K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + MERCURY_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + EXCALIBUR_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + CYCLONE_CONFIGURATION_SCHEME = "ACTIVE SERIAL"; + STRATIX_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + APEX20K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + STRATIX_UPDATE_MODE = STANDARD; + USE_CHECKSUM_AS_USERCODE = OFF; + MAX7000_USE_CHECKSUM_AS_USERCODE = OFF; + MAX7000_JTAG_USER_CODE = FFFFFFFF; + FLEX10K_JTAG_USER_CODE = 7F; + MERCURY_JTAG_USER_CODE = FFFFFFFF; + APEX20K_JTAG_USER_CODE = FFFFFFFF; + STRATIX_JTAG_USER_CODE = FFFFFFFF; + MAX7000S_JTAG_USER_CODE = FFFF; + RESERVE_NCEO_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + FLEX10K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON; + FLEX6K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = OFF; + ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON; + MAX7000_ENABLE_JTAG_BST_SUPPORT = ON; + ENABLE_JTAG_BST_SUPPORT = OFF; + CONFIGURATION_CLOCK_DIVISOR = 1; + CONFIGURATION_CLOCK_FREQUENCY = "10 MHZ"; + CLOCK_SOURCE = INTERNAL; + COMPRESSION_MODE = OFF; + ON_CHIP_BITSTREAM_DECOMPRESSION = OFF; +} +AUTO_SLD_HUB_ENTITY +{ + AUTO_INSERT_SLD_HUB_ENTITY = ENABLE; + HUB_INSTANCE_NAME = SLD_HUB_INST; + HUB_ENTITY_NAME = SLD_HUB; +} +SIGNALTAP_LOGIC_ANALYZER_SETTINGS +{ + ENABLE_SIGNALTAP = Off; + AUTO_ENABLE_SMART_COMPILE = On; +} +CHIP(usrp_std) +{ + DEVICE = EP1C12Q240C8; + DEVICE_FILTER_PACKAGE = "ANY QFP"; + DEVICE_FILTER_PIN_COUNT = 240; + DEVICE_FILTER_SPEED_GRADE = ANY; + AUTO_RESTART_CONFIGURATION = OFF; + RELEASE_CLEARS_BEFORE_TRI_STATES = OFF; + USER_START_UP_CLOCK = OFF; + ENABLE_DEVICE_WIDE_RESET = OFF; + ENABLE_DEVICE_WIDE_OE = OFF; + ENABLE_INIT_DONE_OUTPUT = OFF; + FLEX10K_ENABLE_LOCK_OUTPUT = OFF; + ENABLE_JTAG_BST_SUPPORT = OFF; + MAX7000_ENABLE_JTAG_BST_SUPPORT = ON; + APEX20K_JTAG_USER_CODE = FFFFFFFF; + MERCURY_JTAG_USER_CODE = FFFFFFFF; + FLEX10K_JTAG_USER_CODE = 7F; + MAX7000_JTAG_USER_CODE = FFFFFFFF; + MAX7000S_JTAG_USER_CODE = FFFF; + STRATIX_JTAG_USER_CODE = FFFFFFFF; + APEX20K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + MERCURY_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + FLEX6K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + FLEX10K_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + EXCALIBUR_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + APEXII_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + STRATIX_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + CYCLONE_CONFIGURATION_SCHEME = "PASSIVE SERIAL"; + USE_CONFIGURATION_DEVICE = OFF; + APEX20K_CONFIGURATION_DEVICE = AUTO; + MERCURY_CONFIGURATION_DEVICE = AUTO; + FLEX6K_CONFIGURATION_DEVICE = AUTO; + FLEX10K_CONFIGURATION_DEVICE = AUTO; + EXCALIBUR_CONFIGURATION_DEVICE = AUTO; + STRATIX_CONFIGURATION_DEVICE = AUTO; + CYCLONE_CONFIGURATION_DEVICE = AUTO; + STRATIX_UPDATE_MODE = STANDARD; + APEX20K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + MERCURY_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + FLEX10K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + STRATIX_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF; + AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE = ON; + DISABLE_NCS_AND_OE_PULLUPS_ON_CONFIG_DEVICE = OFF; + COMPRESSION_MODE = OFF; + ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON; + FLEX6K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = OFF; + FLEX10K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON; + EPROM_USE_CHECKSUM_AS_USERCODE = OFF; + USE_CHECKSUM_AS_USERCODE = OFF; + MAX7000_USE_CHECKSUM_AS_USERCODE = OFF; + GENERATE_TTF_FILE = OFF; + GENERATE_RBF_FILE = ON; + GENERATE_HEX_FILE = OFF; + SECURITY_BIT = OFF; + ENABLE_VREFA_PIN = OFF; + ENABLE_VREFB_PIN = OFF; + GENERATE_SVF_FILE = OFF; + GENERATE_ISC_FILE = OFF; + GENERATE_JAM_FILE = OFF; + GENERATE_JBC_FILE = OFF; + GENERATE_JBC_FILE_COMPRESSED = ON; + GENERATE_CONFIG_SVF_FILE = OFF; + GENERATE_CONFIG_ISC_FILE = OFF; + GENERATE_CONFIG_JAM_FILE = OFF; + GENERATE_CONFIG_JBC_FILE = OFF; + GENERATE_CONFIG_JBC_FILE_COMPRESSED = ON; + GENERATE_CONFIG_HEXOUT_FILE = OFF; + ON_CHIP_BITSTREAM_DECOMPRESSION = OFF; + BASE_PIN_OUT_FILE_ON_SAMEFRAME_DEVICE = OFF; + HEXOUT_FILE_START_ADDRESS = 0; + HEXOUT_FILE_COUNT_DIRECTION = UP; + RESERVE_ALL_UNUSED_PINS = "AS INPUT TRI-STATED"; + STRATIX_DEVICE_IO_STANDARD = LVTTL; + CLOCK_SOURCE = INTERNAL; + CONFIGURATION_CLOCK_FREQUENCY = "10 MHZ"; + CONFIGURATION_CLOCK_DIVISOR = 1; + RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_RDYNBUSY_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_DATA0_AFTER_CONFIGURATION = "AS INPUT TRI-STATED"; + RESERVE_NCEO_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + RESERVE_ASDO_AFTER_CONFIGURATION = "USE AS REGULAR IO"; + SCLK : LOCATION = Pin_101; + SDI : LOCATION = Pin_100; + SEN : LOCATION = Pin_98; + SLD : LOCATION = Pin_95; + adc1_data[0] : LOCATION = Pin_5; + adc1_data[10] : LOCATION = Pin_235; + adc1_data[11] : LOCATION = Pin_234; + adc1_data[1] : LOCATION = Pin_4; + adc1_data[2] : LOCATION = Pin_3; + adc1_data[3] : LOCATION = Pin_2; + adc1_data[4] : LOCATION = Pin_1; + adc1_data[4] : IO_STANDARD = LVTTL; + adc1_data[5] : LOCATION = Pin_240; + adc1_data[6] : LOCATION = Pin_239; + adc1_data[7] : LOCATION = Pin_238; + adc1_data[8] : LOCATION = Pin_237; + adc1_data[9] : LOCATION = Pin_236; + adc2_data[0] : LOCATION = Pin_20; + adc2_data[10] : LOCATION = Pin_8; + adc2_data[11] : LOCATION = Pin_7; + adc2_data[1] : LOCATION = Pin_19; + adc2_data[2] : LOCATION = Pin_18; + adc2_data[3] : LOCATION = Pin_17; + adc2_data[4] : LOCATION = Pin_16; + adc2_data[5] : LOCATION = Pin_15; + adc2_data[6] : LOCATION = Pin_14; + adc2_data[7] : LOCATION = Pin_13; + adc2_data[8] : LOCATION = Pin_12; + adc2_data[9] : LOCATION = Pin_11; + adc3_data[0] : LOCATION = Pin_200; + adc3_data[10] : LOCATION = Pin_184; + adc3_data[11] : LOCATION = Pin_183; + adc3_data[1] : LOCATION = Pin_197; + adc3_data[2] : LOCATION = Pin_196; + adc3_data[3] : LOCATION = Pin_195; + adc3_data[4] : LOCATION = Pin_194; + adc3_data[5] : LOCATION = Pin_193; + adc3_data[6] : LOCATION = Pin_188; + adc3_data[7] : LOCATION = Pin_187; + adc3_data[8] : LOCATION = Pin_186; + adc3_data[9] : LOCATION = Pin_185; + adc4_data[0] : LOCATION = Pin_222; + adc4_data[10] : LOCATION = Pin_203; + adc4_data[11] : LOCATION = Pin_202; + adc4_data[1] : LOCATION = Pin_219; + adc4_data[2] : LOCATION = Pin_217; + adc4_data[3] : LOCATION = Pin_216; + adc4_data[4] : LOCATION = Pin_215; + adc4_data[5] : LOCATION = Pin_214; + adc4_data[6] : LOCATION = Pin_213; + adc4_data[7] : LOCATION = Pin_208; + adc4_data[8] : LOCATION = Pin_207; + adc4_data[9] : LOCATION = Pin_206; + adc_oeb[0] : LOCATION = Pin_228; + adc_oeb[1] : LOCATION = Pin_21; + adc_oeb[2] : LOCATION = Pin_181; + adc_oeb[3] : LOCATION = Pin_218; + adc_otr[0] : LOCATION = Pin_233; + adc_otr[1] : LOCATION = Pin_6; + adc_otr[2] : LOCATION = Pin_182; + adc_otr[3] : LOCATION = Pin_201; + adclk0 : LOCATION = Pin_224; + adclk1 : LOCATION = Pin_226; + clk0 : LOCATION = Pin_28; + clk0 : RESERVE_PIN = "AS INPUT TRI-STATED"; + clk0 : IO_STANDARD = LVTTL; + clk1 : LOCATION = Pin_29; + clk1 : RESERVE_PIN = "AS INPUT TRI-STATED"; + clk1 : IO_STANDARD = LVTTL; + clk3 : LOCATION = Pin_152; + clk3 : RESERVE_PIN = "AS INPUT TRI-STATED"; + clk3 : IO_STANDARD = LVTTL; + clk_120mhz : LOCATION = Pin_153; + clk_120mhz : IO_STANDARD = LVTTL; + clk_out : LOCATION = Pin_63; + clk_out : IO_STANDARD = LVTTL; + dac1_data[0] : LOCATION = Pin_165; + dac1_data[10] : LOCATION = Pin_177; + dac1_data[11] : LOCATION = Pin_178; + dac1_data[12] : LOCATION = Pin_179; + dac1_data[13] : LOCATION = Pin_180; + dac1_data[1] : LOCATION = Pin_166; + dac1_data[2] : LOCATION = Pin_167; + dac1_data[3] : LOCATION = Pin_168; + dac1_data[4] : LOCATION = Pin_169; + dac1_data[5] : LOCATION = Pin_170; + dac1_data[6] : LOCATION = Pin_173; + dac1_data[7] : LOCATION = Pin_174; + dac1_data[8] : LOCATION = Pin_175; + dac1_data[9] : LOCATION = Pin_176; + dac2_data[0] : LOCATION = Pin_159; + dac2_data[10] : LOCATION = Pin_163; + dac2_data[11] : LOCATION = Pin_139; + dac2_data[12] : LOCATION = Pin_164; + dac2_data[13] : LOCATION = Pin_138; + dac2_data[1] : LOCATION = Pin_158; + dac2_data[2] : LOCATION = Pin_160; + dac2_data[3] : LOCATION = Pin_156; + dac2_data[4] : LOCATION = Pin_161; + dac2_data[5] : LOCATION = Pin_144; + dac2_data[6] : LOCATION = Pin_162; + dac2_data[7] : LOCATION = Pin_141; + dac2_data[8] : LOCATION = Pin_143; + dac2_data[9] : LOCATION = Pin_140; + dac3_data[0] : LOCATION = Pin_122; + dac3_data[10] : LOCATION = Pin_134; + dac3_data[11] : LOCATION = Pin_135; + dac3_data[12] : LOCATION = Pin_136; + dac3_data[13] : LOCATION = Pin_137; + dac3_data[1] : LOCATION = Pin_123; + dac3_data[2] : LOCATION = Pin_124; + dac3_data[3] : LOCATION = Pin_125; + dac3_data[4] : LOCATION = Pin_126; + dac3_data[5] : LOCATION = Pin_127; + dac3_data[6] : LOCATION = Pin_128; + dac3_data[7] : LOCATION = Pin_131; + dac3_data[8] : LOCATION = Pin_132; + dac3_data[9] : LOCATION = Pin_133; + dac4_data[0] : LOCATION = Pin_104; + dac4_data[10] : LOCATION = Pin_118; + dac4_data[11] : LOCATION = Pin_119; + dac4_data[12] : LOCATION = Pin_120; + dac4_data[13] : LOCATION = Pin_121; + dac4_data[1] : LOCATION = Pin_105; + dac4_data[2] : LOCATION = Pin_106; + dac4_data[3] : LOCATION = Pin_107; + dac4_data[4] : LOCATION = Pin_108; + dac4_data[5] : LOCATION = Pin_113; + dac4_data[6] : LOCATION = Pin_114; + dac4_data[7] : LOCATION = Pin_115; + dac4_data[8] : LOCATION = Pin_116; + dac4_data[9] : LOCATION = Pin_117; + enable_rx : LOCATION = Pin_88; + enable_tx : LOCATION = Pin_93; + gndbus[0] : LOCATION = Pin_223; + gndbus[0] : RESERVE_PIN = "AS INPUT TRI-STATED"; + gndbus[0] : IO_STANDARD = LVTTL; + gndbus[1] : LOCATION = Pin_225; + gndbus[1] : RESERVE_PIN = "AS INPUT TRI-STATED"; + gndbus[1] : IO_STANDARD = LVTTL; + gndbus[2] : LOCATION = Pin_227; + gndbus[2] : RESERVE_PIN = "AS INPUT TRI-STATED"; + gndbus[2] : IO_STANDARD = LVTTL; + gndbus[3] : LOCATION = Pin_62; + gndbus[3] : RESERVE_PIN = "AS INPUT TRI-STATED"; + gndbus[3] : IO_STANDARD = LVTTL; + gndbus[4] : LOCATION = Pin_64; + gndbus[4] : RESERVE_PIN = "AS INPUT TRI-STATED"; + gndbus[4] : IO_STANDARD = LVTTL; + misc_pins[0] : LOCATION = Pin_87; + misc_pins[0] : IO_STANDARD = LVTTL; + misc_pins[10] : LOCATION = Pin_76; + misc_pins[10] : IO_STANDARD = LVTTL; + misc_pins[11] : LOCATION = Pin_74; + misc_pins[11] : IO_STANDARD = LVTTL; + misc_pins[1] : LOCATION = Pin_86; + misc_pins[1] : IO_STANDARD = LVTTL; + misc_pins[2] : LOCATION = Pin_85; + misc_pins[2] : IO_STANDARD = LVTTL; + misc_pins[3] : LOCATION = Pin_84; + misc_pins[3] : IO_STANDARD = LVTTL; + misc_pins[4] : LOCATION = Pin_83; + misc_pins[4] : IO_STANDARD = LVTTL; + misc_pins[5] : LOCATION = Pin_82; + misc_pins[5] : IO_STANDARD = LVTTL; + misc_pins[6] : LOCATION = Pin_79; + misc_pins[6] : IO_STANDARD = LVTTL; + misc_pins[7] : LOCATION = Pin_78; + misc_pins[7] : IO_STANDARD = LVTTL; + misc_pins[8] : LOCATION = Pin_77; + misc_pins[8] : IO_STANDARD = LVTTL; + misc_pins[9] : LOCATION = Pin_75; + misc_pins[9] : IO_STANDARD = LVTTL; + reset : LOCATION = Pin_94; + usbclk : LOCATION = Pin_55; + usbctl[0] : LOCATION = Pin_56; + usbctl[1] : LOCATION = Pin_54; + usbctl[2] : LOCATION = Pin_53; + usbctl[3] : LOCATION = Pin_58; + usbctl[4] : LOCATION = Pin_57; + usbctl[5] : LOCATION = Pin_44; + usbdata[0] : LOCATION = Pin_73; + usbdata[10] : LOCATION = Pin_41; + usbdata[11] : LOCATION = Pin_39; + usbdata[12] : LOCATION = Pin_38; + usbdata[12] : IO_STANDARD = LVTTL; + usbdata[13] : LOCATION = Pin_37; + usbdata[14] : LOCATION = Pin_24; + usbdata[15] : LOCATION = Pin_23; + usbdata[1] : LOCATION = Pin_68; + usbdata[2] : LOCATION = Pin_67; + usbdata[3] : LOCATION = Pin_66; + usbdata[4] : LOCATION = Pin_65; + usbdata[5] : LOCATION = Pin_61; + usbdata[6] : LOCATION = Pin_60; + usbdata[7] : LOCATION = Pin_59; + usbdata[8] : LOCATION = Pin_43; + usbdata[9] : LOCATION = Pin_42; + usbrdy[0] : LOCATION = Pin_45; + usbrdy[1] : LOCATION = Pin_46; + usbrdy[2] : LOCATION = Pin_47; + usbrdy[3] : LOCATION = Pin_48; + usbrdy[4] : LOCATION = Pin_49; + usbrdy[5] : LOCATION = Pin_50; + clear_status : LOCATION = Pin_99; +} diff --git a/fpga/toplevel/usrp_std/usrp_std.esf b/fpga/toplevel/usrp_std/usrp_std.esf new file mode 100644 index 0000000..b88c159 --- /dev/null +++ b/fpga/toplevel/usrp_std/usrp_std.esf @@ -0,0 +1,14 @@ +SIMULATOR_SETTINGS +{ + ESTIMATE_POWER_CONSUMPTION = OFF; + GLITCH_INTERVAL = 1NS; + GLITCH_DETECTION = OFF; + SIMULATION_COVERAGE = ON; + CHECK_OUTPUTS = OFF; + SETUP_HOLD_DETECTION = OFF; + POWER_ESTIMATION_START_TIME = "0 NS"; + ADD_DEFAULT_PINS_TO_SIMULATION_OUTPUT_WAVEFORMS = ON; + SIMULATION_MODE = TIMING; + START_TIME = 0NS; + USE_COMPILER_SETTINGS = usrp_std; +} diff --git a/fpga/toplevel/usrp_std/usrp_std.psf b/fpga/toplevel/usrp_std/usrp_std.psf new file mode 100644 index 0000000..506c81b --- /dev/null +++ b/fpga/toplevel/usrp_std/usrp_std.psf @@ -0,0 +1,312 @@ +DEFAULT_DESIGN_ASSISTANT_SETTINGS +{ + HCPY_ALOAD_SIGNALS = OFF; + HCPY_VREF_PINS = OFF; + HCPY_CAT = OFF; + HCPY_ILLEGAL_HC_DEV_PKG = OFF; + ACLK_RULE_IMSZER_ADOMAIN = OFF; + ACLK_RULE_SZER_BTW_ACLK_DOMAIN = OFF; + ACLK_RULE_NO_SZER_ACLK_DOMAIN = OFF; + ACLK_CAT = OFF; + SIGNALRACE_RULE_ASYNCHPIN_SYNCH_CLKPIN = OFF; + SIGNALRACE_CAT = OFF; + NONSYNCHSTRUCT_RULE_LATCH_UNIDENTIFIED = OFF; + NONSYNCHSTRUCT_RULE_SRLATCH = OFF; + NONSYNCHSTRUCT_RULE_DLATCH = OFF; + NONSYNCHSTRUCT_RULE_MULTI_VIBRATOR = OFF; + NONSYNCHSTRUCT_RULE_ILLEGAL_PULSE_GEN = OFF; + NONSYNCHSTRUCT_RULE_RIPPLE_CLK = OFF; + NONSYNCHSTRUCT_RULE_DELAY_CHAIN = OFF; + NONSYNCHSTRUCT_RULE_REG_LOOP = OFF; + NONSYNCHSTRUCT_RULE_COMBLOOP = OFF; + NONSYNCHSTRUCT_CAT = OFF; + NONSYNCHSTRUCT_RULE_COMB_DRIVES_RAM_WE = OFF; + TIMING_RULE_COIN_CLKEDGE = OFF; + TIMING_RULE_SHIFT_REG = OFF; + TIMING_RULE_HIGH_FANOUTS = OFF; + TIMING_CAT = OFF; + RESET_RULE_ALL = OFF; + RESET_RULE_IMSYNCH_ASYNCH_DOMAIN = OFF; + RESET_RULE_UNSYNCH_ASYNCH_DOMAIN = OFF; + RESET_RULE_REG_ASNYCH = OFF; + RESET_RULE_COMB_ASYNCH_RESET = OFF; + RESET_RULE_IMSYNCH_EXRESET = OFF; + RESET_RULE_UNSYNCH_EXRESET = OFF; + RESET_RULE_INPINS_RESETNET = OFF; + RESET_CAT = OFF; + CLK_RULE_ALL = OFF; + CLK_RULE_MIX_EDGES = OFF; + CLK_RULE_CLKNET_CLKSPINES = OFF; + CLK_RULE_INPINS_CLKNET = OFF; + CLK_RULE_GATING_SCHEME = OFF; + CLK_RULE_INV_CLOCK = OFF; + CLK_RULE_COMB_CLOCK = OFF; + CLK_CAT = OFF; + HCPY_EXCEED_USER_IO_USAGE = OFF; + HCPY_EXCEED_RAM_USAGE = OFF; + NONSYNCHSTRUCT_RULE_ASYN_RAM = OFF; + SIGNALRACE_RULE_TRISTATE = OFF; + ASSG_RULE_MISSING_TIMING = OFF; + ASSG_RULE_MISSING_FMAX = OFF; + ASSG_CAT = OFF; +} +SYNTHESIS_FITTING_SETTINGS +{ + AUTO_SHIFT_REGISTER_RECOGNITION = ON; + AUTO_DSP_RECOGNITION = ON; + AUTO_RAM_RECOGNITION = ON; + REMOVE_DUPLICATE_LOGIC = ON; + AUTO_TURBO_BIT = ON; + AUTO_MERGE_PLLS = ON; + AUTO_OPEN_DRAIN_PINS = ON; + AUTO_PARALLEL_EXPANDERS = ON; + AUTO_FAST_OUTPUT_ENABLE_REGISTERS = OFF; + AUTO_FAST_OUTPUT_REGISTERS = OFF; + AUTO_FAST_INPUT_REGISTERS = OFF; + AUTO_CASCADE_CHAINS = ON; + AUTO_CARRY_CHAINS = ON; + AUTO_DELAY_CHAINS = ON; + MAX7000_PARALLEL_EXPANDER_CHAIN_LENGTH = 4; + PARALLEL_EXPANDER_CHAIN_LENGTH = 16; + CASCADE_CHAIN_LENGTH = 2; + STRATIX_CARRY_CHAIN_LENGTH = 70; + MERCURY_CARRY_CHAIN_LENGTH = 48; + FLEX10K_CARRY_CHAIN_LENGTH = 32; + FLEX6K_CARRY_CHAIN_LENGTH = 32; + CARRY_CHAIN_LENGTH = 48; + CARRY_OUT_PINS_LCELL_INSERT = ON; + NORMAL_LCELL_INSERT = ON; + AUTO_LCELL_INSERTION = ON; + ALLOW_XOR_GATE_USAGE = ON; + AUTO_PACKED_REGISTERS_STRATIX = NORMAL; + AUTO_PACKED_REGISTERS = OFF; + AUTO_PACKED_REG_CYCLONE = NORMAL; + FLEX10K_OPTIMIZATION_TECHNIQUE = AREA; + FLEX6K_OPTIMIZATION_TECHNIQUE = AREA; + MERCURY_OPTIMIZATION_TECHNIQUE = AREA; + APEX20K_OPTIMIZATION_TECHNIQUE = SPEED; + MAX7000_OPTIMIZATION_TECHNIQUE = SPEED; + STRATIX_OPTIMIZATION_TECHNIQUE = SPEED; + CYCLONE_OPTIMIZATION_TECHNIQUE = AREA; + FLEX10K_TECHNOLOGY_MAPPER = LUT; + FLEX6K_TECHNOLOGY_MAPPER = LUT; + MERCURY_TECHNOLOGY_MAPPER = LUT; + APEX20K_TECHNOLOGY_MAPPER = LUT; + MAX7000_TECHNOLOGY_MAPPER = "PRODUCT TERM"; + STRATIX_TECHNOLOGY_MAPPER = LUT; + AUTO_IMPLEMENT_IN_ROM = OFF; + AUTO_GLOBAL_MEMORY_CONTROLS = OFF; + AUTO_GLOBAL_REGISTER_CONTROLS = ON; + AUTO_GLOBAL_OE = ON; + AUTO_GLOBAL_CLOCK = ON; + USE_LPM_FOR_AHDL_OPERATORS = ON; + LIMIT_AHDL_INTEGERS_TO_32_BITS = OFF; + ENABLE_BUS_HOLD_CIRCUITRY = OFF; + WEAK_PULL_UP_RESISTOR = OFF; + TURBO_BIT = ON; + MAX7000_IGNORE_SOFT_BUFFERS = OFF; + IGNORE_SOFT_BUFFERS = ON; + MAX7000_IGNORE_LCELL_BUFFERS = AUTO; + IGNORE_LCELL_BUFFERS = OFF; + IGNORE_ROW_GLOBAL_BUFFERS = OFF; + IGNORE_GLOBAL_BUFFERS = OFF; + IGNORE_CASCADE_BUFFERS = OFF; + IGNORE_CARRY_BUFFERS = OFF; + REMOVE_DUPLICATE_REGISTERS = ON; + REMOVE_REDUNDANT_LOGIC_CELLS = OFF; + ALLOW_POWER_UP_DONT_CARE = ON; + PCI_IO = OFF; + NOT_GATE_PUSH_BACK = ON; + SLOW_SLEW_RATE = OFF; + DSP_BLOCK_BALANCING = AUTO; + STATE_MACHINE_PROCESSING = AUTO; +} +DEFAULT_HARDCOPY_SETTINGS +{ + HARDCOPY_EXTERNAL_CLOCK_JITTER = "0.0 NS"; +} +DEFAULT_TIMING_REQUIREMENTS +{ + INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; + RUN_ALL_TIMING_ANALYSES = ON; + IGNORE_CLOCK_SETTINGS = OFF; + DEFAULT_HOLD_MULTICYCLE = "SAME AS MULTICYCLE"; + CUT_OFF_IO_PIN_FEEDBACK = ON; + CUT_OFF_CLEAR_AND_PRESET_PATHS = ON; + CUT_OFF_READ_DURING_WRITE_PATHS = ON; + CUT_OFF_PATHS_BETWEEN_CLOCK_DOMAINS = ON; + DO_MIN_ANALYSIS = ON; + DO_MIN_TIMING = OFF; + NUMBER_OF_PATHS_TO_REPORT = 200; + NUMBER_OF_DESTINATION_TO_REPORT = 10; + NUMBER_OF_SOURCES_PER_DESTINATION_TO_REPORT = 10; + MAX_SCC_SIZE = 50; +} +HDL_SETTINGS +{ + VERILOG_INPUT_VERSION = VERILOG_2001; + ENABLE_IP_DEBUG = OFF; + VHDL_INPUT_VERSION = VHDL93; + VHDL_SHOW_LMF_MAPPING_MESSAGES = OFF; +} +PROJECT_INFO(usrp_std) +{ + ORIGINAL_QUARTUS_VERSION = 3.0; + PROJECT_CREATION_TIME_DATE = "00:14:04 JULY 13, 2003"; + LAST_QUARTUS_VERSION = 3.0; + SHOW_REGISTRATION_MESSAGE = ON; + USER_LIBRARIES = "e:\usrp\fpga\megacells"; +} +THIRD_PARTY_EDA_TOOLS(usrp_std) +{ + EDA_DESIGN_ENTRY_SYNTHESIS_TOOL = ""; + EDA_SIMULATION_TOOL = ""; + EDA_TIMING_ANALYSIS_TOOL = ""; + EDA_BOARD_DESIGN_TOOL = ""; + EDA_FORMAL_VERIFICATION_TOOL = ""; + EDA_RESYNTHESIS_TOOL = ""; +} +EDA_TOOL_SETTINGS(eda_design_synthesis) +{ + EDA_INPUT_GND_NAME = GND; + EDA_INPUT_VCC_NAME = VCC; + EDA_SHOW_LMF_MAPPING_MESSAGES = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_INPUT_DATA_FORMAT = EDIF; + EDA_OUTPUT_DATA_FORMAT = NONE; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + RESYNTHESIS_RETIMING = FULL; +} +EDA_TOOL_SETTINGS(eda_simulation) +{ + EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; + EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; + EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; + EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; + EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; + EDA_FLATTEN_BUSES = OFF; + EDA_MAP_ILLEGAL_CHARACTERS = OFF; + EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_OUTPUT_DATA_FORMAT = NONE; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + RESYNTHESIS_RETIMING = FULL; +} +EDA_TOOL_SETTINGS(eda_timing_analysis) +{ + EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; + EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; + EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; + EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; + EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; + EDA_FLATTEN_BUSES = OFF; + EDA_MAP_ILLEGAL_CHARACTERS = OFF; + EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_OUTPUT_DATA_FORMAT = NONE; + EDA_LAUNCH_CMD_LINE_TOOL = OFF; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + RESYNTHESIS_RETIMING = FULL; +} +EDA_TOOL_SETTINGS(eda_board_design) +{ + EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; + EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; + EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; + EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; + EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; + EDA_FLATTEN_BUSES = OFF; + EDA_MAP_ILLEGAL_CHARACTERS = OFF; + EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_OUTPUT_DATA_FORMAT = NONE; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + RESYNTHESIS_RETIMING = FULL; +} +EDA_TOOL_SETTINGS(eda_formal_verification) +{ + EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; + EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; + EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; + EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; + EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; + EDA_FLATTEN_BUSES = OFF; + EDA_MAP_ILLEGAL_CHARACTERS = OFF; + EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_OUTPUT_DATA_FORMAT = NONE; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + RESYNTHESIS_RETIMING = FULL; +} +EDA_TOOL_SETTINGS(eda_palace) +{ + EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION = OFF; + EDA_TRUNCATE_LONG_HIERARCHY_PATHS = OFF; + EDA_MAINTAIN_DESIGN_HIERARCHY = OFF; + EDA_WRITE_DEVICE_CONTROL_PORTS = OFF; + EDA_GENERATE_FUNCTIONAL_NETLIST = OFF; + EDA_FLATTEN_BUSES = OFF; + EDA_MAP_ILLEGAL_CHARACTERS = OFF; + EDA_EXCALIBUR_ATOMS_AS_SINGLE_STRIPE = OFF; + EDA_RUN_TOOL_AUTOMATICALLY = OFF; + EDA_OUTPUT_DATA_FORMAT = NONE; + RESYNTHESIS_RETIMING = FULL; + RESYNTHESIS_PHYSICAL_SYNTHESIS = NORMAL; + RESYNTHESIS_OPTIMIZATION_EFFORT = NORMAL; + USE_GENERATED_PHYSICAL_CONSTRAINTS = ON; +} +CLOCK(clk_120mhz) +{ + FMAX_REQUIREMENT = "120.0 MHz"; + INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; + DUTY_CYCLE = 50; + DIVIDE_BASE_CLOCK_PERIOD_BY = 1; + MULTIPLY_BASE_CLOCK_PERIOD_BY = 1; + INVERT_BASE_CLOCK = OFF; +} +CLOCK(usbclk) +{ + FMAX_REQUIREMENT = "48.0 MHz"; + INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; + DUTY_CYCLE = 50; + DIVIDE_BASE_CLOCK_PERIOD_BY = 1; + MULTIPLY_BASE_CLOCK_PERIOD_BY = 1; + INVERT_BASE_CLOCK = OFF; +} +CLOCK(SCLK) +{ + FMAX_REQUIREMENT = "1.0 MHz"; + INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; + DUTY_CYCLE = 50; + DIVIDE_BASE_CLOCK_PERIOD_BY = 1; + MULTIPLY_BASE_CLOCK_PERIOD_BY = 1; + INVERT_BASE_CLOCK = OFF; +} +CLOCK(adclk0) +{ + FMAX_REQUIREMENT = "60.0 MHz"; + INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; + DUTY_CYCLE = 50; + DIVIDE_BASE_CLOCK_PERIOD_BY = 1; + MULTIPLY_BASE_CLOCK_PERIOD_BY = 1; + INVERT_BASE_CLOCK = OFF; +} +CLOCK(adclk1) +{ + FMAX_REQUIREMENT = "60.0 MHz"; + INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS = OFF; + DUTY_CYCLE = 50; + DIVIDE_BASE_CLOCK_PERIOD_BY = 1; + MULTIPLY_BASE_CLOCK_PERIOD_BY = 1; + INVERT_BASE_CLOCK = OFF; +} diff --git a/fpga/toplevel/usrp_std/usrp_std.qpf b/fpga/toplevel/usrp_std/usrp_std.qpf new file mode 100644 index 0000000..e8b2750 --- /dev/null +++ b/fpga/toplevel/usrp_std/usrp_std.qpf @@ -0,0 +1,29 @@ +# Copyright (C) 1991-2004 Altera Corporation +# Any megafunction design, and related netlist (encrypted or decrypted), +# support information, device programming or simulation file, and any other +# associated documentation or information provided by Altera or a partner +# under Altera's Megafunction Partnership Program may be used only +# to program PLD devices (but not masked PLD devices) from Altera. Any +# other use of such megafunction design, netlist, support information, +# device programming or simulation file, or any other related documentation +# or information is prohibited for any other purpose, including, but not +# limited to modification, reverse engineering, de-compiling, or use with +# any other silicon devices, unless such use is explicitly licensed under +# a separate agreement with Altera or a megafunction partner. Title to the +# intellectual property, including patents, copyrights, trademarks, trade +# secrets, or maskworks, embodied in any such megafunction design, netlist, +# support information, device programming or simulation file, or any other +# related documentation or information provided by Altera or a megafunction +# partner, remains with Altera, the megafunction partner, or their respective +# licensors. No other licenses, including any licenses needed under any third +# party's intellectual property, are provided herein. + + + +QUARTUS_VERSION = "4.0" +DATE = "17:10:11 December 20, 2004" + + +# Active Revisions + +PROJECT_REVISION = "usrp_std" diff --git a/fpga/toplevel/usrp_std/usrp_std.qsf b/fpga/toplevel/usrp_std/usrp_std.qsf new file mode 100644 index 0000000..51d7e1e --- /dev/null +++ b/fpga/toplevel/usrp_std/usrp_std.qsf @@ -0,0 +1,406 @@ +# Copyright (C) 1991-2005 Altera Corporation +# Your use of Altera Corporation's design tools, logic functions +# and other software and tools, and its AMPP partner logic +# functions, and any output files any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Altera Program License +# Subscription Agreement, Altera MegaCore Function License +# Agreement, or other applicable license agreement, including, +# without limitation, that your use is for the sole purpose of +# programming logic devices manufactured by Altera and sold by +# Altera or its authorized distributors. Please refer to the +# applicable agreement for further details. + + +# The default values for assignments are stored in the file +# usrp_std_assignment_defaults.qdf +# If this file doesn't exist, and for assignments not listed, see file +# assignment_defaults.qdf + +# Altera recommends that you do not modify this file. This +# file is updated automatically by the Quartus II software +# and any changes you make may be lost or overwritten. + + +# Project-Wide Assignments +# ======================== +set_global_assignment -name ORIGINAL_QUARTUS_VERSION 3.0 +set_global_assignment -name PROJECT_CREATION_TIME_DATE "00:14:04 JULY 13, 2003" +set_global_assignment -name LAST_QUARTUS_VERSION "5.1 SP2" + +# Pin & Location Assignments +# ========================== +set_global_assignment -name RESERVE_PIN "AS INPUT TRI-STATED" +set_location_assignment PIN_29 -to SCLK +set_location_assignment PIN_117 -to SDI +set_location_assignment PIN_28 -to usbclk +set_location_assignment PIN_107 -to usbctl[0] +set_location_assignment PIN_106 -to usbctl[1] +set_location_assignment PIN_105 -to usbctl[2] +set_location_assignment PIN_100 -to usbdata[0] +set_location_assignment PIN_84 -to usbdata[10] +set_location_assignment PIN_83 -to usbdata[11] +set_location_assignment PIN_82 -to usbdata[12] +set_location_assignment PIN_79 -to usbdata[13] +set_location_assignment PIN_78 -to usbdata[14] +set_location_assignment PIN_77 -to usbdata[15] +set_location_assignment PIN_99 -to usbdata[1] +set_location_assignment PIN_98 -to usbdata[2] +set_location_assignment PIN_95 -to usbdata[3] +set_location_assignment PIN_94 -to usbdata[4] +set_location_assignment PIN_93 -to usbdata[5] +set_location_assignment PIN_88 -to usbdata[6] +set_location_assignment PIN_87 -to usbdata[7] +set_location_assignment PIN_86 -to usbdata[8] +set_location_assignment PIN_85 -to usbdata[9] +set_location_assignment PIN_104 -to usbrdy[0] +set_location_assignment PIN_101 -to usbrdy[1] +set_location_assignment PIN_76 -to FX2_1 +set_location_assignment PIN_75 -to FX2_2 +set_location_assignment PIN_74 -to FX2_3 +set_location_assignment PIN_116 -to io_rx_a[0] +set_location_assignment PIN_115 -to io_rx_a[1] +set_location_assignment PIN_114 -to io_rx_a[2] +set_location_assignment PIN_113 -to io_rx_a[3] +set_location_assignment PIN_108 -to io_rx_a[4] +set_location_assignment PIN_195 -to io_rx_a[5] +set_location_assignment PIN_196 -to io_rx_a[6] +set_location_assignment PIN_197 -to io_rx_a[7] +set_location_assignment PIN_200 -to io_rx_a[8] +set_location_assignment PIN_201 -to io_rx_a[9] +set_location_assignment PIN_202 -to io_rx_a[10] +set_location_assignment PIN_203 -to io_rx_a[11] +set_location_assignment PIN_206 -to io_rx_a[12] +set_location_assignment PIN_207 -to io_rx_a[13] +set_location_assignment PIN_208 -to io_rx_a[14] +set_location_assignment PIN_214 -to io_rx_b[0] +set_location_assignment PIN_215 -to io_rx_b[1] +set_location_assignment PIN_216 -to io_rx_b[2] +set_location_assignment PIN_217 -to io_rx_b[3] +set_location_assignment PIN_218 -to io_rx_b[4] +set_location_assignment PIN_219 -to io_rx_b[5] +set_location_assignment PIN_222 -to io_rx_b[6] +set_location_assignment PIN_223 -to io_rx_b[7] +set_location_assignment PIN_224 -to io_rx_b[8] +set_location_assignment PIN_225 -to io_rx_b[9] +set_location_assignment PIN_226 -to io_rx_b[10] +set_location_assignment PIN_227 -to io_rx_b[11] +set_location_assignment PIN_228 -to io_rx_b[12] +set_location_assignment PIN_233 -to io_rx_b[13] +set_location_assignment PIN_234 -to io_rx_b[14] +set_location_assignment PIN_175 -to io_tx_a[0] +set_location_assignment PIN_176 -to io_tx_a[1] +set_location_assignment PIN_177 -to io_tx_a[2] +set_location_assignment PIN_178 -to io_tx_a[3] +set_location_assignment PIN_179 -to io_tx_a[4] +set_location_assignment PIN_180 -to io_tx_a[5] +set_location_assignment PIN_181 -to io_tx_a[6] +set_location_assignment PIN_182 -to io_tx_a[7] +set_location_assignment PIN_183 -to io_tx_a[8] +set_location_assignment PIN_184 -to io_tx_a[9] +set_location_assignment PIN_185 -to io_tx_a[10] +set_location_assignment PIN_186 -to io_tx_a[11] +set_location_assignment PIN_187 -to io_tx_a[12] +set_location_assignment PIN_188 -to io_tx_a[13] +set_location_assignment PIN_193 -to io_tx_a[14] +set_location_assignment PIN_73 -to io_tx_b[0] +set_location_assignment PIN_68 -to io_tx_b[1] +set_location_assignment PIN_67 -to io_tx_b[2] +set_location_assignment PIN_66 -to io_tx_b[3] +set_location_assignment PIN_65 -to io_tx_b[4] +set_location_assignment PIN_64 -to io_tx_b[5] +set_location_assignment PIN_63 -to io_tx_b[6] +set_location_assignment PIN_62 -to io_tx_b[7] +set_location_assignment PIN_61 -to io_tx_b[8] +set_location_assignment PIN_60 -to io_tx_b[9] +set_location_assignment PIN_59 -to io_tx_b[10] +set_location_assignment PIN_58 -to io_tx_b[11] +set_location_assignment PIN_57 -to io_tx_b[12] +set_location_assignment PIN_56 -to io_tx_b[13] +set_location_assignment PIN_55 -to io_tx_b[14] +set_location_assignment PIN_152 -to master_clk +set_location_assignment PIN_144 -to rx_a_a[0] +set_location_assignment PIN_143 -to rx_a_a[1] +set_location_assignment PIN_141 -to rx_a_a[2] +set_location_assignment PIN_140 -to rx_a_a[3] +set_location_assignment PIN_139 -to rx_a_a[4] +set_location_assignment PIN_138 -to rx_a_a[5] +set_location_assignment PIN_137 -to rx_a_a[6] +set_location_assignment PIN_136 -to rx_a_a[7] +set_location_assignment PIN_135 -to rx_a_a[8] +set_location_assignment PIN_134 -to rx_a_a[9] +set_location_assignment PIN_133 -to rx_a_a[10] +set_location_assignment PIN_132 -to rx_a_a[11] +set_location_assignment PIN_23 -to rx_a_b[0] +set_location_assignment PIN_21 -to rx_a_b[1] +set_location_assignment PIN_20 -to rx_a_b[2] +set_location_assignment PIN_19 -to rx_a_b[3] +set_location_assignment PIN_18 -to rx_a_b[4] +set_location_assignment PIN_17 -to rx_a_b[5] +set_location_assignment PIN_16 -to rx_a_b[6] +set_location_assignment PIN_15 -to rx_a_b[7] +set_location_assignment PIN_14 -to rx_a_b[8] +set_location_assignment PIN_13 -to rx_a_b[9] +set_location_assignment PIN_12 -to rx_a_b[10] +set_location_assignment PIN_11 -to rx_a_b[11] +set_location_assignment PIN_131 -to rx_b_a[0] +set_location_assignment PIN_128 -to rx_b_a[1] +set_location_assignment PIN_127 -to rx_b_a[2] +set_location_assignment PIN_126 -to rx_b_a[3] +set_location_assignment PIN_125 -to rx_b_a[4] +set_location_assignment PIN_124 -to rx_b_a[5] +set_location_assignment PIN_123 -to rx_b_a[6] +set_location_assignment PIN_122 -to rx_b_a[7] +set_location_assignment PIN_121 -to rx_b_a[8] +set_location_assignment PIN_120 -to rx_b_a[9] +set_location_assignment PIN_119 -to rx_b_a[10] +set_location_assignment PIN_118 -to rx_b_a[11] +set_location_assignment PIN_8 -to rx_b_b[0] +set_location_assignment PIN_7 -to rx_b_b[1] +set_location_assignment PIN_6 -to rx_b_b[2] +set_location_assignment PIN_5 -to rx_b_b[3] +set_location_assignment PIN_4 -to rx_b_b[4] +set_location_assignment PIN_3 -to rx_b_b[5] +set_location_assignment PIN_2 -to rx_b_b[6] +set_location_assignment PIN_240 -to rx_b_b[7] +set_location_assignment PIN_239 -to rx_b_b[8] +set_location_assignment PIN_238 -to rx_b_b[9] +set_location_assignment PIN_237 -to rx_b_b[10] +set_location_assignment PIN_236 -to rx_b_b[11] +set_location_assignment PIN_156 -to SDO +set_location_assignment PIN_153 -to SEN_FPGA +set_location_assignment PIN_159 -to tx_a[0] +set_location_assignment PIN_160 -to tx_a[1] +set_location_assignment PIN_161 -to tx_a[2] +set_location_assignment PIN_162 -to tx_a[3] +set_location_assignment PIN_163 -to tx_a[4] +set_location_assignment PIN_164 -to tx_a[5] +set_location_assignment PIN_165 -to tx_a[6] +set_location_assignment PIN_166 -to tx_a[7] +set_location_assignment PIN_167 -to tx_a[8] +set_location_assignment PIN_168 -to tx_a[9] +set_location_assignment PIN_169 -to tx_a[10] +set_location_assignment PIN_170 -to tx_a[11] +set_location_assignment PIN_173 -to tx_a[12] +set_location_assignment PIN_174 -to tx_a[13] +set_location_assignment PIN_38 -to tx_b[0] +set_location_assignment PIN_39 -to tx_b[1] +set_location_assignment PIN_41 -to tx_b[2] +set_location_assignment PIN_42 -to tx_b[3] +set_location_assignment PIN_43 -to tx_b[4] +set_location_assignment PIN_44 -to tx_b[5] +set_location_assignment PIN_45 -to tx_b[6] +set_location_assignment PIN_46 -to tx_b[7] +set_location_assignment PIN_47 -to tx_b[8] +set_location_assignment PIN_48 -to tx_b[9] +set_location_assignment PIN_49 -to tx_b[10] +set_location_assignment PIN_50 -to tx_b[11] +set_location_assignment PIN_53 -to tx_b[12] +set_location_assignment PIN_54 -to tx_b[13] +set_location_assignment PIN_158 -to TXSYNC_A +set_location_assignment PIN_37 -to TXSYNC_B +set_location_assignment PIN_235 -to io_rx_b[15] +set_location_assignment PIN_24 -to io_tx_b[15] +set_location_assignment PIN_213 -to io_rx_a[15] +set_location_assignment PIN_194 -to io_tx_a[15] +set_location_assignment PIN_1 -to MYSTERY_SIGNAL + +# Timing Assignments +# ================== +set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF + +# Analysis & Synthesis Assignments +# ================================ +set_global_assignment -name SAVE_DISK_SPACE OFF +set_global_assignment -name DEVICE_FILTER_PACKAGE "ANY QFP" +set_global_assignment -name DEVICE_FILTER_PIN_COUNT 240 +set_global_assignment -name EDA_DESIGN_ENTRY_SYNTHESIS_TOOL "" +set_global_assignment -name FAMILY Cyclone +set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE BALANCED +set_global_assignment -name STRATIX_OPTIMIZATION_TECHNIQUE SPEED +set_global_assignment -name APEX20K_OPTIMIZATION_TECHNIQUE SPEED +set_global_assignment -name TOP_LEVEL_ENTITY usrp_std +set_global_assignment -name VHDL_SHOW_LMF_MAPPING_MESSAGES OFF +set_global_assignment -name USER_LIBRARIES "e:\\usrp\\fpga\\megacells" +set_global_assignment -name AUTO_ENABLE_SMART_COMPILE On + +# Fitter Assignments +# ================== +set_global_assignment -name DEVICE EP1C12Q240C8 +set_global_assignment -name CYCLONE_CONFIGURATION_SCHEME "PASSIVE SERIAL" +set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED" +set_global_assignment -name OPTIMIZE_HOLD_TIMING OFF +set_global_assignment -name OPTIMIZE_TIMING "NORMAL COMPILATION" +set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC OFF +set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION OFF +set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING OFF +set_global_assignment -name IO_PLACEMENT_OPTIMIZATION OFF +set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL +set_global_assignment -name INC_PLC_MODE OFF +set_global_assignment -name ROUTING_BACK_ANNOTATION_MODE OFF +set_instance_assignment -name IO_STANDARD LVTTL -to usbdata[12] +set_global_assignment -name STRATIX_DEVICE_IO_STANDARD LVTTL +set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1 + +# Timing Analysis Assignments +# =========================== +set_global_assignment -name MAX_SCC_SIZE 50 + +# EDA Netlist Writer Assignments +# ============================== +set_global_assignment -name EDA_SIMULATION_TOOL "" +set_global_assignment -name EDA_TIMING_ANALYSIS_TOOL "" +set_global_assignment -name EDA_BOARD_DESIGN_TOOL "" +set_global_assignment -name EDA_FORMAL_VERIFICATION_TOOL "" +set_global_assignment -name EDA_RESYNTHESIS_TOOL "" + +# Assembler Assignments +# ===================== +set_global_assignment -name USE_CONFIGURATION_DEVICE OFF +set_global_assignment -name GENERATE_RBF_FILE ON +set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED" +set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF + +# Simulator Assignments +# ===================== +set_global_assignment -name START_TIME "0 ns" +set_global_assignment -name GLITCH_INTERVAL "1 ns" + +# Design Assistant Assignments +# ============================ +set_global_assignment -name DRC_REPORT_TOP_FANOUT OFF +set_global_assignment -name DRC_REPORT_FANOUT_EXCEEDING OFF +set_global_assignment -name ASSG_CAT OFF +set_global_assignment -name ASSG_RULE_MISSING_FMAX OFF +set_global_assignment -name ASSG_RULE_MISSING_TIMING OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_ASYN_RAM OFF +set_global_assignment -name CLK_CAT OFF +set_global_assignment -name CLK_RULE_COMB_CLOCK OFF +set_global_assignment -name CLK_RULE_INV_CLOCK OFF +set_global_assignment -name CLK_RULE_GATING_SCHEME OFF +set_global_assignment -name CLK_RULE_INPINS_CLKNET OFF +set_global_assignment -name CLK_RULE_CLKNET_CLKSPINES OFF +set_global_assignment -name CLK_RULE_MIX_EDGES OFF +set_global_assignment -name RESET_CAT OFF +set_global_assignment -name RESET_RULE_INPINS_RESETNET OFF +set_global_assignment -name RESET_RULE_UNSYNCH_EXRESET OFF +set_global_assignment -name RESET_RULE_IMSYNCH_EXRESET OFF +set_global_assignment -name RESET_RULE_COMB_ASYNCH_RESET OFF +set_global_assignment -name RESET_RULE_UNSYNCH_ASYNCH_DOMAIN OFF +set_global_assignment -name RESET_RULE_IMSYNCH_ASYNCH_DOMAIN OFF +set_global_assignment -name TIMING_CAT OFF +set_global_assignment -name TIMING_RULE_SHIFT_REG OFF +set_global_assignment -name TIMING_RULE_COIN_CLKEDGE OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_COMB_DRIVES_RAM_WE OFF +set_global_assignment -name NONSYNCHSTRUCT_CAT OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_COMBLOOP OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_REG_LOOP OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_DELAY_CHAIN OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_RIPPLE_CLK OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_ILLEGAL_PULSE_GEN OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_MULTI_VIBRATOR OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_SRLATCH OFF +set_global_assignment -name NONSYNCHSTRUCT_RULE_LATCH_UNIDENTIFIED OFF +set_global_assignment -name SIGNALRACE_CAT OFF +set_global_assignment -name ACLK_CAT OFF +set_global_assignment -name ACLK_RULE_NO_SZER_ACLK_DOMAIN OFF +set_global_assignment -name ACLK_RULE_SZER_BTW_ACLK_DOMAIN OFF +set_global_assignment -name ACLK_RULE_IMSZER_ADOMAIN OFF +set_global_assignment -name HCPY_CAT OFF +set_global_assignment -name HCPY_VREF_PINS OFF + +# SignalTap II Assignments +# ======================== +set_global_assignment -name HUB_ENTITY_NAME SLD_HUB +set_global_assignment -name HUB_INSTANCE_NAME SLD_HUB_INST +set_global_assignment -name ENABLE_SIGNALTAP Off + +# LogicLock Region Assignments +# ============================ +set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT OFF + +# ----------------- +# start CLOCK(SCLK) + + # Timing Assignments + # ================== +set_global_assignment -name DUTY_CYCLE 50 -section_id SCLK + set_global_assignment -name FMAX_REQUIREMENT "1.0 MHz" -section_id SCLK + set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id SCLK + +# end CLOCK(SCLK) +# --------------- + +# ----------------------- +# start CLOCK(master_clk) + + # Timing Assignments + # ================== +set_global_assignment -name DUTY_CYCLE 50 -section_id master_clk + set_global_assignment -name FMAX_REQUIREMENT "64.0 MHz" -section_id master_clk + set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id master_clk + +# end CLOCK(master_clk) +# --------------------- + +# ------------------- +# start CLOCK(usbclk) + + # Timing Assignments + # ================== +set_global_assignment -name DUTY_CYCLE 50 -section_id usbclk + set_global_assignment -name FMAX_REQUIREMENT "48.0 MHz" -section_id usbclk + set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id usbclk + +# end CLOCK(usbclk) +# ----------------- + +# ---------------------- +# start ENTITY(usrp_std) + + # Timing Assignments + # ================== + set_instance_assignment -name CLOCK_SETTINGS SCLK -to SCLK + set_instance_assignment -name CLOCK_SETTINGS usbclk -to usbclk + set_instance_assignment -name CLOCK_SETTINGS master_clk -to master_clk + +# end ENTITY(usrp_std) +# -------------------- + +set_global_assignment -name VERILOG_FILE ../../sdr_lib/rssi.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/ram16.v +set_global_assignment -name VERILOG_FILE usrp_std.vh +set_global_assignment -name VERILOG_FILE ../../megacells/fifo_4k.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/acc.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/mult.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/ram16_2sum.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/coeff_rom.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/halfband_decim.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/mac.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/coeff_ram.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/tx_chain.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/rx_dcoffset.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/adc_interface.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/io_pins.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/setting_reg.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/bidir_reg.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/cic_int_shifter.v +set_global_assignment -name VERILOG_FILE ../../megacells/clk_doubler.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/rx_chain.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/gen_sync.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/master_control.v +set_global_assignment -name VERILOG_FILE ../../megacells/fifo_2k.v +set_global_assignment -name VERILOG_FILE ../../megacells/bustri.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/rx_buffer.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/tx_buffer.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/phase_acc.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/cic_interp.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/cic_decim.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/cordic_stage.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/cordic.v +set_global_assignment -name VERILOG_FILE usrp_std.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/clk_divider.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/serial_io.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/strobe_gen.v +set_global_assignment -name VERILOG_FILE ../../sdr_lib/sign_extend.v \ No newline at end of file diff --git a/fpga/toplevel/usrp_std/usrp_std.v b/fpga/toplevel/usrp_std/usrp_std.v new file mode 100644 index 0000000..9ba8c7c --- /dev/null +++ b/fpga/toplevel/usrp_std/usrp_std.v @@ -0,0 +1,324 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2003,2004 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + +// Top level module for a full setup with DUCs and DDCs + +// Define DEBUG_OWNS_IO_PINS if we're using the daughterboard i/o pins +// for debugging info. NB, This can kill the m'board and/or d'board if you +// have anything except basic d'boards installed. + +// Uncomment the following to include optional circuitry + +`include "usrp_std.vh" +`include "../../../firmware/include/fpga_regs_common.v" +`include "../../../firmware/include/fpga_regs_standard.v" + +module usrp_std +(output MYSTERY_SIGNAL, + input master_clk, + input SCLK, + input SDI, + inout SDO, + input SEN_FPGA, + + input FX2_1, + output FX2_2, + output FX2_3, + + input wire [11:0] rx_a_a, + input wire [11:0] rx_b_a, + input wire [11:0] rx_a_b, + input wire [11:0] rx_b_b, + + output wire [13:0] tx_a, + output wire [13:0] tx_b, + + output wire TXSYNC_A, + output wire TXSYNC_B, + + // USB interface + input usbclk, + input wire [2:0] usbctl, + output wire [1:0] usbrdy, + inout [15:0] usbdata, // NB Careful, inout + + // These are the general purpose i/o's that go to the daughterboard slots + inout wire [15:0] io_tx_a, + inout wire [15:0] io_tx_b, + inout wire [15:0] io_rx_a, + inout wire [15:0] io_rx_b + ); + wire [15:0] debugdata,debugctrl; + assign MYSTERY_SIGNAL = 1'b0; + + wire clk64,clk128; + + wire WR = usbctl[0]; + wire RD = usbctl[1]; + wire OE = usbctl[2]; + + wire have_space, have_pkt_rdy; + assign usbrdy[0] = have_space; + assign usbrdy[1] = have_pkt_rdy; + + wire tx_underrun, rx_overrun; + wire clear_status = FX2_1; + assign FX2_2 = rx_overrun; + assign FX2_3 = tx_underrun; + + wire [15:0] usbdata_out; + + wire [3:0] dac0mux,dac1mux,dac2mux,dac3mux; + + wire tx_realsignals; + wire [3:0] rx_numchan; + wire [2:0] tx_numchan; + + wire [7:0] interp_rate, decim_rate; + wire [15:0] tx_debugbus, rx_debugbus; + + wire enable_tx, enable_rx; + wire tx_dsp_reset, rx_dsp_reset, tx_bus_reset, rx_bus_reset; + wire [7:0] settings; + + // Tri-state bus macro + bustri bustri( .data(usbdata_out),.enabledt(OE),.tridata(usbdata) ); + + assign clk64 = master_clk; + + wire [15:0] ch0tx,ch1tx,ch2tx,ch3tx; //,ch4tx,ch5tx,ch6tx,ch7tx; + wire [15:0] ch0rx,ch1rx,ch2rx,ch3rx,ch4rx,ch5rx,ch6rx,ch7rx; + + // TX + wire [15:0] i_out_0,i_out_1,q_out_0,q_out_1; + wire [15:0] bb_tx_i0,bb_tx_q0,bb_tx_i1,bb_tx_q1; // bb_tx_i2,bb_tx_q2,bb_tx_i3,bb_tx_q3; + + wire strobe_interp, tx_sample_strobe; + wire tx_empty; + + wire serial_strobe; + wire [6:0] serial_addr; + wire [31:0] serial_data; + + reg [15:0] debug_counter; + reg [15:0] loopback_i_0,loopback_q_0; + + //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + // Transmit Side +`ifdef TX_ON + assign bb_tx_i0 = ch0tx; + assign bb_tx_q0 = ch1tx; + assign bb_tx_i1 = ch2tx; + assign bb_tx_q1 = ch3tx; + + tx_buffer tx_buffer + ( .usbclk(usbclk),.bus_reset(tx_bus_reset),.reset(tx_dsp_reset), + .usbdata(usbdata),.WR(WR),.have_space(have_space),.tx_underrun(tx_underrun), + .channels({tx_numchan,1'b0}), + .tx_i_0(ch0tx),.tx_q_0(ch1tx), + .tx_i_1(ch2tx),.tx_q_1(ch3tx), + .tx_i_2(),.tx_q_2(), + .tx_i_3(),.tx_q_3(), + .txclk(clk64),.txstrobe(strobe_interp), + .clear_status(clear_status), + .tx_empty(tx_empty), + .debugbus(tx_debugbus) ); + + tx_chain tx_chain_0 + ( .clock(clk64),.reset(tx_dsp_reset),.enable(enable_tx), + .interp_rate(interp_rate),.sample_strobe(tx_sample_strobe), + .interpolator_strobe(strobe_interp),.freq(), + .i_in(bb_tx_i0),.q_in(bb_tx_q0),.i_out(i_out_0),.q_out(q_out_0) ); + + tx_chain tx_chain_1 + ( .clock(clk64),.reset(tx_dsp_reset),.enable(enable_tx), + .interp_rate(interp_rate),.sample_strobe(tx_sample_strobe), + .interpolator_strobe(strobe_interp),.freq(), + .i_in(bb_tx_i1),.q_in(bb_tx_q1),.i_out(i_out_1),.q_out(q_out_1) ); + + setting_reg #(`FR_TX_MUX) + sr_txmux(.clock(clk64),.reset(tx_dsp_reset),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data), + .out({dac3mux,dac2mux,dac1mux,dac0mux,tx_realsignals,tx_numchan})); + + wire [15:0] tx_a_a = dac0mux[3] ? (dac0mux[1] ? (dac0mux[0] ? q_out_1 : i_out_1) : (dac0mux[0] ? q_out_0 : i_out_0)) : 16'b0; + wire [15:0] tx_b_a = dac1mux[3] ? (dac1mux[1] ? (dac1mux[0] ? q_out_1 : i_out_1) : (dac1mux[0] ? q_out_0 : i_out_0)) : 16'b0; + wire [15:0] tx_a_b = dac2mux[3] ? (dac2mux[1] ? (dac2mux[0] ? q_out_1 : i_out_1) : (dac2mux[0] ? q_out_0 : i_out_0)) : 16'b0; + wire [15:0] tx_b_b = dac3mux[3] ? (dac3mux[1] ? (dac3mux[0] ? q_out_1 : i_out_1) : (dac3mux[0] ? q_out_0 : i_out_0)) : 16'b0; + + wire txsync = tx_sample_strobe; + assign TXSYNC_A = txsync; + assign TXSYNC_B = txsync; + + assign tx_a = txsync ? tx_b_a[15:2] : tx_a_a[15:2]; + assign tx_b = txsync ? tx_b_b[15:2] : tx_a_b[15:2]; +`endif // `ifdef TX_ON + + ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + // Receive Side +`ifdef RX_ON + wire rx_sample_strobe,strobe_decim,hb_strobe; + wire [15:0] bb_rx_i0,bb_rx_q0,bb_rx_i1,bb_rx_q1, + bb_rx_i2,bb_rx_q2,bb_rx_i3,bb_rx_q3; + + wire loopback = settings[0]; + wire counter = settings[1]; + + always @(posedge clk64) + if(rx_dsp_reset) + debug_counter <= #1 16'd0; + else if(~enable_rx) + debug_counter <= #1 16'd0; + else if(hb_strobe) + debug_counter <=#1 debug_counter + 16'd2; + + always @(posedge clk64) + if(strobe_interp) + begin + loopback_i_0 <= #1 ch0tx; + loopback_q_0 <= #1 ch1tx; + end + + assign ch0rx = counter ? debug_counter : loopback ? loopback_i_0 : bb_rx_i0; + assign ch1rx = counter ? debug_counter + 16'd1 : loopback ? loopback_q_0 : bb_rx_q0; + assign ch2rx = bb_rx_i1; + assign ch3rx = bb_rx_q1; + assign ch4rx = bb_rx_i2; + assign ch5rx = bb_rx_q2; + assign ch6rx = bb_rx_i3; + assign ch7rx = bb_rx_q3; + + wire [15:0] ddc0_in_i,ddc0_in_q,ddc1_in_i,ddc1_in_q,ddc2_in_i,ddc2_in_q,ddc3_in_i,ddc3_in_q; + wire [31:0] rssi_0,rssi_1,rssi_2,rssi_3; + + adc_interface adc_interface(.clock(clk64),.reset(rx_dsp_reset),.enable(1'b1), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .rx_a_a(rx_a_a),.rx_b_a(rx_b_a),.rx_a_b(rx_a_b),.rx_b_b(rx_b_b), + .rssi_0(rssi_0),.rssi_1(rssi_1),.rssi_2(rssi_2),.rssi_3(rssi_3), + .ddc0_in_i(ddc0_in_i),.ddc0_in_q(ddc0_in_q), + .ddc1_in_i(ddc1_in_i),.ddc1_in_q(ddc1_in_q), + .ddc2_in_i(ddc2_in_i),.ddc2_in_q(ddc2_in_q), + .ddc3_in_i(ddc3_in_i),.ddc3_in_q(ddc3_in_q),.rx_numchan(rx_numchan) ); + + rx_buffer rx_buffer + ( .usbclk(usbclk),.bus_reset(rx_bus_reset),.reset(rx_dsp_reset), + .reset_regs(rx_dsp_reset), + .usbdata(usbdata_out),.RD(RD),.have_pkt_rdy(have_pkt_rdy),.rx_overrun(rx_overrun), + .channels(rx_numchan), + .ch_0(ch0rx),.ch_1(ch1rx), + .ch_2(ch2rx),.ch_3(ch3rx), + .ch_4(ch4rx),.ch_5(ch5rx), + .ch_6(ch6rx),.ch_7(ch7rx), + .rxclk(clk64),.rxstrobe(hb_strobe), + .clear_status(clear_status), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .debugbus(rx_debugbus) ); + + `ifdef RX_EN_0 + rx_chain #(`FR_RX_FREQ_0,`FR_RX_PHASE_0) rx_chain_0 + ( .clock(clk64),.reset(1'b0),.enable(enable_rx), + .decim_rate(decim_rate),.sample_strobe(rx_sample_strobe),.decimator_strobe(strobe_decim),.hb_strobe(hb_strobe), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .i_in(ddc0_in_i),.q_in(ddc0_in_q),.i_out(bb_rx_i0),.q_out(bb_rx_q0),.debugdata(debugdata),.debugctrl(debugctrl)); + `else + assign bb_rx_i0=16'd0; + assign bb_rx_q0=16'd0; + `endif + + `ifdef RX_EN_1 + rx_chain #(`FR_RX_FREQ_1,`FR_RX_PHASE_1) rx_chain_1 + ( .clock(clk64),.reset(1'b0),.enable(enable_rx), + .decim_rate(decim_rate),.sample_strobe(rx_sample_strobe),.decimator_strobe(strobe_decim),.hb_strobe(), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .i_in(ddc1_in_i),.q_in(ddc1_in_q),.i_out(bb_rx_i1),.q_out(bb_rx_q1)); + `else + assign bb_rx_i1=16'd0; + assign bb_rx_q1=16'd0; + `endif + + `ifdef RX_EN_2 + rx_chain #(`FR_RX_FREQ_2,`FR_RX_PHASE_2) rx_chain_2 + ( .clock(clk64),.reset(1'b0),.enable(enable_rx), + .decim_rate(decim_rate),.sample_strobe(rx_sample_strobe),.decimator_strobe(strobe_decim),.hb_strobe(), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .i_in(ddc2_in_i),.q_in(ddc2_in_q),.i_out(bb_rx_i2),.q_out(bb_rx_q2)); + `else + assign bb_rx_i2=16'd0; + assign bb_rx_q2=16'd0; + `endif + + `ifdef RX_EN_3 + rx_chain #(`FR_RX_FREQ_3,`FR_RX_PHASE_3) rx_chain_3 + ( .clock(clk64),.reset(1'b0),.enable(enable_rx), + .decim_rate(decim_rate),.sample_strobe(rx_sample_strobe),.decimator_strobe(strobe_decim),.hb_strobe(), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .i_in(ddc3_in_i),.q_in(ddc3_in_q),.i_out(bb_rx_i3),.q_out(bb_rx_q3)); + `else + assign bb_rx_i3=16'd0; + assign bb_rx_q3=16'd0; + `endif + +`endif // `ifdef RX_ON + + /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + // Control Functions + + wire [31:0] capabilities; + assign capabilities[7] = `TX_CAP_HB; + assign capabilities[6:4] = `TX_CAP_NCHAN; + assign capabilities[3] = `RX_CAP_HB; + assign capabilities[2:0] = `RX_CAP_NCHAN; + + + serial_io serial_io + ( .master_clk(clk64),.serial_clock(SCLK),.serial_data_in(SDI), + .enable(SEN_FPGA),.reset(1'b0),.serial_data_out(SDO), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .readback_0({io_rx_a,io_tx_a}),.readback_1({io_rx_b,io_tx_b}),.readback_2(capabilities),.readback_3(32'hf0f0931a), + .readback_4(rssi_0),.readback_5(rssi_1),.readback_6(rssi_2),.readback_7(rssi_3) + ); + + wire [15:0] reg_0,reg_1,reg_2,reg_3; + master_control master_control + ( .master_clk(clk64),.usbclk(usbclk), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe), + .tx_bus_reset(tx_bus_reset),.rx_bus_reset(rx_bus_reset), + .tx_dsp_reset(tx_dsp_reset),.rx_dsp_reset(rx_dsp_reset), + .enable_tx(enable_tx),.enable_rx(enable_rx), + .interp_rate(interp_rate),.decim_rate(decim_rate), + .tx_sample_strobe(tx_sample_strobe),.strobe_interp(strobe_interp), + .rx_sample_strobe(rx_sample_strobe),.strobe_decim(strobe_decim), + .tx_empty(tx_empty), + //.debug_0(rx_a_a),.debug_1(ddc0_in_i), + .debug_0(rx_debugbus),.debug_1(ddc0_in_i), + .debug_2({rx_sample_strobe,strobe_decim,serial_strobe,serial_addr}),.debug_3({rx_dsp_reset,tx_dsp_reset,rx_bus_reset,tx_bus_reset,enable_rx,tx_underrun,rx_overrun,decim_rate}), + .reg_0(reg_0),.reg_1(reg_1),.reg_2(reg_2),.reg_3(reg_3) ); + + io_pins io_pins + (.io_0(io_tx_a),.io_1(io_rx_a),.io_2(io_tx_b),.io_3(io_rx_b), + .reg_0(reg_0),.reg_1(reg_1),.reg_2(reg_2),.reg_3(reg_3), + .clock(clk64),.rx_reset(rx_dsp_reset),.tx_reset(tx_dsp_reset), + .serial_addr(serial_addr),.serial_data(serial_data),.serial_strobe(serial_strobe)); + + //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + // Misc Settings + setting_reg #(`FR_MODE) sr_misc(.clock(clk64),.reset(rx_dsp_reset),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(settings)); + +endmodule // usrp_std diff --git a/fpga/toplevel/usrp_std/usrp_std.vh b/fpga/toplevel/usrp_std/usrp_std.vh new file mode 100644 index 0000000..65aed9b --- /dev/null +++ b/fpga/toplevel/usrp_std/usrp_std.vh @@ -0,0 +1,119 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2006 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + +// ==================================================================== +// User control over what parts get included +// +// >>>> EDIT ONLY THIS SECTION <<<< +// +// ==================================================================== + +// Uncomment this for 2 rx channels (w/ halfband) & 2 transmit channels + `include "usrp_std_config_2rxhb_2tx.vh" + +// Uncomment this for 4 rx channels (w/o halfband) & 0 transmit channels +//`include "usrp_std_config_4rx_0tx.vh" + +// Add other "known to fit" configurations here... + +// ==================================================================== +// +// >>>> DO NOT EDIT BELOW HERE <<<< +// +// [The stuff from here down is derived from the stuff included above] +// +// N.B., *all* the remainder of the code should be conditionalized +// only in terms of: +// +// TX_ON, TX_EN_0, TX_EN_1, TX_EN_2, TX_EN_3, TX_CAP_NCHAN, TX_CAP_HB, +// RX_ON, RX_EN_0, RX_EN_1, RX_EN_2, RX_EN_3, RX_CAP_NCHAN, RX_CAP_HB, +// RX_NCO_ON, RX_CIC_ON +// ==================================================================== + +`ifdef TX_ON + + `ifdef TX_SINGLE + `define TX_EN_0 + `define TX_CAP_NCHAN 3'd1 + `endif + + `ifdef TX_DUAL + `define TX_EN_0 + `define TX_EN_1 + `define TX_CAP_NCHAN 3'd2 + `endif + + `ifdef TX_QUAD + `define TX_EN_0 + `define TX_EN_1 + `define TX_EN_2 + `define TX_EN_3 + `define TX_CAP_NCHAN 3'd4 + `endif + + `ifdef TX_HB_ON + `define TX_CAP_HB 1 + `else + `define TX_CAP_HB 0 + `endif + +`else // !ifdef TX_ON + + `define TX_CAP_NCHAN 3'd0 + `define TX_CAP_HB 0 + +`endif // !ifdef TX_ON + +// -------------------------------------------------------------------- + +`ifdef RX_ON + + `ifdef RX_SINGLE + `define RX_EN_0 + `define RX_CAP_NCHAN 3'd1 + `endif + + `ifdef RX_DUAL + `define RX_EN_0 + `define RX_EN_1 + `define RX_CAP_NCHAN 3'd2 + `endif + + `ifdef RX_QUAD + `define RX_EN_0 + `define RX_EN_1 + `define RX_EN_2 + `define RX_EN_3 + `define RX_CAP_NCHAN 3'd4 + `endif + + `ifdef RX_HB_ON + `define RX_CAP_HB 1 + `else + `define RX_CAP_HB 0 + `endif + +`else // !ifdef RX_ON + + `define RX_CAP_NCHAN 3'd0 + `define RX_CAP_HB 0 + +`endif // !ifdef RX_ON diff --git a/fpga/toplevel/usrp_std/usrp_std_config_2rxhb_2tx.vh b/fpga/toplevel/usrp_std/usrp_std_config_2rxhb_2tx.vh new file mode 100644 index 0000000..74f1bfd --- /dev/null +++ b/fpga/toplevel/usrp_std/usrp_std_config_2rxhb_2tx.vh @@ -0,0 +1,61 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2006 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + +// ------------------------------------------------------------ +// If TX_ON is not defined, there is *no* transmit circuitry built + `define TX_ON + +// ------------------------------------------------------------ +// Define 1 and only one of TX_SINGLE, TX_DUAL and TX_QUAD +// to respectively enable 1, 2 or 4 transmit channels. +// [Please note that only TX_DUAL is currently valid] +//`define TX_SINGLE + `define TX_DUAL +//`define TX_QUAD + +// ------------------------------------------------------------ +// Define TX_HB_ON to enable the transmit halfband filter +// [Not implemented] +//`define TX_HB_ON + +// ------------------------------------------------------------ +// IF RX_ON is not defined, there is *no* transmit circuitry built + `define RX_ON + +// ------------------------------------------------------------ +// Define 1 and only one of RX_SINGLE, RX_DUAL and RX_QUAD +// to respectively define 1, 2 or 4 receive channels. + +//`define RX_SINGLE + `define RX_DUAL +//`define RX_QUAD + +// ------------------------------------------------------------ +// Define RX_HB_ON to enable the receive halfband filter + `define RX_HB_ON + +// ------------------------------------------------------------ +// Define RX_NCO_ON to enable the receive Numerical Controlled Osc + `define RX_NCO_ON + +// ------------------------------------------------------------ +// Define RX_CIC_ON to enable the receive Cascaded Integrator Comb filter + `define RX_CIC_ON diff --git a/fpga/toplevel/usrp_std/usrp_std_config_4rx_0tx.vh b/fpga/toplevel/usrp_std/usrp_std_config_4rx_0tx.vh new file mode 100644 index 0000000..0bd1887 --- /dev/null +++ b/fpga/toplevel/usrp_std/usrp_std_config_4rx_0tx.vh @@ -0,0 +1,61 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2006 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +// + +// ------------------------------------------------------------ +// If TX_ON is not defined, there is *no* transmit circuitry built +// `define TX_ON + +// ------------------------------------------------------------ +// Define 1 and only one of TX_SINGLE, TX_DUAL and TX_QUAD +// to respectively enable 1, 2 or 4 transmit channels. +// [Please note that only TX_DUAL is currently valid] +//`define TX_SINGLE +//`define TX_DUAL +//`define TX_QUAD + +// ------------------------------------------------------------ +// Define TX_HB_ON to enable the transmit halfband filter +// [Not implemented] +//`define TX_HB_ON + +// ------------------------------------------------------------ +// IF RX_ON is not defined, there is *no* transmit circuitry built + `define RX_ON + +// ------------------------------------------------------------ +// Define 1 and only one of RX_SINGLE, RX_DUAL and RX_QUAD +// to respectively define 1, 2 or 4 receive channels. + +//`define RX_SINGLE +//`define RX_DUAL + `define RX_QUAD + +// ------------------------------------------------------------ +// Define RX_HB_ON to enable the receive halfband filter +//`define RX_HB_ON + +// ------------------------------------------------------------ +// Define RX_NCO_ON to enable the receive Numerical Controlled Osc + `define RX_NCO_ON + +// ------------------------------------------------------------ +// Define RX_CIC_ON to enable the receive Cascaded Integrator Comb filter + `define RX_CIC_ON diff --git a/host/Makefile.am b/host/Makefile.am new file mode 100644 index 0000000..05ba517 --- /dev/null +++ b/host/Makefile.am @@ -0,0 +1,23 @@ +# +# Copyright 2001 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +SUBDIRS = misc lib swig apps + diff --git a/host/apps/Makefile.am b/host/apps/Makefile.am new file mode 100644 index 0000000..b08e325 --- /dev/null +++ b/host/apps/Makefile.am @@ -0,0 +1,53 @@ +# +# Copyright 2003,2006 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +INCLUDES = -I../lib -I$(top_srcdir)/usrp/firmware/include + +bin_PROGRAMS = \ + usrper \ + usrp_cal_dc_offset + +noinst_PROGRAMS = \ + check_order_quickly \ + test_usrp_standard_rx \ + test_usrp_standard_tx + +noinst_HEADERS = \ + time_stuff.h + +noinst_PYTHON = \ + burn-db-eeprom \ + burn-serial-number + + +check_order_quickly_SOURCES = check_order_quickly.cc + +test_usrp_standard_rx_SOURCES = test_usrp_standard_rx.cc time_stuff.c +test_usrp_standard_rx_LDADD = $(top_builddir)/usrp/host/lib/libusrp.la + +test_usrp_standard_tx_SOURCES = test_usrp_standard_tx.cc time_stuff.c +test_usrp_standard_tx_LDADD = $(top_builddir)/usrp/host/lib/libusrp.la + +usrper_SOURCES = usrper.cc +usrper_LDADD = $(top_builddir)/usrp/host/lib/libusrp.la + +usrp_cal_dc_offset_SOURCES = usrp_cal_dc_offset.cc +usrp_cal_dc_offset_LDADD = $(top_builddir)/usrp/host/lib/libusrp.la diff --git a/host/apps/burn-db-eeprom b/host/apps/burn-db-eeprom new file mode 100755 index 0000000..e7c92eb --- /dev/null +++ b/host/apps/burn-db-eeprom @@ -0,0 +1,164 @@ +#!/usr/bin/env python +# +# Copyright 2005 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +from usrp_prims import * +from optparse import OptionParser +import sys +from usrp_dbid import * + +i2c_addr_map = { 'TX_A' : 0x54, 'RX_A' : 0x55, 'TX_B' : 0x56, 'RX_B' : 0x57 } + +daughterboards = { + # name : ((tx-dbid, tx-oe), (rx-dbid, rx-oe)) + 'basictx' : ((BASIC_TX, 0x0000), None), + 'basicrx' : (None, (BASIC_RX, 0x0000)), + 'dbsrx' : (None, (DBS_RX, 0x0000)), + 'dbsrx2' : (None, (DBS_RX_REV_2_1, 0x0000)), + 'tvrx' : (None, (TV_RX, 0x0000)), + 'tvrx2' : (None, (TV_RX_REV_2, 0x0000)), + 'tvrx3' : (None, (TV_RX_REV_3, 0x0000)), + 'rfx400' : ((FLEX_400_TX, 0x0000), (FLEX_400_RX, 0x0000)), + 'rfx900' : ((FLEX_900_TX, 0x0000), (FLEX_900_RX, 0x0000)), + 'rfx1200' : ((FLEX_1200_TX, 0x0000), (FLEX_1200_RX, 0x0000)), + 'rfx1800' : ((FLEX_1800_TX, 0x0000), (FLEX_1800_RX, 0x0000)), + 'rfx2400' : ((FLEX_2400_TX, 0x0000), (FLEX_2400_RX, 0x0000)), + 'rfx400_tx' : ((FLEX_400_TX, 0x0000), None), + 'rfx900_tx' : ((FLEX_900_TX, 0x0000), None), + 'rfx1200_tx' : ((FLEX_1200_TX, 0x0000), None), + 'rfx1800_tx' : ((FLEX_1800_TX, 0x0000), None), + 'rfx2400_tx' : ((FLEX_2400_TX, 0x0000), None), + 'rfx400_rx' : (None, (FLEX_400_RX, 0x0000)), + 'rfx900_rx' : (None, (FLEX_900_RX, 0x0000)), + 'rfx1200_rx' : (None, (FLEX_1200_RX, 0x0000)), + 'rfx1800_rx' : (None, (FLEX_1800_RX, 0x0000)), + 'rfx2400_rx' : (None, (FLEX_2400_RX, 0x0000)), + 'rfx400_mimo_a' : ((FLEX_400_TX_MIMO_A, 0x0000), (FLEX_400_RX_MIMO_A, 0x0000)), + 'rfx900_mimo_a' : ((FLEX_900_TX_MIMO_A, 0x0000), (FLEX_900_RX_MIMO_A, 0x0000)), + 'rfx1200_mimo_a' : ((FLEX_1200_TX_MIMO_A, 0x0000), (FLEX_1200_RX_MIMO_A, 0x0000)), + 'rfx1800_mimo_a' : ((FLEX_1800_TX_MIMO_A, 0x0000), (FLEX_1800_RX_MIMO_A, 0x0000)), + 'rfx2400_mimo_a' : ((FLEX_2400_TX_MIMO_A, 0x0000), (FLEX_2400_RX_MIMO_A, 0x0000)), + 'rfx400_mimo_b' : ((FLEX_400_TX_MIMO_B, 0x0000), (FLEX_400_RX_MIMO_B, 0x0000)), + 'rfx900_mimo_b' : ((FLEX_900_TX_MIMO_B, 0x0000), (FLEX_900_RX_MIMO_B, 0x0000)), + 'rfx1200_mimo_b' : ((FLEX_1200_TX_MIMO_B, 0x0000), (FLEX_1200_RX_MIMO_B, 0x0000)), + 'rfx1800_mimo_b' : ((FLEX_1800_TX_MIMO_B, 0x0000), (FLEX_1800_RX_MIMO_B, 0x0000)), + 'rfx2400_mimo_b' : ((FLEX_2400_TX_MIMO_B, 0x0000), (FLEX_2400_RX_MIMO_B, 0x0000)), + 'lftx' : ((LF_TX, 0x0000), None), + 'lfrx' : (None, (LF_RX, 0x0000)), + 'experimental_tx' : ((EXPERIMENTAL_TX, 0x0000), None), + 'experimental_rx' : (None, (EXPERIMENTAL_RX, 0x0000)), + } + +def open_cmd_interface(which_board = 0): + if not usrp_load_standard_bits (which_board, 0): + raise RuntimeError, "usrp_load_standard_bits" + dev = usrp_find_device (which_board) + if not dev: + raise RuntimeError, "usrp_find_device" + u = usrp_open_cmd_interface (dev) + if not u: + raise RuntimeError, "usrp_open_cmd_interface" + return u + +def write_dboard_eeprom(u, i2c_addr, dbid, oe): + eeprom = 0x20 * [0] + eeprom[0] = 0xDB # magic value + eeprom[1] = dbid & 0xff + eeprom[2] = (dbid >> 8) & 0xff + eeprom[3] = oe & 0xff + eeprom[4] = (oe >> 8) & 0xff + eeprom[0x1f] = 0xff & (-reduce(lambda x, y: x+y, eeprom)) # checksum + s = ''.join (map (chr, eeprom)) + ok = usrp_eeprom_write (u, i2c_addr, 0, s) + return ok + + +def init_eeprom(u, slot_name, force, dbid, oe): + i2c_addr = i2c_addr_map[slot_name] + e = usrp_eeprom_read (u, i2c_addr, 0, 0x20) + if not e: + print "%s: no d'board, skipped" % (slot_name,) + return True + + if not force and (sum (map (ord, e)) & 0xff) == 0 and ord (e[0]) == 0xDB: + print "%s: already initialized, skipped" % (slot_name,) + return True + + if not write_dboard_eeprom (u, i2c_addr, dbid, oe): + print "%s: failed to write d'board EEPROM" % (slot_name,) + return False + + print "%s: OK" % (slot_name,) + return True + + +def init_daughterboard(u, side, type, force): + ok = True + dbinfo = daughterboards[type] + if dbinfo[0] is not None: # burn tx slot + ok &= init_eeprom(u, 'TX_' + side, force, dbinfo[0][0], dbinfo[0][1]) + if dbinfo[1] is not None: # burn rx slot + ok &= init_eeprom(u, 'RX_' + side, force, dbinfo[1][0], dbinfo[1][1]) + return ok + + +def main(): + dbs = daughterboards.keys() + dbs.sort() + usage = """\ +usage: %prog [options] +You must specify a type with -t or --type, +and at least one side using -A and/or -B.""" + + parser = OptionParser(usage=usage) + parser.add_option ("-t", "--type", type="choice", help="choose type from %r" % (dbs,), + choices=dbs, default=None) + parser.add_option ("-A", "--burn-a", action="store_true", default=False, + help="burn eeprom(s) on side A") + parser.add_option ("-B", "--burn-b", action="store_true", default=False, + help="burn eeprom(s) on side B") + parser.add_option ("-f", "--force", action="store_true", default=False, + help="force init of already initialized eeproms") + (options, args) = parser.parse_args () + + which=[] + if options.burn_a: + which.append('A') + if options.burn_b: + which.append('B') + + if len(args) != 0 or len(which) == 0 or options.type is None: + parser.print_help() + sys.exit (1) + + u = open_cmd_interface (0) + ok = True + for w in which: + ok &= init_daughterboard (u, w, options.type, options.force) + + if ok: + sys.exit (0) + else: + sys.exit (1) + +if __name__ == "__main__": + main () + diff --git a/host/apps/burn-serial-number b/host/apps/burn-serial-number new file mode 100755 index 0000000..1bf944e --- /dev/null +++ b/host/apps/burn-serial-number @@ -0,0 +1,80 @@ +#!/usr/bin/env python +# +# Copyright 2006 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +from usrp_prims import * +from optparse import OptionParser +import sys +import time + + +def open_cmd_interface(which_board = 0): + if not usrp_load_standard_bits (which_board, 0): + raise RuntimeError, "usrp_load_standard_bits" + dev = usrp_find_device (which_board) + if not dev: + raise RuntimeError, "usrp_find_device" + u = usrp_open_cmd_interface (dev) + if not u: + raise RuntimeError, "usrp_open_cmd_interface" + return u + + +def write_serial_number_eeprom(u, serial_number): + if not str(serial_number): + raise TypeError + + i2c_addr = 0x50 # usrp boot rom + serial_number_offset = 248 # offset to serial number + serial_number_len = 8 # length of serial number + + lsn = len(serial_number) + if lsn > serial_number_len: + serial_number = serial_number[0:serial_number_len] + if lsn < serial_number_len: + serial_number = serial_number + (serial_number_len - lsn) * ' ' + + ok = usrp_eeprom_write (u, i2c_addr, serial_number_offset, serial_number) + return ok + + +def main(): + + default_serial_number = hex(int(time.time()))[2:] + parser = OptionParser() + parser.add_option ("-s", "--serial-number", default=default_serial_number, + help="set serial number [default=%default]") + (options, args) = parser.parse_args () + + if len(args) != 0: + parser.print_help() + sys.exit(1) + + u = open_cmd_interface (0) + ok = write_serial_number_eeprom(u, options.serial_number) + + if ok: + sys.exit(0) + else: + sys.exit(1) + +if __name__ == "__main__": + main () diff --git a/host/apps/check_order b/host/apps/check_order new file mode 100755 index 0000000..56e1927 --- /dev/null +++ b/host/apps/check_order @@ -0,0 +1,39 @@ +#!/usr/bin/env python +# -*- Python -*- + +import sys +import fileinput + +skip_count = 4096 +lineno = 0 +last_error = 0 + +for line in fileinput.input (): + lineno += 1 + if lineno < skip_count: + continue + (offset, dec_val, hex_val) = line.split () + if lineno == skip_count: + expected_val = int (dec_val) + int_dec_val = int (dec_val) + int_hex_val = int (hex_val, 16) + if int_dec_val != expected_val: + print "line %6d, delta %4d, expected %6d, got %6d" % (lineno, + lineno - last_error, + expected_val, + int_dec_val) + last_error = lineno + elif ((int_hex_val >> 12) & 0xf) != (int_hex_val & 0xf): + print "line %6d, delta %4d, invalid high bits %04x" % (lineno, + lineno - last_error, + int_hex_val) + last_error = lineno + + # expected_val = (expected_val + 1) & 0xffff + expected_val = (expected_val + 1) & 0x0fff + + + + + + diff --git a/host/apps/check_order_quickly.cc b/host/apps/check_order_quickly.cc new file mode 100644 index 0000000..d6ebd2f --- /dev/null +++ b/host/apps/check_order_quickly.cc @@ -0,0 +1,62 @@ +/* -*- c++ -*- */ +/* + * Copyright 2004 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#include + +static bool +check (int v, int counter, int offset) +{ + if ((v & 0x0fff) != counter){ + fprintf (stdout, "%08x: expected 0x%04x, got 0x%04x\n", offset, counter, v & 0x0fff); + return false; + } + + if (((v >> 12) & 0xf) != (v & 0xf)){ + fprintf (stdout, "%08x: bad high bits 0x%04x\n", offset, v); + return false; + } + + return true; +} + +int +main (int argc, char **argv) +{ + static const int BUFSIZE = 64 * 1024; + unsigned short buf[BUFSIZE]; + + int n; + int i; + int counter = 0; + int offset = 0; + bool ok = true; + + while ((n = fread (buf, sizeof (short), BUFSIZE, stdin)) != 0){ + for (i = 0; i < n; i++){ + ok &= check (buf[i], counter, offset); + counter = (counter + 1) & 0x0fff; + offset++; + } + } + + return ok ? 0 : 1; +} diff --git a/host/apps/dump_12bit_shorts b/host/apps/dump_12bit_shorts new file mode 100755 index 0000000..a896f2d --- /dev/null +++ b/host/apps/dump_12bit_shorts @@ -0,0 +1,23 @@ +#!/usr/bin/env python +# -*- Python -*- + +import sys, errno + +counter = 0 + +try: + while 1: + x = sys.stdin.read (2) + if not x: + break + + v = (ord(x[1]) << 8) | ord(x[0]) + sys.stdout.write ("0x%08x %6d 0x%04x\n" % (counter, v & 0x0fff, v)) + counter += 1 +except IOError, e: + if e.errno == errno.EPIPE: + sys.exit (0) + + + + diff --git a/host/apps/dump_shorts b/host/apps/dump_shorts new file mode 100755 index 0000000..6104ea0 --- /dev/null +++ b/host/apps/dump_shorts @@ -0,0 +1,23 @@ +#!/usr/bin/env python +# -*- Python -*- + +import sys, errno + +counter = 0 + +try: + while 1: + x = sys.stdin.read (2) + if not x: + break + + v = (ord(x[1]) << 8) | ord(x[0]) + sys.stdout.write ("0x%08x %6d 0x%04x\n" % (counter, v, v)) + counter += 1 +except IOError, e: + if e.errno == errno.EPIPE: + sys.exit (0) + + + + diff --git a/host/apps/print-db b/host/apps/print-db new file mode 100755 index 0000000..b741969 --- /dev/null +++ b/host/apps/print-db @@ -0,0 +1,19 @@ +#!/usr/bin/env python + +from gnuradio import gr +from gnuradio import usrp +from optparse import OptionParser +import usrp_dbid + +u_source = usrp.source_c() +u_sink = usrp.sink_c() +subdev_Ar = usrp.selected_subdev(u_source, (0,0)) +subdev_Br = usrp.selected_subdev(u_source, (1,0)) +subdev_At = usrp.selected_subdev(u_sink, (0,0)) +subdev_Bt = usrp.selected_subdev(u_sink, (1,0)) + +print "RX d'board %s" % (subdev_Ar.side_and_name(),) +print "RX d'board %s" % (subdev_Br.side_and_name(),) +print "TX d'board %s" % (subdev_At.side_and_name(),) +print "TX d'board %s" % (subdev_Bt.side_and_name(),) + diff --git a/host/apps/run b/host/apps/run new file mode 100755 index 0000000..5b13336 --- /dev/null +++ b/host/apps/run @@ -0,0 +1,6 @@ +#!/bin/sh + +./test_usrp_standard_rx -D 8 -o rx.bin +./dump_12bit_shorts rx.ascii +./check_order rx.ascii +#./dump_12bit_shorts rx.ascii + diff --git a/host/apps/test_usrp_standard_rx.cc b/host/apps/test_usrp_standard_rx.cc new file mode 100644 index 0000000..d19b6a6 --- /dev/null +++ b/host/apps/test_usrp_standard_rx.cc @@ -0,0 +1,276 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003,2006 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include +#include +#include +#include +#include /* needed for usb functions */ +#include +#include +#include +#include "time_stuff.h" +#include "usrp_standard.h" +#include "usrp_bytesex.h" +#include "fpga_regs_common.h" +#include "fpga_regs_standard.h" + +#ifdef HAVE_SCHED_H +#include +#endif + +char *prog_name; + +static bool test_input (usrp_standard_rx *urx, int max_bytes, FILE *fp); + +static void +set_progname (char *path) +{ + char *p = strrchr (path, '/'); + if (p != 0) + prog_name = p+1; + else + prog_name = path; +} + +static void +usage () +{ + fprintf (stderr, "usage: %s [-f] [-v] [-l] [-c] [-D ] [-F freq] [-o output_file]\n", prog_name); + fprintf (stderr, " [-f] loop forever\n"); + fprintf (stderr, " [-M] how many Megabytes to transfer (default 128)\n"); + fprintf (stderr, " [-v] verbose\n"); + fprintf (stderr, " [-l] digital loopback in FPGA\n"); + fprintf (stderr, " [-c] counting in FPGA\n"); + fprintf (stderr, " [-8] 8-bit samples across USB\n"); + fprintf (stderr, " [-B ] set fast usb block_size\n"); + fprintf (stderr, " [-N ] set fast usb nblocks\n"); + fprintf (stderr, " [-R] set real time scheduling: SCHED_FIFO; pri = midpoint\n"); + + exit (1); +} + +static void +die (const char *msg) +{ + fprintf (stderr, "die: %s: %s\n", prog_name, msg); + exit (1); +} + +int +main (int argc, char **argv) +{ + bool verbose_p = false; + bool loopback_p = false; + bool counting_p = false; + bool width_8_p = false; + int max_bytes = 128 * (1L << 20); + int ch; + char *output_filename = 0; + int which_board = 0; + int decim = 8; // 32 MB/sec + double center_freq = 0; + int fusb_block_size = 0; + int fusb_nblocks = 0; + bool realtime_p = false; + + + set_progname (argv[0]); + + while ((ch = getopt (argc, argv, "fvlco:D:F:M:8B:N:R")) != EOF){ + switch (ch){ + case 'f': + max_bytes = 0; + break; + + case 'v': + verbose_p = true; + break; + + case 'l': + loopback_p = true; + break; + + case 'c': + counting_p = true; + break; + + case '8': + width_8_p = true; + break; + + case 'o': + output_filename = optarg; + break; + + case 'D': + decim = strtol (optarg, 0, 0); + break; + + case 'F': + center_freq = strtod (optarg, 0); + break; + + case 'M': + max_bytes = strtol (optarg, 0, 0) * (1L << 20); + if (max_bytes < 0) max_bytes = 0; + break; + + case 'B': + fusb_block_size = strtol (optarg, 0, 0); + break; + + case 'N': + fusb_nblocks = strtol (optarg, 0, 0); + break; + + case 'R': + realtime_p = true; + break; + + default: + usage (); + } + } + +#ifdef HAVE_SCHED_SETSCHEDULER + if (realtime_p){ + int policy = SCHED_FIFO; + int pri = (sched_get_priority_max (policy) - sched_get_priority_min (policy)) / 2; + int pid = 0; // this process + + struct sched_param param; + memset(¶m, 0, sizeof(param)); + param.sched_priority = pri; + int result = sched_setscheduler(pid, policy, ¶m); + if (result != 0){ + perror ("sched_setscheduler: failed to set real time priority"); + } + else + printf("SCHED_FIFO enabled with priority = %d\n", pri); + } +#endif + + FILE *fp = 0; + + if (output_filename){ + fp = fopen (output_filename, "wb"); + if (fp == 0) + perror (output_filename); + } + + int mode = 0; + if (loopback_p) + mode |= usrp_standard_rx::FPGA_MODE_LOOPBACK; + if (counting_p) + mode |= usrp_standard_rx::FPGA_MODE_COUNTING; + + + usrp_standard_rx *urx = + usrp_standard_rx::make (which_board, decim, 1, -1, mode, + fusb_block_size, fusb_nblocks); + + if (urx == 0) + die ("usrp_standard_rx::make"); + + if (!urx->set_rx_freq (0, center_freq)) + die ("urx->set_rx_freq"); + + if (width_8_p){ + int width = 8; + int shift = 8; + bool want_q = true; + if (!urx->set_format(usrp_standard_rx::make_format(width, shift, want_q))) + die("urx->set_format"); + } + + urx->start(); // start data xfers + + test_input (urx, max_bytes, fp); + + if (fp) + fclose (fp); + + delete urx; + + return 0; +} + + +static bool +test_input (usrp_standard_rx *urx, int max_bytes, FILE *fp) +{ + int fd = -1; + static const int BUFSIZE = urx->block_size(); + static const int N = BUFSIZE/sizeof (short); + short buf[N]; + int nbytes = 0; + + double start_wall_time = get_elapsed_time (); + double start_cpu_time = get_cpu_usage (); + + if (fp) + fd = fileno (fp); + + bool overrun; + int noverruns = 0; + + for (nbytes = 0; max_bytes == 0 || nbytes < max_bytes; nbytes += BUFSIZE){ + + unsigned int ret = urx->read (buf, sizeof (buf), &overrun); + if (ret != sizeof (buf)){ + fprintf (stderr, "test_input: error, ret = %d\n", ret); + } + + if (overrun){ + printf ("rx_overrun\n"); + noverruns++; + } + + if (fd != -1){ + + for (unsigned int i = 0; i < sizeof (buf) / sizeof (short); i++) + buf[i] = usrp_to_host_short (buf[i]); + + if (write (fd, buf, sizeof (buf)) == -1){ + perror ("write"); + fd = -1; + } + } + } + + double stop_wall_time = get_elapsed_time (); + double stop_cpu_time = get_cpu_usage (); + + double delta_wall = stop_wall_time - start_wall_time; + double delta_cpu = stop_cpu_time - start_cpu_time; + + printf ("xfered %.3g bytes in %.3g seconds. %.4g bytes/sec. cpu time = %.4g\n", + (double) max_bytes, delta_wall, max_bytes / delta_wall, delta_cpu); + printf ("noverruns = %d\n", noverruns); + + return true; +} diff --git a/host/apps/test_usrp_standard_tx.cc b/host/apps/test_usrp_standard_tx.cc new file mode 100644 index 0000000..8aebaeb --- /dev/null +++ b/host/apps/test_usrp_standard_tx.cc @@ -0,0 +1,319 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003,2004 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include +#include +#include +#include +#include /* needed for usb functions */ +#include +#include +#include +#include "time_stuff.h" +#include "usrp_standard.h" +#include "usrp_bytesex.h" + +#ifdef HAVE_SCHED_H +#include +#endif + +char *prog_name; + +static bool test_output (usrp_standard_tx *utx, int max_bytes, double ampl, + bool dc_p, bool counting_p); + +static void +set_progname (char *path) +{ + char *p = strrchr (path, '/'); + if (p != 0) + prog_name = p+1; + else + prog_name = path; +} + +static void +usage () +{ + fprintf (stderr, + "usage: %s [-f] [-v] [-d] [-c] [-a ][-I ] [-F freq] [-D]\n", prog_name); + fprintf (stderr, " [-f] loop forever\n"); + fprintf (stderr, " [-M] how many Megabytes to transfer (default 128)\n"); + fprintf (stderr, " [-v] verbose\n"); + fprintf (stderr, " [-d] dump registers\n"); + // fprintf (stderr, " [-l] digital loopback in FPGA\n"); + fprintf (stderr, " [-c] Tx counting sequence\n"); + fprintf (stderr, " [-D] DC output\n"); + + fprintf (stderr, " [-B ] set fast usb block_size\n"); + fprintf (stderr, " [-N ] set fast usb nblocks\n"); + fprintf (stderr, " [-R] set real time scheduling: SCHED_FIFO; pri = midpoint\n"); + + exit (1); +} + +static void +die (const char *msg) +{ + fprintf (stderr, "die: %s: %s\n", prog_name, msg); + exit (1); +} + +static void +dump_codec_regs (usrp_basic *u, int which_codec, FILE *fp) +{ + for (int i = 0; i < 64; i++){ + unsigned char v; + u->_read_9862 (which_codec, i, &v); + fprintf (fp, "%2d: 0x%02x\n", i, v); + } + fflush (fp); +} + +static void +do_dump_codec_regs (usrp_basic *u) +{ + char name[100]; + strcpy (name, "regsXXXXXX"); + int fd = mkstemp (name); + if (fd == -1){ + perror (name); + } + else { + FILE *fp = fdopen (fd, "w"); + dump_codec_regs (u, 0, fp); + fclose (fp); + } +} + +int +main (int argc, char **argv) +{ + bool verbose_p = false; + bool dump_regs_p = false; + bool dc_p = false; + // bool loopback_p = false; + bool counting_p = false; + int max_bytes = 128 * (1L << 20); + int ch; + int which_board = 0; + int interp = 16; // 32.0 MB/sec + double center_freq = 0; + double ampl = 10000; + int fusb_block_size = 0; + int fusb_nblocks = 0; + bool realtime_p = false; + + + set_progname (argv[0]); + + while ((ch = getopt (argc, argv, "vfdcI:F:a:DM:B:N:R")) != EOF){ + switch (ch){ + case 'f': + max_bytes = 0; + break; + + case 'v': + verbose_p = true; + break; + + case 'd': + dump_regs_p = true; + break; + + case 'D': + dc_p = true; + break; + +#if 0 + case 'l': + loopback_p = true; + break; +#endif + + case 'c': + counting_p = true; + break; + + case 'I': + interp = strtol (optarg, 0, 0); + break; + + case 'F': + center_freq = strtod (optarg, 0); + break; + + case 'a': + ampl = strtod (optarg, 0); + break; + + case 'M': + max_bytes = strtol (optarg, 0, 0) * (1L << 20); + if (max_bytes < 0) max_bytes = 0; + break; + + case 'B': + fusb_block_size = strtol (optarg, 0, 0); + break; + + case 'N': + fusb_nblocks = strtol (optarg, 0, 0); + break; + + case 'R': + realtime_p = true; + break; + + default: + usage (); + } + } + +#ifdef HAVE_SCHED_SETSCHEDULER + if (realtime_p){ + int policy = SCHED_FIFO; + int pri = (sched_get_priority_max (policy) - sched_get_priority_min (policy)) / 2; + int pid = 0; // this process + + struct sched_param param; + memset(¶m, 0, sizeof(param)); + param.sched_priority = pri; + int result = sched_setscheduler(pid, policy, ¶m); + if (result != 0){ + perror ("sched_setscheduler: failed to set real time priority"); + } + else + printf("SCHED_FIFO enabled with priority = %d\n", pri); + } +#endif + + usrp_standard_tx *utx; + + utx = usrp_standard_tx::make (which_board, + interp, + 1, // nchan + -1, // mux + fusb_block_size, + fusb_nblocks); + + if (utx == 0) + die ("usrp_standard_tx::make"); + + if (!utx->set_tx_freq (0, center_freq)) + die ("utx->set_tx_freq"); + + if (dump_regs_p) + do_dump_codec_regs (utx); + + + fflush (stdout); + fflush (stderr); + + utx->start(); // start data xfers + + test_output (utx, max_bytes, ampl, dc_p, counting_p); + + delete utx; + + return 0; +} + + +static bool +test_output (usrp_standard_tx *utx, int max_bytes, double ampl, + bool dc_p, bool counting_p) +{ + static const int BUFSIZE = utx->block_size(); + static const int N = BUFSIZE/sizeof (short); + + short buf[N]; + int nbytes = 0; + int counter = 0; + + static const int PERIOD = 65; // any value is valid + static const int PATLEN = 2 * PERIOD; + short pattern[PATLEN]; + + for (int i = 0; i < PERIOD; i++){ + if (dc_p){ + pattern[2*i+0] = host_to_usrp_short ((short) ampl); + pattern[2*i+1] = host_to_usrp_short ((short) 0); + } + else { + pattern[2*i+0] = host_to_usrp_short ((short) (ampl * cos (2*M_PI * i / PERIOD))); + pattern[2*i+1] = host_to_usrp_short ((short) (ampl * sin (2*M_PI * i / PERIOD))); + } + } + + double start_wall_time = get_elapsed_time (); + double start_cpu_time = get_cpu_usage (); + + bool underrun; + int nunderruns = 0; + int pi = 0; + + for (nbytes = 0; max_bytes == 0 || nbytes < max_bytes; nbytes += BUFSIZE){ + + if (counting_p){ + for (int i = 0; i < N; i++) + buf[i] = host_to_usrp_short (counter++ & 0xffff); + } + else { + for (int i = 0; i < N; i++){ + buf[i] = pattern[pi]; + pi++; + if (pi >= PATLEN) + pi = 0; + } + } + + int ret = utx->write (buf, sizeof (buf), &underrun); + if ((unsigned) ret != sizeof (buf)){ + fprintf (stderr, "test_output: error, ret = %d\n", ret); + } + + if (underrun){ + nunderruns++; + printf ("tx_underrun\n"); + //printf ("tx_underrun %9d %6d\n", nbytes, nbytes/BUFSIZE); + } + } + + utx->wait_for_completion (); + + double stop_wall_time = get_elapsed_time (); + double stop_cpu_time = get_cpu_usage (); + + double delta_wall = stop_wall_time - start_wall_time; + double delta_cpu = stop_cpu_time - start_cpu_time; + + printf ("xfered %.3g bytes in %.3g seconds. %.4g bytes/sec. cpu time = %.3g\n", + (double) max_bytes, delta_wall, max_bytes / delta_wall, delta_cpu); + + printf ("%d underruns\n", nunderruns); + + return true; +} diff --git a/host/apps/time_stuff.c b/host/apps/time_stuff.c new file mode 100644 index 0000000..aa62e9a --- /dev/null +++ b/host/apps/time_stuff.c @@ -0,0 +1,68 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include "time_stuff.h" + +#include +#ifdef HAVE_SYS_RESOURCE_H +#include +#endif +#include + +static double +timeval_to_secs (struct timeval *tv) +{ + return (double) tv->tv_sec + (double) tv->tv_usec * 1e-6; +} + +double +get_cpu_usage (void) +{ +#ifdef HAVE_GETRUSAGE + struct rusage ru; + + if (getrusage (RUSAGE_SELF, &ru) != 0) + return 0; + + return timeval_to_secs (&ru.ru_utime) + timeval_to_secs (&ru.ru_stime); +#else + return 0; /* FIXME */ +#endif +} + +/* + * return elapsed time (wall time) in seconds + */ +double +get_elapsed_time (void) +{ + struct timeval tv; + if (gettimeofday (&tv, 0) != 0) + return 0; + + return timeval_to_secs (&tv); +} + diff --git a/host/apps/time_stuff.h b/host/apps/time_stuff.h new file mode 100644 index 0000000..c995ef6 --- /dev/null +++ b/host/apps/time_stuff.h @@ -0,0 +1,48 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifndef _TIME_STUFF_H_ +#define _TIME_STUFF_H_ + + + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * return USER + SYS cpu time in seconds + */ +double get_cpu_usage (void); + +/* + * return elapsed time in seconds + */ +double get_elapsed_time (void); + + +#ifdef __cplusplus +} +#endif + + +#endif /* _TIME_STUFF_H_ */ diff --git a/host/apps/usrp_cal_dc_offset.cc b/host/apps/usrp_cal_dc_offset.cc new file mode 100644 index 0000000..2308bdd --- /dev/null +++ b/host/apps/usrp_cal_dc_offset.cc @@ -0,0 +1,242 @@ +/* -*- c++ -*- */ +/* + * Copyright 2005 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include +#include +#include +#include +#include /* needed for usb functions */ +#include +#include +#include +#include +#include "usrp_local_sighandler.h" +#include "usrp_standard.h" +#include "usrp_bytesex.h" + +char *prog_name; + + + + +static void +run_cal(usrp_standard_rx *u, int which_side, int decim, bool verbose_p) +{ + static const int BUFSIZE = u->block_size(); + static const int N = BUFSIZE/sizeof (short); + short buf[N]; + bool cal_done = false; + bool overrun; + int noverruns = 0; + + static const double K = 1e-4; + long integrator[2]; + int offset[2]; + + integrator[0] = 0; + integrator[1] = 0; + offset[0] = 0; + offset[1] = 0; + + u->start(); // start data xfers + + while(!cal_done){ + int ret = u->read (buf, sizeof (buf), &overrun); + if (ret != (int) sizeof (buf)){ + fprintf (stderr, "usrp_cal_dc_offset: error, ret = %d\n", ret); + continue; + } + if (overrun){ + fprintf (stderr, "O"); + noverruns++; + } + else { + // fputc('.', stderr); + } + + static const int MAX = (1L << 30); // 1G + + for (int i = 0; i < N/2; i++){ + for (int n = 0; n < 2; n++){ + integrator[n] = integrator[n] + buf[2*i + n]; + if (integrator[n] > MAX) + integrator[n] = MAX; + else if (integrator[n] < -MAX) + integrator[n] = -MAX; + } + } + +#if 1 + for (int n = 0; n < 2; n++){ + offset[n] = (int) rint(integrator[n] * K); + if (offset[n] > 32767) + offset[n] = 32767; + else if (offset[n] < -32767) + offset[n] = -32767; + u->set_adc_offset(which_side * 2 + n, offset[n]); + } +#else + offset[0] = (int) rint(integrator[0] * K); + if (offset[0] > 32767) + offset[0] = 32767; + else if (offset[0] < -32767) + offset[0] = -32767; + u->set_adc_offset(which_side * 2 + 0, offset[0]); + u->set_adc_offset(which_side * 2 + 1, offset[0]); +#endif + + + printf ("%9ld : %6d\t\t%9ld : %6d\n", + integrator[0], offset[0], integrator[1], offset[1]); + } + + u->stop(); +} + + +static void +set_progname (char *path) +{ + char *p = strrchr (path, '/'); + if (p != 0) + prog_name = p+1; + else + prog_name = path; +} + +static void +usage () +{ + fprintf(stderr, "usage: %s [-v] [-w which_side] [-D decim] [-c ddc_freq] [-g gain]\n", prog_name); + fprintf(stderr, " [-S fusb_block_size] [-N fusb_nblocks]\n"); + exit (1); +} + +static void +die (const char *msg) +{ + fprintf (stderr, "die: %s: %s\n", prog_name, msg); + exit (1); +} + +int +main (int argc, char **argv) +{ + int ch; + int decim = 128; // 500 kS/sec + bool verbose_p = false; + int which_board = 0; + int which_side = 0; + double ddc_freq = 0; + int fusb_block_size = 1024; + int fusb_nblocks = 4; + double pga_gain = 0.0; + + set_progname(argv[0]); + + while ((ch = getopt (argc, argv, "vw:D:c:S:N:g:")) != EOF){ + switch (ch){ + + case 'w': + which_side = strtol (optarg, 0, 0); + if (which_side < 0 || which_side > 1) + usage(); + break; + + case 'D': + decim = strtol (optarg, 0, 0); + if (decim < 1) + usage(); + break; + + case 'c': + ddc_freq = strtod (optarg, 0); + break; + + case 'v': + verbose_p = true; + break; + + case 'S': + fusb_block_size = strtol(optarg, 0, 0); + break; + + case 'N': + fusb_nblocks = strtol(optarg, 0, 0); + break; + + case 'g': + pga_gain = strtod (optarg, 0); + break; + + default: + usage (); + } + } + + int nchannels = 1; + int mode = usrp_standard_rx::FPGA_MODE_NORMAL; + int mux; + + if (which_side == 0) + mux = 0x00000010; + else + mux = 0x00000032; + +#ifdef SIGINT + usrp_local_sighandler sigint (SIGINT, usrp_local_sighandler::throw_signal); +#endif +#ifdef SIGQUIT + usrp_local_sighandler sigquit (SIGQUIT, usrp_local_sighandler::throw_signal); +#endif + + usrp_standard_rx *urx = + usrp_standard_rx::make(which_board, decim, + nchannels, mux, mode, + fusb_block_size, fusb_nblocks); + if (urx == 0) + die("usrp_standard_rx::make"); + + try { + + if (!urx->set_rx_freq(0, ddc_freq)) + die("urx->set_rx_freq"); + + urx->set_pga(2 * which_side + 0, pga_gain); + urx->set_pga(2 * which_side + 1, pga_gain); + + run_cal(urx, which_side, decim, verbose_p); + } + catch (usrp_signal &sig){ + fprintf (stderr, "usrp_cal_dc_offset: caught %s\n", sig.name().c_str()); + } + catch(...){ + fprintf (stderr, "usrp_cal_dc_offset: caught something\n"); + } + + delete urx; +} + diff --git a/host/apps/usrper.cc b/host/apps/usrper.cc new file mode 100644 index 0000000..51c5ee6 --- /dev/null +++ b/host/apps/usrper.cc @@ -0,0 +1,352 @@ +/* -*- c++ -*- */ +/* + * USRP - Universal Software Radio Peripheral + * + * Copyright (C) 2003,2004 Free Software Foundation, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include /* needed for usb functions */ +#include +#include +#include + +#include "usrp_prims.h" +#include "usrp_spi_defs.h" + +char *prog_name; + + +static void +set_progname (char *path) +{ + char *p = strrchr (path, '/'); + if (p != 0) + prog_name = p+1; + else + prog_name = path; +} + +static void +usage () +{ + fprintf (stderr, "usage: \n"); + fprintf (stderr, " %s [-v] [-w ] [-x] ...\n", prog_name); + fprintf (stderr, " %s load_standard_bits\n", prog_name); + fprintf (stderr, " %s load_firmware \n", prog_name); + fprintf (stderr, " %s load_fpga \n", prog_name); + fprintf (stderr, " %s write_fpga_reg \n", prog_name); + fprintf (stderr, " %s set_fpga_reset {on|off}\n", prog_name); + fprintf (stderr, " %s set_fpga_tx_enable {on|off}\n", prog_name); + fprintf (stderr, " %s set_fpga_rx_enable {on|off}\n", prog_name); + fprintf (stderr, " ----- diagnostic routines -----\n"); + fprintf (stderr, " %s led0 {on|off}\n", prog_name); + fprintf (stderr, " %s led1 {on|off}\n", prog_name); + fprintf (stderr, " %s set_hash0 \n", prog_name); + fprintf (stderr, " %s get_hash0\n", prog_name); + fprintf (stderr, " %s i2c_read i2c_addr len\n", prog_name); + fprintf (stderr, " %s i2c_write i2c_addr \n", prog_name); + fprintf (stderr, " %s 9862a_write regno value\n", prog_name); + fprintf (stderr, " %s 9862b_write regno value\n", prog_name); + fprintf (stderr, " %s 9862a_read regno\n", prog_name); + fprintf (stderr, " %s 9862b_read regno\n", prog_name); + exit (1); +} + +static void +die (const char *msg) +{ + fprintf (stderr, "%s (die): %s\n", prog_name, msg); + exit (1); +} + +static int +hexval (char ch) +{ + if ('0' <= ch && ch <= '9') + return ch - '0'; + + if ('a' <= ch && ch <= 'f') + return ch - 'a' + 10; + + if ('A' <= ch && ch <= 'F') + return ch - 'A' + 10; + + return -1; +} + +static unsigned char * +hex_string_to_binary (const char *string, int *lenptr) +{ + int sl = strlen (string); + if (sl & 0x01){ + fprintf (stderr, "%s: odd number of chars in \n", prog_name); + return 0; + } + + int len = sl / 2; + *lenptr = len; + unsigned char *buf = new unsigned char [len]; + + for (int i = 0; i < len; i++){ + int hi = hexval (string[2 * i]); + int lo = hexval (string[2 * i + 1]); + if (hi < 0 || lo < 0){ + fprintf (stderr, "%s: invalid char in \n", prog_name); + delete [] buf; + return 0; + } + buf[i] = (hi << 4) | lo; + } + return buf; +} + +static void +print_hex (FILE *fp, unsigned char *buf, int len) +{ + for (int i = 0; i < len; i++){ + fprintf (fp, "%02x", buf[i]); + } + fprintf (fp, "\n"); +} + +static void +chk_result (bool ok) +{ + if (!ok){ + fprintf (stderr, "%s: failed\n", prog_name); + exit (1); + } +} + +static bool +get_on_off (const char *s) +{ + if (strcmp (s, "on") == 0) + return true; + + if (strcmp (s, "off") == 0) + return false; + + usage (); // no return + return false; +} + + +int +main (int argc, char **argv) +{ + int ch; + bool verbose = false; + int which_board = 0; + bool fx2_ok_p = false; + + set_progname (argv[0]); + + while ((ch = getopt (argc, argv, "vw:x")) != EOF){ + switch (ch){ + + case 'v': + verbose = true; + break; + + case 'w': + which_board = strtol (optarg, 0, 0); + break; + + case 'x': + fx2_ok_p = true; + break; + + default: + usage (); + } + } + + int nopts = argc - optind; + + if (nopts < 1) + usage (); + + const char *cmd = argv[optind++]; + nopts--; + + usrp_one_time_init (); + + + struct usb_device *udev = usrp_find_device (which_board, fx2_ok_p); + if (udev == 0){ + fprintf (stderr, "%s: failed to find usrp[%d]\n", prog_name, which_board); + exit (1); + } + + if (usrp_unconfigured_usrp_p (udev)){ + fprintf (stderr, "%s: found unconfigured usrp; needs firmware.\n", prog_name); + } + + if (usrp_fx2_p (udev)){ + fprintf (stderr, "%s: found unconfigured FX2; needs firmware.\n", prog_name); + } + + struct usb_dev_handle *udh = usrp_open_cmd_interface (udev); + if (udh == 0){ + fprintf (stderr, "%s: failed to open_cmd_interface\n", prog_name); + exit (1); + } + +#define CHKARGS(n) if (nopts != n) usage (); else + + if (strcmp (cmd, "led0") == 0){ + CHKARGS (1); + bool on = get_on_off (argv[optind]); + chk_result (usrp_set_led (udh, 0, on)); + } + else if (strcmp (cmd, "led1") == 0){ + CHKARGS (1); + bool on = get_on_off (argv[optind]); + chk_result (usrp_set_led (udh, 1, on)); + } + else if (strcmp (cmd, "led2") == 0){ + CHKARGS (1); + bool on = get_on_off (argv[optind]); + chk_result (usrp_set_led (udh, 2, on)); + } + else if (strcmp (cmd, "set_hash0") == 0){ + CHKARGS (1); + char *p = argv[optind]; + unsigned char buf[16]; + + memset (buf, ' ', 16); + for (int i = 0; i < 16 && *p; i++) + buf[i] = *p++; + + chk_result (usrp_set_hash (udh, 0, buf)); + } + else if (strcmp (cmd, "get_hash0") == 0){ + CHKARGS (0); + unsigned char buf[17]; + memset (buf, 0, 17); + bool r = usrp_get_hash (udh, 0, buf); + if (r) + printf ("hash: %s\n", buf); + chk_result (r); + } + else if (strcmp (cmd, "load_fpga") == 0){ + CHKARGS (1); + char *filename = argv[optind]; + chk_result (usrp_load_fpga (udh, filename, true)); + } + else if (strcmp (cmd, "load_firmware") == 0){ + CHKARGS (1); + char *filename = argv[optind]; + chk_result (usrp_load_firmware (udh, filename, true)); + } + else if (strcmp (cmd, "write_fpga_reg") == 0){ + CHKARGS (2); + chk_result (usrp_write_fpga_reg (udh, strtoul (argv[optind], 0, 0), + strtoul(argv[optind+1], 0, 0))); + } + else if (strcmp (cmd, "set_fpga_reset") == 0){ + CHKARGS (1); + chk_result (usrp_set_fpga_reset (udh, get_on_off (argv[optind]))); + } + else if (strcmp (cmd, "set_fpga_tx_enable") == 0){ + CHKARGS (1); + chk_result (usrp_set_fpga_tx_enable (udh, get_on_off (argv[optind]))); + } + else if (strcmp (cmd, "set_fpga_rx_enable") == 0){ + CHKARGS (1); + chk_result (usrp_set_fpga_rx_enable (udh, get_on_off (argv[optind]))); + } + else if (strcmp (cmd, "load_standard_bits") == 0){ + CHKARGS (0); + usrp_close_interface (udh); + udh = 0; + chk_result (usrp_load_standard_bits (which_board, true)); + } + else if (strcmp (cmd, "i2c_read") == 0){ + CHKARGS (2); + int i2c_addr = strtol (argv[optind], 0, 0); + int len = strtol (argv[optind + 1], 0, 0); + if (len < 0) + chk_result (0); + + unsigned char *buf = new unsigned char [len]; + bool result = usrp_i2c_read (udh, i2c_addr, buf, len); + if (!result){ + chk_result (0); + } + print_hex (stdout, buf, len); + } + else if (strcmp (cmd, "i2c_write") == 0){ + CHKARGS (2); + int i2c_addr = strtol (argv[optind], 0, 0); + int len; + char *hex_string = argv[optind + 1]; + unsigned char *buf = hex_string_to_binary (hex_string, &len); + if (buf == 0) + chk_result (0); + + bool result = usrp_i2c_write (udh, i2c_addr, buf, len); + chk_result (result); + } + else if (strcmp (cmd, "9862a_write") == 0){ + CHKARGS (2); + int regno = strtol (argv[optind], 0, 0); + int value = strtol (argv[optind+1], 0, 0); + chk_result (usrp_9862_write (udh, 0, regno, value)); + } + else if (strcmp (cmd, "9862b_write") == 0){ + CHKARGS (2); + int regno = strtol (argv[optind], 0, 0); + int value = strtol (argv[optind+1], 0, 0); + chk_result (usrp_9862_write (udh, 1, regno, value)); + } + else if (strcmp (cmd, "9862a_read") == 0){ + CHKARGS (1); + int regno = strtol (argv[optind], 0, 0); + unsigned char value; + bool result = usrp_9862_read (udh, 0, regno, &value); + if (!result){ + chk_result (0); + } + fprintf (stdout, "reg[%d] = 0x%02x\n", regno, value); + } + else if (strcmp (cmd, "9862b_read") == 0){ + CHKARGS (1); + int regno = strtol (argv[optind], 0, 0); + unsigned char value; + bool result = usrp_9862_read (udh, 1, regno, &value); + if (!result){ + chk_result (0); + } + fprintf (stdout, "reg[%d] = 0x%02x\n", regno, value); + } + else { + usage (); + } + + if (udh){ + usrp_close_interface (udh); + udh = 0; + } + + return 0; +} diff --git a/host/lib/Makefile.am b/host/lib/Makefile.am new file mode 100644 index 0000000..e2086bc --- /dev/null +++ b/host/lib/Makefile.am @@ -0,0 +1,137 @@ +# +# USRP - Universal Software Radio Peripheral +# +# Copyright (C) 2003,2004,2006 Free Software Foundation, Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +# +INCLUDES = -I$(top_srcdir)/usrp/firmware/include + +lib_LTLIBRARIES = libusrp.la + + +EXTRA_DIST = \ + std_paths.h.in \ + usrp_dbid.dat + + +BUILT_SOURCES = \ + usrp_dbid.h \ + usrp_dbid.cc \ + usrp_dbid.py + + +# ---------------------------------------------------------------- +# FUSB_TECH is set at configure time by way of +# usrp/config/usrp_fusb_tech.m4. +# It indicates which fast usb strategy we should be building. +# We currently implement "generic", "darwin", "win32" and "linux" + + +generic_CODE = \ + fusb_generic.cc \ + fusb_sysconfig_generic.cc + +darwin_CODE = \ + fusb_darwin.cc \ + fusb_sysconfig_darwin.cc \ + README_OSX \ + circular_buffer.h \ + circular_linked_list.h \ + darwin_libusb.h \ + mld_threads.h + +win32_CODE = \ + fusb_win32.cc \ + fusb_sysconfig_win32.cc + +linux_CODE = \ + fusb_linux.cc \ + fusb_sysconfig_linux.cc + + +# +# include each _CODE entry here... +# +EXTRA_libusrp_la_SOURCES = \ + $(generic_CODE) \ + $(darwin_CODE) \ + $(win32_CODE) \ + $(linux_CODE) + + +# work around automake deficiency +libusrp_la_common_SOURCES = \ + fusb.cc \ + md5.c \ + usrp_basic.cc \ + usrp_config.cc \ + usrp_dbid.cc \ + usrp_local_sighandler.cc \ + usrp_prims.cc \ + usrp_standard.cc + + +if FUSB_TECH_generic +libusrp_la_SOURCES = $(libusrp_la_common_SOURCES) $(generic_CODE) +endif + +if FUSB_TECH_darwin +libusrp_la_SOURCES = $(libusrp_la_common_SOURCES) $(darwin_CODE) +endif + +if FUSB_TECH_win32 +libusrp_la_SOURCES = $(libusrp_la_common_SOURCES) $(win32_CODE) +endif + +if FUSB_TECH_linux +libusrp_la_SOURCES = $(libusrp_la_common_SOURCES) $(linux_CODE) +endif + + +libusrp_la_LDFLAGS = $(NO_UNDEFINED) -version-info 0:0:0 +libusrp_la_LIBADD = $(USB_LIBS) ../misc/libmisc.la + +include_HEADERS = \ + usrp_basic.h \ + usrp_bytesex.h \ + usrp_config.h \ + usrp_dbid.h \ + usrp_prims.h \ + usrp_slots.h \ + usrp_standard.h + +noinst_HEADERS = \ + ad9862.h \ + fusb.h \ + fusb_darwin.h \ + fusb_win32.h \ + fusb_generic.h \ + fusb_linux.h \ + md5.h \ + rate_to_regval.h \ + usrp_local_sighandler.h + +python_PYTHON = \ + usrp_dbid.py + +noinst_PYTHON = \ + gen_usrp_dbid.py + +usrp_dbid.py usrp_dbid.h usrp_dbid.cc: gen_usrp_dbid.py usrp_dbid.dat + PYTHONPATH=$(top_srcdir)/usrp/src srcdir=$(srcdir) $(srcdir)/gen_usrp_dbid.py $(srcdir)/usrp_dbid.dat + +MOSTLYCLEANFILES = \ + $(BUILT_SOURCES) *~ *.pyc diff --git a/host/lib/README_OSX b/host/lib/README_OSX new file mode 100644 index 0000000..20230f1 --- /dev/null +++ b/host/lib/README_OSX @@ -0,0 +1,63 @@ +USRP Darwin Fast USB Changes +Version 0.2 of 2006-04-27 +Michael Dickens + +The files included in this archive are: + +circular_buffer.h +circular_linked_list.h +darwin_libusb.h +fusb_darwin.cc +fusb_darwin.h +mld_threads.h + +These files allow GNURadio code for Darwin / MaxOS X to talk to the +USRP via USB 2.0 at rates up to around 30 Mega-Bytes/sec (MBps), up +from 4-8 MBps without the changes. + +I implemented the buffering myself; there are probably GR buffers +available which would do the work but as this is "beta" software it's +a good place to start. Speed improvements are made by porting +LIBUSB's non-true async bulk read and write functions into USRP's +"fusb", and upgrading them to handle -true- async transfers. +Unfortunately, the easiest way to do this is to spawn a thread or 2 to +handle the "async" part of the transfers. This implementation uses +Darwin's pthreads to do the work for mutexes, conditions, and threads. +Previous implementations (0.1 and before) used "omni_threads" as +provided by gnuradio-core, which caused issues with compiling and +execution ... I'm glad that this is no longer the case. + +As far as I have tested, there is no way to improve the throughput to +32+ MBps without moving into Darwin's "port"s ... a kernel-level data +transport method with a user/application layer for USB-specific +functions. Unfortunately, Apple's documentation for these "port"s is +minimal; I have learned more from reading the Darwin source code +< http://darwinsource.opendarwin.org/ > than by reading Apple's +documents! This would also require -not- using LIBUSB, of which the +removal from the rest of the USRP code would be potentially tedious. + +If you run into issues either compiling or testing the USRP on +OSX, please send me a note. + +(1) Go through the bootstrap, configure, compile, and install as +usual (e.g. see < http://www.nd.edu/~mdickens/GNURadio/ > for my +usual). + +(2) from .../usrp/host/apps : run the scripts +++++++++++++++++ +./test_usrp_standard_tx +./test_usrp_standard_rx +++++++++++++++++ + +For -all- systems I've tested on thus far, both of these return +exactly 41 overruns / underruns, and -most- systems start out with a +stalled pipe. This stall comes in a usb_control funciton call to +LIBUSB; one would have to change the LIBUSB code to handle this issue. + +(3) from gr-build/gnuradio-examples/python/usrp : +++++++++++++++++ +./benchmark_usb.py +++++++++++++++++ + +(4) If you get to here, the try doing the FM receiver (gui or not). +If that sounds correct, then the USB is working. Yay! \ No newline at end of file diff --git a/host/lib/ad9862.h b/host/lib/ad9862.h new file mode 100644 index 0000000..70cb202 --- /dev/null +++ b/host/lib/ad9862.h @@ -0,0 +1,221 @@ +/* -*- c++ -*- */ +/* + * Copyright 2004 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifndef INCLUDED_AD9862_H +#define INCLUDED_AD9862_H + +/* + * Analog Devices AD9862 registers and some fields + */ + +#define BEGIN_AD9862 namespace ad9862 { +#define END_AD962 } +#define DEF static const int + +BEGIN_AD9862; + +DEF REG_GENERAL = 0; +DEF REG_RX_PWR_DN = 1; +DEF RX_PWR_DN_VREF_DIFF = (1 << 7); +DEF RX_PWR_DN_VREF = (1 << 6); +DEF RX_PWR_DN_RX_DIGIGAL = (1 << 5); +DEF RX_PWR_DN_RX_B = (1 << 4); +DEF RX_PWR_DN_RX_A = (1 << 3); +DEF RX_PWR_DN_BUF_B = (1 << 2); +DEF RX_PWR_DN_BUF_A = (1 << 1); +DEF RX_PWR_DN_ALL = (1 << 0); + +DEF REG_RX_A = 2; // bypass input buffer / RxPGA +DEF REG_RX_B = 3; // pypass input buffer / RxPGA +DEF RX_X_BYPASS_INPUT_BUFFER = (1 << 7); + +DEF REG_RX_MISC = 4; +DEF RX_MISC_HS_DUTY_CYCLE = (1 << 2); +DEF RX_MISC_SHARED_REF = (1 << 1); +DEF RX_MISC_CLK_DUTY = (1 << 0); + +DEF REG_RX_IF = 5; +DEF RX_IF_THREE_STATE = (1 << 4); +DEF RX_IF_USE_CLKOUT1 = (0 << 3); +DEF RX_IF_USE_CLKOUT2 = (1 << 3); // aka Rx Retime +DEF RX_IF_2S_COMP = (1 << 2); +DEF RX_IF_INV_RX_SYNC = (1 << 1); +DEF RX_IF_MUX_OUT = (1 << 0); + +DEF REG_RX_DIGITAL = 6; +DEF RX_DIGITAL_2_CHAN = (1 << 3); +DEF RX_DIGITAL_KEEP_MINUS_VE = (1 << 2); +DEF RX_DIGITAL_HILBERT = (1 << 1); +DEF RX_DIGITAL_DECIMATE = (1 << 0); + +DEF REG_RESERVED_7 = 7; + +DEF REG_TX_PWR_DN = 8; +DEF TX_PWR_DN_ALT_TIMING_MODE = (1 << 5); +DEF TX_PWR_DN_TX_OFF_ENABLE = (1 << 4); +DEF TX_PWR_DN_TX_DIGITAL = (1 << 3); +DEF TX_PWR_DN_TX_ANALOG_B = 0x4; +DEF TX_PWR_DN_TX_ANALOG_A = 0x2; +DEF TX_PWR_DN_TX_ANALOG_BOTH = 0x7; + +DEF REG_RESERVED_9 = 9; + +DEF REG_TX_A_OFFSET_LO = 10; +DEF REG_TX_A_OFFSET_HI = 11; +DEF REG_TX_B_OFFSET_LO = 12; +DEF REG_TX_B_OFFSET_HI = 13; + +DEF REG_TX_A_GAIN = 14; // fine trim for matching +DEF REG_TX_B_GAIN = 15; // fine trim for matching +DEF TX_X_GAIN_COARSE_FULL = (3 << 6); +DEF TX_X_GAIN_COARSE_1_HALF = (1 << 6); +DEF TX_X_GAIN_COARSE_1_ELEVENTH = (0 << 6); + +DEF REG_TX_PGA = 16; // 20 dB continuous gain in 0.1 dB steps + // 0x00 = min gain (-20 dB) + // 0xff = max gain ( 0 dB) + +DEF REG_TX_MISC = 17; +DEF TX_MISC_SLAVE_ENABLE = (1 << 1); +DEF TX_MISC_TX_PGA_FAST = (1 << 0); + +DEF REG_TX_IF = 18; +DEF TX_IF_USE_CLKOUT2 = (0 << 6); +DEF TX_IF_USE_CLKOUT1 = (1 << 6); // aka Tx Retime +DEF TX_IF_I_FIRST = (0 << 5); +DEF TX_IF_Q_FIRST = (1 << 5); +DEF TX_IF_INV_TX_SYNC = (1 << 4); +DEF TX_IF_2S_COMP = (1 << 3); +DEF TX_IF_INVERSE_SAMPLE = (1 << 2); +DEF TX_IF_TWO_EDGES = (1 << 1); +DEF TX_IF_INTERLEAVED = (1 << 0); + +DEF REG_TX_DIGITAL = 19; +DEF TX_DIGITAL_2_DATA_PATHS = (1 << 4); +DEF TX_DIGITAL_KEEP_NEGATIVE = (1 << 3); +DEF TX_DIGITAL_HILBERT = (1 << 2); +DEF TX_DIGITAL_INTERPOLATE_NONE = 0x0; +DEF TX_DIGITAL_INTERPOLATE_2X = 0x1; +DEF TX_DIGITAL_INTERPOLATE_4X = 0x2; + +DEF REG_TX_MODULATOR = 20; +DEF TX_MODULATOR_NEG_FINE_TUNE = (1 << 5); +DEF TX_MODULATOR_DISABLE_NCO = (0 << 4); +DEF TX_MODULATOR_ENABLE_NCO = (1 << 4); // aka Fine Mode +DEF TX_MODULATOR_REAL_MIX_MODE = (1 << 3); +DEF TX_MODULATOR_NEG_COARSE_TUNE = (1 << 2); +DEF TX_MODULATOR_COARSE_MODULATION_NONE = 0x0; +DEF TX_MODULATOR_COARSE_MODULATION_F_OVER_4 = 0x1; +DEF TX_MODULATOR_COARSE_MODULATION_F_OVER_8 = 0x2; +DEF TX_MODULATOR_CM_MASK = 0x7; + + +DEF REG_TX_NCO_FTW_7_0 = 21; +DEF REG_TX_NCO_FTW_15_8 = 22; +DEF REG_TX_NCO_FTW_23_16= 23; + +DEF REG_DLL = 24; +DEF DLL_DISABLE_INTERNAL_XTAL_OSC = (1 << 6); // aka Input Clock Ctrl +DEF DLL_ADC_DIV2 = (1 << 5); +DEF DLL_MULT_1X = (0 << 3); +DEF DLL_MULT_2X = (1 << 3); +DEF DLL_MULT_4X = (2 << 3); +DEF DLL_PWR_DN = (1 << 2); +// undefined bit = (1 << 1); +DEF DLL_FAST = (1 << 0); + +DEF REG_CLKOUT = 25; +DEF CLKOUT2_EQ_DLL = (0 << 6); +DEF CLKOUT2_EQ_DLL_OVER_2 = (1 << 6); +DEF CLKOUT2_EQ_DLL_OVER_4 = (2 << 6); +DEF CLKOUT2_EQ_DLL_OVER_8 = (3 << 6); +DEF CLKOUT_INVERT_CLKOUT2 = (1 << 5); +DEF CLKOUT_DISABLE_CLKOUT2 = (1 << 4); +// undefined bit = (1 << 3); +// undefined bit = (1 << 2); +DEF CLKOUT_INVERT_CLKOUT1 = (1 << 1); +DEF CLKOUT_DISABLE_CLKOUT1 = (1 << 0); + +DEF REG_AUX_ADC_A2_LO = 26; +DEF REG_AUX_ADC_A2_HI = 27; +DEF REG_AUX_ADC_A1_LO = 28; +DEF REG_AUX_ADC_A1_HI = 29; +DEF REG_AUX_ADC_B2_LO = 30; +DEF REG_AUX_ADC_B2_HI = 31; +DEF REG_AUX_ADC_B1_LO = 32; +DEF REG_AUX_ADC_B1_HI = 33; + +DEF REG_AUX_ADC_CTRL = 34; +DEF AUX_ADC_CTRL_AUX_SPI = (1 << 7); +DEF AUX_ADC_CTRL_SELBNOTA = (1 << 6); +DEF AUX_ADC_CTRL_REFSEL_B = (1 << 5); +DEF AUX_ADC_CTRL_SELECT_B2 = (0 << 4); +DEF AUX_ADC_CTRL_SELECT_B1 = (1 << 4); +DEF AUX_ADC_CTRL_START_B = (1 << 3); +DEF AUX_ADC_CTRL_REFSEL_A = (1 << 2); +DEF AUX_ADC_CTRL_SELECT_A2 = (0 << 1); +DEF AUX_ADC_CTRL_SELECT_A1 = (1 << 1); +DEF AUX_ADC_CTRL_START_A = (1 << 0); + +DEF REG_AUX_ADC_CLK = 35; +DEF AUX_ADC_CLK_CLK_OVER_4 = (1 << 0); + +DEF REG_AUX_DAC_A = 36; +DEF REG_AUX_DAC_B = 37; +DEF REG_AUX_DAC_C = 38; + +DEF REG_AUX_DAC_UPDATE = 39; +DEF AUX_DAC_UPDATE_SLAVE_ENABLE = (1 << 7); +DEF AUX_DAC_UPDATE_C = (1 << 2); +DEF AUX_DAC_UPDATE_B = (1 << 1); +DEF AUX_DAC_UPDATE_A = (1 << 0); + +DEF REG_AUX_DAC_PWR_DN = 40; +DEF AUX_DAC_PWR_DN_C = (1 << 2); +DEF AUX_DAC_PWR_DN_B = (1 << 1); +DEF AUX_DAC_PWR_DN_A = (1 << 0); + +DEF REG_AUX_DAC_CTRL = 41; +DEF AUX_DAC_CTRL_INV_C = (1 << 4); +DEF AUX_DAC_CTRL_INV_B = (1 << 2); +DEF AUX_DAC_CTRL_INV_A = (1 << 0); + +DEF REG_SIGDELT_LO = 42; +DEF REG_SIGDELT_HI = 43; + +// 44 to 48 reserved + +DEF REG_ADC_LOW_PWR_LO = 49; +DEF REG_ADC_LOW_PWR_HI = 50; + +// 51 to 62 reserved + +DEF REG_CHIP_ID = 63; + + +END_AD962; + +#undef DEF +#undef BEGIN_AD9862 +#undef END_AD962 + +#endif /* INCLUDED_AD9862_H */ diff --git a/host/lib/check_data.py b/host/lib/check_data.py new file mode 100755 index 0000000..0f8ea2e --- /dev/null +++ b/host/lib/check_data.py @@ -0,0 +1,50 @@ +#!/usr/bin/env python +# +# Copyright 2003 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. + +import sys +import struct + +fin = sys.stdin + +count = 0 +expected = 0 +last_correction = 0 + +while 1: + s = fin.read(2) + if not s or len(s) != 2: + break + + v, = struct.unpack ('H', s) + iv = int(v) & 0xffff + # print "%8d %6d 0x%04x" % (count, iv, iv) + if count & 0x1: # only counting on the Q channel + if (expected & 0xffff) != iv: + print "%8d (%6d) %6d 0x%04x" % (count, count - last_correction, iv, iv) + expected = iv # reset expected sequence + last_correction = count + expected = (expected + 1) & 0xffff + + count += 1 + + + + diff --git a/host/lib/circular_buffer.h b/host/lib/circular_buffer.h new file mode 100644 index 0000000..4d507c2 --- /dev/null +++ b/host/lib/circular_buffer.h @@ -0,0 +1,325 @@ +/* -*- c++ -*- */ +/* + * Copyright 2006 Free Software Foundation, Inc. + * + * This file is part of GNU Radio. + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifndef _CIRCULAR_BUFFER_H_ +#define _CIRCULAR_BUFFER_H_ + +#include "mld_threads.h" +#include + +#define DO_DEBUG 0 + +template class circular_buffer +{ +private: +// the buffer to use + T* d_buffer; + +// the following are in Items (type T) + UInt32 d_bufLen_I, d_readNdx_I, d_writeNdx_I; + UInt32 d_n_avail_write_I, d_n_avail_read_I; + +// stuff to control access to class internals + mld_mutex_ptr d_internal; + mld_condition_ptr d_readBlock, d_writeBlock; + +// booleans to decide how to control reading, writing, and aborting + bool d_doWriteBlock, d_doFullRead, d_doAbort; + + void delete_mutex_cond () { + if (d_internal) { + delete d_internal; + d_internal = NULL; + } + if (d_readBlock) { + delete d_readBlock; + d_readBlock = NULL; + } + if (d_writeBlock) { + delete d_writeBlock; + d_writeBlock = NULL; + } + }; + +public: + circular_buffer (UInt32 bufLen_I, + bool doWriteBlock = true, bool doFullRead = false) { + if (bufLen_I == 0) + throw std::runtime_error ("circular_buffer(): " + "Number of items to buffer must be > 0.\n"); + d_bufLen_I = bufLen_I; + d_buffer = (T*) new T[d_bufLen_I]; + d_doWriteBlock = doWriteBlock; + d_doFullRead = doFullRead; + d_internal = NULL; + d_readBlock = d_writeBlock = NULL; + reset (); +#if DO_DEBUG + fprintf (stderr, "c_b(): buf len (items) = %ld, " + "doWriteBlock = %s, doFullRead = %s\n", d_bufLen_I, + (d_doWriteBlock ? "true" : "false"), + (d_doFullRead ? "true" : "false")); +#endif + }; + + ~circular_buffer () { + delete_mutex_cond (); + delete [] d_buffer; + }; + + inline UInt32 n_avail_write_items () { + d_internal->lock (); + UInt32 retVal = d_n_avail_write_I; + d_internal->unlock (); + return (retVal); + }; + + inline UInt32 n_avail_read_items () { + d_internal->lock (); + UInt32 retVal = d_n_avail_read_I; + d_internal->unlock (); + return (retVal); + }; + + inline UInt32 buffer_length_items () {return (d_bufLen_I);}; + inline bool do_write_block () {return (d_doWriteBlock);}; + inline bool do_full_read () {return (d_doFullRead);}; + + void reset () { + d_doAbort = false; + bzero (d_buffer, d_bufLen_I * sizeof (T)); + d_readNdx_I = d_writeNdx_I = d_n_avail_read_I = 0; + d_n_avail_write_I = d_bufLen_I; + delete_mutex_cond (); + d_internal = new mld_mutex (); + d_readBlock = new mld_condition (); + d_writeBlock = new mld_condition (); + }; + +/* + * enqueue: add the given buffer of item-length to the queue, + * first-in-first-out (FIFO). + * + * inputs: + * buf: a pointer to the buffer holding the data + * + * bufLen_I: the buffer length in items (of the instantiated type) + * + * returns: + * -1: on overflow (write is not blocking, and data is being + * written faster than it is being read) + * 0: if nothing to do (0 length buffer) + * 1: if success + * 2: in the process of aborting, do doing nothing + * + * will throw runtime errors if inputs are improper: + * buffer pointer is NULL + * buffer length is larger than the instantiated buffer length + */ + + int enqueue (T* buf, UInt32 bufLen_I) { +#if DO_DEBUG + fprintf (stderr, "enqueue: buf = %X, bufLen = %ld.\n", + (unsigned int)buf, bufLen_I); +#endif + if (bufLen_I > d_bufLen_I) { + fprintf (stderr, "cannot add buffer longer (%ld" + ") than instantiated length (%ld" + ").\n", bufLen_I, d_bufLen_I); + throw std::runtime_error ("circular_buffer::enqueue()"); + } + + if (bufLen_I == 0) + return (0); + if (!buf) + throw std::runtime_error ("circular_buffer::enqueue(): " + "input buffer is NULL.\n"); + d_internal->lock (); + if (d_doAbort) { + d_internal->unlock (); + return (2); + } + if (bufLen_I > d_n_avail_write_I) { + if (d_doWriteBlock) { + while (bufLen_I > d_n_avail_write_I) { +#if DO_DEBUG + fprintf (stderr, "enqueue: #len > #a, waiting.\n"); +#endif + d_internal->unlock (); + d_writeBlock->wait (); + d_internal->lock (); + if (d_doAbort) { + d_internal->unlock (); +#if DO_DEBUG + fprintf (stderr, "enqueue: #len > #a, aborting.\n"); +#endif + return (2); + } +#if DO_DEBUG + fprintf (stderr, "enqueue: #len > #a, done waiting.\n"); +#endif + } + } else { + d_n_avail_read_I = d_bufLen_I - bufLen_I; + d_n_avail_write_I = bufLen_I; +#if DO_DEBUG + fprintf (stderr, "circular_buffer::enqueue: overflow\n"); +#endif + return (-1); + } + } + UInt32 n_now_I = d_bufLen_I - d_writeNdx_I, n_start_I = 0; + if (n_now_I > bufLen_I) + n_now_I = bufLen_I; + else if (n_now_I < bufLen_I) + n_start_I = bufLen_I - n_now_I; + bcopy (buf, &(d_buffer[d_writeNdx_I]), n_now_I * sizeof (T)); + if (n_start_I) { + bcopy (&(buf[n_now_I]), d_buffer, n_start_I * sizeof (T)); + d_writeNdx_I = n_start_I; + } else + d_writeNdx_I += n_now_I; + d_n_avail_read_I += bufLen_I; + d_n_avail_write_I -= bufLen_I; + d_readBlock->signal (); + d_internal->unlock (); + return (1); + }; + +/* + * dequeue: removes from the queue the number of items requested, or + * available, into the given buffer on a FIFO basis. + * + * inputs: + * buf: a pointer to the buffer into which to copy the data + * + * bufLen_I: pointer to the number of items to remove in items + * (of the instantiated type) + * + * returns: + * 0: if nothing to do (0 length buffer) + * 1: if success + * 2: in the process of aborting, do doing nothing + * + * will throw runtime errors if inputs are improper: + * buffer pointer is NULL + * buffer length pointer is NULL + * buffer length is larger than the instantiated buffer length + */ + + + int dequeue (T* buf, UInt32* bufLen_I) { +#if DO_DEBUG + fprintf (stderr, "dequeue: buf = %X, *bufLen = %ld.\n", + (unsigned int)buf, *bufLen_I); +#endif + if (!bufLen_I) + throw std::runtime_error ("circular_buffer::dequeue(): " + "input bufLen pointer is NULL.\n"); + if (!buf) + throw std::runtime_error ("circular_buffer::dequeue(): " + "input buffer pointer is NULL.\n"); + UInt32 l_bufLen_I = *bufLen_I; + if (l_bufLen_I == 0) + return (0); + if (l_bufLen_I > d_bufLen_I) { + fprintf (stderr, "cannot remove buffer longer (%ld" + ") than instantiated length (%ld" + ").\n", l_bufLen_I, d_bufLen_I); + throw std::runtime_error ("circular_buffer::dequeue()"); + } + + d_internal->lock (); + if (d_doAbort) { + d_internal->unlock (); + return (2); + } + if (d_doFullRead) { + while (d_n_avail_read_I < l_bufLen_I) { +#if DO_DEBUG + fprintf (stderr, "dequeue: #a < #len, waiting.\n"); +#endif + d_internal->unlock (); + d_readBlock->wait (); + d_internal->lock (); + if (d_doAbort) { + d_internal->unlock (); +#if DO_DEBUG + fprintf (stderr, "dequeue: #a < #len, aborting.\n"); +#endif + return (2); + } +#if DO_DEBUG + fprintf (stderr, "dequeue: #a < #len, done waiting.\n"); +#endif + } + } else { + while (d_n_avail_read_I == 0) { +#if DO_DEBUG + fprintf (stderr, "dequeue: #a == 0, waiting.\n"); +#endif + d_internal->unlock (); + d_readBlock->wait (); + d_internal->lock (); + if (d_doAbort) { + d_internal->unlock (); +#if DO_DEBUG + fprintf (stderr, "dequeue: #a == 0, aborting.\n"); +#endif + return (2); + } +#if DO_DEBUG + fprintf (stderr, "dequeue: #a == 0, done waiting.\n"); +#endif + } + } + if (l_bufLen_I > d_n_avail_read_I) + l_bufLen_I = d_n_avail_read_I; + UInt32 n_now_I = d_bufLen_I - d_readNdx_I, n_start_I = 0; + if (n_now_I > l_bufLen_I) + n_now_I = l_bufLen_I; + else if (n_now_I < l_bufLen_I) + n_start_I = l_bufLen_I - n_now_I; + bcopy (&(d_buffer[d_readNdx_I]), buf, n_now_I * sizeof (T)); + if (n_start_I) { + bcopy (d_buffer, &(buf[n_now_I]), n_start_I * sizeof (T)); + d_readNdx_I = n_start_I; + } else + d_readNdx_I += n_now_I; + *bufLen_I = l_bufLen_I; + d_n_avail_read_I -= l_bufLen_I; + d_n_avail_write_I += l_bufLen_I; + d_writeBlock->signal (); + d_internal->unlock (); + return (1); + }; + + void abort () { + d_internal->lock (); + d_doAbort = true; + d_writeBlock->signal (); + d_readBlock->signal (); + d_internal->unlock (); + }; +}; + +#endif /* _CIRCULAR_BUFFER_H_ */ diff --git a/host/lib/circular_linked_list.h b/host/lib/circular_linked_list.h new file mode 100644 index 0000000..bdfcb08 --- /dev/null +++ b/host/lib/circular_linked_list.h @@ -0,0 +1,267 @@ +/* -*- c++ -*- */ +/* + * Copyright 2006 Free Software Foundation, Inc. + * + * This file is part of GNU Radio. + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifndef _CIRCULAR_LINKED_LIST_H_ +#define _CIRCULAR_LINKED_LIST_H_ + +#include +#include + +#define __INLINE__ inline + +template class s_both; + +template class s_node +{ + typedef s_node* s_node_ptr; + +private: + T d_object; + bool d_available; + s_node_ptr d_prev, d_next; + s_both* d_both; + +public: + s_node (T l_object, + s_node_ptr l_prev = NULL, + s_node_ptr l_next = NULL) + : d_object (l_object), d_available (TRUE), d_prev (l_prev), + d_next (l_next), d_both (0) {}; + + __INLINE__ s_node (s_node_ptr l_prev, s_node_ptr l_next = NULL) { + s_node ((T) NULL, l_prev, l_next); }; + __INLINE__ s_node () { s_node (NULL, NULL, NULL); }; + __INLINE__ ~s_node () {}; + + void remove () { + d_prev->next (d_next); + d_next->prev (d_prev); + d_prev = d_next = this; + }; + + void insert_before (s_node_ptr l_next) { + if (l_next) { + s_node_ptr l_prev = l_next->prev (); + d_next = l_next; + d_prev = l_prev; + l_prev->next (this); + l_next->prev (this); + } else + d_next = d_prev = this; + }; + + void insert_after (s_node_ptr l_prev) { + if (l_prev) { + s_node_ptr l_next = l_prev->next (); + d_prev = l_prev; + d_next = l_next; + l_next->prev (this); + l_prev->next (this); + } else + d_prev = d_next = this; + }; + + __INLINE__ T object () { return (d_object); }; + __INLINE__ void object (T l_object) { d_object = l_object; }; + __INLINE__ bool available () { return (d_available); }; + __INLINE__ void set_available () { d_available = TRUE; }; + __INLINE__ void set_available (bool l_avail) { d_available = l_avail; }; + __INLINE__ void set_not_available () { d_available = FALSE; }; + __INLINE__ s_node_ptr next () { return (d_next); }; + __INLINE__ s_node_ptr prev () { return (d_prev); }; + __INLINE__ s_both* both () { return (d_both); }; + __INLINE__ void next (s_node_ptr l_next) { d_next = l_next; }; + __INLINE__ void prev (s_node_ptr l_prev) { d_prev = l_prev; }; + __INLINE__ void both (s_both* l_both) { d_both = l_both; }; +}; + +template class circular_linked_list { + typedef s_node* s_node_ptr; + +private: + s_node_ptr d_current, d_iterate, d_available, d_inUse; + UInt32 d_n_nodes, d_n_used; + mld_mutex_ptr d_internal; + mld_condition_ptr d_ioBlock; + +public: + circular_linked_list (UInt32 n_nodes) { + if (n_nodes == 0) + throw std::runtime_error ("circular_linked_list(): n_nodes == 0"); + + d_iterate = NULL; + d_n_nodes = n_nodes; + d_n_used = 0; + s_node_ptr l_prev, l_next; + d_inUse = d_current = l_next = l_prev = NULL; + + l_prev = new s_node (); + l_prev->set_available (); + l_prev->next (l_prev); + l_prev->prev (l_prev); + if (n_nodes > 1) { + l_next = new s_node (l_prev, l_prev); + l_next->set_available (); + l_next->next (l_prev); + l_next->prev (l_prev); + l_prev->next (l_next); + l_prev->prev (l_next); + if (n_nodes > 2) { + UInt32 n = n_nodes - 2; + while (n-- > 0) { + d_current = new s_node (l_prev, l_next); + d_current->set_available (); + d_current->prev (l_prev); + d_current->next (l_next); + l_prev->next (d_current); + l_next->prev (d_current); + l_next = d_current; + d_current = NULL; + } + } + } + d_available = d_current = l_prev; + d_internal = new mld_mutex (); + d_ioBlock = new mld_condition (); + }; + + ~circular_linked_list () { + iterate_start (); + s_node_ptr l_node = iterate_next (); + while (l_node) { + delete l_node; + l_node = iterate_next (); + } + delete d_internal; + d_internal = NULL; + delete d_ioBlock; + d_ioBlock = NULL; + d_available = d_inUse = d_iterate = d_current = NULL; + d_n_used = d_n_nodes = 0; + }; + + s_node_ptr find_next_available_node () { + d_internal->lock (); +// find an available node + s_node_ptr l_node = d_available; + while (! l_node) { + d_internal->unlock (); + d_ioBlock->wait (); + d_internal->lock (); + l_node = d_available; + } +// fprintf (stderr, "::f_n_a_n: #u = %ld, node = %p\n", num_used(), l_node); +// remove this one from the current available list + if (num_available () == 1) { +// last one, just set available to NULL + d_available = NULL; + } else + d_available = l_node->next (); + l_node->remove (); +// add is to the inUse list + if (! d_inUse) + d_inUse = l_node; + else + l_node->insert_before (d_inUse); + d_n_used++; + l_node->set_not_available (); + d_internal->unlock (); + return (l_node); + }; + + void make_node_available (s_node_ptr l_node) { + if (!l_node) return; + d_internal->lock (); +// fprintf (stderr, "::m_n_a: #u = %ld, node = %p\n", num_used(), l_node); +// remove this node from the inUse list + if (num_used () == 1) { +// last one, just set inUse to NULL + d_inUse = NULL; + } else + d_inUse = l_node->next (); + l_node->remove (); +// add this node to the available list + if (! d_available) + d_available = l_node; + else + l_node->insert_before (d_available); + d_n_used--; +// signal the condition when new data arrives + d_ioBlock->signal (); +// unlock the mutex for thread safety + d_internal->unlock (); + }; + + __INLINE__ void iterate_start () { d_iterate = d_current; }; + + s_node_ptr iterate_next () { +#if 0 +// lock the mutex for thread safety + d_internal->lock (); +#endif + s_node_ptr l_this = NULL; + if (d_iterate) { + l_this = d_iterate; + d_iterate = d_iterate->next (); + if (d_iterate == d_current) + d_iterate = NULL; + } +#if 0 +// unlock the mutex for thread safety + d_internal->unlock (); +#endif + return (l_this); + }; + + __INLINE__ T object () { return (d_current->d_object); }; + __INLINE__ void object (T l_object) { d_current->d_object = l_object; }; + __INLINE__ UInt32 num_nodes () { return (d_n_nodes); }; + __INLINE__ UInt32 num_used () { return (d_n_used); }; + __INLINE__ void num_used (UInt32 l_n_used) { d_n_used = l_n_used; }; + __INLINE__ UInt32 num_available () { return (d_n_nodes - d_n_used); }; + __INLINE__ void num_used_inc (void) { + if (d_n_used < d_n_nodes) ++d_n_used; + }; + __INLINE__ void num_used_dec (void) { + if (d_n_used != 0) --d_n_used; +// signal the condition that new data has arrived + d_ioBlock->signal (); + }; + __INLINE__ bool in_use () { return (d_n_used != 0); }; +}; + +template class s_both +{ +private: + s_node* d_node; + void* d_this; +public: + __INLINE__ s_both (s_node* l_node, void* l_this) + : d_node (l_node), d_this (l_this) {}; + __INLINE__ ~s_both () {}; + __INLINE__ s_node* node () { return (d_node); }; + __INLINE__ void* This () { return (d_this); }; + __INLINE__ void set (s_node* l_node, void* l_this) { + d_node = l_node; d_this = l_this;}; +}; + +#endif /* _CIRCULAR_LINKED_LIST_H_ */ diff --git a/host/lib/darwin_libusb.h b/host/lib/darwin_libusb.h new file mode 100644 index 0000000..164ab9c --- /dev/null +++ b/host/lib/darwin_libusb.h @@ -0,0 +1,190 @@ +/* -*- c++ -*- */ +/* + * Copyright 2006 Free Software Foundation, Inc. + * + * This file is part of GNU Radio. + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +/* + * The following code was taken from LIBUSB verion 0.1.10a, + * and makes the fusb_darwin codes do-able in the current GR + * programming framework. Parts and pieces were taken from + * usbi.h, darwin.c, and error.h . + * + * LIBUSB version 0.1.10a is covered by the LGPL, version 2; + * These codes are used with permission from: + * (c) 2000-2003 Johannes Erdfelt + * (c) 2002-2005 Nathan Hjelm + * All rights reserved. + */ + +#ifndef __DARWIN_LIBUSB_H__ +#define __DARWIN_LIBUSB_H__ + +#include +#include +#include +#include + +extern "C" { +static char * +darwin_error_str (int result) +{ + switch (result) { + case kIOReturnSuccess: + return "no error"; + case kIOReturnNotOpen: + return "device not opened for exclusive access"; + case kIOReturnNoDevice: + return "no connection to an IOService"; + case kIOUSBNoAsyncPortErr: + return "no asyc port has been opened for interface"; + case kIOReturnExclusiveAccess: + return "another process has device opened for exclusive access"; + case kIOUSBPipeStalled: + return "pipe is stalled"; + case kIOReturnError: + return "could not establish a connection to Darin kernel"; + case kIOReturnBadArgument: + return "invalid argument"; + default: + return "unknown error"; + } +} + +/* not a valid errorno outside darwin.c */ +#define LUSBDARWINSTALL (ELAST+1) + +static int +darwin_to_errno (int result) +{ + switch (result) { + case kIOReturnSuccess: + return 0; + case kIOReturnNotOpen: + return EBADF; + case kIOReturnNoDevice: + case kIOUSBNoAsyncPortErr: + return ENXIO; + case kIOReturnExclusiveAccess: + return EBUSY; + case kIOUSBPipeStalled: + return LUSBDARWINSTALL; + case kIOReturnBadArgument: + return EINVAL; + case kIOReturnError: + default: + return 1; + } +} + +typedef enum { + USB_ERROR_TYPE_NONE = 0, + USB_ERROR_TYPE_STRING, + USB_ERROR_TYPE_ERRNO, +} usb_error_type_t; + +extern char usb_error_str[1024]; +extern int usb_error_errno; +extern usb_error_type_t usb_error_type; + +#define USB_ERROR(r, x) \ + do { \ + usb_error_type = USB_ERROR_TYPE_ERRNO; \ + usb_error_errno = x; \ + return r; \ + } while (0) + +#define USB_ERROR_STR(r, x, format, args...) \ + do { \ + usb_error_type = USB_ERROR_TYPE_STRING; \ + snprintf(usb_error_str, sizeof(usb_error_str) - 1, format, ## args); \ + if (usb_debug) \ + fprintf(stderr, "USB error: %s\n", usb_error_str); \ + return r; \ + } while (0) + +#define USB_ERROR_STR_ORIG(x, format, args...) \ + do { \ + usb_error_type = USB_ERROR_TYPE_STRING; \ + snprintf(usb_error_str, sizeof(usb_error_str) - 1, format, ## args); \ + if (usb_debug) \ + fprintf(stderr, "USB error: %s\n", usb_error_str); \ + return x; \ + } while (0) + +#define USB_ERROR_STR_NO_RET(x, format, args...) \ + do { \ + usb_error_type = USB_ERROR_TYPE_STRING; \ + snprintf(usb_error_str, sizeof(usb_error_str) - 1, format, ## args); \ + if (usb_debug) \ + fprintf(stderr, "USB error: %s\n", usb_error_str); \ + } while (0) + +/* simple function that figures out what pipeRef is associated with an endpoint */ +static int ep_to_pipeRef (darwin_dev_handle *device, int ep) +{ + io_return_t ret; + UInt8 numep, direction, number; + UInt8 dont_care1, dont_care3; + UInt16 dont_care2; + int i; + + if (usb_debug > 3) + fprintf(stderr, "Converting ep address to pipeRef.\n"); + + /* retrieve the total number of endpoints on this interface */ + ret = (*(device->interface))->GetNumEndpoints(device->interface, &numep); + if ( ret ) { + if ( usb_debug > 3 ) + fprintf ( stderr, "ep_to_pipeRef: interface is %p\n", device->interface ); + USB_ERROR_STR_ORIG ( -ret, "ep_to_pipeRef: can't get number of endpoints for interface" ); + } + + /* iterate through the pipeRefs until we find the correct one */ + for (i = 1 ; i <= numep ; i++) { + ret = (*(device->interface))->GetPipeProperties(device->interface, i, &direction, &number, + &dont_care1, &dont_care2, &dont_care3); + + if (ret != kIOReturnSuccess) { + fprintf (stderr, "ep_to_pipeRef: an error occurred getting pipe information on pipe %d\n", + i ); + USB_ERROR_STR_ORIG (-darwin_to_errno(ret), "ep_to_pipeRef(GetPipeProperties): %s", darwin_error_str(ret)); + } + + if (usb_debug > 3) + fprintf (stderr, "ep_to_pipeRef: Pipe %i: DIR: %i number: %i\n", i, direction, number); + + /* calculate the endpoint of the pipe and check it versus the requested endpoint */ + if ( ((direction << 7 & USB_ENDPOINT_DIR_MASK) | (number & USB_ENDPOINT_ADDRESS_MASK)) == ep ) { + if (usb_debug > 3) + fprintf(stderr, "ep_to_pipeRef: pipeRef for ep address 0x%02x found: 0x%02x\n", ep, i); + + return i; + } + } + + if (usb_debug > 3) + fprintf(stderr, "ep_to_pipeRef: No pipeRef found with endpoint address 0x%02x.\n", ep); + + /* none of the found pipes match the requested endpoint */ + return -1; +} + +} +#endif /* __DARWIN_LIBUSB_H__ */ diff --git a/host/lib/dump_data.py b/host/lib/dump_data.py new file mode 100755 index 0000000..fea0b9d --- /dev/null +++ b/host/lib/dump_data.py @@ -0,0 +1,40 @@ +#!/usr/bin/env python +# +# Copyright 2003 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. + +import sys +import struct + +fin = sys.stdin + +count = 0 + +while 1: + s = fin.read(2) + if not s or len(s) != 2: + break + + v, = struct.unpack ('H', s) + iv = int(v) & 0xffff + print "%8d %6d 0x%04x" % (count, iv, iv) + count += 1 + + + diff --git a/host/lib/dxc-io-assignments.gnumeric b/host/lib/dxc-io-assignments.gnumeric new file mode 100644 index 0000000000000000000000000000000000000000..85e1a8817747815d6bb4fb9724c143b2a1ae1ab2 GIT binary patch literal 3251 zcmV;k3{3MMiwFSa%91|-1MOW~bKANRe$TJK=%IaRWs?+ju^THRTXEtU$Mr={I;Ydo zP!cS0OcE*x+4A}I1#c2bkTfAWsi|x-;}LyVjLjOM?AkRGvd=AFN>dc|@L%69@1_fE8%@)3nc++^Z{?cDu3vabrUvtM z%k8Rnuy$vS{s)A7H3y7QbFyOC^@`GkL0MSJUY5A8e>~iLj#oN{jr-AL z=kbD2^H1V1!y3C&N-S$)&;Y`35r=p(tQGE$Ztp(_0>O2l)nSHOZ>=hyS7uIYpr}I_ z_KL>Ln7Hpx#~B$LD@MjsVlOT1(eeH1Xu9Jink>9m?lbZ$#beS?1higG9Ao&VRXfd!|S^jdqOPt6kFsu zyXrO=kzbXdPUc)*r3v=USaVJLy`Vb0N(peK`>L{$@Gj#Le-L8#`JLGR7fAULKq{q zWFreduuYS8=b&@+Y7^?2U9!!>pLt2$9td}mr5i<)lrm?)YJO+M$n(u7jU}d2%=ZLy z&Zq5XzM+a1M%)K^wOj??`<^sJfyHYAbG|t8Yw;6y#^%GAIM&P9WiJ+X^M!5Vkm-W* zwVf|BqXwVP+-hdB!Y(LYVuOu6?u9aWB0g{OWC-Px-KS%=;KK`VaY0#H&h)JBuZkt1 zj2b43q_;K6Hh~X8m%M-8Gx}!EW)|1sFNVGR$G=B|)BiM3=obXF&I3NBn_lzjM?w4R z!I#ek084`trhk8Ti5Uk9G!4q41%Fty;sYxBvz+FqS9pu(Tp00%cPS-q(c&`W}AN8t4Z#mLt4oejj%WuJ7ZB zoSVV*En(q4-mm25_CI;|7$=b6JN-vI^Fg_1=f!?0zgu{c$NYZ-of^}}lg2s!cf9$- z*RJ6i&f!BKbR&B1+v%k71v{7;R$?TZnR6Hl7QO0$6KfXe#JBe5)c<(T)uZ0cAyAv| z4Ic4`ua?z(;g$673@5x1cwiZQ`1U$Y(KJ>+;)}wUNiCe1$Z6n#Uy<_o_nM5)z}JL^ zrZFduVZ925pPH}AhC7OEBg87x4mU>KQlwV3IIEQ{rPcP9(pnn`4TP=-p%Y$Ojrr&n z@EQ1AKR);3eAc#f?rrI;0-J%&^C;ooh$ug7?#w^&wHITm_Zq2Hz{R{!K6FLGnf2zq$G<)Xk){Km!olZL z|MORa&OAJi6X^iLIG7rN@ji3G&dAE6d2fppjK@g0D$7D&eyd zFBp`xKHKh-yup^0j^FgkP}Eh_%Xcq2cI3w#cet8E>`tk<+#a#;8s*}s`8dNfWqeTr zLMw*2DFM+cf>29op%+7x(V|@hp_S62Qw&i?i*6A_tCSYKVu&(YMEp_(h-MRE*X4Ib zlRMUCQvyp9uyjN*M=@i^CrYtZL>h3aNpLj@(Bc4PTDOY2S0zZgTlejv?llQ^?$&*` zsQZ=#EqCiaVo^)zUPDuRX{|#VA#E+eBoR%LNtpm;xX>yBC^MUS5kQ&wXjipCr>YIQ zRc+9#YJ-SXx&WZYd=t`TI3;39a!Rk{op$bCuhf0JYWJN=-FK^Y->cMp#G`fwk7C|Q zjz}VyB#|-!WSrB^8t7FuXjj#sQ&od*RSkMoHHb*n5diGfn!Bg}u1p#o?Jh+q5y&|- zB={t@*N$cAB(`srYOhyp->#^Cr(*kVMg4mf+ebv|W$or|<7I;7cJfCVd$8C}UTzB} zf=PP0qe{2S%b_fb^u0>mZ@ylNUr~2-Z5c>%zAXbl&beg($a%M& z0oqlE(5VX0%?Hq>JX~2DY)ewl^1Qqfm&Oa>d#w>!24}Dbu_vT~6tSK#MI(dGaq#G_ z$$1o9`f7NW*OW{wYzK;X&)t3B=AY;`)+5u#;S2+K|@VT40)9C(&WQOx7wI?$q+5rEY5UM4mA-flFdfzzR z%As`pZHfkL1~%7%&52D%FLMVCYz8*hk2K&@R+0abXGE7 zs6Y-GAoIH+bFAVGbI2SeQ?C4iG&1`CH;qhD@)%Vvc}%+ytXo~5o}4~<@!(o-U?5#i zBP~7GzdpT=^6Qf8sEGLIO^|C5CUH7VMDhSonWJ)>18$k=btC}9ydA@GNB#11Wem$@ zX~<8EFqF&EAfBY&@wA`_RPLBsq)0d80BnpIGP!I-sM6HXiXmj?Ry-M8l3iL6fQ$y> zNz{@6*~fr)pl8O}!;%OEXGkR(u8PZi*8{O4Qn}NlT2+9}SVV`R@48Adu%wqs9){E* z-y95?ggto}Wq7i&N2V{8vPLF?lr1t5q%2YSj-bBTEg=I*@&Ng+0IjM3x+DM`o`%EI z{o(ytI4c#;PPgFbbi4^1osNwQj!yq}N2dq+Pd_vb@7}g^2JhZPq4)ZHw~*9u*cAA@ zPkdH#PBXQD&Oqn-(HRo80Gs!R&5#KI7`&54v5-_i-%7F#}^ScGiw{{E%*AwC3dYN$Wgulwp zH7wZmjl;p;?6+3$r9$^I0c0ZgG67@)_c8&b;`TB^>m_6AMFD|T7dp4oA})qY)6)}Gl2WtM9G z?~8f}I)s%%SZPjJ>D&A!PZ#1!<4qv0G&U}XD}}hyE&Cv@6dr^8&W}L~NeywOz~_D9 zbBWi8zhf3Tc#T+lGPfW|8hkUVGo2ww8rZx)Y=$6dVDx@5TF=>TK#(-BxqfVhAZg(A zzHwTCxKg0>eo-3YN`cQcPf>2QDxKdT?ltcSz%-;nD6)%?HZ=2vB*YD*e-QdOA>^_D;eQhVPo9t7000xYb724g literal 0 HcmV?d00001 diff --git a/host/lib/fusb.cc b/host/lib/fusb.cc new file mode 100644 index 0000000..ef32cd8 --- /dev/null +++ b/host/lib/fusb.cc @@ -0,0 +1,60 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include + + +// ------------------------------------------------------------------------ +// device handle +// ------------------------------------------------------------------------ + +fusb_devhandle::fusb_devhandle (usb_dev_handle *udh) + : d_udh (udh) +{ + // that's it +}; + +fusb_devhandle::~fusb_devhandle () +{ + // nop +} + +// ------------------------------------------------------------------------ +// end point handle +// ------------------------------------------------------------------------ + +fusb_ephandle::fusb_ephandle (int endpoint, bool input_p, + int block_size, int nblocks) + : d_endpoint (endpoint), d_input_p (input_p), + d_block_size (block_size), d_nblocks (nblocks), d_started (false) +{ + // that't it +} + +fusb_ephandle::~fusb_ephandle () +{ + // nop +} diff --git a/host/lib/fusb.h b/host/lib/fusb.h new file mode 100644 index 0000000..5a90227 --- /dev/null +++ b/host/lib/fusb.h @@ -0,0 +1,128 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +// Fast USB interface + +#ifndef _FUSB_H_ +#define _FUSB_H_ + + +struct usb_dev_handle; +class fusb_ephandle; + +/*! + * \brief abstract usb device handle + */ +class fusb_devhandle { +private: + // NOT IMPLEMENTED + fusb_devhandle (const fusb_devhandle &rhs); // no copy constructor + fusb_devhandle &operator= (const fusb_devhandle &rhs); // no assignment operator + +protected: + usb_dev_handle *d_udh; + +public: + // CREATORS + fusb_devhandle (usb_dev_handle *udh); + virtual ~fusb_devhandle (); + + // MANIPULATORS + + /*! + * \brief return an ephandle of the correct subtype + */ + virtual fusb_ephandle *make_ephandle (int endpoint, bool input_p, + int block_size = 0, int nblocks = 0) = 0; + + // ACCESSORS + usb_dev_handle *get_usb_dev_handle () const { return d_udh; } +}; + + +/*! + * \brief abstract usb end point handle + */ +class fusb_ephandle { +private: + // NOT IMPLEMENTED + fusb_ephandle (const fusb_ephandle &rhs); // no copy constructor + fusb_ephandle &operator= (const fusb_ephandle &rhs); // no assignment operator + +protected: + int d_endpoint; + bool d_input_p; + int d_block_size; + int d_nblocks; + bool d_started; + +public: + fusb_ephandle (int endpoint, bool input_p, + int block_size = 0, int nblocks = 0); + virtual ~fusb_ephandle (); + + virtual bool start () = 0; //!< begin streaming i/o + virtual bool stop () = 0; //!< stop streaming i/o + + /*! + * \returns \p nbytes if write was successfully enqueued, else -1. + * Will block if no free buffers available. + */ + virtual int write (const void *buffer, int nbytes) = 0; + + /*! + * \returns number of bytes read or -1 if error. + * number of bytes read will be <= nbytes. + * Will block if no input available. + */ + virtual int read (void *buffer, int nbytes) = 0; + + /* + * block until all outstanding writes have completed + */ + virtual void wait_for_completion () = 0; + + /*! + * \brief returns current block size. + */ + int block_size () { return d_block_size; }; +}; + + +/*! + * \brief factory for creating concrete instances of the appropriate subtype. + */ +class fusb_sysconfig { +public: + /*! + * \brief returns fusb_devhandle or throws if trouble + */ + static fusb_devhandle *make_devhandle (usb_dev_handle *udh); + + /*! + * \brief returns max block size hard limit + */ + static int max_block_size (); + +}; + +#endif /* _FUSB_H_ */ diff --git a/host/lib/fusb_darwin.cc b/host/lib/fusb_darwin.cc new file mode 100644 index 0000000..081e981 --- /dev/null +++ b/host/lib/fusb_darwin.cc @@ -0,0 +1,499 @@ +/* -*- c++ -*- */ +/* + * Copyright 2006 Free Software Foundation, Inc. + * + * This file is part of GNU Radio. + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +// tell mld_threads to NOT use omni_threads, +// but rather Darwin's pthreads +#undef _USE_OMNI_THREADS_ + +#include +#include "fusb.h" +#include "fusb_darwin.h" +#include "darwin_libusb.h" + +static const int USB_TIMEOUT = 100; // in milliseconds +static const UInt8 NUM_QUEUE_ITEMS = 20; + +fusb_devhandle_darwin::fusb_devhandle_darwin (usb_dev_handle* udh) + : fusb_devhandle (udh) +{ + // that's it +} + +fusb_devhandle_darwin::~fusb_devhandle_darwin () +{ + // nop +} + +fusb_ephandle* +fusb_devhandle_darwin::make_ephandle (int endpoint, bool input_p, + int block_size, int nblocks) +{ + return new fusb_ephandle_darwin (this, endpoint, input_p, + block_size, nblocks); +} + +// ---------------------------------------------------------------- + +fusb_ephandle_darwin::fusb_ephandle_darwin (fusb_devhandle_darwin* dh, + int endpoint, bool input_p, + int block_size, int nblocks) + : fusb_ephandle (endpoint, input_p, block_size, nblocks), + d_devhandle (dh), d_pipeRef (0), d_transferType (0), + d_interfaceRef (0), d_interface (0), d_queue (0), + d_buffer (0), d_bufLenBytes (0) +{ + d_bufLenBytes = fusb_sysconfig::max_block_size(); + +// create circular buffer + d_buffer = new circular_buffer (NUM_QUEUE_ITEMS * d_bufLenBytes, + !d_input_p, d_input_p); + +// create the queue + d_queue = new circular_linked_list (NUM_QUEUE_ITEMS); + d_queue->iterate_start (); + s_node_ptr l_node = d_queue->iterate_next (); + while (l_node) { + l_node->both (new s_both (l_node, this)); + s_buffer_ptr l_buf = new s_buffer (d_bufLenBytes); + l_node->object (l_buf); + l_node = d_queue->iterate_next (); + l_buf = NULL; + } + + d_readRunning = new mld_mutex (); + d_runThreadRunning = new mld_mutex (); + d_runBlock = new mld_condition (); + d_readBlock = new mld_condition (); +} + +fusb_ephandle_darwin::~fusb_ephandle_darwin () +{ + stop (); + + d_queue->iterate_start (); + s_node_ptr l_node = d_queue->iterate_next (); + while (l_node) { + s_both_ptr l_both = l_node->both (); + delete l_both; + l_both = NULL; + l_node->both (NULL); + s_buffer_ptr l_buf = l_node->object (); + delete l_buf; + l_buf = NULL; + l_node->object (NULL); + l_node = d_queue->iterate_next (); + } + delete d_queue; + d_queue = NULL; + delete d_buffer; + d_buffer = NULL; + delete d_readRunning; + d_readRunning = NULL; + delete d_runThreadRunning; + d_runThreadRunning = NULL; + delete d_runBlock; + d_runBlock = NULL; + delete d_readBlock; + d_readBlock = NULL; +} + +bool +fusb_ephandle_darwin::start () +{ + UInt8 direction, number, interval; + UInt16 maxPacketSize; + +// reset circular buffer + d_buffer->reset (); + +// reset the queue + d_queue->num_used (0); + d_queue->iterate_start (); + s_node_ptr l_node = d_queue->iterate_next (); + while (l_node) { + l_node->both()->set (l_node, this); + l_node->object()->reset (); + l_node->set_available (); + l_node = d_queue->iterate_next (); + } + + d_pipeRef = d_transferType = 0; + + usb_dev_handle* dev = d_devhandle->get_usb_dev_handle (); + if (! dev) + USB_ERROR_STR (false, -ENXIO, "fusb_ephandle_darwin::start: " + "null device"); + + darwin_dev_handle* device = (darwin_dev_handle*) dev->impl_info; + if (! device) + USB_ERROR_STR (false, -ENOENT, "fusb_ephandle_darwin::start: " + "device not initialized"); + + if (usb_debug) + fprintf (stderr, "fusb_ephandle_darwin::start: " + "dev = %p, device = %p\n", dev, device); + + d_interfaceRef = device->interface; + if (! d_interfaceRef) + USB_ERROR_STR (false, -EACCES, "fusb_ephandle_darwin::start: " + "interface used without being claimed"); + d_interface = *d_interfaceRef; + +// get read or write pipe info (depends on "d_input_p") + + if (usb_debug > 3) + fprintf (stderr, "fusb_ephandle_darwin::start " + "d_endpoint = %d, d_input_p = %s\n", + d_endpoint, d_input_p ? "TRUE" : "FALSE"); + + int l_endpoint = (d_input_p ? USB_ENDPOINT_IN : USB_ENDPOINT_OUT); + int pipeRef = ep_to_pipeRef (device, d_endpoint | l_endpoint); + if (pipeRef < 0) + USB_ERROR_STR (false, -EINVAL, "fusb_ephandle_darwin::start " + " invalid pipeRef.\n"); + + d_pipeRef = pipeRef; + d_interface->GetPipeProperties (d_interfaceRef, + d_pipeRef, + &direction, + &number, + &d_transferType, + &maxPacketSize, + &interval); + if (usb_debug == 3) + fprintf (stderr, "fusb_ephandle_darwin::start: %s: ep = 0x%02x, " + "pipeRef = %d, d_i = %p, d_iR = %p, if_dir = %d, if_# = %d, " + "if_int = %d, if_maxPS = %d\n", d_input_p ? "read" : "write", + d_endpoint, d_pipeRef, d_interface, d_interfaceRef, direction, + number, interval, maxPacketSize); + +// set global start boolean + d_started = true; + +// create the run thread, which allows OSX to process I/O separately + d_runThread = new mld_thread (run_thread, this); + +// wait until the threads are -really- going + d_runBlock->wait (); + + if (usb_debug) + fprintf (stderr, "fusb_ephandle_darwin::start: %s started.\n", + d_input_p ? "read" : "write"); + + return (true); +} + +void +fusb_ephandle_darwin::run_thread (void* arg) +{ + fusb_ephandle_darwin* This = static_cast(arg); + mld_mutex_ptr l_runThreadRunning = This->d_runThreadRunning; + l_runThreadRunning->lock (); + + mld_mutex_ptr l_readRunning = This->d_readRunning; + mld_condition_ptr l_readBlock = This->d_readBlock; + + bool l_input_p = This->d_input_p; + + if (usb_debug) + fprintf (stderr, "fusb_ephandle_darwin::run_thread: " + "starting for %s.\n", + l_input_p ? "read" : "write"); + + usb_interface_t** l_interfaceRef = This->d_interfaceRef; + usb_interface_t* l_interface = This->d_interface; + CFRunLoopSourceRef l_cfSource; + +// create async run loop + l_interface->CreateInterfaceAsyncEventSource (l_interfaceRef, &l_cfSource); + CFRunLoopAddSource (CFRunLoopGetCurrent (), l_cfSource, + kCFRunLoopDefaultMode); +// get run loop reference, to allow other threads to stop + This->d_CFRunLoopRef = CFRunLoopGetCurrent (); + + mld_thread_ptr l_rwThread = NULL; + + if (l_input_p) { + l_rwThread = new mld_thread (read_thread, arg); +// wait until the the rwThread is -really- going + l_readBlock->wait (); + } + +// now signal the run condition to release and finish ::start() + This->d_runBlock->signal (); + +// run the loop + CFRunLoopRun (); + + if (l_input_p) { +// wait for read_thread () to finish + l_readRunning->lock (); + l_readRunning->unlock (); + } + +// remove run loop stuff + CFRunLoopRemoveSource (CFRunLoopGetCurrent (), + l_cfSource, kCFRunLoopDefaultMode); + + if (usb_debug) + fprintf (stderr, "fusb_ephandle_darwin::run_thread: finished for %s.\n", + l_input_p ? "read" : "write"); + + l_runThreadRunning->unlock (); +} + +void +fusb_ephandle_darwin::read_thread (void* arg) +{ + if (usb_debug) + fprintf (stderr, "fusb_ephandle_darwin::read_thread: starting.\n"); + + fusb_ephandle_darwin* This = static_cast(arg); + + mld_mutex_ptr l_readRunning = This->d_readRunning; + l_readRunning->lock (); + +// signal the read condition from run_thread() to continue + mld_condition_ptr l_readBlock = This->d_readBlock; + l_readBlock->signal (); + + s_queue_ptr l_queue = This->d_queue; + l_queue->iterate_start (); + s_node_ptr l_node = l_queue->iterate_next (); + while (l_node) { + This->read_issue (l_node->both ()); + l_node = l_queue->iterate_next (); + } + + if (usb_debug) + fprintf (stderr, "fusb_ephandle_darwin::read_thread: finished.\n"); + + l_readRunning->unlock (); +} + +void +fusb_ephandle_darwin::read_issue (s_both_ptr l_both) +{ + if ((! l_both) || (! d_started)) + return; + +// set the node and buffer from the input "both" + s_node_ptr l_node = l_both->node (); + s_buffer_ptr l_buf = l_node->object (); + void* v_buffer = (void*) l_buf->buffer (); + +// read up to d_bufLenBytes + UInt32 bufLen = d_bufLenBytes; + l_buf->n_used (bufLen); + +// setup system call result + io_return_t result = kIOReturnSuccess; + + if (d_transferType == kUSBInterrupt) +/* This is an interrupt pipe. We can't specify a timeout. */ + result = d_interface->ReadPipeAsync + (d_interfaceRef, d_pipeRef, v_buffer, bufLen, + (IOAsyncCallback1) read_completed, (void*) l_both); + else + result = d_interface->ReadPipeAsyncTO + (d_interfaceRef, d_pipeRef, v_buffer, bufLen, 0, USB_TIMEOUT, + (IOAsyncCallback1) read_completed, (void*) l_both); + + if (result != kIOReturnSuccess) + USB_ERROR_STR_NO_RET (- darwin_to_errno (result), + "fusb_ephandle_darwin::read_issue " + "(ReadPipeAsync%s): %s", + d_transferType == kUSBInterrupt ? "" : "TO", + darwin_error_str (result)); +} + +void +fusb_ephandle_darwin::read_completed (void* refCon, + io_return_t result, + void* io_size) +{ + UInt32 l_size = (UInt32) io_size; + s_both_ptr l_both = static_cast(refCon); + fusb_ephandle_darwin* This = static_cast(l_both->This ()); + s_node_ptr l_node = l_both->node (); + circular_buffer* l_buffer = This->d_buffer; + s_buffer_ptr l_buf = l_node->object (); + UInt32 l_i_size = l_buf->n_used (); + + if (This->d_started && (l_i_size != l_size)) + fprintf (stderr, "fusb_ephandle_darwin::read_completed: " + "Expected %ld bytes; read %ld.\n", + l_i_size, l_size); + +// add this read to the transfer buffer + if (l_buffer->enqueue (l_buf->buffer (), l_size) == -1) { + fputs ("iU", stderr); + fflush (stderr); + } + +// set buffer's # data to 0 + l_buf->n_used (0); + +// issue another read for this "both" + This->read_issue (l_both); +} + +int +fusb_ephandle_darwin::read (void* buffer, int nbytes) +{ + UInt32 l_nbytes = (UInt32) nbytes; + d_buffer->dequeue ((char*) buffer, &l_nbytes); + return ((int) l_nbytes); +} + +int +fusb_ephandle_darwin::write (const void* buffer, int nbytes) +{ + UInt32 l_nbytes = (UInt32) nbytes; + + if (! d_started) return (0); + + while (l_nbytes != 0) { +// find out how much data to copy; limited to "d_bufLenBytes" per node + UInt32 t_nbytes = (l_nbytes > d_bufLenBytes) ? d_bufLenBytes : l_nbytes; + +// get next available node to write into; +// blocks internally if none available + s_node_ptr l_node = d_queue->find_next_available_node (); + +// copy the input into the node's buffer + s_buffer_ptr l_buf = l_node->object (); + l_buf->buffer ((char*) buffer, t_nbytes); + void* v_buffer = (void*) l_buf->buffer (); + +// setup callback parameter & system call return + s_both_ptr l_both = l_node->both (); + io_return_t result = kIOReturnSuccess; + + if (d_transferType == kUSBInterrupt) +/* This is an interrupt pipe ... can't specify a timeout. */ + result = d_interface->WritePipeAsync + (d_interfaceRef, d_pipeRef, v_buffer, l_nbytes, + (IOAsyncCallback1) write_completed, (void*) l_both); + else + result = d_interface->WritePipeAsyncTO + (d_interfaceRef, d_pipeRef, v_buffer, l_nbytes, 0, USB_TIMEOUT, + (IOAsyncCallback1) write_completed, (void*) l_both); + + if (result != kIOReturnSuccess) + USB_ERROR_STR (-1, - darwin_to_errno (result), + "fusb_ephandle_darwin::write_thread " + "(WritePipeAsync%s): %s", + d_transferType == kUSBInterrupt ? "" : "TO", + darwin_error_str (result)); + l_nbytes -= t_nbytes; + } + + return (nbytes); +} + +void +fusb_ephandle_darwin::write_completed (void* refCon, + io_return_t result, + void* io_size) +{ + s_both_ptr l_both = static_cast(refCon); + fusb_ephandle_darwin* This = static_cast(l_both->This ()); + UInt32 l_size = (UInt32) io_size; + s_node_ptr l_node = l_both->node (); + s_queue_ptr l_queue = This->d_queue; + s_buffer_ptr l_buf = l_node->object (); + UInt32 l_i_size = l_buf->n_used (); + + if (This->d_started && (l_i_size != l_size)) + fprintf (stderr, "fusb_ephandle_darwin::write_completed: " + "Expected %ld bytes written; wrote %ld.\n", + l_i_size, l_size); + +// set buffer's # data to 0 + l_buf->n_used (0); +// make the node available for reuse + l_queue->make_node_available (l_node); +} + +void +fusb_ephandle_darwin::abort () +{ + if (usb_debug) + fprintf (stderr, "fusb_ephandle_darwin::abort: starting.\n"); + + io_return_t result = d_interface->AbortPipe (d_interfaceRef, d_pipeRef); + + if (result != kIOReturnSuccess) + USB_ERROR_STR_NO_RET (- darwin_to_errno (result), + "fusb_ephandle_darwin::abort " + "(AbortPipe): %s", darwin_error_str (result)); + if (usb_debug) + fprintf (stderr, "fusb_ephandle_darwin::abort: finished.\n"); +} + +bool +fusb_ephandle_darwin::stop () +{ + if (! d_started) + return (true); + + if (usb_debug) + fprintf (stderr, "fusb_ephandle_darwin::stop: stopping %s.\n", + d_input_p ? "read" : "write"); + + d_started = false; + +// abort any pending IO transfers + abort (); + +// wait for write transfer to finish + wait_for_completion (); + +// tell IO buffer to abort any waiting conditions + d_buffer->abort (); + +// stop the run loop + CFRunLoopStop (d_CFRunLoopRef); + +// wait for the runThread to stop + d_runThreadRunning->lock (); + d_runThreadRunning->unlock (); + + if (usb_debug) + fprintf (stderr, "fusb_ephandle_darwin::stop: %s stopped.\n", + d_input_p ? "read" : "write"); + + return (true); +} + +void +fusb_ephandle_darwin::wait_for_completion () +{ + if (d_queue) + while (d_queue->in_use ()) + usleep (1000); +} diff --git a/host/lib/fusb_darwin.h b/host/lib/fusb_darwin.h new file mode 100644 index 0000000..601f39a --- /dev/null +++ b/host/lib/fusb_darwin.h @@ -0,0 +1,215 @@ +/* -*- c++ -*- */ +/* + * Copyright 2006 Free Software Foundation, Inc. + * + * This file is part of GNU Radio. + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifndef _FUSB_DARWIN_H_ +#define _FUSB_DARWIN_H_ + +#include +#include "fusb.h" +#include +#include +#include +#include +#include "circular_linked_list.h" +#include "circular_buffer.h" + +// for MacOS X 10.4.[0-3] +#define usb_interface_t IOUSBInterfaceInterface220 +#define InterfaceInterfaceID kIOUSBInterfaceInterfaceID220 +#define InterfaceVersion 220 + +// for MacOS X 10.3.[0-9] and 10.4.[0-3] +#define usb_device_t IOUSBDeviceInterface197 +#define DeviceInterfaceID kIOUSBDeviceInterfaceID197 +#define DeviceVersion 197 + +extern "C" { +typedef struct usb_dev_handle { + int fd; + + struct usb_bus *bus; + struct usb_device *device; + + int config; + int interface; + int altsetting; + + /* Added by RMT so implementations can store other per-open-device data */ + void *impl_info; +} usb_dev_handle; + +/* Darwin/OS X impl does not use fd field, instead it uses this */ +typedef struct darwin_dev_handle { + usb_device_t** device; + usb_interface_t** interface; + int open; +} darwin_dev_handle; + +typedef IOReturn io_return_t; +typedef IOCFPlugInInterface *io_cf_plugin_ref_t; + +static int ep_to_pipeRef (darwin_dev_handle* device, int ep); +extern int usb_debug; +} + +class s_buffer +{ +private: + char* d_buffer; + UInt32 d_n_used, d_n_alloc; + +public: + inline s_buffer (UInt32 n_alloc = 0) { + d_n_used = 0; + d_n_alloc = n_alloc; + if (n_alloc) { + d_buffer = (char*) new char [n_alloc]; + } else { + d_buffer = 0; + } + }; + inline ~s_buffer () { + if (d_n_alloc) { + delete [] d_buffer; + } + }; + inline UInt32 n_used () { return (d_n_used); }; + inline void n_used (UInt32 bufLen) { + d_n_used = (bufLen > d_n_alloc) ? d_n_alloc : bufLen; }; + inline UInt32 n_alloc () { return (d_n_alloc); }; + void buffer (char* l_buffer, UInt32 bufLen) { + if (bufLen > d_n_alloc) { + fprintf (stderr, "s_buffer::set: Copying only allocated bytes.\n"); + bufLen = d_n_alloc; + } + if (!l_buffer) { + fprintf (stderr, "s_buffer::set: NULL buffer.\n"); + return; + } + bcopy (l_buffer, d_buffer, bufLen); + d_n_used = bufLen; + }; + inline char* buffer () { return (d_buffer); }; + inline void reset () { + bzero (d_buffer, d_n_alloc); + d_n_used = 0; + }; +}; + +typedef s_buffer* s_buffer_ptr; +typedef s_node* s_node_ptr; +typedef circular_linked_list* s_queue_ptr; +typedef s_both* s_both_ptr; + +/*! + * \brief darwin implementation of fusb_devhandle + * + * This is currently identical to the generic implementation + * and is intended as a starting point for whatever magic is + * required to make usb fly. + */ +class fusb_devhandle_darwin : public fusb_devhandle +{ +public: + // CREATORS + fusb_devhandle_darwin (usb_dev_handle* udh); + virtual ~fusb_devhandle_darwin (); + + // MANIPULATORS + virtual fusb_ephandle* make_ephandle (int endpoint, bool input_p, + int block_size = 0, int nblocks = 0); +}; + +/*! + * \brief darwin implementation of fusb_ephandle + * + * This is currently identical to the generic implementation + * and is intended as a starting point for whatever magic is + * required to make usb fly. + */ +class fusb_ephandle_darwin : public fusb_ephandle +{ +private: + fusb_devhandle_darwin* d_devhandle; + mld_thread_ptr d_runThread; + mld_mutex_ptr d_runThreadRunning; + + CFRunLoopRef d_CFRunLoopRef; + + static void write_completed (void* ret_io_size, + io_return_t result, + void* io_size); + static void read_completed (void* ret_io_size, + io_return_t result, + void* io_size); + static void run_thread (void* arg); + static void read_thread (void* arg); + + void read_issue (s_both_ptr l_both); + +public: + // variables, for now + UInt8 d_pipeRef, d_transferType; + usb_interface_t** d_interfaceRef; + usb_interface_t* d_interface; + s_queue_ptr d_queue; + circular_buffer* d_buffer; + UInt32 d_bufLenBytes; + mld_mutex_ptr d_readRunning; + mld_condition_ptr d_runBlock, d_readBlock; + +// CREATORS + + fusb_ephandle_darwin (fusb_devhandle_darwin *dh, int endpoint, bool input_p, + int block_size = 0, int nblocks = 0); + virtual ~fusb_ephandle_darwin (); + +// MANIPULATORS + + virtual bool start (); //!< begin streaming i/o + virtual bool stop (); //!< stop streaming i/o + + /*! + * \returns \p nbytes if write was successfully enqueued, else -1. + * Will block if no free buffers available. + */ + virtual int write (const void* buffer, int nbytes); + + /*! + * \returns number of bytes read or -1 if error. + * number of bytes read will be <= nbytes. + * Will block if no input available. + */ + virtual int read (void* buffer, int nbytes); + + /* + * abort any pending IO transfers + */ + void abort (); + + /* + * block until all outstanding writes have completed + */ + virtual void wait_for_completion (); +}; + +#endif /* _FUSB_DARWIN_H_ */ diff --git a/host/lib/fusb_generic.cc b/host/lib/fusb_generic.cc new file mode 100644 index 0000000..0013632 --- /dev/null +++ b/host/lib/fusb_generic.cc @@ -0,0 +1,108 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include +#include + + +static const int USB_TIMEOUT = 1000; // in milliseconds + + +fusb_devhandle_generic::fusb_devhandle_generic (usb_dev_handle *udh) + : fusb_devhandle (udh) +{ + // that's it +} + +fusb_devhandle_generic::~fusb_devhandle_generic () +{ + // nop +} + +fusb_ephandle * +fusb_devhandle_generic::make_ephandle (int endpoint, bool input_p, + int block_size, int nblocks) +{ + return new fusb_ephandle_generic (this, endpoint, input_p, + block_size, nblocks); +} + +// ---------------------------------------------------------------- + +fusb_ephandle_generic::fusb_ephandle_generic (fusb_devhandle_generic *dh, + int endpoint, bool input_p, + int block_size, int nblocks) + : fusb_ephandle (endpoint, input_p, block_size, nblocks), + d_devhandle (dh) +{ + // that's it +} + +fusb_ephandle_generic::~fusb_ephandle_generic () +{ + // nop +} + +bool +fusb_ephandle_generic::start () +{ + d_started = true; + return true; +} + +bool +fusb_ephandle_generic::stop () +{ + d_started = false; + return true; +} + +int +fusb_ephandle_generic::write (const void *buffer, int nbytes) +{ + if (!d_started) // doesn't matter here, but keeps semantics constant + return -1; + + if (d_input_p) + return -1; + + return usb_bulk_write (d_devhandle->get_usb_dev_handle (), + d_endpoint, (char *) buffer, nbytes, USB_TIMEOUT); +} + +int +fusb_ephandle_generic::read (void *buffer, int nbytes) +{ + if (!d_started) // doesn't matter here, but keeps semantics constant + return -1; + + if (!d_input_p) + return -1; + + return usb_bulk_read (d_devhandle->get_usb_dev_handle (), + d_endpoint|USB_ENDPOINT_IN, (char *) buffer, nbytes, + USB_TIMEOUT); +} diff --git a/host/lib/fusb_generic.h b/host/lib/fusb_generic.h new file mode 100644 index 0000000..93ae77f --- /dev/null +++ b/host/lib/fusb_generic.h @@ -0,0 +1,83 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifndef _FUSB_GENERIC_H_ +#define _FUSB_GENERIC_H_ + +#include + +/*! + * \brief generic implementation of fusb_devhandle using only libusb + */ +class fusb_devhandle_generic : public fusb_devhandle +{ +public: + // CREATORS + fusb_devhandle_generic (usb_dev_handle *udh); + virtual ~fusb_devhandle_generic (); + + // MANIPULATORS + virtual fusb_ephandle *make_ephandle (int endpoint, bool input_p, + int block_size = 0, int nblocks = 0); +}; + + +/*! + * \brief generic implementation of fusb_ephandle using only libusb + */ +class fusb_ephandle_generic : public fusb_ephandle +{ +private: + fusb_devhandle_generic *d_devhandle; + +public: + // CREATORS + fusb_ephandle_generic (fusb_devhandle_generic *dh, int endpoint, bool input_p, + int block_size = 0, int nblocks = 0); + virtual ~fusb_ephandle_generic (); + + // MANIPULATORS + + virtual bool start (); //!< begin streaming i/o + virtual bool stop (); //!< stop streaming i/o + + /*! + * \returns \p nbytes if write was successfully enqueued, else -1. + * Will block if no free buffers available. + */ + virtual int write (const void *buffer, int nbytes); + + /*! + * \returns number of bytes read or -1 if error. + * number of bytes read will be <= nbytes. + * Will block if no input available. + */ + virtual int read (void *buffer, int nbytes); + + /* + * block until all outstanding writes have completed + */ + virtual void wait_for_completion () { }; +}; + +#endif /* _FUSB_GENERIC_H_ */ + diff --git a/host/lib/fusb_linux.cc b/host/lib/fusb_linux.cc new file mode 100644 index 0000000..2fe244f --- /dev/null +++ b/host/lib/fusb_linux.cc @@ -0,0 +1,684 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include +#include // libusb header +#include +#include +#include // interface to kernel portion of user mode usb driver +#include +#include +#include +#include +#include +#include + +#define MINIMIZE_TX_BUFFERING 1 // must be defined to 0 or 1 + + +static const int MAX_BLOCK_SIZE = fusb_sysconfig::max_block_size(); // hard limit +static const int DEFAULT_BLOCK_SIZE = MAX_BLOCK_SIZE; +static const int DEFAULT_BUFFER_SIZE = 4 * (1L << 20); // 4 MB / endpoint + + +// Totally evil and fragile extraction of file descriptor from +// guts of libusb. They don't install usbi.h, which is what we'd need +// to do this nicely. +// +// FIXME if everything breaks someday in the future, look here... + +static int +fd_from_usb_dev_handle (usb_dev_handle *udh) +{ + return *((int *) udh); +} + +inline static void +urb_set_ephandle (usbdevfs_urb *urb, fusb_ephandle_linux *handle) +{ + urb->usercontext = handle; +} + +inline static fusb_ephandle_linux * +urb_get_ephandle (usbdevfs_urb *urb) +{ + return (fusb_ephandle_linux *) urb->usercontext; +} + +// ------------------------------------------------------------------------ +// USB request block (urb) allocation +// ------------------------------------------------------------------------ + +static usbdevfs_urb * +alloc_urb (fusb_ephandle_linux *self, int buffer_length, int endpoint, + bool input_p, unsigned char *write_buffer) +{ + usbdevfs_urb *urb = new usbdevfs_urb; + memset (urb, 0, sizeof (*urb)); + + urb->buffer_length = buffer_length; + + // We allocate dedicated memory only for input buffers. + // For output buffers we reuse the same buffer (the kernel + // copies the data at submital time) + + if (input_p) + urb->buffer = new unsigned char [buffer_length]; + else + urb->buffer = write_buffer; + + // init common values + + urb->type = USBDEVFS_URB_TYPE_BULK; + urb->endpoint = (endpoint & 0x7f) | (input_p ? 0x80 : 0); + + // USBDEVFS_URB_QUEUE_BULK goes away in linux 2.5, but is needed if + // we are using a 2.4 usb-uhci host controller driver. This is + // unlikely since we're almost always going to be plugged into a + // high speed host controller (ehci) +#if 0 && defined (USBDEVFS_URB_QUEUE_BULK) + urb->flags = USBDEVFS_URB_QUEUE_BULK; +#endif + + urb->signr = 0; + urb_set_ephandle (urb, self); + + return urb; +} + +static void +free_urb (usbdevfs_urb *urb) +{ + // if this was an input urb, free the buffer + if (urb->endpoint & 0x80) + delete [] ((unsigned char *) urb->buffer); + + delete urb; +} + +// ------------------------------------------------------------------------ +// device handle +// ------------------------------------------------------------------------ + +fusb_devhandle_linux::fusb_devhandle_linux (usb_dev_handle *udh) + : fusb_devhandle (udh) +{ + // that's all +} + +fusb_devhandle_linux::~fusb_devhandle_linux () +{ + // if there are any pending requests, cancel them and free the urbs. + + std::list::reverse_iterator it; + + for (it = d_pending_rqsts.rbegin (); it != d_pending_rqsts.rend (); it++){ + _cancel_urb (*it); + free_urb (*it); + } +} + +fusb_ephandle * +fusb_devhandle_linux::make_ephandle (int endpoint, bool input_p, + int block_size, int nblocks) +{ + return new fusb_ephandle_linux (this, endpoint, input_p, + block_size, nblocks); +} + + +// Attempt to cancel all transactions associated with eph. + +void +fusb_devhandle_linux::_cancel_pending_rqsts (fusb_ephandle_linux *eph) +{ + std::list::reverse_iterator it; + + for (it = d_pending_rqsts.rbegin (); it != d_pending_rqsts.rend (); it++){ + if (urb_get_ephandle (*it) == eph) + _cancel_urb (*it); + } +} + +void +fusb_devhandle_linux::pending_add (usbdevfs_urb *urb) +{ + d_pending_rqsts.push_back (urb); +} + +usbdevfs_urb * +fusb_devhandle_linux::pending_get () +{ + if (d_pending_rqsts.empty ()) + return 0; + + usbdevfs_urb *urb = d_pending_rqsts.front (); + d_pending_rqsts.pop_front (); + return urb; +} + +bool +fusb_devhandle_linux::pending_remove (usbdevfs_urb *urb) +{ + std::list::iterator result = find (d_pending_rqsts.begin (), + d_pending_rqsts.end (), + urb); + if (result == d_pending_rqsts.end ()){ + fprintf (stderr, "fusb::pending_remove: failed to find urb in pending_rqsts: %p\n", urb); + return false; + } + d_pending_rqsts.erase (result); + return true; +} + +/* + * Submit the urb to the kernel. + * iff successful, the urb will be placed on the devhandle's pending list. + */ +bool +fusb_devhandle_linux::_submit_urb (usbdevfs_urb *urb) +{ + int ret; + + ret = ioctl (fd_from_usb_dev_handle (d_udh), USBDEVFS_SUBMITURB, urb); + if (ret < 0){ + perror ("fusb::_submit_urb"); + return false; + } + + pending_add (urb); + return true; +} + +/* + * Attempt to cancel the in pending or in-progress urb transaction. + * Return true iff transaction was sucessfully cancelled. + * + * Failure to cancel should not be considered a problem. This frequently + * occurs if the transaction has already completed in the kernel but hasn't + * yet been reaped by the user mode code. + * + * urbs which were cancelled have their status field set to -ENOENT when + * they are reaped. + */ +bool +fusb_devhandle_linux::_cancel_urb (usbdevfs_urb *urb) +{ + int ret = ioctl (fd_from_usb_dev_handle (d_udh), USBDEVFS_DISCARDURB, urb); + if (ret < 0){ + // perror ("fusb::_cancel_urb"); + return false; + } + return true; +} + +/* + * Check with the kernel and see if any of our outstanding requests + * have completed. For each completed transaction, remove it from the + * devhandle's pending list and append it to the completed list for + * the corresponding endpoint. + * + * If any transactions are reaped return true. + * + * If ok_to_block_p is true, then this will block until at least one + * transaction completes. + */ +bool +fusb_devhandle_linux::_reap (bool ok_to_block_p) +{ + int ret; + int nreaped = 0; + usbdevfs_urb *urb = 0; + + int fd = fd_from_usb_dev_handle (d_udh); + + // try to reap as many as possible without blocking... + + while ((ret = ioctl (fd, USBDEVFS_REAPURBNDELAY, &urb)) == 0){ + if (urb->status != 0 && urb->status != -ENOENT){ + fprintf (stderr, "_reap: usb->status = %d, actual_length = %5d\n", + urb->status, urb->actual_length); + } + pending_remove (urb); + urb_get_ephandle (urb)->completed_list_add (urb); + nreaped++; + } + + if (nreaped > 0) // if we got any, return w/o blocking + return true; + + if (!ok_to_block_p) + return false; + + ret = ioctl (fd, USBDEVFS_REAPURB, &urb); + if (ret < 0){ + perror ("fusb::_reap"); + return false; + } + + pending_remove (urb); + urb_get_ephandle (urb)->completed_list_add (urb); + return true; +} + +void +fusb_devhandle_linux::_wait_for_completion () +{ + while (!d_pending_rqsts.empty ()) + _reap (true); +} + // ------------------------------------------------------------------------ +// end point handle +// ------------------------------------------------------------------------ + +fusb_ephandle_linux::fusb_ephandle_linux (fusb_devhandle_linux *devhandle, + int endpoint, + bool input_p, + int block_size, int nblocks) + : fusb_ephandle (endpoint, input_p, block_size, nblocks), + d_devhandle (devhandle), + d_write_work_in_progress (0), d_write_buffer (0), + d_read_work_in_progress (0), d_read_buffer (0), d_read_buffer_end (0) +{ + + if (d_block_size < 0 || d_block_size > MAX_BLOCK_SIZE) + throw std::out_of_range ("fusb_ephandle_linux: block_size"); + + if (d_nblocks < 0) + throw std::out_of_range ("fusb_ephandle_linux: nblocks"); + + if (d_block_size == 0) + d_block_size = DEFAULT_BLOCK_SIZE; + + if (d_nblocks == 0) + d_nblocks = std::max (1, DEFAULT_BUFFER_SIZE / d_block_size); + + if (!d_input_p) + if (!MINIMIZE_TX_BUFFERING) + d_write_buffer = new unsigned char [d_block_size]; + + if (0) + fprintf(stderr, "fusb_ephandle_linux::ctor: d_block_size = %d d_nblocks = %d\n", + d_block_size, d_nblocks); + + // allocate urbs + + for (int i = 0; i < d_nblocks; i++) + d_free_list.push_back (alloc_urb (this, d_block_size, d_endpoint, + d_input_p, d_write_buffer)); +} + +fusb_ephandle_linux::~fusb_ephandle_linux () +{ + stop (); + + usbdevfs_urb *urb; + + while ((urb = free_list_get ()) != 0) + free_urb (urb); + + while ((urb = completed_list_get ()) != 0) + free_urb (urb); + + if (d_write_work_in_progress) + free_urb (d_write_work_in_progress); + + delete [] d_write_buffer; + + if (d_read_work_in_progress) + free_urb (d_read_work_in_progress); +} + +// ---------------------------------------------------------------- + +bool +fusb_ephandle_linux::start () +{ + if (d_started) + return true; // already running + + d_started = true; + + if (d_input_p){ // fire off all the reads + usbdevfs_urb *urb; + + int nerrors = 0; + while ((urb = free_list_get ()) != 0 && nerrors < d_nblocks){ + if (!submit_urb (urb)) + nerrors++; + } + } + + return true; +} + +// +// kill all i/o in progress. +// kill any completed but unprocessed transactions. +// +bool +fusb_ephandle_linux::stop () +{ + if (!d_started) + return true; + + d_devhandle->_cancel_pending_rqsts (this); + d_devhandle->_reap (false); + + + usbdevfs_urb *urb; + while ((urb = completed_list_get ()) != 0) + free_list_add (urb); + + if (d_write_work_in_progress){ + free_list_add (d_write_work_in_progress); + d_write_work_in_progress = 0; + } + + if (d_read_work_in_progress){ + free_list_add (d_read_work_in_progress); + d_read_work_in_progress = 0; + d_read_buffer = 0; + d_read_buffer_end = 0; + } + + if (d_free_list.size () != (unsigned) d_nblocks) + fprintf (stderr, "d_free_list.size () = %d, d_nblocks = %d\n", + d_free_list.size (), d_nblocks); + + assert (d_free_list.size () == (unsigned) d_nblocks); + + d_started = false; + return true; +} + +// ---------------------------------------------------------------- +// routines for writing +// ---------------------------------------------------------------- + +#if (MINIMIZE_TX_BUFFERING) + +int +fusb_ephandle_linux::write(const void *buffer, int nbytes) +{ + if (!d_started) + return -1; + + if (d_input_p) + return -1; + + assert(nbytes % 512 == 0); + + unsigned char *src = (unsigned char *) buffer; + + int n = 0; + while (n < nbytes){ + + usbdevfs_urb *urb = get_write_work_in_progress(); + assert(urb->actual_length == 0); + int m = std::min(nbytes - n, MAX_BLOCK_SIZE); + urb->buffer = src; + urb->buffer_length = m; + + n += m; + src += m; + + if (!submit_urb(urb)) + return -1; + + d_write_work_in_progress = 0; + } + + return n; +} + +#else + +int +fusb_ephandle_linux::write (const void *buffer, int nbytes) +{ + if (!d_started) + return -1; + + if (d_input_p) + return -1; + + unsigned char *src = (unsigned char *) buffer; + + int n = 0; + while (n < nbytes){ + + usbdevfs_urb *urb = get_write_work_in_progress (); + unsigned char *dst = (unsigned char *) urb->buffer; + int m = std::min (nbytes - n, urb->buffer_length - urb->actual_length); + + memcpy (&dst[urb->actual_length], &src[n], m); + urb->actual_length += m; + n += m; + + if (urb->actual_length == urb->buffer_length){ + if (!submit_urb (urb)) + return -1; + d_write_work_in_progress = 0; + } + } + + return n; +} + +#endif + +usbdevfs_urb * +fusb_ephandle_linux::get_write_work_in_progress () +{ + // if we've already got some work in progress, return it + + if (d_write_work_in_progress) + return d_write_work_in_progress; + + while (1){ + + reap_complete_writes (); + + usbdevfs_urb *urb = free_list_get (); + + if (urb != 0){ + assert (urb->actual_length == 0); + d_write_work_in_progress = urb; + return urb; + } + + // The free list is empty. Tell the device handle to reap. + // Anything it reaps for us will end up on our completed list. + + d_devhandle->_reap (true); + } +} + +void +fusb_ephandle_linux::reap_complete_writes () +{ + // take a look at the completed_list and xfer to free list after + // checking for errors. + + usbdevfs_urb *urb; + + while ((urb = completed_list_get ()) != 0){ + + // Check for any errors or short writes that were reported in the urb. + // The kernel sets status, actual_length and error_count. + // error_count is only used for ISO xfers. + // status is 0 if successful, else is an errno kind of thing + + if (urb->status != 0){ + fprintf (stderr, "fusb: (status %d) %s\n", urb->status, strerror (-urb->status)); + } + else if (urb->actual_length != urb->buffer_length){ + fprintf (stderr, "fusb: short write xfer: %d != %d\n", + urb->actual_length, urb->buffer_length); + } + + free_list_add (urb); + } +} + +void +fusb_ephandle_linux::wait_for_completion () +{ + d_devhandle->_wait_for_completion (); +} + +// ---------------------------------------------------------------- +// routines for reading +// ---------------------------------------------------------------- + +int +fusb_ephandle_linux::read (void *buffer, int nbytes) +{ + if (!d_started) + return -1; + + if (!d_input_p) + return -1; + + unsigned char *dst = (unsigned char *) buffer; + + int n = 0; + while (n < nbytes){ + + if (d_read_buffer >= d_read_buffer_end) + if (!reload_read_buffer ()) + return -1; + + int m = std::min (nbytes - n, (int) (d_read_buffer_end - d_read_buffer)); + + memcpy (&dst[n], d_read_buffer, m); + d_read_buffer += m; + n += m; + } + + return n; +} + +bool +fusb_ephandle_linux::reload_read_buffer () +{ + assert (d_read_buffer >= d_read_buffer_end); + + usbdevfs_urb *urb; + + if (d_read_work_in_progress){ + // We're done with this urb. Fire off a read to refill it. + urb = d_read_work_in_progress; + d_read_work_in_progress = 0; + d_read_buffer = 0; + d_read_buffer_end = 0; + urb->actual_length = 0; + if (!submit_urb (urb)) + return false; + } + + while (1){ + + while ((urb = completed_list_get ()) == 0) + d_devhandle->_reap (true); + + // check result of completed read + + if (urb->status != 0){ + // We've got a problem. + // Report the problem and resubmit. + fprintf (stderr, "fusb: (rd status %d) %s\n", urb->status, strerror (-urb->status)); + urb->actual_length = 0; + if (!submit_urb (urb)) + return false; + + continue; + } + + // we've got a happy urb, full of data... + + d_read_work_in_progress = urb; + d_read_buffer = (unsigned char *) urb->buffer; + d_read_buffer_end = d_read_buffer + urb->actual_length; + + return true; + } +} + +// ---------------------------------------------------------------- + +void +fusb_ephandle_linux::free_list_add (usbdevfs_urb *urb) +{ + assert (urb_get_ephandle (urb) == this); + urb->actual_length = 0; + d_free_list.push_back (urb); +} + +usbdevfs_urb * +fusb_ephandle_linux::free_list_get () +{ + if (d_free_list.empty ()) + return 0; + + usbdevfs_urb *urb = d_free_list.front (); + d_free_list.pop_front (); + return urb; +} + +void +fusb_ephandle_linux::completed_list_add (usbdevfs_urb *urb) +{ + assert (urb_get_ephandle (urb) == this); + d_completed_list.push_back (urb); +} + +usbdevfs_urb * +fusb_ephandle_linux::completed_list_get () +{ + if (d_completed_list.empty ()) + return 0; + + usbdevfs_urb *urb = d_completed_list.front (); + d_completed_list.pop_front (); + return urb; +} + +/* + * Submit the urb. If successful the urb ends up on the devhandle's + * pending list, otherwise, it's back on our free list. + */ +bool +fusb_ephandle_linux::submit_urb (usbdevfs_urb *urb) +{ + if (!d_devhandle->_submit_urb (urb)){ // FIXME record the problem somewhere + fprintf (stderr, "_submit_urb failed\n"); + free_list_add (urb); + return false; + } + return true; +} diff --git a/host/lib/fusb_linux.h b/host/lib/fusb_linux.h new file mode 100644 index 0000000..9b70918 --- /dev/null +++ b/host/lib/fusb_linux.h @@ -0,0 +1,116 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +// Fast USB interface + +#ifndef _FUSB_LINUX_H_ +#define _FUSB_LINUX_H_ + +#include +#include + +struct usbdevfs_urb; +class fusb_ephandle_linux; + +/*! + * \brief linux specific implementation of fusb_devhandle using usbdevice_fs + */ +class fusb_devhandle_linux : public fusb_devhandle { +private: + std::list d_pending_rqsts; + + void pending_add (usbdevfs_urb *urb); + bool pending_remove (usbdevfs_urb *urb); + usbdevfs_urb * pending_get (); + + +public: + // CREATORS + fusb_devhandle_linux (usb_dev_handle *udh); + virtual ~fusb_devhandle_linux (); + + // MANIPULATORS + virtual fusb_ephandle *make_ephandle (int endpoint, bool input_p, + int block_size = 0, int nblocks = 0); + + // internal use only + bool _submit_urb (usbdevfs_urb *urb); + bool _cancel_urb (usbdevfs_urb *urb); + void _cancel_pending_rqsts (fusb_ephandle_linux *eph); + bool _reap (bool ok_to_block_p); + void _wait_for_completion (); +}; + + /*! + * \brief linux specific implementation of fusb_ephandle using usbdevice_fs + */ + +class fusb_ephandle_linux : public fusb_ephandle { +private: + fusb_devhandle_linux *d_devhandle; + std::list d_free_list; + std::list d_completed_list; + usbdevfs_urb *d_write_work_in_progress; + unsigned char *d_write_buffer; + usbdevfs_urb *d_read_work_in_progress; + unsigned char *d_read_buffer; + unsigned char *d_read_buffer_end; + + usbdevfs_urb *get_write_work_in_progress (); + void reap_complete_writes (); + bool reload_read_buffer (); + bool submit_urb (usbdevfs_urb *urb); + +public: + fusb_ephandle_linux (fusb_devhandle_linux *dh, int endpoint, bool input_p, + int block_size = 0, int nblocks = 0); + virtual ~fusb_ephandle_linux (); + + virtual bool start (); //!< begin streaming i/o + virtual bool stop (); //!< stop streaming i/o + + /*! + * \returns \p nbytes if write was successfully enqueued, else -1. + * Will block if no free buffers available. + */ + virtual int write (const void *buffer, int nbytes); + + /*! + * \returns number of bytes read or -1 if error. + * number of bytes read will be <= nbytes. + * Will block if no input available. + */ + virtual int read (void *buffer, int nbytes); + + /* + * block until all outstanding writes have completed + */ + virtual void wait_for_completion (); + + // internal use only + void free_list_add (usbdevfs_urb *urb); + void completed_list_add (usbdevfs_urb *urb); + usbdevfs_urb *free_list_get (); // pop and return head of list or 0 + usbdevfs_urb *completed_list_get (); // pop and return head of list or 0 +}; + +#endif /* _FUSB_LINUX_H_ */ diff --git a/host/lib/fusb_sysconfig_darwin.cc b/host/lib/fusb_sysconfig_darwin.cc new file mode 100644 index 0000000..3a4fcf9 --- /dev/null +++ b/host/lib/fusb_sysconfig_darwin.cc @@ -0,0 +1,37 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#include +#include + +static const int MAX_BLOCK_SIZE = 32 * 1024; // hard limit + +fusb_devhandle * +fusb_sysconfig::make_devhandle (usb_dev_handle *udh) +{ + return new fusb_devhandle_darwin (udh); +} + +int fusb_sysconfig::max_block_size () +{ + return MAX_BLOCK_SIZE; +} diff --git a/host/lib/fusb_sysconfig_generic.cc b/host/lib/fusb_sysconfig_generic.cc new file mode 100644 index 0000000..6fa2e48 --- /dev/null +++ b/host/lib/fusb_sysconfig_generic.cc @@ -0,0 +1,37 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#include +#include + +static const int MAX_BLOCK_SIZE = 16 * 1024; // hard limit + +fusb_devhandle * +fusb_sysconfig::make_devhandle (usb_dev_handle *udh) +{ + return new fusb_devhandle_generic (udh); +} + +int fusb_sysconfig::max_block_size () +{ + return MAX_BLOCK_SIZE; +} diff --git a/host/lib/fusb_sysconfig_linux.cc b/host/lib/fusb_sysconfig_linux.cc new file mode 100644 index 0000000..f7fc5d6 --- /dev/null +++ b/host/lib/fusb_sysconfig_linux.cc @@ -0,0 +1,37 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#include +#include + +static const int MAX_BLOCK_SIZE = 16 * 1024; // hard limit + +fusb_devhandle * +fusb_sysconfig::make_devhandle (usb_dev_handle *udh) +{ + return new fusb_devhandle_linux (udh); +} + +int fusb_sysconfig::max_block_size () +{ + return MAX_BLOCK_SIZE; +} diff --git a/host/lib/fusb_sysconfig_win32.cc b/host/lib/fusb_sysconfig_win32.cc new file mode 100644 index 0000000..b2b6cb1 --- /dev/null +++ b/host/lib/fusb_sysconfig_win32.cc @@ -0,0 +1,37 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003,2005 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#include +#include + +static const int MAX_BLOCK_SIZE = 64 * 1024; // Windows kernel hard limit + +fusb_devhandle * +fusb_sysconfig::make_devhandle (usb_dev_handle *udh) +{ + return new fusb_devhandle_win32 (udh); +} + +int fusb_sysconfig::max_block_size () +{ + return MAX_BLOCK_SIZE; +} diff --git a/host/lib/fusb_win32.cc b/host/lib/fusb_win32.cc new file mode 100644 index 0000000..494a6be --- /dev/null +++ b/host/lib/fusb_win32.cc @@ -0,0 +1,265 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003,2005 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include +#include +#include +#include + +static const int MAX_BLOCK_SIZE = fusb_sysconfig::max_block_size(); +static const int DEFAULT_BLOCK_SIZE = MAX_BLOCK_SIZE; +static const int DEFAULT_BUFFER_SIZE = 16 * (1L << 20); // 16 MB / endpoint + + +static const int USB_TIMEOUT = 1000; // in milliseconds + + +fusb_devhandle_win32::fusb_devhandle_win32 (usb_dev_handle *udh) + : fusb_devhandle (udh) +{ + // that's it +} + +fusb_devhandle_win32::~fusb_devhandle_win32 () +{ + // nop +} + +fusb_ephandle * +fusb_devhandle_win32::make_ephandle (int endpoint, bool input_p, + int block_size, int nblocks) +{ + return new fusb_ephandle_win32 (this, endpoint, input_p, + block_size, nblocks); +} + +// ---------------------------------------------------------------- + +fusb_ephandle_win32::fusb_ephandle_win32 (fusb_devhandle_win32 *dh, + int endpoint, bool input_p, + int block_size, int nblocks) + : fusb_ephandle (endpoint, input_p, block_size, nblocks), + d_devhandle (dh), d_input_leftover(0),d_output_short(0) +{ + if (d_block_size < 0 || d_block_size > MAX_BLOCK_SIZE) + throw std::out_of_range ("fusb_ephandle_win32: block_size"); + + if (d_nblocks < 0) + throw std::out_of_range ("fusb_ephandle_win32: nblocks"); + + if (d_block_size == 0) + d_block_size = DEFAULT_BLOCK_SIZE; + + if (d_nblocks == 0) + d_nblocks = std::max (1, DEFAULT_BUFFER_SIZE / d_block_size); + + d_buffer = new char [d_block_size*d_nblocks]; + d_context = new void * [d_nblocks]; + + // allocate contexts + + usb_dev_handle *dev = dh->get_usb_dev_handle (); + int i; + + if (d_input_p) + endpoint |= USB_ENDPOINT_IN; + + for (i=0; i + +/*! + * \brief win32 implementation of fusb_devhandle using libusb-win32 + */ +class fusb_devhandle_win32 : public fusb_devhandle +{ +public: + // CREATORS + fusb_devhandle_win32 (usb_dev_handle *udh); + virtual ~fusb_devhandle_win32 (); + + // MANIPULATORS + virtual fusb_ephandle *make_ephandle (int endpoint, bool input_p, + int block_size = 0, int nblocks = 0); +}; + + +/*! + * \brief win32 implementation of fusb_ephandle using libusb-win32 + */ +class fusb_ephandle_win32 : public fusb_ephandle +{ +private: + fusb_devhandle_win32 *d_devhandle; + + unsigned d_curr; + unsigned d_outstanding_write; + int d_output_short; + int d_input_leftover; + void ** d_context; + char * d_buffer; + +public: + // CREATORS + fusb_ephandle_win32 (fusb_devhandle_win32 *dh, int endpoint, bool input_p, + int block_size = 0, int nblocks = 0); + virtual ~fusb_ephandle_win32 (); + + // MANIPULATORS + + virtual bool start (); //!< begin streaming i/o + virtual bool stop (); //!< stop streaming i/o + + /*! + * \returns \p nbytes if write was successfully enqueued, else -1. + * Will block if no free buffers available. + */ + virtual int write (const void *buffer, int nbytes); + + /*! + * \returns number of bytes read or -1 if error. + * number of bytes read will be <= nbytes. + * Will block if no input available. + */ + virtual int read (void *buffer, int nbytes); + + /* + * block until all outstanding writes have completed + */ + virtual void wait_for_completion (); +}; + +#endif /* _FUSB_WIN32_H_ */ + diff --git a/host/lib/gen-ratios b/host/lib/gen-ratios new file mode 100755 index 0000000..2250090 --- /dev/null +++ b/host/lib/gen-ratios @@ -0,0 +1,48 @@ +#!/usr/bin/env python +# -*- python -*- + +def how_good (x): + pof2 = [1,2,4,8,16] + if x in pof2: + return 0 + if x in map (lambda x: x+1, pof2): + return -10 + if x in map (lambda x: x-1, pof2): + return -5 + return -2 + + +def better (v1, v2): + return abs ((v1 & 0xf) - ((v1 >> 4) & 0xf)) < abs ((v2 & 0xf) - ((v2 >> 4) & 0xf)) + + +def foo (): + result = {} + for i in range (1,17): + for j in range (1,17): + i_goodness = how_good (i) + j_goodness = how_good (j) + goodness = i_goodness + j_goodness + v = ((i - 1) << 4) | (j - 1) + + key = i * j + prev = result.get (key, None) + # print "i=%3d j=%3d key=%3d good=%3d v=0x%02x prev=%s" % (i, j, key, goodness, v, prev) + + if not prev: + result[key] = (goodness, v) + elif goodness > prev[0]: + result[key] = (goodness, v) + elif goodness == prev[0] and better(v, prev[1]): + result[key] = (goodness, v) + + r = result.items () + r.sort () + for k, d in r: + print "(%3d, 0x%02x)" % (k, d[1]) + + + +foo () + + diff --git a/host/lib/gen_usrp_dbid.py b/host/lib/gen_usrp_dbid.py new file mode 100755 index 0000000..34a994f --- /dev/null +++ b/host/lib/gen_usrp_dbid.py @@ -0,0 +1,137 @@ +#!/usr/bin/env python + +import sys +import os +import os.path +import re +from optparse import OptionParser + +def write_header(f, comment_char): + f.write(comment_char); f.write('\n') + f.write(comment_char); f.write(' Machine generated by gen_usrp_dbid.py from usrp_dbid.dat\n') + f.write(comment_char); f.write(' Do not edit by hand. All edits will be overwritten.\n') + f.write(comment_char); f.write('\n') + f.write('\n') + +def gen_dbid_py(r): + f = open('usrp_dbid.py', 'w') + comment_char = '#' + write_header(f, comment_char) + f.write(comment_char); f.write('\n') + f.write(comment_char); f.write(" USRP Daughterboard ID's\n") + f.write(comment_char); f.write('\n') + f.write('\n') + for x in r: + f.write('%-16s = %s\n' % (x[1], x[2])) + +def gen_dbid_h(r): + f = open('usrp_dbid.h', 'w') + comment_char = '//' + write_header(f, comment_char) + f.write(comment_char); f.write('\n') + f.write(comment_char); f.write(" USRP Daughterboard ID's\n") + f.write(comment_char); f.write('\n') + f.write('\n') + f.write('#ifndef INCLUDED_USRP_DBID_H\n') + f.write('#define INCLUDED_USRP_DBID_H\n') + f.write('\n') + for x in r: + f.write('#define %-25s %s\n' % ('USRP_DBID_' + x[1], x[2])) + f.write('\n') + f.write('#endif /* INCLUDED_USRP_DBID_H */\n') + +def gen_dbid_cc(r): + f = open('usrp_dbid.cc', 'w') + write_header(f, '//') + head = '''/* + * Copyright 2005 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#include +#include +#include + +#define NELEM(x) sizeof(x)/sizeof(x[0]) + +static struct { + unsigned short dbid; + const char *name; +} dbid_map[] = { +''' + + tail = '''}; + +const std::string +usrp_dbid_to_string (int dbid) +{ + if (dbid == -1) + return ""; + + if (dbid == -2) + return ""; + + for (unsigned i = 0; i < NELEM (dbid_map); i++) + if (dbid == dbid_map[i].dbid) + return dbid_map[i].name; + + char tmp[64]; + snprintf (tmp, sizeof (tmp), "Unknown (0x%04x)", dbid); + return tmp; +} +''' + f.write(head) + for x in r: + f.write(' { %-27s "%s" },\n' % ( + 'USRP_DBID_' + x[1] + ',', x[0])) + f.write(tail) + +def gen_all(src_filename): + src_file = open(src_filename, 'r') + r = [] + for line in src_file: + line = line.strip() + line = re.sub(r'\s*#.*$','', line) + if len(line) == 0: + continue + mo = re.match('"([^"]+)"\s*(0x[0-9a-fA-F]+)', line) + if mo: + str_name = mo.group(1) + id_name = str_name.upper().replace(' ', '_') + id_val = mo.group(2) + r.append((str_name, id_name, id_val)) + #sys.stdout.write('%-16s\t%-16s\t%s\n' % ('"'+str_name+'"', id_name, id_val)) + + gen_dbid_h(r) + gen_dbid_py(r) + gen_dbid_cc(r) + + +def main(): + usage = "usage: %prog [options] usrp_dbid.dat" + parser = OptionParser(usage=usage) + (options, args) = parser.parse_args() + if len(args) != 1: + parser.print_help() + sys.exit(1) + + gen_all(args[0]) + +if __name__ == '__main__': + main() diff --git a/host/lib/md5.c b/host/lib/md5.c new file mode 100644 index 0000000..9fbed5b --- /dev/null +++ b/host/lib/md5.c @@ -0,0 +1,452 @@ +/* md5.c - Functions to compute MD5 message digest of files or memory blocks + according to the definition of MD5 in RFC 1321 from April 1992. + Copyright (C) 1995, 1996, 2001, 2003 Free Software Foundation, Inc. + NOTE: The canonical source of this file is maintained with the GNU C + Library. Bugs can be reported to bug-glibc@prep.ai.mit.edu. + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software Foundation, + Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +/* Written by Ulrich Drepper , 1995. */ + +#ifdef HAVE_CONFIG_H +# include +#endif + +#include "md5.h" + +#include + +#include +#include + +// #include "unlocked-io.h" + +#ifdef _LIBC +# include +# if __BYTE_ORDER == __BIG_ENDIAN +# define WORDS_BIGENDIAN 1 +# endif +/* We need to keep the namespace clean so define the MD5 function + protected using leading __ . */ +# define md5_init_ctx __md5_init_ctx +# define md5_process_block __md5_process_block +# define md5_process_bytes __md5_process_bytes +# define md5_finish_ctx __md5_finish_ctx +# define md5_read_ctx __md5_read_ctx +# define md5_stream __md5_stream +# define md5_buffer __md5_buffer +#endif + +#ifdef WORDS_BIGENDIAN +# define SWAP(n) \ + (((n) << 24) | (((n) & 0xff00) << 8) | (((n) >> 8) & 0xff00) | ((n) >> 24)) +#else +# define SWAP(n) (n) +#endif + +#define BLOCKSIZE 4096 +/* Ensure that BLOCKSIZE is a multiple of 64. */ +#if BLOCKSIZE % 64 != 0 +/* FIXME-someday (soon?): use #error instead of this kludge. */ +"invalid BLOCKSIZE" +#endif + +/* This array contains the bytes used to pad the buffer to the next + 64-byte boundary. (RFC 1321, 3.1: Step 1) */ +static const unsigned char fillbuf[64] = { 0x80, 0 /* , 0, 0, ... */ }; + + +/* Initialize structure containing state of computation. + (RFC 1321, 3.3: Step 3) */ +void +md5_init_ctx (struct md5_ctx *ctx) +{ + ctx->A = 0x67452301; + ctx->B = 0xefcdab89; + ctx->C = 0x98badcfe; + ctx->D = 0x10325476; + + ctx->total[0] = ctx->total[1] = 0; + ctx->buflen = 0; +} + +/* Put result from CTX in first 16 bytes following RESBUF. The result + must be in little endian byte order. + + IMPORTANT: On some systems it is required that RESBUF is correctly + aligned for a 32 bits value. */ +void * +md5_read_ctx (const struct md5_ctx *ctx, void *resbuf) +{ + ((md5_uint32 *) resbuf)[0] = SWAP (ctx->A); + ((md5_uint32 *) resbuf)[1] = SWAP (ctx->B); + ((md5_uint32 *) resbuf)[2] = SWAP (ctx->C); + ((md5_uint32 *) resbuf)[3] = SWAP (ctx->D); + + return resbuf; +} + +/* Process the remaining bytes in the internal buffer and the usual + prolog according to the standard and write the result to RESBUF. + + IMPORTANT: On some systems it is required that RESBUF is correctly + aligned for a 32 bits value. */ +void * +md5_finish_ctx (struct md5_ctx *ctx, void *resbuf) +{ + /* Take yet unprocessed bytes into account. */ + md5_uint32 bytes = ctx->buflen; + size_t pad; + + /* Now count remaining bytes. */ + ctx->total[0] += bytes; + if (ctx->total[0] < bytes) + ++ctx->total[1]; + + pad = bytes >= 56 ? 64 + 56 - bytes : 56 - bytes; + memcpy (&ctx->buffer[bytes], fillbuf, pad); + + /* Put the 64-bit file length in *bits* at the end of the buffer. */ + *(md5_uint32 *) &ctx->buffer[bytes + pad] = SWAP (ctx->total[0] << 3); + *(md5_uint32 *) &ctx->buffer[bytes + pad + 4] = SWAP ((ctx->total[1] << 3) | + (ctx->total[0] >> 29)); + + /* Process last bytes. */ + md5_process_block (ctx->buffer, bytes + pad + 8, ctx); + + return md5_read_ctx (ctx, resbuf); +} + +/* Compute MD5 message digest for bytes read from STREAM. The + resulting message digest number will be written into the 16 bytes + beginning at RESBLOCK. */ +int +md5_stream (FILE *stream, void *resblock) +{ + struct md5_ctx ctx; + char buffer[BLOCKSIZE + 72]; + size_t sum; + + /* Initialize the computation context. */ + md5_init_ctx (&ctx); + + /* Iterate over full file contents. */ + while (1) + { + /* We read the file in blocks of BLOCKSIZE bytes. One call of the + computation function processes the whole buffer so that with the + next round of the loop another block can be read. */ + size_t n; + sum = 0; + + /* Read block. Take care for partial reads. */ + while (1) + { + n = fread (buffer + sum, 1, BLOCKSIZE - sum, stream); + + sum += n; + + if (sum == BLOCKSIZE) + break; + + if (n == 0) + { + /* Check for the error flag IFF N == 0, so that we don't + exit the loop after a partial read due to e.g., EAGAIN + or EWOULDBLOCK. */ + if (ferror (stream)) + return 1; + goto process_partial_block; + } + + /* We've read at least one byte, so ignore errors. But always + check for EOF, since feof may be true even though N > 0. + Otherwise, we could end up calling fread after EOF. */ + if (feof (stream)) + goto process_partial_block; + } + + /* Process buffer with BLOCKSIZE bytes. Note that + BLOCKSIZE % 64 == 0 + */ + md5_process_block (buffer, BLOCKSIZE, &ctx); + } + + process_partial_block:; + + /* Process any remaining bytes. */ + if (sum > 0) + md5_process_bytes (buffer, sum, &ctx); + + /* Construct result in desired memory. */ + md5_finish_ctx (&ctx, resblock); + return 0; +} + +/* Compute MD5 message digest for LEN bytes beginning at BUFFER. The + result is always in little endian byte order, so that a byte-wise + output yields to the wanted ASCII representation of the message + digest. */ +void * +md5_buffer (const char *buffer, size_t len, void *resblock) +{ + struct md5_ctx ctx; + + /* Initialize the computation context. */ + md5_init_ctx (&ctx); + + /* Process whole buffer but last len % 64 bytes. */ + md5_process_bytes (buffer, len, &ctx); + + /* Put result in desired memory area. */ + return md5_finish_ctx (&ctx, resblock); +} + + +void +md5_process_bytes (const void *buffer, size_t len, struct md5_ctx *ctx) +{ + /* When we already have some bits in our internal buffer concatenate + both inputs first. */ + if (ctx->buflen != 0) + { + size_t left_over = ctx->buflen; + size_t add = 128 - left_over > len ? len : 128 - left_over; + + memcpy (&ctx->buffer[left_over], buffer, add); + ctx->buflen += add; + + if (ctx->buflen > 64) + { + md5_process_block (ctx->buffer, ctx->buflen & ~63, ctx); + + ctx->buflen &= 63; + /* The regions in the following copy operation cannot overlap. */ + memcpy (ctx->buffer, &ctx->buffer[(left_over + add) & ~63], + ctx->buflen); + } + + buffer = (const char *) buffer + add; + len -= add; + } + + /* Process available complete blocks. */ + if (len >= 64) + { +#if !_STRING_ARCH_unaligned +/* To check alignment gcc has an appropriate operator. Other + compilers don't. */ +# if __GNUC__ >= 2 +# define UNALIGNED_P(p) (((md5_uintptr) p) % __alignof__ (md5_uint32) != 0) +# else +# define UNALIGNED_P(p) (((md5_uintptr) p) % sizeof (md5_uint32) != 0) +# endif + if (UNALIGNED_P (buffer)) + while (len > 64) + { + md5_process_block (memcpy (ctx->buffer, buffer, 64), 64, ctx); + buffer = (const char *) buffer + 64; + len -= 64; + } + else +#endif + { + md5_process_block (buffer, len & ~63, ctx); + buffer = (const char *) buffer + (len & ~63); + len &= 63; + } + } + + /* Move remaining bytes in internal buffer. */ + if (len > 0) + { + size_t left_over = ctx->buflen; + + memcpy (&ctx->buffer[left_over], buffer, len); + left_over += len; + if (left_over >= 64) + { + md5_process_block (ctx->buffer, 64, ctx); + left_over -= 64; + memcpy (ctx->buffer, &ctx->buffer[64], left_over); + } + ctx->buflen = left_over; + } +} + + +/* These are the four functions used in the four steps of the MD5 algorithm + and defined in the RFC 1321. The first function is a little bit optimized + (as found in Colin Plumbs public domain implementation). */ +/* #define FF(b, c, d) ((b & c) | (~b & d)) */ +#define FF(b, c, d) (d ^ (b & (c ^ d))) +#define FG(b, c, d) FF (d, b, c) +#define FH(b, c, d) (b ^ c ^ d) +#define FI(b, c, d) (c ^ (b | ~d)) + +/* Process LEN bytes of BUFFER, accumulating context into CTX. + It is assumed that LEN % 64 == 0. */ + +void +md5_process_block (const void *buffer, size_t len, struct md5_ctx *ctx) +{ + md5_uint32 correct_words[16]; + const md5_uint32 *words = buffer; + size_t nwords = len / sizeof (md5_uint32); + const md5_uint32 *endp = words + nwords; + md5_uint32 A = ctx->A; + md5_uint32 B = ctx->B; + md5_uint32 C = ctx->C; + md5_uint32 D = ctx->D; + + /* First increment the byte count. RFC 1321 specifies the possible + length of the file up to 2^64 bits. Here we only compute the + number of bytes. Do a double word increment. */ + ctx->total[0] += len; + if (ctx->total[0] < len) + ++ctx->total[1]; + + /* Process all bytes in the buffer with 64 bytes in each round of + the loop. */ + while (words < endp) + { + md5_uint32 *cwp = correct_words; + md5_uint32 A_save = A; + md5_uint32 B_save = B; + md5_uint32 C_save = C; + md5_uint32 D_save = D; + + /* First round: using the given function, the context and a constant + the next context is computed. Because the algorithms processing + unit is a 32-bit word and it is determined to work on words in + little endian byte order we perhaps have to change the byte order + before the computation. To reduce the work for the next steps + we store the swapped words in the array CORRECT_WORDS. */ + +#define OP(a, b, c, d, s, T) \ + do \ + { \ + a += FF (b, c, d) + (*cwp++ = SWAP (*words)) + T; \ + ++words; \ + a = rol (a, s); \ + a += b; \ + } \ + while (0) + + /* Before we start, one word to the strange constants. + They are defined in RFC 1321 as + + T[i] = (int) (4294967296.0 * fabs (sin (i))), i=1..64, or + perl -e 'foreach(1..64){printf "0x%08x\n", int (4294967296 * abs (sin $_))}' + */ + + /* Round 1. */ + OP (A, B, C, D, 7, 0xd76aa478); + OP (D, A, B, C, 12, 0xe8c7b756); + OP (C, D, A, B, 17, 0x242070db); + OP (B, C, D, A, 22, 0xc1bdceee); + OP (A, B, C, D, 7, 0xf57c0faf); + OP (D, A, B, C, 12, 0x4787c62a); + OP (C, D, A, B, 17, 0xa8304613); + OP (B, C, D, A, 22, 0xfd469501); + OP (A, B, C, D, 7, 0x698098d8); + OP (D, A, B, C, 12, 0x8b44f7af); + OP (C, D, A, B, 17, 0xffff5bb1); + OP (B, C, D, A, 22, 0x895cd7be); + OP (A, B, C, D, 7, 0x6b901122); + OP (D, A, B, C, 12, 0xfd987193); + OP (C, D, A, B, 17, 0xa679438e); + OP (B, C, D, A, 22, 0x49b40821); + + /* For the second to fourth round we have the possibly swapped words + in CORRECT_WORDS. Redefine the macro to take an additional first + argument specifying the function to use. */ +#undef OP +#define OP(f, a, b, c, d, k, s, T) \ + do \ + { \ + a += f (b, c, d) + correct_words[k] + T; \ + a = rol (a, s); \ + a += b; \ + } \ + while (0) + + /* Round 2. */ + OP (FG, A, B, C, D, 1, 5, 0xf61e2562); + OP (FG, D, A, B, C, 6, 9, 0xc040b340); + OP (FG, C, D, A, B, 11, 14, 0x265e5a51); + OP (FG, B, C, D, A, 0, 20, 0xe9b6c7aa); + OP (FG, A, B, C, D, 5, 5, 0xd62f105d); + OP (FG, D, A, B, C, 10, 9, 0x02441453); + OP (FG, C, D, A, B, 15, 14, 0xd8a1e681); + OP (FG, B, C, D, A, 4, 20, 0xe7d3fbc8); + OP (FG, A, B, C, D, 9, 5, 0x21e1cde6); + OP (FG, D, A, B, C, 14, 9, 0xc33707d6); + OP (FG, C, D, A, B, 3, 14, 0xf4d50d87); + OP (FG, B, C, D, A, 8, 20, 0x455a14ed); + OP (FG, A, B, C, D, 13, 5, 0xa9e3e905); + OP (FG, D, A, B, C, 2, 9, 0xfcefa3f8); + OP (FG, C, D, A, B, 7, 14, 0x676f02d9); + OP (FG, B, C, D, A, 12, 20, 0x8d2a4c8a); + + /* Round 3. */ + OP (FH, A, B, C, D, 5, 4, 0xfffa3942); + OP (FH, D, A, B, C, 8, 11, 0x8771f681); + OP (FH, C, D, A, B, 11, 16, 0x6d9d6122); + OP (FH, B, C, D, A, 14, 23, 0xfde5380c); + OP (FH, A, B, C, D, 1, 4, 0xa4beea44); + OP (FH, D, A, B, C, 4, 11, 0x4bdecfa9); + OP (FH, C, D, A, B, 7, 16, 0xf6bb4b60); + OP (FH, B, C, D, A, 10, 23, 0xbebfbc70); + OP (FH, A, B, C, D, 13, 4, 0x289b7ec6); + OP (FH, D, A, B, C, 0, 11, 0xeaa127fa); + OP (FH, C, D, A, B, 3, 16, 0xd4ef3085); + OP (FH, B, C, D, A, 6, 23, 0x04881d05); + OP (FH, A, B, C, D, 9, 4, 0xd9d4d039); + OP (FH, D, A, B, C, 12, 11, 0xe6db99e5); + OP (FH, C, D, A, B, 15, 16, 0x1fa27cf8); + OP (FH, B, C, D, A, 2, 23, 0xc4ac5665); + + /* Round 4. */ + OP (FI, A, B, C, D, 0, 6, 0xf4292244); + OP (FI, D, A, B, C, 7, 10, 0x432aff97); + OP (FI, C, D, A, B, 14, 15, 0xab9423a7); + OP (FI, B, C, D, A, 5, 21, 0xfc93a039); + OP (FI, A, B, C, D, 12, 6, 0x655b59c3); + OP (FI, D, A, B, C, 3, 10, 0x8f0ccc92); + OP (FI, C, D, A, B, 10, 15, 0xffeff47d); + OP (FI, B, C, D, A, 1, 21, 0x85845dd1); + OP (FI, A, B, C, D, 8, 6, 0x6fa87e4f); + OP (FI, D, A, B, C, 15, 10, 0xfe2ce6e0); + OP (FI, C, D, A, B, 6, 15, 0xa3014314); + OP (FI, B, C, D, A, 13, 21, 0x4e0811a1); + OP (FI, A, B, C, D, 4, 6, 0xf7537e82); + OP (FI, D, A, B, C, 11, 10, 0xbd3af235); + OP (FI, C, D, A, B, 2, 15, 0x2ad7d2bb); + OP (FI, B, C, D, A, 9, 21, 0xeb86d391); + + /* Add the starting values of the context. */ + A += A_save; + B += B_save; + C += C_save; + D += D_save; + } + + /* Put checksum in context given as argument. */ + ctx->A = A; + ctx->B = B; + ctx->C = C; + ctx->D = D; +} diff --git a/host/lib/md5.h b/host/lib/md5.h new file mode 100644 index 0000000..2b33607 --- /dev/null +++ b/host/lib/md5.h @@ -0,0 +1,129 @@ +/* md5.h - Declaration of functions and data types used for MD5 sum + computing library functions. + Copyright (C) 1995, 1996, 1999, 2000, 2003 Free Software Foundation, Inc. + NOTE: The canonical source of this file is maintained with the GNU C + Library. Bugs can be reported to bug-glibc@prep.ai.mit.edu. + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software Foundation, + Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#ifndef _MD5_H +#define _MD5_H 1 + +#include +#include + +/* The following contortions are an attempt to use the C preprocessor + to determine an unsigned integral type that is 32 bits wide. An + alternative approach is to use autoconf's AC_CHECK_SIZEOF macro, but + doing that would require that the configure script compile and *run* + the resulting executable. Locally running cross-compiled executables + is usually not possible. */ + +#ifdef _LIBC +# include +typedef uint32_t md5_uint32; +typedef uintptr_t md5_uintptr; +#else +# define UINT_MAX_32_BITS 4294967295U + +# if UINT_MAX == UINT_MAX_32_BITS + typedef unsigned int md5_uint32; +# else +# if USHRT_MAX == UINT_MAX_32_BITS + typedef unsigned short md5_uint32; +# else +# if ULONG_MAX == UINT_MAX_32_BITS + typedef unsigned long md5_uint32; +# else + /* The following line is intended to evoke an error. + Using #error is not portable enough. */ + "Cannot determine unsigned 32-bit data type." +# endif +# endif +# endif +/* We have to make a guess about the integer type equivalent in size + to pointers which should always be correct. */ +typedef unsigned long int md5_uintptr; +#endif + +/* Structure to save state of computation between the single steps. */ +struct md5_ctx +{ + md5_uint32 A; + md5_uint32 B; + md5_uint32 C; + md5_uint32 D; + + md5_uint32 total[2]; + md5_uint32 buflen; + char buffer[128]; +}; + +/* + * The following three functions are build up the low level used in + * the functions `md5_stream' and `md5_buffer'. + */ + +/* Initialize structure containing state of computation. + (RFC 1321, 3.3: Step 3) */ +extern void md5_init_ctx (struct md5_ctx *ctx); + +/* Starting with the result of former calls of this function (or the + initialization function update the context for the next LEN bytes + starting at BUFFER. + It is necessary that LEN is a multiple of 64!!! */ +extern void md5_process_block (const void *buffer, size_t len, + struct md5_ctx *ctx); + +/* Starting with the result of former calls of this function (or the + initialization function update the context for the next LEN bytes + starting at BUFFER. + It is NOT required that LEN is a multiple of 64. */ +extern void md5_process_bytes (const void *buffer, size_t len, + struct md5_ctx *ctx); + +/* Process the remaining bytes in the buffer and put result from CTX + in first 16 bytes following RESBUF. The result is always in little + endian byte order, so that a byte-wise output yields to the wanted + ASCII representation of the message digest. + + IMPORTANT: On some systems it is required that RESBUF be correctly + aligned for a 32 bits value. */ +extern void *md5_finish_ctx (struct md5_ctx *ctx, void *resbuf); + + +/* Put result from CTX in first 16 bytes following RESBUF. The result is + always in little endian byte order, so that a byte-wise output yields + to the wanted ASCII representation of the message digest. + + IMPORTANT: On some systems it is required that RESBUF is correctly + aligned for a 32 bits value. */ +extern void *md5_read_ctx (const struct md5_ctx *ctx, void *resbuf); + + +/* Compute MD5 message digest for bytes read from STREAM. The + resulting message digest number will be written into the 16 bytes + beginning at RESBLOCK. */ +extern int md5_stream (FILE *stream, void *resblock); + +/* Compute MD5 message digest for LEN bytes beginning at BUFFER. The + result is always in little endian byte order, so that a byte-wise + output yields to the wanted ASCII representation of the message + digest. */ +extern void *md5_buffer (const char *buffer, size_t len, void *resblock); + +#define rol(x,n) ( ((x) << (n)) | ((x) >> (32-(n))) ) + +#endif diff --git a/host/lib/mld_threads.h b/host/lib/mld_threads.h new file mode 100644 index 0000000..ae6253e --- /dev/null +++ b/host/lib/mld_threads.h @@ -0,0 +1,257 @@ +/* -*- c++ -*- */ +/* + * Copyright 2006 Free Software Foundation, Inc. + * + * This file is part of GNU Radio. + * + * Primary Author: Michael Dickens, NCIP Lab, University of Notre Dame + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifndef _INCLUDED_MLD_THREADS_H_ +#define _INCLUDED_MLD_THREADS_H_ + +/* classes which allow for either pthreads or omni_threads */ + +#ifdef _USE_OMNI_THREADS_ +#include +#else +#include +#endif + +#include + +#define __INLINE__ inline + +class mld_condition_t; + +class mld_mutex_t { +#ifdef _USE_OMNI_THREADS_ + typedef omni_mutex l_mutex, *l_mutex_ptr; +#else + typedef pthread_mutex_t l_mutex, *l_mutex_ptr; +#endif + + friend class mld_condition_t; + +private: + l_mutex_ptr d_mutex; + +protected: + inline l_mutex_ptr mutex () { return (d_mutex); }; + +public: + __INLINE__ mld_mutex_t () { +#ifdef _USE_OMNI_THREADS_ + d_mutex = new omni_mutex (); +#else + d_mutex = (l_mutex_ptr) new l_mutex; + int l_ret = pthread_mutex_init (d_mutex, NULL); + if (l_ret != 0) { + fprintf (stderr, "Error %d creating mutex.\n", l_ret); + throw std::runtime_error ("mld_mutex_t::mld_mutex_t()\n"); + } +#endif + }; + + __INLINE__ ~mld_mutex_t () { + unlock (); +#ifndef _USE_OMNI_THREADS_ + int l_ret = pthread_mutex_destroy (d_mutex); + if (l_ret != 0) { + fprintf (stderr, "mld_mutex_t::~mld_mutex_t(): " + "Error %d destroying mutex.\n", l_ret); + } +#endif + delete d_mutex; + d_mutex = NULL; + }; + + __INLINE__ void lock () { +#ifdef _USE_OMNI_THREADS_ + d_mutex->lock (); +#else + int l_ret = pthread_mutex_lock (d_mutex); + if (l_ret != 0) { + fprintf (stderr, "mld_mutex_t::lock(): " + "Error %d locking mutex.\n", l_ret); + } +#endif + }; + + __INLINE__ void unlock () { +#ifdef _USE_OMNI_THREADS_ + d_mutex->unlock (); +#else + int l_ret = pthread_mutex_unlock (d_mutex); + if (l_ret != 0) { + fprintf (stderr, "mld_mutex_t::unlock(): " + "Error %d locking mutex.\n", l_ret); + } +#endif + }; + + __INLINE__ bool trylock () { +#ifdef _USE_OMNI_THREADS_ + int l_ret = d_mutex->trylock (); +#else + int l_ret = pthread_mutex_unlock (d_mutex); +#endif + return (l_ret == 0 ? true : false); + }; + + inline void acquire () { lock(); }; + inline void release () { unlock(); }; + inline void wait () { lock(); }; + inline void post () { unlock(); }; +}; + +typedef mld_mutex_t mld_mutex, *mld_mutex_ptr; + +class mld_condition_t { +#ifdef _USE_OMNI_THREADS_ + typedef omni_condition l_condition, *l_condition_ptr; +#else + typedef pthread_cond_t l_condition, *l_condition_ptr; +#endif + +private: + l_condition_ptr d_condition; + mld_mutex_ptr d_mutex; + bool d_waiting; + +public: + __INLINE__ mld_condition_t () { + d_waiting = false; + d_mutex = new mld_mutex (); +#ifdef _USE_OMNI_THREADS_ + d_condition = new omni_condition (d_mutex->mutex ()); +#else + d_condition = (l_condition_ptr) new l_condition; + int l_ret = pthread_cond_init (d_condition, NULL); + if (l_ret != 0) { + fprintf (stderr, "Error %d creating condition.\n", l_ret); + throw std::runtime_error ("mld_condition_t::mld_condition_t()\n"); + } +#endif + }; + + __INLINE__ ~mld_condition_t () { + signal (); +#ifndef _USE_OMNI_THREADS_ + int l_ret = pthread_cond_destroy (d_condition); + if (l_ret != 0) { + fprintf (stderr, "mld_condition_t::mld_condition_t(): " + "Error %d destroying condition.\n", l_ret); + } +#endif + delete d_condition; + d_condition = NULL; + delete d_mutex; + d_mutex = NULL; + }; + + __INLINE__ void signal () { + if (d_waiting == true) { +#ifdef _USE_OMNI_THREADS_ + d_condition->signal (); +#else + int l_ret = pthread_cond_signal (d_condition); + if (l_ret != 0) { + fprintf (stderr, "mld_condition_t::signal(): " + "Error %d.\n", l_ret); + } +#endif + d_waiting = false; + } + }; + + __INLINE__ void wait () { + if (d_waiting == false) { + d_waiting = true; +#ifdef _USE_OMNI_THREADS_ + d_condition->wait (); +#else + int l_ret = pthread_cond_wait (d_condition, d_mutex->mutex ()); + if (l_ret != 0) { + fprintf (stderr, "mld_condition_t::wait(): " + "Error %d.\n", l_ret); + } +#endif + } + }; +}; + +typedef mld_condition_t mld_condition, *mld_condition_ptr; + +class mld_thread_t { +#ifdef _USE_OMNI_THREADS_ + typedef omni_thread l_thread, *l_thread_ptr; +#else + typedef pthread_t l_thread, *l_thread_ptr; +#endif + +private: +#ifndef _USE_OMNI_THREADS_ + l_thread d_thread; + void (*d_start_routine)(void*); + void *d_arg; +#else + l_thread_ptr d_thread; +#endif + +#ifndef _USE_OMNI_THREADS_ + static void* local_start_routine (void *arg) { + mld_thread_t* This = (mld_thread_t*) arg; + (*(This->d_start_routine))(This->d_arg); + return (NULL); + }; +#endif + +public: + __INLINE__ mld_thread_t (void (*start_routine)(void *), void *arg) { +#ifdef _USE_OMNI_THREADS_ + d_thread = new omni_thread (start_routine, arg); + d_thread->start (); +#else + d_start_routine = start_routine; + d_arg = arg; + int l_ret = pthread_create (&d_thread, NULL, local_start_routine, this); + if (l_ret != 0) { + fprintf (stderr, "Error %d creating thread.\n", l_ret); + throw std::runtime_error ("mld_thread_t::mld_thread_t()\n"); + } +#endif + }; + + __INLINE__ ~mld_thread_t () { +#ifdef _USE_OMNI_THREADS_ +// delete d_thread; + d_thread = NULL; +#else + int l_ret = pthread_detach (d_thread); + if (l_ret != 0) { + fprintf (stderr, "Error %d detaching thread.\n", l_ret); + throw std::runtime_error ("mld_thread_t::~mld_thread_t()\n"); + } +#endif + }; +}; + +typedef mld_thread_t mld_thread, *mld_thread_ptr; + +#endif /* _INCLUDED_MLD_THREADS_H_ */ diff --git a/host/lib/rate_to_regval.h b/host/lib/rate_to_regval.h new file mode 100644 index 0000000..1ffdc0f --- /dev/null +++ b/host/lib/rate_to_regval.h @@ -0,0 +1,97 @@ + { 1, 0x00 }, + { 2, 0x01 }, + { 3, 0x02 }, + { 4, 0x11 }, + { 5, 0x04 }, + { 6, 0x05 }, + { 7, 0x06 }, + { 8, 0x13 }, + { 9, 0x08 }, + { 10, 0x09 }, + { 11, 0x0a }, + { 12, 0x15 }, + { 13, 0x0c }, + { 14, 0x0d }, + { 15, 0x0e }, + { 16, 0x33 }, + { 18, 0x18 }, + { 20, 0x19 }, + { 21, 0x26 }, + { 22, 0x1a }, + { 24, 0x35 }, + { 25, 0x44 }, + { 26, 0x1c }, + { 27, 0x28 }, + { 28, 0x1d }, + { 30, 0x1e }, + { 32, 0x37 }, + { 33, 0x2a }, + { 35, 0x46 }, + { 36, 0x55 }, + { 39, 0x2c }, + { 40, 0x39 }, + { 42, 0x56 }, + { 44, 0x3a }, + { 45, 0x2e }, + { 48, 0x57 }, + { 49, 0x66 }, + { 50, 0x49 }, + { 52, 0x3c }, + { 54, 0x58 }, + { 55, 0x4a }, + { 56, 0x3d }, + { 60, 0x59 }, + { 63, 0x68 }, + { 64, 0x77 }, + { 65, 0x4c }, + { 66, 0x5a }, + { 70, 0x69 }, + { 72, 0x5b }, + { 75, 0x4e }, + { 77, 0x6a }, + { 78, 0x5c }, + { 80, 0x79 }, + { 81, 0x88 }, + { 84, 0x5d }, + { 88, 0x7a }, + { 90, 0x5e }, + { 91, 0x6c }, + { 96, 0x7b }, + { 98, 0x6d }, + { 99, 0x8a }, + { 100, 0x99 }, + { 104, 0x7c }, + { 105, 0x6e }, + { 108, 0x8b }, + { 110, 0x9a }, + { 112, 0x7d }, + { 117, 0x8c }, + { 120, 0x9b }, + { 121, 0xaa }, + { 126, 0x8d }, + { 128, 0x7f }, + { 130, 0x9c }, + { 132, 0xab }, + { 135, 0x8e }, + { 140, 0x9d }, + { 143, 0xac }, + { 144, 0xbb }, + { 150, 0x9e }, + { 154, 0xad }, + { 156, 0xbc }, + { 160, 0x9f }, + { 165, 0xae }, + { 168, 0xbd }, + { 169, 0xcc }, + { 176, 0xaf }, + { 180, 0xbe }, + { 182, 0xcd }, + { 192, 0xbf }, + { 195, 0xce }, + { 196, 0xdd }, + { 208, 0xcf }, + { 210, 0xde }, + { 224, 0xdf }, + { 225, 0xee }, + { 240, 0xef }, + { 256, 0xff } diff --git a/host/lib/std_paths.h.in b/host/lib/std_paths.h.in new file mode 100644 index 0000000..fe973e3 --- /dev/null +++ b/host/lib/std_paths.h.in @@ -0,0 +1,27 @@ +/* -*- c++ -*- */ +/* + * Copyright 2005 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +static char *std_paths[] = { + "@prefix@/share/usrp", + "/usr/local/share/usrp", + 0 +}; diff --git a/host/lib/usrp_basic.cc b/host/lib/usrp_basic.cc new file mode 100644 index 0000000..2029480 --- /dev/null +++ b/host/lib/usrp_basic.cc @@ -0,0 +1,1239 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003,2004 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include "usrp_basic.h" +#include "usrp_prims.h" +#include "usrp_interfaces.h" +#include "fpga_regs_common.h" +#include "fusb.h" +#include +#include +#include +#include +#include + +using namespace ad9862; + +#define NELEM(x) (sizeof (x) / sizeof (x[0])) + +// These set the buffer size used for each end point using the fast +// usb interface. The kernel ends up locking down this much memory. + +static const int FUSB_BUFFER_SIZE = 2 * (1L << 20); // 2 MB (was 8 MB) +//static const int FUSB_BUFFER_SIZE = 256 * (1L << 10); // 256 kB +static const int FUSB_BLOCK_SIZE = fusb_sysconfig::max_block_size(); +static const int FUSB_NBLOCKS = FUSB_BUFFER_SIZE / FUSB_BLOCK_SIZE; + + +static const double POLLING_INTERVAL = 0.1; // seconds + +//////////////////////////////////////////////////////////////// + +static struct usb_dev_handle * +open_rx_interface (struct usb_device *dev) +{ + struct usb_dev_handle *udh = usrp_open_rx_interface (dev); + if (udh == 0){ + fprintf (stderr, "usrp_basic_rx: can't open rx interface\n"); + usb_strerror (); + } + return udh; +} + +static struct usb_dev_handle * +open_tx_interface (struct usb_device *dev) +{ + struct usb_dev_handle *udh = usrp_open_tx_interface (dev); + if (udh == 0){ + fprintf (stderr, "usrp_basic_tx: can't open tx interface\n"); + usb_strerror (); + } + return udh; +} + + +////////////////////////////////////////////////////////////////// +// +// usrp_basic +// +//////////////////////////////////////////////////////////////// + + +// Given: +// CLKIN = 64 MHz +// CLKSEL pin = high +// +// These settings give us: +// CLKOUT1 = CLKIN = 64 MHz +// CLKOUT2 = CLKIN = 64 MHz +// ADC is clocked at 64 MHz +// DAC is clocked at 128 MHz + +static unsigned char common_regs[] = { + REG_GENERAL, 0, + REG_DLL, (DLL_DISABLE_INTERNAL_XTAL_OSC + | DLL_MULT_2X + | DLL_FAST), + REG_CLKOUT, CLKOUT2_EQ_DLL_OVER_2, + REG_AUX_ADC_CLK, AUX_ADC_CLK_CLK_OVER_4 +}; + + +usrp_basic::usrp_basic (int which_board, + struct usb_dev_handle * + open_interface (struct usb_device *dev), + const std::string fpga_filename, + const std::string firmware_filename) + : d_udh (0), + d_usb_data_rate (16000000), // SWAG, see below + d_bytes_per_poll ((int) (POLLING_INTERVAL * d_usb_data_rate)), + d_verbose (false) +{ + /* + * SWAG: Scientific Wild Ass Guess. + * + * d_usb_data_rate is used only to determine how often to poll for over- and under-runs. + * We defualt it to 1/2 of our best case. Classes derived from usrp_basic (e.g., + * usrp_standard_tx and usrp_standard_rx) call set_usb_data_rate() to tell us the + * actual rate. This doesn't change our throughput, that's determined by the signal + * processing code in the FPGA (which we know nothing about), and the system limits + * determined by libusb, fusb_*, and the underlying drivers. + */ + memset (d_fpga_shadows, 0, sizeof (d_fpga_shadows)); + + usrp_one_time_init (); + + if (!usrp_load_standard_bits (which_board, false, fpga_filename, firmware_filename)) + throw std::runtime_error ("usrp_basic/usrp_load_standard_bits"); + + struct usb_device *dev = usrp_find_device (which_board); + if (dev == 0){ + fprintf (stderr, "usrp_basic: can't find usrp[%d]\n", which_board); + throw std::runtime_error ("usrp_basic/usrp_find_device"); + } + + if (!(usrp_usrp_p(dev) && usrp_hw_rev(dev) >= 1)){ + fprintf (stderr, "usrp_basic: sorry, this code only works with USRP revs >= 1\n"); + throw std::runtime_error ("usrp_basic/bad_rev"); + } + + if ((d_udh = open_interface (dev)) == 0) + throw std::runtime_error ("usrp_basic/open_interface"); + + // initialize registers that are common to rx and tx + + if (!usrp_9862_write_many_all (d_udh, common_regs, sizeof (common_regs))){ + fprintf (stderr, "usrp_basic: failed to init common AD9862 regs\n"); + throw std::runtime_error ("usrp_basic/init_9862"); + } + + _write_fpga_reg (FR_MODE, 0); // ensure we're in normal mode + _write_fpga_reg (FR_DEBUG_EN, 0); // disable debug outputs +} + +usrp_basic::~usrp_basic () +{ + if (d_udh) + usb_close (d_udh); +} + +bool +usrp_basic::start () +{ + return true; // nop +} + +bool +usrp_basic::stop () +{ + return true; // nop +} + +void +usrp_basic::set_usb_data_rate (int usb_data_rate) +{ + d_usb_data_rate = usb_data_rate; + d_bytes_per_poll = (int) (usb_data_rate * POLLING_INTERVAL); +} + +bool +usrp_basic::write_aux_dac (int slot, int which_dac, int value) +{ + return usrp_write_aux_dac (d_udh, slot, which_dac, value); +} + +bool +usrp_basic::read_aux_adc (int slot, int which_adc, int *value) +{ + return usrp_read_aux_adc (d_udh, slot, which_adc, value); +} + +int +usrp_basic::read_aux_adc (int slot, int which_adc) +{ + int value; + if (!read_aux_adc (slot, which_adc, &value)) + return READ_FAILED; + + return value; +} + +bool +usrp_basic::write_eeprom (int i2c_addr, int eeprom_offset, const std::string buf) +{ + return usrp_eeprom_write (d_udh, i2c_addr, eeprom_offset, buf.data (), buf.size ()); +} + +std::string +usrp_basic::read_eeprom (int i2c_addr, int eeprom_offset, int len) +{ + if (len <= 0) + return ""; + + char buf[len]; + + if (!usrp_eeprom_read (d_udh, i2c_addr, eeprom_offset, buf, len)) + return ""; + + return std::string (buf, len); +} + +bool +usrp_basic::write_i2c (int i2c_addr, const std::string buf) +{ + return usrp_i2c_write (d_udh, i2c_addr, buf.data (), buf.size ()); +} + +std::string +usrp_basic::read_i2c (int i2c_addr, int len) +{ + if (len <= 0) + return ""; + + char buf[len]; + + if (!usrp_i2c_read (d_udh, i2c_addr, buf, len)) + return ""; + + return std::string (buf, len); +} + +std::string +usrp_basic::serial_number() +{ + return usrp_serial_number(d_udh); +} + +// ---------------------------------------------------------------- + +bool +usrp_basic::set_adc_offset (int which, int offset) +{ + if (which < 0 || which > 3) + return false; + + return _write_fpga_reg (FR_ADC_OFFSET_0 + which, offset); +} + +bool +usrp_basic::set_dac_offset (int which, int offset, int offset_pin) +{ + if (which < 0 || which > 3) + return false; + + int which_codec = which >> 1; + int tx_a = (which & 0x1) == 0; + int lo = ((offset & 0x3) << 6) | (offset_pin & 0x1); + int hi = (offset >> 2); + bool ok; + + if (tx_a){ + ok = _write_9862 (which_codec, REG_TX_A_OFFSET_LO, lo); + ok &= _write_9862 (which_codec, REG_TX_A_OFFSET_HI, hi); + } + else { + ok = _write_9862 (which_codec, REG_TX_B_OFFSET_LO, lo); + ok &= _write_9862 (which_codec, REG_TX_B_OFFSET_HI, hi); + } + return ok; +} + +bool +usrp_basic::set_adc_buffer_bypass (int which, bool bypass) +{ + if (which < 0 || which > 3) + return false; + + int codec = which >> 1; + int reg = (which & 1) == 0 ? REG_RX_A : REG_RX_B; + + unsigned char cur_rx; + unsigned char cur_pwr_dn; + + // If the input buffer is bypassed, we need to power it down too. + + bool ok = _read_9862 (codec, reg, &cur_rx); + ok &= _read_9862 (codec, REG_RX_PWR_DN, &cur_pwr_dn); + if (!ok) + return false; + + if (bypass){ + cur_rx |= RX_X_BYPASS_INPUT_BUFFER; + cur_pwr_dn |= ((which & 1) == 0) ? RX_PWR_DN_BUF_A : RX_PWR_DN_BUF_B; + } + else { + cur_rx &= ~RX_X_BYPASS_INPUT_BUFFER; + cur_pwr_dn &= ~(((which & 1) == 0) ? RX_PWR_DN_BUF_A : RX_PWR_DN_BUF_B); + } + + ok &= _write_9862 (codec, reg, cur_rx); + ok &= _write_9862 (codec, REG_RX_PWR_DN, cur_pwr_dn); + return ok; +} + +// ---------------------------------------------------------------- + +bool +usrp_basic::_write_fpga_reg (int regno, int value) +{ + if (d_verbose){ + fprintf (stdout, "_write_fpga_reg(%3d, 0x%08x)\n", regno, value); + fflush (stdout); + } + + if (regno >= 0 && regno < MAX_REGS) + d_fpga_shadows[regno] = value; + + return usrp_write_fpga_reg (d_udh, regno, value); +} + +bool +usrp_basic::_write_fpga_reg_masked (int regno, int value, int mask) +{ + //Only use this for registers who actually use a mask in the verilog firmware, like FR_RX_MASTER_SLAVE + //value is a 16 bits value and mask is a 16 bits mask + if (d_verbose){ + fprintf (stdout, "_write_fpga_reg_masked(%3d, 0x%04x,0x%04x)\n", regno, value, mask); + fflush (stdout); + } + + if (regno >= 0 && regno < MAX_REGS) + d_fpga_shadows[regno] = value; + + return usrp_write_fpga_reg (d_udh, regno, (value & 0xffff) | ((mask & 0xffff)<<16)); +} + + +bool +usrp_basic::_read_fpga_reg (int regno, int *value) +{ + return usrp_read_fpga_reg (d_udh, regno, value); +} + +int +usrp_basic::_read_fpga_reg (int regno) +{ + int value; + if (!_read_fpga_reg (regno, &value)) + return READ_FAILED; + return value; +} + +bool +usrp_basic::_write_9862 (int which_codec, int regno, unsigned char value) +{ + if (0 && d_verbose){ + // FIXME really want to enable logging in usrp_prims:usrp_9862_write + fprintf(stdout, "_write_9862(codec = %d, regno = %2d, val = 0x%02x)\n", which_codec, regno, value); + fflush(stdout); + } + + return usrp_9862_write (d_udh, which_codec, regno, value); +} + + +bool +usrp_basic::_read_9862 (int which_codec, int regno, unsigned char *value) const +{ + return usrp_9862_read (d_udh, which_codec, regno, value); +} + +int +usrp_basic::_read_9862 (int which_codec, int regno) const +{ + unsigned char value; + if (!_read_9862 (which_codec, regno, &value)) + return READ_FAILED; + return value; +} + +bool +usrp_basic::_write_spi (int optional_header, int enables, int format, std::string buf) +{ + return usrp_spi_write (d_udh, optional_header, enables, format, + buf.data(), buf.size()); +} + +std::string +usrp_basic::_read_spi (int optional_header, int enables, int format, int len) +{ + if (len <= 0) + return ""; + + char buf[len]; + + if (!usrp_spi_read (d_udh, optional_header, enables, format, buf, len)) + return ""; + + return std::string (buf, len); +} + + +bool +usrp_basic::_set_led (int which, bool on) +{ + return usrp_set_led (d_udh, which, on); +} + +//////////////////////////////////////////////////////////////// +// +// usrp_basic_rx +// +//////////////////////////////////////////////////////////////// + +static unsigned char rx_init_regs[] = { + REG_RX_PWR_DN, 0, + REG_RX_A, 0, // minimum gain = 0x00 (max gain = 0x14) + REG_RX_B, 0, // minimum gain = 0x00 (max gain = 0x14) + REG_RX_MISC, (RX_MISC_HS_DUTY_CYCLE | RX_MISC_CLK_DUTY), + REG_RX_IF, (RX_IF_USE_CLKOUT1 + | RX_IF_2S_COMP), + REG_RX_DIGITAL, (RX_DIGITAL_2_CHAN) +}; + + +usrp_basic_rx::usrp_basic_rx (int which_board, int fusb_block_size, int fusb_nblocks, + const std::string fpga_filename, + const std::string firmware_filename + ) + : usrp_basic (which_board, open_rx_interface, fpga_filename, firmware_filename), + d_devhandle (0), d_ephandle (0), + d_bytes_seen (0), d_first_read (true), + d_rx_enable (false) +{ + // initialize rx specific registers + + if (!usrp_9862_write_many_all (d_udh, rx_init_regs, sizeof (rx_init_regs))){ + fprintf (stderr, "usrp_basic_rx: failed to init AD9862 RX regs\n"); + throw std::runtime_error ("usrp_basic_rx/init_9862"); + } + + if (0){ + // FIXME power down 2nd codec rx path + usrp_9862_write (d_udh, 1, REG_RX_PWR_DN, 0x1); // power down everything + } + + // Reset the rx path and leave it disabled. + set_rx_enable (false); + usrp_set_fpga_rx_reset (d_udh, true); + usrp_set_fpga_rx_reset (d_udh, false); + + set_fpga_rx_sample_rate_divisor (2); // usually correct + + set_dc_offset_cl_enable(0xf, 0xf); // enable DC offset removal control loops + + probe_rx_slots (false); + + // check fusb buffering parameters + + if (fusb_block_size < 0 || fusb_block_size > FUSB_BLOCK_SIZE) + throw std::out_of_range ("usrp_basic_rx: invalid fusb_block_size"); + + if (fusb_nblocks < 0) + throw std::out_of_range ("usrp_basic_rx: invalid fusb_nblocks"); + + if (fusb_block_size == 0) + fusb_block_size = FUSB_BLOCK_SIZE; + + if (fusb_nblocks == 0) + fusb_nblocks = std::max (1, FUSB_BUFFER_SIZE / fusb_block_size); + + d_devhandle = fusb_sysconfig::make_devhandle (d_udh); + d_ephandle = d_devhandle->make_ephandle (USRP_RX_ENDPOINT, true, + fusb_block_size, fusb_nblocks); + + _write_fpga_reg(FR_ATR_MASK_1, 0); // zero Rx side Auto Transmit/Receive regs + _write_fpga_reg(FR_ATR_TXVAL_1, 0); + _write_fpga_reg(FR_ATR_RXVAL_1, 0); + _write_fpga_reg(FR_ATR_MASK_3, 0); + _write_fpga_reg(FR_ATR_TXVAL_3, 0); + _write_fpga_reg(FR_ATR_RXVAL_3, 0); +} + +static unsigned char rx_fini_regs[] = { + REG_RX_PWR_DN, 0x1 // power down everything +}; + +usrp_basic_rx::~usrp_basic_rx () +{ + if (!set_rx_enable (false)){ + fprintf (stderr, "usrp_basic_rx: set_fpga_rx_enable failed\n"); + usb_strerror (); + } + + d_ephandle->stop (); + delete d_ephandle; + delete d_devhandle; + + if (!usrp_9862_write_many_all (d_udh, rx_fini_regs, sizeof (rx_fini_regs))){ + fprintf (stderr, "usrp_basic_rx: failed to fini AD9862 RX regs\n"); + } +} + + +bool +usrp_basic_rx::start () +{ + if (!usrp_basic::start ()) // invoke parent's method + return false; + + // fire off reads before asserting rx_enable + + if (!d_ephandle->start ()){ + fprintf (stderr, "usrp_basic_rx: failed to start end point streaming"); + usb_strerror (); + return false; + } + + if (!set_rx_enable (true)){ + fprintf (stderr, "usrp_basic_rx: set_rx_enable failed\n"); + usb_strerror (); + return false; + } + + return true; +} + +bool +usrp_basic_rx::stop () +{ + bool ok = usrp_basic::stop(); + + if (!d_ephandle->stop()){ + fprintf (stderr, "usrp_basic_rx: failed to stop end point streaming"); + usb_strerror (); + ok = false; + } + if (!set_rx_enable(false)){ + fprintf (stderr, "usrp_basic_rx: set_rx_enable(false) failed\n"); + usb_strerror (); + ok = false; + } + return false; +} + +usrp_basic_rx * +usrp_basic_rx::make (int which_board, int fusb_block_size, int fusb_nblocks, + const std::string fpga_filename, + const std::string firmware_filename) +{ + usrp_basic_rx *u = 0; + + try { + u = new usrp_basic_rx (which_board, fusb_block_size, fusb_nblocks, + fpga_filename, firmware_filename); + return u; + } + catch (...){ + delete u; + return 0; + } + + return u; +} + +bool +usrp_basic_rx::set_fpga_rx_sample_rate_divisor (unsigned int div) +{ + return _write_fpga_reg (FR_RX_SAMPLE_RATE_DIV, div - 1); +} + + +/* + * \brief read data from the D/A's via the FPGA. + * \p len must be a multiple of 512 bytes. + * + * \returns the number of bytes read, or -1 on error. + * + * If overrun is non-NULL it will be set true iff an RX overrun is detected. + */ +int +usrp_basic_rx::read (void *buf, int len, bool *overrun) +{ + int r; + + if (overrun) + *overrun = false; + + if (len < 0 || (len % 512) != 0){ + fprintf (stderr, "usrp_basic_rx::read: invalid length = %d\n", len); + return -1; + } + + r = d_ephandle->read (buf, len); + if (r > 0) + d_bytes_seen += r; + + /* + * In many cases, the FPGA reports an rx overrun right after we + * enable the Rx path. If this is our first read, check for the + * overrun to clear the condition, then ignore the result. + */ + if (0 && d_first_read){ // FIXME + d_first_read = false; + bool bogus_overrun; + usrp_check_rx_overrun (d_udh, &bogus_overrun); + } + + if (overrun != 0 && d_bytes_seen >= d_bytes_per_poll){ + d_bytes_seen = 0; + if (!usrp_check_rx_overrun (d_udh, overrun)){ + fprintf (stderr, "usrp_basic_rx: usrp_check_rx_overrun failed\n"); + usb_strerror (); + } + } + + return r; +} + +bool +usrp_basic_rx::set_rx_enable (bool on) +{ + d_rx_enable = on; + return usrp_set_fpga_rx_enable (d_udh, on); +} + +// conditional disable, return prev state +bool +usrp_basic_rx::disable_rx () +{ + bool enabled = rx_enable (); + if (enabled) + set_rx_enable (false); + return enabled; +} + +// conditional set +void +usrp_basic_rx::restore_rx (bool on) +{ + if (on != rx_enable ()) + set_rx_enable (on); +} + +bool +usrp_basic_rx::set_pga (int which, double gain) +{ + if (which < 0 || which > 3) + return false; + + gain = std::max (pga_min (), gain); + gain = std::min (pga_max (), gain); + + int codec = which >> 1; + int reg = (which & 1) == 0 ? REG_RX_A : REG_RX_B; + + // read current value to get input buffer bypass flag. + unsigned char cur_rx; + if (!_read_9862 (codec, reg, &cur_rx)) + return false; + + int int_gain = (int) rint ((gain - pga_min ()) / pga_db_per_step()); + + cur_rx = (cur_rx & RX_X_BYPASS_INPUT_BUFFER) | (int_gain & 0x7f); + return _write_9862 (codec, reg, cur_rx); +} + +double +usrp_basic_rx::pga (int which) const +{ + if (which < 0 || which > 3) + return READ_FAILED; + + int codec = which >> 1; + int reg = (which & 1) == 0 ? REG_RX_A : REG_RX_B; + unsigned char v; + bool ok = _read_9862 (codec, reg, &v); + if (!ok) + return READ_FAILED; + + return (pga_db_per_step() * (v & 0x1f)) + pga_min(); +} + +static int +slot_id_to_oe_reg (int slot_id) +{ + static int reg[4] = { FR_OE_0, FR_OE_1, FR_OE_2, FR_OE_3 }; + assert (0 <= slot_id && slot_id < 4); + return reg[slot_id]; +} + +static int +slot_id_to_io_reg (int slot_id) +{ + static int reg[4] = { FR_IO_0, FR_IO_1, FR_IO_2, FR_IO_3 }; + assert (0 <= slot_id && slot_id < 4); + return reg[slot_id]; +} + +void +usrp_basic_rx::probe_rx_slots (bool verbose) +{ + struct usrp_dboard_eeprom eeprom; + static int slot_id_map[2] = { SLOT_RX_A, SLOT_RX_B }; + static const char *slot_name[2] = { "RX d'board A", "RX d'board B" }; + + for (int i = 0; i < 2; i++){ + int slot_id = slot_id_map [i]; + const char *msg = 0; + usrp_dbeeprom_status_t s = usrp_read_dboard_eeprom (d_udh, slot_id, &eeprom); + + switch (s){ + case UDBE_OK: + d_dbid[i] = eeprom.id; + msg = usrp_dbid_to_string (eeprom.id).c_str (); + set_adc_offset (2*i+0, eeprom.offset[0]); + set_adc_offset (2*i+1, eeprom.offset[1]); + _write_fpga_reg (slot_id_to_oe_reg(slot_id), (0xffff << 16) | eeprom.oe); + _write_fpga_reg (slot_id_to_io_reg(slot_id), (0xffff << 16) | 0x0000); + break; + + case UDBE_NO_EEPROM: + d_dbid[i] = -1; + msg = ""; + _write_fpga_reg (slot_id_to_oe_reg(slot_id), (0xffff << 16) | 0x0000); + _write_fpga_reg (slot_id_to_io_reg(slot_id), (0xffff << 16) | 0x0000); + break; + + case UDBE_INVALID_EEPROM: + d_dbid[i] = -2; + msg = "Invalid EEPROM contents"; + _write_fpga_reg (slot_id_to_oe_reg(slot_id), (0xffff << 16) | 0x0000); + _write_fpga_reg (slot_id_to_io_reg(slot_id), (0xffff << 16) | 0x0000); + break; + + case UDBE_BAD_SLOT: + default: + assert (0); + } + + if (verbose){ + fflush (stdout); + fprintf (stderr, "%s: %s\n", slot_name[i], msg); + } + } +} + +bool +usrp_basic_rx::_write_oe (int which_dboard, int value, int mask) +{ + if (! (0 <= which_dboard && which_dboard <= 1)) + return false; + + return _write_fpga_reg (slot_id_to_oe_reg (dboard_to_slot (which_dboard)), + (mask << 16) | (value & 0xffff)); +} + +bool +usrp_basic_rx::write_io (int which_dboard, int value, int mask) +{ + if (! (0 <= which_dboard && which_dboard <= 1)) + return false; + + return _write_fpga_reg (slot_id_to_io_reg (dboard_to_slot (which_dboard)), + (mask << 16) | (value & 0xffff)); +} + +bool +usrp_basic_rx::read_io (int which_dboard, int *value) +{ + if (! (0 <= which_dboard && which_dboard <= 1)) + return false; + + int t; + int reg = which_dboard + 1; // FIXME, *very* magic number (fix in serial_io.v) + bool ok = _read_fpga_reg (reg, &t); + if (!ok) + return false; + + *value = (t >> 16) & 0xffff; // FIXME, more magic + return true; +} + +int +usrp_basic_rx::read_io (int which_dboard) +{ + int value; + if (!read_io (which_dboard, &value)) + return READ_FAILED; + return value; +} + +bool +usrp_basic_rx::write_aux_dac (int which_dboard, int which_dac, int value) +{ + return usrp_basic::write_aux_dac (dboard_to_slot (which_dboard), + which_dac, value); +} + +bool +usrp_basic_rx::read_aux_adc (int which_dboard, int which_adc, int *value) +{ + return usrp_basic::read_aux_adc (dboard_to_slot (which_dboard), + which_adc, value); +} + +int +usrp_basic_rx::read_aux_adc (int which_dboard, int which_adc) +{ + return usrp_basic::read_aux_adc (dboard_to_slot (which_dboard), which_adc); +} + +int +usrp_basic_rx::block_size () const { return d_ephandle->block_size(); } + +bool +usrp_basic_rx::set_dc_offset_cl_enable(int bits, int mask) +{ + return _write_fpga_reg(FR_DC_OFFSET_CL_EN, + (d_fpga_shadows[FR_DC_OFFSET_CL_EN] & ~mask) | (bits & mask)); +} + +//////////////////////////////////////////////////////////////// +// +// usrp_basic_tx +// +//////////////////////////////////////////////////////////////// + + +// +// DAC input rate 64 MHz interleaved for a total input rate of 128 MHz +// DAC input is latched on rising edge of CLKOUT2 +// NCO is disabled +// interpolate 2x +// coarse modulator disabled +// + +static unsigned char tx_init_regs[] = { + REG_TX_PWR_DN, 0, + REG_TX_A_OFFSET_LO, 0, + REG_TX_A_OFFSET_HI, 0, + REG_TX_B_OFFSET_LO, 0, + REG_TX_B_OFFSET_HI, 0, + REG_TX_A_GAIN, (TX_X_GAIN_COARSE_FULL | 0), + REG_TX_B_GAIN, (TX_X_GAIN_COARSE_FULL | 0), + REG_TX_PGA, 0xff, // maximum gain (0 dB) + REG_TX_MISC, 0, + REG_TX_IF, (TX_IF_USE_CLKOUT1 + | TX_IF_I_FIRST + | TX_IF_INV_TX_SYNC + | TX_IF_2S_COMP + | TX_IF_INTERLEAVED), + REG_TX_DIGITAL, (TX_DIGITAL_2_DATA_PATHS + | TX_DIGITAL_INTERPOLATE_4X), + REG_TX_MODULATOR, (TX_MODULATOR_DISABLE_NCO + | TX_MODULATOR_COARSE_MODULATION_NONE), + REG_TX_NCO_FTW_7_0, 0, + REG_TX_NCO_FTW_15_8, 0, + REG_TX_NCO_FTW_23_16, 0 +}; + +usrp_basic_tx::usrp_basic_tx (int which_board, int fusb_block_size, int fusb_nblocks, + const std::string fpga_filename, + const std::string firmware_filename) + : usrp_basic (which_board, open_tx_interface, fpga_filename, firmware_filename), + d_devhandle (0), d_ephandle (0), + d_bytes_seen (0), d_first_write (true), + d_tx_enable (false) +{ + if (!usrp_9862_write_many_all (d_udh, tx_init_regs, sizeof (tx_init_regs))){ + fprintf (stderr, "usrp_basic_tx: failed to init AD9862 TX regs\n"); + throw std::runtime_error ("usrp_basic_tx/init_9862"); + } + + if (0){ + // FIXME power down 2nd codec tx path + usrp_9862_write (d_udh, 1, REG_TX_PWR_DN, + (TX_PWR_DN_TX_DIGITAL + | TX_PWR_DN_TX_ANALOG_BOTH)); + } + + // Reset the tx path and leave it disabled. + set_tx_enable (false); + usrp_set_fpga_tx_reset (d_udh, true); + usrp_set_fpga_tx_reset (d_udh, false); + + set_fpga_tx_sample_rate_divisor (4); // we're using interp x4 + + probe_tx_slots (false); + + // check fusb buffering parameters + + if (fusb_block_size < 0 || fusb_block_size > FUSB_BLOCK_SIZE) + throw std::out_of_range ("usrp_basic_rx: invalid fusb_block_size"); + + if (fusb_nblocks < 0) + throw std::out_of_range ("usrp_basic_rx: invalid fusb_nblocks"); + + if (fusb_block_size == 0) + fusb_block_size = FUSB_BLOCK_SIZE; + + if (fusb_nblocks == 0) + fusb_nblocks = std::max (1, FUSB_BUFFER_SIZE / fusb_block_size); + + d_devhandle = fusb_sysconfig::make_devhandle (d_udh); + d_ephandle = d_devhandle->make_ephandle (USRP_TX_ENDPOINT, false, + fusb_block_size, fusb_nblocks); + + _write_fpga_reg(FR_ATR_MASK_0, 0); // zero Tx side Auto Transmit/Receive regs + _write_fpga_reg(FR_ATR_TXVAL_0, 0); + _write_fpga_reg(FR_ATR_RXVAL_0, 0); + _write_fpga_reg(FR_ATR_MASK_2, 0); + _write_fpga_reg(FR_ATR_TXVAL_2, 0); + _write_fpga_reg(FR_ATR_RXVAL_2, 0); +} + + +static unsigned char tx_fini_regs[] = { + REG_TX_PWR_DN, (TX_PWR_DN_TX_DIGITAL + | TX_PWR_DN_TX_ANALOG_BOTH), + REG_TX_MODULATOR, (TX_MODULATOR_DISABLE_NCO + | TX_MODULATOR_COARSE_MODULATION_NONE) +}; + +usrp_basic_tx::~usrp_basic_tx () +{ + d_ephandle->stop (); + delete d_ephandle; + delete d_devhandle; + + if (!usrp_9862_write_many_all (d_udh, tx_fini_regs, sizeof (tx_fini_regs))){ + fprintf (stderr, "usrp_basic_tx: failed to fini AD9862 TX regs\n"); + } +} + +bool +usrp_basic_tx::start () +{ + if (!usrp_basic::start ()) + return false; + + if (!set_tx_enable (true)){ + fprintf (stderr, "usrp_basic_tx: set_tx_enable failed\n"); + usb_strerror (); + return false; + } + + if (!d_ephandle->start ()){ + fprintf (stderr, "usrp_basic_tx: failed to start end point streaming"); + usb_strerror (); + return false; + } + + return true; +} + +bool +usrp_basic_tx::stop () +{ + bool ok = usrp_basic::stop (); + + if (!set_tx_enable (false)){ + fprintf (stderr, "usrp_basic_tx: set_tx_enable(false) failed\n"); + usb_strerror (); + ok = false; + } + if (!d_ephandle->stop ()){ + fprintf (stderr, "usrp_basic_tx: failed to stop end point streaming"); + usb_strerror (); + ok = false; + } + return ok; +} + +usrp_basic_tx * +usrp_basic_tx::make (int which_board, int fusb_block_size, int fusb_nblocks, + const std::string fpga_filename, + const std::string firmware_filename) +{ + usrp_basic_tx *u = 0; + + try { + u = new usrp_basic_tx (which_board, fusb_block_size, fusb_nblocks, + fpga_filename, firmware_filename); + return u; + } + catch (...){ + delete u; + return 0; + } + + return u; +} + +bool +usrp_basic_tx::set_fpga_tx_sample_rate_divisor (unsigned int div) +{ + return _write_fpga_reg (FR_TX_SAMPLE_RATE_DIV, div - 1); +} + +/*! + * \brief Write data to the A/D's via the FPGA. + * + * \p len must be a multiple of 512 bytes. + * \returns number of bytes written or -1 on error. + * + * if \p underrun is non-NULL, it will be set to true iff + * a transmit underrun condition is detected. + */ +int +usrp_basic_tx::write (const void *buf, int len, bool *underrun) +{ + int r; + + if (underrun) + *underrun = false; + + if (len < 0 || (len % 512) != 0){ + fprintf (stderr, "usrp_basic_tx::write: invalid length = %d\n", len); + return -1; + } + + r = d_ephandle->write (buf, len); + if (r > 0) + d_bytes_seen += r; + + /* + * In many cases, the FPGA reports an tx underrun right after we + * enable the Tx path. If this is our first write, check for the + * underrun to clear the condition, then ignore the result. + */ + if (d_first_write && d_bytes_seen >= 4 * FUSB_BLOCK_SIZE){ + d_first_write = false; + bool bogus_underrun; + usrp_check_tx_underrun (d_udh, &bogus_underrun); + } + + if (underrun != 0 && d_bytes_seen >= d_bytes_per_poll){ + d_bytes_seen = 0; + if (!usrp_check_tx_underrun (d_udh, underrun)){ + fprintf (stderr, "usrp_basic_tx: usrp_check_tx_underrun failed\n"); + usb_strerror (); + } + } + + return r; +} + +void +usrp_basic_tx::wait_for_completion () +{ + d_ephandle->wait_for_completion (); +} + +bool +usrp_basic_tx::set_tx_enable (bool on) +{ + d_tx_enable = on; + // fprintf (stderr, "set_tx_enable %d\n", on); + return usrp_set_fpga_tx_enable (d_udh, on); +} + +// conditional disable, return prev state +bool +usrp_basic_tx::disable_tx () +{ + bool enabled = tx_enable (); + if (enabled) + set_tx_enable (false); + return enabled; +} + +// conditional set +void +usrp_basic_tx::restore_tx (bool on) +{ + if (on != tx_enable ()) + set_tx_enable (on); +} + +bool +usrp_basic_tx::set_pga (int which, double gain) +{ + if (which < 0 || which > 3) + return false; + + gain = std::max (pga_min (), gain); + gain = std::min (pga_max (), gain); + + int codec = which >> 1; // 0 and 1 are same, as are 2 and 3 + + int int_gain = (int) rint ((gain - pga_min ()) / pga_db_per_step()); + + return _write_9862 (codec, REG_TX_PGA, int_gain); +} + +double +usrp_basic_tx::pga (int which) const +{ + if (which < 0 || which > 3) + return READ_FAILED; + + int codec = which >> 1; + unsigned char v; + bool ok = _read_9862 (codec, REG_TX_PGA, &v); + if (!ok) + return READ_FAILED; + + return (pga_db_per_step() * v) + pga_min(); +} + +void +usrp_basic_tx::probe_tx_slots (bool verbose) +{ + struct usrp_dboard_eeprom eeprom; + static int slot_id_map[2] = { SLOT_TX_A, SLOT_TX_B }; + static const char *slot_name[2] = { "TX d'board A", "TX d'board B" }; + + for (int i = 0; i < 2; i++){ + int slot_id = slot_id_map [i]; + const char *msg = 0; + usrp_dbeeprom_status_t s = usrp_read_dboard_eeprom (d_udh, slot_id, &eeprom); + + switch (s){ + case UDBE_OK: + d_dbid[i] = eeprom.id; + msg = usrp_dbid_to_string (eeprom.id).c_str (); + // FIXME, figure out interpretation of dc offset for TX d'boards + // offset = (eeprom.offset[1] << 16) | (eeprom.offset[0] & 0xffff); + _write_fpga_reg (slot_id_to_oe_reg(slot_id), (0xffff << 16) | eeprom.oe); + _write_fpga_reg (slot_id_to_io_reg(slot_id), (0xffff << 16) | 0x0000); + break; + + case UDBE_NO_EEPROM: + d_dbid[i] = -1; + msg = ""; + _write_fpga_reg (slot_id_to_oe_reg(slot_id), (0xffff << 16) | 0x0000); + _write_fpga_reg (slot_id_to_io_reg(slot_id), (0xffff << 16) | 0x0000); + break; + + case UDBE_INVALID_EEPROM: + d_dbid[i] = -2; + msg = "Invalid EEPROM contents"; + _write_fpga_reg (slot_id_to_oe_reg(slot_id), (0xffff << 16) | 0x0000); + _write_fpga_reg (slot_id_to_io_reg(slot_id), (0xffff << 16) | 0x0000); + break; + + case UDBE_BAD_SLOT: + default: + assert (0); + } + + if (verbose){ + fflush (stdout); + fprintf (stderr, "%s: %s\n", slot_name[i], msg); + } + } +} + +bool +usrp_basic_tx::_write_oe (int which_dboard, int value, int mask) +{ + if (! (0 <= which_dboard && which_dboard <= 1)) + return false; + + return _write_fpga_reg (slot_id_to_oe_reg (dboard_to_slot (which_dboard)), + (mask << 16) | (value & 0xffff)); +} + +bool +usrp_basic_tx::write_io (int which_dboard, int value, int mask) +{ + if (! (0 <= which_dboard && which_dboard <= 1)) + return false; + + return _write_fpga_reg (slot_id_to_io_reg (dboard_to_slot (which_dboard)), + (mask << 16) | (value & 0xffff)); +} + +bool +usrp_basic_tx::read_io (int which_dboard, int *value) +{ + if (! (0 <= which_dboard && which_dboard <= 1)) + return false; + + int t; + int reg = which_dboard + 1; // FIXME, *very* magic number (fix in serial_io.v) + bool ok = _read_fpga_reg (reg, &t); + if (!ok) + return false; + + *value = t & 0xffff; // FIXME, more magic + return true; +} + +int +usrp_basic_tx::read_io (int which_dboard) +{ + int value; + if (!read_io (which_dboard, &value)) + return READ_FAILED; + return value; +} + +bool +usrp_basic_tx::write_aux_dac (int which_dboard, int which_dac, int value) +{ + return usrp_basic::write_aux_dac (dboard_to_slot (which_dboard), + which_dac, value); +} + +bool +usrp_basic_tx::read_aux_adc (int which_dboard, int which_adc, int *value) +{ + return usrp_basic::read_aux_adc (dboard_to_slot (which_dboard), + which_adc, value); +} + +int +usrp_basic_tx::read_aux_adc (int which_dboard, int which_adc) +{ + return usrp_basic::read_aux_adc (dboard_to_slot (which_dboard), which_adc); +} + +int +usrp_basic_tx::block_size () const { return d_ephandle->block_size(); } + diff --git a/host/lib/usrp_basic.h b/host/lib/usrp_basic.h new file mode 100644 index 0000000..df775c5 --- /dev/null +++ b/host/lib/usrp_basic.h @@ -0,0 +1,776 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003,2004 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +/* + * ---------------------------------------------------------------------- + * Mid level interface to the Universal Software Radio Peripheral (Rev 1) + * + * These classes implement the basic functionality for talking to the + * USRP. They try to be as independent of the signal processing code + * in FPGA as possible. They implement access to the low level + * peripherals on the board, provide a common way for reading and + * writing registers in the FPGA, and provide the high speed interface + * to streaming data across the USB. + * + * It is expected that subclasses will be derived that provide + * access to the functionality to a particular FPGA configuration. + * ---------------------------------------------------------------------- + */ + +#ifndef INCLUDED_USRP_BASIC_H +#define INCLUDED_USRP_BASIC_H + +#include +#include + +struct usb_dev_handle; +class fusb_devhandle; +class fusb_ephandle; + +/*! + * \brief base class for usrp operations + */ +class usrp_basic +{ +private: + // NOT IMPLEMENTED + usrp_basic (const usrp_basic &rhs); // no copy constructor + usrp_basic &operator= (const usrp_basic &rhs); // no assignment operator + + +protected: + struct usb_dev_handle *d_udh; + int d_usb_data_rate; // bytes/sec + int d_bytes_per_poll; // how often to poll for overruns + bool d_verbose; + + static const int MAX_REGS = 128; + unsigned int d_fpga_shadows[MAX_REGS]; + + usrp_basic (int which_board, + struct usb_dev_handle *open_interface (struct usb_device *dev), + const std::string fpga_filename = "", + const std::string firmware_filename = ""); + + /*! + * \brief advise usrp_basic of usb data rate (bytes/sec) + * + * N.B., this doesn't tweak any hardware. Derived classes + * should call this to inform us of the data rate whenever it's + * first set or if it changes. + * + * \param usb_data_rate bytes/sec + */ + void set_usb_data_rate (int usb_data_rate); + + /*! + * \brief Write auxiliary digital to analog converter. + * + * \param slot Which Tx or Rx slot to write. + * N.B., SLOT_TX_A and SLOT_RX_A share the same AUX DAC's. + * SLOT_TX_B and SLOT_RX_B share the same AUX DAC's. + * \param which_dac [0,3] RX slots must use only 0 and 1. TX slots must use only 2 and 3. + * \param value [0,4095] + * \returns true iff successful + */ + bool write_aux_dac (int slot, int which_dac, int value); + + /*! + * \brief Read auxiliary analog to digital converter. + * + * \param slot 2-bit slot number. E.g., SLOT_TX_A + * \param which_adc [0,1] + * \param value return 12-bit value [0,4095] + * \returns true iff successful + */ + bool read_aux_adc (int slot, int which_adc, int *value); + + /*! + * \brief Read auxiliary analog to digital converter. + * + * \param slot 2-bit slot number. E.g., SLOT_TX_A + * \param which_adc [0,1] + * \returns value in the range [0,4095] if successful, else READ_FAILED. + */ + int read_aux_adc (int slot, int which_adc); + +public: + virtual ~usrp_basic (); + + /*! + * \brief return frequency of master oscillator on USRP + */ + long fpga_master_clock_freq () const { return 64000000; } + + /*! + * \returns usb data rate in bytes/sec + */ + int usb_data_rate () const { return d_usb_data_rate; } + + void set_verbose (bool on) { d_verbose = on; } + + //! magic value used on alternate register read interfaces + static const int READ_FAILED = -99999; + + /*! + * \brief Write EEPROM on motherboard or any daughterboard. + * \param i2c_addr I2C bus address of EEPROM + * \param eeprom_offset byte offset in EEPROM to begin writing + * \param buf the data to write + * \returns true iff sucessful + */ + bool write_eeprom (int i2c_addr, int eeprom_offset, const std::string buf); + + /*! + * \brief Read EEPROM on motherboard or any daughterboard. + * \param i2c_addr I2C bus address of EEPROM + * \param eeprom_offset byte offset in EEPROM to begin reading + * \param len number of bytes to read + * \returns the data read if successful, else a zero length string. + */ + std::string read_eeprom (int i2c_addr, int eeprom_offset, int len); + + /*! + * \brief Write to I2C peripheral + * \param i2c_addr I2C bus address (7-bits) + * \param buf the data to write + * \returns true iff successful + * Writes are limited to a maximum of of 64 bytes. + */ + bool write_i2c (int i2c_addr, const std::string buf); + + /*! + * \brief Read from I2C peripheral + * \param i2c_addr I2C bus address (7-bits) + * \param len number of bytes to read + * \returns the data read if successful, else a zero length string. + * Reads are limited to a maximum of 64 bytes. + */ + std::string read_i2c (int i2c_addr, int len); + + /*! + * \brief Set ADC offset correction + * \param which which ADC[0,3]: 0 = RX_A I, 1 = RX_A Q... + * \param offset 16-bit value to subtract from raw ADC input. + */ + bool set_adc_offset (int which, int offset); + + /*! + * \brief Set DAC offset correction + * \param which which DAC[0,3]: 0 = TX_A I, 1 = TX_A Q... + * \param offset 10-bit offset value (ambiguous format: See AD9862 datasheet). + * \param offset_pin 1-bit value. If 0 offset applied to -ve differential pin; + * If 1 offset applied to +ve differential pin. + */ + bool set_dac_offset (int which, int offset, int offset_pin); + + /*! + * \brief Control ADC input buffer + * \param which which ADC[0,3] + * \param bypass if non-zero, bypass input buffer and connect input + * directly to switched cap SHA input of RxPGA. + */ + bool set_adc_buffer_bypass (int which, bool bypass); + + + /*! + * \brief return the usrp's serial number. + * + * \returns non-zero length string iff successful. + */ + std::string serial_number(); + + // ---------------------------------------------------------------- + // Low level implementation routines. + // You probably shouldn't be using these... + // + + bool _set_led (int which, bool on); + + /*! + * \brief Write FPGA register. + * \param regno 7-bit register number + * \param value 32-bit value + * \returns true iff successful + */ + bool _write_fpga_reg (int regno, int value); //< 7-bit regno, 32-bit value + + /*! + * \brief Read FPGA register. + * \param regno 7-bit register number + * \param value 32-bit value + * \returns true iff successful + */ + bool _read_fpga_reg (int regno, int *value); //< 7-bit regno, 32-bit value + + /*! + * \brief Read FPGA register. + * \param regno 7-bit register number + * \returns register value if successful, else READ_FAILED + */ + int _read_fpga_reg (int regno); + + + /*! + * \brief Write FPGA register with mask. + * \param regno 7-bit register number + * \param value 16-bit value + * \param mask 16-bit value + * \returns true if successful + * Only use this for registers who actually implement a mask in the verilog firmware, like FR_RX_MASTER_SLAVE + */ + bool _write_fpga_reg_masked (int regno, int value, int mask); + + /*! + * \brief Write AD9862 register. + * \param which_codec 0 or 1 + * \param regno 6-bit register number + * \param value 8-bit value + * \returns true iff successful + */ + bool _write_9862 (int which_codec, int regno, unsigned char value); + + /*! + * \brief Read AD9862 register. + * \param which_codec 0 or 1 + * \param regno 6-bit register number + * \param value 8-bit value + * \returns true iff successful + */ + bool _read_9862 (int which_codec, int regno, unsigned char *value) const; + + /*! + * \brief Read AD9862 register. + * \param which_codec 0 or 1 + * \param regno 6-bit register number + * \returns register value if successful, else READ_FAILED + */ + int _read_9862 (int which_codec, int regno) const; + + /*! + * \brief Write data to SPI bus peripheral. + * + * \param optional_header 0,1 or 2 bytes to write before buf. + * \param enables bitmask of peripherals to write. See usrp_spi_defs.h + * \param format transaction format. See usrp_spi_defs.h SPI_FMT_* + * \param buf the data to write + * \returns true iff successful + * Writes are limited to a maximum of 64 bytes. + * + * If \p format specifies that optional_header bytes are present, they are + * written to the peripheral immediately prior to writing \p buf. + */ + bool _write_spi (int optional_header, int enables, int format, std::string buf); + + /* + * \brief Read data from SPI bus peripheral. + * + * \param optional_header 0,1 or 2 bytes to write before buf. + * \param enables bitmask of peripheral to read. See usrp_spi_defs.h + * \param format transaction format. See usrp_spi_defs.h SPI_FMT_* + * \param len number of bytes to read. Must be in [0,64]. + * \returns the data read if sucessful, else a zero length string. + * + * Reads are limited to a maximum of 64 bytes. + * + * If \p format specifies that optional_header bytes are present, they + * are written to the peripheral first. Then \p len bytes are read from + * the peripheral and returned. + */ + std::string _read_spi (int optional_header, int enables, int format, int len); + + /*! + * \brief Start data transfers. + * Called in base class to derived class order. + */ + bool start (); + + /*! + * \brief Stop data transfers. + * Called in base class to derived class order. + */ + bool stop (); +}; + + /*! + * \brief class for accessing the receive side of the USRP + */ +class usrp_basic_rx : public usrp_basic +{ +private: + fusb_devhandle *d_devhandle; + fusb_ephandle *d_ephandle; + int d_bytes_seen; // how many bytes we've seen + bool d_first_read; + bool d_rx_enable; + +protected: + int d_dbid[2]; // Rx daughterboard ID's + + /*! + * \param which_board Which USRP board on usb (not particularly useful; use 0) + * \param fusb_block_size fast usb xfer block size. Must be a multiple of 512. + * Use zero for a reasonable default. + * \param fusb_nblocks number of fast usb URBs to allocate. Use zero for a reasonable default. + */ + usrp_basic_rx (int which_board, + int fusb_block_size=0, + int fusb_nblocks=0, + const std::string fpga_filename = "", + const std::string firmware_filename = "" + ); // throws if trouble + + bool set_rx_enable (bool on); + bool rx_enable () const { return d_rx_enable; } + + bool disable_rx (); // conditional disable, return prev state + void restore_rx (bool on); // conditional set + + void probe_rx_slots (bool verbose); + int dboard_to_slot (int dboard) { return (dboard << 1) | 1; } + +public: + ~usrp_basic_rx (); + + /*! + * \brief invokes constructor, returns instance or 0 if trouble + * + * \param which_board Which USRP board on usb (not particularly useful; use 0) + * \param fusb_block_size fast usb xfer block size. Must be a multiple of 512. + * Use zero for a reasonable default. + * \param fusb_nblocks number of fast usb URBs to allocate. Use zero for a reasonable default. + */ + static usrp_basic_rx *make (int which_board, + int fusb_block_size=0, + int fusb_nblocks=0, + const std::string fpga_filename = "", + const std::string firmware_filename = "" + ); + + // MANIPULATORS + + /*! + * \brief tell the fpga the rate rx samples are coming from the A/D's + * + * div = fpga_master_clock_freq () / sample_rate + * + * sample_rate is determined by a myriad of registers + * in the 9862. That's why you have to tell us, so + * we can tell the fpga. + */ + bool set_fpga_rx_sample_rate_divisor (unsigned int div); + + /*! + * \brief read data from the D/A's via the FPGA. + * \p len must be a multiple of 512 bytes. + * + * \returns the number of bytes read, or -1 on error. + * + * If overrun is non-NULL it will be set true iff an RX overrun is detected. + */ + int read (void *buf, int len, bool *overrun); + + // ACCESSORS + + //! sampling rate of A/D converter + virtual long converter_rate() const { return fpga_master_clock_freq(); } // 64M + long adc_rate() const { return converter_rate(); } + long adc_freq() const { return converter_rate(); } //!< deprecated method name + + /*! + * \brief Return daughterboard ID for given Rx daughterboard slot [0,1]. + * + * \param which_dboard [0,1] which Rx daughterboard + * + * \return daughterboard id >= 0 if successful + * \return -1 if no daugherboard + * \return -2 if invalid EEPROM on daughterboard + */ + int daughterboard_id (int which_dboard) const { return d_dbid[which_dboard & 0x1]; } + + // ---------------------------------------------------------------- + // routines for controlling the Programmable Gain Amplifier + /*! + * \brief Set Programmable Gain Amplifier (PGA) + * + * \param which which A/D [0,3] + * \param gain_in_db gain value (linear in dB) + * + * gain is rounded to closest setting supported by hardware. + * + * \returns true iff sucessful. + * + * \sa pga_min(), pga_max(), pga_db_per_step() + */ + bool set_pga (int which, double gain_in_db); + + /*! + * \brief Return programmable gain amplifier gain setting in dB. + * + * \param which which A/D [0,3] + */ + double pga (int which) const; + + /*! + * \brief Return minimum legal PGA gain in dB. + */ + double pga_min () const { return 0.0; } + + /*! + * \brief Return maximum legal PGA gain in dB. + */ + double pga_max () const { return 20.0; } + + /*! + * \brief Return hardware step size of PGA (linear in dB). + */ + double pga_db_per_step () const { return 20.0 / 20; } + + /*! + * \brief Write direction register (output enables) for pins that go to daughterboard. + * + * \param which_dboard [0,1] which d'board + * \param value value to write into register + * \param mask which bits of value to write into reg + * + * Each d'board has 16-bits of general purpose i/o. + * Setting the bit makes it an output from the FPGA to the d'board. + * + * This register is initialized based on a value stored in the + * d'board EEPROM. In general, you shouldn't be using this routine + * without a very good reason. Using this method incorrectly will + * kill your USRP motherboard and/or daughterboard. + */ + bool _write_oe (int which_dboard, int value, int mask); + + /*! + * \brief Write daughterboard i/o pin value + * + * \param which_dboard [0,1] which d'board + * \param value value to write into register + * \param mask which bits of value to write into reg + */ + bool write_io (int which_dboard, int value, int mask); + + /*! + * \brief Read daughterboard i/o pin value + * + * \param which_dboard [0,1] which d'board + * \param value output + */ + bool read_io (int which_dboard, int *value); + + /*! + * \brief Read daughterboard i/o pin value + * + * \param which_dboard [0,1] which d'board + * \returns register value if successful, else READ_FAILED + */ + int read_io (int which_dboard); + + /*! + * \brief Write auxiliary digital to analog converter. + * + * \param which_dboard [0,1] which d'board + * N.B., SLOT_TX_A and SLOT_RX_A share the same AUX DAC's. + * SLOT_TX_B and SLOT_RX_B share the same AUX DAC's. + * \param which_dac [2,3] TX slots must use only 2 and 3. + * \param value [0,4095] + * \returns true iff successful + */ + bool write_aux_dac (int which_board, int which_dac, int value); + + /*! + * \brief Read auxiliary analog to digital converter. + * + * \param which_dboard [0,1] which d'board + * \param which_adc [0,1] + * \param value return 12-bit value [0,4095] + * \returns true iff successful + */ + bool read_aux_adc (int which_dboard, int which_adc, int *value); + + /*! + * \brief Read auxiliary analog to digital converter. + * + * \param which_dboard [0,1] which d'board + * \param which_adc [0,1] + * \returns value in the range [0,4095] if successful, else READ_FAILED. + */ + int read_aux_adc (int which_dboard, int which_adc); + + /*! + * \brief returns current fusb block size + */ + int block_size() const; + + /*! + * \brief Enable/disable automatic DC offset removal control loop in FPGA + * + * \param bits which control loops to enable + * \param mask which \p bits to pay attention to + * + * If the corresponding bit is set, enable the automatic DC + * offset correction control loop. + * + * 
      +   * The 4 low bits are significant:
+   *
+   *   ADC0 = (1 << 0)
+   *   ADC1 = (1 << 1)
+   *   ADC2 = (1 << 2)
+   *   ADC3 = (1 << 3)
+   *
      + * + * By default the control loop is enabled on all ADC's. + */ + bool set_dc_offset_cl_enable(int bits, int mask); + + // called in base class to derived class order + bool start (); + bool stop (); +}; + + /*! + * \brief class for accessing the transmit side of the USRP + */ +class usrp_basic_tx : public usrp_basic +{ +private: + fusb_devhandle *d_devhandle; + fusb_ephandle *d_ephandle; + int d_bytes_seen; // how many bytes we've seen + bool d_first_write; + bool d_tx_enable; + + protected: + int d_dbid[2]; // Tx daughterboard ID's + + /*! + * \param which_board Which USRP board on usb (not particularly useful; use 0) + * \param fusb_block_size fast usb xfer block size. Must be a multiple of 512. + * Use zero for a reasonable default. + * \param fusb_nblocks number of fast usb URBs to allocate. Use zero for a reasonable default. + */ + usrp_basic_tx (int which_board, + int fusb_block_size=0, + int fusb_nblocks=0, + const std::string fpga_filename = "", + const std::string firmware_filename = "" + ); // throws if trouble + + bool set_tx_enable (bool on); + bool tx_enable () const { return d_tx_enable; } + + bool disable_tx (); // conditional disable, return prev state + void restore_tx (bool on); // conditional set + + void probe_tx_slots (bool verbose); + int dboard_to_slot (int dboard) { return (dboard << 1) | 0; } + +public: + + ~usrp_basic_tx (); + + /*! + * \brief invokes constructor, returns instance or 0 if trouble + * + * \param which_board Which USRP board on usb (not particularly useful; use 0) + * \param fusb_block_size fast usb xfer block size. Must be a multiple of 512. + * Use zero for a reasonable default. + * \param fusb_nblocks number of fast usb URBs to allocate. Use zero for a reasonable default. + */ + static usrp_basic_tx *make (int which_board, int fusb_block_size=0, int fusb_nblocks=0, + const std::string fpga_filename = "", + const std::string firmware_filename = "" + ); + + // MANIPULATORS + + /*! + * \brief tell the fpga the rate tx samples are going to the D/A's + * + * div = fpga_master_clock_freq () * 2 + * + * sample_rate is determined by a myriad of registers + * in the 9862. That's why you have to tell us, so + * we can tell the fpga. + */ + bool set_fpga_tx_sample_rate_divisor (unsigned int div); + + /*! + * \brief Write data to the A/D's via the FPGA. + * + * \p len must be a multiple of 512 bytes. + * \returns number of bytes written or -1 on error. + * + * if \p underrun is non-NULL, it will be set to true iff + * a transmit underrun condition is detected. + */ + int write (const void *buf, int len, bool *underrun); + + /* + * Block until all outstanding writes have completed. + * This is typically used to assist with benchmarking + */ + void wait_for_completion (); + + // ACCESSORS + + //! sampling rate of D/A converter + virtual long converter_rate() const { return fpga_master_clock_freq () * 2; } // 128M + long dac_rate() const { return converter_rate(); } + long dac_freq() const { return converter_rate(); } //!< deprecated method name + + /*! + * \brief Return daughterboard ID for given Tx daughterboard slot [0,1]. + * + * \return daughterboard id >= 0 if successful + * \return -1 if no daugherboard + * \return -2 if invalid EEPROM on daughterboard + */ + int daughterboard_id (int which_dboard) const { return d_dbid[which_dboard & 0x1]; } + + // ---------------------------------------------------------------- + // routines for controlling the Programmable Gain Amplifier + /*! + * \brief Set Programmable Gain Amplifier (PGA) + * + * \param which which D/A [0,3] + * \param gain_in_db gain value (linear in dB) + * + * gain is rounded to closest setting supported by hardware. + * Note that DAC 0 and DAC 1 share a gain setting as do DAC 2 and DAC 3. + * Setting DAC 0 affects DAC 1 and vice versa. Same with DAC 2 and DAC 3. + * + * \returns true iff sucessful. + * + * \sa pga_min(), pga_max(), pga_db_per_step() + */ + bool set_pga (int which, double gain_in_db); + + /*! + * \brief Return programmable gain amplifier gain in dB. + * + * \param which which D/A [0,3] + */ + double pga (int which) const; + + /*! + * \brief Return minimum legal PGA gain in dB. + */ + double pga_min () const { return -20.0; } + + /*! + * \brief Return maximum legal PGA gain in dB. + */ + double pga_max () const { return 0.0; } + + /*! + * \brief Return hardware step size of PGA (linear in dB). + */ + double pga_db_per_step () const { return 20.0/255; } + + /*! + * \brief Write direction register (output enables) for pins that go to daughterboard. + * + * \param which_dboard [0,1] which d'board + * \param value value to write into register + * \param mask which bits of value to write into reg + * + * Each d'board has 16-bits of general purpose i/o. + * Setting the bit makes it an output from the FPGA to the d'board. + * + * This register is initialized based on a value stored in the + * d'board EEPROM. In general, you shouldn't be using this routine + * without a very good reason. Using this method incorrectly will + * kill your USRP motherboard and/or daughterboard. + */ + bool _write_oe (int which_dboard, int value, int mask); + + /*! + * \brief Write daughterboard i/o pin value + * + * \param which_dboard [0,1] which d'board + * \param value value to write into register + * \param mask which bits of value to write into reg + */ + bool write_io (int which_dboard, int value, int mask); + + /*! + * \brief Read daughterboard i/o pin value + * + * \param which_dboard [0,1] which d'board + * \param value return value + */ + bool read_io (int which_dboard, int *value); + + /*! + * \brief Read daughterboard i/o pin value + * + * \param which_dboard [0,1] which d'board + * \returns register value if successful, else READ_FAILED + */ + int read_io (int which_dboard); + + /*! + * \brief Write auxiliary digital to analog converter. + * + * \param which_dboard [0,1] which d'board + * N.B., SLOT_TX_A and SLOT_RX_A share the same AUX DAC's. + * SLOT_TX_B and SLOT_RX_B share the same AUX DAC's. + * \param which_dac [2,3] TX slots must use only 2 and 3. + * \param value [0,4095] + * \returns true iff successful + */ + bool write_aux_dac (int which_board, int which_dac, int value); + + /*! + * \brief Read auxiliary analog to digital converter. + * + * \param which_dboard [0,1] which d'board + * \param which_adc [0,1] + * \param value return 12-bit value [0,4095] + * \returns true iff successful + */ + bool read_aux_adc (int which_dboard, int which_adc, int *value); + + /*! + * \brief Read auxiliary analog to digital converter. + * + * \param which_dboard [0,1] which d'board + * \param which_adc [0,1] + * \returns value in the range [0,4095] if successful, else READ_FAILED. + */ + int read_aux_adc (int which_dboard, int which_adc); + + /*! + * \brief returns current fusb block size + */ + int block_size() const; + + // called in base class to derived class order + bool start (); + bool stop (); +}; + +#endif diff --git a/host/lib/usrp_bytesex.h b/host/lib/usrp_bytesex.h new file mode 100644 index 0000000..de34c05 --- /dev/null +++ b/host/lib/usrp_bytesex.h @@ -0,0 +1,74 @@ +/* -*- c++ -*- */ +/* + * Copyright 2004 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ +#ifndef INCLUDED_USRP_BYTESEX_H +#define INCLUDED_USRP_BYTESEX_H + +/*! + * \brief routines for convertering between host and usrp byte order + * + * Prior to including this file, the user must include "config.h" + * which will or won't define WORDS_BIGENDIAN based on the + * result of the AC_C_BIGENDIAN autoconf test. + */ + +#ifdef HAVE_BYTESWAP_H +#include +#else +static inline unsigned short int +bswap_16 (unsigned short int x) +{ + return ((((x) >> 8) & 0xff) | (((x) & 0xff) << 8)); +} +#endif + + +#ifdef WORDS_BIGENDIAN + +static inline short int +host_to_usrp_short (short int x) +{ + return bswap_16 (x); +} + +static inline short int +usrp_to_host_short (short int x) +{ + return bswap_16 (x); +} + +#else + +static inline short int +host_to_usrp_short (short int x) +{ + return x; +} + +static inline short int +usrp_to_host_short (unsigned short int x) +{ + return x; +} + +#endif + +#endif /* INCLUDED_USRP_BYTESEX_H */ diff --git a/host/lib/usrp_config.cc b/host/lib/usrp_config.cc new file mode 100644 index 0000000..04303cd --- /dev/null +++ b/host/lib/usrp_config.cc @@ -0,0 +1,35 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#include "usrp_config.h" + +int +usrp_rx_config_stream_count (unsigned int usrp_rx_config) +{ + return 1; +} + +int +usrp_tx_config_stream_count (unsigned int usrp_tx_config) +{ + return 1; +} diff --git a/host/lib/usrp_config.h b/host/lib/usrp_config.h new file mode 100644 index 0000000..3675a10 --- /dev/null +++ b/host/lib/usrp_config.h @@ -0,0 +1,67 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifndef _USRP_CONFIG_H_ +#define _USRP_CONFIG_H_ + +/* + * ---------------------------------------------------------------- + * USRP Rx configurations. + * + * For now this is a placeholder, but will eventually specify the + * mapping from A/D outputs to DDC inputs (I & Q). + * + * What's implemented today is a single DDC that has its I input + * connected to ADC0 and its Q input connected to ADC1 + * ---------------------------------------------------------------- + */ + +#define USRP_RX_CONFIG_DEFAULT 0 + +/*! + * given a usrp_rx_config word, return the number of I & Q streams that + * are interleaved on the USB. + */ + +int usrp_rx_config_stream_count (unsigned int usrp_rx_config); + +/* + * USRP Tx configurations. + * + * For now this is a placeholder, but will eventually specify the + * mapping from DUC outputs to D/A inputs. + * + * What's implemented today is a single DUC that has its I output + * connected to DAC0 and its Q output connected to DAC1 + */ + +#define USRP_TX_CONFIG_DEFAULT 0 + +/*! + * given a usrp_tx_config word, return the number of I & Q streams that + * are interleaved on the USB. + */ + +int usrp_tx_config_stream_count (unsigned int usrp_tx_config); + + +#endif /* _USRP_CONFIG_H_ */ diff --git a/host/lib/usrp_dbid.dat b/host/lib/usrp_dbid.dat new file mode 100644 index 0000000..fe3ed1e --- /dev/null +++ b/host/lib/usrp_dbid.dat @@ -0,0 +1,75 @@ +# +# Copyright 2005 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +# This file is used to generate usrp_dbid.h, usrp_dbid.cc and usrp_dbid.py + +"Basic Tx" 0x0000 +"Basic Rx" 0x0001 +"DBS Rx" 0x0002 +"TV Rx" 0x0003 + +"Flex 400 Rx" 0x0004 +"Flex 900 Rx" 0x0005 +"Flex 1200 Rx" 0x0006 +"Flex 2400 Rx" 0x0007 + +"Flex 400 Tx" 0x0008 +"Flex 900 Tx" 0x0009 +"Flex 1200 Tx" 0x000a +"Flex 2400 Tx" 0x000b + +"TV Rx Rev 2" 0x000c +"DBS Rx Rev 2_1" 0x000d + +"LF Tx" 0x000e +"LF Rx" 0x000f + +"Flex 400 Rx MIMO A" 0x0014 +"Flex 900 Rx MIMO A" 0x0015 +"Flex 1200 Rx MIMO A" 0x0016 +"Flex 2400 Rx MIMO A" 0x0017 + +"Flex 400 Tx MIMO A" 0x0018 +"Flex 900 Tx MIMO A" 0x0019 +"Flex 1200 Tx MIMO A" 0x001a +"Flex 2400 Tx MIMO A" 0x001b + +"Flex 400 Rx MIMO B" 0x0024 +"Flex 900 Rx MIMO B" 0x0025 +"Flex 1200 Rx MIMO B" 0x0026 +"Flex 2400 Rx MIMO B" 0x0027 + +"Flex 400 Tx MIMO B" 0x0028 +"Flex 900 Tx MIMO B" 0x0029 +"Flex 1200 Tx MIMO B" 0x002a +"Flex 2400 Tx MIMO B" 0x002b + +"Flex 1800 Rx" 0x0030 +"Flex 1800 Tx" 0x0031 +"Flex 1800 Rx MIMO A" 0x0032 +"Flex 1800 Tx MIMO A" 0x0033 +"Flex 1800 Rx MIMO B" 0x0034 +"Flex 1800 Tx MIMO B" 0x0035 + +"TV Rx Rev 3" 0x0040 + +"Experimental Tx" 0xfffe +"Experimental Rx" 0xffff diff --git a/host/lib/usrp_local_sighandler.cc b/host/lib/usrp_local_sighandler.cc new file mode 100644 index 0000000..567d7d0 --- /dev/null +++ b/host/lib/usrp_local_sighandler.cc @@ -0,0 +1,190 @@ +/* -*- c++ -*- */ +/* + * Copyright 2004 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +/* + * This is actually the same as gr_local_signhandler, but with a different name. + * We don't have a common library to put this in, so... + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include +#include +#include + +usrp_local_sighandler::usrp_local_sighandler (int signum, + void (*new_handler)(int)) + : d_signum (signum) +{ +#ifdef HAVE_SIGACTION + struct sigaction new_action; + memset (&new_action, 0, sizeof (new_action)); + + new_action.sa_handler = new_handler; + sigemptyset (&new_action.sa_mask); + new_action.sa_flags = 0; + + if (sigaction (d_signum, &new_action, &d_old_action) < 0){ + perror ("sigaction (install new)"); + throw std::runtime_error ("sigaction"); + } +#endif +} + +usrp_local_sighandler::~usrp_local_sighandler () +{ +#ifdef HAVE_SIGACTION + if (sigaction (d_signum, &d_old_action, 0) < 0){ + perror ("sigaction (restore old)"); + throw std::runtime_error ("sigaction"); + } +#endif +} + +void +usrp_local_sighandler::throw_signal(int signum) throw(usrp_signal) +{ + throw usrp_signal (signum); +} + +/* + * Semi-hideous way to may a signal number into a signal name + */ + +#define SIGNAME(x) case x: return #x + +std::string +usrp_signal::name () const +{ + char tmp[128]; + + switch (signal ()){ +#ifdef SIGHUP + SIGNAME (SIGHUP); +#endif +#ifdef SIGINT + SIGNAME (SIGINT); +#endif +#ifdef SIGQUIT + SIGNAME (SIGQUIT); +#endif +#ifdef SIGILL + SIGNAME (SIGILL); +#endif +#ifdef SIGTRAP + SIGNAME (SIGTRAP); +#endif +#ifdef SIGABRT + SIGNAME (SIGABRT); +#endif +#ifdef SIGBUS + SIGNAME (SIGBUS); +#endif +#ifdef SIGFPE + SIGNAME (SIGFPE); +#endif +#ifdef SIGKILL + SIGNAME (SIGKILL); +#endif +#ifdef SIGUSR1 + SIGNAME (SIGUSR1); +#endif +#ifdef SIGSEGV + SIGNAME (SIGSEGV); +#endif +#ifdef SIGUSR2 + SIGNAME (SIGUSR2); +#endif +#ifdef SIGPIPE + SIGNAME (SIGPIPE); +#endif +#ifdef SIGALRM + SIGNAME (SIGALRM); +#endif +#ifdef SIGTERM + SIGNAME (SIGTERM); +#endif +#ifdef SIGSTKFLT + SIGNAME (SIGSTKFLT); +#endif +#ifdef SIGCHLD + SIGNAME (SIGCHLD); +#endif +#ifdef SIGCONT + SIGNAME (SIGCONT); +#endif +#ifdef SIGSTOP + SIGNAME (SIGSTOP); +#endif +#ifdef SIGTSTP + SIGNAME (SIGTSTP); +#endif +#ifdef SIGTTIN + SIGNAME (SIGTTIN); +#endif +#ifdef SIGTTOU + SIGNAME (SIGTTOU); +#endif +#ifdef SIGURG + SIGNAME (SIGURG); +#endif +#ifdef SIGXCPU + SIGNAME (SIGXCPU); +#endif +#ifdef SIGXFSZ + SIGNAME (SIGXFSZ); +#endif +#ifdef SIGVTALRM + SIGNAME (SIGVTALRM); +#endif +#ifdef SIGPROF + SIGNAME (SIGPROF); +#endif +#ifdef SIGWINCH + SIGNAME (SIGWINCH); +#endif +#ifdef SIGIO + SIGNAME (SIGIO); +#endif +#ifdef SIGPWR + SIGNAME (SIGPWR); +#endif +#ifdef SIGSYS + SIGNAME (SIGSYS); +#endif + default: +#if defined (HAVE_SNPRINTF) +#if defined (SIGRTMIN) && defined (SIGRTMAX) + if (signal () >= SIGRTMIN && signal () <= SIGRTMAX){ + snprintf (tmp, sizeof (tmp), "SIGRTMIN + %d", signal ()); + return tmp; + } +#endif + snprintf (tmp, sizeof (tmp), "SIGNAL %d", signal ()); + return tmp; +#else + return "Unknown signal"; +#endif + } +} diff --git a/host/lib/usrp_local_sighandler.h b/host/lib/usrp_local_sighandler.h new file mode 100644 index 0000000..0bb29c2 --- /dev/null +++ b/host/lib/usrp_local_sighandler.h @@ -0,0 +1,61 @@ +/* -*- c++ -*- */ +/* + * Copyright 2004 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifndef INCLUDED_USRP_LOCAL_SIGHANDLER_H +#define INCLUDED_USRP_LOCAL_SIGHANDLER_H + +#include +#include + +/*! + * \brief Representation of signal. + */ +class usrp_signal +{ + int d_signum; +public: + usrp_signal (int signum) : d_signum (signum) {} + int signal () const { return d_signum; } + std::string name () const; +}; + + +/*! + * \brief Get and set signal handler. + * + * Constructor installs new handler, destructor reinstalls + * original value. + */ +class usrp_local_sighandler { + int d_signum; +#ifdef HAVE_SIGACTION + struct sigaction d_old_action; +#endif +public: + usrp_local_sighandler (int signum, void (*new_handler)(int)); + ~usrp_local_sighandler (); + + /* throw usrp_signal (signum) */ + static void throw_signal (int signum) throw (usrp_signal); +}; + +#endif /* INCLUDED_USRP_LOCAL_SIGHANDLER_H */ diff --git a/host/lib/usrp_prims.cc b/host/lib/usrp_prims.cc new file mode 100644 index 0000000..5d1c26d --- /dev/null +++ b/host/lib/usrp_prims.cc @@ -0,0 +1,1355 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003,2004,2006 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include "usrp_prims.h" +#include "usrp_commands.h" +#include "usrp_ids.h" +#include "usrp_i2c_addr.h" +#include "fpga_regs_common.h" +#include "fpga_regs_standard.h" +#include +#include +#include +#include +#include +#include +#include +#include // FIXME should check with autoconf (nanosleep) +#include +#include +#include + +extern "C" { +#include "md5.h" +}; + +#define VERBOSE 0 + +using namespace ad9862; + +static const int FIRMWARE_HASH_SLOT = 0; +static const int FPGA_HASH_SLOT = 1; + +static const int hash_slot_addr[2] = { + USRP_HASH_SLOT_0_ADDR, + USRP_HASH_SLOT_1_ADDR +}; + +static char *default_firmware_filename = "std.ihx"; +static char *default_fpga_filename = "std_2rxhb_2tx.rbf"; + +#include "std_paths.h" + +static char * +find_file (const char *filename, int hw_rev) +{ + char **sp = std_paths; + static char path[1000]; + char *s; + + s = getenv("USRP_PATH"); + if (s) { + snprintf (path, sizeof (path), "%s/rev%d/%s", s, hw_rev, filename); + if (access (path, R_OK) == 0) + return path; + } + + while (*sp){ + snprintf (path, sizeof (path), "%s/rev%d/%s", *sp, hw_rev, filename); + if (access (path, R_OK) == 0) + return path; + sp++; + } + return 0; +} + +static const char * +get_proto_filename(const std::string user_filename, const char *env_var, const char *def) +{ + if (user_filename.length() != 0) + return user_filename.c_str(); + + char *s = getenv(env_var); + if (s && *s) + return s; + + return def; +} + + +static void power_down_9862s (struct usb_dev_handle *udh); + +void +usrp_one_time_init () +{ + static bool first = true; + + if (first){ + first = false; + usb_init (); // usb library init + usb_find_busses (); + usb_find_devices (); + } +} + +void +usrp_rescan () +{ + usb_find_busses (); + usb_find_devices (); +} + + +// ---------------------------------------------------------------- +// Danger, big, fragile KLUDGE. The problem is that we want to be +// able to get from a usb_dev_handle back to a usb_device, and the +// right way to do this is buried in a non-installed include file. + +static struct usb_device * +dev_handle_to_dev (usb_dev_handle *udh) +{ + struct usb_dev_handle_kludge { + int fd; + struct usb_bus *bus; + struct usb_device *device; + }; + + return ((struct usb_dev_handle_kludge *) udh)->device; +} + +// ---------------------------------------------------------------- + +/* + * q must be a real USRP, not an FX2. Return its hardware rev number. + */ +int +usrp_hw_rev (struct usb_device *q) +{ + return q->descriptor.bcdDevice & 0x00FF; +} + +/* + * q must be a real USRP, not an FX2. Return true if it's configured. + */ +static bool +_usrp_configured_p (struct usb_device *q) +{ + return (q->descriptor.bcdDevice & 0xFF00) != 0; +} + +bool +usrp_usrp_p (struct usb_device *q) +{ + return (q->descriptor.idVendor == USB_VID_FSF + && q->descriptor.idProduct == USB_PID_FSF_USRP); +} + +bool +usrp_fx2_p (struct usb_device *q) +{ + return (q->descriptor.idVendor == USB_VID_CYPRESS + && q->descriptor.idProduct == USB_PID_CYPRESS_FX2); +} + +bool +usrp_usrp0_p (struct usb_device *q) +{ + return usrp_usrp_p (q) && usrp_hw_rev (q) == 0; +} + +bool +usrp_usrp1_p (struct usb_device *q) +{ + return usrp_usrp_p (q) && usrp_hw_rev (q) == 1; +} + +bool +usrp_usrp2_p (struct usb_device *q) +{ + return usrp_usrp_p (q) && usrp_hw_rev (q) == 2; +} + + +bool +usrp_unconfigured_usrp_p (struct usb_device *q) +{ + return usrp_usrp_p (q) && !_usrp_configured_p (q); +} + +bool +usrp_configured_usrp_p (struct usb_device *q) +{ + return usrp_usrp_p (q) && _usrp_configured_p (q); +} + +// ---------------------------------------------------------------- + +struct usb_device * +usrp_find_device (int nth, bool fx2_ok_p) +{ + struct usb_bus *p; + struct usb_device *q; + int n_found = 0; + + usrp_one_time_init (); + + p = usb_get_busses(); + while (p != NULL){ + q = p->devices; + while (q != NULL){ + if (usrp_usrp_p (q) || (fx2_ok_p && usrp_fx2_p (q))){ + if (n_found == nth) // return this one + return q; + n_found++; // keep looking + } + q = q->next; + } + p = p->next; + } + return 0; // not found +} + +static struct usb_dev_handle * +usrp_open_interface (struct usb_device *dev, int interface, int altinterface) +{ + struct usb_dev_handle *udh = usb_open (dev); + if (udh == 0) + return 0; + + if (dev != dev_handle_to_dev (udh)){ + fprintf (stderr, "%s:%d: internal error!\n", __FILE__, __LINE__); + abort (); + } + +#if defined(WIN32) + // There's no get get_configuration function, and with some of the newer kernels + // setting the configuration, even if to the same value, hoses any other processes + // that have it open. Hence we opt to not set it at all (We've only + // got a single configuration anyway). This may hose the win32 stuff... + + if (usb_set_configuration (udh, 1) < 0){ + /* + * Ignore this error. + * + * Seems that something changed in drivers/usb/core/devio.c:proc_setconfig such that + * it returns -EBUSY if _any_ of the interfaces of a device are open. + * We've only got a single configuration, so setting it doesn't even seem + * like it should be required. + */ + } +#endif + + if (usb_claim_interface (udh, interface) < 0){ + fprintf (stderr, "%s:usb_claim_interface: failed interface %d\n", __FUNCTION__,interface); + fprintf (stderr, "%s\n", usb_strerror()); + usb_close (udh); + return 0; + } + + if (usb_set_altinterface (udh, altinterface) < 0){ + fprintf (stderr, "%s:usb_set_alt_interface: failed\n", __FUNCTION__); + fprintf (stderr, "%s\n", usb_strerror()); + usb_release_interface (udh, interface); + usb_close (udh); + return 0; + } + + return udh; +} + +struct usb_dev_handle * +usrp_open_cmd_interface (struct usb_device *dev) +{ + return usrp_open_interface (dev, USRP_CMD_INTERFACE, USRP_CMD_ALTINTERFACE); +} + +struct usb_dev_handle * +usrp_open_rx_interface (struct usb_device *dev) +{ + return usrp_open_interface (dev, USRP_RX_INTERFACE, USRP_RX_ALTINTERFACE); +} + +struct usb_dev_handle * +usrp_open_tx_interface (struct usb_device *dev) +{ + return usrp_open_interface (dev, USRP_TX_INTERFACE, USRP_TX_ALTINTERFACE); +} + +bool +usrp_close_interface (struct usb_dev_handle *udh) +{ + // we're assuming that closing an interface automatically releases it. + return usb_close (udh) == 0; +} + +// ---------------------------------------------------------------- +// write internal ram using Cypress vendor extension + +static bool +write_internal_ram (struct usb_dev_handle *udh, unsigned char *buf, + int start_addr, size_t len) +{ + int addr; + int n; + int a; + int quanta = MAX_EP0_PKTSIZE; + + for (addr = start_addr; addr < start_addr + (int) len; addr += quanta){ + n = len + start_addr - addr; + if (n > quanta) + n = quanta; + + a = usb_control_msg (udh, 0x40, 0xA0, + addr, 0, (char *)(buf + (addr - start_addr)), n, 1000); + + if (a < 0){ + fprintf(stderr,"write_internal_ram failed: %s\n", usb_strerror()); + return false; + } + } + return true; +} + +// ---------------------------------------------------------------- +// whack the CPUCS register using the upload RAM vendor extension + +static bool +reset_cpu (struct usb_dev_handle *udh, bool reset_p) +{ + unsigned char v; + + if (reset_p) + v = 1; // hold processor in reset + else + v = 0; // release reset + + return write_internal_ram (udh, &v, 0xE600, 1); +} + +// ---------------------------------------------------------------- +// Load intel format file into cypress FX2 (8051) + +static bool +_usrp_load_firmware (struct usb_dev_handle *udh, const char *filename, + unsigned char hash[USRP_HASH_SIZE]) +{ + FILE *f = fopen (filename, "ra"); + if (f == 0){ + perror (filename); + return false; + } + + if (!reset_cpu (udh, true)) // hold CPU in reset while loading firmware + goto fail; + + + char s[1024]; + int length; + int addr; + int type; + unsigned char data[256]; + unsigned char checksum, a; + unsigned int b; + int i; + + while (!feof(f)){ + fgets(s, sizeof (s), f); /* we should not use more than 263 bytes normally */ + if(s[0]!=':'){ + fprintf(stderr,"%s: invalid line: \"%s\"\n", filename, s); + goto fail; + } + sscanf(s+1, "%02x", &length); + sscanf(s+3, "%04x", &addr); + sscanf(s+7, "%02x", &type); + + if(type==0){ + + a=length+(addr &0xff)+(addr>>8)+type; + for(i=0;i 0){ + if (write_cmd (udh, VRQ_FPGA_LOAD, 0, FL_XFER, buf, n) != n) + goto fail; + } + + if (write_cmd (udh, VRQ_FPGA_LOAD, 0, FL_END, 0, 0) != 0) + goto fail; + + fclose (fp); + + if (!usrp_set_hash (udh, FPGA_HASH_SLOT, hash)) + fprintf (stderr, "usrp: failed to write fpga hash slot\n"); + + // On the rev1 USRP, the {tx,rx}_{enable,reset} bits are + // controlled over the serial bus, and hence aren't observed until + // we've got a good fpga bitstream loaded. + + usrp_set_fpga_reset (udh, 0); // fpga out of master reset + + // now these commands will work + + ok &= usrp_set_fpga_tx_enable (udh, 0); + ok &= usrp_set_fpga_rx_enable (udh, 0); + + ok &= usrp_set_fpga_tx_reset (udh, 1); // reset tx and rx paths + ok &= usrp_set_fpga_rx_reset (udh, 1); + ok &= usrp_set_fpga_tx_reset (udh, 0); // reset tx and rx paths + ok &= usrp_set_fpga_rx_reset (udh, 0); + + if (!ok) + fprintf (stderr, "usrp: failed to reset tx and/or rx path\n"); + + // Manually reset all regs except master control to zero. + // FIXME may want to remove this when we rework FPGA reset strategy. + // In the mean while, this gets us reproducible behavior. + for (int i = 0; i < FR_USER_0; i++){ + if (i == FR_MASTER_CTRL) + continue; + usrp_write_fpga_reg(udh, i, 0); + } + + power_down_9862s (udh); // on the rev1, power these down! + usrp_set_led (udh, 1, 0); // led 1 off + + return true; + + fail: + power_down_9862s (udh); // on the rev1, power these down! + fclose (fp); + return false; +} + +// ---------------------------------------------------------------- + +bool +usrp_set_led (struct usb_dev_handle *udh, int which, bool on) +{ + int r = write_cmd (udh, VRQ_SET_LED, on, which, 0, 0); + + return r == 0; +} + +bool +usrp_set_hash (struct usb_dev_handle *udh, int which, + const unsigned char hash[USRP_HASH_SIZE]) +{ + which &= 1; + + // we use the Cypress firmware down load command to jam it in. + int r = usb_control_msg (udh, 0x40, 0xa0, hash_slot_addr[which], 0, + (char *) hash, USRP_HASH_SIZE, 1000); + return r == USRP_HASH_SIZE; +} + +bool +usrp_get_hash (struct usb_dev_handle *udh, int which, + unsigned char hash[USRP_HASH_SIZE]) +{ + which &= 1; + + // we use the Cypress firmware upload command to fetch it. + int r = usb_control_msg (udh, 0xc0, 0xa0, hash_slot_addr[which], 0, + (char *) hash, USRP_HASH_SIZE, 1000); + return r == USRP_HASH_SIZE; +} + +static bool +usrp_set_switch (struct usb_dev_handle *udh, int cmd_byte, bool on) +{ + return write_cmd (udh, cmd_byte, on, 0, 0, 0) == 0; +} + + +static bool +usrp1_fpga_write (struct usb_dev_handle *udh, + int regno, int value) +{ + // on the rev1 usrp, we use the generic spi_write interface + + unsigned char buf[4]; + + buf[0] = (value >> 24) & 0xff; // MSB first + buf[1] = (value >> 16) & 0xff; + buf[2] = (value >> 8) & 0xff; + buf[3] = (value >> 0) & 0xff; + + return usrp_spi_write (udh, 0x00 | (regno & 0x7f), + SPI_ENABLE_FPGA, + SPI_FMT_MSB | SPI_FMT_HDR_1, + buf, sizeof (buf)); +} + +static bool +usrp1_fpga_read (struct usb_dev_handle *udh, + int regno, int *value) +{ + *value = 0; + unsigned char buf[4]; + + bool ok = usrp_spi_read (udh, 0x80 | (regno & 0x7f), + SPI_ENABLE_FPGA, + SPI_FMT_MSB | SPI_FMT_HDR_1, + buf, sizeof (buf)); + + if (ok) + *value = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3]; + + return ok; +} + + +bool +usrp_write_fpga_reg (struct usb_dev_handle *udh, int reg, int value) +{ + switch (usrp_hw_rev (dev_handle_to_dev (udh))){ + case 0: // not supported ;) + abort(); + + default: + return usrp1_fpga_write (udh, reg, value); + } +} + +bool +usrp_read_fpga_reg (struct usb_dev_handle *udh, int reg, int *value) +{ + switch (usrp_hw_rev (dev_handle_to_dev (udh))){ + case 0: // not supported ;) + abort(); + + default: + return usrp1_fpga_read (udh, reg, value); + } +} + +bool +usrp_set_fpga_reset (struct usb_dev_handle *udh, bool on) +{ + return usrp_set_switch (udh, VRQ_FPGA_SET_RESET, on); +} + +bool +usrp_set_fpga_tx_enable (struct usb_dev_handle *udh, bool on) +{ + return usrp_set_switch (udh, VRQ_FPGA_SET_TX_ENABLE, on); +} + +bool +usrp_set_fpga_rx_enable (struct usb_dev_handle *udh, bool on) +{ + return usrp_set_switch (udh, VRQ_FPGA_SET_RX_ENABLE, on); +} + +bool +usrp_set_fpga_tx_reset (struct usb_dev_handle *udh, bool on) +{ + return usrp_set_switch (udh, VRQ_FPGA_SET_TX_RESET, on); +} + +bool +usrp_set_fpga_rx_reset (struct usb_dev_handle *udh, bool on) +{ + return usrp_set_switch (udh, VRQ_FPGA_SET_RX_RESET, on); +} + + +// ---------------------------------------------------------------- +// conditional load stuff + +static bool +compute_hash (const char *filename, unsigned char hash[USRP_HASH_SIZE]) +{ + assert (USRP_HASH_SIZE == 16); + memset (hash, 0, USRP_HASH_SIZE); + + FILE *fp = fopen (filename, "rb"); + if (fp == 0){ + perror (filename); + return false; + } + int r = md5_stream (fp, hash); + fclose (fp); + + return r == 0; +} + +static usrp_load_status_t +usrp_conditionally_load_something (struct usb_dev_handle *udh, + const char *filename, + bool force, + int slot, + bool loader (struct usb_dev_handle *, + const char *, + unsigned char [USRP_HASH_SIZE])) +{ + unsigned char file_hash[USRP_HASH_SIZE]; + unsigned char usrp_hash[USRP_HASH_SIZE]; + + if (access (filename, R_OK) != 0){ + perror (filename); + return ULS_ERROR; + } + + if (!compute_hash (filename, file_hash)) + return ULS_ERROR; + + if (!force + && usrp_get_hash (udh, slot, usrp_hash) + && memcmp (file_hash, usrp_hash, USRP_HASH_SIZE) == 0) + return ULS_ALREADY_LOADED; + + bool r = loader (udh, filename, file_hash); + + if (!r) + return ULS_ERROR; + + return ULS_OK; +} + +usrp_load_status_t +usrp_load_firmware (struct usb_dev_handle *udh, + const char *filename, + bool force) +{ + return usrp_conditionally_load_something (udh, filename, force, + FIRMWARE_HASH_SLOT, + _usrp_load_firmware); +} + +usrp_load_status_t +usrp_load_fpga (struct usb_dev_handle *udh, + const char *filename, + bool force) +{ + return usrp_conditionally_load_something (udh, filename, force, + FPGA_HASH_SLOT, + _usrp_load_fpga); +} + +static usb_dev_handle * +open_nth_cmd_interface (int nth) +{ + struct usb_device *udev = usrp_find_device (nth); + if (udev == 0){ + fprintf (stderr, "usrp: failed to find usrp[%d]\n", nth); + return 0; + } + + struct usb_dev_handle *udh; + + udh = usrp_open_cmd_interface (udev); + if (udh == 0){ + // FIXME this could be because somebody else has it open. + // We should delay and retry... + fprintf (stderr, "open_nth_cmd_interface: open_cmd_interface failed\n"); + usb_strerror (); + return 0; + } + + return udh; + } + +static bool +our_nanosleep (const struct timespec *delay) +{ + struct timespec new_delay = *delay; + struct timespec remainder; + + while (1){ + int r = nanosleep (&new_delay, &remainder); + if (r == 0) + return true; + if (errno == EINTR) + new_delay = remainder; + else { + perror ("nanosleep"); + return false; + } + } +} + +static bool +mdelay (int millisecs) +{ + struct timespec ts; + ts.tv_sec = millisecs / 1000; + ts.tv_nsec = (millisecs - (1000 * ts.tv_sec)) * 1000000; + return our_nanosleep (&ts); +} + +usrp_load_status_t +usrp_load_firmware_nth (int nth, const char *filename, bool force){ + struct usb_dev_handle *udh = open_nth_cmd_interface (nth); + if (udh == 0) + return ULS_ERROR; + + usrp_load_status_t s = usrp_load_firmware (udh, filename, force); + usrp_close_interface (udh); + + switch (s){ + + case ULS_ALREADY_LOADED: // nothing changed... + return ULS_ALREADY_LOADED; + break; + + case ULS_OK: + // we loaded firmware successfully. + + // It's highly likely that the board will renumerate (simulate a + // disconnect/reconnect sequence), invalidating our current + // handle. + + // FIXME. Turn this into a loop that rescans until we refind ourselves + + struct timespec t; // delay for 1 second + t.tv_sec = 2; + t.tv_nsec = 0; + our_nanosleep (&t); + + usb_find_busses (); // rescan busses and devices + usb_find_devices (); + + return ULS_OK; + + default: + case ULS_ERROR: // some kind of problem + return ULS_ERROR; + } +} + +static void +load_status_msg (usrp_load_status_t s, const char *type, const char *filename) +{ + char *e = getenv("USRP_VERBOSE"); + bool verbose = e != 0; + + switch (s){ + case ULS_ERROR: + fprintf (stderr, "usrp: failed to load %s %s.\n", type, filename); + break; + + case ULS_ALREADY_LOADED: + if (verbose) + fprintf (stderr, "usrp: %s %s already loaded.\n", type, filename); + break; + + case ULS_OK: + if (verbose) + fprintf (stderr, "usrp: %s %s loaded successfully.\n", type, filename); + break; + } +} + +bool +usrp_load_standard_bits (int nth, bool force, + const std::string fpga_filename, + const std::string firmware_filename) +{ + usrp_load_status_t s; + const char *filename; + const char *proto_filename; + int hw_rev; + + // first, figure out what hardware rev we're dealing with + { + struct usb_device *udev = usrp_find_device (nth); + if (udev == 0){ + fprintf (stderr, "usrp: failed to find usrp[%d]\n", nth); + return false; + } + hw_rev = usrp_hw_rev (udev); + } + + // start by loading the firmware + + proto_filename = get_proto_filename(firmware_filename, "USRP_FIRMWARE", + default_firmware_filename); + filename = find_file(proto_filename, hw_rev); + if (filename == 0){ + fprintf (stderr, "Can't find firmware: %s\n", proto_filename); + return false; + } + + s = usrp_load_firmware_nth (nth, filename, force); + load_status_msg (s, "firmware", filename); + + if (s == ULS_ERROR) + return false; + + // if we actually loaded firmware, we must reload fpga ... + if (s == ULS_OK) + force = true; + + // now move on to the fpga configuration bitstream + + proto_filename = get_proto_filename(fpga_filename, "USRP_FPGA", + default_fpga_filename); + filename = find_file (proto_filename, hw_rev); + if (filename == 0){ + fprintf (stderr, "Can't find fpga bitstream: %s\n", proto_filename); + return false; + } + + struct usb_dev_handle *udh = open_nth_cmd_interface (nth); + if (udh == 0) + return false; + + s = usrp_load_fpga (udh, filename, force); + usrp_close_interface (udh); + load_status_msg (s, "fpga bitstream", filename); + + if (s == ULS_ERROR) + return false; + + return true; +} + +bool +_usrp_get_status (struct usb_dev_handle *udh, int which, bool *trouble) +{ + unsigned char status; + *trouble = true; + + if (write_cmd (udh, VRQ_GET_STATUS, 0, which, + &status, sizeof (status)) != sizeof (status)) + return false; + + *trouble = status; + return true; +} + +bool +usrp_check_rx_overrun (struct usb_dev_handle *udh, bool *overrun_p) +{ + return _usrp_get_status (udh, GS_RX_OVERRUN, overrun_p); +} + +bool +usrp_check_tx_underrun (struct usb_dev_handle *udh, bool *underrun_p) +{ + return _usrp_get_status (udh, GS_TX_UNDERRUN, underrun_p); +} + + +bool +usrp_i2c_write (struct usb_dev_handle *udh, int i2c_addr, + const void *buf, int len) +{ + if (len < 1 || len > MAX_EP0_PKTSIZE) + return false; + + return write_cmd (udh, VRQ_I2C_WRITE, i2c_addr, 0, + (unsigned char *) buf, len) == len; +} + + +bool +usrp_i2c_read (struct usb_dev_handle *udh, int i2c_addr, + void *buf, int len) +{ + if (len < 1 || len > MAX_EP0_PKTSIZE) + return false; + + return write_cmd (udh, VRQ_I2C_READ, i2c_addr, 0, + (unsigned char *) buf, len) == len; +} + +bool +usrp_spi_write (struct usb_dev_handle *udh, + int optional_header, int enables, int format, + const void *buf, int len) +{ + if (len < 0 || len > MAX_EP0_PKTSIZE) + return false; + + return write_cmd (udh, VRQ_SPI_WRITE, + optional_header, + ((enables & 0xff) << 8) | (format & 0xff), + (unsigned char *) buf, len) == len; +} + + +bool +usrp_spi_read (struct usb_dev_handle *udh, + int optional_header, int enables, int format, + void *buf, int len) +{ + if (len < 0 || len > MAX_EP0_PKTSIZE) + return false; + + return write_cmd (udh, VRQ_SPI_READ, + optional_header, + ((enables & 0xff) << 8) | (format & 0xff), + (unsigned char *) buf, len) == len; +} + +bool +usrp_9862_write (struct usb_dev_handle *udh, int which_codec, + int regno, int value) +{ + if (0) + fprintf (stderr, "usrp_9862_write which = %d, reg = %2d, val = %3d (0x%02x)\n", + which_codec, regno, value, value); + + unsigned char buf[1]; + + buf[0] = value; + + return usrp_spi_write (udh, 0x00 | (regno & 0x3f), + which_codec == 0 ? SPI_ENABLE_CODEC_A : SPI_ENABLE_CODEC_B, + SPI_FMT_MSB | SPI_FMT_HDR_1, + buf, 1); +} + +bool +usrp_9862_read (struct usb_dev_handle *udh, int which_codec, + int regno, unsigned char *value) +{ + return usrp_spi_read (udh, 0x80 | (regno & 0x3f), + which_codec == 0 ? SPI_ENABLE_CODEC_A : SPI_ENABLE_CODEC_B, + SPI_FMT_MSB | SPI_FMT_HDR_1, + value, 1); +} + +bool +usrp_9862_write_many (struct usb_dev_handle *udh, + int which_codec, + const unsigned char *buf, + int len) +{ + if (len & 0x1) + return false; // must be even + + bool result = true; + + while (len > 0){ + result &= usrp_9862_write (udh, which_codec, buf[0], buf[1]); + len -= 2; + buf += 2; + } + + return result; +} + + +bool +usrp_9862_write_many_all (struct usb_dev_handle *udh, + const unsigned char *buf, int len) +{ + // FIXME handle 2/2 and 4/4 versions + + bool result; + result = usrp_9862_write_many (udh, 0, buf, len); + result &= usrp_9862_write_many (udh, 1, buf, len); + return result; +} + +static void +power_down_9862s (struct usb_dev_handle *udh) +{ + static const unsigned char regs[] = { + REG_RX_PWR_DN, 0x01, // everything + REG_TX_PWR_DN, 0x0f, // pwr dn digital and analog_both + REG_TX_MODULATOR, 0x00 // coarse & fine modulators disabled + }; + + switch (usrp_hw_rev (dev_handle_to_dev (udh))){ + case 0: + break; + + default: + usrp_9862_write_many_all (udh, regs, sizeof (regs)); + break; + } +} + + + +static const int EEPROM_PAGESIZE = 16; + +bool +usrp_eeprom_write (struct usb_dev_handle *udh, int i2c_addr, + int eeprom_offset, const void *buf, int len) +{ + unsigned char cmd[2]; + const unsigned char *p = (unsigned char *) buf; + + // The simplest thing that could possibly work: + // all writes are single byte writes. + // + // We could speed this up using the page write feature, + // but we write so infrequently, why bother... + + while (len-- > 0){ + cmd[0] = eeprom_offset++; + cmd[1] = *p++; + bool r = usrp_i2c_write (udh, i2c_addr, cmd, sizeof (cmd)); + mdelay (10); // delay 10ms worst case write time + if (!r) + return false; + } + + return true; +} + +bool +usrp_eeprom_read (struct usb_dev_handle *udh, int i2c_addr, + int eeprom_offset, void *buf, int len) +{ + unsigned char *p = (unsigned char *) buf; + + // We setup a random read by first doing a "zero byte write". + // Writes carry an address. Reads use an implicit address. + + unsigned char cmd[1]; + cmd[0] = eeprom_offset; + if (!usrp_i2c_write (udh, i2c_addr, cmd, sizeof (cmd))) + return false; + + while (len > 0){ + int n = std::min (len, MAX_EP0_PKTSIZE); + if (!usrp_i2c_read (udh, i2c_addr, p, n)) + return false; + len -= n; + p += n; + } + return true; +} + +// ---------------------------------------------------------------- + +static bool +slot_to_codec (int slot, int *which_codec) +{ + *which_codec = 0; + + switch (slot){ + case SLOT_TX_A: + case SLOT_RX_A: + *which_codec = 0; + break; + + case SLOT_TX_B: + case SLOT_RX_B: + *which_codec = 1; + break; + + default: + fprintf (stderr, "usrp_prims:slot_to_codec: invalid slot = %d\n", slot); + return false; + } + return true; +} + +static bool +tx_slot_p (int slot) +{ + switch (slot){ + case SLOT_TX_A: + case SLOT_TX_B: + return true; + + default: + return false; + } +} + +bool +usrp_write_aux_dac (struct usb_dev_handle *udh, int slot, + int which_dac, int value) +{ + int which_codec; + + if (!slot_to_codec (slot, &which_codec)) + return false; + + if (!(0 <= which_dac && which_dac < 4)){ + fprintf (stderr, "usrp_write_aux_dac: invalid dac = %d\n", which_dac); + return false; + } + + value &= 0x0fff; // mask to 12-bits + + if (which_dac == 3){ + // dac 3 is really 12-bits. Use value as is. + bool r = true; + r &= usrp_9862_write (udh, which_codec, 43, (value >> 4)); // most sig + r &= usrp_9862_write (udh, which_codec, 42, (value & 0xf) << 4); // least sig + return r; + } + else { + // dac 0, 1, and 2 are really 8 bits. + value = value >> 4; // shift value appropriately + return usrp_9862_write (udh, which_codec, 36 + which_dac, value); + } +} + + +bool +usrp_read_aux_adc (struct usb_dev_handle *udh, int slot, + int which_adc, int *value) +{ + *value = 0; + int which_codec; + + if (!slot_to_codec (slot, &which_codec)) + return false; + + if (!(0 <= which_codec && which_codec < 2)){ + fprintf (stderr, "usrp_read_aux_adc: invalid adc = %d\n", which_adc); + return false; + } + + unsigned char aux_adc_control = + AUX_ADC_CTRL_REFSEL_A // on chip reference + | AUX_ADC_CTRL_REFSEL_B; // on chip reference + + int rd_reg = 26; // base address of two regs to read for result + + // program the ADC mux bits + if (tx_slot_p (slot)) + aux_adc_control |= AUX_ADC_CTRL_SELECT_A2 | AUX_ADC_CTRL_SELECT_B2; + else { + rd_reg += 2; + aux_adc_control |= AUX_ADC_CTRL_SELECT_A1 | AUX_ADC_CTRL_SELECT_B1; + } + + // I'm not sure if we can set the mux and issue a start conversion + // in the same cycle, so let's do them one at a time. + + usrp_9862_write (udh, which_codec, 34, aux_adc_control); + + if (which_adc == 0) + aux_adc_control |= AUX_ADC_CTRL_START_A; + else { + rd_reg += 4; + aux_adc_control |= AUX_ADC_CTRL_START_B; + } + + // start the conversion + usrp_9862_write (udh, which_codec, 34, aux_adc_control); + + // read the 10-bit result back + unsigned char v_lo = 0; + unsigned char v_hi = 0; + bool r = usrp_9862_read (udh, which_codec, rd_reg, &v_lo); + r &= usrp_9862_read (udh, which_codec, rd_reg + 1, &v_hi); + + if (r) + *value = ((v_hi << 2) | ((v_lo >> 6) & 0x3)) << 2; // format as 12-bit + + return r; +} + +// ---------------------------------------------------------------- + +static int slot_to_i2c_addr (int slot) +{ + switch (slot){ + case SLOT_TX_A: return I2C_ADDR_TX_A; + case SLOT_RX_A: return I2C_ADDR_RX_A; + case SLOT_TX_B: return I2C_ADDR_TX_B; + case SLOT_RX_B: return I2C_ADDR_RX_B; + default: return -1; + } +} + +static void +set_chksum (unsigned char *buf) +{ + int sum = 0; + unsigned int i; + for (i = 0; i < DB_EEPROM_CLEN - 1; i++) + sum += buf[i]; + buf[i] = -sum; +} + +static usrp_dbeeprom_status_t +read_dboard_eeprom (struct usb_dev_handle *udh, + int slot_id, unsigned char *buf) +{ + int i2c_addr = slot_to_i2c_addr (slot_id); + if (i2c_addr == -1) + return UDBE_BAD_SLOT; + + if (!usrp_eeprom_read (udh, i2c_addr, 0, buf, DB_EEPROM_CLEN)) + return UDBE_NO_EEPROM; + + if (buf[DB_EEPROM_MAGIC] != DB_EEPROM_MAGIC_VALUE) + return UDBE_INVALID_EEPROM; + + int sum = 0; + for (unsigned int i = 0; i < DB_EEPROM_CLEN; i++) + sum += buf[i]; + + if ((sum & 0xff) != 0) + return UDBE_INVALID_EEPROM; + + return UDBE_OK; +} + +usrp_dbeeprom_status_t +usrp_read_dboard_eeprom (struct usb_dev_handle *udh, + int slot_id, usrp_dboard_eeprom *eeprom) +{ + unsigned char buf[DB_EEPROM_CLEN]; + + memset (eeprom, 0, sizeof (*eeprom)); + + usrp_dbeeprom_status_t s = read_dboard_eeprom (udh, slot_id, buf); + if (s != UDBE_OK) + return s; + + eeprom->id = (buf[DB_EEPROM_ID_MSB] << 8) | buf[DB_EEPROM_ID_LSB]; + eeprom->oe = (buf[DB_EEPROM_OE_MSB] << 8) | buf[DB_EEPROM_OE_LSB]; + eeprom->offset[0] = (buf[DB_EEPROM_OFFSET_0_MSB] << 8) | buf[DB_EEPROM_OFFSET_0_LSB]; + eeprom->offset[1] = (buf[DB_EEPROM_OFFSET_1_MSB] << 8) | buf[DB_EEPROM_OFFSET_1_LSB]; + + return UDBE_OK; +} + +bool +usrp_write_dboard_offsets (struct usb_dev_handle *udh, int slot_id, + short offset0, short offset1) +{ + unsigned char buf[DB_EEPROM_CLEN]; + + usrp_dbeeprom_status_t s = read_dboard_eeprom (udh, slot_id, buf); + if (s != UDBE_OK) + return false; + + buf[DB_EEPROM_OFFSET_0_LSB] = (offset0 >> 0) & 0xff; + buf[DB_EEPROM_OFFSET_0_MSB] = (offset0 >> 8) & 0xff; + buf[DB_EEPROM_OFFSET_1_LSB] = (offset1 >> 0) & 0xff; + buf[DB_EEPROM_OFFSET_1_MSB] = (offset1 >> 8) & 0xff; + set_chksum (buf); + + return usrp_eeprom_write (udh, slot_to_i2c_addr (slot_id), + 0, buf, sizeof (buf)); +} + +std::string +usrp_serial_number(struct usb_dev_handle *udh) +{ + u_int8_t iserial = usb_device(udh)->descriptor.iSerialNumber; + if (iserial == 0) + return ""; + + char buf[1024]; + if (usb_get_string_simple(udh, iserial, buf, sizeof(buf)) < 0) + return ""; + + return buf; +} diff --git a/host/lib/usrp_prims.h b/host/lib/usrp_prims.h new file mode 100644 index 0000000..a4bbb62 --- /dev/null +++ b/host/lib/usrp_prims.h @@ -0,0 +1,294 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003,2004,2006 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +/* + * Low level primitives for directly messing with USRP hardware. + * + * If you're trying to use the USRP, you'll probably want to take a look + * at the usrp_rx and usrp_tx classes. They hide a bunch of low level details + * and provide high performance streaming i/o. + * + * This interface is built on top of libusb, which allegedly works under + * Linux, *BSD and Mac OS/X. http://libusb.sourceforge.net + */ + +#ifndef _USRP_PRIMS_H_ +#define _USRP_PRIMS_H_ + +#include +#include + +static const int USRP_HASH_SIZE = 16; + +enum usrp_load_status_t { ULS_ERROR = 0, ULS_OK, ULS_ALREADY_LOADED }; + +struct usb_dev_handle; +struct usb_device; + +/*! + * \brief initialize libusb; probe busses and devices. + * Safe to call more than once. + */ +void usrp_one_time_init (); + +/* + * force a rescan of the buses and devices + */ +void usrp_rescan (); + +/*! + * \brief locate Nth (zero based) USRP device in system. + * Return pointer or 0 if not found. + * + * The following kinds of devices are considered USRPs: + * + * unconfigured USRP (no firwmare loaded) + * configured USRP (firmware loaded) + * unconfigured Cypress FX2 (only if fx2_ok_p is true) + */ +struct usb_device *usrp_find_device (int nth, bool fx2_ok_p = false); + +bool usrp_usrp_p (struct usb_device *q); //< is this a USRP +bool usrp_usrp0_p (struct usb_device *q); //< is this a USRP Rev 0 +bool usrp_usrp1_p (struct usb_device *q); //< is this a USRP Rev 1 +bool usrp_usrp2_p (struct usb_device *q); //< is this a USRP Rev 2 +int usrp_hw_rev (struct usb_device *q); //< return h/w rev code + +bool usrp_fx2_p (struct usb_device *q); //< is this an unconfigured Cypress FX2 + +bool usrp_unconfigured_usrp_p (struct usb_device *q); //< some kind of unconfigured USRP +bool usrp_configured_usrp_p (struct usb_device *q); //< some kind of configured USRP + +/*! + * \brief given a usb_device return an instance of the appropriate usb_dev_handle + * + * These routines claim the specified interface and select the + * correct alternate interface. (USB nomenclature is totally screwed!) + * + * If interface can't be opened, or is already claimed by some other + * process, 0 is returned. + */ +struct usb_dev_handle *usrp_open_cmd_interface (struct usb_device *dev); +struct usb_dev_handle *usrp_open_rx_interface (struct usb_device *dev); +struct usb_dev_handle *usrp_open_tx_interface (struct usb_device *dev); + +/*! + * \brief close interface. + */ +bool usrp_close_interface (struct usb_dev_handle *udh); + +/*! + * \brief load intel hex format file into USRP/Cypress FX2 (8051). + * + * The filename extension is typically *.ihx + * + * Note that loading firmware may cause the device to renumerate. I.e., + * change its configuration, invalidating the current device handle. + */ + +usrp_load_status_t +usrp_load_firmware (struct usb_dev_handle *udh, const char *filename, bool force); + +/*! + * \brief load intel hex format file into USRP FX2 (8051). + * + * The filename extension is typically *.ihx + * + * Note that loading firmware may cause the device to renumerate. I.e., + * change its configuration, invalidating the current device handle. + * If the result is ULS_OK, usrp_load_firmware_nth delays 1 second + * then rescans the busses and devices. + */ +usrp_load_status_t +usrp_load_firmware_nth (int nth, const char *filename, bool force); + +/*! + * \brief load fpga configuration bitstream + */ +usrp_load_status_t +usrp_load_fpga (struct usb_dev_handle *udh, const char *filename, bool force); + +/*! + * \brief load the regular firmware and fpga bitstream in the Nth USRP. + * + * This is the normal starting point... + */ +bool usrp_load_standard_bits (int nth, bool force, + const std::string fpga_filename = "", + const std::string firmware_filename = ""); + +/*! + * \brief copy the given \p hash into the USRP hash slot \p which. + * The usrp implements two hash slots, 0 and 1. + */ +bool usrp_set_hash (struct usb_dev_handle *udh, int which, + const unsigned char hash[USRP_HASH_SIZE]); + +/*! + * \brief retrieve the \p hash from the USRP hash slot \p which. + * The usrp implements two hash slots, 0 and 1. + */ +bool usrp_get_hash (struct usb_dev_handle *udh, int which, + unsigned char hash[USRP_HASH_SIZE]); + +bool usrp_write_fpga_reg (struct usb_dev_handle *udh, int reg, int value); +bool usrp_read_fpga_reg (struct usb_dev_handle *udh, int reg, int *value); +bool usrp_set_fpga_reset (struct usb_dev_handle *udh, bool on); +bool usrp_set_fpga_tx_enable (struct usb_dev_handle *udh, bool on); +bool usrp_set_fpga_rx_enable (struct usb_dev_handle *udh, bool on); +bool usrp_set_fpga_tx_reset (struct usb_dev_handle *udh, bool on); +bool usrp_set_fpga_rx_reset (struct usb_dev_handle *udh, bool on); +bool usrp_set_led (struct usb_dev_handle *udh, int which, bool on); + +bool usrp_check_rx_overrun (struct usb_dev_handle *udh, bool *overrun_p); +bool usrp_check_tx_underrun (struct usb_dev_handle *udh, bool *underrun_p); + +// i2c_read and i2c_write are limited to a maximum len of 64 bytes. + +bool usrp_i2c_write (struct usb_dev_handle *udh, int i2c_addr, + const void *buf, int len); + +bool usrp_i2c_read (struct usb_dev_handle *udh, int i2c_addr, + void *buf, int len); + +// spi_read and spi_write are limited to a maximum of 64 bytes +// See usrp_spi_defs.h for more info + +bool usrp_spi_write (struct usb_dev_handle *udh, + int optional_header, int enables, int format, + const void *buf, int len); + +bool usrp_spi_read (struct usb_dev_handle *udh, + int optional_header, int enables, int format, + void *buf, int len); + + +bool usrp_9862_write (struct usb_dev_handle *udh, + int which_codec, // [0, 1] + int regno, // [0, 63] + int value); // [0, 255] + +bool usrp_9862_read (struct usb_dev_handle *udh, + int which_codec, // [0, 1] + int regno, // [0, 63] + unsigned char *value); // [0, 255] + +/*! + * \brief Write multiple 9862 regs at once. + * + * \p buf contains alternating register_number, register_value pairs. + * \p len must be even and is the length of buf in bytes. + */ +bool usrp_9862_write_many (struct usb_dev_handle *udh, int which_codec, + const unsigned char *buf, int len); + + +/*! + * \brief write specified regs to all 9862's in the system + */ +bool usrp_9862_write_many_all (struct usb_dev_handle *udh, + const unsigned char *buf, int len); + + +// Write 24LC024 / 24LC025 EEPROM on motherboard or daughterboard. +// Which EEPROM is determined by i2c_addr. See i2c_addr.h + +bool usrp_eeprom_write (struct usb_dev_handle *udh, int i2c_addr, + int eeprom_offset, const void *buf, int len); + + +// Read 24LC024 / 24LC025 EEPROM on motherboard or daughterboard. +// Which EEPROM is determined by i2c_addr. See i2c_addr.h + +bool usrp_eeprom_read (struct usb_dev_handle *udh, int i2c_addr, + int eeprom_offset, void *buf, int len); + + +// Slot specific i/o routines + +/*! + * \brief write to the specified aux dac. + * + * \p slot: which Tx or Rx slot to write. + * N.B., SLOT_TX_A and SLOT_RX_A share the same AUX DAC's + * SLOT_TX_B and SLOT_RX_B share the same AUX DAC's + * + * \p which_dac: [0,3] RX slots must use only 0 and 1. + * TX slots must use only 2 and 3. + * + * AUX DAC 3 is really the 9862 sigma delta output. + * + * \p value to write to aux dac. All dacs take straight + * binary values. Although dacs 0, 1 and 2 are 8-bit and dac 3 is 12-bit, + * the interface is in terms of 12-bit values [0,4095] + */ +bool usrp_write_aux_dac (struct usb_dev_handle *uhd, int slot, + int which_dac, int value); + +/*! + * \brief Read the specified aux adc + * + * \p slot: which Tx or Rx slot to read aux dac + * \p which_adc: [0,1] which of the two adcs to read + * \p *value: return value, 12-bit straight binary. + */ +bool usrp_read_aux_adc (struct usb_dev_handle *udh, int slot, + int which_adc, int *value); + + +/*! + * \brief usrp daughterboard id to name mapping + */ +const std::string usrp_dbid_to_string (int dbid); + + +enum usrp_dbeeprom_status_t { UDBE_OK, UDBE_BAD_SLOT, UDBE_NO_EEPROM, UDBE_INVALID_EEPROM }; + +struct usrp_dboard_eeprom { + unsigned short id; // d'board identifier code + unsigned short oe; // fpga output enables: + // If bit set, i/o pin is an output from FPGA. + short offset[2]; // ADC/DAC offset correction +}; + +/*! + * \brief Read and return parsed daughterboard eeprom + */ +usrp_dbeeprom_status_t +usrp_read_dboard_eeprom (struct usb_dev_handle *udh, + int slot_id, usrp_dboard_eeprom *eeprom); + +/*! + * \brief write ADC/DAC offset calibration constants to d'board eeprom + */ +bool usrp_write_dboard_offsets (struct usb_dev_handle *udh, int slot_id, + short offset0, short offset1); + +/*! + * \brief return a usrp's serial number. + * + * Note that this only works on a configured usrp. + * \returns non-zero length string iff successful. + */ +std::string usrp_serial_number(struct usb_dev_handle *udh); + +#endif /* _USRP_PRIMS_H_ */ diff --git a/host/lib/usrp_slots.h b/host/lib/usrp_slots.h new file mode 100644 index 0000000..1568ce7 --- /dev/null +++ b/host/lib/usrp_slots.h @@ -0,0 +1,33 @@ +/* -*- c++ -*- */ +/* + * Copyright 2004 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifndef INCLUDED_USRP_SLOTS_H +#define INCLUDED_USRP_SLOTS_H + +// daughterboard slot numbers used in some calls + +static const int SLOT_TX_A = 0; +static const int SLOT_RX_A = 1; +static const int SLOT_TX_B = 2; +static const int SLOT_RX_B = 3; + +#endif /* INCLUDED_USRP_SLOTS_H */ diff --git a/host/lib/usrp_standard.cc b/host/lib/usrp_standard.cc new file mode 100644 index 0000000..d59920f --- /dev/null +++ b/host/lib/usrp_standard.cc @@ -0,0 +1,831 @@ +/* -*- c++ -*- */ +/* + * Copyright 2004 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#include + +#include "usrp_prims.h" +#include "fpga_regs_common.h" +#include "fpga_regs_standard.h" +#include +#include +#include +#include + + +static const int OLD_CAPS_VAL = 0xaa55ff77; +static const int DEFAULT_CAPS_VAL = ((2 << bmFR_RB_CAPS_NDUC_SHIFT) + | (2 << bmFR_RB_CAPS_NDDC_SHIFT) + | bmFR_RB_CAPS_RX_HAS_HALFBAND); + +// #define USE_FPGA_TX_CORDIC + + +using namespace ad9862; + +#define NELEM(x) (sizeof (x) / sizeof (x[0])) + + +static unsigned int +compute_freq_control_word_fpga (double master_freq, double target_freq, + double *actual_freq, bool verbose) +{ + static const int NBITS = 14; + + int v = (int) rint (target_freq / master_freq * pow (2.0, 32.0)); + + if (0) + v = (v >> (32 - NBITS)) << (32 - NBITS); // keep only top NBITS + + *actual_freq = v * master_freq / pow (2.0, 32.0); + + if (verbose) + fprintf (stderr, + "compute_freq_control_word_fpga: target = %g actual = %g delta = %g\n", + target_freq, *actual_freq, *actual_freq - target_freq); + + return (unsigned int) v; +} + +// The 9862 uses an unsigned 24-bit frequency tuning word and +// a separate register to control the sign. + +static unsigned int +compute_freq_control_word_9862 (double master_freq, double target_freq, + double *actual_freq, bool verbose) +{ + double sign = 1.0; + + if (target_freq < 0) + sign = -1.0; + + int v = (int) rint (fabs (target_freq) / master_freq * pow (2.0, 24.0)); + *actual_freq = v * master_freq / pow (2.0, 24.0) * sign; + + if (verbose) + fprintf (stderr, + "compute_freq_control_word_9862: target = %g actual = %g delta = %g v = %8d\n", + target_freq, *actual_freq, *actual_freq - target_freq, v); + + return (unsigned int) v; +} + +// ---------------------------------------------------------------- + +usrp_standard_common::usrp_standard_common(usrp_basic *parent) +{ + // read new FPGA capability register + if (!parent->_read_fpga_reg(FR_RB_CAPS, &d_fpga_caps)){ + fprintf (stderr, "usrp_standard_common: failed to read FPGA cap register.\n"); + throw std::runtime_error ("usrp_standard_common::ctor"); + } + // If we don't have the cap register, set the value to what it would + // have had if we did have one ;) + if (d_fpga_caps == OLD_CAPS_VAL) + d_fpga_caps = DEFAULT_CAPS_VAL; + + if (0){ + fprintf(stdout, "has_rx_halfband = %d\n", has_rx_halfband()); + fprintf(stdout, "nddcs = %d\n", nddcs()); + fprintf(stdout, "has_tx_halfband = %d\n", has_tx_halfband()); + fprintf(stdout, "nducs = %d\n", nducs()); + } +} + +bool +usrp_standard_common::has_rx_halfband() const +{ + return (d_fpga_caps & bmFR_RB_CAPS_RX_HAS_HALFBAND) ? true : false; +} + +int +usrp_standard_common::nddcs() const +{ + return (d_fpga_caps & bmFR_RB_CAPS_NDDC_MASK) >> bmFR_RB_CAPS_NDDC_SHIFT; +} + +bool +usrp_standard_common::has_tx_halfband() const +{ + return (d_fpga_caps & bmFR_RB_CAPS_TX_HAS_HALFBAND) ? true : false; +} + +int +usrp_standard_common::nducs() const +{ + return (d_fpga_caps & bmFR_RB_CAPS_NDUC_MASK) >> bmFR_RB_CAPS_NDUC_SHIFT; +} + +// ---------------------------------------------------------------- + +static int +real_rx_mux_value (int mux, int nchan) +{ + if (mux != -1) + return mux; + + return 0x32103210; +} + +usrp_standard_rx::usrp_standard_rx (int which_board, + unsigned int decim_rate, + int nchan, int mux, int mode, + int fusb_block_size, int fusb_nblocks, + const std::string fpga_filename, + const std::string firmware_filename + ) + : usrp_basic_rx (which_board, fusb_block_size, fusb_nblocks, + fpga_filename, firmware_filename), + usrp_standard_common(this), + d_nchan (1), d_sw_mux (0x0), d_hw_mux (0x0) +{ + if (!set_format(make_format())){ + fprintf (stderr, "usrp_standard_rx: set_format failed\n"); + throw std::runtime_error ("usrp_standard_rx::ctor"); + } + if (!set_nchannels (nchan)){ + fprintf (stderr, "usrp_standard_rx: set_nchannels failed\n"); + throw std::runtime_error ("usrp_standard_rx::ctor"); + } + if (!set_decim_rate (decim_rate)){ + fprintf (stderr, "usrp_standard_rx: set_decim_rate failed\n"); + throw std::runtime_error ("usrp_standard_rx::ctor"); + } + if (!set_mux (real_rx_mux_value (mux, nchan))){ + fprintf (stderr, "usrp_standard_rx: set_mux failed\n"); + throw std::runtime_error ("usrp_standard_rx::ctor"); + } + if (!set_fpga_mode (mode)){ + fprintf (stderr, "usrp_standard_rx: set_fpga_mode failed\n"); + throw std::runtime_error ("usrp_standard_rx::ctor"); + } + + for (int i = 0; i < MAX_CHAN; i++){ + set_rx_freq(i, 0); + set_ddc_phase(i, 0); + } +} + +usrp_standard_rx::~usrp_standard_rx () +{ + // fprintf(stderr, "\nusrp_standard_rx: dtor\n"); +} + +bool +usrp_standard_rx::start () +{ + if (!usrp_basic_rx::start ()) + return false; + + // add our code here + + return true; +} + +bool +usrp_standard_rx::stop () +{ + bool ok = usrp_basic_rx::stop (); + + // add our code here + + return ok; +} + +usrp_standard_rx * +usrp_standard_rx::make (int which_board, + unsigned int decim_rate, + int nchan, int mux, int mode, + int fusb_block_size, int fusb_nblocks, + const std::string fpga_filename, + const std::string firmware_filename + ) +{ + usrp_standard_rx *u = 0; + + try { + u = new usrp_standard_rx (which_board, decim_rate, + nchan, mux, mode, + fusb_block_size, fusb_nblocks, + fpga_filename, firmware_filename); + return u; + } + catch (...){ + delete u; + return 0; + } + + return u; +} + +bool +usrp_standard_rx::set_decim_rate(unsigned int rate) +{ + if ((rate & 0x1) || rate < 4 || rate > 256){ + fprintf (stderr, "usrp_standard_rx::set_decim_rate: rate must be EVEN and in [4, 256]\n"); + return false; + } + + d_decim_rate = rate; + set_usb_data_rate ((adc_rate () / rate * nchannels ()) + * (2 * sizeof (short))); + + bool s = disable_rx (); + int v = has_rx_halfband() ? d_decim_rate/2 - 1 : d_decim_rate - 1; + bool ok = _write_fpga_reg (FR_DECIM_RATE, v); + restore_rx (s); + return ok; +} + +bool usrp_standard_rx::set_nchannels (int nchan) +{ + if (!(nchan == 1 || nchan == 2 || nchan == 4)) + return false; + + if (nchan > nddcs()) + return false; + + d_nchan = nchan; + + return write_hw_mux_reg (); +} + + +// map software mux value to hw mux value +// +// Software mux value: +// +// 3 2 1 +// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +// +-------+-------+-------+-------+-------+-------+-------+-------+ +// | Q3 | I3 | Q2 | I2 | Q1 | I1 | Q0 | I0 | +// +-------+-------+-------+-------+-------+-------+-------+-------+ +// +// Each 4-bit I field is either 0,1,2,3 +// Each 4-bit Q field is either 0,1,2,3 or 0xf (input is const zero) +// All Q's must be 0xf or none of them may be 0xf +// +// +// Hardware mux value: +// +// 3 2 1 +// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +// +-----------------------+-------+-------+-------+-------+-+-----+ +// | must be zero | Q3| I3| Q2| I2| Q1| I1| Q0| I0|Z| NCH | +// +-----------------------+-------+-------+-------+-------+-+-----+ + + +static bool +map_sw_mux_to_hw_mux (int sw_mux, int *hw_mux_ptr) +{ + // confirm that all I's are either 0,1,2,3 + + for (int i = 0; i < 8; i += 2){ + int t = (sw_mux >> (4 * i)) & 0xf; + if (!(0 <= t && t <= 3)) + return false; + } + + // confirm that all Q's are either 0,1,2,3 or 0xf + + for (int i = 1; i < 8; i += 2){ + int t = (sw_mux >> (4 * i)) & 0xf; + if (!(t == 0xf || (0 <= t && t <= 3))) + return false; + } + + // confirm that all Q inputs are 0xf (const zero input), + // or none of them are 0xf + + int q_and = 1; + int q_or = 0; + + for (int i = 0; i < 4; i++){ + int qx_is_0xf = ((sw_mux >> (8 * i + 4)) & 0xf) == 0xf; + q_and &= qx_is_0xf; + q_or |= qx_is_0xf; + } + + if (q_and || !q_or){ // OK + int hw_mux_value = 0; + + for (int i = 0; i < 8; i++){ + int t = (sw_mux >> (4 * i)) & 0x3; + hw_mux_value |= t << (2 * i + 4); + } + + if (q_and) + hw_mux_value |= 0x8; // all Q's zero + + *hw_mux_ptr = hw_mux_value; + return true; + } + else + return false; +} + +bool +usrp_standard_rx::set_mux (int mux) +{ + if (!map_sw_mux_to_hw_mux (mux, &d_hw_mux)) + return false; + + // fprintf (stderr, "sw_mux = 0x%08x hw_mux = 0x%08x\n", mux, d_hw_mux); + + d_sw_mux = mux; + return write_hw_mux_reg (); +} + +bool +usrp_standard_rx::write_hw_mux_reg () +{ + bool s = disable_rx (); + bool ok = _write_fpga_reg (FR_RX_MUX, d_hw_mux | d_nchan); + restore_rx (s); + return ok; +} + + +bool +usrp_standard_rx::set_rx_freq (int channel, double freq) +{ + if (channel < 0 || channel > MAX_CHAN) + return false; + + unsigned int v = + compute_freq_control_word_fpga (adc_freq(), + freq, &d_rx_freq[channel], + d_verbose); + + return _write_fpga_reg (FR_RX_FREQ_0 + channel, v); +} + +unsigned int +usrp_standard_rx::decim_rate () const { return d_decim_rate; } + +int +usrp_standard_rx::nchannels () const { return d_nchan; } + +int +usrp_standard_rx::mux () const { return d_sw_mux; } + +double +usrp_standard_rx::rx_freq (int channel) const +{ + if (channel < 0 || channel >= MAX_CHAN) + return 0; + + return d_rx_freq[channel]; +} + +bool +usrp_standard_rx::set_fpga_mode (int mode) +{ + return _write_fpga_reg (FR_MODE, mode); +} + +bool +usrp_standard_rx::set_ddc_phase(int channel, int phase) +{ + if (channel < 0 || channel >= MAX_CHAN) + return false; + + return _write_fpga_reg(FR_RX_PHASE_0 + channel, phase); +} + + +// To avoid quiet failures, check for things that our code cares about. + +static bool +rx_format_is_valid(unsigned int format) +{ + int width = usrp_standard_rx::format_width(format); + int want_q = usrp_standard_rx::format_want_q(format); + + if (!(width == 8 || width == 16)) // FIXME add other widths when valid + return false; + + if (!want_q) // FIXME remove check when the rest of the code can handle I only + return false; + + return true; +} + +bool +usrp_standard_rx::set_format(unsigned int format) +{ + if (!rx_format_is_valid(format)) + return false; + + return _write_fpga_reg(FR_RX_FORMAT, format); +} + +unsigned int +usrp_standard_rx::format() const +{ + return d_fpga_shadows[FR_RX_FORMAT]; +} + +// ---------------------------------------------------------------- + +unsigned int +usrp_standard_rx::make_format(int width, int shift, bool want_q, bool bypass_halfband) +{ + unsigned int format = + (((width << bmFR_RX_FORMAT_WIDTH_SHIFT) & bmFR_RX_FORMAT_WIDTH_MASK) + | (shift << bmFR_RX_FORMAT_SHIFT_SHIFT) & bmFR_RX_FORMAT_SHIFT_MASK); + + if (want_q) + format |= bmFR_RX_FORMAT_WANT_Q; + if (bypass_halfband) + format |= bmFR_RX_FORMAT_BYPASS_HB; + + return format; +} + +int +usrp_standard_rx::format_width(unsigned int format) +{ + return (format & bmFR_RX_FORMAT_WIDTH_MASK) >> bmFR_RX_FORMAT_WIDTH_SHIFT; +} + +int +usrp_standard_rx::format_shift(unsigned int format) +{ + return (format & bmFR_RX_FORMAT_SHIFT_MASK) >> bmFR_RX_FORMAT_SHIFT_SHIFT; +} + +bool +usrp_standard_rx::format_want_q(unsigned int format) +{ + return (format & bmFR_RX_FORMAT_WANT_Q) != 0; +} + +bool +usrp_standard_rx::format_bypass_halfband(unsigned int format) +{ + return (format & bmFR_RX_FORMAT_BYPASS_HB) != 0; +} + +////////////////////////////////////////////////////////////////// + + +// tx data is timed to CLKOUT1 (64 MHz) +// interpolate 4x +// fine modulator enabled + + +static unsigned char tx_regs_use_nco[] = { + REG_TX_IF, (TX_IF_USE_CLKOUT1 + | TX_IF_I_FIRST + | TX_IF_2S_COMP + | TX_IF_INTERLEAVED), + REG_TX_DIGITAL, (TX_DIGITAL_2_DATA_PATHS + | TX_DIGITAL_INTERPOLATE_4X) +}; + + +static int +real_tx_mux_value (int mux, int nchan) +{ + if (mux != -1) + return mux; + + switch (nchan){ + case 1: + return 0x0098; + case 2: + return 0xba98; + default: + assert (0); + } +} + +usrp_standard_tx::usrp_standard_tx (int which_board, + unsigned int interp_rate, + int nchan, int mux, + int fusb_block_size, int fusb_nblocks, + const std::string fpga_filename, + const std::string firmware_filename + ) + : usrp_basic_tx (which_board, fusb_block_size, fusb_nblocks, fpga_filename, firmware_filename), + usrp_standard_common(this), + d_sw_mux (0x8), d_hw_mux (0x81) +{ + if (!usrp_9862_write_many_all (d_udh, tx_regs_use_nco, sizeof (tx_regs_use_nco))){ + fprintf (stderr, "usrp_standard_tx: failed to init AD9862 TX regs\n"); + throw std::runtime_error ("usrp_standard_tx::ctor"); + } + if (!set_nchannels (nchan)){ + fprintf (stderr, "usrp_standard_tx: set_nchannels failed\n"); + throw std::runtime_error ("usrp_standard_tx::ctor"); + } + if (!set_interp_rate (interp_rate)){ + fprintf (stderr, "usrp_standard_tx: set_interp_rate failed\n"); + throw std::runtime_error ("usrp_standard_tx::ctor"); + } + if (!set_mux (real_tx_mux_value (mux, nchan))){ + fprintf (stderr, "usrp_standard_tx: set_mux failed\n"); + throw std::runtime_error ("usrp_standard_tx::ctor"); + } + + for (int i = 0; i < MAX_CHAN; i++){ + d_tx_modulator_shadow[i] = (TX_MODULATOR_DISABLE_NCO + | TX_MODULATOR_COARSE_MODULATION_NONE); + d_coarse_mod[i] = CM_OFF; + set_tx_freq (i, 0); + } +} + +usrp_standard_tx::~usrp_standard_tx () +{ + // fprintf(stderr, "\nusrp_standard_tx: dtor\n"); +} + +bool +usrp_standard_tx::start () +{ + if (!usrp_basic_tx::start ()) + return false; + + // add our code here + + return true; +} + +bool +usrp_standard_tx::stop () +{ + bool ok = usrp_basic_tx::stop (); + + // add our code here + + return ok; +} + +usrp_standard_tx * +usrp_standard_tx::make (int which_board, + unsigned int interp_rate, + int nchan, int mux, + int fusb_block_size, int fusb_nblocks, + const std::string fpga_filename, + const std::string firmware_filename + ) +{ + usrp_standard_tx *u = 0; + + try { + u = new usrp_standard_tx (which_board, interp_rate, nchan, mux, + fusb_block_size, fusb_nblocks, + fpga_filename, firmware_filename); + return u; + } + catch (...){ + delete u; + return 0; + } + + return u; +} + +bool +usrp_standard_tx::set_interp_rate (unsigned int rate) +{ + // fprintf (stderr, "usrp_standard_tx::set_interp_rate\n"); + + if ((rate & 0x3) || rate < 4 || rate > 512){ + fprintf (stderr, "usrp_standard_tx::set_interp_rate: rate must be in [4, 512] and a multiple of 4.\n"); + return false; + } + + d_interp_rate = rate; + set_usb_data_rate ((dac_rate () / rate * nchannels ()) + * (2 * sizeof (short))); + + // We're using the interp by 4 feature of the 9862 so that we can + // use its fine modulator. Thus, we reduce the FPGA's interpolation rate + // by a factor of 4. + + bool s = disable_tx (); + bool ok = _write_fpga_reg (FR_INTERP_RATE, d_interp_rate/4 - 1); + restore_tx (s); + return ok; +} + +bool +usrp_standard_tx::set_nchannels (int nchan) +{ + if (!(nchan == 1 || nchan == 2)) + return false; + + if (nchan > nducs()) + return false; + + d_nchan = nchan; + return write_hw_mux_reg (); +} + +bool +usrp_standard_tx::set_mux (int mux) +{ + d_sw_mux = mux; + d_hw_mux = mux << 4; + return write_hw_mux_reg (); +} + +bool +usrp_standard_tx::write_hw_mux_reg () +{ + bool s = disable_tx (); + bool ok = _write_fpga_reg (FR_TX_MUX, d_hw_mux | d_nchan); + restore_tx (s); + return ok; +} + +#ifdef USE_FPGA_TX_CORDIC + +bool +usrp_standard_tx::set_tx_freq (int channel, double freq) +{ + if (channel < 0 || channel >= MAX_CHAN) + return false; + + // This assumes we're running the 4x on-chip interpolator. + + unsigned int v = + compute_freq_control_word_fpga (dac_freq () / 4, + freq, &d_tx_freq[channel], + d_verbose); + + return _write_fpga_reg (FR_TX_FREQ_0 + channel, v); +} + + +#else + +bool +usrp_standard_tx::set_tx_freq (int channel, double freq) +{ + if (channel < 0 || channel >= MAX_CHAN) + return false; + + // split freq into fine and coarse components + + coarse_mod_t cm; + double coarse; + + assert (dac_freq () == 128000000); + + if (freq < -44e6) // too low + return false; + else if (freq < -24e6){ // [-44, -24) + cm = CM_NEG_FDAC_OVER_4; + coarse = -dac_freq () / 4; + } + else if (freq < -8e6){ // [-24, -8) + cm = CM_NEG_FDAC_OVER_8; + coarse = -dac_freq () / 8; + } + else if (freq < 8e6){ // [-8, 8) + cm = CM_OFF; + coarse = 0; + } + else if (freq < 24e6){ // [8, 24) + cm = CM_POS_FDAC_OVER_8; + coarse = dac_freq () / 8; + } + else if (freq <= 44e6){ // [24, 44] + cm = CM_POS_FDAC_OVER_4; + coarse = dac_freq () / 4; + } + else // too high + return false; + + + set_coarse_modulator (channel, cm); // set bits in d_tx_modulator_shadow + + double fine = freq - coarse; + + + // Compute fine tuning word... + // This assumes we're running the 4x on-chip interpolator. + // (This is required to use the fine modulator.) + + unsigned int v = + compute_freq_control_word_9862 (dac_freq () / 4, + fine, &d_tx_freq[channel], d_verbose); + + d_tx_freq[channel] += coarse; // adjust actual + + unsigned char high, mid, low; + + high = (v >> 16) & 0xff; + mid = (v >> 8) & 0xff; + low = (v >> 0) & 0xff; + + bool ok = true; + + // write the fine tuning word + ok &= _write_9862 (channel, REG_TX_NCO_FTW_23_16, high); + ok &= _write_9862 (channel, REG_TX_NCO_FTW_15_8, mid); + ok &= _write_9862 (channel, REG_TX_NCO_FTW_7_0, low); + + + d_tx_modulator_shadow[channel] |= TX_MODULATOR_ENABLE_NCO; + + if (fine < 0) + d_tx_modulator_shadow[channel] |= TX_MODULATOR_NEG_FINE_TUNE; + else + d_tx_modulator_shadow[channel] &= ~TX_MODULATOR_NEG_FINE_TUNE; + + ok &=_write_9862 (channel, REG_TX_MODULATOR, d_tx_modulator_shadow[channel]); + + return ok; +} +#endif + +bool +usrp_standard_tx::set_coarse_modulator (int channel, coarse_mod_t cm) +{ + if (channel < 0 || channel >= MAX_CHAN) + return false; + + switch (cm){ + case CM_NEG_FDAC_OVER_4: + d_tx_modulator_shadow[channel] &= ~TX_MODULATOR_CM_MASK; + d_tx_modulator_shadow[channel] |= TX_MODULATOR_COARSE_MODULATION_F_OVER_4; + d_tx_modulator_shadow[channel] |= TX_MODULATOR_NEG_COARSE_TUNE; + break; + + case CM_NEG_FDAC_OVER_8: + d_tx_modulator_shadow[channel] &= ~TX_MODULATOR_CM_MASK; + d_tx_modulator_shadow[channel] |= TX_MODULATOR_COARSE_MODULATION_F_OVER_8; + d_tx_modulator_shadow[channel] |= TX_MODULATOR_NEG_COARSE_TUNE; + break; + + case CM_OFF: + d_tx_modulator_shadow[channel] &= ~TX_MODULATOR_CM_MASK; + break; + + case CM_POS_FDAC_OVER_8: + d_tx_modulator_shadow[channel] &= ~TX_MODULATOR_CM_MASK; + d_tx_modulator_shadow[channel] |= TX_MODULATOR_COARSE_MODULATION_F_OVER_8; + break; + + case CM_POS_FDAC_OVER_4: + d_tx_modulator_shadow[channel] &= ~TX_MODULATOR_CM_MASK; + d_tx_modulator_shadow[channel] |= TX_MODULATOR_COARSE_MODULATION_F_OVER_4; + break; + + default: + return false; + } + + d_coarse_mod[channel] = cm; + return true; +} + +unsigned int +usrp_standard_tx::interp_rate () const { return d_interp_rate; } + +int +usrp_standard_tx::nchannels () const { return d_nchan; } + +int +usrp_standard_tx::mux () const { return d_sw_mux; } + +double +usrp_standard_tx::tx_freq (int channel) const +{ + if (channel < 0 || channel >= MAX_CHAN) + return 0; + + return d_tx_freq[channel]; +} + +usrp_standard_tx::coarse_mod_t +usrp_standard_tx::coarse_modulator (int channel) const +{ + if (channel < 0 || channel >= MAX_CHAN) + return CM_OFF; + + return d_coarse_mod[channel]; +} diff --git a/host/lib/usrp_standard.h b/host/lib/usrp_standard.h new file mode 100644 index 0000000..9f468a6 --- /dev/null +++ b/host/lib/usrp_standard.h @@ -0,0 +1,366 @@ +/* -*- c++ -*- */ +/* + * Copyright 2004 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#ifndef INCLUDED_USRP_STANDARD_H +#define INCLUDED_USRP_STANDARD_H + +#include + +class usrp_standard_common +{ + int d_fpga_caps; // capability register val + +protected: + usrp_standard_common(usrp_basic *parent); + +public: + /*! + *\brief does the FPGA implement the final Rx half-band filter? + * If it doesn't, the maximum decimation factor with proper gain + * is 1/2 of what it would otherwise be. + */ + bool has_rx_halfband() const; + + /*! + * \brief number of digital downconverters implemented in the FPGA + * This will be 0, 1, 2 or 4. + */ + int nddcs() const; + + /*! + *\brief does the FPGA implement the initial Tx half-band filter? + */ + bool has_tx_halfband() const; + + /*! + * \brief number of digital upconverters implemented in the FPGA + * This will be 0, 1, or 2. + */ + int nducs() const; +}; + +/*! + * \brief standard usrp RX class. + * + * Assumes digital down converter in FPGA + */ +class usrp_standard_rx : public usrp_basic_rx, usrp_standard_common +{ + private: + static const int MAX_CHAN = 4; + unsigned int d_decim_rate; + int d_nchan; + int d_sw_mux; + int d_hw_mux; + double d_rx_freq[MAX_CHAN]; + + protected: + usrp_standard_rx (int which_board, + unsigned int decim_rate, + int nchan = 1, + int mux = -1, + int mode = 0, + int fusb_block_size = 0, + int fusb_nblocks = 0, + const std::string fpga_filename = "", + const std::string firmware_filename = "" + ); // throws if trouble + + bool write_hw_mux_reg (); + + public: + + enum { + FPGA_MODE_NORMAL = 0x00, + FPGA_MODE_LOOPBACK = 0x01, + FPGA_MODE_COUNTING = 0x02, + FPGA_MODE_COUNTING_32BIT = 0x04 + }; + + ~usrp_standard_rx (); + + /*! + * \brief invokes constructor, returns instance or 0 if trouble + * + * \param which_board Which USRP board on usb (not particularly useful; use 0) + * \param fusb_block_size fast usb xfer block size. Must be a multiple of 512. + * Use zero for a reasonable default. + * \param fusb_nblocks number of fast usb URBs to allocate. Use zero for a reasonable default. + */ + static usrp_standard_rx *make (int which_board, + unsigned int decim_rate, + int nchan = 1, + int mux = -1, + int mode = 0, + int fusb_block_size = 0, + int fusb_nblocks = 0, + const std::string fpga_filename = "", + const std::string firmware_filename = "" + ); + /*! + * \brief Set decimator rate. \p rate MUST BE EVEN and in [8, 256]. + * + * The final complex sample rate across the USB is + * adc_freq () / decim_rate () * nchannels () + */ + bool set_decim_rate (unsigned int rate); + + /*! + * \brief Set number of active channels. \p nchannels must be 1, 2 or 4. + * + * The final complex sample rate across the USB is + * adc_freq () / decim_rate () * nchannels () + */ + bool set_nchannels (int nchannels); + + /*! + * \brief Set input mux configuration. + * + * This determines which ADC (or constant zero) is connected to + * each DDC input. There are 4 DDCs. Each has two inputs. + * + * 
      +   * Mux value:
+   *
+   *    3                   2                   1                       
+   *  1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+   * +-------+-------+-------+-------+-------+-------+-------+-------+
+   * |   Q3  |   I3  |   Q2  |   I2  |   Q1  |   I1  |   Q0  |   I0  |
+   * +-------+-------+-------+-------+-------+-------+-------+-------+
+   *
+   * Each 4-bit I field is either 0,1,2,3
+   * Each 4-bit Q field is either 0,1,2,3 or 0xf (input is const zero)
+   * All Q's must be 0xf or none of them may be 0xf
+   *
      + */ + bool set_mux (int mux); + + /*! + * \brief set the frequency of the digital down converter. + * + * \p channel must be in the range [0,3]. \p freq is the center + * frequency in Hz. \p freq may be either negative or postive. + * The frequency specified is quantized. Use rx_freq to retrieve + * the actual value used. + */ + bool set_rx_freq (int channel, double freq); + + /*! + * \brief set fpga mode + */ + bool set_fpga_mode (int mode); + + /*! + * \brief Set the digital down converter phase register. + * + * \param channel which ddc channel [0, 3] + * \param phase 32-bit integer phase value. + */ + bool set_ddc_phase(int channel, int phase); + + /*! + * \brief Specify Rx data format. + * + * \param format format specifier + * + * Rx data format control register + * + * 3 2 1 + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------------------------------------+-+-+---------+-------+ + * | Reserved (Must be zero) |B|Q| WIDTH | SHIFT | + * +-----------------------------------------+-+-+---------+-------+ + * + * SHIFT specifies arithmetic right shift [0, 15] + * WIDTH specifies bit-width of I & Q samples across the USB [1, 16] (not all valid) + * Q if set deliver both I & Q, else just I + * B if set bypass half-band filter. + * + * Right now the acceptable values are: + * + * B Q WIDTH SHIFT + * 0 1 16 0 + * 0 1 8 8 + * + * More valid combos to come. + * + * Default value is 0x00000300 16-bits, 0 shift, deliver both I & Q. + */ + bool set_format(unsigned int format); + + static unsigned int make_format(int width=16, int shift=0, + bool want_q=true, bool bypass_halfband=false); + static int format_width(unsigned int format); + static int format_shift(unsigned int format); + static bool format_want_q(unsigned int format); + static bool format_bypass_halfband(unsigned int format); + + // ACCESSORS + unsigned int decim_rate () const; + double rx_freq (int channel) const; + int nchannels () const; + int mux () const; + unsigned int format () const; + + // called in base class to derived class order + bool start (); + bool stop (); +}; + +// ---------------------------------------------------------------- + +/*! + * \brief standard usrp TX class. + * + * Uses digital upconverter (coarse & fine modulators) in AD9862... + */ +class usrp_standard_tx : public usrp_basic_tx, usrp_standard_common +{ + public: + enum coarse_mod_t { + CM_NEG_FDAC_OVER_4, // -32 MHz + CM_NEG_FDAC_OVER_8, // -16 MHz + CM_OFF, + CM_POS_FDAC_OVER_8, // +16 MHz + CM_POS_FDAC_OVER_4 // +32 MHz + }; + + protected: + static const int MAX_CHAN = 2; + unsigned int d_interp_rate; + int d_nchan; + int d_sw_mux; + int d_hw_mux; + double d_tx_freq[MAX_CHAN]; + coarse_mod_t d_coarse_mod[MAX_CHAN]; + unsigned char d_tx_modulator_shadow[MAX_CHAN]; + + virtual bool set_coarse_modulator (int channel, coarse_mod_t cm); + usrp_standard_tx::coarse_mod_t coarse_modulator (int channel) const; + + protected: + usrp_standard_tx (int which_board, + unsigned int interp_rate, + int nchan = 1, + int mux = -1, + int fusb_block_size = 0, + int fusb_nblocks = 0, + const std::string fpga_filename = "", + const std::string firmware_filename = "" + ); // throws if trouble + + bool write_hw_mux_reg (); + + public: + ~usrp_standard_tx (); + + /*! + * \brief invokes constructor, returns instance or 0 if trouble + * + * \param which_board Which USRP board on usb (not particularly useful; use 0) + * \param fusb_block_size fast usb xfer block size. Must be a multiple of 512. + * Use zero for a reasonable default. + * \param fusb_nblocks number of fast usb URBs to allocate. Use zero for a reasonable default. + */ + static usrp_standard_tx *make (int which_board, + unsigned int interp_rate, + int nchan = 1, + int mux = -1, + int fusb_block_size = 0, + int fusb_nblocks = 0, + const std::string fpga_filename = "", + const std::string firmware_filename = "" + ); + + /*! + * \brief Set interpolator rate. \p rate must be in [4, 512] and a multiple of 4. + * + * The final complex sample rate across the USB is + * dac_freq () / interp_rate () * nchannels () + */ + virtual bool set_interp_rate (unsigned int rate); + + /*! + * \brief Set number of active channels. \p nchannels must be 1 or 2. + * + * The final complex sample rate across the USB is + * dac_freq () / decim_rate () * nchannels () + */ + bool set_nchannels (int nchannels); + + /*! + * \brief Set output mux configuration. + * + * 
      +   *     3                   2                   1                       
+   *   1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+   *  +-------------------------------+-------+-------+-------+-------+
+   *  |                               | DAC3  | DAC2  | DAC1  |  DAC0 |
+   *  +-------------------------------+-------+-------+-------+-------+
+   * 
+   *  There are two interpolators with complex inputs and outputs.
+   *  There are four DACs.
+   * 
+   *  Each 4-bit DACx field specifies the source for the DAC and
+   *  whether or not that DAC is enabled.  Each subfield is coded
+   *  like this: 
+   * 
+   *     3 2 1 0
+   *    +-+-----+
+   *    |E|  N  |
+   *    +-+-----+
+   * 
+   *  Where E is set if the DAC is enabled, and N specifies which
+   *  interpolator output is connected to this DAC.
+   * 
+   *   N   which interp output
+   *  ---  -------------------
+   *   0   chan 0 I
+   *   1   chan 0 Q
+   *   2   chan 1 I
+   *   3   chan 1 Q
+   *
      + */ + bool set_mux (int mux); + + /*! + * \brief set the frequency of the digital up converter. + * + * \p channel must be in the range [0,1]. \p freq is the center + * frequency in Hz. It must be in the range [-44M, 44M]. + * The frequency specified is quantized. Use tx_freq to retrieve + * the actual value used. + */ + virtual bool set_tx_freq (int channel, double freq); // chan: [0,1] + + // ACCESSORS + unsigned int interp_rate () const; + double tx_freq (int channel) const; + int nchannels () const; + int mux () const; + + // called in base class to derived class order + bool start (); + bool stop (); +}; + +#endif /* INCLUDED_USRP_STANDARD_H */ diff --git a/host/misc/Makefile.am b/host/misc/Makefile.am new file mode 100644 index 0000000..08826a0 --- /dev/null +++ b/host/misc/Makefile.am @@ -0,0 +1,31 @@ +# +# Copyright 2003,2004 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +EXTRA_DIST = \ + getopt.c getopt.h \ + gettimeofday.c \ + tempname.c mkstemp.c \ + usleep.c + +noinst_LTLIBRARIES = libmisc.la + +libmisc_la_SOURCES = bug_work_around_8.cc +libmisc_la_LIBADD = @LTLIBOBJS@ diff --git a/host/misc/bug_work_around_8.cc b/host/misc/bug_work_around_8.cc new file mode 100644 index 0000000..4194324 --- /dev/null +++ b/host/misc/bug_work_around_8.cc @@ -0,0 +1,2 @@ +// if libmisc has no sources, it doesn't get built correctly +int gr_bug_work_around_8; diff --git a/host/misc/getopt.c b/host/misc/getopt.c new file mode 100644 index 0000000..93fb6ea --- /dev/null +++ b/host/misc/getopt.c @@ -0,0 +1,733 @@ +/* Getopt for GNU. + NOTE: getopt is now part of the C library, so if you don't know what + "Keep this file name-space clean" means, talk to roland@gnu.ai.mit.edu + before changing it! + + Copyright (C) 1987, 88, 89, 90, 91, 92, 1993 + Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ + +/* NOTE!!! AIX requires this to be the first thing in the file. + Do not put ANYTHING before it! */ +#if !defined (__GNUC__) && defined (_AIX) + #pragma alloca +#endif + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#ifdef __GNUC__ +#define alloca __builtin_alloca +#else /* not __GNUC__ */ +#if defined (HAVE_ALLOCA_H) || (defined(sparc) && (defined(sun) || (!defined(USG) && !defined(SVR4) && !defined(__svr4__)))) +#include +#else +#ifndef _AIX +char *alloca (); +#endif +#endif /* alloca.h */ +#endif /* not __GNUC__ */ + +#if !__STDC__ && !defined(const) && IN_GCC +#define const +#endif + +/* This tells Alpha OSF/1 not to define a getopt prototype in . */ +#ifndef _NO_PROTO +#define _NO_PROTO +#endif + +#include + +/* Comment out all this code if we are using the GNU C Library, and are not + actually compiling the library itself. This code is part of the GNU C + Library, but also included in many other GNU distributions. Compiling + and linking in this code is a waste when using the GNU C library + (especially if it is a shared library). Rather than having every GNU + program understand `configure --with-gnu-libc' and omit the object files, + it is simpler to just do this in the source for each such file. */ + +#if defined (_LIBC) || !defined (__GNU_LIBRARY__) + + +/* This needs to come after some library #include + to get __GNU_LIBRARY__ defined. */ +#ifdef __GNU_LIBRARY__ +#undef alloca +/* Don't include stdlib.h for non-GNU C libraries because some of them + contain conflicting prototypes for getopt. */ +#include +#else /* Not GNU C library. */ +#define __alloca alloca +#endif /* GNU C library. */ + +/* If GETOPT_COMPAT is defined, `+' as well as `--' can introduce a + long-named option. Because this is not POSIX.2 compliant, it is + being phased out. */ +/* #define GETOPT_COMPAT */ + +/* This version of `getopt' appears to the caller like standard Unix `getopt' + but it behaves differently for the user, since it allows the user + to intersperse the options with the other arguments. + + As `getopt' works, it permutes the elements of ARGV so that, + when it is done, all the options precede everything else. Thus + all application programs are extended to handle flexible argument order. + + Setting the environment variable POSIXLY_CORRECT disables permutation. + Then the behavior is completely standard. + + GNU application programs can use a third alternative mode in which + they can distinguish the relative order of options and other arguments. */ + +#include "getopt.h" + +/* For communication from `getopt' to the caller. + When `getopt' finds an option that takes an argument, + the argument value is returned here. + Also, when `ordering' is RETURN_IN_ORDER, + each non-option ARGV-element is returned here. */ + +char *optarg = 0; + +/* Index in ARGV of the next element to be scanned. + This is used for communication to and from the caller + and for communication between successive calls to `getopt'. + + On entry to `getopt', zero means this is the first call; initialize. + + When `getopt' returns EOF, this is the index of the first of the + non-option elements that the caller should itself scan. + + Otherwise, `optind' communicates from one call to the next + how much of ARGV has been scanned so far. */ + +/* XXX 1003.2 says this must be 1 before any call. */ +int optind = 0; + +/* The next char to be scanned in the option-element + in which the last option character we returned was found. + This allows us to pick up the scan where we left off. + + If this is zero, or a null string, it means resume the scan + by advancing to the next ARGV-element. */ + +static char *nextchar; + +/* Callers store zero here to inhibit the error message + for unrecognized options. */ + +int opterr = 1; + +/* Set to an option character which was unrecognized. + This must be initialized on some systems to avoid linking in the + system's own getopt implementation. */ + +int optopt = '?'; + +/* Describe how to deal with options that follow non-option ARGV-elements. + + If the caller did not specify anything, + the default is REQUIRE_ORDER if the environment variable + POSIXLY_CORRECT is defined, PERMUTE otherwise. + + REQUIRE_ORDER means don't recognize them as options; + stop option processing when the first non-option is seen. + This is what Unix does. + This mode of operation is selected by either setting the environment + variable POSIXLY_CORRECT, or using `+' as the first character + of the list of option characters. + + PERMUTE is the default. We permute the contents of ARGV as we scan, + so that eventually all the non-options are at the end. This allows options + to be given in any order, even with programs that were not written to + expect this. + + RETURN_IN_ORDER is an option available to programs that were written + to expect options and other ARGV-elements in any order and that care about + the ordering of the two. We describe each non-option ARGV-element + as if it were the argument of an option with character code 1. + Using `-' as the first character of the list of option characters + selects this mode of operation. + + The special argument `--' forces an end of option-scanning regardless + of the value of `ordering'. In the case of RETURN_IN_ORDER, only + `--' can cause `getopt' to return EOF with `optind' != ARGC. */ + +static enum +{ + REQUIRE_ORDER, PERMUTE, RETURN_IN_ORDER +} ordering; + +#ifdef __GNU_LIBRARY__ +/* We want to avoid inclusion of string.h with non-GNU libraries + because there are many ways it can cause trouble. + On some systems, it contains special magic macros that don't work + in GCC. */ +#include +#define my_index strchr +#define my_bcopy(src, dst, n) memcpy ((dst), (src), (n)) +#else + +/* Avoid depending on library functions or files + whose names are inconsistent. */ + +char *getenv (); + +static char * +my_index (str, chr) + const char *str; + int chr; +{ + while (*str) + { + if (*str == chr) + return (char *) str; + str++; + } + return 0; +} + +static void +my_bcopy (from, to, size) + const char *from; + char *to; + int size; +{ + int i; + for (i = 0; i < size; i++) + to[i] = from[i]; +} +#endif /* GNU C library. */ + +/* Handle permutation of arguments. */ + +/* Describe the part of ARGV that contains non-options that have + been skipped. `first_nonopt' is the index in ARGV of the first of them; + `last_nonopt' is the index after the last of them. */ + +static int first_nonopt; +static int last_nonopt; + +/* Exchange two adjacent subsequences of ARGV. + One subsequence is elements [first_nonopt,last_nonopt) + which contains all the non-options that have been skipped so far. + The other is elements [last_nonopt,optind), which contains all + the options processed since those non-options were skipped. + + `first_nonopt' and `last_nonopt' are relocated so that they describe + the new indices of the non-options in ARGV after they are moved. */ + +static void +exchange (argv) + char **argv; +{ + int nonopts_size = (last_nonopt - first_nonopt) * sizeof (char *); + char **temp = (char **) __alloca (nonopts_size); + + /* Interchange the two blocks of data in ARGV. */ + + my_bcopy ((char *) &argv[first_nonopt], (char *) temp, nonopts_size); + my_bcopy ((char *) &argv[last_nonopt], (char *) &argv[first_nonopt], + (optind - last_nonopt) * sizeof (char *)); + my_bcopy ((char *) temp, + (char *) &argv[first_nonopt + optind - last_nonopt], + nonopts_size); + + /* Update records for the slots the non-options now occupy. */ + + first_nonopt += (optind - last_nonopt); + last_nonopt = optind; +} + +/* Scan elements of ARGV (whose length is ARGC) for option characters + given in OPTSTRING. + + If an element of ARGV starts with '-', and is not exactly "-" or "--", + then it is an option element. The characters of this element + (aside from the initial '-') are option characters. If `getopt' + is called repeatedly, it returns successively each of the option characters + from each of the option elements. + + If `getopt' finds another option character, it returns that character, + updating `optind' and `nextchar' so that the next call to `getopt' can + resume the scan with the following option character or ARGV-element. + + If there are no more option characters, `getopt' returns `EOF'. + Then `optind' is the index in ARGV of the first ARGV-element + that is not an option. (The ARGV-elements have been permuted + so that those that are not options now come last.) + + OPTSTRING is a string containing the legitimate option characters. + If an option character is seen that is not listed in OPTSTRING, + return '?' after printing an error message. If you set `opterr' to + zero, the error message is suppressed but we still return '?'. + + If a char in OPTSTRING is followed by a colon, that means it wants an arg, + so the following text in the same ARGV-element, or the text of the following + ARGV-element, is returned in `optarg'. Two colons mean an option that + wants an optional arg; if there is text in the current ARGV-element, + it is returned in `optarg', otherwise `optarg' is set to zero. + + If OPTSTRING starts with `-' or `+', it requests different methods of + handling the non-option ARGV-elements. + See the comments about RETURN_IN_ORDER and REQUIRE_ORDER, above. + + Long-named options begin with `--' instead of `-'. + Their names may be abbreviated as long as the abbreviation is unique + or is an exact match for some defined option. If they have an + argument, it follows the option name in the same ARGV-element, separated + from the option name by a `=', or else the in next ARGV-element. + When `getopt' finds a long-named option, it returns 0 if that option's + `flag' field is nonzero, the value of the option's `val' field + if the `flag' field is zero. + + The elements of ARGV aren't really const, because we permute them. + But we pretend they're const in the prototype to be compatible + with other systems. + + LONGOPTS is a vector of `struct option' terminated by an + element containing a name which is zero. + + LONGIND returns the index in LONGOPT of the long-named option found. + It is only valid when a long-named option has been found by the most + recent call. + + If LONG_ONLY is nonzero, '-' as well as '--' can introduce + long-named options. */ + +int +_getopt_internal (argc, argv, optstring, longopts, longind, long_only) + int argc; + char *const *argv; + const char *optstring; + const struct option *longopts; + int *longind; + int long_only; +{ + int option_index; + + optarg = 0; + + /* Initialize the internal data when the first call is made. + Start processing options with ARGV-element 1 (since ARGV-element 0 + is the program name); the sequence of previously skipped + non-option ARGV-elements is empty. */ + + if (optind == 0) + { + first_nonopt = last_nonopt = optind = 1; + + nextchar = NULL; + + /* Determine how to handle the ordering of options and nonoptions. */ + + if (optstring[0] == '-') + { + ordering = RETURN_IN_ORDER; + ++optstring; + } + else if (optstring[0] == '+') + { + ordering = REQUIRE_ORDER; + ++optstring; + } + else if (getenv ("POSIXLY_CORRECT") != NULL) + ordering = REQUIRE_ORDER; + else + ordering = PERMUTE; + } + + if (nextchar == NULL || *nextchar == '\0') + { + if (ordering == PERMUTE) + { + /* If we have just processed some options following some non-options, + exchange them so that the options come first. */ + + if (first_nonopt != last_nonopt && last_nonopt != optind) + exchange ((char **) argv); + else if (last_nonopt != optind) + first_nonopt = optind; + + /* Now skip any additional non-options + and extend the range of non-options previously skipped. */ + + while (optind < argc + && (argv[optind][0] != '-' || argv[optind][1] == '\0') +#ifdef GETOPT_COMPAT + && (longopts == NULL + || argv[optind][0] != '+' || argv[optind][1] == '\0') +#endif /* GETOPT_COMPAT */ + ) + optind++; + last_nonopt = optind; + } + + /* Special ARGV-element `--' means premature end of options. + Skip it like a null option, + then exchange with previous non-options as if it were an option, + then skip everything else like a non-option. */ + + if (optind != argc && !strcmp (argv[optind], "--")) + { + optind++; + + if (first_nonopt != last_nonopt && last_nonopt != optind) + exchange ((char **) argv); + else if (first_nonopt == last_nonopt) + first_nonopt = optind; + last_nonopt = argc; + + optind = argc; + } + + /* If we have done all the ARGV-elements, stop the scan + and back over any non-options that we skipped and permuted. */ + + if (optind == argc) + { + /* Set the next-arg-index to point at the non-options + that we previously skipped, so the caller will digest them. */ + if (first_nonopt != last_nonopt) + optind = first_nonopt; + return EOF; + } + + /* If we have come to a non-option and did not permute it, + either stop the scan or describe it to the caller and pass it by. */ + + if ((argv[optind][0] != '-' || argv[optind][1] == '\0') +#ifdef GETOPT_COMPAT + && (longopts == NULL + || argv[optind][0] != '+' || argv[optind][1] == '\0') +#endif /* GETOPT_COMPAT */ + ) + { + if (ordering == REQUIRE_ORDER) + return EOF; + optarg = argv[optind++]; + return 1; + } + + /* We have found another option-ARGV-element. + Start decoding its characters. */ + + nextchar = (argv[optind] + 1 + + (longopts != NULL && argv[optind][1] == '-')); + } + + if (longopts != NULL + && ((argv[optind][0] == '-' + && (argv[optind][1] == '-' || long_only)) +#ifdef GETOPT_COMPAT + || argv[optind][0] == '+' +#endif /* GETOPT_COMPAT */ + )) + { + const struct option *p; + char *s = nextchar; + int exact = 0; + int ambig = 0; + const struct option *pfound = NULL; + int indfound; + + while (*s && *s != '=') + s++; + + /* Test all options for either exact match or abbreviated matches. */ + for (p = longopts, option_index = 0; p->name; + p++, option_index++) + if (!strncmp (p->name, nextchar, s - nextchar)) + { + if (s - nextchar == strlen (p->name)) + { + /* Exact match found. */ + pfound = p; + indfound = option_index; + exact = 1; + break; + } + else if (pfound == NULL) + { + /* First nonexact match found. */ + pfound = p; + indfound = option_index; + } + else + /* Second nonexact match found. */ + ambig = 1; + } + + if (ambig && !exact) + { + if (opterr) + fprintf (stderr, "%s: option `%s' is ambiguous\n", + argv[0], argv[optind]); + nextchar += strlen (nextchar); + optind++; + return '?'; + } + + if (pfound != NULL) + { + option_index = indfound; + optind++; + if (*s) + { + /* Don't test has_arg with >, because some C compilers don't + allow it to be used on enums. */ + if (pfound->has_arg) + optarg = s + 1; + else + { + if (opterr) + { + if (argv[optind - 1][1] == '-') + /* --option */ + fprintf (stderr, + "%s: option `--%s' doesn't allow an argument\n", + argv[0], pfound->name); + else + /* +option or -option */ + fprintf (stderr, + "%s: option `%c%s' doesn't allow an argument\n", + argv[0], argv[optind - 1][0], pfound->name); + } + nextchar += strlen (nextchar); + return '?'; + } + } + else if (pfound->has_arg == 1) + { + if (optind < argc) + optarg = argv[optind++]; + else + { + if (opterr) + fprintf (stderr, "%s: option `%s' requires an argument\n", + argv[0], argv[optind - 1]); + nextchar += strlen (nextchar); + return optstring[0] == ':' ? ':' : '?'; + } + } + nextchar += strlen (nextchar); + if (longind != NULL) + *longind = option_index; + if (pfound->flag) + { + *(pfound->flag) = pfound->val; + return 0; + } + return pfound->val; + } + /* Can't find it as a long option. If this is not getopt_long_only, + or the option starts with '--' or is not a valid short + option, then it's an error. + Otherwise interpret it as a short option. */ + if (!long_only || argv[optind][1] == '-' +#ifdef GETOPT_COMPAT + || argv[optind][0] == '+' +#endif /* GETOPT_COMPAT */ + || my_index (optstring, *nextchar) == NULL) + { + if (opterr) + { + if (argv[optind][1] == '-') + /* --option */ + fprintf (stderr, "%s: unrecognized option `--%s'\n", + argv[0], nextchar); + else + /* +option or -option */ + fprintf (stderr, "%s: unrecognized option `%c%s'\n", + argv[0], argv[optind][0], nextchar); + } + nextchar = (char *) ""; + optind++; + return '?'; + } + } + + /* Look at and handle the next option-character. */ + + { + char c = *nextchar++; + char *temp = my_index (optstring, c); + + /* Increment `optind' when we start to process its last character. */ + if (*nextchar == '\0') + ++optind; + + if (temp == NULL || c == ':') + { + if (opterr) + { +#if 0 + if (c < 040 || c >= 0177) + fprintf (stderr, "%s: unrecognized option, character code 0%o\n", + argv[0], c); + else + fprintf (stderr, "%s: unrecognized option `-%c'\n", argv[0], c); +#else + /* 1003.2 specifies the format of this message. */ + fprintf (stderr, "%s: illegal option -- %c\n", argv[0], c); +#endif + } + optopt = c; + return '?'; + } + if (temp[1] == ':') + { + if (temp[2] == ':') + { + /* This is an option that accepts an argument optionally. */ + if (*nextchar != '\0') + { + optarg = nextchar; + optind++; + } + else + optarg = 0; + nextchar = NULL; + } + else + { + /* This is an option that requires an argument. */ + if (*nextchar != '\0') + { + optarg = nextchar; + /* If we end this ARGV-element by taking the rest as an arg, + we must advance to the next element now. */ + optind++; + } + else if (optind == argc) + { + if (opterr) + { +#if 0 + fprintf (stderr, "%s: option `-%c' requires an argument\n", + argv[0], c); +#else + /* 1003.2 specifies the format of this message. */ + fprintf (stderr, "%s: option requires an argument -- %c\n", + argv[0], c); +#endif + } + optopt = c; + if (optstring[0] == ':') + c = ':'; + else + c = '?'; + } + else + /* We already incremented `optind' once; + increment it again when taking next ARGV-elt as argument. */ + optarg = argv[optind++]; + nextchar = NULL; + } + } + return c; + } +} + +#ifdef GETOPT +int +getopt (argc, argv, optstring) + int argc; + char *const *argv; + const char *optstring; +{ + return _getopt_internal (argc, argv, optstring, + (const struct option *) 0, + (int *) 0, + 0); +} +#endif + +#endif /* _LIBC or not __GNU_LIBRARY__. */ + +#ifdef TEST + +/* Compile with -DTEST to make an executable for use in testing + the above definition of `getopt'. */ + +int +main (argc, argv) + int argc; + char **argv; +{ + int c; + int digit_optind = 0; + + while (1) + { + int this_option_optind = optind ? optind : 1; + + c = getopt (argc, argv, "abc:d:0123456789"); + if (c == EOF) + break; + + switch (c) + { + case '0': + case '1': + case '2': + case '3': + case '4': + case '5': + case '6': + case '7': + case '8': + case '9': + if (digit_optind != 0 && digit_optind != this_option_optind) + printf ("digits occur in two different argv-elements.\n"); + digit_optind = this_option_optind; + printf ("option %c\n", c); + break; + + case 'a': + printf ("option a\n"); + break; + + case 'b': + printf ("option b\n"); + break; + + case 'c': + printf ("option c with value `%s'\n", optarg); + break; + + case '?': + break; + + default: + printf ("?? getopt returned character code 0%o ??\n", c); + } + } + + if (optind < argc) + { + printf ("non-option ARGV-elements: "); + while (optind < argc) + printf ("%s ", argv[optind++]); + printf ("\n"); + } + + exit (0); +} + +#endif /* TEST */ diff --git a/host/misc/getopt.h b/host/misc/getopt.h new file mode 100644 index 0000000..45541f5 --- /dev/null +++ b/host/misc/getopt.h @@ -0,0 +1,129 @@ +/* Declarations for getopt. + Copyright (C) 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ + +#ifndef _GETOPT_H +#define _GETOPT_H 1 + +#ifdef __cplusplus +extern "C" { +#endif + +/* For communication from `getopt' to the caller. + When `getopt' finds an option that takes an argument, + the argument value is returned here. + Also, when `ordering' is RETURN_IN_ORDER, + each non-option ARGV-element is returned here. */ + +extern char *optarg; + +/* Index in ARGV of the next element to be scanned. + This is used for communication to and from the caller + and for communication between successive calls to `getopt'. + + On entry to `getopt', zero means this is the first call; initialize. + + When `getopt' returns EOF, this is the index of the first of the + non-option elements that the caller should itself scan. + + Otherwise, `optind' communicates from one call to the next + how much of ARGV has been scanned so far. */ + +extern int optind; + +/* Callers store zero here to inhibit the error message `getopt' prints + for unrecognized options. */ + +extern int opterr; + +/* Set to an option character which was unrecognized. */ + +extern int optopt; + +/* Describe the long-named options requested by the application. + The LONG_OPTIONS argument to getopt_long or getopt_long_only is a vector + of `struct option' terminated by an element containing a name which is + zero. + + The field `has_arg' is: + no_argument (or 0) if the option does not take an argument, + required_argument (or 1) if the option requires an argument, + optional_argument (or 2) if the option takes an optional argument. + + If the field `flag' is not NULL, it points to a variable that is set + to the value given in the field `val' when the option is found, but + left unchanged if the option is not found. + + To have a long-named option do something other than set an `int' to + a compiled-in constant, such as set a value from `optarg', set the + option's `flag' field to zero and its `val' field to a nonzero + value (the equivalent single-letter option character, if there is + one). For long options that have a zero `flag' field, `getopt' + returns the contents of the `val' field. */ + +struct option +{ +#if __STDC__ + const char *name; +#else + char *name; +#endif + /* has_arg can't be an enum because some compilers complain about + type mismatches in all the code that assumes it is an int. */ + int has_arg; + int *flag; + int val; +}; + +/* Names for the values of the `has_arg' field of `struct option'. */ + +#define no_argument 0 +#define required_argument 1 +#define optional_argument 2 + +#if __STDC__ +#if defined(__GNU_LIBRARY__) +/* Many other libraries have conflicting prototypes for getopt, with + differences in the consts, in stdlib.h. To avoid compilation + errors, only prototype getopt for the GNU C library. */ +extern int getopt (int argc, char *const *argv, const char *shortopts); +#else /* not __GNU_LIBRARY__ */ +extern int getopt (); +#endif /* not __GNU_LIBRARY__ */ +extern int getopt_long (int argc, char *const *argv, const char *shortopts, + const struct option *longopts, int *longind); +extern int getopt_long_only (int argc, char *const *argv, + const char *shortopts, + const struct option *longopts, int *longind); + +/* Internal only. Users should not call this directly. */ +extern int _getopt_internal (int argc, char *const *argv, + const char *shortopts, + const struct option *longopts, int *longind, + int long_only); +#else /* not __STDC__ */ +extern int getopt (); +extern int getopt_long (); +extern int getopt_long_only (); + +extern int _getopt_internal (); +#endif /* not __STDC__ */ + +#ifdef __cplusplus +} +#endif + +#endif /* _GETOPT_H */ diff --git a/host/misc/gettimeofday.c b/host/misc/gettimeofday.c new file mode 100644 index 0000000..4ed15e2 --- /dev/null +++ b/host/misc/gettimeofday.c @@ -0,0 +1,50 @@ +/* + * Copyright 2003 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +#include + +#ifdef HAVE_WINDOWS_H +#include +#endif +#ifdef HAVE_WINBASE_H +# include +#endif + +#ifdef HAVE_SYS_TIME_H +#include +#endif + +/* + * broken implementation for WIN32. + * FIXME: usec precision + */ +int gettimeofday(struct timeval *tv, struct timezone *tz) +{ + if (tv) { + time_t tm; + + time(&tm); + tv->tv_sec = tm; + tv->tv_usec = 0; + } + return 0; +} + diff --git a/host/misc/mkstemp.c b/host/misc/mkstemp.c new file mode 100644 index 0000000..f6312b6 --- /dev/null +++ b/host/misc/mkstemp.c @@ -0,0 +1,42 @@ +/* Copyright (C) 1998, 1999, 2001 Free Software Foundation, Inc. + This file is derived from the one in the GNU C Library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, + Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include + +/* Disable the definition of mkstemp to rpl_mkstemp (from config.h) in this + file. Otherwise, we'd get conflicting prototypes for rpl_mkstemp on + most systems. */ +#undef mkstemp + +#include +#include + +#ifndef __GT_FILE +# define __GT_FILE 0 +#endif + +int __gen_tempname (); + +/* Generate a unique temporary file name from TEMPLATE. + The last six characters of TEMPLATE must be "XXXXXX"; + they are replaced with a string that makes the filename unique. + Then open the file and return a fd. */ +int +rpl_mkstemp (char *template) +{ + return __gen_tempname (template, __GT_FILE); +} diff --git a/host/misc/tempname.c b/host/misc/tempname.c new file mode 100644 index 0000000..2e78dfc --- /dev/null +++ b/host/misc/tempname.c @@ -0,0 +1,352 @@ +/* tempname.c - generate the name of a temporary file. + + Copyright (C) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, + 2000, 2001, 2002, 2003 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, + Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#if HAVE_CONFIG_H +# include +#endif + +#include +#include + +#include +#ifndef __set_errno +# define __set_errno(Val) errno = (Val) +#endif + +#include +#ifndef P_tmpdir +# define P_tmpdir "/tmp" +#endif +#ifndef TMP_MAX +# define TMP_MAX 238328 +#endif +#ifndef __GT_FILE +# define __GT_FILE 0 +# define __GT_BIGFILE 1 +# define __GT_DIR 2 +# define __GT_NOCREATE 3 +#endif + +#include +#include +#include + +#if HAVE_FCNTL_H || _LIBC +# include +#endif + +#if HAVE_SYS_TIME_H || _LIBC +# include +#endif + +#if HAVE_STDINT_H || _LIBC +# include +#endif +#if HAVE_INTTYPES_H +# include +#endif + +#if HAVE_UNISTD_H || _LIBC +# include +#endif + +#include +#if STAT_MACROS_BROKEN +# undef S_ISDIR +#endif +#if !defined S_ISDIR && defined S_IFDIR +# define S_ISDIR(mode) (((mode) & S_IFMT) == S_IFDIR) +#endif +#if !S_IRUSR && S_IREAD +# define S_IRUSR S_IREAD +#endif +#if !S_IRUSR +# define S_IRUSR 00400 +#endif +#if !S_IWUSR && S_IWRITE +# define S_IWUSR S_IWRITE +#endif +#if !S_IWUSR +# define S_IWUSR 00200 +#endif +#if !S_IXUSR && S_IEXEC +# define S_IXUSR S_IEXEC +#endif +#if !S_IXUSR +# define S_IXUSR 00100 +#endif + +#if _LIBC +# define struct_stat64 struct stat64 +#else +# define struct_stat64 struct stat +# define __getpid getpid +# define __gettimeofday gettimeofday +#ifdef MKDIR_TAKES_ONE_ARG +# define __mkdir(pathname,mode) mkdir((pathname)) +#else +# define __mkdir mkdir +#endif +# define __open open +# define __open64 open +#ifdef HAVE_LSTAT +# define __lxstat64(version, path, buf) lstat (path, buf) +#else +# define __lxstat64(version, path, buf) stat (path, buf) +#endif +# define __xstat64(version, path, buf) stat (path, buf) +#endif + +#if ! (HAVE___SECURE_GETENV || _LIBC) +# define __secure_getenv getenv +#endif + +#ifdef _LIBC +# include +# if HP_TIMING_AVAIL +# define RANDOM_BITS(Var) \ + if (__builtin_expect (value == UINT64_C (0), 0)) \ + { \ + /* If this is the first time this function is used initialize \ + the variable we accumulate the value in to some somewhat \ + random value. If we'd not do this programs at startup time \ + might have a reduced set of possible names, at least on slow \ + machines. */ \ + struct timeval tv; \ + __gettimeofday (&tv, NULL); \ + value = ((uint64_t) tv.tv_usec << 16) ^ tv.tv_sec; \ + } \ + HP_TIMING_NOW (Var) +# endif +#endif + +/* Use the widest available unsigned type if uint64_t is not + available. The algorithm below extracts a number less than 62**6 + (approximately 2**35.725) from uint64_t, so ancient hosts where + uintmax_t is only 32 bits lose about 3.725 bits of randomness, + which is better than not having mkstemp at all. */ +#if !defined UINT64_MAX && !defined uint64_t +# define uint64_t uintmax_t +#endif + +/* Return nonzero if DIR is an existent directory. */ +static int +direxists (const char *dir) +{ + struct_stat64 buf; + return __xstat64 (_STAT_VER, dir, &buf) == 0 && S_ISDIR (buf.st_mode); +} + +/* Path search algorithm, for tmpnam, tmpfile, etc. If DIR is + non-null and exists, uses it; otherwise uses the first of $TMPDIR, + P_tmpdir, /tmp that exists. Copies into TMPL a template suitable + for use with mk[s]temp. Will fail (-1) if DIR is non-null and + doesn't exist, none of the searched dirs exists, or there's not + enough space in TMPL. */ +int +__path_search (char *tmpl, size_t tmpl_len, const char *dir, const char *pfx, + int try_tmpdir) +{ + const char *d; + size_t dlen, plen; + + if (!pfx || !pfx[0]) + { + pfx = "file"; + plen = 4; + } + else + { + plen = strlen (pfx); + if (plen > 5) + plen = 5; + } + + if (try_tmpdir) + { + d = __secure_getenv ("TMPDIR"); + if (d != NULL && direxists (d)) + dir = d; + else if (dir != NULL && direxists (dir)) + /* nothing */ ; + else + dir = NULL; + } + if (dir == NULL) + { + if (direxists (P_tmpdir)) + dir = P_tmpdir; + else if (strcmp (P_tmpdir, "/tmp") != 0 && direxists ("/tmp")) + dir = "/tmp"; + else + { + __set_errno (ENOENT); + return -1; + } + } + + dlen = strlen (dir); + while (dlen > 1 && dir[dlen - 1] == '/') + dlen--; /* remove trailing slashes */ + + /* check we have room for "${dir}/${pfx}XXXXXX\0" */ + if (tmpl_len < dlen + 1 + plen + 6 + 1) + { + __set_errno (EINVAL); + return -1; + } + + sprintf (tmpl, "%.*s/%.*sXXXXXX", (int) dlen, dir, (int) plen, pfx); + return 0; +} + +/* These are the characters used in temporary filenames. */ +static const char letters[] = +"abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789"; + +/* Generate a temporary file name based on TMPL. TMPL must match the + rules for mk[s]temp (i.e. end in "XXXXXX"). The name constructed + does not exist at the time of the call to __gen_tempname. TMPL is + overwritten with the result. + + KIND may be one of: + __GT_NOCREATE: simply verify that the name does not exist + at the time of the call. + __GT_FILE: create the file using open(O_CREAT|O_EXCL) + and return a read-write fd. The file is mode 0600. + __GT_BIGFILE: same as __GT_FILE but use open64(). + __GT_DIR: create a directory, which will be mode 0700. + + We use a clever algorithm to get hard-to-predict names. */ +int +__gen_tempname (char *tmpl, int kind) +{ + int len; + char *XXXXXX; + static uint64_t value; + uint64_t random_time_bits; + unsigned int count; + int fd = -1; + int save_errno = errno; + struct_stat64 st; + + /* A lower bound on the number of temporary files to attempt to + generate. The maximum total number of temporary file names that + can exist for a given template is 62**6. It should never be + necessary to try all these combinations. Instead if a reasonable + number of names is tried (we define reasonable as 62**3) fail to + give the system administrator the chance to remove the problems. */ + unsigned int attempts_min = 62 * 62 * 62; + + /* The number of times to attempt to generate a temporary file. To + conform to POSIX, this must be no smaller than TMP_MAX. */ + unsigned int attempts = attempts_min < TMP_MAX ? TMP_MAX : attempts_min; + + len = strlen (tmpl); + if (len < 6 || strcmp (&tmpl[len - 6], "XXXXXX")) + { + __set_errno (EINVAL); + return -1; + } + + /* This is where the Xs start. */ + XXXXXX = &tmpl[len - 6]; + + /* Get some more or less random data. */ +#ifdef RANDOM_BITS + RANDOM_BITS (random_time_bits); +#else +# if HAVE_GETTIMEOFDAY || _LIBC + { + struct timeval tv; + __gettimeofday (&tv, NULL); + random_time_bits = ((uint64_t) tv.tv_usec << 16) ^ tv.tv_sec; + } +# else + random_time_bits = time (NULL); +# endif +#endif + value += random_time_bits ^ __getpid (); + + for (count = 0; count < attempts; value += 7777, ++count) + { + uint64_t v = value; + + /* Fill in the random bits. */ + XXXXXX[0] = letters[v % 62]; + v /= 62; + XXXXXX[1] = letters[v % 62]; + v /= 62; + XXXXXX[2] = letters[v % 62]; + v /= 62; + XXXXXX[3] = letters[v % 62]; + v /= 62; + XXXXXX[4] = letters[v % 62]; + v /= 62; + XXXXXX[5] = letters[v % 62]; + + switch (kind) + { + case __GT_FILE: + fd = __open (tmpl, O_RDWR | O_CREAT | O_EXCL, S_IRUSR | S_IWUSR); + break; + + case __GT_BIGFILE: + fd = __open64 (tmpl, O_RDWR | O_CREAT | O_EXCL, S_IRUSR | S_IWUSR); + break; + + case __GT_DIR: + fd = __mkdir (tmpl, S_IRUSR | S_IWUSR | S_IXUSR); + break; + + case __GT_NOCREATE: + /* This case is backward from the other three. __gen_tempname + succeeds if __xstat fails because the name does not exist. + Note the continue to bypass the common logic at the bottom + of the loop. */ + if (__lxstat64 (_STAT_VER, tmpl, &st) < 0) + { + if (errno == ENOENT) + { + __set_errno (save_errno); + return 0; + } + else + /* Give up now. */ + return -1; + } + continue; + + default: + assert (! "invalid KIND in __gen_tempname"); + } + + if (fd >= 0) + { + __set_errno (save_errno); + return fd; + } + else if (errno != EEXIST) + return -1; + } + + /* We got out of the loop because we ran out of combinations to try. */ + __set_errno (EEXIST); + return -1; +} diff --git a/host/misc/usleep.c b/host/misc/usleep.c new file mode 100644 index 0000000..4a0f75e --- /dev/null +++ b/host/misc/usleep.c @@ -0,0 +1,67 @@ +/* Copyright (C) 1992 Free Software Foundation, Inc. +This file is part of the GNU C Library. + +The GNU C Library is free software; you can redistribute it and/or +modify it under the terms of the GNU Library General Public License as +published by the Free Software Foundation; either version 2 of the +License, or (at your option) any later version. + +The GNU C Library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Library General Public License for more details. + +You should have received a copy of the GNU Library General Public +License along with the GNU C Library; see the file COPYING.LIB. If +not, write to the Free Software Foundation, Inc., 675 Mass Ave, +Cambridge, MA 02139, USA. */ + +#include + +#ifndef HAVE_USLEEP + +#include +#include + +#ifdef HAVE_SYS_SELECT_H +# include +#endif + +#ifdef HAVE_WINDOWS_H +#include +#endif +#ifdef HAVE_WINBASE_H +# include +#endif + +#ifdef apollo +# include +# include + static time_$clock_t DomainTime100mS = + { + 0, 100000/4 + }; + static status_$t DomainStatus; +#endif + +/* Sleep USECONDS microseconds, or until a previously set timer goes off. */ +int +usleep (unsigned long useconds) +{ +#ifdef apollo + /* The usleep function does not work under the SYS5.3 environment. + Use the Domain/OS time_$wait call instead. */ + time_$wait (time_$relative, DomainTime100mS, &DomainStatus); +#elif defined(HAVE_SSLEEP) /* Win32 */ + Sleep( useconds/1000 ); +#else + struct timeval delay; + + delay.tv_sec = 0; + delay.tv_usec = useconds; + select (0, 0, 0, 0, &delay); +#endif + return 0; +} + +#endif /* !HAVE_USLEEP */ diff --git a/host/swig/Makefile.am b/host/swig/Makefile.am new file mode 100644 index 0000000..469a5d7 --- /dev/null +++ b/host/swig/Makefile.am @@ -0,0 +1,84 @@ +# +# Copyright 2001,2003,2004 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +include $(top_srcdir)/Makefile.common + +# This usually ends up at: +# ${prefix}/lib/python${python_version}/site-packages/usrp_prims + +ourpythondir = $(pythondir) +ourlibdir = $(pyexecdir) + + +LOCAL_IFILES = \ + prims.i + + +ALL_IFILES = \ + $(LOCAL_IFILES) + + +EXTRA_DIST = \ + $(LOCAL_IFILES) + + +BUILT_SOURCES = \ + prims.cc \ + usrp_prims.py + + +ourpython_PYTHON = \ + __init__.py \ + usrp_fpga_regs.py \ + usrp_prims.py + + +INCLUDES = -I$(top_srcdir)/usrp/firmware/include $(PYTHON_CPPFLAGS) -I$(srcdir) + + +SWIGPYTHONARGS = $(SWIGPYTHONFLAGS) $(INCLUDES) + + +ourlib_LTLIBRARIES = \ + _usrp_prims.la + +_usrp_prims_la_SOURCES = \ + prims.cc + + +noinst_HEADERS = + +_usrp_prims_la_LIBADD = $(top_builddir)/usrp/host/lib/libusrp.la -lstdc++ $(PYTHON_LDFLAGS) +_usrp_prims_la_LDFLAGS = $(NO_UNDEFINED) -module -avoid-version + + +prims.cc usrp_prims.py : prims.i ../../firmware/include/fpga_regs_common.h ../../firmware/include/fpga_regs_standard.h + $(SWIG) $(SWIGPYTHONARGS) -module usrp_prims -o prims.cc $< + + +MOSTLYCLEANFILES = \ + prims.cc usrp_prims.py *~ *.pyc + +# Don't distribute output of swig +dist-hook: + @for file in $(BUILT_SOURCES); do echo $(RM) $(distdir)/$$file; done + @for file in $(BUILT_SOURCES); do $(RM) $(distdir)/$$file; done + diff --git a/host/swig/__init__.py b/host/swig/__init__.py new file mode 100644 index 0000000..a4917cf --- /dev/null +++ b/host/swig/__init__.py @@ -0,0 +1 @@ +# make this a package diff --git a/host/swig/prims.i b/host/swig/prims.i new file mode 100644 index 0000000..bbf960c --- /dev/null +++ b/host/swig/prims.i @@ -0,0 +1,266 @@ +/* -*- c++ -*- */ +/* + * Copyright 2003,2004 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with GNU Radio; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +/* + * Low level primitives for directly messing with USRP hardware. + * + * If you're trying to use the USRP, you'll probably want to take a + * look at the usrp_standard_rx and usrp_standard_tx classes. They + * hide a bunch of low level details and provide high performance + * streaming i/o. + * + * This interface is built on top of libusb, which allegedly works under + * Linux, *BSD and Mac OS/X. http://libusb.sourceforge.net + */ + +%include // pick up string stuff + + +%{ +#include +%} + + +enum usrp_load_status_t { ULS_ERROR = 0, ULS_OK, ULS_ALREADY_LOADED }; + +struct usb_dev_handle; +struct usb_device; + +/*! + * \brief initialize libusb; probe busses and devices. + * Safe to call more than once. + */ +void usrp_one_time_init (); + +void usrp_rescan (); + +/*! + * \brief locate Nth (zero based) USRP device in system. + * Return pointer or 0 if not found. + * + * The following kinds of devices are considered USRPs: + * + * unconfigured USRP (no firwmare loaded) + * configured USRP (firmware loaded) + * unconfigured Cypress FX2 (only if fx2_ok_p is true) + */ +struct usb_device *usrp_find_device (int nth, bool fx2_ok_p = false); + +bool usrp_usrp_p (struct usb_device *q); //< is this a USRP +bool usrp_usrp0_p (struct usb_device *q); //< is this a USRP Rev 0 +bool usrp_usrp1_p (struct usb_device *q); //< is this a USRP Rev 1 +bool usrp_usrp2_p (struct usb_device *q); //< is this a USRP Rev 2 +int usrp_hw_rev (struct usb_device *q); //< return h/w rev code +bool usrp_fx2_p (struct usb_device *q); //< is this an unconfigured Cypress FX2 + +bool usrp_unconfigured_usrp_p (struct usb_device *q); //< some kind of unconfigured USRP +bool usrp_configured_usrp_p (struct usb_device *q); //< some kind of configured USRP + +/*! + * \brief given a usb_device return an instance of the appropriate usb_dev_handle + * + * These routines claim the specified interface and select the + * correct alternate interface. (USB nomenclature is totally screwed!) + * + * If interface can't be opened, or is already claimed by some other + * process, 0 is returned. + */ +struct usb_dev_handle *usrp_open_cmd_interface (struct usb_device *dev); +struct usb_dev_handle *usrp_open_rx_interface (struct usb_device *dev); +struct usb_dev_handle *usrp_open_tx_interface (struct usb_device *dev); + +/*! + * \brief close interface. + */ +bool usrp_close_interface (struct usb_dev_handle *udh); + +/*! + * \brief load intel hex format file into USRP/Cypress FX2 (8051). + * + * The filename extension is typically *.ihx + * + * Note that loading firmware may cause the device to renumerate. I.e., + * change its configuration, invalidating the current device handle. + */ + +usrp_load_status_t +usrp_load_firmware (struct usb_dev_handle *udh, const char *filename, bool force); + +/*! + * \brief load intel hex format file into USRP FX2 (8051). + * + * The filename extension is typically *.ihx + * + * Note that loading firmware may cause the device to renumerate. I.e., + * change its configuration, invalidating the current device handle. + * If the result is ULS_OK, usrp_load_firmware_nth delays 1 second + * then rescans the busses and devices. + */ +usrp_load_status_t +usrp_load_firmware_nth (int nth, const char *filename, bool force); + +/*! + * \brief load fpga configuration bitstream + */ +usrp_load_status_t +usrp_load_fpga (struct usb_dev_handle *udh, const char *filename, bool force); + +/*! + * \brief load the regular firmware and fpga bitstream in the Nth USRP. + * + * This is the normal starting point... + */ +bool usrp_load_standard_bits (int nth, bool force); + + +%include +%include + + +bool usrp_write_fpga_reg (struct usb_dev_handle *udh, int reg, int value); + +%inline %{ + +int +usrp_read_fpga_reg (struct usb_dev_handle *udh, int reg) +{ + int value; + bool ok = usrp_read_fpga_reg (udh, reg, &value); + if (ok) + return value; + else + return -999; +} + +%} + +bool usrp_set_fpga_reset (struct usb_dev_handle *udh, bool on); +bool usrp_set_fpga_tx_enable (struct usb_dev_handle *udh, bool on); +bool usrp_set_fpga_rx_enable (struct usb_dev_handle *udh, bool on); +bool usrp_set_fpga_tx_reset (struct usb_dev_handle *udh, bool on); +bool usrp_set_fpga_rx_reset (struct usb_dev_handle *udh, bool on); +bool usrp_set_led (struct usb_dev_handle *udh, int which, bool on); + +bool usrp_check_rx_overrun (struct usb_dev_handle *udh, bool *overrun_p); +bool usrp_check_tx_underrun (struct usb_dev_handle *udh, bool *underrun_p); + +// i2c_read and i2c_write are limited to a maximum len of 64 bytes. + +bool usrp_i2c_write (struct usb_dev_handle *udh, int i2c_addr, + void *buf, int len); + +bool usrp_i2c_read (struct usb_dev_handle *udh, int i2c_addr, + void *buf, int len); + +// spi_read and spi_write are limited to a maximum of 64 bytes +// See usrp_spi_defs.h for more info + +bool usrp_spi_write (struct usb_dev_handle *udh, + int optional_header, int enables, int format, + unsigned char *buf, int len); + +bool usrp_spi_read (struct usb_dev_handle *udh, + int optional_header, int enables, int format, + unsigned char *buf, int len); + + +bool usrp_9862_write (struct usb_dev_handle *udh, + int which_codec, // [0, 1] + int regno, // [0, 63] + int value); // [0, 255] + +%inline %{ + +int +usrp_9862_read (struct usb_dev_handle *udh, int which_codec, int reg) +{ + unsigned char value; + bool ok = usrp_9862_read (udh, which_codec, reg, &value); + if (ok) + return value; + else + return -999; +} + +%} + +%inline %{ + +bool +usrp_eeprom_write (struct usb_dev_handle *udh, int i2c_addr, + int eeprom_offset, const std::string buf) +{ + return usrp_eeprom_write (udh, i2c_addr, eeprom_offset, + buf.data (), buf.size ()); +} + +std::string +usrp_eeprom_read (struct usb_dev_handle *udh, int i2c_addr, + int eeprom_offset, int len) +{ + if (len <= 0) + return ""; + + char buf[len]; + + if (!usrp_eeprom_read (udh, i2c_addr, eeprom_offset, buf, len)) + return ""; + + return std::string (buf, len); +} + +%} + +bool usrp_write_aux_dac (struct usb_dev_handle *uhd, int slot, + int which_dac, int value); + +%inline %{ + +int usrp_read_aux_adc (struct usb_dev_handle *udh, int slot, int which_adc) +{ + int value; + bool ok = usrp_read_aux_adc (udh, slot, which_adc, &value); + if (ok) + return value; + else + return -999; +} + +%} + +/*! + * \brief return a usrp's serial number. + * + * Note that this only works on a configured usrp. + * \returns non-zero length string iff successful. + */ +std::string usrp_serial_number(struct usb_dev_handle *udh); + +/*! + * \brief usrp daughterboard id to name mapping + */ +const std::string usrp_dbid_to_string (int dbid); + +%inline %{ +#include "../../firmware/include/fpga_regs_common.h" +#include "../../firmware/include/fpga_regs_standard.h" +%} diff --git a/host/swig/usrp_fpga_regs.py b/host/swig/usrp_fpga_regs.py new file mode 100644 index 0000000..9fdf62c --- /dev/null +++ b/host/swig/usrp_fpga_regs.py @@ -0,0 +1,30 @@ +# +# Copyright 2005 Free Software Foundation, Inc. +# +# This file is part of GNU Radio +# +# GNU Radio is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# GNU Radio is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Radio; see the file COPYING. If not, write to +# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# + +import usrp_prims + +# Copy everything that starts with FR_ or bmFR_ from the usrp_prims +# name space into our name space. This is effectively a python binding for +# the contents of firmware/include/fpga_regs_common.h and fpga_regs_standard.h + +for name in dir(usrp_prims): + if name.startswith("FR_") or name.startswith("bmFR_"): + globals()[name] = usrp_prims.__dict__[name] diff --git a/host/swig/util.py b/host/swig/util.py new file mode 100644 index 0000000..089bcaa --- /dev/null +++ b/host/swig/util.py @@ -0,0 +1,95 @@ +# utilities + +from usrp_prims import * + +def setup (which_board = 0): + if not usrp_load_standard_bits (which_board, False): + raise RuntimeError, "usrp_load_standard_bits" + dev = usrp_find_device (which_board) + if not dev: + raise RuntimeError, "usrp_find_device" + u = usrp_open_cmd_interface (dev) + if not u: + raise RuntimeError, "usrp_open_cmd_interface" + + # FIXME setup high speed paths, Aux ADC Clock, ... + + # usrp_9862_write (u, 0, 35, 0x1) # aux ADC clock = CLK/4 + # usrp_9862_write (u, 1, 35, 0x1) + + return u + +def write_slot_oe (u, slot, value, mask): + assert 0 <= slot and slot < 4 + return usrp_write_fpga_reg (u, slot + FR_OE_0, + ((mask & 0xffff) << 16) | (value & 0xffff)) + +def write_slot_io (u, slot, value, mask): + assert 0 <= slot and slot < 4 + return usrp_write_fpga_reg (u, slot + FR_IO_0, + ((mask & 0xffff) << 16) | (value & 0xffff)) + + +# ---------------------------------------------------------------- + + +def ramp_aux_dac (u, which_codec, which_dac): + if not (which_codec == 0 or which_codec == 1): + raise AssertionError + if not (which_dac >= 0 and which_dac < 4): + raise AssertionError + try: + if which_dac == 3: # sigma delta output + sigma_delta_loop (u, which_codec) + else: + aux_dac_loop (u, which_codec, which_dac) + except KeyboardInterrupt: + return + +def sigma_delta_loop (u, which_codec): + counter = 0 + while True: + usrp_9862_write (u, which_codec, 43, counter >> 4) + usrp_9862_write (u, which_codec, 42, (counter & 0xf) << 4) + # counter += 1 FIXME + counter += 4 + if counter > 0xfff: + counter = 0 + +def aux_dac_loop (u, which_codec, which_dac): + reg = 36 + which_dac # Aux DAC A,B,C + counter = 0 + while True: + usrp_9862_write (u, which_codec, reg, counter) + counter += 1 + if counter > 0xff: + counter = 0 + + +def read_aux_adc_loop (u, slot, which_adc): + while True: + v = usrp_read_aux_adc (u, slot, which_adc) + print "%3d %5.3f" % (v, v * 3.3 / 1024) + +def ramp_io_port (u, slot): + counter = 0 + try: + while True: + write_slot_io (u, slot, counter, 0xffff) + counter += 1 + if counter > 0xffff: + counter = 0 + except KeyboardInterrupt: + return + +def walk_io_port (u, slot): + bit = 1 + try: + while True: + write_slot_io (u, slot, bit, 0xffff) + bit = (bit << 1) & 0xffff + if bit == 0: + bit = 1 + except KeyboardInterrupt: + return + diff --git a/usrp.inf b/usrp.inf new file mode 100644 index 0000000..b612d1e --- /dev/null +++ b/usrp.inf @@ -0,0 +1,91 @@ +[Version] +Signature = "$Chicago$" +provider = %manufacturer% +DriverVer = 03/09/2005,0.1.10.1 +CatalogFile = usrp.cat + +Class = LibUsbDevices +ClassGUID = {EB781AAF-9C70-4523-A5DF-642A87ECA567} + +[ClassInstall] +AddReg=ClassInstall.AddReg + +[ClassInstall32] +AddReg=ClassInstall.AddReg + +[ClassInstall.AddReg] +HKR,,,,"LibUSB-Win32 Devices" +HKR,,Icon,,"-20" + +[Manufacturer] +%manufacturer%=Devices + +;-------------------------------------------------------------------------- +; Files +;-------------------------------------------------------------------------- + +[SourceDisksNames] +1 = "Libusb-Win32 Driver Installation Disk",, + +[SourceDisksFiles] +libusb0.sys = 1,, +libusb0.dll = 1,, + +[DestinationDirs] +LIBUSB.Files.Sys = 10,System32\Drivers +LIBUSB.Files.Dll = 10,System32 + +[LIBUSB.Files.Sys] +libusb0.sys + +[LIBUSB.Files.Dll] +libusb0.dll + +;-------------------------------------------------------------------------- +; Device driver +;-------------------------------------------------------------------------- + +[LIBUSB_DEV] +CopyFiles = LIBUSB.Files.Sys, LIBUSB.Files.Dll +AddReg = LIBUSB_DEV.AddReg + +[LIBUSB_DEV.NT] +CopyFiles = LIBUSB.Files.Sys, LIBUSB.Files.Dll + +[LIBUSB_DEV.HW] +DelReg = LIBUSB_DEV.DelReg.HW + +[LIBUSB_DEV.NT.HW] +DelReg = LIBUSB_DEV.DelReg.HW + +[LIBUSB_DEV.NT.Services] +AddService = libusb0, 0x00000002, LIBUSB.AddService + +[LIBUSB_DEV.AddReg] +HKR,,DevLoader,,*ntkern +HKR,,NTMPDriver,,libusb0.sys + +[LIBUSB_DEV.DelReg.HW] +HKR,,"LowerFilters" + +;-------------------------------------------------------------------------- +; Services +;-------------------------------------------------------------------------- + +[LIBUSB.AddService] +DisplayName = "LibUsb-Win32 - Kernel Driver 03/09/2005, 0.1.10.1" +ServiceType = 1 +StartType = 3 +ErrorControl = 0 +ServiceBinary = %12%\libusb0.sys + +;-------------------------------------------------------------------------- +; Devices +;-------------------------------------------------------------------------- + +[Devices] +"USRP filter"=LIBUSB_DEV, USB\VID_fffe&PID_0002 + +[Strings] +manufacturer = "GNU Radio folks" + diff --git a/usrp.iss.in b/usrp.iss.in new file mode 100644 index 0000000..b9a4f75 --- /dev/null +++ b/usrp.iss.in @@ -0,0 +1,69 @@ +; +; Copyright 2003 Free Software Foundation, Inc. +; +; This file is part of GNU Radio +; +; GNU Radio is free software; you can redistribute it and/or modify +; it under the terms of the GNU General Public License as published by +; the Free Software Foundation; either version 2, or (at your option) +; any later version. +; +; GNU Radio is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +; GNU General Public License for more details. +; +; You should have received a copy of the GNU General Public License +; along with GNU Radio; see the file COPYING. If not, write to +; the Free Software Foundation, Inc., 59 Temple Place - Suite 330, +; Boston, MA 02111-1307, USA. +; + +; Requirements: Inno Setup (http://www.jrsoftware.org/isdl.php) +; +; To compile this script do the following: +; - copy libusb's driver (libusb0.sys, libusb0.dll) to this folder +; - copy the USRP filter .inf file to this folder +; - copy the USRP .exe and .dll files to this folder +; - open this scipt with Inno Setup +; - compile and run + +[Setup] +AppName=USRP +AppVerName=USRP @VERSION@ +AppPublisher=GNU Radio folks +AppPublisherURL=http://www.gnu.org/software/gnuradio/ +AppVersion=@VERSION@ +DefaultDirName={pf}\Usrp +DefaultGroupName=Usrp +Compression=lzma +SolidCompression=yes +; Win98 or higher +MinVersion=4,5 +PrivilegesRequired=admin +LicenseFile="COPYING_GPL.txt" + +[Files] +; copy the file to the App folder +Source: "*.sys"; DestDir: "{app}\driver" +;Source: "*.cat"; DestDir: "{app}\driver" +Source: "*.dll"; DestDir: "{app}\driver" +Source: "usrp.inf"; DestDir: "{app}\driver" + +; also copy the DLL to the system folders so that rundll32.exe will find it +Source: "*.dll"; DestDir: "{win}\system32"; FLags: replacesameversion restartreplace + +Source: "COPYING_GPL.txt"; DestDir: "{app}" +Source: "README.txt"; DestDir: "{app}"; Flags: isreadme + +Source: "*.exe"; DestDir: "{app}" +Source: "*.ihx"; DestDir: "{app}\rev2" +Source: "*.rbf"; DestDir: "{app}\rev2" + +[Icons] +Name: "{group}\Uninstall TestDrivers"; Filename: "{uninstallexe}" + +[Run] +; invoke libusb's DLL to install the .inf file +Filename: "rundll32"; Parameters: "libusb0.dll,usb_install_driver_np_rundll {app}\driver\usrp.inf"; StatusMsg: "Installing driver (this may take a few seconds) ..." + diff --git a/usrp.pc.in b/usrp.pc.in new file mode 100644 index 0000000..49d27e7 --- /dev/null +++ b/usrp.pc.in @@ -0,0 +1,11 @@ +prefix=@prefix@ +exec_prefix=@exec_prefix@ +libdir=@libdir@ +includedir=@includedir@ + +Name: usrp +Description: Universal Software Radio Peripheral +Requires: +Version: @VERSION@ +Libs: -L${libdir} -lusrp -lusb +Cflags: -I${includedir} @DEFINES@

    AJo5S<;X(_Gc#{_e1Ceg&LMEfiDKIf9H&Fj9}iI3EwsKv)gY z65tLZ>)DD7z0EpQ-Ebbt7w4@8jGYc3tIl4*csUZlP>}CItR@*!2dy(Y+vTqW#j9x3 zr7-gW-74~kIbTK1LS>x_)EuN)bes{`7V+Q~s-jc4Q{hzc%M#S3?4(!uIXuD99t2t# zViqvbh~X_{u7V_3YicfLcxxtUStlp}Qb0d{X7;A7x(wa3LM>fH zaZsIGt$FTh_ZFlq(ST!l=c2rc8Q=il18ELK?_rX+7WGIZl-gkS|~U&^0kl%$N%Xk zmW01eC81L_|}?`Y3gAtz@jt{l_av&GBymNds5x< z-}A(FL=ZH*Q{)?2niP|DAw7>Fs6!@G6`hHn9U$_ES_oj0s>hCERndsq_5?g9wu=^O z+qoGmCt(zPQk8N*59<{Id=|_PigpU)MK07!V{re1$Q6NU79GGoGP^d(zzizXk;OM3 z7s4cLYPBJ8D_JWFV&4i;RCa=%-VMz&Zk4GdGA{8Dmg#JuZ3|bPiGaHov;vEc=I1bW zjD{W4OgtJm4YbFSHCnSV4 zbs6HYt2{|ZV>h@I0vM7cuE=Dm14X1};yERx&&>%@7~O0aG2j`jTog^cs&dB^KeV(# z)DE>!Nxsz(mxUx9TMjaKjV3cn5oJmB__K_<(tDWc$to{ws0Z_>P1{CM-emwaRh)t$rSJt@4EXm zX}g2SFqtSw%Ni%SBPxM?)G8&MxZP9MClpBA5nqb&0MJn8Qkc3<$z)g=-=LVnU@mLb zRpcr=$e!m+d(H^?9Hvs84{hv>_0?+I18Rv@#89l-v?!12&Kb_dpdi4XAyh-NY!=ezX{T`M-n#sH_wa-Iuys z1tycdA01-0cF-BI3a>(z(=UpA5k)68bkYK*Iz$F1b4)%o^jn4g6hT7$S$CkT$@MrsG|L59B()T`kR4@M`B~8T#IT&4s201kqRB|oRL~rN<)W^a~TJrezv3? z+l4aK$9qXu%2Zv?IezinZow)Kv1qj}YbTR5ES|Pf5BXUy=oL`9n#Rq;iGyad;adLns9Iy)j^CpKZ>M42>&g6uM?^aY=2$uT zQ9O6(MLY;_xPiEF&)+4fI*oxCzY_vX!{DAkAq7W6Qf~_B83`qLF2Y`O%(4?j2t2lG zv12FxefJT;Su95d1|4KyQ}!;qr!(~-?&XV&v#h`n0EVC^`=iCZFA8Pjm4}$LUf1H{ zeE30tYea+aiom2~8oSY;sGP0X`Wk5HP!0&ZJkIg9Wm}ZH!_7b_ii0I^qg@$5an;&} z+4(c5@1dqQl^0>*wwsCvgGU+}#yc-BG}OUxKxuZbSl6veZW%w}tTDwtXH98}KTyAn3%X)l7(1+3xCyxnIP3!XOdoO>R$Fl@}cec$_(xq87} z;~cIwlvkPaH~L2dPcIt3%d_yG9;|B|Zu^y!o_wxr`E#2eyjHogbaUMG?8|WJ6*y#&3B}3gz_QF{U zoaX)oSKg~E^nG&Iv6W`eX#c#zdp?;z2HrPIlh0KY(xa%tX&ZTvuF1dn&_920IP1-@sUe+IJv7kx4yb5JYsEK@>BEb@9#Zp z8;5)L?{Suo+J0TX=Z#0ka+a9mV8<+S?2MabNJn5w)F;|Jh%*R;s+V3$Nxn6Za37GA^Z_*W|Jb_&!~Fg)3a-uB;xs&NyTS;wE1k(7vcvP&Vbp%x52L)&81F4e<@zVayhRJ47bK7VWhWS{0m{YUwsosgB zmoHow%JBDu^Vs;26Hd=$_{0J9W;lWJ*SvGxv$%en#0X3bRM^;Q6($;|{}jmxPiEO% zv!N)DK1fGERX@t7L7tSCAOIE2oksA8Y`vl~s2EhhcOm8nMMf_>Avop;&q7Z0Z*SyE zcu-6hlS@D>Cn~d6`4VrfgFQlyJX^5m_1gOwU#k3&G?X^}5&o;~ta^ZCXxd-~ownw=YdPk>{*$YFU4wOn0LB$euY+1i$ zXyzN|Im}PC3szws8}3z1jFrm3zDGY>6y%)6=LAs4I$|=52~09OU6JS?LR1!X;63rhSX^eyIjeV@8LCpietq5%a1NccMj+7*~h^3_96{dlr z7M57XTMe8{T6n*}^U79Px2VgMugaw^m=rwb(b-HARhRJcdkZAl=@ZEe9UGb}NQB>X zkdtJtgDDm$FCwv~(=3CVfXE;yYrXjrD1~GXqA?_-*@l%8okVW$;8ZE;tgMJ8NU9Es z2;V-FO(IJvt~M))<@z{~s}NkVs`CnME}md(^O9IU&xh6nYCC@N1FjS&bLkuuhv5z4 zaNdC`T1cFO;(YCv3Fe+Rzf$Y z1jKg5fg`8OD>>;!@_0^JHE1zQ|q#@Eyal0BVJXjFkp${?u|KFTqWSkd;6f)zyoXEjO3MT|XN3V(q zi=xlciwZ|f-tqaJ=r$d9kP#cQNb7U3y%kw;W1wfC)ykcPl*S~hWL6$H4|ESh2Wg{v zILEDU;7&~QUZ~!}(UwXvbjv*=NvOa8DP&nD)oojLlLe8Y+Qpt3;?*ETV{GdZOpbtLj|P=wjzE$)uBkN+&mm z;hBthoZ)fmM6q%eh}CmYb48I#)&f4efwxw`T9CVP3EWf3HNzel@@r|!Sd<(CJ&FkW z=p>i8wN0c6Z&Xrh(N}Y2g0`D*$`j$%akG~e=`saD-UxI6GlrR%?lGr1JyFi}$OK?% zCL~i~)8bZaBh^F+K#(zhw2(Lvs;_0&5&;I-B7r+3#_3Y6MKv+u#=|r`fozcecSt>Z~9z6|`p{TP_HX6rvid3nW35p_}s;^S=GR24VrR!ShDA?J^DXppr z_ASnoQ1Jk5a=GxdL)0S4(;^@oVT!w1N=-r+(-!?9mnmS{MXo&1qrhekD#;|=dq|*G zWAbX2^dL8a_{#QsLZp)3tCUg62o4KsM%$6|rmVx>8QMXa5;Tj{DOql@QDsz)R;H3+ zedoKuGUa*E+s{LaN$Ws!st+o+GV#@FFu8GBu^g$ZOkc(`M$mbe=F6n4ohGm+Dssnz zX)Ba25k|%EN2*SB^l6)#E=Zu)T9kv-HXg+IcOst8UEmd9Gr2^o3VPq!(5TATg@oC| z%{U7Ni3l?T5l1C6bsFaZTXlShGwBc}rUwDQ@lH*{nMRTAs>n-(X3=B96ZsK^#|8_c z8e@@lVSPwdD4gsT-HD*aC}}*DWqnx|PBshiejJuC#Y3IFqNHgAuUKXz>VS&Uq+he( zoXF&`OI7#Wm#r@nb)z7moW^Ijw)T^?x80SNjc8hO5{Tugd(Zl)4(OCF@Ri2=m zJuiOhlXfPTb+-7{T#dCZj+jec2A+*vG{;=}Mtt9E*^fDsf6>?ZeELI+@1M!9MH{@P z0OQ^hmds@*rL|&tnPU)Ka5SB(BY&oBJ*>S@X3qJ02b<@IkY=(vk2i_}W&edjA>*_n zxg$Thk~8xc=R}3nm))20@|fH5aL}0X>bw^jx)FA%T@}0Ja$Z~0A(w;ftn5qSPIMk! z^zyDcB8ig1oxII7sCMF%CDi=uPd{Q})zW@_RR;i`5ZHxA>Mr4eO zb-oW)x31-yBH%=zw|9R)6Wb-QclgEowsSss1t%^Dua=wxW2>I_rQA5O@png?ccl2T zZ+&3I%)iM^?xD@Ahl|yPC98&>-}8eCbNL@<4-an1eq{NU2Nd7(f9~pf@9VpM=*ym{ zXyZ!OnK4w_Q$KU$)yK`NCJn(F_RNZj=i2rc)Vw*qvE@L7tD@Jt2+yv^w+23DPaE(@BM{wSP*^2!BwN4jSGd%^LsPv zO>b5Xx!=3~*n{a#>9xB@T6Q=_y4&j0#%1I3l#E|K{>}Pe3Y){-f8>GpoxbZzcFopb zell8xoZXWves|!93a{K4D5_B}N@xa$YeX4|Y*r|p}8esjU~ z=eufdyEZ@5Y#b{V%_&10H`E))JfAI`^eq}aQ{kjvd+wXF3!Zv!^Qs#oZEwB4KT^M9 zjA_}t;YQ2roA0{5)W0MXbG6rY_zJICpFePNqGsIpiz_kVXO~|3&;K~Z@v)R8|yPuRizFn#aaA#`lizVd@{AX#4cOq4{z1L*E=~n$sKXd%twt zxa+4k%D&nA+xp#;^76Ogl}lI6_17jA*Eq(5wt95Q`@*2_h3kI|ZtJ^v{CB3|Il*nc zgC{3C<6nxyeVzmR#~S<8ZH|rJx|26n-0XDY0D^mr6|6D;R7_y7V8PL;n7~{dLEt7a zS6JuAq{8!n>U4`&TyRM&TbR}Vu6`8kw^l%wsY8M1O);%vf+NTbYd{96mUP!w2zu8kSc&tDXSg z@rn=F;m2_fkngq+;Z!sr5eXRE?K0aYUNfezs=>_S`dl17D6AZJ`JI*HX9O%5|06hj z@PTW15Qh$M2w~!AB7CrgNeP-C9uk7))k6Zlj7{%d0qTK!M(yg`G!_Tw9s6#iKfkZO zpv{55`|jRfqduj6zxa_$DZP8H3tu?n<44MJP8Fg{*ajLyNb zbMPs)4$YR!$TGA^IDxsvqZ*svS8Dpc%9yG(K`pIRb5wQa%PUF)bPh75@EJO5Z)^z@ zCLtzgUbjtY35q#FsRq|a=}i)9QOfEv#hG^O z%I!s8P!eGadXdA^E9Gk9E8fjNzUf7oZ)c4T)14MgkG0xD2I5>!Wl|nW)s+s= z;2y@&Kt3!vj=*+7Ob4i0wD08Z)I4#8RhBB1twgP;J}TnmiB7@JHXaj`I<;p@3za+k z+pU%sVLO*Z>q1EGgS=N~!|rutl=Vq2Ap`k=B@rV}1$Segr@fjEF>?M+91al@jy?kY zM4X<0Hbp=cNB`yF^HP-QX;^kAC)P4OwptiQ0CS6WH66fNqK%TIqCpNPP$LmCRIR5S z2t2AFq?xFw4iW8&7>F6bphD6@5_=2IhP8Yo=gpDk&?Z`vm}C*V`-@3?(`x9|5y)@` z#%PPEGb~gOu;3h?9w-Fx@)(pE&qi&T96j_CkrMmtR1!fT!03BM1L;KBZ^2hS1l5U1}^s`=ZNmztWn+pjWMf_-=fa}4=*c&)5SUu%Wc(q ztNqxOe-=@VE@))BqnT}Nde#!e9~5~%vi?S*$!t?mp6Cwt@gZhVn(kR+&xKF-3Sjja ziE7-5>Rvv!Y3@lmhsDf7$1|cMjf=xv?7W_S9)o}0*d5?h3S5 zyG4|v{1&;Tm#t;f#G5R7flpEC5-o}P38QalLoq`Ar{eot2q0qgLlkx3zGI^ZoVg+@ zCc=gba|A6FiK@z>1I5ab*!LMAnn zTeNk6`;8b7igdHsq-qhSKMx*?t5T=}#|1=JjJ{K3J%c8-&YeY-en6{SxUzJX*3(C` z#iA}p74MXjg*u6si#G-HG{U2bCO!K}A7U7sW}l=`NtoCGjUb8y9JHBwVS*7X{iP&f zD8``_lSZdLPg`V25$CbFi6mVTDO;fF3y?o66JJwaNwPFYSZw6d9nC;1?c}pf>FSb} z)pbm{_^AB2+@WSfOEWsrwS30HvnFVw-28po zV$q^PfH~53XVN$z-!UJ6?O_k{mZMzIi+K$tL zUSo`u=0!S-6g8DmSvr)0kRpRrz1TP;`LXW+_uF(2p;($`h-(;6cf1qfH#cNmsirHH z*D_WqpDx18p7Pk%U^TiK(ycYfc0KLEF(q#S?Uw7Lh89gpGvPPD_z-JaCl~OdDsLIA z#BmRtro}5SHQsC!5Q(QfgpNfRBO2tiUIhQX|6gbLSE-xlOdJNRHRbz zGgsX5$=7My&x5d^3xidQkV0iR~uhjDvwrImy6lS z)|QIw)@)bRPS;}P5!(JdzUkR4vJbLB@gxwNIS+FC^Op`GtNV}asK^O!{XH<+lq#|n z0x3i~ z2HBIR%emB@ecthy7S={%s(}xPB96wqDSf0ykX(F@&0krop@`ZjFO!~J^ck1q&xUlK z*%Xb|8(e1%J6nmpt-F?RjVrt<6}eoWnZ8J0hCcx>_AcI%)wGD^!#9U^?L2OHU)cR( zx<^E-RPC@ytbli#7|Ewjo{*o>Qd^_a%!|1~iiDGL)lPM-*r;nbCw6aDBYpJ+XgIL) zLHemS^STia#HP+bn?ko&^`oPr%Zui^Vhr;0$_R4$f%_S4jq2&*3 zUi*b`z47$I$sb&PxPDf@x%lF;Ln|X4=8B8=t%E~Dy*V3wMx3N<_6(MMIrD7wKXW6$ zI(A^qNLlR17eDcSSw7O+e~MkyX+HTzbRsir+s^C!v*r^M(wb8{p3ENd|LlkNF5aKh zc`{n>`dAwlrDs&%u}d%9-p1b_TsW_O-fI=z!j%oHegHQ6E^mHwMVD)2Pj};8O z*S7rCnkAP?2hcC(-FQA~zJE+y=c^nyKy&2>?B$yA&#KcG*4#CI=F`nDzj^xF>6Ter zmKW6E81VI@+G4v8jr-SpqKwUn`AoyTKYRPwSk@z-v`*|3&G%kH6JK;XBj4{mEcIU8 zc5-5{zv?%Yp9IFZ1^88g4&RvA`;H{|9AkM^N#WAE7CS}*t-L# z{CB@uOhRT!Kqv_mO)sNT#0-&YWZ_QLdPQwT0$plqffXf)7U?o}9ZvoCh(a~1ERn54 zs-cM1C0NMRQISsR&Df}w;iI;5tZBUpcBpEpxDys{f>arO7Ommk@%WvLvgX-{iEn1Z zWNMwCE+*Y%yO4rr&lH-gIeIoN_W4qGmuwvDYm<|;2k6Z;R8~IhLCK_0&b&Y_Rtl8!o3I~~vQeHE)@*NM zty%dDjq}}U6W>~@3PHAPdPQGOkP*^NRs3$jaIs9t6BSJqL*i}+ev=&p#o`WcDd>~5 zt>Ys9alzevd{}3t(9UxPvYiq0@PDacXxIizsS=uT=Ihz7kigG3L^;MTsiy^{jYFvv zol7S@((5WOSP|L zMAouJ5h=u`4oK9}7RaPAD%x1x4{&CdRBNbZ#b*T0$PEZPnlg1|3=sEqvORTtavj^K zwW=)QQuX&OxKYP@4l$~h>{{ni?$rl@lj{|;T45ITt^hvE>}P{K3(Ez2Z>GJUZ2@Tk z6n16uGdaPKFQ!9euySmHwA9ZT*Vje2EWioqE?`#r`ch2Wvpma8>bo-O1$qk{U-g3| zISVm5Vs4OW2aG{H#PR)NB`YRq27#>*W^d|YnWRCSg&PF~!R8g?pvQE+i0y-fRE7aM z5mp&U6_Fp$dxXfxC^RIoem~C`D4N4>D$cZ8W(em!6qnQ`Ahnex2riTW2pU5*sV=3c zmk+rdUOO_e43*TP5+SLD+y4$*mR-Oy46z+z|6VrG#2jWd%7;0kH@_`Qe98pY;kQ9;1$G{tDZr{Q>UUb3=ZM^ zK9!eGX6|BjcI-Xp`62~WRq~#IJK2xp8P&9>SGbeqycBD+sYqE5)m|4Z20W||xVspZ za_efLeK1RPL8TFr%VBMEi6Y_nfYz6*sTyD3af@j3n0}=V7QwirfI9IAb%ZL15-%0$?Y-Fn zg4r$*i3}O+4Be=9WG!VmmQw~;YCdUcbMrIB%oxD`%YZDg0lJozK-MjqdTXb+JyxpY z6y9wj4Hto4V2Q89x-H5KiI}5an?>{p1k&83#J_;EP`J8^4CrD*Bs825Or<0(9Rzv? zzwpe$))>Awns_Kq5*d&oGbxK+3W-1?i~Smo1g>%Yije43%ECbY4XDeY*jkig@Ce*= zyWnTz(oDf+3$n!xN>}Rur+FB8dJ2ou9mGLxqoOlJGca3$wy5$h?v%V9wTsUxwzCNP zsnwvw-N^h~{6?p!P`n#v%6cOk&EVofo#2&aGMj-}Iunc1SkjVAahTv{b!ebSQ~d>i z#(_4FOewX2q?-s{YnN*Io}Dq)*6X$k@*u68Wp|>A?46~&_C2>syCI5d!3@67ZA6^B zGuUJ0arR^f>rhq)d5?M(gtwEPRMlSKxXkPC?UD&K-aB;z^5>KF%v zy(_aiJ1x9P?vkQ-h}FU-F$f*{B5S$$I zDSudH^5uiOWfB0oS@uSr<+qwR{7P0>-$=stFdvp~LXt)QjP|b5CpAi@Wo37YC1Sur z;aoR&oglb%KE%g5Ae%vDOhde4QjpTFWo=^MUOA&%>ExFP`IrDKgNwZ^XqHilDZ}IE zS@CJ_R=w3_4V!i$1C^?$)n--k=#QBOf^*MeT0kVIslsC-Ll`KfOpp0uVxjR%Gnjhl zLx{8|2#Kmrr8s`ou^De1g!(c)QKZ8pTHu8QyAW#yg%I%}AtaMwFG<*OE)<7JW#Ydm zU~1WOxS?z#dx-6o8CG19`EF%v_Z-$Qq^>L3D0I912-x5%{?YuH09om)wtjcNXBUa=ChxuZaPi(Ph=i-ZfVW8Hl4omBS}qkW z(;Cl(9Z{d@Ldh9L|Xftd_2gg_)v8!r`RGQ=U=}8koaO$X^E_ld2(t*p zl{M@A-pdEIV+3UU4?s@GimkRAXa>_@8(-GxVD2l1{9(fgQlh z7~}rm3#up%;T70@szFpWH{0&A$By$UVg*%QT}C4B zU-H0lBq>6ndH2O&bIjV5+Pw4$cUds@#-^CsJin=$f!&%(*QwpWXz7Xy%RtVq7(SHq za!Jrse_8eCFW=hl&i^F&@o6UDjp~apS7_P$uX|!UQz{CTKM|wmibYr+-1Gd;^i1Qe zyo8~p-VYnD3UdvGSKQr4PK3p19UFF<=kxw=Hn(<6eO+*V(!*SNA<62kto*afam~xx z3V*Kazb$%f>LH7#z`2e0Gzb|*caisKD7Z*@H}}o_*5AFghc^bsP!FacTpRd^feQ__ z*j#L>CL`*Xq?^!#MgOA9JzPida~a4_%+zUD2ys_6+*Yg2@^Ey3DsR!h^0z$?VsT>3 zFOGzHqSiR{?$15i1H)ykcCnXYy6e1JdxFV(M17Jt*&OyAcB}obtm#hfF|!BBbS$2_ zoZ2FKuiGlNyS)6BmgZjfd~L=XrjhMX-ty6~9T~9${=-z!9AsBt;ak(a@9o|)(MBwM z08RA!g@jC^n=?`LTgXPwy-S7A7-J4uJ~j}Z7x(zn(=Dl!8z(Z3OkB0L*ryzoj)&e8;jf*Y zsh-3uDmwWDr#JaQ_d?GlaR%wN_d+FIliyq&5~r?TYiS<4b_MvC`3;psVblEIUx>}f zd4KzE$de7FXQmbvjSd^%YRD@bX+$y%gVb+tJ+jn>6i)fI}*EhBm|zbX0*fKRoDGBPJD0SReSr$^tRlE>DD1*E5C=b_`{ z2ee;$Uv@f9O;vWa?Dq~;J0>Ta@L$B}!zXbf0!>)x=`;dJ!KQ&@Ynye7bsT)?vDyD{ zo#?FMTaLeN8q9ZF{kG}`vfFfH3JL%P^G0*9ISsDfHYYxVd>0APfCs@nku+^HH}MHe z+l#$A<_WHtRsc$)ZzC3LPRRwhBEDK@@KS)M=z#fW2bZcd1CIMmH&kN*Pdvn4z#Gs%vs3uM2IFwG9ZfLRL)as3l)LnKRW>lmP(} zDkFBRXdlVV(%zuWEwp!KG8p!+zdw1C z`V$DCdNpprP=y0aannxwPV>&=(^T@;4?=3aYT{`>fn-}i8H{`q~+0@*PM zxC#m68{46jB}tMb|A!yGMS$QS8D0y}MJxkM3`{h|gi$$)Z~x0v%)LR#(s(!xr((i| ze2l>YT+x&jmSTH(4BUS>;sQ>EBRvo-r!R2T)CCUbfiBF@UTW=0S_u0|!NFSi}Cx6ic9i={G5V@mdt~xG)SFqfJ{<$ z9`Y@=jaw&Nz=-Sm2!>onH2Rv^@M2aT+DZCk@cA0wTUb64LN9Ex zo~bQ&$gen`3$eZp3XMDkRyA_-FcmEG1DP&HP(*FQ<_U{1dbJ5lBqm|XBrVm*)SY}O zQi%~koedX=3&wdIW|WtT;He=aBjJGqe$n?DnF`2_4q>I8xX<6PrFnHum=sT?2?3Ku z3bj;_lTJ=5>w=fzrlW8Ma*A#+)-#{Em?jE6G=PBg5Q{HH;JC9%!$@dBs845;Y8YTi z{QEc0yaogVW&m7Ot})Z45;c&>fB+p_qLRRkMQTa7%!f#nLG|FAFXa=ZJf?XjA1jrC zk5K6a1ICuZV-3nRv%ncMbQTNLE&}PpmqN2bc?kjpOaOCK2(*k3j0Zk*AC}@tvxsn5 zB1{Riv|b1&WX1ye1=7IRYA|2EKjP_RUf={S|HUYxdcL9&!+`DIQZ&%$jA492Xuu9) zrv1iCPC8P|N1`y>EQM4@Dx6U91%grkBe2ox&)yLG^d6K9vi0#zF;?kb0HI`56`4*X z+Qn2-?h`)Hyod>vmP$(7${L7BzNn%TBZ-tbh)?)ailRnoiV;%Dl|UySWa1^wFdBiV zpH2nqfg|J5Smg_(^M!(~q%@S~Wu=!`s?15o)#a}iFha!7Z%C0^Lf@m|dE3>{CA?J9 zY`y}Z6wazStd^$<8d&xB67vW+r-TZ{$kOFKxj-;&KJ} zM5kWaLz9S%FH`2|swr-nK&qbcV))qr4+40(0P~-u{vxSHqY#{jM89!h=>Hm z2F)eFftHjeNkT}`LMGZt9PJeEh;pNR%S4%hmO&S25^i2fl1aQ_mZn)a8jBMaU;Jmd zS%^Tl!e&&=mrr^w_%GE$&h+B9y0L3J~Nf51sj95l) z&6F=ge4xZ8o(AOvSyWl-v!#Ln;tEz`gx??mH3)vv2*ghcho1u4U7`jD8AwDyDWm7^ za7agmk#=(7^a>3X$;ddLPc_SE8`xF9ZCu#RurLd+#wY;3&`@y=ljP#=FcL<0hav{S z+qs^IbnzyEvXJPU?X2b&^^|`+^>-$-nhljkF;*SVu^l!k?`Lo2J(x(VffEZMC~zX@ z2RA&6n4m)lFc)z}5OIqpu{o_AQlmAQ|SnZMq)H(131!03m1fWOg%#@ zFJb&kRM1)yEb~jUz+50zQoAt1I-5*IL|KJ=wYXZ0!M}T!NR;lS3Dn0XPnPpO0A9*) z@Hz1H^P&$Awhl)0SxBNl(j=#8pHi7`Ek&ggvP{NTE+%^Hkx!_KP#Fd;21aM_0P7y; zne;FKkYt6#C&eX#3@uR%eS#}|jNl3%Oh9~HCkr5aMm#TXy1ndFZ@dl%{H>it`%BNKEu5C_2kTC#7)Bpmj#a6L==@?Ypol{>G~+pj4+Fm(}6NP4`u=NqoY^D9xDq%Qe% zX5ik5iy^#Q$af$=ukv8ugqZZnzi)D|z5RoHaYd`>4zG^+GA^~49)(uC00qPc#D}c; zVfly|N?7jcsQCEs*@?#TfK3_iob~@<`^Yv%S!>QHnT+k#qSp>D{Cw$fSx0*3wCCma zx3b>YQOyUn#utT;aTizNDgWBN{4HIW;Qs1&?TTT(yhZb9fPF)J!EpUbi{iE3OQDas} z&bAdJewiWhqZIU7MBcWsfYZB;!)+BAQSP2IyMz8L^c00@^Cwqe8Agx!-mi!A7EFJ! zFJaZN<@G#l>bsr%l8y zND2UlkL8-!EaOjD2B%dqB0w$m?`r#5B^Mkunhu7e+l; z|KR1(Pj41(^KSD1dLb!)-DqD^+TFb5f8CwflU?{i+l`OjO~`rV-V?HII_K`jgM}OJ zubD*pH{Ra8>#=jsxzU$;UR;-T^7lN=^!LB*zVx`VvSqQC>pHLT9^0(#@%%(T?&t;z zo~G!ELX(HMl5q3Z&%Y|C*E4zh#@NjV72ECG%LfO%SH!Q$2=TbrCOS&ogN1+Vl3wxX z)^4V>zzAIk^};uie&BEhH~~-(abJaKAb=C%ip*`87r3E8#a}rE^h{h7r#z?VGAH-z z1bxEQLOWdz*5F@vF78g9f|o8~z>(kJf!Cy%3$w?N;*7U{ARd8Ze{0^R z5lWX4Gh*KH7r+R=Z5cMZz=?lbzBb$2x)uz;NDT(?w@jWf7sigbo*)IFhZ?!}1Sx!? z%Ud_mpa?JmS(8~vFo1ap+1|5hEm_|E$zWJ%{-$9F^4PKN#cg%~6|RzRoD8uSJ9Z71 zoY-Y9IWlb)fwajW##}pg%|Ux@SDp<0mnW<59h`ZlRHCP1kkVL~SH*(YQ?^F325VO= zcp_X%b3#u(beS>xpiQxUOdPOmz!Z=Sr4}n1G=&46b95x8#z(A2*MmD%Yq*BQaE`mwN)?X%Qnrx*j z4r5VhJ#q(sPl%y-d|p#rK7^$>qrs_E`8v@_A{EbQ{zDePUsC}hgTpa&Qap)#O(5Wi z3*AD5-g5Z`@s7}&?N0r1FGRCI%oNEWhY>NEg!+iCr1gy$oh;)`htN%OMI(~frkl^P zqFQRW2F*j%Qi_?EX^?(uLn5suXg+LZp=K39ZH>G|FkO_toQCRIE>z4S(nHEFAD~?r zyA>qXgh~?iI%O?F?`6m&d1^RT4oPxDaY-^J^(7Pp*rwy>8G=DKDB3loW znk!UIr+O9(L{Od4EMEG(RU)bzkSL%yPNkhRr~bZK<|ozCjg%eGA$(*L7KK!Qc#(_6 zF4hLKXcU9$P&!pgvZ=JWe6RtBR)s-$mijz8qjP`Kly0m2aYt{%rW<(=4P+7!dfNzBRuItTc2AX4v`7EE`(v zf^Zyv+r(OgzuCdE>LNluFFRDSje7>)h?3u85|at|EIMIZESYXVE1*G4mQ*unXh0cq z`E1-+Kn3FcNHZ0sr!0S$u`prdg>0NRNR2(*Ec+TJa5lLYPd>^lWYLPE1#3`DXW&42(f zgv$YNPHBSda1)OnE9Pgx;8c-q`o9!EqgD@OvRv9^5TLP$x@_tOv ziIkB7${kB4i0<@5lm$3S?sZzbp2W+lfq;yi=LA>ocrjS3^)Q=8X(XiTb4t+w$AV*0B^u_W6jBm8#6yj&m2X1l zL4FnlM0tXDzt96tZFG`23k}C*%W%prorfR_8FnXZt;n974#kiHg7bTJF2ng9K#xjd zu)W}23aTKnU3DaaiEtFjvlk#(jhpc<0;7Glc8L%SlwKGqYHI8;@yX)5LSzGHGDv7l zgFQq0a6z4;*~-r36sRiKr-}(i5^Kc@VNl#zE}J8WcW_C+s3L>Jw#GJSJunHOB9ATL zR|7viT`m!-aMm91ZAaxFZhg0J2UuzRBT;^8FDH49< zFe|EfInFBOtP;G{Y>ZAs-^aF!7XFw(gVXu9oF2VKfuKv@R;VnVv}okQUII-43Q44m zcCsra7)PR)ij$>09ohk^Z*d<%TXB%&L)?N-3H+20MQ)Hb2N~UsXG5iC7q)QpD9pbh@_k{vfFiNVSiaw{_5*pM1&k<`N z6Fdxn5zh%f-VhsD_6puc#u}|o7}u*Ruv(&=M}#mJnJh`vv1FO+D?_@hTviYHg5>Q) z=`vxNm?#gGioSBru1AF^kpAtRH_i7c@WGS5GDc9y!F~h#Fv&8(4$1v_=@YQM8VkiFEC}r8NFR~(DTTmA;49$;T&Rom z=~#{0rDzCA$u})|3_>hWEp!UyJjioe^yf{#kt>;Mo~jn#&#&hFW~(GyxRYF1gXnYiPMwNu^LM5{*Q95TfFxTurCu z;Vq_<^e+*~Go%Ef7kWuHg0uP8K`lr4QL*btUvoRmw>$gni?S+hVQh13S*KX#CpeA{ za?>afRaf)6Rd70~S;H%&8gqD)W!Dm5?f-iNV$Uhl#lFU|j)9ZvWJD zUB+|XIr7cGvoLHwgcylr;%szQ~k$w26voh@H zL;J|3ANO#DE|1CEJ#cEWE!e%5Oq(B-)Kb2WO<%IRc4YHNi*V`TP{iZ>pyT6bHQn}G z&EG|jI?0SH(*=<#<`g?Z@5pNyh5{=QZTNO<^1XxIIXkTFc#)GI`|8Ay(Q}x7Uv~mC z4P@uMxEoWA6>te*&m+@`bqnn>%F?m*!TEmUj(FN;Y+Rk{I2elE8 z1-9EZrcgMV9*b-xtBo6vK36#XOu}8y+Nkc=NAhxCSQ+y9aKZEEh3PM@6>c0iAB~FD z(%z_}d4tnso3)6ypkvXR5O^#ptZ=C(j!HyNbar$$ZAgC9TovH$$PzHA@g z7^GEAwl<#gzVIJMlsh59KK;ge2knlm`It=jXDd2l*{@Z|!>ad@V8 z-99{`BUHmXg14+ZbSl`r^w0Av#x@mn3*)<(mb9^(XS?y4<2(OIZi&7;nQ?q%dP&^P zLt|m-d85UvhF@M8((robj4Af~wdv=phRlDMosAK+Hs;q;(?+ai{yD4-8_03rV={s~ zr;EQF?{Kz!D-?V+9u#nXZ#+mPjyseDd!w@ zv`(JZUx%ahzluMOb_KN@9@i5?dnR{Y8~Xh&9;X17j3p}_O`}1UjM&l5n-6xjZ5q=I zcBguJ&UF7a^w;QqR(s-p)1NWJljP7gS(HIJx-dVDIz}na0JFtacJUi&gCr1AEi`zj zAWO(!3yK3SnM$@D7b3Eio`s(%--bK-{^(PV*?~3uho&cX4+7Xdj>m$us5f=n&ByuY zzy80psD&Uc>KIkku;xbae7i&cM(Tfmtj^%+2>QG4W7Qkf0Po#q7qy1tom%R^wPW1i z9}QnF?0q4v#cwPosRbHUgW-qZu_fjc+q!rDKt5`Es|wFMIYJ%H`)kB(3)xa+_D(25 zDkh7Cg!kRWF0J3#LYKD2^JF-qoDSGnSyXuTeSOBl_uF?LAE6cuk;7D7Aux$gv?~D9 z0YqCT`VCLAR{#HD&DDm&_dIpFjOp*m5n)A@F7K~lYG*f?77V0bE(frIT+LGywF1TECY>R@_}r0~D9fpb-o27gQV zJ+#c48?1U2VpAbt%zPdHibi61hG4da7t}_PcIj5E0E!X*g=cteBbz}W2{|@SUc&!nwro6xvGvn@N^6sN=9~yOK_t^P^&}ru?kd1>jqv?b?FrTsEv$85X;Z3p_s1X5Om0Nw7b*>H$1q0FF8pVh>ctwD8>k$5Ms zmQ~|9B$q-a_i$ZQE%)vq)`V%X9Im2MN$_1<-FJ3 zzyZ>OsjzTRljmhbIEk`&IV~>*bz`;P?0HzS29hOfWFVve7WUk_=uR9?hG#zqp?p6c zOBr|zM#2K>FJ=Gca}98rQ{gKCL9#$uSHTNrK{QHDk^rP0BG*a|)RJ4+L_MXJe1ZcR z28uTl3^Gu?K&9vC5oaLtPzRHTqSfx zb|!5M*Cye~4LWK+Phdx3oW}d3;4OMK0I#!J9kI1RKO)uAWNA#pkpWeHWsI7&4sygo z0LBY7~54sr!%~kCB<+VOju=bYL{7?{SQ?v zvD#l@7UshP0?av)dKLOylO_^Gj(ML7F;~ImuxHenl=xI5^&Cy5>K->QH4wgT7T$}~tHt>)INZhV<-&+Yg003;el?@G0dqyT zlkg{9h!~8AK4p|Ab}^vN!SfPRxug_suEmp^Gg&)HvLqwaAoJj|ie{>gM&7wWV4+gX zC)5Ry^;1@YlYvxIU>VuN*XXW#OU}B)u9BYS4*W zNmwRehh12CP#0T?+F>tBTBT&rto@Q8D68BG%TgdZnK*@*8-jCrSE7<_0v&<6R)RH< zB#(4zI5e_W$*03wj_JCzMhKt9a%{P*&UQew{V%Gyue{>iPdZ6~w0oRfga-eh>9U_b z*EFE-7vjM}%A zSxSznVFP#@h@2o$q5%bQ(jp3r=w6g2ed+@ZG9bb8S~Jtn8|1zku8*t1i7JA?>iMN) zSS}mJGV;;_k|s&8<~8Xt0(GFHPH!$Nwu*-90n>eaHiG5`Ou;9q&uAC39u#7 zK0YX0iXcFTNIZ>{$}Yrgdp0JYtE3t(pCb3vG*`DCt2x`3a>LToI3d(ji6{9&7cv0q zE^Z6C(Rx14TNGQ9FxOkopT8Ez-f3&S-=D174+XRZ7bst+9y)uu9P}e|prP(4n^JDr zj*89$0{>YpSJv>-9q=oLcd+G1D>=aR`ICog#D=V(w_keN$m$AEm{#e@l-Oh%f50|U z>Kp3yoQ?!kOH`z)h!yoeVwJH`_M!L8d(h-g=v%H2Z}Yp+bP668SoWev$tJe~0h3=f zyzu49d+Dr0SShw}$A!vrwsO-~w?xo>Md-E!Mq-v3OV-+24%>9aE%a+lIAC)~Al4q<%zs_7+;)E|Y#Xvn30_Fv3Hu88z_m3cw# zdzZ_;x|Z_J(rRtwW7U$X7eCeyDIe#Sd`(Y#Z(JMKAor#j*fa{m+BGA)P{-!S;SW9? zD8$^YXS4;wlYeO^Co5Mi*-&`Nvq_T@o_=ZQ;iKTfcdGJ6W^P{u-AGfuODLSIcyQiv zS~tG);~3%SeVuzlf#Xb1(a6h-5}@r#FMS_!=Fz_*XAX~S|1D)R|KxS~^1=A8+dr+W zq`O`Bsbh209_DAqSAVc~=l)dVNnZI~|3xH!7uXiN3ZFW=rh4L25={;*BNJe-+wE4@RXJX%=LO&>m7I5d4` z$?eIJwZhEqnLTr!e<9)2%(`7eTc%ffTh5JNJGrD$yRh-K7GW%Mr{fUpZ7ct(@$>G&QI>_|1oH8T4Sc`_|Oe;gs0CA0`5$ zuUfjpr?>YysF^c(;fdk8_U`hDAL)7eD4#cy{X@^m&k zu1_!ic(YTx;ZeBr(?1H|nM`e^&YB6+Dhd|(Ma3{5tb?C>_&?k^*Ag&_hcmtfbg)A~Zn{a8c{J;6Q`g{j; zz!ZG<5A)kMUl_G+TiR4TKMfCQ&ORKXsewZt08@&+WShN2=fOdA)=kCYpcDT!ucTIQ z>lXT+fG(Y3I|#_#vYvZ_xz+&8W$0?Tct-iN+SUIDRdw0$Gd-n9ZZUWiR158aU$4q9 ztf?)?IQu;dQgW-Bp5PVD(552FdsGo3xQ~Nj(BNI62IPz)84UZL^p${Lt7_W)l1Icd z7LJPHPX;{i_%O9TLtSK^0`o2n07}RXKvDL&7SM&_doaKqPd*#IKdJcRDw)y#1z?1> zT_y95k9V}J*Nn`1dK43o?xo4@6&+va&)%CQ>0ys9XwtL6pI8+STwrS@c1lX zdOpSk2+ABbGM{8SMb$l$LS@Ma58S*Bo6yS~72>)K?#Vn<(GD6^WRO@qupXD465xE( z9Tq5nLtI@{70?z?Vg~x;`;=Y)BhwBp*uYhzWo6_P&y+H#8zoe2Sy_TUiH~C5>iHuFgb3AP&WhklXpzY#foDQ{g zrRyu0_68!>YHj0+Gbh%pnP+57aym?}DAUm?aJW!|FJ}sH_FF+(h7aO3y>oFhkJ|M* zG0}-8v&1%BFIe)oVg$kX$r(D4Z3d28P8z|1mO!g(V^kLv6581f$=G8qW-3j@9j`w_t|{teD(jp>#|DV<N6^=-K54XY9f({YSkl5?29YvP{CD7S3w4XZgbsBg z*-2imqdD{6H1ioRu>_KGZW$ALgO|~aP%5-CvQj-m?t! zwV}_C-$x+oPIAHi{6$2?MZs$QO0W5@tCqhEw<86*KxYBh6xd0cnyJ7b65-{7|J~+= zuSKKG5hoi3c#ChKC`GwK5)6~Ly~g;G4z>dtD?Ty;%W%oddU4POA%WLO_Ew;qD*9+h z5`LVH4`-U`XsYztpbb<5S$2lUcxa&t4|P%$zV2;EYL(KUAIGNuVeHsbr9=;_BH!av zU`h=TaU%ucE6KL7u$c{# zRG0-mwfD&X>q9^_K(Rj+bgO$+^%4ML5?=eL|-3y7~FF)oiTqD=(G<=U6gG zRmjA+FkDBzN|DJWFpb|pnxGgcr*;_|Am~e<6XymYL4LKMy-N*mI|Xp(XMtS}iSbz4 zzR((mxm3#&jwI6k;|(8RJPU*5Ru;ykeiAsC2hH>Rio{kN0?Ja9EaPN8z93nRFg|N? zGOAAA=RHB@!_=dzX<*e^3BC+S|A3#>j)C^zAf_%*t zTugE*<9~}mx@$WcBBdx*Z3GL;7w<8UjXdSAhkZN9O&s4R5}moBgW%QQb^vqe zI_+FUFEsZxpAkX1bC!UOH6_TYz2z-YV2jFe9Nw zktSz;;wdB*8$d*l|6t;wtNG1_!dPeLLd#DZ*e+|K7`d+QoZcy&p;EHlH_MK z2KjqrynVlppT~qh2rpLN=cFeh(@^}gd(yq4$=NjrPQgPPF@|jc-6g_G&}WlK{ynO_VcmC@%+XW@JgC6p&H|7J3?BA{yvsztucTCdxty>AXe}7j=me z%qP*wm;VC~1#N*)^C0D;k%r>1gsWis$pJcCzM4P~0Q`MO;9Q|0jv?g6Sv1i6x~$(- zTjI7VxL#*3ag!ZuUQ?y3u04s{D$jI|B-7eWJ$twtNwkN+EAeACllv7ztpoL560dhS z*jDA;te5N{00g5x?fkOXr1Nhm|5-ds2DMX5=)m^OHpmk$GEsEkFoybX$4D=SWU!vT ztQZLDNT*T+WnF5z{RHz;or#USM9i$5{T#l7)bnX#G>HbDs_Q4S)O+z@%t03LW&iO= zt4O4q%|z*UiKFZ>VBK-D4zgFcMP>mVLl_eqA0qTaS)xB>q3QHuM=IBvAImbz2BwM{ zqJqwbx5EWxy9Hss>cuaO`;z=`fxC4YU2#39Dl1pRc?4tnXwO_$Xo+))pVl}dpr*h1 zWGlY_*OFbv7<3NpPKPj+}Tg1W#Idu(4WQaSP91dyC~li*s*BFn&bM+ZLU*xv#d_y%F{fT0b zpB#(VR*vARgCZ-M;Kl-!w)Bpo;}#_$-930i*r{%f4!8~sqys5^orX*WnJGG z8x3z>ld$85bDlM85?V*%!d|Q+9sTFVJjE#?#WN>f_@VCnDG&ACLEG;^?$c`%R=8DX zQX0>?b<}xxclrCbTW0=D+Chx2r9yU;oPRT9TJvMZHTQws7NU>1ziRBrD;cru$SVm6 z`1pz)37-#qKAf^@=I+=#<&FezV_@E;Lw@t!mb$_zfKqR7oc?rAa9Glfw8`=>T7Gg* zZ9LD{d>6E{m1FyjX~&AL*eL1$>y2oPp6JO_xTro_8#$U$y91j z-saJfw3+6g{yFiVtb||2PM+Ix?)GnwzkBn1+T{Gk49mpG;-Tc}><8TgqnoOSmU=dC zb|6zP9Qo#a_t10G+QR7^{#Q6^ZsDK5K79T}bi~keBdYM-*!Jv4E9acgA5BQT?f)Qp zsN=&kpjpezqkj*5`T6?EA3p7dvR@vrMb77zC%hivv}SKa<~ z_$1lVHyn;Er82e+Z!~w0y5r)9Udwv1n=U4%G@7CO3D=53rRS#)9iLBJemO#U{{F<` zbKPSzsaLpd9^6!NHq1hi0mF4Rwuue6Bm};fYf{ zp4N(Qre|)-UNboSJWKMG@o2F5wM=d7n7yca+ilm~|H|z~l9q%t#eNd<4dJSvAngyB<)fZ8X~VAk^h zFa?GHD}QG9lfjYg^)mxMe?XE$|LDn-Cy%d!LTbnDVA?$}g9M04@GcY*s-|>;cER)# zFg#u;Xy={_o_zmuOXP@ag#*w~*$(m%c)H^=XW)>N_cs)o2LU{5ZZUXA#6m;6dj?Fi zf@x6`e>7}-y!+(;^1c8{(OACE){ZMwxs;}al$r9fj<-D@>8 z0{@5VM6B@a$oJYlV)hzy>Io{nA^gRUoa&Z=0#rn0v`A*aDCL~h6NvDs3Q1f|4N~gBw zcEIEdi=%UWbSb&f#7FtCs-Nnj=d53U4y`jr)`Iqgv?VY|jHRvq&B}~?&)w;HmGffJ zauMRCZwC_6d{_g*u6!-zUKeeX5I~f30jGTOS*wIBwU9n^e2vc&QKRew=^j8GP*ntP zbs|D8M*fZE0%_4o*&3+8&lk9}fx#wC;p?JHWoU8-WWkqFG(xH8%5Z2Y4YZd0V#&56VQ2A+_;ao0)bP%HMD&i7KM| zIk=XvOXrkV^xb?`FyWC>YO9%%?8yN+4K9ugZUX-JF1qBRZ4k9^ z!dx1uqLc9=S^^)YT@-LQV5F5{@#UGz=`Pk!viH^^p4dZ{%FQ(YK@K9UrYjl>5W5&J zHl!BdIcj}@f(RnA_{`(8$WW%J3z61^mghq6*nAReSk|AF(Vvklj&-pj5ef@ZEK~|t z+`<4Su$Nc)JtfvtX3`gUzXwpX3$oIT*b4|kG77j)=ujT9NvI1v7YW_UpO1?Q33nVR z5EM;}#>JE2t`1fx)v56^M#`v>=FEDOS5cxIV}ctE2v*{Jkqzzdf+YpK|DaIkcUW*T zDeOo4n4p?Qj^ObiypiFIBHM%tXf+xo+gV8+Oi+PJkYp?c9h+K} zQsjM+z?EQE;6CQD&|*lQ1>*Ob;Uq}U3w(o}Zil5&jlfaI1aOJGjC-*Yjz$tK1d-U8 z(O8-ZS3-X)vdClbw-$mW#7wSpYaAmt&_rX>p2k&-k}S{Z3f|VxEt(nPTcQ=HHV-6Q zIO7M@p0IK+bcOQQp={3_m(rO_=zZ233Xr6_$nZ@FRLSjO?ocip00}W-%iY;w{jMTf z8Y@KLfyv&?Cn?B2AVG_+3IifJHlmraZWkNbhOm`v47*;UL6LP$Yn&ujCNsW5e5em8 z2x~&h`+wmC++Jco(wWg6I|S~!CZBlK+2z{*7}$}>%3C%ugQ8!^sN zqa0|1861uoxLAe>?Imu&bqX@c>BNFiS3dHYfXf+PSc-p}Lv#xB!v2nAvN;O82aXa$}pTFv3$rCje*GgI#u!kJcUbM z2fF_VYuH>0T`o_jA3UWQWY7Ydu_$kKEoQFO63W@-u|P+y=RxXO3ZML@$zqP-8Dc{& zAGFf8lGaRZvSXt*CQo4ur2Vri_+dH@lhC|e-I5)nu(V7j=y^m*22OmQ795G<*cy0 z-S*m=_A33bhoC<%FzFTpZczWfvRU4Z~E#gKsn5qk}OeGJp`TQ?T zK#!@mLz_9k4IG|=u7sU}ys7k@hROo#>7=o8Aezf#dzQzVBV48(OlC+1(!=2{yjytq zZZQEc6wyu%8q=p<`Oh*jcs?4?@B#uqZ`)afb=g!MPE{YIM@0s-_aJkk!`KMs=BBOy z;)3aD=DPb{hL0Ao$Xwzzd~FZji_cEYO8T?l#F|2qQoP>fHNn-UZy0M)(n^sd;N#vv z;syI$z*;-_PDZHCAtPws*v1dDXqk&RNqzSVeFo{YRPePl$Spbw2N?W{V7|B&gdQCN zoe&KR3c?GR)b=d02nF)#2(I$`6La9ImnxIL2{H&hjMJD@QdN@gwKKw1#=oSXru?hS zSIdfD)zN}&JCuLC+CPc_rmsQrX8sxLFcx%B9H4tIdeljIjUM$i#X!C%t7$o!g?-9Z zCIuWMwDY$aN1tEb(r~vtaE5R&D&q*DGH;**$Ud-b9S>#-(a}_x7o1$8C$J@4B|6zjji= zbo1>Y?)~}NUQgqKmd1NrvCVt+pSNF`n7BXG=e1nZneW%+ee(ET*6p*~_l(S0c|H5! zuhS0r+XQ% zxK}uiMch_+)+X&<_tVm`dvDJyp0uC;z3pK0@J}CTf9}3|8>ltoZ(pAjD%9Tm0-%QM z{=|WtDW6)1W$-tJo=smC%;dX6-kWM`%{XwsY4n5SgD;MMRiyoEXzthqsg3%uHsN1W zsNe`0zu%kJ`3~Hhc7}Y=IA%NBa&qSFg6?m|uibLk|19@Ry^^7c|NZT$@PL`$hL^5P zC?7>($36GDU0Z$~dh7A~2zaGyk;085FWd(I^d~|JcWs$SS{q=@nE&IBnWnFYcD+9I z^QRM6KWO>)@CO@aTr=xihW;p-avd(jAFO=)&qof8?a1HeHnnzc5IW9jw{_5tUt@FR4TC)2gPY|VrJi*MLYcG1mZJ?(MoI-{i z&rZs_R)l%_K91XFp27gp(~fy{>rU$P;lQ6bOq~1hk+4cx5Ail$-Aw3gLnR=yzjgVo913_Y3N1&Kc?P2s)=)N|4y=FAG)9Ydmd&ogdrTl zOa>Sr5{XfxwZcp$VS+#;QX8$^2t&1YFl~|gQ#e2 zDTr>{-EIp-YmYV%5E13Q-M@Fe>s?FcA7>0J87KGmzOL(YfkA8N+GRhtqn{ZjuQ21j zCo&@rbtRMPnZ@w_YxQ*L%HQ0jOGc@gCECos<6J%WYSa|c^5gk0+ZRld=Jo{>-~jF0 zdPi|eocwNOb(?MR2jUnQm1-Vdh1GR40H5Fq+yn=JPe`el0VOh_Gum=p!wgxjd+py5 z)2n{3N5@-V0M{+~NSwa8OkFd5bYW;6XpzbL8H`xKmpHYf2~1at86&XbJphNWkHA$$ z)gRkVe#TEpj_7cXLW7sAp%lKWbu64HCrppx_XaP?*bn zn?@-n2z%5KSqa0aEZ(@L4yIR#TBZ*-yYhv#3l@m=j&d@l&*vVdVvS5WFYe*f`6f); zMbY9yVO10VnN%5%=0lp$tqCSW3y^Ul#xO_0ZCW1YtqI|cWV{1d%GP%F6~(k6EoIa_ z1COIMh}WRFT(9dllGHGGi`+{FO-1FjOa&FVO1>vc#|5c@RgS znh7n2d3rqwvfZXSs%p^HLG)r5ft$UlrJM>vGBL6IHwFJVOx8l1a4v_HF!s5SBujOM z$F?r`N~{Qp86xFJ7(PeP@N|!NMWg9*Iv&Z8bU!W>XS&OgsuV z1A|sNoK3B30Lw5$5wdx2+Z(Iuka=`o!fHZL(+!SL(no#Gl2C?=*)yjeYb9+^;M*hu zi_AeWZ~Q8FJ0sPXtt285oF*GW8W~uP8|dsRsii}Oc958mo=l>iAEZj`27c@aZm8)2{gz4K3ild>k$E8v(h7NfVo z%-aa$Hnd5AQWPC03C+xEk4iIW@ev_^$%W=Kkyz}2 z&=4t@kcAO{N7>V8T&(F7Wu!Oacp95RAEozeq8d-ofAdU5tYQSqNyq|rG}EI>)wgVV z+6o075kj;w3E*W@Wr#F32T6q?`F1)81Ce+(wS{u?a^N9s#gHQmlxL*sAYT$9(fFDG zfHWY4RBwQ#(T6R*PM4LePup9s#?9G;}fL0LE@>X)5^$bS! z{Rom~8cJ@W9c&bxDpyKlc-2#!835JBwrjNs4-OK=zH4Z%@SkQCy-8`D*qhG)G}mUa^{Y5IKM_)RMkY6_nm_>ve~(~ z3JJ<8qK@EDqq0S57Zd?cjAR2t1YjY*7M}<2&4(-o>TB|^R!vn2(v+Ob@;N+Y>WScz z=m-~QHK;hH55GW?ws@H7A$re5q~{A@sTxJajd1oas2G@(rL6r6Wy2fo>xjk>A`iT1 zD;mskqiA*``!zZw^kqZUG|#S*A=b#Q5V;9Y_8^)jS6U@&X(W0MgSMa;mx!_FhQ&rM z*aJQQL`;>Z>v@F<dJR0z`YUJ@j(LtECmk0Ia zVA3jAFpPY=QkvfMR2f@J$RbF2@DS~527&l2WHCm{VOTV_UzAC31@sqQ5)3?y5=j*- zM>Ii_^dPZOQiA}2ua6Ek@{kWtHNdGv5a_I=5mK^Tg-8}-v^-b_@gk~~CtcYSgx6v} z5K;^~!zpzO03Qk<0<^g_PRwI%g6f2{|GTs-dU zj%bvSJLYv_x|ikzOT(bBWE8l?GGJQjsm?z|ArW>jxf`P)KzGB&pq|4`sg=E4yq?R% z5G%}^z}^L)3ja-U3z9GAC>7noB?FLPunCvKd^FkIx##lo%6x1chV3WfTf*E@ylNOc z05l(CG6^K=&~i$up_=38isY$kvW(Ni=iy@FvDC9dOe?1*N}vXY)wWUOfj1jTG2>%_ z?_!#=k0EAAXkvPn*NCPV(ZyCxeS9hv&W}wdFhfiqmqZe=T`i()H_u4`o*=kcSfFQM z#b-F_ijAvUmmo&xlhG72M5BXLx?Cd$J=2FmM1d19jnTlLoE$um z=YT>GAF=|D7(soUg~IalqiKOSOCPqDjUB%?530%IP$k)np;ay5g9AD_xdl!2QDr%R zpvi+^mf$>UghUY4!d5839b&B-6Tt40K%*Ibbk!-^$FR$QZ<~N}7@MKb0!t1H@$$nW zS|#x3m(G7|1-t^5I4G+CXd;Y@0lJo3Du6Om2$5lgMDUREOeS3z734U_+t;B!Ou|#_ z3QkBRrTxntcBJs#5YA%WdH^QlC1OEtCEh)QX2}Xk$ z>@X8@36-qi2uXAsQzpxzxN3$^m8P;}E1VT^HnXk3ttmpiDy4qsfwqN4eIlvq;5(l$ zYM9cH8aYF}wkb?yUIW9bpN*5A=1u<;8d6MT2jJcM zaP)1YvaP;mPvcxX*ZnxXH7HoBDM}~Xe06X{k?7*eOGSsis;jD5jQ@li#PxIteJ#S~$mHK@T2O7JdTeBte z+Q^kCi)u}$UU#a?h9dcZL@VVZ9>w=>L*JM6mPnX-_QQy^}hWd=Kg!Ee8c4j z&zf^rP5yI1Zq7uV@hT8~pj^wW@~bLT$952UyhsoX!hLi>fFE!Z#ETfx__+knfW&k&U${l zvDUaUHz&ZH%Y88Odeos_e}?(Z|k4}Llg-kXIU-L8qP zQ@Y_-4^95@N4t4){kHzzho{pEf1O@++Sd0VYpn1@;M)WB!t8UC{fD&wY6*l`)gRnl zqd3&@y!}4@^6ZYud%x%IpWFuPsHw)r%pHFWsrv)N*r@4ZEs{dK(K7cXR_@&it6PD& zPZcr-rYB$+Ty#FZRDTYb>c*6h+B26$&CUCH#CX?2CK@-5on4ZrZiT>^dO(j`bRmn6 zGew%)3kDZ0MI#ri_OcjZ%9a>T6Oe zM$S$xDF74Cw-h+60YR!eiVxB8-*!|2`gP@faK3Q26&!y2#h=I8z~Q#;Z0Y#zvt3I9 zONF8aU`1D4Vt zJ&gRdElcqONe$y<$6kIjMRcCgTmQzA2}~=DRe7mQm_=F5^tb;y+!vh8dI@(Yiw6bE z5(GW;HOU0A-OfrS7FjJU!O%*!Sm+}q8S+FbgUv%Vd%a@vlAtt2#u1X&EFRR5 z-p*$9UPpp$qzJO`;PK|0SWNkq?SdU2tb-SLX29GnY(fx1B{hg4j)n4L|cz5uW{)z4d==i zxhF6na2eNO7f1R+&>l?vK$gZOy|^6$j=td?0S11}>5MJ+f^oE$$gV?P@XU+n>JxgE zv2V}_8sdG4{S~WhprT@;2-szMr7sZ2CWVIJ`Szp?2+uUd_MzfZy2)Ve!7HE)9+Y!VMmemdJRnMKhdZ`9p-nQY56fF_NertcYV?#q>MA>_ z9Hdz(4NFd6xP+;Nfi)?9E<~BRv#u081q4E3yO@l~S@~BE-kl>35S(z^uiDe0S z76`3idDW<(>BUlRfd0ok)Mv+PKFEi(4KzTfw;;+nS#j)ZdZrfB95no(kLk;Pj|NuT zSWbWlS;A5#BOi;vdx@{PLmL?r6e)H@JGkYvXpw2EWVO_~UsAb2u9YW4 ztWKVw`EshamdJp5^x{dZib_Bln3H)-0|Q})1tQYi{q}!JYA^zUNEuR&OXo|Y`@n8L zARm*F=n5=22*4nsO>_{DMWd0RGGIXz1(I38WqQedv2v~qvX;x@rSo_b$I4DFc|u!d zAZw^(7LQXP;I*WxruZu z0K;Ms1lD!$dB*gf$`QfAqu4;@AY=}r%ssp)CL%F@_fxV4?XB4B$dq>Kz-w>x1QiwDAf-FPYC9>ZkBAXZ0k+UBhv+@trseng_Uv!6iH_r za9Sd8H89!3Nz5@aCbkCT+Kxe7oM=Y8jfs@tcA<*(!geH^%L41>)E?f0JJFD_J6Cs$ zx+d9D<_MBNgD4b{K+3lhA? zLcU0+SY{pdZcFqKW&mH)Xa}F8X~j}=XoAoZi1Zx9U<{mQ_r|E~I0oX0pduiM$!Qe0 z48E;qcSBu+LTF+kZ*;trW8wH5Y6S~Qrt$gsB~@0KWa|?Xjc#TSh1H8C>HY}1uI0I~ zw@F}^ND+5x-_I|lzxAGqcUlz1dDD4Rq9+bf_Xc2lJ@Pv_VS{>H)*i8}cT9{zKC~8aV8*Vd(j4W!yy$CAgy7pm~2atfW z9r%&nUR_M%fpy9XLsnBr9)Tq?2kCd&xJsR>iBGrV2fCJbQC=p*&$6G^d{wpHq5Mjf zC`Q8Xq*oR3_x#`0x3x7Sd26{au@oDuc}1kNh1&eHVDYL({f?Ya)YFWAOtp08-kO-Dzj@gIOGlpUY$Mv@03@@R}Hkc&UP%__2ls1|MAjCP4{VDmoRnYQgvH5`S9XsyDNY-KI^nG zll!hEHR?(WpKX8cq@i%BU-9Fehhyev`@g#PO2!?m>(-QjG&(U^=9=kPKa2@w27RM1!rt3cNhbvOB$&E?6*8*Ym zPhYMNcv^JflY_bKC1d>ExX(W)E?73gCm&3?`?0IqpYtD{|0eR8LkngG#|!=U6^=t2 zN)r3@De+S+ypEq@kLcDu?5lVIwlQOCooUWOlfU=aY~OV93n_@7JKJrX`PZl2jk8q9 zjj=#xf=+YW{WDx@&0m!A;%vpDT`Nm6zrPW|EyU)Id-4Zz_k-1y4{-Q$6rFJ6ACaCA!fq3xOJk5}7nJ)qubFPwer{7+|d z2M5EZ@7$gJc=Dqtb>sc1kvlav-?+(rD&D)l)K)QRUj;_TPMv1zIP%_XZR>*#(t&!Sp7+tCcqwla=i^6!>HV?W4!aUzI)&Ba}!r6 zb^HVV+jiH3SNoRnyPkje^0Gqm{=ydBiw~bZXp8-M`OGWR@z*YoIh|i!m>rqXciC>; zAANO8ZT*RfOKaM1-QU?d|EqhQ+F|x{;h_uF zlP`kNEyKT~27p{l5rHR0pXJ)2*5O~dh<)4C#vOoeF<(eIIWAx+U3tosKVF1Nu-}GC zcYGzpx!>^V3a*88sfHk+c|rR&sEzY&iAF5%kbNqCnb9RdjJWrRd^#4Vc|pU#@&Kx(Q>#618Wl6-Z+vTY#5P2ZSyX z2wmZmkA$wkBcTfnWBWE$C)>LAcNGGB#v|xPX(8#)yAC)Q9vir*4_tJGw1F3)!SHqf zT=aGxpl3jn_z`3;yOPV)Jnza6VOMc=P9bzOqJ(9#S#vg-$-O@zC_2p9mF8^DY8PS| zwghrHl%>Awu;C)I2jKCz`NPJ?QK6|^P>kk7!U84#Baqf$svM_`@Oy|+RR?34Ucs8p zYoGBXDf6_8I^(-OMvA%3s0O-@qI#Gkzoz$a&AW|s4c$OS(h-Q41pI4jkyG|}OmY}b zfUJ`~avdO8(8&ZGi`Y>Md(>mBU~x^Qsg-vR2}88>3NB|~;6w3n>OF-ZRU7VgOd_G> z8ki~$V`(~D)M7GnYmu7`s^N0DvK$Q2=8&|C^_n&KLa0mzhx9dtJu*{b@=OdS%{17z zZ`fQ)kR5Q4smC!-Se2nlCTK0Mj0JbhIk$Shb)T@aY{`XhClx7Ceac zd{@IEyxzQ9iKk}^@6qUO3R}gSb}Cxnw(ZCVOOVnSlhey4)z=II)cA@D_)nNdR7I}G zGAJjWzhIPFgSnA84QU|Le2dC%-i>zU%qdYSVM!GAuI`dKrhOBP$QXmY;LybSnP>UoYxpbFa`n7F@ ze`R5p@+#fC3I7u=jwCCKnK3gP;RA^>%`)xtNB70i@#8p`(ao{ zvq^7Y(f1%U5g{tVZD#Ki@h=jsd&~i>_oyAR4S!-?C9LjMg|D^sb)v~y1#4_Nwv~PM zT-hKYC1B&3{8Sj=RU{HJ6{xTZ3Kky^?zP*s(k7}#Dww5`d3dxmMjjGGOIS{_L6&5| zBsDPeH;j$*0gIFJws*d@rWJgwR>&2@ZKO!l(uV{yw<({qf5zZrm*VvPj zAKgq;`mhx+Knn6yn3UqSLJo%elM*RX1xdvvD9r?cg*hw$rKRD#)E>Hvu79YJz)WYmwjq z915~7B01Q~4Z?W@+8d9_D(JE)RG)f)spK4dHKq>#Uyg7Oq0)NHfUj}oWsyoSTjcOz z@hf>8auZU{L}Zf+iZyuI)jph$)gyTk*I6vz8h*AnW>|_ef?pN zMZvh))-(XIlRciEx|0LS7&e3;>|@}jqr^TMXM{7b zNwf=ygby(S%_H>`Dm1WP4;j-lMre5|p2sk|YiKjmYAj?PBVy;6oOG6Pxlo79b&_<| zId=s$Ppj=>uQT`o`f0eD?Lbc;b1pb7o7p7h4S|h5>${; zbVCN`PDX3k0FfvWLg_FA)f$`(8mHp1;M|l_RGy#ndq7un)`ahtz4Rw&Wuu^YIWw2m{Kn#Vxv#}U zE8)iY1X+~bG-a&POhxcb%2m8-nrG8HRIcTH%ATGmg4-u&zQ#o#qUq~hwUUgYtNb1$ z;}i`#wa(C$*_H++BCV9hjJEcobvyDD=5~aCsLWRFy1h z-3&ZJh;RlxOJlAJQ7aCc%+V@ogWDMnNDHVQ6rb_S37`!ho%{;kRwo1By62eLHIcif`WoyMFol-61ir=EIzSV zuv%nTnG-~Y^B5eTN9U(%c@RkE8!5VMfXt}@Vn0YZCeyeEJcaVlK%j?$lGG(U3M#L{ z<^b5^$?GI*036mR{?8|>f)nI)nQR^dZeufJr^`HYMw046EV5uH;)Y~YY7njh|FlFy z2N8+|)>J1FP8{av!LhhBdK5wALh1q}+Q`9Yb~LbGq6Kz5rj?Dr0|Krci)AuSz8#^z z?H)TO=#-u0DFT<>%7^0kkPc*k4B5;TGT)-t`|iE@Vfq-4q!+V$v39;_YbVo+r&#nF z%Xl;NB@xGG(e=rrM6=8Nu-4F6d8B0-j_QaO#StvW>K3n)*InSNlniMt-`93tIaSw> zv@2G6kAvwGVf!9=2tTdxp$lMe5!R-O)yPk%Gw44a1A-q~gUGL0U zUlI1CXv-c_yr`@z6};!7oeDOS%qR)r)^g<;w?%5^E0#JWe3@;%tenf(uCrH`>~y}6 zHZ-4~q4AB%h%V10Zn3eGQ0pi6vP=6D0(j3a(^yRAsH(M9w`u&?jrO!>nUL_@U~> z;f^)q!yOmk*|%o3U)j=+VoS!0R`>H0k*n|cul|vJJ+vW`EBx8N4=tQ}fT-SCr6b3h z0PkabnX-S|;@Y`PE?pc0kmwY>ek6a)jH@#qw&oXRG!VAB`$+PQJ3BR#o@1avHqmJ+ z#z(ae7Va!`J$UoUT-Wrq@a_eHYIlm?zj8rtaf z@RQoPp|q_eaQxPm>>Ee!Em)NDPD+g^*{a0{oy=Y{z5b8pPa-uJa_Dm zR?T#tsQP93*y!T^(NA1|Buusrr=+!5ZWnHv9P`>XPG23;9hv=?R~>QhqE$VABKyhq ziBDr+ygB1-NxW28I7YPqgWJ)~?bQ$063ReQ_?UYxt( zm)@672iDiv*b$9C53+6a=S1GYCg6P=sSrO`*-w4LZ#waB^iJD-OI3B)SH>GJ-($OX zm}hos)Xr;4!U@`K|51>eHRT-9j3L5Xzc{|VIJWKfyQ8{e-*}zq<2|b;dEx2yM!xO)?|N5$HCc_E_f5*(t zQ-8#!OpgCCy$gM1_4F6vDcdIB-c{(CF8Eb#Ej64njKi94pZ_`aZ1V&hx+weH>hHgg z_=4--)Zz6HdFCE?JK|e^*Xb?g-M3_Mrl_advwJA_01Ut#X=kTAJ8lSmL0{#kmSm@# zl&0Kz5qc%h0Y)xWDLe`J3hC)EDy})=Rn-X87fxW7ZOsesWdsyO{eap5ARM6e>EdK4RXN$ZvU02!{M-bAvawO%AN&RAa3lb_ z3sZnh1skHAf#^Q}pQcN7ukb z7auM(R|7-{@J9ZBFEj*)3a1~v2ABc=<5(>J8N?Q5NFmV&N@eYDo-E{M8rIC~LEVDh z5^G?bbaV-I9Rb8KwrnW~(V2UDEOJ^~3{*6|bskL=1SoVHRhzI00LOb#>r${5DS`_y~oL67oD^gKY!wR&ldi>gLUOpM$lT&LwsjnH7# z3aB2S`l3e_4ttFr-VL^5Df|ssAukVN6S9H!fI3-YrHiTTM1~q=v}wqS$puy`jTz_& z8v;q67$r&-q^Vn}RwWjz7ZR~hi;{G(3i&@7Qj-($N0i9M822P(a|K%$TR? z?r`OxfBKee?a3F(0zd7j{D$4k9a{5$cp^rWf)(c(4;2kH1OIFopL5YH)grGqx@C|A zrRy{j?0hUhzDYuanqq-=AhbmLSCTfujAqyg!$ufNMVvwvv$GFxQF5 zVbW2_mQXG-SY8flg{^<3L5U_tE_Z}4OvJ6asZ~;-Ax;X z!;}^^h#Xmuj;?+TGD%SaCOGPK6lG8griX)F_H{j$WIj*P1q()~nV{3NJt(l&eYQtX zCderFpuL&@p+^ed1;8~yT`@ia1tHYlT3 zLlKgrgkXdILm46oC9Sk*2hMB*TOAMf*o@=Pc#2r3tp zBu1itLQRm#8(#xi^D)&_2A-GO}lk7;%oP?(k_Psa;-as>iTR_w0fDY7%2+?vnS`Knf zsKj@0*-LE0Mxe<;F|aJ0K@((eHoH1=BoZX;h4nXZiU4FAj9B~jeMtgjZ z5~Au5jh9!dq%3vChPaJ4 z5l@R>V~+XNO?o~a8i3GKxJ(CoqzdWg$DaCz#DeC<#hfszC3PV^{3kMc=`We|h0yuIeaDE^ z;sD+`+JMvvy3tO{Wg+f-%vR<(Cd*Rzs-E-Mlf2d7iACx==Rq0Qc^8#21C=gs&Tw$s z*ia_6BnkfoD-kX+d7k<4uO}z0&e%98fhL^P#YqBjQsHVd_1;n4P!y^%R`OS&u@Y*+Ws(KO1%M zKx7e85;2vt^~eI1q~5orABiX~f-6rUOmW;T^Q|=txw%9fIXAy9yABU0s@e=m@DEK6 zF75e9?#=Sp7V$M-!w=cU1PC$%BiXEug)$Red*4&TTBro_3oP~ z`V(SX;r)Aw?zip>Z&o)vgl*~fxdVsd?|r<-_RReT{T|1&HhOwrTfgsK-Io<__Fs5@ z$&xqK(2k|gFZL&?XY~UcCX~v#O5M?`w)dnx<=ndyJGQ)Fc(N$PFtOZ~0(M3&%s!Y-iPGg?r~S(D?te}l|FZko z%z-!KZ}m>T#MVzexU!+}xBKrO%>8w`PLYDXSb49qd)E{G@`gj--2VXi*cK_oBb+Z2n^$P`sc}2>H z%FynKK&bK#H}2TAYh}*fJ^rmP&-x}1`sPEA_s&tjeN8*(CzlnLceDoCxF5^?Q7;IG z8vI)p*syWx=;8;X{Vo1zM_f&7W56?aDcYhJ3H)DO&$zGzEiZodYot{X6l~X zNW`_)mtTGB=H7+IjM?zGk8aHZyXVUN9cptRZNc(?rM!CYNwP4ncwrzmJNKXW5B+rL zw{Ct~%T#apQd`$?W6Oit_q(C7leN08dv39gJ0#va_?9if|Iz*wd~DxB@VhPa?s|Rf zwfDQ*#=IYHr2B!YpGy|w(=9D2uS`Fek+Q&FS^ZJl+f7l%3QTvTNcHW8B6v(0x?s{` zPc$tn)}0$;^TPAL%M0fML8Ul1!5MEURf(0P(9Gnk2zt-^n}BKC-`bKWQ`Wf5bq5A;s!vn%$iz;mN zjDGo}(G2ttOu?HjPAl^&#{gL5KjYcCC@|CY!l9l&fY1iUKo1xL7nMKPtK$M>Zz7oJ zK7;rDRtSB#^|866)khkizfFgX(#c4yvpn=x6jhP0^pm)1h;8B8sS&b+5;~tz-xs4*( z8utuL*vR!1TXBxa0_UuC(W`EcEc))c=Y7%KDf;Mo6hnrH51Z)NI7)NrwB*|dq z*(g(q)6S*J)qF1w6ut`_h#2*ri4$0&RrTK>{wqe`@Ay)|VbqQ`x}I!~TVwsLBRq zM^N!aJef%IuAqc{0^MizA{=$Vj%wTB_gbLx&bn+kzn4sFq+c6Q(rg!h)KQ*Cy}MZf zA{ms27|sL8d3#73?Zz7$w0mRdrjO@n9m4zP;d4b6Sb%PW%E^N}Xzk)-8CaLAX=6+g zlAW`{iksyJJ6*t^289gqV6UMJ3h;*aNMqvjK8|XPu(Od7LT>XuF%xb*Fx>my$Y)|P zgpXo_K-p?av=y~ACpITq6rC=o5mlo@PWOO^6MSf4pa0}JBp(eCF#&SH6ah24A-I-g z-;%j4P&0Z|9x7C2i*4)J5V9SX(Gm=W$WEC5OWkx!4Fm7O6Z{B~^LJf>y;m4-=ObwpVqGriNIV5K7Gzi#b%t ze;TXwv5Cg*u{`%0p`p8wR$53SV;$7UKBNoAT-x-pqaPfmV!>=AZ;Ycdq1`YDN>afO zsVHHcmq~b>eFw{=u(0xCPF`6OMhh}EWhWVn!xt@EPRI1pXUtp-XQxp%Bq$*-o)S!W zD~wAj+%X)>01|ldn!aDhrB5OPS~f=sd|?SxFBC^>K>%Mc5aERLhvRKjW>q-gzSo?k zxq>Akr374=PPVcbme0#8^P9g0pyd-C=MZXhY<2VLu{I=nyMP5rCQEG zq9>-qw@Fe#hZf3H(ZHFAXaJctlBSS#tVU`jEf6lHqDx3GlEj-3DHa~H8~l1@vNVB5 zxo8<{#&L*-g1js3=vg^h))%o370Aq&=JzOr9fIRjG= z2k@-Q0w+P#6vM5~i%qC?Gnr(b>k4~(Zmf!71tcCHB(9<)Qp$F}JzPL`-%|SrI?V?xi!~ zHy8zj{;eJhk`SU&W}ZAyMNl*vTujTp03RA`z%dp+>IIKm>I@OwY+tD@=41-czaDI& z*HC6YNBJck0lb%uSaPMi)6_tR5_8!IKLIZgufsuDFEN)fzn|_nN~hbsppKx{unBW; zsCIx|L?RohFfZfA`lvq@Gz!&kZblJnDJ4yon4R8v$vO;_^_a`KD;bwQ#N5>*)w+fjH0GA=M+MY@Z>-SdE{uioZ2q(&aQP$ zmC4)>s63ojYMTWJt`wD6L;O67MF~$(G^@w!JS)$$5=jRfB9oK_t-uL@0SWHK%2+-q zgqCB`K~xN23b910ok-&qa&CoDq6NlFT1ur-ZA`FN40gbh=I)gLnukRTQYhFc5C+C9 z<;~#VTZc+ei$*!~jRGO8>|-Ecoz@ zEBQSR3z9RC#mr?bFCmlYCii> zltL4i>S}I&S!2ivTS;gTdGO+_LUaj?y(855B1V%-p*c*3Hzp3XzE2c6eN@N}J|D3~ zm7Kj)QIyEX;qa4;#lBKp+)6~oM{2*Kv*;&vT%;)r3Kk=Tw0Px;e#VXh6+@Dh!z$D$cD2 zLKlXq#|U{j@E&WJW;ltS@ccaJlyS+wma9v|piy$HL>Et+i282BO|Dd3#6yrF*Nf zZKgx$-MZObB@YlPr8DsEDVv!c+i2_mV>nSqt+u8D%e*^>J)=MLSS`KNMQY+?QsUNL(jKo@lPPWSCf zSveFL$c)J?o!wQ}e!^e(qWaj7e&)(E-AgA5k{*oSczR~nm$Q|5_*{>!Xy!)5=b0&^ z)7N(0-FFBnvHB~g>tk-m`*~E?GWgci0hNyQCnVIK-l!(N|Nft~H$ujjul)R((5DWC z_|0o8A2j%`O(RGXFt9;qbsziVKkmMMUlITG;350qXJZvl)-|PY)1Q^(*7&OqM2Y>@ zQ*Hi}pS^uE_d;9vThq|-=LFm96Tc<2SAMG0li{)dSYI{XdM&&n@rh^9#HM;~rg7Dw zy5aO$xb0B+)Q3pbJ*2+hJmr15zHVITZ0E*e%+*B9NX>Ygx8C>3>G2v=*Y-14+HkjZ zk>*CxL}*&~Rlhkr<Q}dQTyK;pszrOTzCjj!e-HMh>nnp8Fu? zM0dFV#QsCcGt*DBe>UMBc-vS1U~&|FH^oNY*9(Q3uFf%`sYuP&|o@Qz|;z)_d2UV3lMrTR_dKdsg+8NYP8zxlSN%j@?Hc9+jY)rYI=;YljK zJ_nersz=)2@r$46Ow;?K3fugm_ie7ea_kr!y7|v!^Rpn#b)Gun%X@zSQvL=CyuJeD z`_FbTeqVU3A2fLFcvSYaUk#I20Bo`KS>KTX1@Jd2yi0c(?|y02kw?gswmn43XMP-3 zpWb8&-IwqmJ7hs5utN@py`uUy>|qqHhV~ID#`pWics&p7ljUg2D|u|n!%gnc^AUg< z0x%rcfg|$R#Tk{TeW>E2+TXv(v_p4|;4lFWAsInJ}a z{||d_AJ)W`_y12~^qY2j@0}TjFhqpRWC#-o1Y*?q%$ZEW009K4rL|j0j5b?|War z-?hEJ|2G$mIGH&)IWu!+&iTAQulE>?rxi)*>I?}6%W$bdDkEyYn;*tg}uuqg@1 zohW~&>l(J&*dk#7r2gKGZssHgEFG?tuEckHxiijtGL z%Cs8C;r=E;umI+2O2>snQ=yE}x*=KNVe|q__7M_L$DQlMITs#lv&|EOHr--%<=ZeM zwkG0;q~H?ot|1*BDO2p%&f{vW)!d7jl~#GZ@&|ctd|()KcugL@-w~;x%yP`r1lyh& zY|$mRKHIxb*<`d~0=B9-%b)fEZ|=o9Sj}6^U7z&&Fu!0bio~j$E}c~aHLHzgfx z7ZyV?nidiQ7B0_WG1yK#E%@02p*CJj<+V(g_#r+o>(DN_mxDSl4hx=R z(-=ZLTs;h^X%i-xYqFHJRc5f+!AA7?lX=4EnleBeQ~nV3W!lOuDD{>jL8yb7Q_j-D z3h8tHB&|D44N><(Eo79KOY@Oi*b{HG46dh!D-Tyc!^i3}M&86%}5p-S9G7wZA!;U2P>aXqD)8Tq~pYNbF>1rmUmu9yKWAgyAL zm}MAPE}C_UZyB zdE#FDHFA?8zMYKzjE90Qyq_yJ6tlXP5HG9{pL(g7j66-S1sCvq-VHTS3hfwY#rhM_ z96!$xr?6e7oT7*#vKF6PKpIB{mkLJ280`RGqrID`>wcF&VVDsvb+Vzj#>zr@r|^~X-*iELfJ zP+t(EO6+Gdgd?mQj6&QzXXuJ723m7pj@RoLd6mf(a~}U?|E_uUP)l; zRdROaLhlw{5QAUVb=TfOWPA5=dQ~2k!a>D3ZWBJ_Cz+#s6URD|B+kz6Q)CT^SPNZ< zw;*+Li_aY5c5qtme#wPH740Qn5?4s8_z|vw50cEc45qIBMgrY+$0ejn9xGV%ri7Bb z5QS^*in3`bb)4aOQd`EwgvbnNu7YRb|HRv*3z*E!G2yaefz)0U*{+oYVXlZVhxi5g zr&NA`)F=Y>)5Wa5&uwHlI>bv@{{=z0=d)Sc+tNj#8a93H=8GYUL{n*J8pT2~O%IXw!_(CwvWnYEs99Vp%u=N*1&yo{W@wB8 zQlo-FPgXxwdrL#BAj45b#VbL;td!Ao6^{t0o+r6bFQOR&b5IRRkT8Kzm9EZGBQU4W zr3_cYV6lvFHIa1W+5YRj6eEE(r08qPcM4qN11*XxQO zlD0qxb+o$7bx!wub@WX~&4RVrRmfsVdXO8#W%Vp9A4UpIi6!Ra;Tqf~&)Z^LbYp=7}{qzCCf5PqsGB|4H{m=LeT} zpZl=szN@yCjenomzp<0LwS=|APqtB(AFprWFVbE8*G?7W^-=4h(zh0UAxB5=g&F_LQKh>;S^k!VaH@)w)RP4TPHb1~*O%G;S60VCIU%gfG zW5Yi^b^G>v}Gam+d*v)Lnne^2yT2 zp1K|N(7NVk~RHrW@2t+upfyAaa|1I{w8!ytLc|eXo<> z$QyY5z%?QB+2-YjZD}`yj(OE_#MGv0=nWT_aL)%z#_9HL*RH%MG&-)ecb9Csjxiao zGkt?UPOx2_iR0F)&R5h_FMR|zO$oK+z+?^`1&)g z&siRtY>wFW*6lwpIyQOhAMc%yy7KS_2qfHnHDCDCgk|~V@mq1vyiNQxkiX}Z8-Kib zY~=d>&TWa4VhFlJ?@u`P*Kd~JT>t(b7u{~Y;wIM>bbmj2@5x)Ods?P@gUjKd_37+u z)vfCWr@p;Xa`eU`>CI8cgfw|Os-pG#WAgP2@}nYsMc;SdtMP_o}A_I)q_SefLj4S|5j1SWovR&Cf%Z zW4Wyl#ed{EIeB{i$w|qYInn!j5OD8V z`I4ivsXP(VLB5@c1+^XLr{9pTOOU2G;|X>kucH)<{d4Ab9L$WPK9yn2Dg;G>|GB`1 zPhQ{E3kiz$|97X}jx(n5VKW3GdTv4>B1}n>RyJN^;1~+(3*qP-E}C{hQ?OmjV2teN zUl>}0X>6M(Jux$xW#%&wzId<`=A_wINJ*<_#!)c9mh>3RF3Z1~{P-%sM@m+w5m)8Y z1#t%D{k7y7Vh|2Y=iUZ!ZuwhAH>F3cOFW&XXUa zs|sPRe(}fDiI~M=q?!)iabSpLhFSHdmdtFCoh!~bCq>CI#_ExN9EFTwUyXj2y~8{p zk>?7(gbu605ecKq#0zPTp78;8C}Fjr!XZ7wum@8E4j{M#GV+Zo^r^Gq(? z8>y_k!=R{Si9Vl(3sX^?OF`8Q0-u-#S}9F@Gm*?R@Q9T>+-UT z3**g7!@$N(J9X62GO4X+jCQTEJ>cp1hJ{lsZ04S?Mv9!2az*SIzR6EFz5di=qi z6~^%)VkJF*4(Pu3gq!30$0FNE%J2n{E3Cu9LfDMPai5TjWl@Q5;G5*SQg%fCY|(GC zlI%Op&ApvSBu@c{M{5q@wZ>jX%r0}BW6DBxWc$Hq-fLfZg)0`Y z#foP8OFEKpdU-4tB7Fon)9^dSsFph6ow8;+RNbxiUv)k-U zOF|pgFZeHEM0_~0MKp^ddYTPWLJyv#ZRK=?-0`qu+>rALj!Thav?8V%cVQ+E(*v{e z=2`OyT2yZFxPp))Q)y_)O1Itj026>|aiQ?(GHeq(p^xJo?55SSVLGiY5RNu4<`cPo zJYW^0!@hY^fw4|mvzj+EgES-H9a%Z;udgQ8!f=R$MYiJy-Q&2K7D;avaS>qNK4u3t z_kL#^k0J@#TSH!fL9h&$ynt6W;*^SZv_VX85716@WN7*M9h_P0laeE9>Fv0M9YgUV z!MMRkKz84z?}Y`je5vdOgo1ur1!9Da4sgOCjnN!RP{bxz5SznXs>+mcor+>FF=8fF zM6()Y3dg2MCdFRS*(4ey1rpu2EAV?9L)DQXE&{jHW?iYC`=fU}RnN)XIu>MMz z49Zo6*Kg0ENwM&RRoJ5VGo3gjX~#t@(I#ctSu~YO_tqxUqT5In3Z|hx@hqU4MZ%)9Q>??Dq)l9u|&E9U)GNr|f*Nf||PLKo4E$B~XMyHOdR$ zC@YB(_!ysxF*r=csAvVv+#+zvh-GGFGgH9j^%5lfo!_H4r7At`C&C_O7u7%)hO57(KTw)RtsYQY$EPfZ5RdSFz8|H z(cFHX)B9wvlsg{eSVcgEGk%EjOr@9wZ23k)si(0r7zg6hhp-w4G^-Cd)QK=Xj53U~ zm|TqNo4uK=l1hgb;M8k8f>VYjwra-q!!&UvR!_}AQQE}YNhFc%V-aW|4mnavl%`=i zB4SubX%uNty(soj@QBbdloq3+l{s;bg??^LUfuB3vZSDgW-OX$%E`EfS4~mT> zGzTvcuH60dC6a;X6&H!EVUssROvD@0RYZxqh1@IG)0^9fM2N5U`*NuSXJNWkXynV; z2`h}~!0EME+afM1KFMW?ALCwPdG`o-lRiE_=I*As=((lQ^O|&DZ&q2n9dgc#_f=HA znG3V#mYTC!JPuzbSAR&=4`%%~x35+@HMDS1b^Of?00;7Cb%i>MAHR+|Do3e7vWsN@ zDBa@BDU!SudOrH%^P$4%@aE?Yx!z+rccDO zIfZA+-=p6scpfuN952l2TO58o!@b$jLS?pxvRf9hA3HKwmp!p@LxFUjk9k_Vq<}GW zcTE2=M6Wz?h2B_FHf4gQCs}8;XAew8-5+=Lrn#*wC?Op^J|@z z6RV@2Sk{>G&i!rD%0J(n7|Y}S>c9BNdu83+_h#s3R&v!YE#JKD#6*JSB0Wl%XIwW} zzVlfg`RVd=|Jal{xlmj3)K6>wYCl0Hij?SFAqGm?$gq{$Bz%j zC0|>-Y+dAyM+dgu^W?5RTVD3HH$Qvp2gqi;|3K$^k3Y7+`R$edD>M1{_V50&Bk$DBGjG|>l$AYv)37dn3d&5ENdr^AByZ&M60YQ>+wOwgLCf~3>-Xg?TsZyo zmCf;=6}857m-7SPl_gAX_``Sal{k(Vuf5r2$)9}ePiL~nmtUBG6O8+ju@e78 z-NY-;b{@X`w^JW~dhD6;oeS3`eZBJPz*{RFZ!f&I(3oexzW($p;;~y(w(?xM-rOio zjgDC!zFzm*%GIB}cKM67QSlaNEAZ}~+m~D4Y@`=WShAg4Sgrr(WQxAQuP z|C=XD`^fOh_a>{~>};GKJloj*HS^x!)H}aV`TOV1TdhOH#0t6|?CT}J8Yo)hZnQs| z^F3pj{$Po7T8Ne6e!N$V>VptR=mUKJ^pg0T-hI8T5E!y1x?%oyX(nx~cM1H}U4p^1 zQu1eO==nqWN0y|b4mWkIwJ1YlUS+ew6N%dSm+F`yJ@Af zIYaB$kd4nR|9)P5CtA*2hU&$F&Ze`F6yj;LUxxv%j&1h0tS zQd||piZG^bCd5Klcx-yDxgjE#F?Y~3(?Eg!t}*Z8J^I4FC{l{>v@jWD-7ea2j-FLX zJp!lEJ>j60<7!>0m`RQDF?$RwbCN2By8y*I_AuRE;716jRP->U8B2F$JaAXde|L z6=6jhs!70-4LrR=LKeF)Mda)p5rs2(xmp(x{b@Vg3(?<8REsudOPU@tses0c|k?YXcTxc2KeJDvd3hlS9$sIz}8K0hUjI2>anz zaj4MuZO6sn2C)B{QI4_2=7>bLj%X(yeS8zgb7H>u62MM^8m^nT@x*Fd8y`>+F4+Yq z{mp8(K>%q$)5Hk~5_3no+5l+9Du&mnK)eKGvbBh$p~W}7%%MpUqoe?kYUucLR5A!TxvU_Q7!Zl7jQ>6*2TaLv++Ze zB12%ZqZqRS3kZ~=hY2{^Nq|^8Zl~l8hBm&qmHC36BKV&D%ei`X(;wzmNLX2P;iiuX zgSRFvO1l3X>4CmFYf4FbMy;pvv8>sZlguFMXtlu@;u&TE-B6JrNV#>@j`L)S2De}Mp?WDhW9ykMUTYPtz74Yx#dMAtkSI|sTkCSUNeRU0dfQnRc@cfF%0 z{Up4|@d~<&7-^NTjg{F%F&`x)Wo>0hP;_FUGB|q$7g{%cr&)p-QPs^*$AuY>K*9>i z#q-?}FwjLkhpVE|EsmI`L@7zym`~RgkSS823-`i60_yG}3wWj;UWA+FEYI^ZlG@R&*;69j4T$QHZ|PYf>}FAzoqELns0^R~4Y)wSaMqLVCWNDFpPR7vnMY7O zGM9{5P9QKF_RiO^4D10)rzThM#3Rj2k$xW*O7XP1g%0D6Ht4vHxu75!g9=*VMJqm8 zr{vvb&`*KTtMNF=N_7MnMGBl>LMV_vz=d#)5^<&hB=DwIVYU|plp2*AQ(*$BFXQ2e zbqB`8iUv5S)hRi*RT7ZOf7kL-fy87A3QZ}Hp-dR6_vD0L*&sAQE(IpRn4{hX>Pi8_ zwvz!nCMQIQ2xkXOHmN5S-xPs3X;z|4!FEWrV_=Cgpp~pRVOqq&$s>5W)3&>ndWCB` zGxOO>80XU-!KOnYczqy&5S{0ZQx&6o@wn!4peCR#WYA(-j1du(6ohZGpGp{|#MVrE z_-7?bFHnau2rf6EOdAOez9(opo4hnmf5N2AusH}kpnytGD3)!)1Qv#(WRoBWDlI9s zn&6m~vLbUu%DRzqs35_rH8Ci#ZDfEv%p8D{TSpsZ*V3YbNWz|9*oh!mK#?H98KiWz z#5D(I*C_}DzF_$X>|`_wLazuYi?a}YP>C=Uk*?+gioitklbWMM0UZrOgfVdgyYoc> z(Q!6iU75Ct;ZtR83m(})ur$l9@dF7XmlWaEXdC9K9>kT-E=KTHR<+@mSRyqIi>R7~ zIYt21MrPU=zYqgSMRldph(!8@3vG*Te*)OVR#c*(sb%%o(k3V*wdssLA>K~bNkj$S z+MFRE5^JXO`}D0S*+6RR2CGP=bC`1YI;y1vMYQl3!wPLSqL|F4IBT6iHFI9-S<;wt z7>;iREI5I81fW*7?l2)h`H2GlNa-?^!Xi589*GbRcsLPgM!_JmMie}ho>D-cY(=po zBSjFPB51;UBIaO7F^NbTH30xoCn(YtuvL+G6|xtFW)~pP#=^f4S%lF(Y6ll=gD00R7YR^wD-|F~ z1$OE9a@Y|G@IzptGt|Gs&lRAl0=!7oh`SB;Gyxh@YGg$Z{0@*ar64$DFAd|KGD5%% z5JXQ33PcFBQiw*4M8h*0fjt-nYq>WK1Qd|xszh`Ogwrb#$oPRZp%MKonI?$y`)36J zoS=s5pd6K;B&3>{c^_^7PdbEIg<=#1+mk>Th6v0;^gv>? zh=o3;d?lfd5EL?PP|9QgOyL}Cq`j<*q)4$94KQOsAoo!ewSxxmP5{vg58P)kATH=Efg}q+W_nq@>ooTTmqSUn#(iQNC0*>GrbDDcJo;HEEWXvO&=>QywU05hP0L0RjU1#s9V$B$@@L zrH*xK0c)7KFBY>#CIaVutn|;v?7wf^JktPj(#fxsP^yp2B$WJrs`K+I)qkrE zIa5J+$-+ASXJwLuJ#Yg$b>>u@sXDAljOu4qA5taS|MyxB?(nk@7*fp01`mTE90NG$ zcv1mmSm!En8ao_{!TVuR@W8^N;1Pr+!B3evY7JO1+@qLH|9QlxnFq(f-31VA|+)T7lJnG~?` z2(QWtH$`-~qs#;?>xkx1ij-nxC0-( zZ)9m3!?#*Ggi*Ogrk|cq@_ZD|qX+US(*QM=C3lH!Oa=gnBdibOB4{h*)IO6>y2>ze z9E9R29=hJJ5mG;mxP4eQrFkFlsF*97p2k|_o)9f=3AGmk;PkPpcs7TtJi_C4Ie1b| zf_eh&2y^Y70(>4Ivv?Ib?f|GP?tr088G6C>aU7CKNh;b^qYk!+$rw$GFkXUJ za6So!P^w2ID9fa`O3EDtk#ae>GXTN-=`=IQDOW-5#X<-HZk0|c_Rb(G8>sce)R=dc zMpeuLG(x54)O|vLQ5)B=4CEe4fkHQL?C0ewQKhRsM=j0gc{=hAHl9@`i&aLUjHZ=( z44FNEI4Tv&e3d!~ zC9gJk_uZz7fbcOIzJ-~=pz*f$t4E8jG>9Xz-q&cTiMvGYNC-CA|xUS zi8YKOT}9#Gf(us^*VWJ-K}G`ALca)rJ_IL-GnG7om?~to>Fub0!|PGbpwg;AGU-qR zh&B*x!U#w{MI(=pi_P$B8_2_%v(lBR)gS{Ra#n$@_>r{5G%ju>lwckgM?o(_YR>xw zHb!$AkdZM~cCVmMlj;}j1BDnD3j{*b%$S>F5G>lmM0+SCk_n+)tiTb~auZ_^`W!HN z4h^e&p};2+f^6VhZa*4OtjEsTBJK3n_Aa0-_RhGxraGYANHZ&A@}Ujcy|je#>1usg z3P7g`vsy!kBnqJsR@2%6C&NLsT29Asftkb6NMKG%dr-KOMtW%dot3HpkQhl_qd01L zz1AS&8(NBo?!&SiI^L$z3D@zSkjnJF=yRiB+PR z^NU*+yrbzNNlszh$;s8WHb7~*fK>vFChV~4ceykkLZ_~QpkL@NBQX8IL}RTyy^4d9 z6+PD6a){-XI$ys&)UU^+*=|~$K(aD@{N}V9MBY#o5^Y3BnY&U&s*pFUaHv@qV{8;(?Q4yf&3%}|PgRCP7~l?$vNrh;he3uLr&H4} zszJ@7vQ&C8uEcZsOO>?VM)e3RcqxYI@uOlkYYJC|P=2dOm$fQ6Gby&2Fbp_lGD_>1)WQ1OxkrI!HLoQE;Mok^kxheJ;UW1|1L-7y`O~H&*&}Mhd z1_mgpW@&ZAC?63*UF|ZJ4(VMDc)9`tXc>ph_4N}uRJy&7fH+-EKhEsn0SVJP+?=wy z1Ne{M>3~rk5_PY)Z>3p@v~@^vE||{3Ul7X4Fx0td6fx3j5=qCp31Y&-YH-DTMZv)$ z0*mxg^}-J5C8Oujm{JK-RH}rzXmOa;^L11FiLI#Gi1QsdI~QZ4;av#2*+yy$Ap4BH zLkqLWx7*1g(bTfR)GESI=QT&OH7L!gx&m;bK}vL%@s!_BG`bH{ElUnbt*nk%0_EiL z9M^CAsCt*g>W7)M&xeeDr@%{mOrIxjaj(^>%tkk(WzOG|2RJ;JDXJ_K&Y-dM}k_CzFG3TKSwd=(|Exm2nm1MrJj} z`*G(Hwww8q$B*=>gv>8T@6@O?A}YXuT)H}F$2q7sk2|w21*d1Uynil;p!}(F*`D`65RE%~&(qjVsu_ zTt_ysQ&qe^RbpY>PogA2t9BAh6Qpjb0E`jR48b0N?C%;tH%a^|shEwKIQ-|W=!t@Q zZsQb>7CbsdoCMpWox?z#;AUTvnI|NMseUJOC0=i5NdMyFPAb|p4*iKWv^>00~xF|bkk{u%1{WjfJShuu|> zVtW-2DspS;1|BzJRxKJGCh*++9kMAz^zIO|abYW=lBk1eTZ%L5a4TBR5+*k6t-eF= zmpF?sMzboHoD?FmrMlTY_kF^CBOK?108!4i7~2aZ$U2mSDO|GimC7Ad^)LX z5yti|#jDQ&v>)FEbGQ6taJWnrEZ|=bqZU_wrC~Q}I7nsR_e_1IaH_=Tt0T;p+MDU)#R1jB_>_+m$uk03c9?Xw zdH@sbY^o_!Nv}(ix(GKT^p8f44?cwGStW*`J+>YaV-YN(n}!&7go?&nP`whZQw1Uf zm|ox_*RY6#74IkY%7C58M6K;H(DDs%GL9>YA-O7(={fi*=Z%;VWMuV45XN@Qh>g+Y zXlXlJj4`Nj1bPc|8frfqC2b@MwVq3aA1^Sj^{V zQYnN%V75)M$RFRg+d)x%AyNVX6;1Mi+2&bsgVt}+MWhQ`!vGtS*h@o(NE#G$QN^@T zMa76G0EZ!dcS`}&fFfcv8h;m5uE;v6y+!7Gs{C8Aeq53@I;BGi5*71kww}vtSIfEd zsi%K8yO?Ipy`C&;5LM3gkQytA<$@lUJ4AE9+=L2EWPt8sea(p^rKnWs*a2J#gUZkE z$7@MMB#(DU-VhO?)-xVI>i$i9J8`K>1hSh^P&psXuTe2`omn_kWRh(hLiDhv*)Sa; z40bp*G^t33F!kMS5=_d;dRgRXFPmQG@g$0PF(EP;1l>TB2ziQ`YL(JedWN9Qz$#+S z>)-zcpNk>*CsZqZK*KRAy_aJ2pase;AVPsn2ZGwH*vr1GHlOA=h$$CR`xoHg9AGd2 z$&6IL94`d<5McJwk!sS=3ZH#@cJIsEM+2Kvk!oV#Gjxm+hxa>{hTV=vNs|B?7^zlK ztLQ3RjaH{&FoKVp!ZNbTC`KyNm57k3Ht8UIkG{02App|=d7w-P1(bU|WU&v?0AA&b zS7|~V*xDkr=uBXU?Zr$G_NLTB;V2EYJ^JSeGt?qTtOn4k;BRSB{Bk+Jm%C3{&}l25 zUrLP{n>{I%u^II*PfNn*au6<{g(bFZWD+3njz;3RZ|dJ2I6%Zw$xIw`IAb{5zAIA6 zre>!!y#SW*y_I6Kh54rCvN#goB`j_ZwluxoAsF#d79S#pi80a|uJ?W{?rwEwb%m$< zYT@z8_r&{YgLcY`F8EfgQdv`|`QR`pLpP*3r3ual>}b&DxR;cM)-+4Iev?o@5nRof zmm6@oh6r|+rD>E_K4)j8t?h-}{uZ=WM^$-cGKt~lkM+}l3(KyF{e9a#L7`U!AMSE| zL|G`Y{GQdB5sIuU7)s2;gPigamMVsfLhU_xDqf6&43Z9()%sKzi>R7*$yHfbX?W&=3Q_c-}zRB2>636BE$IeW2xq2Oo@VK%oU}M}PKP~%W&#P}^ zleU<=)t3v|mHz9(Tb2!zE8U;n1Z3{~#;(fC&%NFGr)j?SRel|Dv*REv^_BjWi9h{E z4fN#2Gams2T%jZuNtls85KE52Cd~QrZDjO zfYrKU-ug4xu>Ib%qkp=}4}7seg*7~@Vn=`Htkz^!Yw7RMBGvJ>*%UIEYlCH92psFcE?Jz+r0fr}Xkz*%NOdg3E0 z&;Gf2;_D^rq$`)LQB`q|zzmh|W@u`U&g`}ReM`ht;`#o@To zeo)DiMOcFtyaECvG9x z)lwAMUd5M|Np=c_f?1aUyi=g4>*OU&c0?lpz`a@L$qgLb@w^j(%p$knf9F1bN*hi=gC`iv@-`s7?J#hq{@TU#A!%B0XX z?SZuYap+xq^e96&F}dMCi@WUT13+8eQBGE5WBJsQrncpTylAu$9ddYYr&6qCmcklX`(z&!pRMjz`IAOyvahIZ;$-?tnnu6iH~1 zkie|ES(2>fl$mxcRmWpnjI%hCIEdrWw?iEXMUxVhg|`?u7S7~hHu@8$U`fmH4f^Yh=`KG{#KjcwfBEtH4+azf$9SW>7U(NCpFaa0@V%x)R|F8esF1x+>%C=Xy?7mWK)%EVECdE}SUsJ4mL+2bKCc z`v^N$qcUE9>EvGU_8{qz4rLCz&=IED_N~I$j?;~qEkuk|5L4~-MFm4i;!V1jFiZm~ zLugoFfO7*F{Z+qXm{rZC-99!H=k53I>^-jS4^>N#RdrMduW9$%Hw?FVRI(paVdJ z8d!r;uPUYiTS=;!bTz6`_p}P@73uKm58!tevxJbYK0SY&!<`b=r>9Y z^2+>GBurE}07QioDxC?p3MuArc9VLCENDzh%>i8lBrz1C7*4R!@Y_fnjSZtNUKGV%&;w_YaizY`n{HIhC85s? zhyGiHI>L>rckp6>y9-GqGEAjgeJm3#h^SiEWb5Hf(k!HkF9?z(nL!(<@|PsFUe`f5#ko=e z&2TkJ2u7o}B&-ERcu_MS;3jbB1(b?oaNMC$Ma*GMnAnbyfP&4L$g?y@DXA=xQu&c& zutU_qBDA8_mH{GnQxeGl5v&p!QiG{4efkxGkPtzppN#^71_!}rjAv+y4N^`e#T=qw z2B0`7wzCNsp29d4{4z>{KC8uS0PAP=QlkG8LQU?)gjF(KEYnh*xNtiHXIj$Xs6r!< z%1BgFV0tCuR+;XAsR%-%La(3**#M&s2AF(ggwrfKh7m+4eOAC!0L|3B8#EZ9gxqGV zfYlJ{Vj&Ph8Jx4jxf;D{FG^U2L@x@*&F}{`k=*XIy3l+%S_yjM^*o33Doz9#Krr76 zYa-UoKbUVNlCz!pUA6?w0UeZ48^K0#!LP8xtF0`x7H6`Wz40BGpG#n=yv>uj$~s#J;7GcHvD1f6PK<9Yi%J- z6CU~#x+yXjqCJ$fW_JXfln!eX(3AoxvYhOW@55qoswv8g(yXhCmRln!PY;OYwN1Vp zQw|LC;4!Dj#Q9`o2y0&?ZT#oRVyZ8As@v{(IZJpAKiNk+&?9whm()jB-6cvH{dw1H zj~DUoULYKlnz_tMRb&Bw2t_N{5R)OI5fZfq1BsP|EE8xK_hL(q*w-J|Qf(yWIP6eE zxW-<&kqYrA&CCcY`9kHv8s*(b+L-Eov4iO$a_rRutSF;3i*J=~GKmYopxW=8AEf4I$r{m)D3Z@pi)|5GYZD&@$QC138 zN91t1REe|ov4>w=m-DG_;)&(&MnzB3Pvi|hmQx-zirsAMi%WjAbb_EdyGG-0aKbYa zOY$t2EBc1tdaUm17u_XE*Urw}lXUs*x$6eTwXqrAAIy1u)7o7nU~+}+%%)X)n3yseEsZK<7?wOU;NCH|H@n4ouh>h9uvD9m*>TDv9Tp-<=Hpaxo-!rF1B3U zIdb+&yf2TPG+G~_x7jB6Ka`-QSgCV-{l+|MB>CSX^HyJdnpv7*DV@R> zUOm3fHH7c)SjoIQe&f5tmW69VjrQ@sVwOc~_LuCO7#Y~})pfcn&ojB}^BbSPyVH_+ zt@(u#FbGr7rrQ6Kcl^c+_?d?eFB{jkB*Dz|aRRp-ztMKD?bYA?qx<4B6Zd4jn)#9~ z0pHesW!XK;bFVrRJkBXR=A+DGo(;Rse|9r&!})?M8{$ixL#`{voX+NnZFsIDnSF%H z*jU2d>^}QK!MY7McHt#pJT|WJ@a4Ill^K(deR*+U$^_Z+D&iap|%6$=u_| z4*c}#(%bapwvu_LI$!z2neW%{i_l%wU5k5XV&z+nAKpkYhd;74el^~_!t&4Qh0PbU zC!g1K%15wk4fL7XWmt0FnWoEmbGPHi-WX~rcRYySe)9?ZtURz03>A*wpHsiKBw-?Z z-A_5|1|N4G2492A#s`1MJoe3__e=uTJi4*WHFe@_p6ME<&3ovE)>h(}d?34V-(?5B z?Xk6xexw5$0a@|CjOQ)* zNA)zd;+1#vj*o~Fw7L4)(G@Sq4-(R5C{_D+#5Fwn zdAPyqgd6ulei??(XmX+^!NES!97ZwZCB5G-{-XN06PGU`NP z#p=3gYjfhwC3NOdop3bPVS94k`7^kJ_GF+f%W3H?LAFa<@{F!+|T3t^;jx%7^ znIY!vky0={_Mhgfiz+Q^pzmsD!Oeo11?Kto)*A4tH_!h6@b&ItP1}9{cv`!CyWQT; zL(%}DRv;mifFK8}tIkQ2rkHZ79Om$_K@qn)4@}XG9VH=@6bcA-j(NKY$Q({5>e%MJ zc@K)!q0=GEsXN>v=r(q^hd?>X;rn6F^SiF!UthS0UYevp()ROuzfRu*%rbWnKpxM} z9W>bs4)Bi59aR9jdg9kksjXERQ)(J))>}K_nP*H@`cV%!_OngKi>Q6<&XvjiBtsSsV+5=!F`k<%ZbSHm75jz>-A_RQ*>RRSi}>785C{D z7SRY_1TvG#SY1Pf1XW_Xgf@PtgBN4YS5jh0=g-_k+W;m+|)ES45|L*9PDFC9|{ zFui<>2)FR?kcgh*nPqUa2T+c0%b$>F-p^HDmWgpCgCdeb^K=Lg+pyIpE!9Qu#zE+5 zZI;AEfwf;PRkg#^EqPSFq6_2bh}|0L93e|V{KcZ)Mj4b4IV2fXzPt1`{aUFI0aHbs z*3;oSs?-R@aDp}>mPPDp8SnQAOH1_>Ml59MIT>*Fju2mL; z5Z(D0mkcXnFr(5$h?pQ-`0^2_5~Y*aI+#i_@qmNDV5}g&yN3|AYT-}~_v2=`TucJx zE~RmS?1`7r25DjDY9b{)_UBO!Tfkh}wg0T~>>e-Smcv0gl{4T*|-W7m_Cn0 zUS9Z2R_B>UY%#}{F0Q)LfkwVqrt8N``AtI&H_zM2dHy9F7NyJKDv$&P8+o0tN#_e) z$*A-!p4`U`GMM&xln?EtcX9hkJ_RAoR62>4)4&SLYBGg)3Bw;KOr0k5NGV4y>j2iT z)JR|AkQy`>i?&AN8A93MfSVelxPjA3Jjm@y3zhP!BdlU!SHwCpc^y)f>*g)uX#%M= ziDXGyW03K>@HQQZ-z)4B>(Rv$2v2WV3+v)Qw-8&c4PUD(FAODhoV;?j|X^7uT zw0XFBKl2skch{34EFi_ihOFL(Ros@p=TN23RwNe-e*ojO>;)zczC=A-6D%*y;?!BF z36mY|BJOc+kdaV|MF~s;_p$Kk9sGh-g190*MkGE0X=p`6t;w$eBi6)85tu^NU83NY z${{?a!5_}QIS;Zj5X4D{!2{CM)Tol71qk&y%OHRU^HGEc$%cV5adnB(?P|zAee_!)U5ipfm^w1$G|I*yYFiM$2bNmi6ROj}+_6UFxha7q9NiS?NWo#Jr; z?xNrhzEFifgy)z+&T{h=OB@Vh4HO(y2?IQK2bF1LskoV=Z7@;{*4Wi~3nURIc0wX; zV7qt)bP@@IZ3IFZa?uib4uT7nv>>1YjV8109xhoTNm+yk&G_4gbc76FEryeM6c2Mk zB!-{(l8@nHqE1}^KME<4(V~r1H}L?qf=dIS1x92U1>c=O9^$6K+3^yY&Q7y3VIKqR z_zIyew`cvsfWcNUgc%iUnJ%H2Y;xk4VL|ac<>Hx=Tp*WG*K+HcV8KvbTPa~uv9gwy zSRuxNuAz%!wLUtn&%=wj1`$CQd{F zAp|gPy>yMPhfyt%*4R)Hf?)7T1;ZqWlri*zKrkf-+}eAO|4plikQE`yM3In#^I%0v zC;~xbc(8)oCkk_}?IHzRR7lB+Wwei;hkRVTSR{kiD@~}vp|G_%irMQfAr>)^iYw#3 zjDN)QBADbYsHo%jnFMNa9Jv?=0Vhf9hwAo@#JjjsEDv9R1v%=G;7D8=7vTjR_P2Rw zn*YL6mT{|3 zT$veGr6ErtMVEL$u8_P$7m@Uebj@kT%h6~c`wYe|&PyaWa%!xfY7`fkBU@spwyY!+UO{ORKt0|wKQI!z;)w>x_$ z-i{y09WN2X`ww|9B{o-#rB)66XC(Q#d@#>{FaPS))GvE~e{k}{o`DI8+CSdDDgV3S z+qY+vXFk4ed1chsZ}VuuhR*KkKmKL;aiU^j=gjWKnQV$ZKXIz1XW;v(nM0q}9>%{_ zd0%|(r>Q`%B|k0CVtTn{bZo>D?M1(M|5EGLvCtjAFirXSpXSbbZ&w|AF!f_q$Mm7v zDrxd;Ve0XMZ*#|j zeEN+oscg@;qxWuh{y6*d=xp;$|LwiuFq0j^keeYX^AJ1ejjTT13@x@Cm zA$N%fL$|6voE;zUbdF$Hg;eF}YFU~7+C(7zL|}Gomo&0IvFhkA){%`tJ>i4PRz%Yv zU`Frd7F7LfdczyDH}^a}z9s5rd(ZdN*@yPNKCyCQ=F@?HO|1JWOp`ou_=)U-;g-=? zmqc%Qfa;P|uS_{!w_JGe?|=22_io>oq&+!mv5vXEIXpNr^5*P&y`ewF-pd@xemuxJ z^6{q@WB0SC{RSH{^Zm!ZyqW#dVAH~E<7i}5HZl~ddqZp4I=gY>KlzgSf9lAQsDWX~6h1 z{1>3n%$4js{Rg!~3_6j)2Aw!<128FM_uQT*?D4c0cMll*;3+k%Srw$Ykuq6b(CO(5 z-wzlYaAx(!q29xxpv`bGhzA4b<)>D#=5q&2zIgZiH%EHX2SNID`W%Pi8x0>=m9M%U zF;p@KNtOdR10YG`(3^<=(RdKrJYGN7I=V!RFB!xE=`seW8j!JkA=>}C1~ipcgaEFF z8Ui6-000fsw(O|?rCxRnT05dw7iNs-dgdO*6YmQ)faLiz-~UF$s0Zx-*MZ=nT1Guc z(7k&*2I*uF`V3;Fjjwz&PBhMuHJ>3~N?c^TG`Ti;uU+{V8)KvjdKp+;jz;QDL5+Wv z<~Tqy$s8$T(fg*ODh6>AX-AjQm3~V+;*vd}wbUh{Yfx#6K5owP4x8phB6+#6ZVBx> zL_4Es2Uf#}R@X=IfQ!`ElP2aCX{yZwy*u)A%f6Ay(nv0cCpCch38!iZFa})aYR8ia z7oH+e_IA7`0Uk$qNyAHu5M@!VIzS#I%E1~!@SL{eu^qnh1xbQ7Hj9>)<)TGE&)H%Y zxO@CrZXS3$%=R1q`q^M17SKIzSi%D2WfDj^B1ZnSU2X*NJIH@I?+J3eoMKs?cQ#_oKbJK`y09l} zSzkGFK2NmJG66GBB!6Px6uOV~-ECHAE(^3Dwi9m0u5@6&qMTs0)zWIj`898}x?W)6 zM>RJ^g@Cay&^D0OMMu0HzKVX&uQ06Nr6|S1a!J1|k#~^&_=UvMlXK}9281RXC7OUx zKp?fzqS;NEVi^Hy6M#NefnfZ70v5Xy721mGS45%;3I$o zYe*2g04|PE=_j`q1<08?*dfX380$XR5m)kdg1kuX+k|j!j6rEv8s$ZCILNjV1s~2z zp)aT&5sF||`d(D9_iLUqbcgOqBl1X&wbajN<9%)O;qV>WXaFBx%Cf#G0~2s9Q|+dj{uM5qS$Z ze5*OhT~$nWi!Ee#ZD<2f#buI2O@h>(kDwuRsECW=JRT>K)WPU7+@Va)tzoEA+=1~d zt|Tm^+)^(-YM~f`$THV421c30^YleQMiuFhCSgtPofEW4$`$A~f;~fU!Sd*o`JwMI z$-c}yI0POBjUb3UFN9rWq|9`H%gToEURW#n)$rT`vNxMF_A^T9+IhvoqigsCbdW}X zQqfb!ma*wsV&XThZbnvyT-P@`7N=dq*t`Q5^)US|%i|7x7W?CZzXuSptnWOOd6&$g zA)iM@C;I5n&?xDN@fOTRZKgor4>*Stpiy&p`h4{M9;fn1LI*?iB;#)fmBR25Y>ovNF7o{ z+eD|-yX)~!+DIO~mc`=8Bx&786}4j#%tJYVxv2#&u5-~Q(jBP=Xu%=a*iI5Kk-P$z zc#ZrTr*s(GsiOU$m=}&@`big#2FMm(vNBR}3DrW8gUD%8i-jVjD0d3=BGr_HHknWY z(+G0jPULZnKp!A-xncz%9-tUNJAt`K8%J|RVsZ=o=sxidt0))aGJI|9zD!4#$V!SV zv2xvc4J_vzvTzYrl&D0`PLa8_!E)A+PI4yXufpFvSnxqf4lLMND0v<#aSpZ@m2~7+ zn85HXbCQFFFfrIpkUWCQ)u?cGb{-gH0GTRG$eUted+JJs#c88NLw44PY;!m(4Q;5mF z3ig-atc7%i$mX~pW3E8ZxfY%%xMCAe8S|uodwd^z2JU8@5%su5)q+ueO$=Yoz?}A; zKsIq^H)H7cJn`Wb56f?qL7e$$TJf%P1S>R&WY7XB%S}|VXQ{J^&POC9RZ#K$Se|4A zVtAWGZ%DN3@Lw-O)X@lz&vEDTXL+# znAur+xR9*M9bT3lWEx%%e~4$_9oyA15I?lN-}1`j=Q_)#2i|3~1+)Ko@(WG;?9C?z z6WLTx;E91vLz@`TU3uU}yl&LUwZ1dfKUH;OHmk6QKkXd1Hc}SX=zC3734gAg>D|_2 z|KgQV>&S`+y5;+aB(n4N6tj8(TfXD)*MELFi$C6TX6TEfLCkjvgQnLz_s;J4GXKrl z;q^h}>{heo##F%%*?D8z@;WV}-YcnVe`k+x@9dmnA3O4Ic-S2J`JU|4K*IJ`=;5^^ zae*rae|2}ZKS1m!8}rxC4E)%+U^;C!{>|1cEy+{1ZB-xilx->8$~}{ik4|(MzcwDe zF`9YdaOuPo-`%W8?i0?EuU+lxxR)@~Yppskx^3Hzygys2iXZ$ds+4~pimuI3#>Geq<1A+|Ow zvNYTG&}WZX3z=d?uc0>`$19 z{P2ez8+K$rGqY>^;kBRS{hTp;T2uA?E!X4#F}u>+aVhm!RnYKsVSf1}@k!6c2WOTo za%8Xm;p)uC&)nWKP&K=1o8^YfcDQl)Gh1}?OzzO}y#p2A?=PoL9?x!`4(e+6#%=BS zbZ|X!m84dsga-yqg-B<=miB-mswDxq4UHx!Dagtz391`!PO8>rO3H0V|4odKD*=F(cZf@-P zVW{cE(^Aih(K2JJbBgXboH+LOPRs1jJD?z!s)vW$E0_M)FSfhetls*E#^19E5Fy&i-aFWG551W-so zVVtM8IpY?3PTkS_3mj-Y->-k^YCrW+<4~_2?5Y-m{(L+RoHf3*Y&=d3pIRYqIj64e zyW1tMSnsO)TExEclAD=s$IizPBRVIrJWqeFdN#e^1c!gS0c= zIR1?@D1H3<3svdk>hp7(-mCQk0aMN;`71}9adX`^!vMA%8ZJ@$|9Enhzvtwt|BtkZ zJ8>M)QJ<;7H-7y5??=EvUzM$qQozFUDN&m#BwP7P(Vq|U^usM?Wkrptx;7uyt1Z+c zX0XagIh}DYcR8I5)96n63jL-6I1BfALI%ZjA2tgW&FP}n#F6wKxR3@sR58ed$1BL_ zx#RVxBf8NpP#q_lGsMMcXosqRtImSp@P`t+kh2&{&RdP7A`u-PT*E{v65Ay;ASKE< z!US|Da2^ueK$YO~M7e~5vJ02l$0jb{Db|KWN>)yTf6wBNCM0(VEE4jzRO}HD$uTtC zaEG(`@=z)`>nYR*#BMTUTrN_{cue&SzUPr>96J&$erP;e(ZsRpOD0{*p+xe6-^YctHi`v))0U*+|%!=iF zT+XMsaf~!$9zqo-Va}a`4LZVoaJ(&}x#{ z>f(|ag>wrV+QDiWNs{?6QjOm!N`Z@7DwFkTKO}(vaciy7w#RT?kA&HN4^CarfBSaewI~0d;rJBqXv<-Bf z6&EbPvtbdIGn&}qQWo$lk@FomwO(kG=!5{f4Kv7r8vrQ!bGBiuL0QL(JXq)MJB7(6>sIbnb)z@>yJ4Jbk>+Fs(DSQz)A1qK&6 zL1I~XIE>957HX6&fI~gF0j(hqq8R!J1df41iJd&fD^jy!?1&BF9|!8jId_Ik14{}m zGkE3tKJ;3NFQ0}dr_pSHf(=C#fV$v6iki`1USF?b& z2yVjYV5L#E4}q62lHnRr83p2Ci92R7magO&aG4a)H42vlu^xw%6Lne^suO-(u>iaV z1SVdF#E`^#I+$0~;lVNtcb!es=M1=~PrYJd!>^S#XHqC#Q^aQZ?}f)XORI>NvL zuQSNfh1lXOTmY9UM+HGsD@-JCZ&C+6c;ZjGM%!w=DGuGIOGN_WmOciE9a?(4WYHNa zTp8}+(l`I{rT9T1*Qm=}*?AnI7`h`TE@> zL2Z_{%@=#2<1~%8Ak`?26@`-?9D=U&;W)U~IRc(Y;mSzrY=?~qKf|ZNesDOvQ&Jvf zZB%f7js7^8=V|dSmh{|0L<@<(7b{>$$Z3*Nl03AZJ`rz4{Nu%D#%JvAes2h<0dZQOaj@!0a;+#?xVb` zTo8)SO5O)=U)ywM+u+`$_v_!OPA#l5diR)HpBPO0GCKCm9;-PhWxC~NcK+;0%S*PD zi?5q}y~Y0VTc+Z^jn@vxu8Tf4xuCZ70t)CAbR998cF7|&M4WoiIuNm*^Mu%(i z|1%O^-(2lA_a85dCMLbp@zG;j=?@#44|(ane9ffY(R_NMDWEfBIHM+f^2m|q^4Xy! z&s6ukzPaJ?1o-pV_~HrCS=rE;|M9_ZBu`(};_=HD?{>v`b8VKpW2x%*YBK?;VjBBn zMgE2{TF4I{Y|&ZP|B^EE*2jA{%zpg->v`GfLnhj?a^lU5tvj=K&T2#b&(cgqDH7}Z=Ra|_V(T*UdPS7CGEfZzxj@8)uNMsSSn}wS_Z&I-9-DdVLS%Z+=kfxA(OlFMj{&)Ma&R)XbUw=D3M;_2KZrvB3N--x1?(V_0PT z%3Cjv`%N9k4Cwvvzu6zOX)d7(Z);eX6Bo}um-4DnWIut=9*Lfr(p%l{xkM3{BkjId>N|&+Az?? z(uKSc=&@e92lfPOGk|moSO9fY9RhHegt%^tQe8{vX2eAk7rYZys25U zc^Mc%;wBp-+GV6~A>dZf00ct-`Ld!?#iQ>j#iq@+L@{!?@yc%)9|sGOv6O0l0QEDD zvAII>HcBl5muD>@Q0-!S2)@$RcCknqfeq?~exPR^2fo z3QntB%(c`_(LI zW-wVBy*Uf#tT_^bN^da|i+~t^0Kn=Q_>w~1;($?Ju?ExXU>1?I9!Z^<8IoaU&?5he zYOXODrCJ*QCgda=q}ca(qe4%I%`FE_m|Qf;-c48|qKHa|RCD`L9p)o$uD>JPV;N2& z73JhzAh1!Uk`B(6YluT46z|(>@gb}TGqeAzrU zF7)A0l-fh8=cC*^34ZA!yt7+n%Bt47_@^}zV(cZZiyVvBGrm$a2&_ndaz32OUBhZ9 z(Vq@(;ICW*NEcTGwy}@z zbRZ0X0N`IKu7c!vFvKkng&>ki#-3$x%u3+71_et)6~K=mV&ck`%cCedhFXmp;6mh~ z&^#AysNs9})x;7x0Pt~UM1lE~2!k9BX&*K*RBZYho`8U`hKIsf2}=!!LfUPZR3GvP zdM8qbId-9P%rU+wA1Zdm;*F;gs!KXju{s=y=1D93Y%Xtlv^u)1+8qe0F|liyRoWpj z8GTvRLP8_*E-Pi#MqFz^Y4CxO_=%y*@Q+Mql^DpQuYbDTl|3J ztEkm}h3l!y3|1am+<|8VAuN_AtO;L0f5lycQIV!=P%=^OyN&Qo<8pc81rF~JW4MLn zNXjlqz{nA-aoO@+v+Xub@8Lt^rT9AOb^b;_bJLlfVc@_%Ti zj`pcRQb5tD8%u6St_gqtr;N`L$YRG?1ktJYf!>5lz)C9hWlc;{J*c%;lrvD0$V)s^ z6Ls3$B5h(3L z@g$`vR)EpEos=1CX@?{OYeEPWV_+WQg z*MSnWsY!s%YK0Wxrb`rpn_WZk1`g!gw4;EZ$)X)Lrdn#?*I)*X!UrtAK{<<{SRnDl zF;M|Uk1OHTg2>w1*xc9%!3G3XdQ2$mh?5|G&bt8y4Y(+QAbW>E^EyUcNI(JI?HmO- z4G|3DeJCYK@sLAMkWQP(IX$cUL_-|VD}8r{QKZq}zaW#I_OXgk42DB|kqi^`kRi+E zBT{r68Z7gN(SwJoi{@d}LaYtrJW#NW=MZ66vL17IKbYJX2OQ~?vscWeAy%7?3Jy8K zqiq?9u#AX7Sn&D-V`4r+7pe695+aF+zWE9#R16f)xfh zmR7TZ3^JXeWvWO-&cqN%Gz`+}ecI{p%T}^Y3q_ux*)zC;3vOgWaZfQ0qB;`gML-ND z4`yVLcAg#FYgBgb-?Rj%s`{Ab5uu$nc!&_*BisQa2@!O)koN()SFNOD(t=}&5Lt){ zMnIP)tl?|mHaNBxR6!s)#lf+-O12s%lR@K_zU(^l5LV=_`RGbA8Y+K}^kTWkLz2=C z6LIhD)0vN8&xu+Im%!lag5)DLAW^i&4_O7|X^mw=G${N@&Qk?yEH!MVz^d-0OIb+^ z`HGM#w9)1061s#-7#48;Y;?Cfi-wK!{Pgfa>Z9w8m(t7e;=zjR_i;=QZkxr}LMumw zF{0mfiWw4C8~b5$LNxkirfZmP?B{#@pc@fYNghA5lk)rLT@2CZk5DDY|szapxu}ban~Cdp?$GIzR-Mh0uS)j<9K2%yEGkrfe=0r`KRXPsp#QPEwR`NPO+7)Q zzyD_-;`Eb4==_=`C9Z zE77X&r(3j7v6b-Sx0{28&DLyw{M%;&!T~{rj$Nc>MbxqCfk+Vg}6%%RTmMN#pkN zyozPRUp?09H%xANNeoQ;cUsVkqoG^(hRwY4OVInOAyON?VdjUM1Jtb>fA&7mnl5

AJo5S<;X(_Gc#{_e1Ceg&LMEfiDKIf9H&Fj9}iI3EwsKv)gY z65tLZ>)DD7z0EpQ-Ebbt7w4@8jGYc3tIl4*csUZlP>}CItR@*!2dy(Y+vTqW#j9x3 zr7-gW-74~kIbTK1LS>x_)EuN)bes{`7V+Q~s-jc4Q{hzc%M#S3?4(!uIXuD99t2t# zViqvbh~X_{u7V_3YicfLcxxtUStlp}Qb0d{X7;A7x(wa3LM>fH zaZsIGt$FTh_ZFlq(ST!l=c2rc8Q=il18ELK?_rX+7WGIZl-gkS|~U&^0kl%$N%Xk zmW01eC81L_|}?`Y3gAtz@jt{l_av&GBymNds5x< z-}A(FL=ZH*Q{)?2niP|DAw7>Fs6!@G6`hHn9U$_ES_oj0s>hCERndsq_5?g9wu=^O z+qoGmCt(zPQk8N*59<{Id=|_PigpU)MK07!V{re1$Q6NU79GGoGP^d(zzizXk;OM3 z7s4cLYPBJ8D_JWFV&4i;RCa=%-VMz&Zk4GdGA{8Dmg#JuZ3|bPiGaHov;vEc=I1bW zjD{W4OgtJm4YbFSHCnSV4 zbs6HYt2{|ZV>h@I0vM7cuE=Dm14X1};yERx&&>%@7~O0aG2j`jTog^cs&dB^KeV(# z)DE>!Nxsz(mxUx9TMjaKjV3cn5oJmB__K_<(tDWc$to{ws0Z_>P1{CM-emwaRh)t$rSJt@4EXm zX}g2SFqtSw%Ni%SBPxM?)G8&MxZP9MClpBA5nqb&0MJn8Qkc3<$z)g=-=LVnU@mLb zRpcr=$e!m+d(H^?9Hvs84{hv>_0?+I18Rv@#89l-v?!12&Kb_dpdi4XAyh-NY!=ezX{T`M-n#sH_wa-Iuys z1tycdA01-0cF-BI3a>(z(=UpA5k)68bkYK*Iz$F1b4)%o^jn4g6hT7$S$CkT$@MrsG|L59B()T`kR4@M`B~8T#IT&4s201kqRB|oRL~rN<)W^a~TJrezv3? z+l4aK$9qXu%2Zv?IezinZow)Kv1qj}YbTR5ES|Pf5BXUy=oL`9n#Rq;iGyad;adLns9Iy)j^CpKZ>M42>&g6uM?^aY=2$uT zQ9O6(MLY;_xPiEF&)+4fI*oxCzY_vX!{DAkAq7W6Qf~_B83`qLF2Y`O%(4?j2t2lG zv12FxefJT;Su95d1|4KyQ}!;qr!(~-?&XV&v#h`n0EVC^`=iCZFA8Pjm4}$LUf1H{ zeE30tYea+aiom2~8oSY;sGP0X`Wk5HP!0&ZJkIg9Wm}ZH!_7b_ii0I^qg@$5an;&} z+4(c5@1dqQl^0>*wwsCvgGU+}#yc-BG}OUxKxuZbSl6veZW%w}tTDwtXH98}KTyAn3%X)l7(1+3xCyxnIP3!XOdoO>R$Fl@}cec$_(xq87} z;~cIwlvkPaH~L2dPcIt3%d_yG9;|B|Zu^y!o_wxr`E#2eyjHogbaUMG?8|WJ6*y#&3B}3gz_QF{U zoaX)oSKg~E^nG&Iv6W`eX#c#zdp?;z2HrPIlh0KY(xa%tX&ZTvuF1dn&_920IP1-@sUe+IJv7kx4yb5JYsEK@>BEb@9#Zp z8;5)L?{Suo+J0TX=Z#0ka+a9mV8<+S?2MabNJn5w)F;|Jh%*R;s+V3$Nxn6Za37GA^Z_*W|Jb_&!~Fg)3a-uB;xs&NyTS;wE1k(7vcvP&Vbp%x52L)&81F4e<@zVayhRJ47bK7VWhWS{0m{YUwsosgB zmoHow%JBDu^Vs;26Hd=$_{0J9W;lWJ*SvGxv$%en#0X3bRM^;Q6($;|{}jmxPiEO% zv!N)DK1fGERX@t7L7tSCAOIE2oksA8Y`vl~s2EhhcOm8nMMf_>Avop;&q7Z0Z*SyE zcu-6hlS@D>Cn~d6`4VrfgFQlyJX^5m_1gOwU#k3&G?X^}5&o;~ta^ZCXxd-~ownw=YdPk>{*$YFU4wOn0LB$euY+1i$ zXyzN|Im}PC3szws8}3z1jFrm3zDGY>6y%)6=LAs4I$|=52~09OU6JS?LR1!X;63rhSX^eyIjeV@8LCpietq5%a1NccMj+7*~h^3_96{dlr z7M57XTMe8{T6n*}^U79Px2VgMugaw^m=rwb(b-HARhRJcdkZAl=@ZEe9UGb}NQB>X zkdtJtgDDm$FCwv~(=3CVfXE;yYrXjrD1~GXqA?_-*@l%8okVW$;8ZE;tgMJ8NU9Es z2;V-FO(IJvt~M))<@z{~s}NkVs`CnME}md(^O9IU&xh6nYCC@N1FjS&bLkuuhv5z4 zaNdC`T1cFO;(YCv3Fe+Rzf$Y z1jKg5fg`8OD>>;!@_0^JHE1zQ|q#@Eyal0BVJXjFkp${?u|KFTqWSkd;6f)zyoXEjO3MT|XN3V(q zi=xlciwZ|f-tqaJ=r$d9kP#cQNb7U3y%kw;W1wfC)ykcPl*S~hWL6$H4|ESh2Wg{v zILEDU;7&~QUZ~!}(UwXvbjv*=NvOa8DP&nD)oojLlLe8Y+Qpt3;?*ETV{GdZOpbtLj|P=wjzE$)uBkN+&mm z;hBthoZ)fmM6q%eh}CmYb48I#)&f4efwxw`T9CVP3EWf3HNzel@@r|!Sd<(CJ&FkW z=p>i8wN0c6Z&Xrh(N}Y2g0`D*$`j$%akG~e=`saD-UxI6GlrR%?lGr1JyFi}$OK?% zCL~i~)8bZaBh^F+K#(zhw2(Lvs;_0&5&;I-B7r+3#_3Y6MKv+u#=|r`fozcecSt>Z~9z6|`p{TP_HX6rvid3nW35p_}s;^S=GR24VrR!ShDA?J^DXppr z_ASnoQ1Jk5a=GxdL)0S4(;^@oVT!w1N=-r+(-!?9mnmS{MXo&1qrhekD#;|=dq|*G zWAbX2^dL8a_{#QsLZp)3tCUg62o4KsM%$6|rmVx>8QMXa5;Tj{DOql@QDsz)R;H3+ zedoKuGUa*E+s{LaN$Ws!st+o+GV#@FFu8GBu^g$ZOkc(`M$mbe=F6n4ohGm+Dssnz zX)Ba25k|%EN2*SB^l6)#E=Zu)T9kv-HXg+IcOst8UEmd9Gr2^o3VPq!(5TATg@oC| z%{U7Ni3l?T5l1C6bsFaZTXlShGwBc}rUwDQ@lH*{nMRTAs>n-(X3=B96ZsK^#|8_c z8e@@lVSPwdD4gsT-HD*aC}}*DWqnx|PBshiejJuC#Y3IFqNHgAuUKXz>VS&Uq+he( zoXF&`OI7#Wm#r@nb)z7moW^Ijw)T^?x80SNjc8hO5{Tugd(Zl)4(OCF@Ri2=m zJuiOhlXfPTb+-7{T#dCZj+jec2A+*vG{;=}Mtt9E*^fDsf6>?ZeELI+@1M!9MH{@P z0OQ^hmds@*rL|&tnPU)Ka5SB(BY&oBJ*>S@X3qJ02b<@IkY=(vk2i_}W&edjA>*_n zxg$Thk~8xc=R}3nm))20@|fH5aL}0X>bw^jx)FA%T@}0Ja$Z~0A(w;ftn5qSPIMk! z^zyDcB8ig1oxII7sCMF%CDi=uPd{Q})zW@_RR;i`5ZHxA>Mr4eO zb-oW)x31-yBH%=zw|9R)6Wb-QclgEowsSss1t%^Dua=wxW2>I_rQA5O@png?ccl2T zZ+&3I%)iM^?xD@Ahl|yPC98&>-}8eCbNL@<4-an1eq{NU2Nd7(f9~pf@9VpM=*ym{ zXyZ!OnK4w_Q$KU$)yK`NCJn(F_RNZj=i2rc)Vw*qvE@L7tD@Jt2+yv^w+23DPaE(@BM{wSP*^2!BwN4jSGd%^LsPv zO>b5Xx!=3~*n{a#>9xB@T6Q=_y4&j0#%1I3l#E|K{>}Pe3Y){-f8>GpoxbZzcFopb zell8xoZXWves|!93a{K4D5_B}N@xa$YeX4|Y*r|p}8esjU~ z=eufdyEZ@5Y#b{V%_&10H`E))JfAI`^eq}aQ{kjvd+wXF3!Zv!^Qs#oZEwB4KT^M9 zjA_}t;YQ2roA0{5)W0MXbG6rY_zJICpFePNqGsIpiz_kVXO~|3&;K~Z@v)R8|yPuRizFn#aaA#`lizVd@{AX#4cOq4{z1L*E=~n$sKXd%twt zxa+4k%D&nA+xp#;^76Ogl}lI6_17jA*Eq(5wt95Q`@*2_h3kI|ZtJ^v{CB3|Il*nc zgC{3C<6nxyeVzmR#~S<8ZH|rJx|26n-0XDY0D^mr6|6D;R7_y7V8PL;n7~{dLEt7a zS6JuAq{8!n>U4`&TyRM&TbR}Vu6`8kw^l%wsY8M1O);%vf+NTbYd{96mUP!w2zu8kSc&tDXSg z@rn=F;m2_fkngq+;Z!sr5eXRE?K0aYUNfezs=>_S`dl17D6AZJ`JI*HX9O%5|06hj z@PTW15Qh$M2w~!AB7CrgNeP-C9uk7))k6Zlj7{%d0qTK!M(yg`G!_Tw9s6#iKfkZO zpv{55`|jRfqduj6zxa_$DZP8H3tu?n<44MJP8Fg{*ajLyNb zbMPs)4$YR!$TGA^IDxsvqZ*svS8Dpc%9yG(K`pIRb5wQa%PUF)bPh75@EJO5Z)^z@ zCLtzgUbjtY35q#FsRq|a=}i)9QOfEv#hG^O z%I!s8P!eGadXdA^E9Gk9E8fjNzUf7oZ)c4T)14MgkG0xD2I5>!Wl|nW)s+s= z;2y@&Kt3!vj=*+7Ob4i0wD08Z)I4#8RhBB1twgP;J}TnmiB7@JHXaj`I<;p@3za+k z+pU%sVLO*Z>q1EGgS=N~!|rutl=Vq2Ap`k=B@rV}1$Segr@fjEF>?M+91al@jy?kY zM4X<0Hbp=cNB`yF^HP-QX;^kAC)P4OwptiQ0CS6WH66fNqK%TIqCpNPP$LmCRIR5S z2t2AFq?xFw4iW8&7>F6bphD6@5_=2IhP8Yo=gpDk&?Z`vm}C*V`-@3?(`x9|5y)@` z#%PPEGb~gOu;3h?9w-Fx@)(pE&qi&T96j_CkrMmtR1!fT!03BM1L;KBZ^2hS1l5U1}^s`=ZNmztWn+pjWMf_-=fa}4=*c&)5SUu%Wc(q ztNqxOe-=@VE@))BqnT}Nde#!e9~5~%vi?S*$!t?mp6Cwt@gZhVn(kR+&xKF-3Sjja ziE7-5>Rvv!Y3@lmhsDf7$1|cMjf=xv?7W_S9)o}0*d5?h3S5 zyG4|v{1&;Tm#t;f#G5R7flpEC5-o}P38QalLoq`Ar{eot2q0qgLlkx3zGI^ZoVg+@ zCc=gba|A6FiK@z>1I5ab*!LMAnn zTeNk6`;8b7igdHsq-qhSKMx*?t5T=}#|1=JjJ{K3J%c8-&YeY-en6{SxUzJX*3(C` z#iA}p74MXjg*u6si#G-HG{U2bCO!K}A7U7sW}l=`NtoCGjUb8y9JHBwVS*7X{iP&f zD8``_lSZdLPg`V25$CbFi6mVTDO;fF3y?o66JJwaNwPFYSZw6d9nC;1?c}pf>FSb} z)pbm{_^AB2+@WSfOEWsrwS30HvnFVw-28po zV$q^PfH~53XVN$z-!UJ6?O_k{mZMzIi+K$tL zUSo`u=0!S-6g8DmSvr)0kRpRrz1TP;`LXW+_uF(2p;($`h-(;6cf1qfH#cNmsirHH z*D_WqpDx18p7Pk%U^TiK(ycYfc0KLEF(q#S?Uw7Lh89gpGvPPD_z-JaCl~OdDsLIA z#BmRtro}5SHQsC!5Q(QfgpNfRBO2tiUIhQX|6gbLSE-xlOdJNRHRbz zGgsX5$=7My&x5d^3xidQkV0iR~uhjDvwrImy6lS z)|QIw)@)bRPS;}P5!(JdzUkR4vJbLB@gxwNIS+FC^Op`GtNV}asK^O!{XH<+lq#|n z0x3i~ z2HBIR%emB@ecthy7S={%s(}xPB96wqDSf0ykX(F@&0krop@`ZjFO!~J^ck1q&xUlK z*%Xb|8(e1%J6nmpt-F?RjVrt<6}eoWnZ8J0hCcx>_AcI%)wGD^!#9U^?L2OHU)cR( zx<^E-RPC@ytbli#7|Ewjo{*o>Qd^_a%!|1~iiDGL)lPM-*r;nbCw6aDBYpJ+XgIL) zLHemS^STia#HP+bn?ko&^`oPr%Zui^Vhr;0$_R4$f%_S4jq2&*3 zUi*b`z47$I$sb&PxPDf@x%lF;Ln|X4=8B8=t%E~Dy*V3wMx3N<_6(MMIrD7wKXW6$ zI(A^qNLlR17eDcSSw7O+e~MkyX+HTzbRsir+s^C!v*r^M(wb8{p3ENd|LlkNF5aKh zc`{n>`dAwlrDs&%u}d%9-p1b_TsW_O-fI=z!j%oHegHQ6E^mHwMVD)2Pj};8O z*S7rCnkAP?2hcC(-FQA~zJE+y=c^nyKy&2>?B$yA&#KcG*4#CI=F`nDzj^xF>6Ter zmKW6E81VI@+G4v8jr-SpqKwUn`AoyTKYRPwSk@z-v`*|3&G%kH6JK;XBj4{mEcIU8 zc5-5{zv?%Yp9IFZ1^88g4&RvA`;H{|9AkM^N#WAE7CS}*t-L# z{CB@uOhRT!Kqv_mO)sNT#0-&YWZ_QLdPQwT0$plqffXf)7U?o}9ZvoCh(a~1ERn54 zs-cM1C0NMRQISsR&Df}w;iI;5tZBUpcBpEpxDys{f>arO7Ommk@%WvLvgX-{iEn1Z zWNMwCE+*Y%yO4rr&lH-gIeIoN_W4qGmuwvDYm<|;2k6Z;R8~IhLCK_0&b&Y_Rtl8!o3I~~vQeHE)@*NM zty%dDjq}}U6W>~@3PHAPdPQGOkP*^NRs3$jaIs9t6BSJqL*i}+ev=&p#o`WcDd>~5 zt>Ys9alzevd{}3t(9UxPvYiq0@PDacXxIizsS=uT=Ihz7kigG3L^;MTsiy^{jYFvv zol7S@((5WOSP|L zMAouJ5h=u`4oK9}7RaPAD%x1x4{&CdRBNbZ#b*T0$PEZPnlg1|3=sEqvORTtavj^K zwW=)QQuX&OxKYP@4l$~h>{{ni?$rl@lj{|;T45ITt^hvE>}P{K3(Ez2Z>GJUZ2@Tk z6n16uGdaPKFQ!9euySmHwA9ZT*Vje2EWioqE?`#r`ch2Wvpma8>bo-O1$qk{U-g3| zISVm5Vs4OW2aG{H#PR)NB`YRq27#>*W^d|YnWRCSg&PF~!R8g?pvQE+i0y-fRE7aM z5mp&U6_Fp$dxXfxC^RIoem~C`D4N4>D$cZ8W(em!6qnQ`Ahnex2riTW2pU5*sV=3c zmk+rdUOO_e43*TP5+SLD+y4$*mR-Oy46z+z|6VrG#2jWd%7;0kH@_`Qe98pY;kQ9;1$G{tDZr{Q>UUb3=ZM^ zK9!eGX6|BjcI-Xp`62~WRq~#IJK2xp8P&9>SGbeqycBD+sYqE5)m|4Z20W||xVspZ za_efLeK1RPL8TFr%VBMEi6Y_nfYz6*sTyD3af@j3n0}=V7QwirfI9IAb%ZL15-%0$?Y-Fn zg4r$*i3}O+4Be=9WG!VmmQw~;YCdUcbMrIB%oxD`%YZDg0lJozK-MjqdTXb+JyxpY z6y9wj4Hto4V2Q89x-H5KiI}5an?>{p1k&83#J_;EP`J8^4CrD*Bs825Or<0(9Rzv? zzwpe$))>Awns_Kq5*d&oGbxK+3W-1?i~Smo1g>%Yije43%ECbY4XDeY*jkig@Ce*= zyWnTz(oDf+3$n!xN>}Rur+FB8dJ2ou9mGLxqoOlJGca3$wy5$h?v%V9wTsUxwzCNP zsnwvw-N^h~{6?p!P`n#v%6cOk&EVofo#2&aGMj-}Iunc1SkjVAahTv{b!ebSQ~d>i z#(_4FOewX2q?-s{YnN*Io}Dq)*6X$k@*u68Wp|>A?46~&_C2>syCI5d!3@67ZA6^B zGuUJ0arR^f>rhq)d5?M(gtwEPRMlSKxXkPC?UD&K-aB;z^5>KF%v zy(_aiJ1x9P?vkQ-h}FU-F$f*{B5S$$I zDSudH^5uiOWfB0oS@uSr<+qwR{7P0>-$=stFdvp~LXt)QjP|b5CpAi@Wo37YC1Sur z;aoR&oglb%KE%g5Ae%vDOhde4QjpTFWo=^MUOA&%>ExFP`IrDKgNwZ^XqHilDZ}IE zS@CJ_R=w3_4V!i$1C^?$)n--k=#QBOf^*MeT0kVIslsC-Ll`KfOpp0uVxjR%Gnjhl zLx{8|2#Kmrr8s`ou^De1g!(c)QKZ8pTHu8QyAW#yg%I%}AtaMwFG<*OE)<7JW#Ydm zU~1WOxS?z#dx-6o8CG19`EF%v_Z-$Qq^>L3D0I912-x5%{?YuH09om)wtjcNXBUa=ChxuZaPi(Ph=i-ZfVW8Hl4omBS}qkW z(;Cl(9Z{d@Ldh9L|Xftd_2gg_)v8!r`RGQ=U=}8koaO$X^E_ld2(t*p zl{M@A-pdEIV+3UU4?s@GimkRAXa>_@8(-GxVD2l1{9(fgQlh z7~}rm3#up%;T70@szFpWH{0&A$By$UVg*%QT}C4B zU-H0lBq>6ndH2O&bIjV5+Pw4$cUds@#-^CsJin=$f!&%(*QwpWXz7Xy%RtVq7(SHq za!Jrse_8eCFW=hl&i^F&@o6UDjp~apS7_P$uX|!UQz{CTKM|wmibYr+-1Gd;^i1Qe zyo8~p-VYnD3UdvGSKQr4PK3p19UFF<=kxw=Hn(<6eO+*V(!*SNA<62kto*afam~xx z3V*Kazb$%f>LH7#z`2e0Gzb|*caisKD7Z*@H}}o_*5AFghc^bsP!FacTpRd^feQ__ z*j#L>CL`*Xq?^!#MgOA9JzPida~a4_%+zUD2ys_6+*Yg2@^Ey3DsR!h^0z$?VsT>3 zFOGzHqSiR{?$15i1H)ykcCnXYy6e1JdxFV(M17Jt*&OyAcB}obtm#hfF|!BBbS$2_ zoZ2FKuiGlNyS)6BmgZjfd~L=XrjhMX-ty6~9T~9${=-z!9AsBt;ak(a@9o|)(MBwM z08RA!g@jC^n=?`LTgXPwy-S7A7-J4uJ~j}Z7x(zn(=Dl!8z(Z3OkB0L*ryzoj)&e8;jf*Y zsh-3uDmwWDr#JaQ_d?GlaR%wN_d+FIliyq&5~r?TYiS<4b_MvC`3;psVblEIUx>}f zd4KzE$de7FXQmbvjSd^%YRD@bX+$y%gVb+tJ+jn>6i)fI}*EhBm|zbX0*fKRoDGBPJD0SReSr$^tRlE>DD1*E5C=b_`{ z2ee;$Uv@f9O;vWa?Dq~;J0>Ta@L$B}!zXbf0!>)x=`;dJ!KQ&@Ynye7bsT)?vDyD{ zo#?FMTaLeN8q9ZF{kG}`vfFfH3JL%P^G0*9ISsDfHYYxVd>0APfCs@nku+^HH}MHe z+l#$A<_WHtRsc$)ZzC3LPRRwhBEDK@@KS)M=z#fW2bZcd1CIMmH&kN*Pdvn4z#Gs%vs3uM2IFwG9ZfLRL)as3l)LnKRW>lmP(} zDkFBRXdlVV(%zuWEwp!KG8p!+zdw1C z`V$DCdNpprP=y0aannxwPV>&=(^T@;4?=3aYT{`>fn-}i8H{`q~+0@*PM zxC#m68{46jB}tMb|A!yGMS$QS8D0y}MJxkM3`{h|gi$$)Z~x0v%)LR#(s(!xr((i| ze2l>YT+x&jmSTH(4BUS>;sQ>EBRvo-r!R2T)CCUbfiBF@UTW=0S_u0|!NFSi}Cx6ic9i={G5V@mdt~xG)SFqfJ{<$ z9`Y@=jaw&Nz=-Sm2!>onH2Rv^@M2aT+DZCk@cA0wTUb64LN9Ex zo~bQ&$gen`3$eZp3XMDkRyA_-FcmEG1DP&HP(*FQ<_U{1dbJ5lBqm|XBrVm*)SY}O zQi%~koedX=3&wdIW|WtT;He=aBjJGqe$n?DnF`2_4q>I8xX<6PrFnHum=sT?2?3Ku z3bj;_lTJ=5>w=fzrlW8Ma*A#+)-#{Em?jE6G=PBg5Q{HH;JC9%!$@dBs845;Y8YTi z{QEc0yaogVW&m7Ot})Z45;c&>fB+p_qLRRkMQTa7%!f#nLG|FAFXa=ZJf?XjA1jrC zk5K6a1ICuZV-3nRv%ncMbQTNLE&}PpmqN2bc?kjpOaOCK2(*k3j0Zk*AC}@tvxsn5 zB1{Riv|b1&WX1ye1=7IRYA|2EKjP_RUf={S|HUYxdcL9&!+`DIQZ&%$jA492Xuu9) zrv1iCPC8P|N1`y>EQM4@Dx6U91%grkBe2ox&)yLG^d6K9vi0#zF;?kb0HI`56`4*X z+Qn2-?h`)Hyod>vmP$(7${L7BzNn%TBZ-tbh)?)ailRnoiV;%Dl|UySWa1^wFdBiV zpH2nqfg|J5Smg_(^M!(~q%@S~Wu=!`s?15o)#a}iFha!7Z%C0^Lf@m|dE3>{CA?J9 zY`y}Z6wazStd^$<8d&xB67vW+r-TZ{$kOFKxj-;&KJ} zM5kWaLz9S%FH`2|swr-nK&qbcV))qr4+40(0P~-u{vxSHqY#{jM89!h=>Hm z2F)eFftHjeNkT}`LMGZt9PJeEh;pNR%S4%hmO&S25^i2fl1aQ_mZn)a8jBMaU;Jmd zS%^Tl!e&&=mrr^w_%GE$&h+B9y0L3J~Nf51sj95l) z&6F=ge4xZ8o(AOvSyWl-v!#Ln;tEz`gx??mH3)vv2*ghcho1u4U7`jD8AwDyDWm7^ za7agmk#=(7^a>3X$;ddLPc_SE8`xF9ZCu#RurLd+#wY;3&`@y=ljP#=FcL<0hav{S z+qs^IbnzyEvXJPU?X2b&^^|`+^>-$-nhljkF;*SVu^l!k?`Lo2J(x(VffEZMC~zX@ z2RA&6n4m)lFc)z}5OIqpu{o_AQlmAQ|SnZMq)H(131!03m1fWOg%#@ zFJb&kRM1)yEb~jUz+50zQoAt1I-5*IL|KJ=wYXZ0!M}T!NR;lS3Dn0XPnPpO0A9*) z@Hz1H^P&$Awhl)0SxBNl(j=#8pHi7`Ek&ggvP{NTE+%^Hkx!_KP#Fd;21aM_0P7y; zne;FKkYt6#C&eX#3@uR%eS#}|jNl3%Oh9~HCkr5aMm#TXy1ndFZ@dl%{H>it`%BNKEu5C_2kTC#7)Bpmj#a6L==@?Ypol{>G~+pj4+Fm(}6NP4`u=NqoY^D9xDq%Qe% zX5ik5iy^#Q$af$=ukv8ugqZZnzi)D|z5RoHaYd`>4zG^+GA^~49)(uC00qPc#D}c; zVfly|N?7jcsQCEs*@?#TfK3_iob~@<`^Yv%S!>QHnT+k#qSp>D{Cw$fSx0*3wCCma zx3b>YQOyUn#utT;aTizNDgWBN{4HIW;Qs1&?TTT(yhZb9fPF)J!EpUbi{iE3OQDas} z&bAdJewiWhqZIU7MBcWsfYZB;!)+BAQSP2IyMz8L^c00@^Cwqe8Agx!-mi!A7EFJ! zFJaZN<@G#l>bsr%l8y zND2UlkL8-!EaOjD2B%dqB0w$m?`r#5B^Mkunhu7e+l; z|KR1(Pj41(^KSD1dLb!)-DqD^+TFb5f8CwflU?{i+l`OjO~`rV-V?HII_K`jgM}OJ zubD*pH{Ra8>#=jsxzU$;UR;-T^7lN=^!LB*zVx`VvSqQC>pHLT9^0(#@%%(T?&t;z zo~G!ELX(HMl5q3Z&%Y|C*E4zh#@NjV72ECG%LfO%SH!Q$2=TbrCOS&ogN1+Vl3wxX z)^4V>zzAIk^};uie&BEhH~~-(abJaKAb=C%ip*`87r3E8#a}rE^h{h7r#z?VGAH-z z1bxEQLOWdz*5F@vF78g9f|o8~z>(kJf!Cy%3$w?N;*7U{ARd8Ze{0^R z5lWX4Gh*KH7r+R=Z5cMZz=?lbzBb$2x)uz;NDT(?w@jWf7sigbo*)IFhZ?!}1Sx!? z%Ud_mpa?JmS(8~vFo1ap+1|5hEm_|E$zWJ%{-$9F^4PKN#cg%~6|RzRoD8uSJ9Z71 zoY-Y9IWlb)fwajW##}pg%|Ux@SDp<0mnW<59h`ZlRHCP1kkVL~SH*(YQ?^F325VO= zcp_X%b3#u(beS>xpiQxUOdPOmz!Z=Sr4}n1G=&46b95x8#z(A2*MmD%Yq*BQaE`mwN)?X%Qnrx*j z4r5VhJ#q(sPl%y-d|p#rK7^$>qrs_E`8v@_A{EbQ{zDePUsC}hgTpa&Qap)#O(5Wi z3*AD5-g5Z`@s7}&?N0r1FGRCI%oNEWhY>NEg!+iCr1gy$oh;)`htN%OMI(~frkl^P zqFQRW2F*j%Qi_?EX^?(uLn5suXg+LZp=K39ZH>G|FkO_toQCRIE>z4S(nHEFAD~?r zyA>qXgh~?iI%O?F?`6m&d1^RT4oPxDaY-^J^(7Pp*rwy>8G=DKDB3loW znk!UIr+O9(L{Od4EMEG(RU)bzkSL%yPNkhRr~bZK<|ozCjg%eGA$(*L7KK!Qc#(_6 zF4hLKXcU9$P&!pgvZ=JWe6RtBR)s-$mijz8qjP`Kly0m2aYt{%rW<(=4P+7!dfNzBRuItTc2AX4v`7EE`(v zf^Zyv+r(OgzuCdE>LNluFFRDSje7>)h?3u85|at|EIMIZESYXVE1*G4mQ*unXh0cq z`E1-+Kn3FcNHZ0sr!0S$u`prdg>0NRNR2(*Ec+TJa5lLYPd>^lWYLPE1#3`DXW&42(f zgv$YNPHBSda1)OnE9Pgx;8c-q`o9!EqgD@OvRv9^5TLP$x@_tOv ziIkB7${kB4i0<@5lm$3S?sZzbp2W+lfq;yi=LA>ocrjS3^)Q=8X(XiTb4t+w$AV*0B^u_W6jBm8#6yj&m2X1l zL4FnlM0tXDzt96tZFG`23k}C*%W%prorfR_8FnXZt;n974#kiHg7bTJF2ng9K#xjd zu)W}23aTKnU3DaaiEtFjvlk#(jhpc<0;7Glc8L%SlwKGqYHI8;@yX)5LSzGHGDv7l zgFQq0a6z4;*~-r36sRiKr-}(i5^Kc@VNl#zE}J8WcW_C+s3L>Jw#GJSJunHOB9ATL zR|7viT`m!-aMm91ZAaxFZhg0J2UuzRBT;^8FDH49< zFe|EfInFBOtP;G{Y>ZAs-^aF!7XFw(gVXu9oF2VKfuKv@R;VnVv}okQUII-43Q44m zcCsra7)PR)ij$>09ohk^Z*d<%TXB%&L)?N-3H+20MQ)Hb2N~UsXG5iC7q)QpD9pbh@_k{vfFiNVSiaw{_5*pM1&k<`N z6Fdxn5zh%f-VhsD_6puc#u}|o7}u*Ruv(&=M}#mJnJh`vv1FO+D?_@hTviYHg5>Q) z=`vxNm?#gGioSBru1AF^kpAtRH_i7c@WGS5GDc9y!F~h#Fv&8(4$1v_=@YQM8VkiFEC}r8NFR~(DTTmA;49$;T&Rom z=~#{0rDzCA$u})|3_>hWEp!UyJjioe^yf{#kt>;Mo~jn#&#&hFW~(GyxRYF1gXnYiPMwNu^LM5{*Q95TfFxTurCu z;Vq_<^e+*~Go%Ef7kWuHg0uP8K`lr4QL*btUvoRmw>$gni?S+hVQh13S*KX#CpeA{ za?>afRaf)6Rd70~S;H%&8gqD)W!Dm5?f-iNV$Uhl#lFU|j)9ZvWJD zUB+|XIr7cGvoLHwgcylr;%szQ~k$w26voh@H zL;J|3ANO#DE|1CEJ#cEWE!e%5Oq(B-)Kb2WO<%IRc4YHNi*V`TP{iZ>pyT6bHQn}G z&EG|jI?0SH(*=<#<`g?Z@5pNyh5{=QZTNO<^1XxIIXkTFc#)GI`|8Ay(Q}x7Uv~mC z4P@uMxEoWA6>te*&m+@`bqnn>%F?m*!TEmUj(FN;Y+Rk{I2elE8 z1-9EZrcgMV9*b-xtBo6vK36#XOu}8y+Nkc=NAhxCSQ+y9aKZEEh3PM@6>c0iAB~FD z(%z_}d4tnso3)6ypkvXR5O^#ptZ=C(j!HyNbar$$ZAgC9TovH$$PzHA@g z7^GEAwl<#gzVIJMlsh59KK;ge2knlm`It=jXDd2l*{@Z|!>ad@V8 z-99{`BUHmXg14+ZbSl`r^w0Av#x@mn3*)<(mb9^(XS?y4<2(OIZi&7;nQ?q%dP&^P zLt|m-d85UvhF@M8((robj4Af~wdv=phRlDMosAK+Hs;q;(?+ai{yD4-8_03rV={s~ zr;EQF?{Kz!D-?V+9u#nXZ#+mPjyseDd!w@ zv`(JZUx%ahzluMOb_KN@9@i5?dnR{Y8~Xh&9;X17j3p}_O`}1UjM&l5n-6xjZ5q=I zcBguJ&UF7a^w;QqR(s-p)1NWJljP7gS(HIJx-dVDIz}na0JFtacJUi&gCr1AEi`zj zAWO(!3yK3SnM$@D7b3Eio`s(%--bK-{^(PV*?~3uho&cX4+7Xdj>m$us5f=n&ByuY zzy80psD&Uc>KIkku;xbae7i&cM(Tfmtj^%+2>QG4W7Qkf0Po#q7qy1tom%R^wPW1i z9}QnF?0q4v#cwPosRbHUgW-qZu_fjc+q!rDKt5`Es|wFMIYJ%H`)kB(3)xa+_D(25 zDkh7Cg!kRWF0J3#LYKD2^JF-qoDSGnSyXuTeSOBl_uF?LAE6cuk;7D7Aux$gv?~D9 z0YqCT`VCLAR{#HD&DDm&_dIpFjOp*m5n)A@F7K~lYG*f?77V0bE(frIT+LGywF1TECY>R@_}r0~D9fpb-o27gQV zJ+#c48?1U2VpAbt%zPdHibi61hG4da7t}_PcIj5E0E!X*g=cteBbz}W2{|@SUc&!nwro6xvGvn@N^6sN=9~yOK_t^P^&}ru?kd1>jqv?b?FrTsEv$85X;Z3p_s1X5Om0Nw7b*>H$1q0FF8pVh>ctwD8>k$5Ms zmQ~|9B$q-a_i$ZQE%)vq)`V%X9Im2MN$_1<-FJ3 zzyZ>OsjzTRljmhbIEk`&IV~>*bz`;P?0HzS29hOfWFVve7WUk_=uR9?hG#zqp?p6c zOBr|zM#2K>FJ=Gca}98rQ{gKCL9#$uSHTNrK{QHDk^rP0BG*a|)RJ4+L_MXJe1ZcR z28uTl3^Gu?K&9vC5oaLtPzRHTqSfx zb|!5M*Cye~4LWK+Phdx3oW}d3;4OMK0I#!J9kI1RKO)uAWNA#pkpWeHWsI7&4sygo z0LBY7~54sr!%~kCB<+VOju=bYL{7?{SQ?v zvD#l@7UshP0?av)dKLOylO_^Gj(ML7F;~ImuxHenl=xI5^&Cy5>K->QH4wgT7T$}~tHt>)INZhV<-&+Yg003;el?@G0dqyT zlkg{9h!~8AK4p|Ab}^vN!SfPRxug_suEmp^Gg&)HvLqwaAoJj|ie{>gM&7wWV4+gX zC)5Ry^;1@YlYvxIU>VuN*XXW#OU}B)u9BYS4*W zNmwRehh12CP#0T?+F>tBTBT&rto@Q8D68BG%TgdZnK*@*8-jCrSE7<_0v&<6R)RH< zB#(4zI5e_W$*03wj_JCzMhKt9a%{P*&UQew{V%Gyue{>iPdZ6~w0oRfga-eh>9U_b z*EFE-7vjM}%A zSxSznVFP#@h@2o$q5%bQ(jp3r=w6g2ed+@ZG9bb8S~Jtn8|1zku8*t1i7JA?>iMN) zSS}mJGV;;_k|s&8<~8Xt0(GFHPH!$Nwu*-90n>eaHiG5`Ou;9q&uAC39u#7 zK0YX0iXcFTNIZ>{$}Yrgdp0JYtE3t(pCb3vG*`DCt2x`3a>LToI3d(ji6{9&7cv0q zE^Z6C(Rx14TNGQ9FxOkopT8Ez-f3&S-=D174+XRZ7bst+9y)uu9P}e|prP(4n^JDr zj*89$0{>YpSJv>-9q=oLcd+G1D>=aR`ICog#D=V(w_keN$m$AEm{#e@l-Oh%f50|U z>Kp3yoQ?!kOH`z)h!yoeVwJH`_M!L8d(h-g=v%H2Z}Yp+bP668SoWev$tJe~0h3=f zyzu49d+Dr0SShw}$A!vrwsO-~w?xo>Md-E!Mq-v3OV-+24%>9aE%a+lIAC)~Al4q<%zs_7+;)E|Y#Xvn30_Fv3Hu88z_m3cw# zdzZ_;x|Z_J(rRtwW7U$X7eCeyDIe#Sd`(Y#Z(JMKAor#j*fa{m+BGA)P{-!S;SW9? zD8$^YXS4;wlYeO^Co5Mi*-&`Nvq_T@o_=ZQ;iKTfcdGJ6W^P{u-AGfuODLSIcyQiv zS~tG);~3%SeVuzlf#Xb1(a6h-5}@r#FMS_!=Fz_*XAX~S|1D)R|KxS~^1=A8+dr+W zq`O`Bsbh209_DAqSAVc~=l)dVNnZI~|3xH!7uXiN3ZFW=rh4L25={;*BNJe-+wE4@RXJX%=LO&>m7I5d4` z$?eIJwZhEqnLTr!e<9)2%(`7eTc%ffTh5JNJGrD$yRh-K7GW%Mr{fUpZ7ct(@$>G&QI>_|1oH8T4Sc`_|Oe;gs0CA0`5$ zuUfjpr?>YysF^c(;fdk8_U`hDAL)7eD4#cy{X@^m&k zu1_!ic(YTx;ZeBr(?1H|nM`e^&YB6+Dhd|(Ma3{5tb?C>_&?k^*Ag&_hcmtfbg)A~Zn{a8c{J;6Q`g{j; zz!ZG<5A)kMUl_G+TiR4TKMfCQ&ORKXsewZt08@&+WShN2=fOdA)=kCYpcDT!ucTIQ z>lXT+fG(Y3I|#_#vYvZ_xz+&8W$0?Tct-iN+SUIDRdw0$Gd-n9ZZUWiR158aU$4q9 ztf?)?IQu;dQgW-Bp5PVD(552FdsGo3xQ~Nj(BNI62IPz)84UZL^p${Lt7_W)l1Icd z7LJPHPX;{i_%O9TLtSK^0`o2n07}RXKvDL&7SM&_doaKqPd*#IKdJcRDw)y#1z?1> zT_y95k9V}J*Nn`1dK43o?xo4@6&+va&)%CQ>0ys9XwtL6pI8+STwrS@c1lX zdOpSk2+ABbGM{8SMb$l$LS@Ma58S*Bo6yS~72>)K?#Vn<(GD6^WRO@qupXD465xE( z9Tq5nLtI@{70?z?Vg~x;`;=Y)BhwBp*uYhzWo6_P&y+H#8zoe2Sy_TUiH~C5>iHuFgb3AP&WhklXpzY#foDQ{g zrRyu0_68!>YHj0+Gbh%pnP+57aym?}DAUm?aJW!|FJ}sH_FF+(h7aO3y>oFhkJ|M* zG0}-8v&1%BFIe)oVg$kX$r(D4Z3d28P8z|1mO!g(V^kLv6581f$=G8qW-3j@9j`w_t|{teD(jp>#|DV<N6^=-K54XY9f({YSkl5?29YvP{CD7S3w4XZgbsBg z*-2imqdD{6H1ioRu>_KGZW$ALgO|~aP%5-CvQj-m?t! zwV}_C-$x+oPIAHi{6$2?MZs$QO0W5@tCqhEw<86*KxYBh6xd0cnyJ7b65-{7|J~+= zuSKKG5hoi3c#ChKC`GwK5)6~Ly~g;G4z>dtD?Ty;%W%oddU4POA%WLO_Ew;qD*9+h z5`LVH4`-U`XsYztpbb<5S$2lUcxa&t4|P%$zV2;EYL(KUAIGNuVeHsbr9=;_BH!av zU`h=TaU%ucE6KL7u$c{# zRG0-mwfD&X>q9^_K(Rj+bgO$+^%4ML5?=eL|-3y7~FF)oiTqD=(G<=U6gG zRmjA+FkDBzN|DJWFpb|pnxGgcr*;_|Am~e<6XymYL4LKMy-N*mI|Xp(XMtS}iSbz4 zzR((mxm3#&jwI6k;|(8RJPU*5Ru;ykeiAsC2hH>Rio{kN0?Ja9EaPN8z93nRFg|N? zGOAAA=RHB@!_=dzX<*e^3BC+S|A3#>j)C^zAf_%*t zTugE*<9~}mx@$WcBBdx*Z3GL;7w<8UjXdSAhkZN9O&s4R5}moBgW%QQb^vqe zI_+FUFEsZxpAkX1bC!UOH6_TYz2z-YV2jFe9Nw zktSz;;wdB*8$d*l|6t;wtNG1_!dPeLLd#DZ*e+|K7`d+QoZcy&p;EHlH_MK z2KjqrynVlppT~qh2rpLN=cFeh(@^}gd(yq4$=NjrPQgPPF@|jc-6g_G&}WlK{ynO_VcmC@%+XW@JgC6p&H|7J3?BA{yvsztucTCdxty>AXe}7j=me z%qP*wm;VC~1#N*)^C0D;k%r>1gsWis$pJcCzM4P~0Q`MO;9Q|0jv?g6Sv1i6x~$(- zTjI7VxL#*3ag!ZuUQ?y3u04s{D$jI|B-7eWJ$twtNwkN+EAeACllv7ztpoL560dhS z*jDA;te5N{00g5x?fkOXr1Nhm|5-ds2DMX5=)m^OHpmk$GEsEkFoybX$4D=SWU!vT ztQZLDNT*T+WnF5z{RHz;or#USM9i$5{T#l7)bnX#G>HbDs_Q4S)O+z@%t03LW&iO= zt4O4q%|z*UiKFZ>VBK-D4zgFcMP>mVLl_eqA0qTaS)xB>q3QHuM=IBvAImbz2BwM{ zqJqwbx5EWxy9Hss>cuaO`;z=`fxC4YU2#39Dl1pRc?4tnXwO_$Xo+))pVl}dpr*h1 zWGlY_*OFbv7<3NpPKPj+}Tg1W#Idu(4WQaSP91dyC~li*s*BFn&bM+ZLU*xv#d_y%F{fT0b zpB#(VR*vARgCZ-M;Kl-!w)Bpo;}#_$-930i*r{%f4!8~sqys5^orX*WnJGG z8x3z>ld$85bDlM85?V*%!d|Q+9sTFVJjE#?#WN>f_@VCnDG&ACLEG;^?$c`%R=8DX zQX0>?b<}xxclrCbTW0=D+Chx2r9yU;oPRT9TJvMZHTQws7NU>1ziRBrD;cru$SVm6 z`1pz)37-#qKAf^@=I+=#<&FezV_@E;Lw@t!mb$_zfKqR7oc?rAa9Glfw8`=>T7Gg* zZ9LD{d>6E{m1FyjX~&AL*eL1$>y2oPp6JO_xTro_8#$U$y91j z-saJfw3+6g{yFiVtb||2PM+Ix?)GnwzkBn1+T{Gk49mpG;-Tc}><8TgqnoOSmU=dC zb|6zP9Qo#a_t10G+QR7^{#Q6^ZsDK5K79T}bi~keBdYM-*!Jv4E9acgA5BQT?f)Qp zsN=&kpjpezqkj*5`T6?EA3p7dvR@vrMb77zC%hivv}SKa<~ z_$1lVHyn;Er82e+Z!~w0y5r)9Udwv1n=U4%G@7CO3D=53rRS#)9iLBJemO#U{{F<` zbKPSzsaLpd9^6!NHq1hi0mF4Rwuue6Bm};fYf{ zp4N(Qre|)-UNboSJWKMG@o2F5wM=d7n7yca+ilm~|H|z~l9q%t#eNd<4dJSvAngyB<)fZ8X~VAk^h zFa?GHD}QG9lfjYg^)mxMe?XE$|LDn-Cy%d!LTbnDVA?$}g9M04@GcY*s-|>;cER)# zFg#u;Xy={_o_zmuOXP@ag#*w~*$(m%c)H^=XW)>N_cs)o2LU{5ZZUXA#6m;6dj?Fi zf@x6`e>7}-y!+(;^1c8{(OACE){ZMwxs;}al$r9fj<-D@>8 z0{@5VM6B@a$oJYlV)hzy>Io{nA^gRUoa&Z=0#rn0v`A*aDCL~h6NvDs3Q1f|4N~gBw zcEIEdi=%UWbSb&f#7FtCs-Nnj=d53U4y`jr)`Iqgv?VY|jHRvq&B}~?&)w;HmGffJ zauMRCZwC_6d{_g*u6!-zUKeeX5I~f30jGTOS*wIBwU9n^e2vc&QKRew=^j8GP*ntP zbs|D8M*fZE0%_4o*&3+8&lk9}fx#wC;p?JHWoU8-WWkqFG(xH8%5Z2Y4YZd0V#&56VQ2A+_;ao0)bP%HMD&i7KM| zIk=XvOXrkV^xb?`FyWC>YO9%%?8yN+4K9ugZUX-JF1qBRZ4k9^ z!dx1uqLc9=S^^)YT@-LQV5F5{@#UGz=`Pk!viH^^p4dZ{%FQ(YK@K9UrYjl>5W5&J zHl!BdIcj}@f(RnA_{`(8$WW%J3z61^mghq6*nAReSk|AF(Vvklj&-pj5ef@ZEK~|t z+`<4Su$Nc)JtfvtX3`gUzXwpX3$oIT*b4|kG77j)=ujT9NvI1v7YW_UpO1?Q33nVR z5EM;}#>JE2t`1fx)v56^M#`v>=FEDOS5cxIV}ctE2v*{Jkqzzdf+YpK|DaIkcUW*T zDeOo4n4p?Qj^ObiypiFIBHM%tXf+xo+gV8+Oi+PJkYp?c9h+K} zQsjM+z?EQE;6CQD&|*lQ1>*Ob;Uq}U3w(o}Zil5&jlfaI1aOJGjC-*Yjz$tK1d-U8 z(O8-ZS3-X)vdClbw-$mW#7wSpYaAmt&_rX>p2k&-k}S{Z3f|VxEt(nPTcQ=HHV-6Q zIO7M@p0IK+bcOQQp={3_m(rO_=zZ233Xr6_$nZ@FRLSjO?ocip00}W-%iY;w{jMTf z8Y@KLfyv&?Cn?B2AVG_+3IifJHlmraZWkNbhOm`v47*;UL6LP$Yn&ujCNsW5e5em8 z2x~&h`+wmC++Jco(wWg6I|S~!CZBlK+2z{*7}$}>%3C%ugQ8!^sN zqa0|1861uoxLAe>?Imu&bqX@c>BNFiS3dHYfXf+PSc-p}Lv#xB!v2nAvN;O82aXa$}pTFv3$rCje*GgI#u!kJcUbM z2fF_VYuH>0T`o_jA3UWQWY7Ydu_$kKEoQFO63W@-u|P+y=RxXO3ZML@$zqP-8Dc{& zAGFf8lGaRZvSXt*CQo4ur2Vri_+dH@lhC|e-I5)nu(V7j=y^m*22OmQ795G<*cy0 z-S*m=_A33bhoC<%FzFTpZczWfvRU4Z~E#gKsn5qk}OeGJp`TQ?T zK#!@mLz_9k4IG|=u7sU}ys7k@hROo#>7=o8Aezf#dzQzVBV48(OlC+1(!=2{yjytq zZZQEc6wyu%8q=p<`Oh*jcs?4?@B#uqZ`)afb=g!MPE{YIM@0s-_aJkk!`KMs=BBOy z;)3aD=DPb{hL0Ao$Xwzzd~FZji_cEYO8T?l#F|2qQoP>fHNn-UZy0M)(n^sd;N#vv z;syI$z*;-_PDZHCAtPws*v1dDXqk&RNqzSVeFo{YRPePl$Spbw2N?W{V7|B&gdQCN zoe&KR3c?GR)b=d02nF)#2(I$`6La9ImnxIL2{H&hjMJD@QdN@gwKKw1#=oSXru?hS zSIdfD)zN}&JCuLC+CPc_rmsQrX8sxLFcx%B9H4tIdeljIjUM$i#X!C%t7$o!g?-9Z zCIuWMwDY$aN1tEb(r~vtaE5R&D&q*DGH;**$Ud-b9S>#-(a}_x7o1$8C$J@4B|6zjji= zbo1>Y?)~}NUQgqKmd1NrvCVt+pSNF`n7BXG=e1nZneW%+ee(ET*6p*~_l(S0c|H5! zuhS0r+XQ% zxK}uiMch_+)+X&<_tVm`dvDJyp0uC;z3pK0@J}CTf9}3|8>ltoZ(pAjD%9Tm0-%QM z{=|WtDW6)1W$-tJo=smC%;dX6-kWM`%{XwsY4n5SgD;MMRiyoEXzthqsg3%uHsN1W zsNe`0zu%kJ`3~Hhc7}Y=IA%NBa&qSFg6?m|uibLk|19@Ry^^7c|NZT$@PL`$hL^5P zC?7>($36GDU0Z$~dh7A~2zaGyk;085FWd(I^d~|JcWs$SS{q=@nE&IBnWnFYcD+9I z^QRM6KWO>)@CO@aTr=xihW;p-avd(jAFO=)&qof8?a1HeHnnzc5IW9jw{_5tUt@FR4TC)2gPY|VrJi*MLYcG1mZJ?(MoI-{i z&rZs_R)l%_K91XFp27gp(~fy{>rU$P;lQ6bOq~1hk+4cx5Ail$-Aw3gLnR=yzjgVo913_Y3N1&Kc?P2s)=)N|4y=FAG)9Ydmd&ogdrTl zOa>Sr5{XfxwZcp$VS+#;QX8$^2t&1YFl~|gQ#e2 zDTr>{-EIp-YmYV%5E13Q-M@Fe>s?FcA7>0J87KGmzOL(YfkA8N+GRhtqn{ZjuQ21j zCo&@rbtRMPnZ@w_YxQ*L%HQ0jOGc@gCECos<6J%WYSa|c^5gk0+ZRld=Jo{>-~jF0 zdPi|eocwNOb(?MR2jUnQm1-Vdh1GR40H5Fq+yn=JPe`el0VOh_Gum=p!wgxjd+py5 z)2n{3N5@-V0M{+~NSwa8OkFd5bYW;6XpzbL8H`xKmpHYf2~1at86&XbJphNWkHA$$ z)gRkVe#TEpj_7cXLW7sAp%lKWbu64HCrppx_XaP?*bn zn?@-n2z%5KSqa0aEZ(@L4yIR#TBZ*-yYhv#3l@m=j&d@l&*vVdVvS5WFYe*f`6f); zMbY9yVO10VnN%5%=0lp$tqCSW3y^Ul#xO_0ZCW1YtqI|cWV{1d%GP%F6~(k6EoIa_ z1COIMh}WRFT(9dllGHGGi`+{FO-1FjOa&FVO1>vc#|5c@RgS znh7n2d3rqwvfZXSs%p^HLG)r5ft$UlrJM>vGBL6IHwFJVOx8l1a4v_HF!s5SBujOM z$F?r`N~{Qp86xFJ7(PeP@N|!NMWg9*Iv&Z8bU!W>XS&OgsuV z1A|sNoK3B30Lw5$5wdx2+Z(Iuka=`o!fHZL(+!SL(no#Gl2C?=*)yjeYb9+^;M*hu zi_AeWZ~Q8FJ0sPXtt285oF*GW8W~uP8|dsRsii}Oc958mo=l>iAEZj`27c@aZm8)2{gz4K3ild>k$E8v(h7NfVo z%-aa$Hnd5AQWPC03C+xEk4iIW@ev_^$%W=Kkyz}2 z&=4t@kcAO{N7>V8T&(F7Wu!Oacp95RAEozeq8d-ofAdU5tYQSqNyq|rG}EI>)wgVV z+6o075kj;w3E*W@Wr#F32T6q?`F1)81Ce+(wS{u?a^N9s#gHQmlxL*sAYT$9(fFDG zfHWY4RBwQ#(T6R*PM4LePup9s#?9G;}fL0LE@>X)5^$bS! z{Rom~8cJ@W9c&bxDpyKlc-2#!835JBwrjNs4-OK=zH4Z%@SkQCy-8`D*qhG)G}mUa^{Y5IKM_)RMkY6_nm_>ve~(~ z3JJ<8qK@EDqq0S57Zd?cjAR2t1YjY*7M}<2&4(-o>TB|^R!vn2(v+Ob@;N+Y>WScz z=m-~QHK;hH55GW?ws@H7A$re5q~{A@sTxJajd1oas2G@(rL6r6Wy2fo>xjk>A`iT1 zD;mskqiA*``!zZw^kqZUG|#S*A=b#Q5V;9Y_8^)jS6U@&X(W0MgSMa;mx!_FhQ&rM z*aJQQL`;>Z>v@F<dJR0z`YUJ@j(LtECmk0Ia zVA3jAFpPY=QkvfMR2f@J$RbF2@DS~527&l2WHCm{VOTV_UzAC31@sqQ5)3?y5=j*- zM>Ii_^dPZOQiA}2ua6Ek@{kWtHNdGv5a_I=5mK^Tg-8}-v^-b_@gk~~CtcYSgx6v} z5K;^~!zpzO03Qk<0<^g_PRwI%g6f2{|GTs-dU zj%bvSJLYv_x|ikzOT(bBWE8l?GGJQjsm?z|ArW>jxf`P)KzGB&pq|4`sg=E4yq?R% z5G%}^z}^L)3ja-U3z9GAC>7noB?FLPunCvKd^FkIx##lo%6x1chV3WfTf*E@ylNOc z05l(CG6^K=&~i$up_=38isY$kvW(Ni=iy@FvDC9dOe?1*N}vXY)wWUOfj1jTG2>%_ z?_!#=k0EAAXkvPn*NCPV(ZyCxeS9hv&W}wdFhfiqmqZe=T`i()H_u4`o*=kcSfFQM z#b-F_ijAvUmmo&xlhG72M5BXLx?Cd$J=2FmM1d19jnTlLoE$um z=YT>GAF=|D7(soUg~IalqiKOSOCPqDjUB%?530%IP$k)np;ay5g9AD_xdl!2QDr%R zpvi+^mf$>UghUY4!d5839b&B-6Tt40K%*Ibbk!-^$FR$QZ<~N}7@MKb0!t1H@$$nW zS|#x3m(G7|1-t^5I4G+CXd;Y@0lJo3Du6Om2$5lgMDUREOeS3z734U_+t;B!Ou|#_ z3QkBRrTxntcBJs#5YA%WdH^QlC1OEtCEh)QX2}Xk$ z>@X8@36-qi2uXAsQzpxzxN3$^m8P;}E1VT^HnXk3ttmpiDy4qsfwqN4eIlvq;5(l$ zYM9cH8aYF}wkb?yUIW9bpN*5A=1u<;8d6MT2jJcM zaP)1YvaP;mPvcxX*ZnxXH7HoBDM}~Xe06X{k?7*eOGSsis;jD5jQ@li#PxIteJ#S~$mHK@T2O7JdTeBte z+Q^kCi)u}$UU#a?h9dcZL@VVZ9>w=>L*JM6mPnX-_QQy^}hWd=Kg!Ee8c4j z&zf^rP5yI1Zq7uV@hT8~pj^wW@~bLT$952UyhsoX!hLi>fFE!Z#ETfx__+knfW&k&U${l zvDUaUHz&ZH%Y88Odeos_e}?(Z|k4}Llg-kXIU-L8qP zQ@Y_-4^95@N4t4){kHzzho{pEf1O@++Sd0VYpn1@;M)WB!t8UC{fD&wY6*l`)gRnl zqd3&@y!}4@^6ZYud%x%IpWFuPsHw)r%pHFWsrv)N*r@4ZEs{dK(K7cXR_@&it6PD& zPZcr-rYB$+Ty#FZRDTYb>c*6h+B26$&CUCH#CX?2CK@-5on4ZrZiT>^dO(j`bRmn6 zGew%)3kDZ0MI#ri_OcjZ%9a>T6Oe zM$S$xDF74Cw-h+60YR!eiVxB8-*!|2`gP@faK3Q26&!y2#h=I8z~Q#;Z0Y#zvt3I9 zONF8aU`1D4Vt zJ&gRdElcqONe$y<$6kIjMRcCgTmQzA2}~=DRe7mQm_=F5^tb;y+!vh8dI@(Yiw6bE z5(GW;HOU0A-OfrS7FjJU!O%*!Sm+}q8S+FbgUv%Vd%a@vlAtt2#u1X&EFRR5 z-p*$9UPpp$qzJO`;PK|0SWNkq?SdU2tb-SLX29GnY(fx1B{hg4j)n4L|cz5uW{)z4d==i zxhF6na2eNO7f1R+&>l?vK$gZOy|^6$j=td?0S11}>5MJ+f^oE$$gV?P@XU+n>JxgE zv2V}_8sdG4{S~WhprT@;2-szMr7sZ2CWVIJ`Szp?2+uUd_MzfZy2)Ve!7HE)9+Y!VMmemdJRnMKhdZ`9p-nQY56fF_NertcYV?#q>MA>_ z9Hdz(4NFd6xP+;Nfi)?9E<~BRv#u081q4E3yO@l~S@~BE-kl>35S(z^uiDe0S z76`3idDW<(>BUlRfd0ok)Mv+PKFEi(4KzTfw;;+nS#j)ZdZrfB95no(kLk;Pj|NuT zSWbWlS;A5#BOi;vdx@{PLmL?r6e)H@JGkYvXpw2EWVO_~UsAb2u9YW4 ztWKVw`EshamdJp5^x{dZib_Bln3H)-0|Q})1tQYi{q}!JYA^zUNEuR&OXo|Y`@n8L zARm*F=n5=22*4nsO>_{DMWd0RGGIXz1(I38WqQedv2v~qvX;x@rSo_b$I4DFc|u!d zAZw^(7LQXP;I*WxruZu z0K;Ms1lD!$dB*gf$`QfAqu4;@AY=}r%ssp)CL%F@_fxV4?XB4B$dq>Kz-w>x1QiwDAf-FPYC9>ZkBAXZ0k+UBhv+@trseng_Uv!6iH_r za9Sd8H89!3Nz5@aCbkCT+Kxe7oM=Y8jfs@tcA<*(!geH^%L41>)E?f0JJFD_J6Cs$ zx+d9D<_MBNgD4b{K+3lhA? zLcU0+SY{pdZcFqKW&mH)Xa}F8X~j}=XoAoZi1Zx9U<{mQ_r|E~I0oX0pduiM$!Qe0 z48E;qcSBu+LTF+kZ*;trW8wH5Y6S~Qrt$gsB~@0KWa|?Xjc#TSh1H8C>HY}1uI0I~ zw@F}^ND+5x-_I|lzxAGqcUlz1dDD4Rq9+bf_Xc2lJ@Pv_VS{>H)*i8}cT9{zKC~8aV8*Vd(j4W!yy$CAgy7pm~2atfW z9r%&nUR_M%fpy9XLsnBr9)Tq?2kCd&xJsR>iBGrV2fCJbQC=p*&$6G^d{wpHq5Mjf zC`Q8Xq*oR3_x#`0x3x7Sd26{au@oDuc}1kNh1&eHVDYL({f?Ya)YFWAOtp08-kO-Dzj@gIOGlpUY$Mv@03@@R}Hkc&UP%__2ls1|MAjCP4{VDmoRnYQgvH5`S9XsyDNY-KI^nG zll!hEHR?(WpKX8cq@i%BU-9Fehhyev`@g#PO2!?m>(-QjG&(U^=9=kPKa2@w27RM1!rt3cNhbvOB$&E?6*8*Ym zPhYMNcv^JflY_bKC1d>ExX(W)E?73gCm&3?`?0IqpYtD{|0eR8LkngG#|!=U6^=t2 zN)r3@De+S+ypEq@kLcDu?5lVIwlQOCooUWOlfU=aY~OV93n_@7JKJrX`PZl2jk8q9 zjj=#xf=+YW{WDx@&0m!A;%vpDT`Nm6zrPW|EyU)Id-4Zz_k-1y4{-Q$6rFJ6ACaCA!fq3xOJk5}7nJ)qubFPwer{7+|d z2M5EZ@7$gJc=Dqtb>sc1kvlav-?+(rD&D)l)K)QRUj;_TPMv1zIP%_XZR>*#(t&!Sp7+tCcqwla=i^6!>HV?W4!aUzI)&Ba}!r6 zb^HVV+jiH3SNoRnyPkje^0Gqm{=ydBiw~bZXp8-M`OGWR@z*YoIh|i!m>rqXciC>; zAANO8ZT*RfOKaM1-QU?d|EqhQ+F|x{;h_uF zlP`kNEyKT~27p{l5rHR0pXJ)2*5O~dh<)4C#vOoeF<(eIIWAx+U3tosKVF1Nu-}GC zcYGzpx!>^V3a*88sfHk+c|rR&sEzY&iAF5%kbNqCnb9RdjJWrRd^#4Vc|pU#@&Kx(Q>#618Wl6-Z+vTY#5P2ZSyX z2wmZmkA$wkBcTfnWBWE$C)>LAcNGGB#v|xPX(8#)yAC)Q9vir*4_tJGw1F3)!SHqf zT=aGxpl3jn_z`3;yOPV)Jnza6VOMc=P9bzOqJ(9#S#vg-$-O@zC_2p9mF8^DY8PS| zwghrHl%>Awu;C)I2jKCz`NPJ?QK6|^P>kk7!U84#Baqf$svM_`@Oy|+RR?34Ucs8p zYoGBXDf6_8I^(-OMvA%3s0O-@qI#Gkzoz$a&AW|s4c$OS(h-Q41pI4jkyG|}OmY}b zfUJ`~avdO8(8&ZGi`Y>Md(>mBU~x^Qsg-vR2}88>3NB|~;6w3n>OF-ZRU7VgOd_G> z8ki~$V`(~D)M7GnYmu7`s^N0DvK$Q2=8&|C^_n&KLa0mzhx9dtJu*{b@=OdS%{17z zZ`fQ)kR5Q4smC!-Se2nlCTK0Mj0JbhIk$Shb)T@aY{`XhClx7Ceac zd{@IEyxzQ9iKk}^@6qUO3R}gSb}Cxnw(ZCVOOVnSlhey4)z=II)cA@D_)nNdR7I}G zGAJjWzhIPFgSnA84QU|Le2dC%-i>zU%qdYSVM!GAuI`dKrhOBP$QXmY;LybSnP>UoYxpbFa`n7F@ ze`R5p@+#fC3I7u=jwCCKnK3gP;RA^>%`)xtNB70i@#8p`(ao{ zvq^7Y(f1%U5g{tVZD#Ki@h=jsd&~i>_oyAR4S!-?C9LjMg|D^sb)v~y1#4_Nwv~PM zT-hKYC1B&3{8Sj=RU{HJ6{xTZ3Kky^?zP*s(k7}#Dww5`d3dxmMjjGGOIS{_L6&5| zBsDPeH;j$*0gIFJws*d@rWJgwR>&2@ZKO!l(uV{yw<({qf5zZrm*VvPj zAKgq;`mhx+Knn6yn3UqSLJo%elM*RX1xdvvD9r?cg*hw$rKRD#)E>Hvu79YJz)WYmwjq z915~7B01Q~4Z?W@+8d9_D(JE)RG)f)spK4dHKq>#Uyg7Oq0)NHfUj}oWsyoSTjcOz z@hf>8auZU{L}Zf+iZyuI)jph$)gyTk*I6vz8h*AnW>|_ef?pN zMZvh))-(XIlRciEx|0LS7&e3;>|@}jqr^TMXM{7b zNwf=ygby(S%_H>`Dm1WP4;j-lMre5|p2sk|YiKjmYAj?PBVy;6oOG6Pxlo79b&_<| zId=s$Ppj=>uQT`o`f0eD?Lbc;b1pb7o7p7h4S|h5>${; zbVCN`PDX3k0FfvWLg_FA)f$`(8mHp1;M|l_RGy#ndq7un)`ahtz4Rw&Wuu^YIWw2m{Kn#Vxv#}U zE8)iY1X+~bG-a&POhxcb%2m8-nrG8HRIcTH%ATGmg4-u&zQ#o#qUq~hwUUgYtNb1$ z;}i`#wa(C$*_H++BCV9hjJEcobvyDD=5~aCsLWRFy1h z-3&ZJh;RlxOJlAJQ7aCc%+V@ogWDMnNDHVQ6rb_S37`!ho%{;kRwo1By62eLHIcif`WoyMFol-61ir=EIzSV zuv%nTnG-~Y^B5eTN9U(%c@RkE8!5VMfXt}@Vn0YZCeyeEJcaVlK%j?$lGG(U3M#L{ z<^b5^$?GI*036mR{?8|>f)nI)nQR^dZeufJr^`HYMw046EV5uH;)Y~YY7njh|FlFy z2N8+|)>J1FP8{av!LhhBdK5wALh1q}+Q`9Yb~LbGq6Kz5rj?Dr0|Krci)AuSz8#^z z?H)TO=#-u0DFT<>%7^0kkPc*k4B5;TGT)-t`|iE@Vfq-4q!+V$v39;_YbVo+r&#nF z%Xl;NB@xGG(e=rrM6=8Nu-4F6d8B0-j_QaO#StvW>K3n)*InSNlniMt-`93tIaSw> zv@2G6kAvwGVf!9=2tTdxp$lMe5!R-O)yPk%Gw44a1A-q~gUGL0U zUlI1CXv-c_yr`@z6};!7oeDOS%qR)r)^g<;w?%5^E0#JWe3@;%tenf(uCrH`>~y}6 zHZ-4~q4AB%h%V10Zn3eGQ0pi6vP=6D0(j3a(^yRAsH(M9w`u&?jrO!>nUL_@U~> z;f^)q!yOmk*|%o3U)j=+VoS!0R`>H0k*n|cul|vJJ+vW`EBx8N4=tQ}fT-SCr6b3h z0PkabnX-S|;@Y`PE?pc0kmwY>ek6a)jH@#qw&oXRG!VAB`$+PQJ3BR#o@1avHqmJ+ z#z(ae7Va!`J$UoUT-Wrq@a_eHYIlm?zj8rtaf z@RQoPp|q_eaQxPm>>Ee!Em)NDPD+g^*{a0{oy=Y{z5b8pPa-uJa_Dm zR?T#tsQP93*y!T^(NA1|Buusrr=+!5ZWnHv9P`>XPG23;9hv=?R~>QhqE$VABKyhq ziBDr+ygB1-NxW28I7YPqgWJ)~?bQ$063ReQ_?UYxt( zm)@672iDiv*b$9C53+6a=S1GYCg6P=sSrO`*-w4LZ#waB^iJD-OI3B)SH>GJ-($OX zm}hos)Xr;4!U@`K|51>eHRT-9j3L5Xzc{|VIJWKfyQ8{e-*}zq<2|b;dEx2yM!xO)?|N5$HCc_E_f5*(t zQ-8#!OpgCCy$gM1_4F6vDcdIB-c{(CF8Eb#Ej64njKi94pZ_`aZ1V&hx+weH>hHgg z_=4--)Zz6HdFCE?JK|e^*Xb?g-M3_Mrl_advwJA_01Ut#X=kTAJ8lSmL0{#kmSm@# zl&0Kz5qc%h0Y)xWDLe`J3hC)EDy})=Rn-X87fxW7ZOsesWdsyO{eap5ARM6e>EdK4RXN$ZvU02!{M-bAvawO%AN&RAa3lb_ z3sZnh1skHAf#^Q}pQcN7ukb z7auM(R|7-{@J9ZBFEj*)3a1~v2ABc=<5(>J8N?Q5NFmV&N@eYDo-E{M8rIC~LEVDh z5^G?bbaV-I9Rb8KwrnW~(V2UDEOJ^~3{*6|bskL=1SoVHRhzI00LOb#>r${5DS`_y~oL67oD^gKY!wR&ldi>gLUOpM$lT&LwsjnH7# z3aB2S`l3e_4ttFr-VL^5Df|ssAukVN6S9H!fI3-YrHiTTM1~q=v}wqS$puy`jTz_& z8v;q67$r&-q^Vn}RwWjz7ZR~hi;{G(3i&@7Qj-($N0i9M822P(a|K%$TR? z?r`OxfBKee?a3F(0zd7j{D$4k9a{5$cp^rWf)(c(4;2kH1OIFopL5YH)grGqx@C|A zrRy{j?0hUhzDYuanqq-=AhbmLSCTfujAqyg!$ufNMVvwvv$GFxQF5 zVbW2_mQXG-SY8flg{^<3L5U_tE_Z}4OvJ6asZ~;-Ax;X z!;}^^h#Xmuj;?+TGD%SaCOGPK6lG8griX)F_H{j$WIj*P1q()~nV{3NJt(l&eYQtX zCderFpuL&@p+^ed1;8~yT`@ia1tHYlT3 zLlKgrgkXdILm46oC9Sk*2hMB*TOAMf*o@=Pc#2r3tp zBu1itLQRm#8(#xi^D)&_2A-GO}lk7;%oP?(k_Psa;-as>iTR_w0fDY7%2+?vnS`Knf zsKj@0*-LE0Mxe<;F|aJ0K@((eHoH1=BoZX;h4nXZiU4FAj9B~jeMtgjZ z5~Au5jh9!dq%3vChPaJ4 z5l@R>V~+XNO?o~a8i3GKxJ(CoqzdWg$DaCz#DeC<#hfszC3PV^{3kMc=`We|h0yuIeaDE^ z;sD+`+JMvvy3tO{Wg+f-%vR<(Cd*Rzs-E-Mlf2d7iACx==Rq0Qc^8#21C=gs&Tw$s z*ia_6BnkfoD-kX+d7k<4uO}z0&e%98fhL^P#YqBjQsHVd_1;n4P!y^%R`OS&u@Y*+Ws(KO1%M zKx7e85;2vt^~eI1q~5orABiX~f-6rUOmW;T^Q|=txw%9fIXAy9yABU0s@e=m@DEK6 zF75e9?#=Sp7V$M-!w=cU1PC$%BiXEug)$Red*4&TTBro_3oP~ z`V(SX;r)Aw?zip>Z&o)vgl*~fxdVsd?|r<-_RReT{T|1&HhOwrTfgsK-Io<__Fs5@ z$&xqK(2k|gFZL&?XY~UcCX~v#O5M?`w)dnx<=ndyJGQ)Fc(N$PFtOZ~0(M3&%s!Y-iPGg?r~S(D?te}l|FZko z%z-!KZ}m>T#MVzexU!+}xBKrO%>8w`PLYDXSb49qd)E{G@`gj--2VXi*cK_oBb+Z2n^$P`sc}2>H z%FynKK&bK#H}2TAYh}*fJ^rmP&-x}1`sPEA_s&tjeN8*(CzlnLceDoCxF5^?Q7;IG z8vI)p*syWx=;8;X{Vo1zM_f&7W56?aDcYhJ3H)DO&$zGzEiZodYot{X6l~X zNW`_)mtTGB=H7+IjM?zGk8aHZyXVUN9cptRZNc(?rM!CYNwP4ncwrzmJNKXW5B+rL zw{Ct~%T#apQd`$?W6Oit_q(C7leN08dv39gJ0#va_?9if|Iz*wd~DxB@VhPa?s|Rf zwfDQ*#=IYHr2B!YpGy|w(=9D2uS`Fek+Q&FS^ZJl+f7l%3QTvTNcHW8B6v(0x?s{` zPc$tn)}0$;^TPAL%M0fML8Ul1!5MEURf(0P(9Gnk2zt-^n}BKC-`bKWQ`Wf5bq5A;s!vn%$iz;mN zjDGo}(G2ttOu?HjPAl^&#{gL5KjYcCC@|CY!l9l&fY1iUKo1xL7nMKPtK$M>Zz7oJ zK7;rDRtSB#^|866)khkizfFgX(#c4yvpn=x6jhP0^pm)1h;8B8sS&b+5;~tz-xs4*( z8utuL*vR!1TXBxa0_UuC(W`EcEc))c=Y7%KDf;Mo6hnrH51Z)NI7)NrwB*|dq z*(g(q)6S*J)qF1w6ut`_h#2*ri4$0&RrTK>{wqe`@Ay)|VbqQ`x}I!~TVwsLBRq zM^N!aJef%IuAqc{0^MizA{=$Vj%wTB_gbLx&bn+kzn4sFq+c6Q(rg!h)KQ*Cy}MZf zA{ms27|sL8d3#73?Zz7$w0mRdrjO@n9m4zP;d4b6Sb%PW%E^N}Xzk)-8CaLAX=6+g zlAW`{iksyJJ6*t^289gqV6UMJ3h;*aNMqvjK8|XPu(Od7LT>XuF%xb*Fx>my$Y)|P zgpXo_K-p?av=y~ACpITq6rC=o5mlo@PWOO^6MSf4pa0}JBp(eCF#&SH6ah24A-I-g z-;%j4P&0Z|9x7C2i*4)J5V9SX(Gm=W$WEC5OWkx!4Fm7O6Z{B~^LJf>y;m4-=ObwpVqGriNIV5K7Gzi#b%t ze;TXwv5Cg*u{`%0p`p8wR$53SV;$7UKBNoAT-x-pqaPfmV!>=AZ;Ycdq1`YDN>afO zsVHHcmq~b>eFw{=u(0xCPF`6OMhh}EWhWVn!xt@EPRI1pXUtp-XQxp%Bq$*-o)S!W zD~wAj+%X)>01|ldn!aDhrB5OPS~f=sd|?SxFBC^>K>%Mc5aERLhvRKjW>q-gzSo?k zxq>Akr374=PPVcbme0#8^P9g0pyd-C=MZXhY<2VLu{I=nyMP5rCQEG zq9>-qw@Fe#hZf3H(ZHFAXaJctlBSS#tVU`jEf6lHqDx3GlEj-3DHa~H8~l1@vNVB5 zxo8<{#&L*-g1js3=vg^h))%o370Aq&=JzOr9fIRjG= z2k@-Q0w+P#6vM5~i%qC?Gnr(b>k4~(Zmf!71tcCHB(9<)Qp$F}JzPL`-%|SrI?V?xi!~ zHy8zj{;eJhk`SU&W}ZAyMNl*vTujTp03RA`z%dp+>IIKm>I@OwY+tD@=41-czaDI& z*HC6YNBJck0lb%uSaPMi)6_tR5_8!IKLIZgufsuDFEN)fzn|_nN~hbsppKx{unBW; zsCIx|L?RohFfZfA`lvq@Gz!&kZblJnDJ4yon4R8v$vO;_^_a`KD;bwQ#N5>*)w+fjH0GA=M+MY@Z>-SdE{uioZ2q(&aQP$ zmC4)>s63ojYMTWJt`wD6L;O67MF~$(G^@w!JS)$$5=jRfB9oK_t-uL@0SWHK%2+-q zgqCB`K~xN23b910ok-&qa&CoDq6NlFT1ur-ZA`FN40gbh=I)gLnukRTQYhFc5C+C9 z<;~#VTZc+ei$*!~jRGO8>|-Ecoz@ zEBQSR3z9RC#mr?bFCmlYCii> zltL4i>S}I&S!2ivTS;gTdGO+_LUaj?y(855B1V%-p*c*3Hzp3XzE2c6eN@N}J|D3~ zm7Kj)QIyEX;qa4;#lBKp+)6~oM{2*Kv*;&vT%;)r3Kk=Tw0Px;e#VXh6+@Dh!z$D$cD2 zLKlXq#|U{j@E&WJW;ltS@ccaJlyS+wma9v|piy$HL>Et+i282BO|Dd3#6yrF*Nf zZKgx$-MZObB@YlPr8DsEDVv!c+i2_mV>nSqt+u8D%e*^>J)=MLSS`KNMQY+?QsUNL(jKo@lPPWSCf zSveFL$c)J?o!wQ}e!^e(qWaj7e&)(E-AgA5k{*oSczR~nm$Q|5_*{>!Xy!)5=b0&^ z)7N(0-FFBnvHB~g>tk-m`*~E?GWgci0hNyQCnVIK-l!(N|Nft~H$ujjul)R((5DWC z_|0o8A2j%`O(RGXFt9;qbsziVKkmMMUlITG;350qXJZvl)-|PY)1Q^(*7&OqM2Y>@ zQ*Hi}pS^uE_d;9vThq|-=LFm96Tc<2SAMG0li{)dSYI{XdM&&n@rh^9#HM;~rg7Dw zy5aO$xb0B+)Q3pbJ*2+hJmr15zHVITZ0E*e%+*B9NX>Ygx8C>3>G2v=*Y-14+HkjZ zk>*CxL}*&~Rlhkr<Q}dQTyK;pszrOTzCjj!e-HMh>nnp8Fu? zM0dFV#QsCcGt*DBe>UMBc-vS1U~&|FH^oNY*9(Q3uFf%`sYuP&|o@Qz|;z)_d2UV3lMrTR_dKdsg+8NYP8zxlSN%j@?Hc9+jY)rYI=;YljK zJ_nersz=)2@r$46Ow;?K3fugm_ie7ea_kr!y7|v!^Rpn#b)Gun%X@zSQvL=CyuJeD z`_FbTeqVU3A2fLFcvSYaUk#I20Bo`KS>KTX1@Jd2yi0c(?|y02kw?gswmn43XMP-3 zpWb8&-IwqmJ7hs5utN@py`uUy>|qqHhV~ID#`pWics&p7ljUg2D|u|n!%gnc^AUg< z0x%rcfg|$R#Tk{TeW>E2+TXv(v_p4|;4lFWAsInJ}a z{||d_AJ)W`_y12~^qY2j@0}TjFhqpRWC#-o1Y*?q%$ZEW009K4rL|j0j5b?|War z-?hEJ|2G$mIGH&)IWu!+&iTAQulE>?rxi)*>I?}6%W$bdDkEyYn;*tg}uuqg@1 zohW~&>l(J&*dk#7r2gKGZssHgEFG?tuEckHxiijtGL z%Cs8C;r=E;umI+2O2>snQ=yE}x*=KNVe|q__7M_L$DQlMITs#lv&|EOHr--%<=ZeM zwkG0;q~H?ot|1*BDO2p%&f{vW)!d7jl~#GZ@&|ctd|()KcugL@-w~;x%yP`r1lyh& zY|$mRKHIxb*<`d~0=B9-%b)fEZ|=o9Sj}6^U7z&&Fu!0bio~j$E}c~aHLHzgfx z7ZyV?nidiQ7B0_WG1yK#E%@02p*CJj<+V(g_#r+o>(DN_mxDSl4hx=R z(-=ZLTs;h^X%i-xYqFHJRc5f+!AA7?lX=4EnleBeQ~nV3W!lOuDD{>jL8yb7Q_j-D z3h8tHB&|D44N><(Eo79KOY@Oi*b{HG46dh!D-Tyc!^i3}M&86%}5p-S9G7wZA!;U2P>aXqD)8Tq~pYNbF>1rmUmu9yKWAgyAL zm}MAPE}C_UZyB zdE#FDHFA?8zMYKzjE90Qyq_yJ6tlXP5HG9{pL(g7j66-S1sCvq-VHTS3hfwY#rhM_ z96!$xr?6e7oT7*#vKF6PKpIB{mkLJ280`RGqrID`>wcF&VVDsvb+Vzj#>zr@r|^~X-*iELfJ zP+t(EO6+Gdgd?mQj6&QzXXuJ723m7pj@RoLd6mf(a~}U?|E_uUP)l; zRdROaLhlw{5QAUVb=TfOWPA5=dQ~2k!a>D3ZWBJ_Cz+#s6URD|B+kz6Q)CT^SPNZ< zw;*+Li_aY5c5qtme#wPH740Qn5?4s8_z|vw50cEc45qIBMgrY+$0ejn9xGV%ri7Bb z5QS^*in3`bb)4aOQd`EwgvbnNu7YRb|HRv*3z*E!G2yaefz)0U*{+oYVXlZVhxi5g zr&NA`)F=Y>)5Wa5&uwHlI>bv@{{=z0=d)Sc+tNj#8a93H=8GYUL{n*J8pT2~O%IXw!_(CwvWnYEs99Vp%u=N*1&yo{W@wB8 zQlo-FPgXxwdrL#BAj45b#VbL;td!Ao6^{t0o+r6bFQOR&b5IRRkT8Kzm9EZGBQU4W zr3_cYV6lvFHIa1W+5YRj6eEE(r08qPcM4qN11*XxQO zlD0qxb+o$7bx!wub@WX~&4RVrRmfsVdXO8#W%Vp9A4UpIi6!Ra;Tqf~&)Z^LbYp=7}{qzCCf5PqsGB|4H{m=LeT} zpZl=szN@yCjenomzp<0LwS=|APqtB(AFprWFVbE8*G?7W^-=4h(zh0UAxB5=g&F_LQKh>;S^k!VaH@)w)RP4TPHb1~*O%G;S60VCIU%gfG zW5Yi^b^G>v}Gam+d*v)Lnne^2yT2 zp1K|N(7NVk~RHrW@2t+upfyAaa|1I{w8!ytLc|eXo<> z$QyY5z%?QB+2-YjZD}`yj(OE_#MGv0=nWT_aL)%z#_9HL*RH%MG&-)ecb9Csjxiao zGkt?UPOx2_iR0F)&R5h_FMR|zO$oK+z+?^`1&)g z&siRtY>wFW*6lwpIyQOhAMc%yy7KS_2qfHnHDCDCgk|~V@mq1vyiNQxkiX}Z8-Kib zY~=d>&TWa4VhFlJ?@u`P*Kd~JT>t(b7u{~Y;wIM>bbmj2@5x)Ods?P@gUjKd_37+u z)vfCWr@p;Xa`eU`>CI8cgfw|Os-pG#WAgP2@}nYsMc;SdtMP_o}A_I)q_SefLj4S|5j1SWovR&Cf%Z zW4Wyl#ed{EIeB{i$w|qYInn!j5OD8V z`I4ivsXP(VLB5@c1+^XLr{9pTOOU2G;|X>kucH)<{d4Ab9L$WPK9yn2Dg;G>|GB`1 zPhQ{E3kiz$|97X}jx(n5VKW3GdTv4>B1}n>RyJN^;1~+(3*qP-E}C{hQ?OmjV2teN zUl>}0X>6M(Jux$xW#%&wzId<`=A_wINJ*<_#!)c9mh>3RF3Z1~{P-%sM@m+w5m)8Y z1#t%D{k7y7Vh|2Y=iUZ!ZuwhAH>F3cOFW&XXUa zs|sPRe(}fDiI~M=q?!)iabSpLhFSHdmdtFCoh!~bCq>CI#_ExN9EFTwUyXj2y~8{p zk>?7(gbu605ecKq#0zPTp78;8C}Fjr!XZ7wum@8E4j{M#GV+Zo^r^Gq(? z8>y_k!=R{Si9Vl(3sX^?OF`8Q0-u-#S}9F@Gm*?R@Q9T>+-UT z3**g7!@$N(J9X62GO4X+jCQTEJ>cp1hJ{lsZ04S?Mv9!2az*SIzR6EFz5di=qi z6~^%)VkJF*4(Pu3gq!30$0FNE%J2n{E3Cu9LfDMPai5TjWl@Q5;G5*SQg%fCY|(GC zlI%Op&ApvSBu@c{M{5q@wZ>jX%r0}BW6DBxWc$Hq-fLfZg)0`Y z#foP8OFEKpdU-4tB7Fon)9^dSsFph6ow8;+RNbxiUv)k-U zOF|pgFZeHEM0_~0MKp^ddYTPWLJyv#ZRK=?-0`qu+>rALj!Thav?8V%cVQ+E(*v{e z=2`OyT2yZFxPp))Q)y_)O1Itj026>|aiQ?(GHeq(p^xJo?55SSVLGiY5RNu4<`cPo zJYW^0!@hY^fw4|mvzj+EgES-H9a%Z;udgQ8!f=R$MYiJy-Q&2K7D;avaS>qNK4u3t z_kL#^k0J@#TSH!fL9h&$ynt6W;*^SZv_VX85716@WN7*M9h_P0laeE9>Fv0M9YgUV z!MMRkKz84z?}Y`je5vdOgo1ur1!9Da4sgOCjnN!RP{bxz5SznXs>+mcor+>FF=8fF zM6()Y3dg2MCdFRS*(4ey1rpu2EAV?9L)DQXE&{jHW?iYC`=fU}RnN)XIu>MMz z49Zo6*Kg0ENwM&RRoJ5VGo3gjX~#t@(I#ctSu~YO_tqxUqT5In3Z|hx@hqU4MZ%)9Q>??Dq)l9u|&E9U)GNr|f*Nf||PLKo4E$B~XMyHOdR$ zC@YB(_!ysxF*r=csAvVv+#+zvh-GGFGgH9j^%5lfo!_H4r7At`C&C_O7u7%)hO57(KTw)RtsYQY$EPfZ5RdSFz8|H z(cFHX)B9wvlsg{eSVcgEGk%EjOr@9wZ23k)si(0r7zg6hhp-w4G^-Cd)QK=Xj53U~ zm|TqNo4uK=l1hgb;M8k8f>VYjwra-q!!&UvR!_}AQQE}YNhFc%V-aW|4mnavl%`=i zB4SubX%uNty(soj@QBbdloq3+l{s;bg??^LUfuB3vZSDgW-OX$%E`EfS4~mT> zGzTvcuH60dC6a;X6&H!EVUssROvD@0RYZxqh1@IG)0^9fM2N5U`*NuSXJNWkXynV; z2`h}~!0EME+afM1KFMW?ALCwPdG`o-lRiE_=I*As=((lQ^O|&DZ&q2n9dgc#_f=HA znG3V#mYTC!JPuzbSAR&=4`%%~x35+@HMDS1b^Of?00;7Cb%i>MAHR+|Do3e7vWsN@ zDBa@BDU!SudOrH%^P$4%@aE?Yx!z+rccDO zIfZA+-=p6scpfuN952l2TO58o!@b$jLS?pxvRf9hA3HKwmp!p@LxFUjk9k_Vq<}GW zcTE2=M6Wz?h2B_FHf4gQCs}8;XAew8-5+=Lrn#*wC?Op^J|@z z6RV@2Sk{>G&i!rD%0J(n7|Y}S>c9BNdu83+_h#s3R&v!YE#JKD#6*JSB0Wl%XIwW} zzVlfg`RVd=|Jal{xlmj3)K6>wYCl0Hij?SFAqGm?$gq{$Bz%j zC0|>-Y+dAyM+dgu^W?5RTVD3HH$Qvp2gqi;|3K$^k3Y7+`R$edD>M1{_V50&Bk$DBGjG|>l$AYv)37dn3d&5ENdr^AByZ&M60YQ>+wOwgLCf~3>-Xg?TsZyo zmCf;=6}857m-7SPl_gAX_``Sal{k(Vuf5r2$)9}ePiL~nmtUBG6O8+ju@e78 z-NY-;b{@X`w^JW~dhD6;oeS3`eZBJPz*{RFZ!f&I(3oexzW($p;;~y(w(?xM-rOio zjgDC!zFzm*%GIB}cKM67QSlaNEAZ}~+m~D4Y@`=WShAg4Sgrr(WQxAQuP z|C=XD`^fOh_a>{~>};GKJloj*HS^x!)H}aV`TOV1TdhOH#0t6|?CT}J8Yo)hZnQs| z^F3pj{$Po7T8Ne6e!N$V>VptR=mUKJ^pg0T-hI8T5E!y1x?%oyX(nx~cM1H}U4p^1 zQu1eO==nqWN0y|b4mWkIwJ1YlUS+ew6N%dSm+F`yJ@Af zIYaB$kd4nR|9)P5CtA*2hU&$F&Ze`F6yj;LUxxv%j&1h0tS zQd||piZG^bCd5Klcx-yDxgjE#F?Y~3(?Eg!t}*Z8J^I4FC{l{>v@jWD-7ea2j-FLX zJp!lEJ>j60<7!>0m`RQDF?$RwbCN2By8y*I_AuRE;716jRP->U8B2F$JaAXde|L z6=6jhs!70-4LrR=LKeF)Mda)p5rs2(xmp(x{b@Vg3(?<8REsudOPU@tses0c|k?YXcTxc2KeJDvd3hlS9$sIz}8K0hUjI2>anz zaj4MuZO6sn2C)B{QI4_2=7>bLj%X(yeS8zgb7H>u62MM^8m^nT@x*Fd8y`>+F4+Yq z{mp8(K>%q$)5Hk~5_3no+5l+9Du&mnK)eKGvbBh$p~W}7%%MpUqoe?kYUucLR5A!TxvU_Q7!Zl7jQ>6*2TaLv++Ze zB12%ZqZqRS3kZ~=hY2{^Nq|^8Zl~l8hBm&qmHC36BKV&D%ei`X(;wzmNLX2P;iiuX zgSRFvO1l3X>4CmFYf4FbMy;pvv8>sZlguFMXtlu@;u&TE-B6JrNV#>@j`L)S2De}Mp?WDhW9ykMUTYPtz74Yx#dMAtkSI|sTkCSUNeRU0dfQnRc@cfF%0 z{Up4|@d~<&7-^NTjg{F%F&`x)Wo>0hP;_FUGB|q$7g{%cr&)p-QPs^*$AuY>K*9>i z#q-?}FwjLkhpVE|EsmI`L@7zym`~RgkSS823-`i60_yG}3wWj;UWA+FEYI^ZlG@R&*;69j4T$QHZ|PYf>}FAzoqELns0^R~4Y)wSaMqLVCWNDFpPR7vnMY7O zGM9{5P9QKF_RiO^4D10)rzThM#3Rj2k$xW*O7XP1g%0D6Ht4vHxu75!g9=*VMJqm8 zr{vvb&`*KTtMNF=N_7MnMGBl>LMV_vz=d#)5^<&hB=DwIVYU|plp2*AQ(*$BFXQ2e zbqB`8iUv5S)hRi*RT7ZOf7kL-fy87A3QZ}Hp-dR6_vD0L*&sAQE(IpRn4{hX>Pi8_ zwvz!nCMQIQ2xkXOHmN5S-xPs3X;z|4!FEWrV_=Cgpp~pRVOqq&$s>5W)3&>ndWCB` zGxOO>80XU-!KOnYczqy&5S{0ZQx&6o@wn!4peCR#WYA(-j1du(6ohZGpGp{|#MVrE z_-7?bFHnau2rf6EOdAOez9(opo4hnmf5N2AusH}kpnytGD3)!)1Qv#(WRoBWDlI9s zn&6m~vLbUu%DRzqs35_rH8Ci#ZDfEv%p8D{TSpsZ*V3YbNWz|9*oh!mK#?H98KiWz z#5D(I*C_}DzF_$X>|`_wLazuYi?a}YP>C=Uk*?+gioitklbWMM0UZrOgfVdgyYoc> z(Q!6iU75Ct;ZtR83m(})ur$l9@dF7XmlWaEXdC9K9>kT-E=KTHR<+@mSRyqIi>R7~ zIYt21MrPU=zYqgSMRldph(!8@3vG*Te*)OVR#c*(sb%%o(k3V*wdssLA>K~bNkj$S z+MFRE5^JXO`}D0S*+6RR2CGP=bC`1YI;y1vMYQl3!wPLSqL|F4IBT6iHFI9-S<;wt z7>;iREI5I81fW*7?l2)h`H2GlNa-?^!Xi589*GbRcsLPgM!_JmMie}ho>D-cY(=po zBSjFPB51;UBIaO7F^NbTH30xoCn(YtuvL+G6|xtFW)~pP#=^f4S%lF(Y6ll=gD00R7YR^wD-|F~ z1$OE9a@Y|G@IzptGt|Gs&lRAl0=!7oh`SB;Gyxh@YGg$Z{0@*ar64$DFAd|KGD5%% z5JXQ33PcFBQiw*4M8h*0fjt-nYq>WK1Qd|xszh`Ogwrb#$oPRZp%MKonI?$y`)36J zoS=s5pd6K;B&3>{c^_^7PdbEIg<=#1+mk>Th6v0;^gv>? zh=o3;d?lfd5EL?PP|9QgOyL}Cq`j<*q)4$94KQOsAoo!ewSxxmP5{vg58P)kATH=Efg}q+W_nq@>ooTTmqSUn#(iQNC0*>GrbDDcJo;HEEWXvO&=>QywU05hP0L0RjU1#s9V$B$@@L zrH*xK0c)7KFBY>#CIaVutn|;v?7wf^JktPj(#fxsP^yp2B$WJrs`K+I)qkrE zIa5J+$-+ASXJwLuJ#Yg$b>>u@sXDAljOu4qA5taS|MyxB?(nk@7*fp01`mTE90NG$ zcv1mmSm!En8ao_{!TVuR@W8^N;1Pr+!B3evY7JO1+@qLH|9QlxnFq(f-31VA|+)T7lJnG~?` z2(QWtH$`-~qs#;?>xkx1ij-nxC0-( zZ)9m3!?#*Ggi*Ogrk|cq@_ZD|qX+US(*QM=C3lH!Oa=gnBdibOB4{h*)IO6>y2>ze z9E9R29=hJJ5mG;mxP4eQrFkFlsF*97p2k|_o)9f=3AGmk;PkPpcs7TtJi_C4Ie1b| zf_eh&2y^Y70(>4Ivv?Ib?f|GP?tr088G6C>aU7CKNh;b^qYk!+$rw$GFkXUJ za6So!P^w2ID9fa`O3EDtk#ae>GXTN-=`=IQDOW-5#X<-HZk0|c_Rb(G8>sce)R=dc zMpeuLG(x54)O|vLQ5)B=4CEe4fkHQL?C0ewQKhRsM=j0gc{=hAHl9@`i&aLUjHZ=( z44FNEI4Tv&e3d!~ zC9gJk_uZz7fbcOIzJ-~=pz*f$t4E8jG>9Xz-q&cTiMvGYNC-CA|xUS zi8YKOT}9#Gf(us^*VWJ-K}G`ALca)rJ_IL-GnG7om?~to>Fub0!|PGbpwg;AGU-qR zh&B*x!U#w{MI(=pi_P$B8_2_%v(lBR)gS{Ra#n$@_>r{5G%ju>lwckgM?o(_YR>xw zHb!$AkdZM~cCVmMlj;}j1BDnD3j{*b%$S>F5G>lmM0+SCk_n+)tiTb~auZ_^`W!HN z4h^e&p};2+f^6VhZa*4OtjEsTBJK3n_Aa0-_RhGxraGYANHZ&A@}Ujcy|je#>1usg z3P7g`vsy!kBnqJsR@2%6C&NLsT29Asftkb6NMKG%dr-KOMtW%dot3HpkQhl_qd01L zz1AS&8(NBo?!&SiI^L$z3D@zSkjnJF=yRiB+PR z^NU*+yrbzNNlszh$;s8WHb7~*fK>vFChV~4ceykkLZ_~QpkL@NBQX8IL}RTyy^4d9 z6+PD6a){-XI$ys&)UU^+*=|~$K(aD@{N}V9MBY#o5^Y3BnY&U&s*pFUaHv@qV{8;(?Q4yf&3%}|PgRCP7~l?$vNrh;he3uLr&H4} zszJ@7vQ&C8uEcZsOO>?VM)e3RcqxYI@uOlkYYJC|P=2dOm$fQ6Gby&2Fbp_lGD_>1)WQ1OxkrI!HLoQE;Mok^kxheJ;UW1|1L-7y`O~H&*&}Mhd z1_mgpW@&ZAC?63*UF|ZJ4(VMDc)9`tXc>ph_4N}uRJy&7fH+-EKhEsn0SVJP+?=wy z1Ne{M>3~rk5_PY)Z>3p@v~@^vE||{3Ul7X4Fx0td6fx3j5=qCp31Y&-YH-DTMZv)$ z0*mxg^}-J5C8Oujm{JK-RH}rzXmOa;^L11FiLI#Gi1QsdI~QZ4;av#2*+yy$Ap4BH zLkqLWx7*1g(bTfR)GESI=QT&OH7L!gx&m;bK}vL%@s!_BG`bH{ElUnbt*nk%0_EiL z9M^CAsCt*g>W7)M&xeeDr@%{mOrIxjaj(^>%tkk(WzOG|2RJ;JDXJ_K&Y-dM}k_CzFG3TKSwd=(|Exm2nm1MrJj} z`*G(Hwww8q$B*=>gv>8T@6@O?A}YXuT)H}F$2q7sk2|w21*d1Uynil;p!}(F*`D`65RE%~&(qjVsu_ zTt_ysQ&qe^RbpY>PogA2t9BAh6Qpjb0E`jR48b0N?C%;tH%a^|shEwKIQ-|W=!t@Q zZsQb>7CbsdoCMpWox?z#;AUTvnI|NMseUJOC0=i5NdMyFPAb|p4*iKWv^>00~xF|bkk{u%1{WjfJShuu|> zVtW-2DspS;1|BzJRxKJGCh*++9kMAz^zIO|abYW=lBk1eTZ%L5a4TBR5+*k6t-eF= zmpF?sMzboHoD?FmrMlTY_kF^CBOK?108!4i7~2aZ$U2mSDO|GimC7Ad^)LX z5yti|#jDQ&v>)FEbGQ6taJWnrEZ|=bqZU_wrC~Q}I7nsR_e_1IaH_=Tt0T;p+MDU)#R1jB_>_+m$uk03c9?Xw zdH@sbY^o_!Nv}(ix(GKT^p8f44?cwGStW*`J+>YaV-YN(n}!&7go?&nP`whZQw1Uf zm|ox_*RY6#74IkY%7C58M6K;H(DDs%GL9>YA-O7(={fi*=Z%;VWMuV45XN@Qh>g+Y zXlXlJj4`Nj1bPc|8frfqC2b@MwVq3aA1^Sj^{V zQYnN%V75)M$RFRg+d)x%AyNVX6;1Mi+2&bsgVt}+MWhQ`!vGtS*h@o(NE#G$QN^@T zMa76G0EZ!dcS`}&fFfcv8h;m5uE;v6y+!7Gs{C8Aeq53@I;BGi5*71kww}vtSIfEd zsi%K8yO?Ipy`C&;5LM3gkQytA<$@lUJ4AE9+=L2EWPt8sea(p^rKnWs*a2J#gUZkE z$7@MMB#(DU-VhO?)-xVI>i$i9J8`K>1hSh^P&psXuTe2`omn_kWRh(hLiDhv*)Sa; z40bp*G^t33F!kMS5=_d;dRgRXFPmQG@g$0PF(EP;1l>TB2ziQ`YL(JedWN9Qz$#+S z>)-zcpNk>*CsZqZK*KRAy_aJ2pase;AVPsn2ZGwH*vr1GHlOA=h$$CR`xoHg9AGd2 z$&6IL94`d<5McJwk!sS=3ZH#@cJIsEM+2Kvk!oV#Gjxm+hxa>{hTV=vNs|B?7^zlK ztLQ3RjaH{&FoKVp!ZNbTC`KyNm57k3Ht8UIkG{02App|=d7w-P1(bU|WU&v?0AA&b zS7|~V*xDkr=uBXU?Zr$G_NLTB;V2EYJ^JSeGt?qTtOn4k;BRSB{Bk+Jm%C3{&}l25 zUrLP{n>{I%u^II*PfNn*au6<{g(bFZWD+3njz;3RZ|dJ2I6%Zw$xIw`IAb{5zAIA6 zre>!!y#SW*y_I6Kh54rCvN#goB`j_ZwluxoAsF#d79S#pi80a|uJ?W{?rwEwb%m$< zYT@z8_r&{YgLcY`F8EfgQdv`|`QR`pLpP*3r3ual>}b&DxR;cM)-+4Iev?o@5nRof zmm6@oh6r|+rD>E_K4)j8t?h-}{uZ=WM^$-cGKt~lkM+}l3(KyF{e9a#L7`U!AMSE| zL|G`Y{GQdB5sIuU7)s2;gPigamMVsfLhU_xDqf6&43Z9()%sKzi>R7*$yHfbX?W&=3Q_c-}zRB2>636BE$IeW2xq2Oo@VK%oU}M}PKP~%W&#P}^ zleU<=)t3v|mHz9(Tb2!zE8U;n1Z3{~#;(fC&%NFGr)j?SRel|Dv*REv^_BjWi9h{E z4fN#2Gams2T%jZuNtls85KE52Cd~QrZDjO zfYrKU-ug4xu>Ib%qkp=}4}7seg*7~@Vn=`Htkz^!Yw7RMBGvJ>*%UIEYlCH92psFcE?Jz+r0fr}Xkz*%NOdg3E0 z&;Gf2;_D^rq$`)LQB`q|zzmh|W@u`U&g`}ReM`ht;`#o@To zeo)DiMOcFtyaECvG9x z)lwAMUd5M|Np=c_f?1aUyi=g4>*OU&c0?lpz`a@L$qgLb@w^j(%p$knf9F1bN*hi=gC`iv@-`s7?J#hq{@TU#A!%B0XX z?SZuYap+xq^e96&F}dMCi@WUT13+8eQBGE5WBJsQrncpTylAu$9ddYYr&6qCmcklX`(z&!pRMjz`IAOyvahIZ;$-?tnnu6iH~1 zkie|ES(2>fl$mxcRmWpnjI%hCIEdrWw?iEXMUxVhg|`?u7S7~hHu@8$U`fmH4f^Yh=`KG{#KjcwfBEtH4+azf$9SW>7U(NCpFaa0@V%x)R|F8esF1x+>%C=Xy?7mWK)%EVECdE}SUsJ4mL+2bKCc z`v^N$qcUE9>EvGU_8{qz4rLCz&=IED_N~I$j?;~qEkuk|5L4~-MFm4i;!V1jFiZm~ zLugoFfO7*F{Z+qXm{rZC-99!H=k53I>^-jS4^>N#RdrMduW9$%Hw?FVRI(paVdJ z8d!r;uPUYiTS=;!bTz6`_p}P@73uKm58!tevxJbYK0SY&!<`b=r>9Y z^2+>GBurE}07QioDxC?p3MuArc9VLCENDzh%>i8lBrz1C7*4R!@Y_fnjSZtNUKGV%&;w_YaizY`n{HIhC85s? zhyGiHI>L>rckp6>y9-GqGEAjgeJm3#h^SiEWb5Hf(k!HkF9?z(nL!(<@|PsFUe`f5#ko=e z&2TkJ2u7o}B&-ERcu_MS;3jbB1(b?oaNMC$Ma*GMnAnbyfP&4L$g?y@DXA=xQu&c& zutU_qBDA8_mH{GnQxeGl5v&p!QiG{4efkxGkPtzppN#^71_!}rjAv+y4N^`e#T=qw z2B0`7wzCNsp29d4{4z>{KC8uS0PAP=QlkG8LQU?)gjF(KEYnh*xNtiHXIj$Xs6r!< z%1BgFV0tCuR+;XAsR%-%La(3**#M&s2AF(ggwrfKh7m+4eOAC!0L|3B8#EZ9gxqGV zfYlJ{Vj&Ph8Jx4jxf;D{FG^U2L@x@*&F}{`k=*XIy3l+%S_yjM^*o33Doz9#Krr76 zYa-UoKbUVNlCz!pUA6?w0UeZ48^K0#!LP8xtF0`x7H6`Wz40BGpG#n=yv>uj$~s#J;7GcHvD1f6PK<9Yi%J- z6CU~#x+yXjqCJ$fW_JXfln!eX(3AoxvYhOW@55qoswv8g(yXhCmRln!PY;OYwN1Vp zQw|LC;4!Dj#Q9`o2y0&?ZT#oRVyZ8As@v{(IZJpAKiNk+&?9whm()jB-6cvH{dw1H zj~DUoULYKlnz_tMRb&Bw2t_N{5R)OI5fZfq1BsP|EE8xK_hL(q*w-J|Qf(yWIP6eE zxW-<&kqYrA&CCcY`9kHv8s*(b+L-Eov4iO$a_rRutSF;3i*J=~GKmYopxW=8AEf4I$r{m)D3Z@pi)|5GYZD&@$QC138 zN91t1REe|ov4>w=m-DG_;)&(&MnzB3Pvi|hmQx-zirsAMi%WjAbb_EdyGG-0aKbYa zOY$t2EBc1tdaUm17u_XE*Urw}lXUs*x$6eTwXqrAAIy1u)7o7nU~+}+%%)X)n3yseEsZK<7?wOU;NCH|H@n4ouh>h9uvD9m*>TDv9Tp-<=Hpaxo-!rF1B3U zIdb+&yf2TPG+G~_x7jB6Ka`-QSgCV-{l+|MB>CSX^HyJdnpv7*DV@R> zUOm3fHH7c)SjoIQe&f5tmW69VjrQ@sVwOc~_LuCO7#Y~})pfcn&ojB}^BbSPyVH_+ zt@(u#FbGr7rrQ6Kcl^c+_?d?eFB{jkB*Dz|aRRp-ztMKD?bYA?qx<4B6Zd4jn)#9~ z0pHesW!XK;bFVrRJkBXR=A+DGo(;Rse|9r&!})?M8{$ixL#`{voX+NnZFsIDnSF%H z*jU2d>^}QK!MY7McHt#pJT|WJ@a4Ill^K(deR*+U$^_Z+D&iap|%6$=u_| z4*c}#(%bapwvu_LI$!z2neW%{i_l%wU5k5XV&z+nAKpkYhd;74el^~_!t&4Qh0PbU zC!g1K%15wk4fL7XWmt0FnWoEmbGPHi-WX~rcRYySe)9?ZtURz03>A*wpHsiKBw-?Z z-A_5|1|N4G2492A#s`1MJoe3__e=uTJi4*WHFe@_p6ME<&3ovE)>h(}d?34V-(?5B z?Xk6xexw5$0a@|CjOQ)* zNA)zd;+1#vj*o~Fw7L4)(G@Sq4-(R5C{_D+#5Fwn zdAPyqgd6ulei??(XmX+^!NES!97ZwZCB5G-{-XN06PGU`NP z#p=3gYjfhwC3NOdop3bPVS94k`7^kJ_GF+f%W3H?LAFa<@{F!+|T3t^;jx%7^ znIY!vky0={_Mhgfiz+Q^pzmsD!Oeo11?Kto)*A4tH_!h6@b&ItP1}9{cv`!CyWQT; zL(%}DRv;mifFK8}tIkQ2rkHZ79Om$_K@qn)4@}XG9VH=@6bcA-j(NKY$Q({5>e%MJ zc@K)!q0=GEsXN>v=r(q^hd?>X;rn6F^SiF!UthS0UYevp()ROuzfRu*%rbWnKpxM} z9W>bs4)Bi59aR9jdg9kksjXERQ)(J))>}K_nP*H@`cV%!_OngKi>Q6<&XvjiBtsSsV+5=!F`k<%ZbSHm75jz>-A_RQ*>RRSi}>785C{D z7SRY_1TvG#SY1Pf1XW_Xgf@PtgBN4YS5jh0=g-_k+W;m+|)ES45|L*9PDFC9|{ zFui<>2)FR?kcgh*nPqUa2T+c0%b$>F-p^HDmWgpCgCdeb^K=Lg+pyIpE!9Qu#zE+5 zZI;AEfwf;PRkg#^EqPSFq6_2bh}|0L93e|V{KcZ)Mj4b4IV2fXzPt1`{aUFI0aHbs z*3;oSs?-R@aDp}>mPPDp8SnQAOH1_>Ml59MIT>*Fju2mL; z5Z(D0mkcXnFr(5$h?pQ-`0^2_5~Y*aI+#i_@qmNDV5}g&yN3|AYT-}~_v2=`TucJx zE~RmS?1`7r25DjDY9b{)_UBO!Tfkh}wg0T~>>e-Smcv0gl{4T*|-W7m_Cn0 zUS9Z2R_B>UY%#}{F0Q)LfkwVqrt8N``AtI&H_zM2dHy9F7NyJKDv$&P8+o0tN#_e) z$*A-!p4`U`GMM&xln?EtcX9hkJ_RAoR62>4)4&SLYBGg)3Bw;KOr0k5NGV4y>j2iT z)JR|AkQy`>i?&AN8A93MfSVelxPjA3Jjm@y3zhP!BdlU!SHwCpc^y)f>*g)uX#%M= ziDXGyW03K>@HQQZ-z)4B>(Rv$2v2WV3+v)Qw-8&c4PUD(FAODhoV;?j|X^7uT zw0XFBKl2skch{34EFi_ihOFL(Ros@p=TN23RwNe-e*ojO>;)zczC=A-6D%*y;?!BF z36mY|BJOc+kdaV|MF~s;_p$Kk9sGh-g190*MkGE0X=p`6t;w$eBi6)85tu^NU83NY z${{?a!5_}QIS;Zj5X4D{!2{CM)Tol71qk&y%OHRU^HGEc$%cV5adnB(?P|zAee_!)U5ipfm^w1$G|I*yYFiM$2bNmi6ROj}+_6UFxha7q9NiS?NWo#Jr; z?xNrhzEFifgy)z+&T{h=OB@Vh4HO(y2?IQK2bF1LskoV=Z7@;{*4Wi~3nURIc0wX; zV7qt)bP@@IZ3IFZa?uib4uT7nv>>1YjV8109xhoTNm+yk&G_4gbc76FEryeM6c2Mk zB!-{(l8@nHqE1}^KME<4(V~r1H}L?qf=dIS1x92U1>c=O9^$6K+3^yY&Q7y3VIKqR z_zIyew`cvsfWcNUgc%iUnJ%H2Y;xk4VL|ac<>Hx=Tp*WG*K+HcV8KvbTPa~uv9gwy zSRuxNuAz%!wLUtn&%=wj1`$CQd{F zAp|gPy>yMPhfyt%*4R)Hf?)7T1;ZqWlri*zKrkf-+}eAO|4plikQE`yM3In#^I%0v zC;~xbc(8)oCkk_}?IHzRR7lB+Wwei;hkRVTSR{kiD@~}vp|G_%irMQfAr>)^iYw#3 zjDN)QBADbYsHo%jnFMNa9Jv?=0Vhf9hwAo@#JjjsEDv9R1v%=G;7D8=7vTjR_P2Rw zn*YL6mT{|3 zT$veGr6ErtMVEL$u8_P$7m@Uebj@kT%h6~c`wYe|&PyaWa%!xfY7`fkBU@spwyY!+UO{ORKt0|wKQI!z;)w>x_$ z-i{y09WN2X`ww|9B{o-#rB)66XC(Q#d@#>{FaPS))GvE~e{k}{o`DI8+CSdDDgV3S z+qY+vXFk4ed1chsZ}VuuhR*KkKmKL;aiU^j=gjWKnQV$ZKXIz1XW;v(nM0q}9>%{_ zd0%|(r>Q`%B|k0CVtTn{bZo>D?M1(M|5EGLvCtjAFirXSpXSbbZ&w|AF!f_q$Mm7v zDrxd;Ve0XMZ*#|j zeEN+oscg@;qxWuh{y6*d=xp;$|LwiuFq0j^keeYX^AJ1ejjTT13@x@Cm zA$N%fL$|6voE;zUbdF$Hg;eF}YFU~7+C(7zL|}Gomo&0IvFhkA){%`tJ>i4PRz%Yv zU`Frd7F7LfdczyDH}^a}z9s5rd(ZdN*@yPNKCyCQ=F@?HO|1JWOp`ou_=)U-;g-=? zmqc%Qfa;P|uS_{!w_JGe?|=22_io>oq&+!mv5vXEIXpNr^5*P&y`ewF-pd@xemuxJ z^6{q@WB0SC{RSH{^Zm!ZyqW#dVAH~E<7i}5HZl~ddqZp4I=gY>KlzgSf9lAQsDWX~6h1 z{1>3n%$4js{Rg!~3_6j)2Aw!<128FM_uQT*?D4c0cMll*;3+k%Srw$Ykuq6b(CO(5 z-wzlYaAx(!q29xxpv`bGhzA4b<)>D#=5q&2zIgZiH%EHX2SNID`W%Pi8x0>=m9M%U zF;p@KNtOdR10YG`(3^<=(RdKrJYGN7I=V!RFB!xE=`seW8j!JkA=>}C1~ipcgaEFF z8Ui6-000fsw(O|?rCxRnT05dw7iNs-dgdO*6YmQ)faLiz-~UF$s0Zx-*MZ=nT1Guc z(7k&*2I*uF`V3;Fjjwz&PBhMuHJ>3~N?c^TG`Ti;uU+{V8)KvjdKp+;jz;QDL5+Wv z<~Tqy$s8$T(fg*ODh6>AX-AjQm3~V+;*vd}wbUh{Yfx#6K5owP4x8phB6+#6ZVBx> zL_4Es2Uf#}R@X=IfQ!`ElP2aCX{yZwy*u)A%f6Ay(nv0cCpCch38!iZFa})aYR8ia z7oH+e_IA7`0Uk$qNyAHu5M@!VIzS#I%E1~!@SL{eu^qnh1xbQ7Hj9>)<)TGE&)H%Y zxO@CrZXS3$%=R1q`q^M17SKIzSi%D2WfDj^B1ZnSU2X*NJIH@I?+J3eoMKs?cQ#_oKbJK`y09l} zSzkGFK2NmJG66GBB!6Px6uOV~-ECHAE(^3Dwi9m0u5@6&qMTs0)zWIj`898}x?W)6 zM>RJ^g@Cay&^D0OMMu0HzKVX&uQ06Nr6|S1a!J1|k#~^&_=UvMlXK}9281RXC7OUx zKp?fzqS;NEVi^Hy6M#NefnfZ70v5Xy721mGS45%;3I$o zYe*2g04|PE=_j`q1<08?*dfX380$XR5m)kdg1kuX+k|j!j6rEv8s$ZCILNjV1s~2z zp)aT&5sF||`d(D9_iLUqbcgOqBl1X&wbajN<9%)O;qV>WXaFBx%Cf#G0~2s9Q|+dj{uM5qS$Z ze5*OhT~$nWi!Ee#ZD<2f#buI2O@h>(kDwuRsECW=JRT>K)WPU7+@Va)tzoEA+=1~d zt|Tm^+)^(-YM~f`$THV421c30^YleQMiuFhCSgtPofEW4$`$A~f;~fU!Sd*o`JwMI z$-c}yI0POBjUb3UFN9rWq|9`H%gToEURW#n)$rT`vNxMF_A^T9+IhvoqigsCbdW}X zQqfb!ma*wsV&XThZbnvyT-P@`7N=dq*t`Q5^)US|%i|7x7W?CZzXuSptnWOOd6&$g zA)iM@C;I5n&?xDN@fOTRZKgor4>*Stpiy&p`h4{M9;fn1LI*?iB;#)fmBR25Y>ovNF7o{ z+eD|-yX)~!+DIO~mc`=8Bx&786}4j#%tJYVxv2#&u5-~Q(jBP=Xu%=a*iI5Kk-P$z zc#ZrTr*s(GsiOU$m=}&@`big#2FMm(vNBR}3DrW8gUD%8i-jVjD0d3=BGr_HHknWY z(+G0jPULZnKp!A-xncz%9-tUNJAt`K8%J|RVsZ=o=sxidt0))aGJI|9zD!4#$V!SV zv2xvc4J_vzvTzYrl&D0`PLa8_!E)A+PI4yXufpFvSnxqf4lLMND0v<#aSpZ@m2~7+ zn85HXbCQFFFfrIpkUWCQ)u?cGb{-gH0GTRG$eUted+JJs#c88NLw44PY;!m(4Q;5mF z3ig-atc7%i$mX~pW3E8ZxfY%%xMCAe8S|uodwd^z2JU8@5%su5)q+ueO$=Yoz?}A; zKsIq^H)H7cJn`Wb56f?qL7e$$TJf%P1S>R&WY7XB%S}|VXQ{J^&POC9RZ#K$Se|4A zVtAWGZ%DN3@Lw-O)X@lz&vEDTXL+# znAur+xR9*M9bT3lWEx%%e~4$_9oyA15I?lN-}1`j=Q_)#2i|3~1+)Ko@(WG;?9C?z z6WLTx;E91vLz@`TU3uU}yl&LUwZ1dfKUH;OHmk6QKkXd1Hc}SX=zC3734gAg>D|_2 z|KgQV>&S`+y5;+aB(n4N6tj8(TfXD)*MELFi$C6TX6TEfLCkjvgQnLz_s;J4GXKrl z;q^h}>{heo##F%%*?D8z@;WV}-YcnVe`k+x@9dmnA3O4Ic-S2J`JU|4K*IJ`=;5^^ zae*rae|2}ZKS1m!8}rxC4E)%+U^;C!{>|1cEy+{1ZB-xilx->8$~}{ik4|(MzcwDe zF`9YdaOuPo-`%W8?i0?EuU+lxxR)@~Yppskx^3Hzygys2iXZ$ds+4~pimuI3#>Geq<1A+|Ow zvNYTG&}WZX3z=d?uc0>`$19 z{P2ez8+K$rGqY>^;kBRS{hTp;T2uA?E!X4#F}u>+aVhm!RnYKsVSf1}@k!6c2WOTo za%8Xm;p)uC&)nWKP&K=1o8^YfcDQl)Gh1}?OzzO}y#p2A?=PoL9?x!`4(e+6#%=BS zbZ|X!m84dsga-yqg-B<=miB-mswDxq4UHx!Dagtz391`!PO8>rO3H0V|4odKD*=F(cZf@-P zVW{cE(^Aih(K2JJbBgXboH+LOPRs1jJD?z!s)vW$E0_M)FSfhetls*E#^19E5Fy&i-aFWG551W-so zVVtM8IpY?3PTkS_3mj-Y->-k^YCrW+<4~_2?5Y-m{(L+RoHf3*Y&=d3pIRYqIj64e zyW1tMSnsO)TExEclAD=s$IizPBRVIrJWqeFdN#e^1c!gS0c= zIR1?@D1H3<3svdk>hp7(-mCQk0aMN;`71}9adX`^!vMA%8ZJ@$|9Enhzvtwt|BtkZ zJ8>M)QJ<;7H-7y5??=EvUzM$qQozFUDN&m#BwP7P(Vq|U^usM?Wkrptx;7uyt1Z+c zX0XagIh}DYcR8I5)96n63jL-6I1BfALI%ZjA2tgW&FP}n#F6wKxR3@sR58ed$1BL_ zx#RVxBf8NpP#q_lGsMMcXosqRtImSp@P`t+kh2&{&RdP7A`u-PT*E{v65Ay;ASKE< z!US|Da2^ueK$YO~M7e~5vJ02l$0jb{Db|KWN>)yTf6wBNCM0(VEE4jzRO}HD$uTtC zaEG(`@=z)`>nYR*#BMTUTrN_{cue&SzUPr>96J&$erP;e(ZsRpOD0{*p+xe6-^YctHi`v))0U*+|%!=iF zT+XMsaf~!$9zqo-Va}a`4LZVoaJ(&}x#{ z>f(|ag>wrV+QDiWNs{?6QjOm!N`Z@7DwFkTKO}(vaciy7w#RT?kA&HN4^CarfBSaewI~0d;rJBqXv<-Bf z6&EbPvtbdIGn&}qQWo$lk@FomwO(kG=!5{f4Kv7r8vrQ!bGBiuL0QL(JXq)MJB7(6>sIbnb)z@>yJ4Jbk>+Fs(DSQz)A1qK&6 zL1I~XIE>957HX6&fI~gF0j(hqq8R!J1df41iJd&fD^jy!?1&BF9|!8jId_Ik14{}m zGkE3tKJ;3NFQ0}dr_pSHf(=C#fV$v6iki`1USF?b& z2yVjYV5L#E4}q62lHnRr83p2Ci92R7magO&aG4a)H42vlu^xw%6Lne^suO-(u>iaV z1SVdF#E`^#I+$0~;lVNtcb!es=M1=~PrYJd!>^S#XHqC#Q^aQZ?}f)XORI>NvL zuQSNfh1lXOTmY9UM+HGsD@-JCZ&C+6c;ZjGM%!w=DGuGIOGN_WmOciE9a?(4WYHNa zTp8}+(l`I{rT9T1*Qm=}*?AnI7`h`TE@> zL2Z_{%@=#2<1~%8Ak`?26@`-?9D=U&;W)U~IRc(Y;mSzrY=?~qKf|ZNesDOvQ&Jvf zZB%f7js7^8=V|dSmh{|0L<@<(7b{>$$Z3*Nl03AZJ`rz4{Nu%D#%JvAes2h<0dZQOaj@!0a;+#?xVb` zTo8)SO5O)=U)ywM+u+`$_v_!OPA#l5diR)HpBPO0GCKCm9;-PhWxC~NcK+;0%S*PD zi?5q}y~Y0VTc+Z^jn@vxu8Tf4xuCZ70t)CAbR998cF7|&M4WoiIuNm*^Mu%(i z|1%O^-(2lA_a85dCMLbp@zG;j=?@#44|(ane9ffY(R_NMDWEfBIHM+f^2m|q^4Xy! z&s6ukzPaJ?1o-pV_~HrCS=rE;|M9_ZBu`(};_=HD?{>v`b8VKpW2x%*YBK?;VjBBn zMgE2{TF4I{Y|&ZP|B^EE*2jA{%zpg->v`GfLnhj?a^lU5tvj=K&T2#b&(cgqDH7}Z=Ra|_V(T*UdPS7CGEfZzxj@8)uNMsSSn}wS_Z&I-9-DdVLS%Z+=kfxA(OlFMj{&)Ma&R)XbUw=D3M;_2KZrvB3N--x1?(V_0PT z%3Cjv`%N9k4Cwvvzu6zOX)d7(Z);eX6Bo}um-4DnWIut=9*Lfr(p%l{xkM3{BkjId>N|&+Az?? z(uKSc=&@e92lfPOGk|moSO9fY9RhHegt%^tQe8{vX2eAk7rYZys25U zc^Mc%;wBp-+GV6~A>dZf00ct-`Ld!?#iQ>j#iq@+L@{!?@yc%)9|sGOv6O0l0QEDD zvAII>HcBl5muD>@Q0-!S2)@$RcCknqfeq?~exPR^2fo z3QntB%(c`_(LI zW-wVBy*Uf#tT_^bN^da|i+~t^0Kn=Q_>w~1;($?Ju?ExXU>1?I9!Z^<8IoaU&?5he zYOXODrCJ*QCgda=q}ca(qe4%I%`FE_m|Qf;-c48|qKHa|RCD`L9p)o$uD>JPV;N2& z73JhzAh1!Uk`B(6YluT46z|(>@gb}TGqeAzrU zF7)A0l-fh8=cC*^34ZA!yt7+n%Bt47_@^}zV(cZZiyVvBGrm$a2&_ndaz32OUBhZ9 z(Vq@(;ICW*NEcTGwy}@z zbRZ0X0N`IKu7c!vFvKkng&>ki#-3$x%u3+71_et)6~K=mV&ck`%cCedhFXmp;6mh~ z&^#AysNs9})x;7x0Pt~UM1lE~2!k9BX&*K*RBZYho`8U`hKIsf2}=!!LfUPZR3GvP zdM8qbId-9P%rU+wA1Zdm;*F;gs!KXju{s=y=1D93Y%Xtlv^u)1+8qe0F|liyRoWpj z8GTvRLP8_*E-Pi#MqFz^Y4CxO_=%y*@Q+Mql^DpQuYbDTl|3J ztEkm}h3l!y3|1am+<|8VAuN_AtO;L0f5lycQIV!=P%=^OyN&Qo<8pc81rF~JW4MLn zNXjlqz{nA-aoO@+v+Xub@8Lt^rT9AOb^b;_bJLlfVc@_%Ti zj`pcRQb5tD8%u6St_gqtr;N`L$YRG?1ktJYf!>5lz)C9hWlc;{J*c%;lrvD0$V)s^ z6Ls3$B5h(3L z@g$`vR)EpEos=1CX@?{OYeEPWV_+WQg z*MSnWsY!s%YK0Wxrb`rpn_WZk1`g!gw4;EZ$)X)Lrdn#?*I)*X!UrtAK{<<{SRnDl zF;M|Uk1OHTg2>w1*xc9%!3G3XdQ2$mh?5|G&bt8y4Y(+QAbW>E^EyUcNI(JI?HmO- z4G|3DeJCYK@sLAMkWQP(IX$cUL_-|VD}8r{QKZq}zaW#I_OXgk42DB|kqi^`kRi+E zBT{r68Z7gN(SwJoi{@d}LaYtrJW#NW=MZ66vL17IKbYJX2OQ~?vscWeAy%7?3Jy8K zqiq?9u#AX7Sn&D-V`4r+7pe695+aF+zWE9#R16f)xfh zmR7TZ3^JXeWvWO-&cqN%Gz`+}ecI{p%T}^Y3q_ux*)zC;3vOgWaZfQ0qB;`gML-ND z4`yVLcAg#FYgBgb-?Rj%s`{Ab5uu$nc!&_*BisQa2@!O)koN()SFNOD(t=}&5Lt){ zMnIP)tl?|mHaNBxR6!s)#lf+-O12s%lR@K_zU(^l5LV=_`RGbA8Y+K}^kTWkLz2=C z6LIhD)0vN8&xu+Im%!lag5)DLAW^i&4_O7|X^mw=G${N@&Qk?yEH!MVz^d-0OIb+^ z`HGM#w9)1061s#-7#48;Y;?Cfi-wK!{Pgfa>Z9w8m(t7e;=zjR_i;=QZkxr}LMumw zF{0mfiWw4C8~b5$LNxkirfZmP?B{#@pc@fYNghA5lk)rLT@2CZk5DDY|szapxu}ban~Cdp?$GIzR-Mh0uS)j<9K2%yEGkrfe=0r`KRXPsp#QPEwR`NPO+7)Q zzyD_-;`Eb4==_=`C9Z zE77X&r(3j7v6b-Sx0{28&DLyw{M%;&!T~{rj$Nc>MbxqCfk+Vg}6%%RTmMN#pkN zyozPRUp?09H%xANNeoQ;cUsVkqoG^(hRwY4OVInOAyON?VdjUM1Jtb>fA&7mnl5