diff --git a/fpga/Makefile.extra b/fpga/Makefile.extra index 0a99496..7055447 100644 --- a/fpga/Makefile.extra +++ b/fpga/Makefile.extra @@ -133,18 +133,11 @@ EXTRA_DIST = \ toplevel/usrp_multi/usrp_multi.qpf \ toplevel/usrp_multi/usrp_multi.qsf \ toplevel/usrp_multi/usrp_multi.v \ - toplevel/usrp_multi/usrp_multi.vh \ - toplevel/usrp_multi/usrp_multi_config_2rx_0tx.vh \ - toplevel/usrp_multi/usrp_multi_config_2rxhb_0tx.vh \ - toplevel/usrp_multi/usrp_multi_config_2rxhb_2tx.vh \ - toplevel/usrp_multi/usrp_multi_config_4rx_0tx.vh \ - toplevel/usrp_multi/usrp_std.vh \ + toplevel/usrp_multi/config.vh \ toplevel/usrp_std/usrp_std.csf \ toplevel/usrp_std/usrp_std.esf \ toplevel/usrp_std/usrp_std.psf \ toplevel/usrp_std/usrp_std.qpf \ toplevel/usrp_std/usrp_std.qsf \ toplevel/usrp_std/usrp_std.v \ - toplevel/usrp_std/usrp_std.vh \ - toplevel/usrp_std/usrp_std_config_2rxhb_2tx.vh \ - toplevel/usrp_std/usrp_std_config_4rx_0tx.vh + toplevel/usrp_std/config.vh diff --git a/fpga/sdr_lib/master_control_multi.v b/fpga/sdr_lib/master_control_multi.v index 95c4ec1..cab96a7 100644 --- a/fpga/sdr_lib/master_control_multi.v +++ b/fpga/sdr_lib/master_control_multi.v @@ -18,7 +18,7 @@ // along with this program; if not, write to the Free Software // Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA // -`include "usrp_multi.vh" +`include "config.vh" `include "../../../firmware/include/fpga_regs_common.v" `include "../../../firmware/include/fpga_regs_standard.v" // Clock, enable, and reset controls for whole system diff --git a/fpga/sdr_lib/rx_chain.v b/fpga/sdr_lib/rx_chain.v index 73c0c26..bc4336e 100644 --- a/fpga/sdr_lib/rx_chain.v +++ b/fpga/sdr_lib/rx_chain.v @@ -21,7 +21,8 @@ // Following defines conditionally include RX path circuitry -`include "usrp_std.vh" +`include "config.vh" // resolved relative to project root + module rx_chain (input clock, input reset, diff --git a/fpga/toplevel/usrp_std/usrp_std_config_1rxhb_1tx.vh b/fpga/toplevel/include/common_config_1rxhb_1tx.vh similarity index 93% rename from fpga/toplevel/usrp_std/usrp_std_config_1rxhb_1tx.vh rename to fpga/toplevel/include/common_config_1rxhb_1tx.vh index e029192..fb2e915 100644 --- a/fpga/toplevel/usrp_std/usrp_std_config_1rxhb_1tx.vh +++ b/fpga/toplevel/include/common_config_1rxhb_1tx.vh @@ -26,7 +26,7 @@ // ------------------------------------------------------------ // Define 1 and only one of TX_SINGLE, TX_DUAL and TX_QUAD // to respectively enable 1, 2 or 4 transmit channels. -// [Please note that only TX_DUAL is currently valid] +// [Please note that only TX_SINGLE and TX_DUAL are currently valid] `define TX_SINGLE //`define TX_DUAL //`define TX_QUAD @@ -37,7 +37,7 @@ //`define TX_HB_ON // ------------------------------------------------------------ -// IF RX_ON is not defined, there is *no* transmit circuitry built +// IF RX_ON is not defined, there is *no* receive circuitry built `define RX_ON // ------------------------------------------------------------ @@ -58,4 +58,4 @@ // ------------------------------------------------------------ // Define RX_CIC_ON to enable the receive Cascaded Integrator Comb filter - `define RX_CIC_ON \ No newline at end of file + `define RX_CIC_ON diff --git a/fpga/toplevel/usrp_multi/usrp_multi_config_2rx_0tx.vh b/fpga/toplevel/include/common_config_2rx_0tx.vh similarity index 94% rename from fpga/toplevel/usrp_multi/usrp_multi_config_2rx_0tx.vh rename to fpga/toplevel/include/common_config_2rx_0tx.vh index 3c47146..c97c5a3 100644 --- a/fpga/toplevel/usrp_multi/usrp_multi_config_2rx_0tx.vh +++ b/fpga/toplevel/include/common_config_2rx_0tx.vh @@ -19,7 +19,6 @@ // along with this program; if not, write to the Free Software // Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA // -`define MULTI_ON // ------------------------------------------------------------ // If TX_ON is not defined, there is *no* transmit circuitry built // `define TX_ON @@ -27,7 +26,7 @@ // ------------------------------------------------------------ // Define 1 and only one of TX_SINGLE, TX_DUAL and TX_QUAD // to respectively enable 1, 2 or 4 transmit channels. -// [Please note that only TX_DUAL is currently valid] +// [Please note that only TX_SINGLE and TX_DUAL are currently valid] //`define TX_SINGLE //`define TX_DUAL //`define TX_QUAD @@ -38,7 +37,7 @@ //`define TX_HB_ON // ------------------------------------------------------------ -// IF RX_ON is not defined, there is *no* transmit circuitry built +// IF RX_ON is not defined, there is *no* receive circuitry built `define RX_ON // ------------------------------------------------------------ diff --git a/fpga/toplevel/usrp_multi/usrp_multi_config_2rxhb_0tx.vh b/fpga/toplevel/include/common_config_2rxhb_0tx.vh similarity index 96% rename from fpga/toplevel/usrp_multi/usrp_multi_config_2rxhb_0tx.vh rename to fpga/toplevel/include/common_config_2rxhb_0tx.vh index 43ed8e6..459268b 100644 --- a/fpga/toplevel/usrp_multi/usrp_multi_config_2rxhb_0tx.vh +++ b/fpga/toplevel/include/common_config_2rxhb_0tx.vh @@ -19,7 +19,6 @@ // along with this program; if not, write to the Free Software // Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA // -`define MULTI_ON // ------------------------------------------------------------ // If TX_ON is not defined, there is *no* transmit circuitry built // `define TX_ON @@ -27,7 +26,7 @@ // ------------------------------------------------------------ // Define 1 and only one of TX_SINGLE, TX_DUAL and TX_QUAD // to respectively enable 1, 2 or 4 transmit channels. -// [Please note that only TX_DUAL is currently valid] +// [Please note that only TX_SINGLE and TX_DUAL are currently valid] //`define TX_SINGLE //`define TX_DUAL //`define TX_QUAD diff --git a/fpga/toplevel/usrp_std/usrp_std_config_2rxhb_2tx.vh b/fpga/toplevel/include/common_config_2rxhb_2tx.vh similarity index 96% rename from fpga/toplevel/usrp_std/usrp_std_config_2rxhb_2tx.vh rename to fpga/toplevel/include/common_config_2rxhb_2tx.vh index 4d51a20..ecf0fa0 100644 --- a/fpga/toplevel/usrp_std/usrp_std_config_2rxhb_2tx.vh +++ b/fpga/toplevel/include/common_config_2rxhb_2tx.vh @@ -26,7 +26,7 @@ // ------------------------------------------------------------ // Define 1 and only one of TX_SINGLE, TX_DUAL and TX_QUAD // to respectively enable 1, 2 or 4 transmit channels. -// [Please note that only TX_DUAL is currently valid] +// [Please note that only TX_SINGLE and TX_DUAL are currently valid] //`define TX_SINGLE `define TX_DUAL //`define TX_QUAD diff --git a/fpga/toplevel/usrp_std/usrp_std_config_4rx_0tx.vh b/fpga/toplevel/include/common_config_4rx_0tx.vh similarity index 96% rename from fpga/toplevel/usrp_std/usrp_std_config_4rx_0tx.vh rename to fpga/toplevel/include/common_config_4rx_0tx.vh index 2bc7138..4984195 100644 --- a/fpga/toplevel/usrp_std/usrp_std_config_4rx_0tx.vh +++ b/fpga/toplevel/include/common_config_4rx_0tx.vh @@ -26,7 +26,7 @@ // ------------------------------------------------------------ // Define 1 and only one of TX_SINGLE, TX_DUAL and TX_QUAD // to respectively enable 1, 2 or 4 transmit channels. -// [Please note that only TX_DUAL is currently valid] +// [Please note that only TX_SINGLE and TX_DUAL are currently valid] //`define TX_SINGLE //`define TX_DUAL //`define TX_QUAD diff --git a/fpga/toplevel/usrp_std/usrp_std.vh b/fpga/toplevel/include/common_config_bottom.vh similarity index 77% rename from fpga/toplevel/usrp_std/usrp_std.vh rename to fpga/toplevel/include/common_config_bottom.vh index 7b7433c..3129798 100644 --- a/fpga/toplevel/usrp_std/usrp_std.vh +++ b/fpga/toplevel/include/common_config_bottom.vh @@ -2,7 +2,7 @@ // // USRP - Universal Software Radio Peripheral // -// Copyright (C) 2006 Matt Ettus +// Copyright (C) 2006,2007 Matt Ettus // // This program is free software; you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by @@ -20,29 +20,11 @@ // // ==================================================================== -// User control over what parts get included -// -// >>>> EDIT ONLY THIS SECTION <<<< -// -// ==================================================================== - -// Uncomment this for 1 rx channel (w/ halfband) & 1 transmit channel -//`include "usrp_std_config_1rxhb_1tx.vh" - -// Uncomment this for 2 rx channels (w/ halfband) & 2 transmit channels - `include "usrp_std_config_2rxhb_2tx.vh" - -// Uncomment this for 4 rx channels (w/o halfband) & 0 transmit channels -//`include "usrp_std_config_4rx_0tx.vh" - -// Add other "known to fit" configurations here... - +// This is the common tail for standard configuation // ==================================================================== // // >>>> DO NOT EDIT BELOW HERE <<<< // -// [The stuff from here down is derived from the stuff included above] -// // N.B., *all* the remainder of the code should be conditionalized // only in terms of: // diff --git a/fpga/toplevel/usrp_multi/config.vh b/fpga/toplevel/usrp_multi/config.vh new file mode 100644 index 0000000..07011bd --- /dev/null +++ b/fpga/toplevel/usrp_multi/config.vh @@ -0,0 +1,62 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2006,2007 Matt Ettus +// Copyright (C) 2006 Martin Dudok van Heel +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA +// + +// ==================================================================== +// User control over what parts get included +// +// >>>> EDIT ONLY THIS SECTION <<<< +// Uncomment only ONE configuration +// ==================================================================== + +// ==================================================================== +// FIXME drive configuration selection from the command line and/or gui +// ==================================================================== + +`define MULTI_ON // enable multi usrp configuration + +// Uncomment this for 1 rx channel (w/ halfband) & 1 transmit channel +//`include "../include/common_config_1rxhb_1tx.vh" + +// Uncomment this for multi with 2 rx channels (w/ halfband) & 2 transmit channels +`include "../include/common_config_2rxhb_2tx.vh" + +// Uncomment this for multi with 4 rx channels (w/o halfband) & 0 transmit channels +//`include "../include/common_config_4rx_0tx.vh" + +// Uncomment this for multi with 2 rx channels (w/ halfband) & 0 transmit channels +//`include "../include/common_config_2rxhb_0tx.vh" + +// Uncomment this for multi with 2 rx channels (w/o halfband) & 0 transmit channels +//`include "../include/common_config_2rx_0tx.vh" + + +// Add other "known to fit" configurations here... + +// ==================================================================== +// Now include the common footer +// ==================================================================== + +`ifdef MULTI_ON + `define COUNTER_32BIT_ON +`endif + +`include "../include/common_config_bottom.vh" diff --git a/fpga/toplevel/usrp_multi/usrp_multi.qsf b/fpga/toplevel/usrp_multi/usrp_multi.qsf index e45c683..9f0efbd 100644 --- a/fpga/toplevel/usrp_multi/usrp_multi.qsf +++ b/fpga/toplevel/usrp_multi/usrp_multi.qsf @@ -27,7 +27,7 @@ # ======================== set_global_assignment -name ORIGINAL_QUARTUS_VERSION 3.0 set_global_assignment -name PROJECT_CREATION_TIME_DATE "00:14:04 JULY 13, 2003" -set_global_assignment -name LAST_QUARTUS_VERSION "5.1 SP1" +set_global_assignment -name LAST_QUARTUS_VERSION 6.1 # Pin & Location Assignments # ========================== @@ -223,7 +223,7 @@ set_global_assignment -name APEX20K_OPTIMIZATION_TECHNIQUE SPEED set_global_assignment -name TOP_LEVEL_ENTITY usrp_multi set_global_assignment -name VHDL_SHOW_LMF_MAPPING_MESSAGES OFF set_global_assignment -name USER_LIBRARIES "H:\\usrp-for2.7\\fpga\\megacells" -set_global_assignment -name AUTO_ENABLE_SMART_COMPILE On +set_global_assignment -name AUTO_ENABLE_SMART_COMPILE ON # Fitter Assignments # ================== @@ -314,7 +314,7 @@ set_global_assignment -name HCPY_VREF_PINS OFF # ======================== set_global_assignment -name HUB_ENTITY_NAME SLD_HUB set_global_assignment -name HUB_INSTANCE_NAME SLD_HUB_INST -set_global_assignment -name ENABLE_SIGNALTAP Off +set_global_assignment -name ENABLE_SIGNALTAP OFF # LogicLock Region Assignments # ============================ @@ -326,8 +326,8 @@ set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT OFF # Timing Assignments # ================== set_global_assignment -name DUTY_CYCLE 50 -section_id SCLK - set_global_assignment -name FMAX_REQUIREMENT "1.0 MHz" -section_id SCLK - set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id SCLK +set_global_assignment -name FMAX_REQUIREMENT "1 MHz" -section_id SCLK +set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id SCLK # end CLOCK(SCLK) # --------------- @@ -338,8 +338,8 @@ set_global_assignment -name DUTY_CYCLE 50 -section_id SCLK # Timing Assignments # ================== set_global_assignment -name DUTY_CYCLE 50 -section_id master_clk - set_global_assignment -name FMAX_REQUIREMENT "64.0 MHz" -section_id master_clk - set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id master_clk +set_global_assignment -name FMAX_REQUIREMENT "64 MHz" -section_id master_clk +set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id master_clk # end CLOCK(master_clk) # --------------------- @@ -350,8 +350,8 @@ set_global_assignment -name DUTY_CYCLE 50 -section_id master_clk # Timing Assignments # ================== set_global_assignment -name DUTY_CYCLE 50 -section_id usbclk - set_global_assignment -name FMAX_REQUIREMENT "48.0 MHz" -section_id usbclk - set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id usbclk +set_global_assignment -name FMAX_REQUIREMENT "48 MHz" -section_id usbclk +set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id usbclk # end CLOCK(usbclk) # ----------------- @@ -361,18 +361,18 @@ set_global_assignment -name DUTY_CYCLE 50 -section_id usbclk # Timing Assignments # ================== - set_instance_assignment -name CLOCK_SETTINGS SCLK -to SCLK - set_instance_assignment -name CLOCK_SETTINGS usbclk -to usbclk - set_instance_assignment -name CLOCK_SETTINGS master_clk -to master_clk +set_instance_assignment -name CLOCK_SETTINGS SCLK -to SCLK +set_instance_assignment -name CLOCK_SETTINGS usbclk -to usbclk +set_instance_assignment -name CLOCK_SETTINGS master_clk -to master_clk # end ENTITY(usrp_multi) # -------------------- +set_global_assignment -name VERILOG_FILE ../../sdr_lib/rssi.v set_global_assignment -name VERILOG_FILE ../../sdr_lib/setting_reg_masked.v set_global_assignment -name VERILOG_FILE ../../sdr_lib/master_control_multi.v set_global_assignment -name VERILOG_FILE ../../sdr_lib/ram16.v -set_global_assignment -name VERILOG_FILE usrp_multi.vh set_global_assignment -name VERILOG_FILE ../../megacells/fifo_4k.v set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/acc.v set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/mult.v diff --git a/fpga/toplevel/usrp_multi/usrp_multi.v b/fpga/toplevel/usrp_multi/usrp_multi.v index e3706d7..ce484fc 100644 --- a/fpga/toplevel/usrp_multi/usrp_multi.v +++ b/fpga/toplevel/usrp_multi/usrp_multi.v @@ -28,7 +28,7 @@ // Uncomment the following to include optional circuitry -`include "usrp_multi.vh" +`include "config.vh" `include "../../../firmware/include/fpga_regs_common.v" `include "../../../firmware/include/fpga_regs_standard.v" diff --git a/fpga/toplevel/usrp_multi/usrp_multi.vh b/fpga/toplevel/usrp_multi/usrp_multi.vh deleted file mode 100644 index fb5dc8d..0000000 --- a/fpga/toplevel/usrp_multi/usrp_multi.vh +++ /dev/null @@ -1,141 +0,0 @@ -// -*- verilog -*- -// -// USRP - Universal Software Radio Peripheral -// -// Copyright (C) 2006 Matt Ettus -// Copyright (C) 2006 Martin Dudok van Heel -// -// This program is free software; you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published by -// the Free Software Foundation; either version 2 of the License, or -// (at your option) any later version. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program; if not, write to the Free Software -// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA -// - -// ==================================================================== -// User control over what parts get included -// -// >>>> EDIT ONLY THIS SECTION <<<< -// Uncomment only ONE configuration -// ==================================================================== - -// ==== Multi usrp configurations ==== -// Uncomment this for multi with 2 rx channels (w/ halfband) & 2 transmit channels -`include "usrp_multi_config_2rxhb_2tx.vh" - -// Uncomment this for multi with 4 rx channels (w/o halfband) & 0 transmit channels -//`include "usrp_multi_config_4rx_0tx.vh" - -// Uncomment this for multi with 2 rx channels (w/ halfband) & 0 transmit channels -//`include "usrp_multi_config_2rxhb_0tx.vh" - -// Uncomment this for multi with 2 rx channels (w/o halfband) & 0 transmit channels -//`include "usrp_multi_config_2rx_0tx.vh" - -// ==== Standard configurations (no multi support) ==== -// Uncomment this for standard with 2 rx channels (w/ halfband) & 2 transmit channels -// `include "../usrp_std/usrp_std_config_2rxhb_2tx.vh" - -// Uncomment this for standard with 4 rx channels (w/o halfband) & 0 transmit channels -//`include "../usrp_std/usrp_std_config_4rx_0tx.vh" - -// Add other "known to fit" configurations here... - -// ==================================================================== -// -// >>>> DO NOT EDIT BELOW HERE <<<< -// -// [The stuff from here down is derived from the stuff included above] -// -// N.B., *all* the remainder of the code should be conditionalized -// only in terms of: -// -// TX_ON, TX_EN_0, TX_EN_1, TX_EN_2, TX_EN_3, TX_CAP_NCHAN, TX_CAP_HB, -// RX_ON, RX_EN_0, RX_EN_1, RX_EN_2, RX_EN_3, RX_CAP_NCHAN, RX_CAP_HB, -// RX_NCO_ON, RX_CIC_ON -// ==================================================================== -`ifdef MULTI_ON - `define COUNTER_32BIT_ON -`endif - -`ifdef TX_ON - - `ifdef TX_SINGLE - `define TX_EN_0 - `define TX_CAP_NCHAN 3'd1 - `endif - - `ifdef TX_DUAL - `define TX_EN_0 - `define TX_EN_1 - `define TX_CAP_NCHAN 3'd2 - `endif - - `ifdef TX_QUAD - `define TX_EN_0 - `define TX_EN_1 - `define TX_EN_2 - `define TX_EN_3 - `define TX_CAP_NCHAN 3'd4 - `endif - - `ifdef TX_HB_ON - `define TX_CAP_HB 1 - `else - `define TX_CAP_HB 0 - `endif - -`else // !ifdef TX_ON - - `define TX_CAP_NCHAN 3'd0 - `define TX_CAP_HB 0 - -`endif // !ifdef TX_ON - -// -------------------------------------------------------------------- - -`ifdef RX_ON - - `ifdef RX_SINGLE - `define RX_EN_0 - `define RX_CAP_NCHAN 3'd1 - `endif - - `ifdef RX_DUAL - `define RX_EN_0 - `define RX_EN_1 - `ifdef MULTI_ON - `define RX_CAP_NCHAN 3'd4 - `else - `define RX_CAP_NCHAN 3'd2 - `endif - `endif - - `ifdef RX_QUAD - `define RX_EN_0 - `define RX_EN_1 - `define RX_EN_2 - `define RX_EN_3 - `define RX_CAP_NCHAN 3'd4 - `endif - - `ifdef RX_HB_ON - `define RX_CAP_HB 1 - `else - `define RX_CAP_HB 0 - `endif - -`else // !ifdef RX_ON - - `define RX_CAP_NCHAN 3'd0 - `define RX_CAP_HB 0 - -`endif // !ifdef RX_ON diff --git a/fpga/toplevel/usrp_multi/usrp_multi_config_2rxhb_2tx.vh b/fpga/toplevel/usrp_multi/usrp_multi_config_2rxhb_2tx.vh deleted file mode 100644 index 9ec92a4..0000000 --- a/fpga/toplevel/usrp_multi/usrp_multi_config_2rxhb_2tx.vh +++ /dev/null @@ -1,62 +0,0 @@ -// -*- verilog -*- -// -// USRP - Universal Software Radio Peripheral -// -// Copyright (C) 2006 Matt Ettus -// Copyright (C) 2006 Martin Dudok van Heel -// -// This program is free software; you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published by -// the Free Software Foundation; either version 2 of the License, or -// (at your option) any later version. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program; if not, write to the Free Software -// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA -// -`define MULTI_ON -// ------------------------------------------------------------ -// If TX_ON is not defined, there is *no* transmit circuitry built - `define TX_ON - -// ------------------------------------------------------------ -// Define 1 and only one of TX_SINGLE, TX_DUAL and TX_QUAD -// to respectively enable 1, 2 or 4 transmit channels. -// [Please note that only TX_DUAL is currently valid] -//`define TX_SINGLE - `define TX_DUAL -//`define TX_QUAD - -// ------------------------------------------------------------ -// Define TX_HB_ON to enable the transmit halfband filter -// [Not implemented] -//`define TX_HB_ON - -// ------------------------------------------------------------ -// IF RX_ON is not defined, there is *no* transmit circuitry built - `define RX_ON - -// ------------------------------------------------------------ -// Define 1 and only one of RX_SINGLE, RX_DUAL and RX_QUAD -// to respectively define 1, 2 or 4 receive channels. - -//`define RX_SINGLE - `define RX_DUAL -//`define RX_QUAD - -// ------------------------------------------------------------ -// Define RX_HB_ON to enable the receive halfband filter - `define RX_HB_ON - -// ------------------------------------------------------------ -// Define RX_NCO_ON to enable the receive Numerical Controlled Osc - `define RX_NCO_ON - -// ------------------------------------------------------------ -// Define RX_CIC_ON to enable the receive Cascaded Integrator Comb filter - `define RX_CIC_ON diff --git a/fpga/toplevel/usrp_multi/usrp_multi_config_4rx_0tx.vh b/fpga/toplevel/usrp_multi/usrp_multi_config_4rx_0tx.vh deleted file mode 100644 index 42549be..0000000 --- a/fpga/toplevel/usrp_multi/usrp_multi_config_4rx_0tx.vh +++ /dev/null @@ -1,62 +0,0 @@ -// -*- verilog -*- -// -// USRP - Universal Software Radio Peripheral -// -// Copyright (C) 2006 Matt Ettus -// Copyright (C) 2006 Martin Dudok van Heel -// -// This program is free software; you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published by -// the Free Software Foundation; either version 2 of the License, or -// (at your option) any later version. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program; if not, write to the Free Software -// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA -// -`define MULTI_ON -// ------------------------------------------------------------ -// If TX_ON is not defined, there is *no* transmit circuitry built -// `define TX_ON - -// ------------------------------------------------------------ -// Define 1 and only one of TX_SINGLE, TX_DUAL and TX_QUAD -// to respectively enable 1, 2 or 4 transmit channels. -// [Please note that only TX_DUAL is currently valid] -//`define TX_SINGLE -//`define TX_DUAL -//`define TX_QUAD - -// ------------------------------------------------------------ -// Define TX_HB_ON to enable the transmit halfband filter -// [Not implemented] -//`define TX_HB_ON - -// ------------------------------------------------------------ -// IF RX_ON is not defined, there is *no* transmit circuitry built - `define RX_ON - -// ------------------------------------------------------------ -// Define 1 and only one of RX_SINGLE, RX_DUAL and RX_QUAD -// to respectively define 1, 2 or 4 receive channels. - -//`define RX_SINGLE -//`define RX_DUAL - `define RX_QUAD - -// ------------------------------------------------------------ -// Define RX_HB_ON to enable the receive halfband filter -//`define RX_HB_ON - -// ------------------------------------------------------------ -// Define RX_NCO_ON to enable the receive Numerical Controlled Osc - `define RX_NCO_ON - -// ------------------------------------------------------------ -// Define RX_CIC_ON to enable the receive Cascaded Integrator Comb filter - `define RX_CIC_ON diff --git a/fpga/toplevel/usrp_multi/usrp_std.vh b/fpga/toplevel/usrp_multi/usrp_std.vh deleted file mode 100644 index 2732a19..0000000 --- a/fpga/toplevel/usrp_multi/usrp_std.vh +++ /dev/null @@ -1,29 +0,0 @@ -// -*- verilog -*- -// -// USRP - Universal Software Radio Peripheral -// -// Copyright (C) 2006 Martin Dudok van Heel -// -// This program is free software; you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published by -// the Free Software Foundation; either version 2 of the License, or -// (at your option) any later version. -// -// This program is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program; if not, write to the Free Software -// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA -// - -// ==================================================================== -// Do not remove or edit this file. -// This is a redirect to usrp_multi.vh -// This is needed because some common source files have a -// hardcoded `include "usrp_std.vh" -// ==================================================================== - -`include "usrp_multi.vh" diff --git a/fpga/toplevel/usrp_std/config.vh b/fpga/toplevel/usrp_std/config.vh new file mode 100644 index 0000000..f1f8ec4 --- /dev/null +++ b/fpga/toplevel/usrp_std/config.vh @@ -0,0 +1,53 @@ +// -*- verilog -*- +// +// USRP - Universal Software Radio Peripheral +// +// Copyright (C) 2006,2007 Matt Ettus +// +// This program is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation; either version 2 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program; if not, write to the Free Software +// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA +// + +// ==================================================================== +// User control over what parts get included +// +// >>>> EDIT ONLY THIS SECTION <<<< +// Uncomment only ONE configuration +// ==================================================================== + +// ==================================================================== +// FIXME drive configuration selection from the command line and/or gui +// ==================================================================== + +// Uncomment this for 1 rx channel (w/ halfband) & 1 transmit channel +//`include "../include/common_config_1rxhb_1tx.vh" + +// Uncomment this for 2 rx channels (w/ halfband) & 2 transmit channels + `include "../include/common_config_2rxhb_2tx.vh" + +// Uncomment this for 4 rx channels (w/o halfband) & 0 transmit channels +//`include "../include/common_config_4rx_0tx.vh" + +// Uncomment this for multi with 2 rx channels (w/ halfband) & 0 transmit channels +//`include "../include/common_config_2rxhb_0tx.vh" + +// Uncomment this for multi with 2 rx channels (w/o halfband) & 0 transmit channels +//`include "../include/common_config_2rx_0tx.vh" + +// Add other "known to fit" configurations here... + +// ==================================================================== +// Now include the common footer +// ==================================================================== + `include "../include/common_config_bottom.vh" diff --git a/fpga/toplevel/usrp_std/usrp_std.qsf b/fpga/toplevel/usrp_std/usrp_std.qsf index fe6773f..e43d39b 100644 --- a/fpga/toplevel/usrp_std/usrp_std.qsf +++ b/fpga/toplevel/usrp_std/usrp_std.qsf @@ -370,7 +370,6 @@ set_instance_assignment -name CLOCK_SETTINGS master_clk -to master_clk set_global_assignment -name VERILOG_FILE ../../sdr_lib/rssi.v set_global_assignment -name VERILOG_FILE ../../sdr_lib/ram16.v -set_global_assignment -name VERILOG_FILE usrp_std.vh set_global_assignment -name VERILOG_FILE ../../megacells/fifo_4k.v set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/acc.v set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/mult.v diff --git a/fpga/toplevel/usrp_std/usrp_std.v b/fpga/toplevel/usrp_std/usrp_std.v index ad882ce..870f437 100644 --- a/fpga/toplevel/usrp_std/usrp_std.v +++ b/fpga/toplevel/usrp_std/usrp_std.v @@ -27,7 +27,7 @@ // Uncomment the following to include optional circuitry -`include "usrp_std.vh" +`include "config.vh" `include "../../../firmware/include/fpga_regs_common.v" `include "../../../firmware/include/fpga_regs_standard.v"