mirror of https://gerrit.osmocom.org/libusrp
added Write Register Masked operation
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@4647 221aa14e-8319-0410-a670-987f0aec2ac5
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@ -91,6 +91,9 @@ format across the USB.
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packet is discarded. As a special case, the timestamp
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packet is discarded. As a special case, the timestamp
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0xffffffff is interpreted as "Now".
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0xffffffff is interpreted as "Now".
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The time base is a free running 32-bit counter that is
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incremented by the A/D sample-clock.
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Payload: Variable length field. Length is specified by the
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Payload: Variable length field. Length is specified by the
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Payload Len field.
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Payload Len field.
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@ -100,12 +103,21 @@ format across the USB.
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"Data Channel" payload format:
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-------------------------------
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If Chan != 0x1f, the packet is a "data packet" and the payload is a
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sequence of homogeneous samples. The format of the samples is
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determined by the configuration associated with the given channel.
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It is often the case that the payload field contains 32-bit complex
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samples, each containing 16-bit real and imaginary components.
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"Control Channel" payload format:
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"Control Channel" payload format:
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---------------------------------
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---------------------------------
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The control channel payload consists of a sequence of 0 or more
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If Chan == 0x1f, the packet is a "control packet". The control channel
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sub-packets.
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payload consists of a sequence of 0 or more sub-packets.
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Each sub-packet starts on a 32-bit boundary, and consists of an 8-bit
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Each sub-packet starts on a 32-bit boundary, and consists of an 8-bit
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Opcode field, an 8-bit Length field, Length bytes of arguments, and 0,
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Opcode field, an 8-bit Length field, Length bytes of arguments, and 0,
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@ -163,6 +175,25 @@ Write Register:
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+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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Write Register Masked:
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Opcode: OP_WRITE_REG_MASKED
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REG[Num] = (REG[Num] & ~Mask) | (Value & Mask)
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That is, only the register bits that correspond to 1's in the
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mask are written with the new value.
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+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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| Opcode | 10 | mbz | Reg Number |
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+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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| Register Value |
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+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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| Mask Value |
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+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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Read Register:
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Read Register:
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Opcode: OP_READ_REG
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Opcode: OP_READ_REG
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@ -229,7 +260,7 @@ SPI Write:
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Enables: Which SPI enables to assert (mask)
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Enables: Which SPI enables to assert (mask)
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Format: Specifies format of SPI data and Opt Header Bytes
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Format: Specifies format of SPI data and Opt Header Bytes
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Opt Header Bytes: 2-byte field containing optional Tx bytes; see Format
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Opt Header Bytes: 2-byte field containing optional Tx bytes; see Format
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Data: The bytes to write to the I2C bus
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Data: The bytes to write to the SPI bus
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Length: Length of Data + 6
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Length: Length of Data + 6
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+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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