Fix uplink sub_slot and sub_types assignment in the sdcch4 and bcch_ccch demappers blocks
Add support for RACH bursts although they are not yet supported in the receiver and control channel decoder blocks. 3GPP TS 45.002 version 15.1.0 Release 15 Table 3 : Mapping of logical channels onto physical channels (see subclauses 6.3, 6.4, 6.5) Figure 8a: TDMA frame mapping for FCCH + SCH + BCCH + CCCH Fixes the following tests: qa_gsm_bcch_ccch_demapper.test_uplink qa_gsm_bcch_ccch_sdcch4_demapper.test_uplink Change-Id: Ia6b3070c1085bcdda6d98fd94a89c6e0982e2aec
This commit is contained in:
parent
c895bf2f22
commit
fa184a9447
|
@ -137,15 +137,15 @@
|
|||
</param>
|
||||
<param>
|
||||
<key>uplink_channel_types</key>
|
||||
<value>[2,2,2,2,0,0,2,2,2,2,2,2,2,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,2,2,2,2,2,2,2,2,0,0,2,2,2,2,]</value>
|
||||
<value>[3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,]</value>
|
||||
</param>
|
||||
<param>
|
||||
<key>uplink_starts_fn_mod51</key>
|
||||
<value>[0,0,0,0,0,0,6,6,6,6,10,10,10,10,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,37,37,37,37,41,41,41,41,0,0,47,47,47,47]</value>
|
||||
<value>[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,]</value>
|
||||
</param>
|
||||
<param>
|
||||
<key>uplink_subslots</key>
|
||||
<value>[0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,2,2,2,2,0,0,3,3,3,3,0,0,0,0,0,0,2,2,2,2,3,3,3,3,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,2,2,2,2,0,0,3,3,3,3]</value>
|
||||
<value>[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]</value>
|
||||
</param>
|
||||
</block>
|
||||
<block>
|
||||
|
|
|
@ -137,15 +137,15 @@
|
|||
</param>
|
||||
<param>
|
||||
<key>uplink_channel_types</key>
|
||||
<value>[7,7,7,7,0,0,135,135,135,135,135,135,135,135,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,7,7,7,7,7,7,7,7,0,0,7,7,7,7]</value>
|
||||
<value>[7,7,7,7,3,3,135,135,135,135,135,135,135,135,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,7,7,7,7,7,7,7,7,3,3,7,7,7,7]</value>
|
||||
</param>
|
||||
<param>
|
||||
<key>uplink_starts_fn_mod51</key>
|
||||
<value>[0,0,0,0,0,0,6,6,6,6,10,10,10,10,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,37,37,37,37,41,41,41,41,0,0,47,47,47,47]</value>
|
||||
<value>[0,0,0,0,4,5,6,6,6,6,10,10,10,10,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,37,37,37,41,41,41,41,45,46,47,47,47,47,]</value>
|
||||
</param>
|
||||
<param>
|
||||
<key>uplink_subslots</key>
|
||||
<value>[0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,2,2,2,2,0,0,3,3,3,3,0,0,0,0,0,0,2,2,2,2,3,3,3,3,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,2,2,2,2,0,0,3,3,3,3]</value>
|
||||
<value>[3,3,3,3,0,0,2,2,2,2,3,3,3,3,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0,2,2,2,2,3,3,3,3,0,0,0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0,2,2,2,2,]</value>
|
||||
</param>
|
||||
</block>
|
||||
<block>
|
||||
|
|
|
@ -128,9 +128,6 @@ namespace gr {
|
|||
frame_numbers = d_downlink_frame_numbers;
|
||||
bursts = d_downlink_bursts;
|
||||
}
|
||||
|
||||
uint32_t fn51_start = starts_fn_mod51[fn_mod51];
|
||||
uint32_t fn51_stop = fn51_start + 3;
|
||||
|
||||
//set type
|
||||
new_header->type = GSMTAP_TYPE_UM;
|
||||
|
@ -141,7 +138,16 @@ namespace gr {
|
|||
new_header->sub_type = ch_type;
|
||||
}
|
||||
new_header->sub_slot = subslots[fn_mod102];
|
||||
|
||||
|
||||
if (ch_type == GSMTAP_CHANNEL_RACH)
|
||||
{
|
||||
message_port_pub(pmt::mp("bursts"), burst_out);
|
||||
return;
|
||||
}
|
||||
|
||||
uint32_t fn51_start = starts_fn_mod51[fn_mod51];
|
||||
uint32_t fn51_stop = fn51_start + 3;
|
||||
|
||||
if(fn_mod51>=fn51_start && fn_mod51<=fn51_stop)
|
||||
{
|
||||
uint32_t ii = fn_mod51 - fn51_start;
|
||||
|
|
|
@ -51,7 +51,135 @@ class gsm_bcch_ccch_demapper(grgsm.hier_block):
|
|||
##################################################
|
||||
# Blocks
|
||||
##################################################
|
||||
self.gsm_universal_ctrl_chans_demapper_0 = grgsm.universal_ctrl_chans_demapper(timeslot_nr, ([0,0,2,2,2,2,6,6,6,6,0,0,12,12,12,12,16,16,16,16,0,0,22,22,22,22,26,26,26,26,0,0,32,32,32,32,36,36,36,36,0,0,42,42,42,42,46,46,46,46,0,]), ([0,0,1,1,1,1,2,2,2,2,0,0,2,2,2,2,2,2,2,2,0,0,2,2,2,2,2,2,2,2,0,0,2,2,2,2,2,2,2,2,0,0,2,2,2,2,2,2,2,2,0,]), ([0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,2,2,2,2,0,0,3,3,3,3,4,4,4,4,0,0,5,5,5,5,6,6,6,6,0,0,7,7,7,7,8,8,8,8,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,2,2,2,2,0,0,3,3,3,3,4,4,4,4,0,0,5,5,5,5,6,6,6,6,0,0,7,7,7,7,8,8,8,8,0]), ([0,0,0,0,0,0,6,6,6,6,10,10,10,10,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,37,37,37,37,41,41,41,41,0,0,47,47,47,47]), ([2,2,2,2,0,0,2,2,2,2,2,2,2,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,2,2,2,2,2,2,2,2,0,0,2,2,2,2,]), ([0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,2,2,2,2,0,0,3,3,3,3,0,0,0,0,0,0,2,2,2,2,3,3,3,3,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,2,2,2,2,0,0,3,3,3,3]))
|
||||
|
||||
# 3GPP TS 45.002 version 15.1.0 Release 15
|
||||
# Table 3 : Mapping of logical channels onto physical channels (see subclauses 6.3, 6.4, 6.5)
|
||||
# BCCH Norm D 0,2,4,6 C0 NB 51 B(2..5)
|
||||
# RACH U 0,2,4,6 C0 AB, Extended AB2 51 B0(0),B1(1)..B50(50)
|
||||
# Figure 8a: TDMA frame mapping for FCCH + SCH + BCCH + CCCH
|
||||
self.gsm_universal_ctrl_chans_demapper_0 = grgsm.universal_ctrl_chans_demapper(
|
||||
timeslot_nr, ([ #downlink
|
||||
0,0,
|
||||
2,2,2,2,
|
||||
6,6,6,6,
|
||||
0,0,
|
||||
12,12,12,12,
|
||||
16,16,16,16,
|
||||
0,0,
|
||||
22,22,22,22,
|
||||
26,26,26,26,
|
||||
0,0,
|
||||
32,32,32,32,
|
||||
36,36,36,36,
|
||||
0,0,
|
||||
42,42,42,42,
|
||||
46,46,46,46,
|
||||
0,
|
||||
]), ([
|
||||
0,0,
|
||||
1,1,1,1,
|
||||
2,2,2,2,
|
||||
0,0,
|
||||
2,2,2,2,
|
||||
2,2,2,2,
|
||||
0,0,
|
||||
2,2,2,2,
|
||||
2,2,2,2,
|
||||
0,0,
|
||||
2,2,2,2,
|
||||
2,2,2,2,
|
||||
0,0,
|
||||
2,2,2,2,
|
||||
2,2,2,2,
|
||||
0,
|
||||
]), ([
|
||||
0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,
|
||||
1,1,1,1,
|
||||
2,2,2,2,
|
||||
0,0,
|
||||
3,3,3,3,
|
||||
4,4,4,4,
|
||||
0,0,
|
||||
5,5,5,5,
|
||||
6,6,6,6,
|
||||
0,0,
|
||||
7,7,7,7,
|
||||
8,8,8,8,
|
||||
0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
1,1,1,1,
|
||||
2,2,2,2,
|
||||
0,0,
|
||||
3,3,3,3,
|
||||
4,4,4,4,
|
||||
0,0,
|
||||
5,5,5,5,
|
||||
6,6,6,6,
|
||||
0,0,
|
||||
7,7,7,7,
|
||||
8,8,8,8,
|
||||
0,
|
||||
]), ([ #uplink
|
||||
0,1,2,3,
|
||||
4,5,6,7,
|
||||
8,9,10,11,
|
||||
12,13,14,15,
|
||||
16,17,18,19,
|
||||
20,21,22,23,
|
||||
24,25,26,27,
|
||||
28,29,30,31,
|
||||
32,33,34,35,
|
||||
36,37,38,39,
|
||||
40,41,42,43,
|
||||
44,45,46,47,
|
||||
48,49,50,
|
||||
]), ([
|
||||
3,3,3,3,
|
||||
3,3,3,3,
|
||||
3,3,3,3,
|
||||
3,3,3,3,
|
||||
3,3,3,3,
|
||||
3,3,3,3,
|
||||
3,3,3,3,
|
||||
3,3,3,3,
|
||||
3,3,3,3,
|
||||
3,3,3,3,
|
||||
3,3,3,3,
|
||||
3,3,3,3,
|
||||
3,3,3,
|
||||
]), ([
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,
|
||||
]))
|
||||
|
||||
##################################################
|
||||
# Connections
|
||||
|
|
|
@ -51,7 +51,161 @@ class gsm_bcch_ccch_sdcch4_demapper(grgsm.hier_block):
|
|||
##################################################
|
||||
# Blocks
|
||||
##################################################
|
||||
self.gsm_universal_ctrl_chans_demapper_0 = grgsm.universal_ctrl_chans_demapper(timeslot_nr, ([0,0,2,2,2,2,6,6,6,6,0,0,12,12,12,12,16,16,16,16,0,0,22,22,22,22,26,26,26,26,0,0,32,32,32,32,36,36,36,36,0,0,42,42,42,42,46,46,46,46,0]), ([0,0,1,1,1,1,2,2,2,2,0,0,2,2,2,2,2,2,2,2,0,0,7,7,7,7,7,7,7,7,0,0,7,7,7,7,7,7,7,7,0,0,135,135,135,135,135,135,135,135,0]), ([0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,2,2,2,2,0,0,0,0,0,0,1,1,1,1,0,0,2,2,2,2,3,3,3,3,0,0,0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,2,2,2,2,0,0,0,0,0,0,1,1,1,1,0,0,2,2,2,2,3,3,3,3,0,0,2,2,2,2,3,3,3,3,0]), ([0,0,0,0,0,0,6,6,6,6,10,10,10,10,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,37,37,37,37,41,41,41,41,0,0,47,47,47,47]), ([7,7,7,7,0,0,135,135,135,135,135,135,135,135,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,7,7,7,7,7,7,7,7,0,0,7,7,7,7]), ([0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,2,2,2,2,0,0,3,3,3,3,0,0,0,0,0,0,2,2,2,2,3,3,3,3,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,2,2,2,2,0,0,3,3,3,3]))
|
||||
|
||||
# 3GPP TS 45.002 version 15.1.0 Release 15
|
||||
# Table 3 : Mapping of logical channels onto physical channels (see subclauses 6.3, 6.4, 6.5)
|
||||
#
|
||||
# BCCH Norm D 0,2,4,6 C0 NB 51 B(2..5)
|
||||
# SDCCH/4 0 D 0 C0 NB1 51 B(22..25)
|
||||
# U B(37..40)
|
||||
# 1 D B(26..29)
|
||||
# U B(41..44)
|
||||
# 2 D B(32..35)
|
||||
# U B(47..50)
|
||||
# 3 D B(36..39)
|
||||
# U B(0..3)
|
||||
# SACCH/C4 0 D 0 C0 NB3 102 B(42..45)
|
||||
# U B(57..60)
|
||||
# 1 D B(46..49)
|
||||
# U B(61..64)
|
||||
# 2 D B(93..96)
|
||||
# U B(6..9)
|
||||
# 3 D B(97..100)
|
||||
# U B(10..13)
|
||||
#
|
||||
# Figure 8b: TDMA frame mapping for FCCH + SCH + BCCH + CCCH + SDCCH/4(0...3) + SACCH/4(0...3)
|
||||
#
|
||||
self.gsm_universal_ctrl_chans_demapper_0 = grgsm.universal_ctrl_chans_demapper(
|
||||
timeslot_nr, ([ #downlink
|
||||
0,0,
|
||||
2,2,2,2,
|
||||
6,6,6,6,
|
||||
0,0,
|
||||
12,12,12,12,
|
||||
16,16,16,16,
|
||||
0,0,
|
||||
22,22,22,22,
|
||||
26,26,26,26,
|
||||
0,0,
|
||||
32,32,32,32,
|
||||
36,36,36,36,
|
||||
0,0,
|
||||
42,42,42,42,
|
||||
46,46,46,46,
|
||||
0,
|
||||
]), ([
|
||||
0,0,
|
||||
1,1,1,1,
|
||||
2,2,2,2,
|
||||
0,0,
|
||||
2,2,2,2,
|
||||
2,2,2,2,
|
||||
0,0,
|
||||
7,7,7,7,
|
||||
7,7,7,7,
|
||||
0,0,
|
||||
7,7,7,7,
|
||||
7,7,7,7,
|
||||
0,0,
|
||||
135,135,135,135,
|
||||
135,135,135,135,
|
||||
0,
|
||||
]), ([
|
||||
0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,
|
||||
1,1,1,1,
|
||||
2,2,2,2,
|
||||
0,0,
|
||||
0,0,0,0,
|
||||
1,1,1,1,
|
||||
0,0,
|
||||
2,2,2,2,
|
||||
3,3,3,3,
|
||||
0,0,
|
||||
0,0,0,0,
|
||||
1,1,1,1,
|
||||
0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,
|
||||
0,
|
||||
1,1,1,1,
|
||||
2,2,2,2,
|
||||
0,0,
|
||||
0,0,0,0,
|
||||
1,1,1,1,
|
||||
0,0,
|
||||
2,2,2,2,
|
||||
3,3,3,3,
|
||||
0,0,
|
||||
2,2,2,2,
|
||||
3,3,3,3,
|
||||
0,
|
||||
]), ([ #uplink
|
||||
0,0,0,0,
|
||||
4,5,
|
||||
6,6,6,6,
|
||||
10,10,10,10,
|
||||
14,15,16,17,
|
||||
18,19,20,21,
|
||||
22,23,24,25,
|
||||
26,27,28,29,
|
||||
30,31,32,33,
|
||||
34,35,36,
|
||||
37,37,37,37,
|
||||
41,41,41,41,
|
||||
45,46,
|
||||
47,47,47,47,
|
||||
]), ([
|
||||
7,7,7,7,
|
||||
3,3,
|
||||
135,135,135,135,
|
||||
135,135,135,135,
|
||||
3,3,3,3,
|
||||
3,3,3,3,
|
||||
3,3,3,3,
|
||||
3,3,3,3,
|
||||
3,3,3,3,
|
||||
3,3,
|
||||
3,
|
||||
7,7,7,7,
|
||||
7,7,7,7,
|
||||
3,3,
|
||||
7,7,7,7,
|
||||
]), ([
|
||||
3,3,3,3,
|
||||
0,0,
|
||||
2,2,2,2,
|
||||
3,3,3,3,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,
|
||||
0,
|
||||
0,0,0,0,
|
||||
1,1,1,1,
|
||||
0,0,
|
||||
2,2,2,2,
|
||||
3,3,3,3,
|
||||
0,0,
|
||||
0,0,0,0,
|
||||
1,1,1,1,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,
|
||||
0,
|
||||
0,0,0,0,
|
||||
1,1,1,1,
|
||||
0,0,
|
||||
2,2,2,2,
|
||||
]))
|
||||
|
||||
##################################################
|
||||
# Connections
|
||||
|
|
|
@ -123,7 +123,6 @@ class qa_gsm_bcch_ccch_demapper (gr_unittest.TestCase):
|
|||
0, 0, 0, 0, #BCCH
|
||||
], list(dst.get_sub_slots()))
|
||||
|
||||
@unittest.expectedFailure
|
||||
def test_uplink (self):
|
||||
"""
|
||||
BCCH_CCCH demapper uplink test
|
||||
|
|
|
@ -123,7 +123,6 @@ class qa_bcch_ccch_sdcch4_demapper (gr_unittest.TestCase):
|
|||
0, 0, 0, 0, #BCCH
|
||||
], list(dst.get_sub_slots()))
|
||||
|
||||
@unittest.expectedFailure
|
||||
def test_uplink (self):
|
||||
"""
|
||||
BCCH_CCCH_SDCCH4 demapper uplink test
|
||||
|
|
Loading…
Reference in New Issue