285 lines
6.6 KiB
C
285 lines
6.6 KiB
C
/* GMR-1 A5 Ciphering algorithm */
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/*
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* Full reimplementation of GMR-1 A5/1
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*
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* The logic behind the algorithm has been reverse engineered from a
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* Thuraya phone DSP. Thanks to Benedikt Driessen, Ralf Hund,
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* Carsten Willems, Christof Paar, and Thorsten Holz for their work
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* on this. See their paper for more details on how it was done.
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*/
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/* (C) 2011-2019 by Sylvain Munaut <tnt@246tNt.com>
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU Affero General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Affero General Public License for more details.
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*
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* You should have received a copy of the GNU Affero General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*! \addtogroup a5
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* @{
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*/
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/*! \file l1/a5.c
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* \brief Osmocom GMR-1 A5 ciphering algorithm implementation
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*/
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#include <string.h>
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#include <stdint.h>
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#include <osmocom/core/bits.h>
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#include <osmocom/gmr1/l1/a5.h>
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/*! \brief Main method to generate a A5/x cipher stream
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* \param[in] n Which A5/x method to use
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* \param[in] key 8 byte array for the key (as received from the SIM)
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* \param[in] fn Frame number
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* \param[in] nbits How many bits to generate
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* \param[out] dl Pointer to array of ubits to return Downlink cipher stream
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* \param[out] ul Pointer to array of ubits to return Uplink cipher stream
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*
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* Currently only A5/0 and A5/1.
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* Either (or both) of dl/ul can be NULL if not needed.
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*/
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void
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gmr1_a5(int n, uint8_t *key, uint32_t fn, int nbits,
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ubit_t *dl, ubit_t *ul)
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{
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switch (n)
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{
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case 0:
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if (dl)
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memset(dl, 0x00, nbits);
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if (ul)
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memset(ul, 0x00, nbits);
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break;
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case 1:
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gmr1_a5_1(key, fn, nbits, dl, ul);
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break;
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default:
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/* a5/[2...7] not supported/existent */
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break;
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};
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}
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/*! \brief Computes parity of a 32-bit word
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* \param[in] x 32 bit word
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* \return Parity bit (xor of all bits) as 0 or 1
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*/
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static inline uint32_t
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_a5_parity(uint32_t x)
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{
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x ^= x >> 16;
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x ^= x >> 8;
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x ^= x >> 4;
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x &= 0xf;
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return (0x6996 >> x) & 1;
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}
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/*! \brief Compute majority bit from 3 taps
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* \param[in] v1 LFSR state ANDed with tap-bit
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* \param[in] v2 LFSR state ANDed with tap-bit
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* \param[in] v3 LFSR state ANDed with tap-bit
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* \return The majority bit (0 or 1)
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*/
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static inline uint32_t
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_a5_majority(uint32_t v1, uint32_t v2, uint32_t v3)
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{
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return (!!v1 + !!v2 + !!v3) >= 2;
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}
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/*! \brief Compute the next LFSR state
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* \param[in] r Current state
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* \param[in] mask LFSR mask
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* \param[in] taps LFSR taps
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* \return Next state
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*/
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static inline uint32_t
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_a5_clock(uint32_t r, uint32_t mask, uint32_t taps)
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{
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return ((r << 1) & mask) | _a5_parity(r & taps);
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}
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#define A51_R1_LEN 19
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#define A51_R2_LEN 22
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#define A51_R3_LEN 23
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#define A51_R4_LEN 17
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#define A51_R1_MASK ((1<<A51_R1_LEN)-1)
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#define A51_R2_MASK ((1<<A51_R2_LEN)-1)
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#define A51_R3_MASK ((1<<A51_R3_LEN)-1)
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#define A51_R4_MASK ((1<<A51_R4_LEN)-1)
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#define A51_R1_TAPS 0x072000 /* x^19 + x^18 + x^17 + x^14 + 1 */
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#define A51_R2_TAPS 0x311000 /* x^22 + x^21 + x^17 + x^13 + 1 */
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#define A51_R3_TAPS 0x660000 /* x^23 + x^22 + x^19 + x^18 + 1 */
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#define A51_R4_TAPS 0x013100 /* x^17 + x^14 + x^13 + x^9 + 1 */
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#define A51_BIT(r,n) (1 << n)
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/*! \brief GMR1-A5/1: Set the high bits of all register states
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* \param[in] r Register states
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*/
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static inline void
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_a5_1_set_bits(uint32_t *r)
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{
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r[0] |= 1;
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r[1] |= 1;
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r[2] |= 1;
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r[3] |= 1;
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}
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/*! \brief GMR1-A5/1: Force clocking of all registers
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* \param[in] r Register states
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*/
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static inline void
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_a5_1_clock_force(uint32_t *r)
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{
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r[0] = _a5_clock(r[0], A51_R1_MASK, A51_R1_TAPS);
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r[1] = _a5_clock(r[1], A51_R2_MASK, A51_R2_TAPS);
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r[2] = _a5_clock(r[2], A51_R3_MASK, A51_R3_TAPS);
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r[3] = _a5_clock(r[3], A51_R4_MASK, A51_R4_TAPS);
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}
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/*! \brief GMR1-A5/1: Clock all registers according to clocking rule
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* \param[in] r Register states
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*/
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static inline void
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_a5_1_clock(uint32_t *r)
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{
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int cb[3], m;
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cb[0] = !!(r[3] & A51_BIT(R4, 15));
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cb[1] = !!(r[3] & A51_BIT(R4, 6));
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cb[2] = !!(r[3] & A51_BIT(R4, 1));
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m = (cb[0] + cb[1] + cb[2]) >= 2;
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if (cb[0] == m)
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r[0] = _a5_clock(r[0], A51_R1_MASK, A51_R1_TAPS);
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if (cb[1] == m)
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r[1] = _a5_clock(r[1], A51_R2_MASK, A51_R2_TAPS);
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if (cb[2] == m)
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r[2] = _a5_clock(r[2], A51_R3_MASK, A51_R3_TAPS);
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r[3] = _a5_clock(r[3], A51_R4_MASK, A51_R4_TAPS);
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}
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/*! \brief GMR1-A5/1: Generate the output bit from register states
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* \param[in] r Register states
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* \return The output bit
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*/
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static inline ubit_t
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_a5_1_output(uint32_t *r)
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{
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int m[3];
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#define MAJ(rnum, rname, a, b, c) \
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m[rnum] = _a5_majority( \
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r[rnum] & A51_BIT(rname, a), \
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r[rnum] & A51_BIT(rname, b), \
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r[rnum] & A51_BIT(rname, c) \
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);
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MAJ(0, R1, 1, 6, 15);
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MAJ(1, R2, 3, 8, 14);
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MAJ(2, R3, 4, 15, 19);
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#undef MAJ
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m[0] ^= !!(r[0] & A51_BIT(R1, 11));
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m[1] ^= !!(r[1] & A51_BIT(R2, 1));
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m[2] ^= !!(r[2] & A51_BIT(R3, 0));
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return m[0] ^ m[1] ^ m[2];
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}
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/*! \brief Generate a GMR-1 A5/1 cipher stream
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* \param[in] key 8 byte array for the key (as received from the SIM)
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* \param[in] fn Frame number
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* \param[in] nbits How many bits to generate
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* \param[out] dl Pointer to array of ubits to return Downlink cipher stream
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* \param[out] ul Pointer to array of ubits to return Uplink cipher stream
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*
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* Either (or both) of dl/ul can be NULL if not needed.
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*/
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void
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gmr1_a5_1(uint8_t *key, uint32_t fn, int nbits, ubit_t *dl, ubit_t *ul)
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{
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uint32_t r[4];
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uint8_t lkey[8];
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int i;
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/* Reorganize the key */
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for (i=0; i<8; i++)
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lkey[i] = key[i ^ 1];
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/* Mix-in frame number */
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lkey[6] ^= (fn & 0x0000f) << 4; /* MFFN */
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lkey[3] ^= (fn & 0x00030) << 2; /* MultiFrame Number */
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lkey[1] ^= (fn & 0x007c0) >> 3; /* SuperFrame Number */
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lkey[0] ^= (fn & 0x0f800) >> 11; /* ... */
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lkey[0] ^= (fn & 0x70000) >> 11; /* ... */
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/* Init Rx */
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r[0] = r[1] = r[2] = r[3] = 0;
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/* Key mixing */
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for (i=0; i<64; i++) {
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int byte_idx = (i >> 3);
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int bit_idx = 7 - (i & 7);
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uint32_t b = (lkey[byte_idx] >> bit_idx) & 1;
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_a5_1_clock_force(r);
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r[0] ^= b;
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r[1] ^= b;
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r[2] ^= b;
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r[3] ^= b;
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}
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/* Set high bits */
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_a5_1_set_bits(r);
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/* Mixing */
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for (i=0; i<250; i++)
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_a5_1_clock(r);
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/* DL Output */
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for (i=0; i<nbits; i++) {
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_a5_1_clock(r);
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if (dl)
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dl[i] = _a5_1_output(r);
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}
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/* UL Output */
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if (!ul)
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return;
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for (i=0; i<nbits; i++) {
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_a5_1_clock(r);
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ul[i] = _a5_1_output(r);
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}
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}
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/*! @} */
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