253 lines
8.5 KiB
C
253 lines
8.5 KiB
C
/************************************************************************/
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/* */
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/* (C) 1993 BinTec Computersysteme */
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/* All Rights Reserved */
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/* */
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/************************************************************************/
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#ifdef __linux__
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#define far
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#endif
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/************************************************************************
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==================================================
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= BIANCA-BRI, BRI-4 ISDN adapter for AT-BUS =
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==================================================
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memory layout,
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all shorts are motorola format, and have to be swapped to intel format
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16 KByte shared memory
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+---------------+
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| 0x0008 | 8 KByte rcv buffer
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~ ~
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|---------------|
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| 0x2000 | 8 KByte snd buffer
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~ ~
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|---------------|
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| 0x3ff0 | size of rcv buffer
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| 0x3ff2 | write index rcv buffer
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| 0x3ff4 | read index rcv buffer
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|---------------|
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| 0x3ff6 | size of snd buffer
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| 0x3ff8 | write index snd buffer
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| 0x3ffa | read index snd buffer
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|---------------|
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| 0x3ffc | state register
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| 0x3ffd | debug register
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| 0x3ffe | control register
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+---------------+
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state register (BRI, BRI-4)
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+-------+--------------------+----------------------------------+
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| BIT | READ | WRITE |
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+-------+--------------------+----------------------------------+
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| 0 | | 1 -> gen interrupt if 680x0 CPU |
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| | | has filled rcv buffer with |
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| | | data |
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+-------+--------------------+----------------------------------+
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| 1 | | 1 -> gen interrupt if 680x0 CPU |
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| | | has read data from snd |
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| | | buffer |
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+-------+--------------------+----------------------------------+
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| 7 | 1 -> hardware | |
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| | failure | |
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+-------+--------------------+----------------------------------+
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control register (BRI, BRI-4)
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+-------+--------------------+----------------------------------+
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| BIT | READ | WRITE |
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+-------+--------------------+----------------------------------+
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| 0 | 1 -> interrupt to | 0 -> disable interrupts |
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| | host pending | 1 -> enable interrupts |
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+-------+--------------------+----------------------------------+
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| 1 | 0 -> CPU in reset | 0 -> reset CPU |
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+-------+--------------------+----------------------------------+
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| 2 | 0 -> CPU in halt | 0 -> halt CPU |
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| | 1 -> CPU run | 1 -> run CPU |
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+-------+--------------------+----------------------------------+
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| 3 | | 1 -> enable cpu cache |
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+-------+--------------------+----------------------------------+
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| 4 | | 1 -> interrupt to 680x0 to read |
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| | | shared memory |
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+-------+--------------------+----------------------------------+
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| 7-5 | 0 -> BRI-4 | |
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| | 1 -> X21 | |
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| | 2 -> BRI | |
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+-------+-------------------------------------------------------+
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==================================================
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= BIANCA-PMX S2M ISDN adapter for AT-BUS =
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==================================================
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memory layout,
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all shorts are motorola format, and have to be swapped to intel format
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64 KByte shared memory
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+---------------+
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| 0x0008 | 8 KByte rcv buffer
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~ ~
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|---------------|
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| 0x2000 | 8 KByte snd buffer
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~ ~
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|---------------|
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| 0x3ff0 | size of rcv buffer
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| 0x3ff2 | write index rcv buffer
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| 0x3ff4 | read index rcv buffer
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|---------------|
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| 0x3ff6 | size of snd buffer
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| 0x3ff8 | write index snd buffer
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| 0x3ffa | read index snd buffer
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|---------------|
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| 0x3ffc | state register
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| 0x3ffd | debug register
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~ ~
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~ ~
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| 0xfffe | control register
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+---------------+
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state register
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+-------+--------------------+----------------------------------+
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| BIT | READ | WRITE |
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+-------+--------------------+----------------------------------+
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| 0 | | 1 -> gen interrupt if 68040 CPU |
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| | | has filled rcv buffer with |
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| | | data |
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+-------+--------------------+----------------------------------+
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| 1 | | 1 -> gen interrupt if 68040 CPU |
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| | | has read data from snd |
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| | | buffer |
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+-------+--------------------+----------------------------------+
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| 7 | 1 -> hardware | |
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| | failure | |
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+-------+--------------------+----------------------------------+
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control register
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+-------+--------------------+----------------------------------+
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| BIT | READ | WRITE |
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+-------+--------------------+----------------------------------+
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| 0 | | |
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| | | 1 -> run CPU |
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+-------+--------------------+----------------------------------+
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| 1 | | |
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| | | 1 -> run CPU |
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+-------+--------------------+----------------------------------+
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*************************************************************************/
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#ifndef __BRI_H
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#define __BRI_H
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/* static char _sccsid_bri_h[] = "@(#)bri.h 1.20"; */
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/*----------------------------------------------------------------------*/
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/* MACRO-DEFINES */
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/*----------------------------------------------------------------------*/
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#define CTRL_ENABLE(bp) if ((bp)->type != BOARD_ID_PMX) \
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(*(bp)->ctrl = (bp)->cflag = 0xf)
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#define CTRL_DISABLE(bp) if ((bp)->type != BOARD_ID_PMX) \
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(*(bp)->ctrl = (bp)->cflag = 0xe)
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#define CTRL_SET(bp,val) (*(bp)->ctrl = (bp)->cflag = (val))
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#define STATE_SET(bp,val) (*(bp)->state = (val))
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#define CTRL_RESET(bp) reset_card(bp)
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/* #define BOARD_TYPE(bp) (*(bp)->ctrl >> 5) */
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#define BOARD_TYPE(bp) ((bp)->type)
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#define BOARD_ID_BRI4 0 /* Quattro 4 S0 */
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#define BOARD_ID_X21 1 /* X21 adapter */
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#define BOARD_ID_BRI 2 /* BRI */
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#define BOARD_ID_PMX 7 /* S2M */
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#define BOARD_BOOTLOADER "BOOT.68K"
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#define BOARD_SYS_BRI4 "BRI_Q.68K"
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#define BOARD_SYS_BRI "BRI.68K"
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#define BOARD_SYS_X21 "X21.68K"
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#define BOARD_SYS_PMX "PMX.68K"
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/*----------------------------------------------------------------------*/
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/* GLOBAL DEFINES */
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/*----------------------------------------------------------------------*/
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#define IO_8259A_1 0x20 /* IO addr of first 8259A */
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#define IO_8259A_2 0xa0 /* IO addr of second 8259A */
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#define OCW2_8259_EOI 0x20 /* end of interrupt command */
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#define APIINIT_IDENT "Here is what I'am searching for"
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#define API_BOSSCOM_ID 1
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/*----------------------------------------------------------------------*/
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/* DATA STRUCTURES */
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/*----------------------------------------------------------------------*/
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typedef struct {
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unsigned short sz; /* size of buffer */
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unsigned short wi; /* write index */
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unsigned short ri; /* read index */
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} icinfo_t;
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typedef struct {
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volatile unsigned char far *p; /* pointer to buffer */
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volatile icinfo_t far *d; /* buffer information */
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} intercom_t;
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#if 0
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typedef struct {
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unsigned addr; /* address of shared memory */
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unsigned char hwInt; /* intr */
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volatile unsigned char far *base; /* base address of shared memory */
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volatile unsigned char far *state; /* state flag */
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volatile unsigned char far *debug; /* debug output */
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volatile unsigned char far *ctrl; /* address of control register */
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intercom_t rcv; /* incoming intercom buffer */
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intercom_t snd; /* outgoing intercom buffer */
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int cflag; /* control flag */
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unsigned long ctrlmask; /* controller bitmask */
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unsigned char type; /* board type */
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} board_t;
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typedef struct {
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char section[512];
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char drvpath[512];
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char ctrl;
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char type;
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} bd_t;
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typedef struct {
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unsigned short board; /* board */
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unsigned short ctrl; /* controller number */
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char profile[32]; /* profile to load */
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char bindaddr[32]; /* login ident */
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unsigned short tei; /* static TEI, or -1 if dynamic */
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unsigned short disc_d; /* time to hold d-channel layer 2 */
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unsigned short permlink; /* permanent hold d-channel lay 2 */
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unsigned long flags;
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char spid1[20]; /* service point identifier (NI-1) */
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char spid2[20]; /* service point identifier (NI-1) */
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char telno1[32]; /* own telno */
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char telno2[32]; /* own telno */
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} bdcfg_t;
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#endif
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#endif
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