migrate to osmo-e1-hardware.git

Change-Id: I910fe21c42a169e198cdd9340032920f0628a583
This commit is contained in:
Harald Welte 2020-09-04 15:43:12 +02:00
parent 71768e51c8
commit 0f58fbe677
74 changed files with 3 additions and 131019 deletions

50
README
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@ -1,47 +1,3 @@
osmo-e1-hradware - Collection of various E1/TDM hardware projects
======================================================================
This repository hosts three different sub-projects:
* osmo-e1-xcvr (E1 LIU + magnetics)
https://osmocom.org/projects/e1-t1-adapter/wiki/Osmo-e1-xcvr
* osmo-e1-tracer (fully integrated passive raw bitstream tracer)
https://osmocom.org/projects/e1-t1-adapter/wiki/E1_tracer
* osmo-e1-tap (passive high-impedance tap)
== osmo-e1-xcvr ==
This is a simple hardware project that aims to generate a reusable module
for interfacing E1/T1/J1 lines from various custom FPGA/CPLD/microcontroller
projects.
The board contains tranformers, the analog circuitry, the LIU (line interface
unit), an oscillator as well as an integrated transceiver chip.
It exposes the control interface (SPI) as well as the decoded synchronous
Rx/Tx bitstreams each on a 2x5pin header.
Framer, Multiplexe,r HDLC decoder or anything like that is out-of-scope for
now. The idea relaly is to provide an interface as low-level as possible.
One of the ideas is to create a "soft E1" interface, where the Rx/Tx bitstreams
are interfaced with the SSC of an AT91SAM3S and subsequently passed into a PC
via USB. The 2Mbps signal is very low-bandwidth, so that a pure software
implementation should be absolutely no problem for todays computing power.
See https://osmocom.org/projects/e1-t1-adapter/wiki/Osmo-e1-xcvr for more details
== osmo-e1-tap ==
This is a small passive board that allows you to perform high-impedance tracing on an E1
or T1 line.
== osmo-e1-tracer ==
This is a fully integrated design that allows you to obtainm bi-directional high-impedance
bitstream E1 traces. It features an iCE40 FPGA with USB + E1 cores from Sylvain Munaut,
as well as two E1 LIUs.
See https://osmocom.org/projects/e1-t1-adapter/wiki/E1_tracer for more details.
The contents of this repository has moved to osmo-e1-harware.git,
see https://git.osmocom.org/osmo-e1-hardware/ or its public
mirror at https://github.com/osmocom/osmo-e1-hardware

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#!/bin/sh
cat e1tracer-bootloader-20200822.bin 1M0xff.bin > tmp
dd if=tmp of=flashme1M.bin bs=1024 count=1024
rm tmp
flashrom -p serprog:dev=/dev/ttyACM3:4000000 -w flashme1M.bin

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#!/bin/sh
dfu-util -d 1d50:6150 -c 1 -a 0 -D riscv_usb.bin
dfu-util -d 1d50:6150 -c 1 -a 1 -D fw_app.bin -R

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Generated by EAGLE CAM Processor 6.2.0
Drill Station Info File: /home/eagle/eagle/e1_tap/gerber/e1_tap.dri
Date : 21 Jul 2012 18:01:50
Drills : /home/eagle/eagle/e1_tap/gerber/e1_tap.drl
Device : Excellon drill station with user supplied rack file
Parameter settings:
Tolerance Drill + : 3.00 %
Tolerance Drill - : 3.00 %
Rotate : no
Mirror : no
Optimize : yes
Auto fit : yes
OffsetX : 0inch
OffsetY : 0inch
Layers : Drills Holes
Drill File Info:
Data Mode : Absolute
Units : 1/10000 Inch
Drill Tolerances:
-- Requested -- -- Used Drill --
Size used Code Size
35.000mil 32 T03 0.890mm
128.000mil 4 T04 3.250mm
24.000mil 2 T01 0.610mm
Drills used:
Code Size used
T01 0.610mm 2
T02 0.800mm 24
T03 0.890mm 32
T04 3.250mm 4
Total number of drills: 62
Plotfiles:
/home/eagle/eagle/e1_tap/gerber/e1_tap.txt

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T01 0.61mm
T02 0.80mm
T03 0.89mm
T04 3.25mm

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Generated by EAGLE CAM Processor 6.2.0
Photoplotter Info File: /home/eagle/eagle/e1_tap/gerber/e1_tap.gpi
Date : 21 Jul 2012 18:01:50
Plotfile : /home/eagle/eagle/e1_tap/gerber/e1_tap.gts
Apertures : generated:
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View File

@ -1,425 +0,0 @@
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D11*
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X006100Y013750D03*
X005600Y012750D03*
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X015100Y007750D03*
X016100Y007750D03*
X017100Y007750D03*
X016600Y006750D03*
X015600Y006750D03*
D12*
X017600Y004250D03*
X007600Y004250D03*
X012100Y016250D03*
X002100Y016250D03*
D13*
X002100Y006750D03*
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X002100Y004750D03*
X002100Y003750D03*
X002100Y002750D03*
X005100Y002750D03*
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D14*
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X002100Y001750D03*
D15*
X016265Y013250D03*
X016935Y013250D03*
X016935Y019250D03*
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D16*
X013600Y018085D03*
X013600Y017415D03*
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D17*
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M02*

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@ -1,68 +0,0 @@
%
T01
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T02
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X2100Y2750
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X2100Y5750
X2100Y6750
X5100Y6750
X5100Y5750
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X17600Y17750
X17600Y16750
X17600Y15750
X17600Y14750
X17600Y13750
T03
X17100Y7750
X16100Y7750
X15100Y7750
X14100Y7750
X13600Y6750
X14600Y6750
X15600Y6750
X16600Y6750
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X10600Y7750
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X8100Y6750
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X8100Y12750
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X9600Y13750
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X11600Y13750
X6100Y13750
X5100Y13750
X4100Y13750
X3100Y13750
X2600Y12750
X3600Y12750
X4600Y12750
X5600Y12750
T04
X2100Y16250
X12100Y16250
X7600Y4250
X17600Y4250
M30

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@ -1,42 +0,0 @@
,e1-tracer.sch,"2020-08-15 16:57:55",,"EAGLE Version 7.7.0 Copyright (c) 1988-2016 CadSoft",,,,,,
Qty,Name,Value,Package,Class,Supplier,"Part Number",URL,Description,Populated,Beistellung
19,"C1, C2, C3, C4, C5, C6, C7, C11, C16, C17, C18, C19, C20, C21, C22, C23, C24, C29, C30",100n,_0603,CAPACITOR,DIGIKEY,1276-1005-1-ND,http://www.digikey.de/product-detail/de/foo/1276-1005-1-ND,"CAP CER 0.1UF 16V 10% X7R 0603",TRUE,
4,"C8, C9, C10, C12",1u,_0603,CAPACITOR,DIGIKEY,1276-1182-1-ND,https://www.digikey.de/product-detail/de/samsung-electro-mechanics/CL10A105KP8NNNC/1276-1182-1-ND/3889268,"CAP CER 1UF 10V X5R 0603",TRUE,
2,"C13, C15",22u,1206,CAPACITOR,DIGIKEY,1276-1287-1-ND,http://www.digikey.de/product-detail/de/foo/1276-1287-1-ND,"CAP CER 22UF 10V 10% X5R 1206",TRUE,
1,C14,10n,_0402,CAPACITOR,DIGIKEY,1276-1057-1-ND,https://www.digikey.de/product-detail/de/samsung-electro-mechanics/CL05B103KA5NNNC/1276-1057-1-ND/3889143,"CAP CER 10000PF 25V X7R 0402",TRUE,
4,"C25, C26, C27, C28",22u,_0805,CAPACITOR,DIGIKEY,399-4696-1-ND,https://www.digikey.de/product-detail/de/kemet/C0805C226M9PACTU/399-4696-1-ND,"CAP CER 22UF 6.3V X5R 0805",TRUE,
1,CDONE,BLUE,CHIPLED_0603,LED,DIGIKEY,160-1827-1-ND,https://www.digikey.de/product-detail/de/lite-on-inc/LTST-C193TBKT-5A/160-1827-1-ND,"LED BLUE CLEAR CHIP SMD",TRUE,
1,LED1,,RGBLED_PLCC4,LED,DIGIKEY,365-1561-2-ND,https://www.digikey.de/product-detail/de/tt-electronics-optek-technology/OVSARGB4R8/365-1561-2-ND,"LED RGB DIFFUSED 4PLCC SMD",TRUE,
2,"LOS1, LOS2",LEDPLCC2-MIN-red,PLCC2-MIN,LED,DIGIKEY,475-2683-1-ND,https://www.digikey.de/product-detail/de/osram-opto-semiconductors-inc/LS-T676-R1S1-1-Z/475-2683-1-ND,"LED RED CLEAR 2PLCC SMD",TRUE,
1,PWR,LEDPLCC2-MIN-green,PLCC2-MIN,LED,DIGIKEY,511-1645-1-ND,https://www.digikey.de/product-detail/de/rohm-semiconductor/SML-Z14PTT86A/511-1645-1-ND,"LED GREEN CLEAR 2PLCC SMD",TRUE,
8,"D1, D2, D3, D4, D5, D6, D7, D8",MBR0540T1,SOD123,DIODE,DIGIKEY,MBR0540T1GOSCT-ND,https://www.digikey.de/product-detail/de/on-semiconductor/MBR0540T1G/MBR0540T1GOSCT-ND,"DIODE SCHOTTKY 40V 500MA SOD123",TRUE,
1,IC1,MCP1703T-1202E/CB,SOT23-3,IC,DIGIKEY,MCP1703T-1202E/CBCT-ND,https://www.digikey.de/product-detail/de/microchip-technology/MCP1703T-1202E-CB/MCP1703T-1202E-CBCT-ND/1994670,"IC REG LIN 1.2V 200MA SOT23A-3",TRUE,
1,IC2,W25Q80DVSNIG,SO08COMBINED,IC,DIGIKEY,W25Q80DVSNIG-ND,https://www.digikey.de/product-detail/de/winbond-electronics/W25Q80DVSNIG/W25Q80DVSNIG-ND,"IC FLASH 8M SPI 104MHZ 8SOIC",TRUE,
1,IC3,TLV70233DBVR,SOT23-DBV,IC,DIGIKEY,296-32415-1-ND,https://www.digikey.de/product-detail/de/texas-instruments/TLV70233DBVR/296-32415-1-ND,"IC REG LINEAR 3.3V 300MA SOT23-5",TRUE,
1,U1,ICE40UP5K-SG48I,QFN48,IC,DIGIKEY,220-2212-1-ND,https://www.digikey.de/product-detail/de/lattice-semiconductor-corporation/ICE40UP5K-SG48I/220-2212-1-ND/,"IC FPGA 39 I/O 48QFN",TRUE,
2,"U2, U3",IP4234CZ6,TSOP-6,IC,DIGIKEY,1727-4717-1-ND,https://www.digikey.de/product-detail/de/nexperia-usa-inc/IP4234CZ6125/1727-4717-1-ND/2531156,"TVS DIODE 5.5V 6TSOP",TRUE,
2,"U4, U5",IDT82V2081,TQFP44,IC,DIGIKEY,800-2347-ND,https://www.digikey.de/product-detail/de/renesas-electronics-america-inc/82V2081PPG/800-2347-ND,"IC TELECOM INTERFACE 44TQFP",TRUE,
1,IC4,ASEM1-12.000MHZ-LC-T,TSX-3225,"IC / XTAL / XO",DIGIKEY,535-9757-1-ND,https://www.digikey.de/product-detail/de/abracon-llc/ASEM1-12-000MHZ-LC-T/535-9757-1-ND,"MEMS OSC XO 12.0000MHZ CMOS SMD",TRUE,
1,U6,"2.048 Mhz",HC73,"IC / XTAL / XO",DIGIKEY,631-1182-ND,https://www.digikey.de/product-detail/de/renesas-electronics-america-inc/XLH736002-048000I/631-1182-ND,"XTAL OSC XO 2.0480MHZ HCMOS SMD",TRUE,
1,U7,"1.544 MHz",HC73,"IC / XTAL / XO","UNKNOWN SOURCE","UNKNOWN SOURCE PART NUMBER","UNKNOWN LINK","NO DESCRIPTION",FALSE,
1,J1,PASSTHROUGH,557560-1,CONNECTOR\JUMPER,DIGIKEY,A31449-ND,https://www.digikey.de/product-detail/de/te-connectivity-amp-connectors/5557560-1/A31449-ND,"CONN MOD JACK 8P8C R/A UNSHLD",TRUE,
1,JP1,,1X08_LOCK,CONNECTOR\JUMPER,"UNKNOWN SOURCE","UNKNOWN SOURCE PART NUMBER","UNKNOWN LINK","NO DESCRIPTION",TRUE,
1,L1,744231091,WE-CNSW_0805,INDUCTOR,DIGIKEY,732-3198-1-ND,https://www.digikey.de/product-detail/de/wurth-electronics-inc/744231091/732-3198-1-ND,"CMC 370MA 2LN 90 OHM SMD",TRUE,
2,"L2, L3",47nH,SM-1206,INDUCTOR,DIGIKEY,CE201210-47NJCT-ND,https://www.digikey.de/product-detail/de/bourns-inc/CE201210-47NJ/CE201210-47NJCT-ND/3438045,"FIXED IND 47NH 300MA 700MOHM SMD",TRUE,
2,"M1, M2",MENTOR_12701001,1270.1001,"LIGHT GUIDE","UNKNOWN SOURCE","UNKNOWN SOURCE PART NUMBER","UNKNOWN LINK","NO DESCRIPTION",TRUE,
1,R1,100R,_0603,RESISTOR,DIGIKEY,RMCF0603JT100RCT-ND,https://www.digikey.de/product-detail/de/stackpole-electronics-inc/RMCF0603JT100R/RMCF0603JT100RCT-ND,"RES 100 OHM 5%% 1/10W 0603",TRUE,
7,"R2, R3, R4, R5, R44, R45, R46",DNP,_0603,RESISTOR,DIGIKEY,P0.0GCT-ND,https://www.digikey.de/product-detail/de/panasonic-electronic-components/ERJ-3GEY0R00V/P0-0GCT-ND/134711,"RES SMD 0 OHM JUMPER 1/10W 0603",FALSE,
2,"R6, R7",33,_0402,RESISTOR,DIGIKEY,RMCF0603JT33R0CT-ND,https://www.digikey.de/product-detail/de/stackpole-electronics-inc/RMCF0603JT33R0/RMCF0603JT33R0CT-ND,"RES 33 OHM 5%% 1/10W 0603",TRUE,
23,"R8, R10, R13, R16, R17, R18, R19, R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, R30, R31, R32, R33, R36, R37",10k,_0603,RESISTOR,DIGIKEY,RMCF0603JT10K0CT-ND,https://www.digikey.de/product-detail/de/stackpole-electronics-inc/RMCF0603JT10K0/RMCF0603JT10K0CT-ND,"RES 10K OHM 5%% 1/10W 0603",TRUE,
1,R9,1k5,_0603,RESISTOR,DIGIKEY,RMCF0603JT1K50CT-ND,https://www.digikey.de/product-detail/de/stackpole-electronics-inc/RMCF0603JT1K50/RMCF0603JT1K50CT-ND,"RES 1.5K OHM 5%% 1/10W 0603",TRUE,
2,"R11, R12",100k,_0603,RESISTOR,DIGIKEY,311-100KGRCT-ND,https://www.digikey.de/product-detail/de/yageo/RC0603JR-07100KL/311-100KGRCT-ND/729645,"RES SMD 100K OHM 5%% 1/10W 0603",TRUE,
1,R14,2.2k,_0603,RESISTOR,DIGIKEY,RMCF0603JT2K20CT-ND,https://www.digikey.de/product-detail/de/stackpole-electronics-inc/RMCF0603JT2K20/RMCF0603JT2K20CT-ND,"RES 2.2K OHM 5%% 1/10W 0603",TRUE,
3,"R15, R40, R41",330,_0603,RESISTOR,DIGIKEY,311-330HRCT-ND,https://www.digikey.de/product-detail/de/yageo/RC0603FR-07330RL/311-330HRCT-ND,"RES SMD 330 OHM 1%% 1/10W 0603",TRUE,
2,"R34, R35","3k 1%",_0603,RESISTOR,DIGIKEY,RMCF0603FT3K00CT-ND,https://www.digikey.de/product-detail/de/stackpole-electronics-inc/RMCF0603FT3K00/RMCF0603FT3K00CT-ND,"RES 3K OHM 1%% 1/10W 0603",TRUE,
2,"R38, R39",120,_0603,RESISTOR,DIGIKEY,RMCF0603JT120RCT-ND,https://www.digikey.de/product-detail/de/stackpole-electronics-inc/RMCF0603JT120R/RMCF0603JT120RCT-ND,"RES 120 OHM 5%% 1/10W 0603",TRUE,
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2,"T1, T2",BC847C,SOT23-BEC,TRANSISTOR,DIGIKEY,1727-2924-1-ND,"https://www.digikey.de/product-detail/de/nexperia-usa-inc/BC847C,215/1727-2924-1-ND","TRANS NPN 45V 0.1A SOT23",TRUE,
2,"TR1, TR2",PULSE_T1094NL,PULSE_BH,TRANSFORMER,DIGIKEY,553-1449-ND,https://www.digikey.de/product-detail/de/pulse-electronics-network/T1094NL/553-1449-ND,"TRANSFORMER TELECOM DUAL T1/E2",TRUE,
1,X1,MINI-USB-SHIELD-UX60-MB-5ST,UX60-MB-5ST,CONNECTOR,DIGIKEY,H2961CT-ND,https://www.digikey.de/product-detail/de/hirose-electric-co-ltd/UX60A-MB-5ST/H2961CT-ND/597540,"CONN RCPT USB2.0 MINI B SMD R/A",TRUE,
1,X2,JACK2.5_SJ-2523,JACK2.5_SJ-2523,CONNECTOR,DIGIKEY,CP-2523SJCT-ND,https://www.digikey.de/product-detail/de/cui-inc/SJ-2523-SMT-TR/CP-2523SJCT-ND/669702,"CONN JACK STEREO 2.5MM SMD R/A",TRUE,
1 e1-tracer.sch 2020-08-15 16:57:55 EAGLE Version 7.7.0 Copyright (c) 1988-2016 CadSoft
2 Qty Name Value Package Class Supplier Part Number URL Description Populated Beistellung
3 19 C1, C2, C3, C4, C5, C6, C7, C11, C16, C17, C18, C19, C20, C21, C22, C23, C24, C29, C30 100n _0603 CAPACITOR DIGIKEY 1276-1005-1-ND http://www.digikey.de/product-detail/de/foo/1276-1005-1-ND CAP CER 0.1UF 16V 10% X7R 0603 TRUE
4 4 C8, C9, C10, C12 1u _0603 CAPACITOR DIGIKEY 1276-1182-1-ND https://www.digikey.de/product-detail/de/samsung-electro-mechanics/CL10A105KP8NNNC/1276-1182-1-ND/3889268 CAP CER 1UF 10V X5R 0603 TRUE
5 2 C13, C15 22u 1206 CAPACITOR DIGIKEY 1276-1287-1-ND http://www.digikey.de/product-detail/de/foo/1276-1287-1-ND CAP CER 22UF 10V 10% X5R 1206 TRUE
6 1 C14 10n _0402 CAPACITOR DIGIKEY 1276-1057-1-ND https://www.digikey.de/product-detail/de/samsung-electro-mechanics/CL05B103KA5NNNC/1276-1057-1-ND/3889143 CAP CER 10000PF 25V X7R 0402 TRUE
7 4 C25, C26, C27, C28 22u _0805 CAPACITOR DIGIKEY 399-4696-1-ND https://www.digikey.de/product-detail/de/kemet/C0805C226M9PACTU/399-4696-1-ND CAP CER 22UF 6.3V X5R 0805 TRUE
8 1 CDONE BLUE CHIPLED_0603 LED DIGIKEY 160-1827-1-ND https://www.digikey.de/product-detail/de/lite-on-inc/LTST-C193TBKT-5A/160-1827-1-ND LED BLUE CLEAR CHIP SMD TRUE
9 1 LED1 RGBLED_PLCC4 LED DIGIKEY 365-1561-2-ND https://www.digikey.de/product-detail/de/tt-electronics-optek-technology/OVSARGB4R8/365-1561-2-ND LED RGB DIFFUSED 4PLCC SMD TRUE
10 2 LOS1, LOS2 LEDPLCC2-MIN-red PLCC2-MIN LED DIGIKEY 475-2683-1-ND https://www.digikey.de/product-detail/de/osram-opto-semiconductors-inc/LS-T676-R1S1-1-Z/475-2683-1-ND LED RED CLEAR 2PLCC SMD TRUE
11 1 PWR LEDPLCC2-MIN-green PLCC2-MIN LED DIGIKEY 511-1645-1-ND https://www.digikey.de/product-detail/de/rohm-semiconductor/SML-Z14PTT86A/511-1645-1-ND LED GREEN CLEAR 2PLCC SMD TRUE
12 8 D1, D2, D3, D4, D5, D6, D7, D8 MBR0540T1 SOD123 DIODE DIGIKEY MBR0540T1GOSCT-ND https://www.digikey.de/product-detail/de/on-semiconductor/MBR0540T1G/MBR0540T1GOSCT-ND DIODE SCHOTTKY 40V 500MA SOD123 TRUE
13 1 IC1 MCP1703T-1202E/CB SOT23-3 IC DIGIKEY MCP1703T-1202E/CBCT-ND https://www.digikey.de/product-detail/de/microchip-technology/MCP1703T-1202E-CB/MCP1703T-1202E-CBCT-ND/1994670 IC REG LIN 1.2V 200MA SOT23A-3 TRUE
14 1 IC2 W25Q80DVSNIG SO08COMBINED IC DIGIKEY W25Q80DVSNIG-ND https://www.digikey.de/product-detail/de/winbond-electronics/W25Q80DVSNIG/W25Q80DVSNIG-ND IC FLASH 8M SPI 104MHZ 8SOIC TRUE
15 1 IC3 TLV70233DBVR SOT23-DBV IC DIGIKEY 296-32415-1-ND https://www.digikey.de/product-detail/de/texas-instruments/TLV70233DBVR/296-32415-1-ND IC REG LINEAR 3.3V 300MA SOT23-5 TRUE
16 1 U1 ICE40UP5K-SG48I QFN48 IC DIGIKEY 220-2212-1-ND https://www.digikey.de/product-detail/de/lattice-semiconductor-corporation/ICE40UP5K-SG48I/220-2212-1-ND/ IC FPGA 39 I/O 48QFN TRUE
17 2 U2, U3 IP4234CZ6 TSOP-6 IC DIGIKEY 1727-4717-1-ND https://www.digikey.de/product-detail/de/nexperia-usa-inc/IP4234CZ6125/1727-4717-1-ND/2531156 TVS DIODE 5.5V 6TSOP TRUE
18 2 U4, U5 IDT82V2081 TQFP44 IC DIGIKEY 800-2347-ND https://www.digikey.de/product-detail/de/renesas-electronics-america-inc/82V2081PPG/800-2347-ND IC TELECOM INTERFACE 44TQFP TRUE
19 1 IC4 ASEM1-12.000MHZ-LC-T TSX-3225 IC / XTAL / XO DIGIKEY 535-9757-1-ND https://www.digikey.de/product-detail/de/abracon-llc/ASEM1-12-000MHZ-LC-T/535-9757-1-ND MEMS OSC XO 12.0000MHZ CMOS SMD TRUE
20 1 U6 2.048 Mhz HC73 IC / XTAL / XO DIGIKEY 631-1182-ND https://www.digikey.de/product-detail/de/renesas-electronics-america-inc/XLH736002-048000I/631-1182-ND XTAL OSC XO 2.0480MHZ HCMOS SMD TRUE
21 1 U7 1.544 MHz HC73 IC / XTAL / XO UNKNOWN SOURCE UNKNOWN SOURCE PART NUMBER UNKNOWN LINK NO DESCRIPTION FALSE
22 1 J1 PASSTHROUGH 557560-1 CONNECTOR\JUMPER DIGIKEY A31449-ND https://www.digikey.de/product-detail/de/te-connectivity-amp-connectors/5557560-1/A31449-ND CONN MOD JACK 8P8C R/A UNSHLD TRUE
23 1 JP1 1X08_LOCK CONNECTOR\JUMPER UNKNOWN SOURCE UNKNOWN SOURCE PART NUMBER UNKNOWN LINK NO DESCRIPTION TRUE
24 1 L1 744231091 WE-CNSW_0805 INDUCTOR DIGIKEY 732-3198-1-ND https://www.digikey.de/product-detail/de/wurth-electronics-inc/744231091/732-3198-1-ND CMC 370MA 2LN 90 OHM SMD TRUE
25 2 L2, L3 47nH SM-1206 INDUCTOR DIGIKEY CE201210-47NJCT-ND https://www.digikey.de/product-detail/de/bourns-inc/CE201210-47NJ/CE201210-47NJCT-ND/3438045 FIXED IND 47NH 300MA 700MOHM SMD TRUE
26 2 M1, M2 MENTOR_12701001 1270.1001 LIGHT GUIDE UNKNOWN SOURCE UNKNOWN SOURCE PART NUMBER UNKNOWN LINK NO DESCRIPTION TRUE
27 1 R1 100R _0603 RESISTOR DIGIKEY RMCF0603JT100RCT-ND https://www.digikey.de/product-detail/de/stackpole-electronics-inc/RMCF0603JT100R/RMCF0603JT100RCT-ND RES 100 OHM 5%% 1/10W 0603 TRUE
28 7 R2, R3, R4, R5, R44, R45, R46 DNP _0603 RESISTOR DIGIKEY P0.0GCT-ND https://www.digikey.de/product-detail/de/panasonic-electronic-components/ERJ-3GEY0R00V/P0-0GCT-ND/134711 RES SMD 0 OHM JUMPER 1/10W 0603 FALSE
29 2 R6, R7 33 _0402 RESISTOR DIGIKEY RMCF0603JT33R0CT-ND https://www.digikey.de/product-detail/de/stackpole-electronics-inc/RMCF0603JT33R0/RMCF0603JT33R0CT-ND RES 33 OHM 5%% 1/10W 0603 TRUE
30 23 R8, R10, R13, R16, R17, R18, R19, R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, R30, R31, R32, R33, R36, R37 10k _0603 RESISTOR DIGIKEY RMCF0603JT10K0CT-ND https://www.digikey.de/product-detail/de/stackpole-electronics-inc/RMCF0603JT10K0/RMCF0603JT10K0CT-ND RES 10K OHM 5%% 1/10W 0603 TRUE
31 1 R9 1k5 _0603 RESISTOR DIGIKEY RMCF0603JT1K50CT-ND https://www.digikey.de/product-detail/de/stackpole-electronics-inc/RMCF0603JT1K50/RMCF0603JT1K50CT-ND RES 1.5K OHM 5%% 1/10W 0603 TRUE
32 2 R11, R12 100k _0603 RESISTOR DIGIKEY 311-100KGRCT-ND https://www.digikey.de/product-detail/de/yageo/RC0603JR-07100KL/311-100KGRCT-ND/729645 RES SMD 100K OHM 5%% 1/10W 0603 TRUE
33 1 R14 2.2k _0603 RESISTOR DIGIKEY RMCF0603JT2K20CT-ND https://www.digikey.de/product-detail/de/stackpole-electronics-inc/RMCF0603JT2K20/RMCF0603JT2K20CT-ND RES 2.2K OHM 5%% 1/10W 0603 TRUE
34 3 R15, R40, R41 330 _0603 RESISTOR DIGIKEY 311-330HRCT-ND https://www.digikey.de/product-detail/de/yageo/RC0603FR-07330RL/311-330HRCT-ND RES SMD 330 OHM 1%% 1/10W 0603 TRUE
35 2 R34, R35 3k 1% _0603 RESISTOR DIGIKEY RMCF0603FT3K00CT-ND https://www.digikey.de/product-detail/de/stackpole-electronics-inc/RMCF0603FT3K00/RMCF0603FT3K00CT-ND RES 3K OHM 1%% 1/10W 0603 TRUE
36 2 R38, R39 120 _0603 RESISTOR DIGIKEY RMCF0603JT120RCT-ND https://www.digikey.de/product-detail/de/stackpole-electronics-inc/RMCF0603JT120R/RMCF0603JT120RCT-ND RES 120 OHM 5%% 1/10W 0603 TRUE
37 2 R42, R43 1k _0603 RESISTOR DIGIKEY RMCF0603JT1K00CT-ND https://www.digikey.de/product-detail/de/stackpole-electronics-inc/RMCF0603JT1K00/RMCF0603JT1K00CT-ND/1943173 RES 1K OHM 5%% 1/10W 0603 TRUE
38 1 SW1 TACTSW-TL3340 TL3340-ORIG SWITCH DIGIKEY EG4627CT-ND https://www.digikey.de/product-detail/de/e-switch/TL3340AF160QG/EG4627CT-ND/1885974 SWITCH TACTILE SPST-NO 0.05A 12V TRUE
39 2 T1, T2 BC847C SOT23-BEC TRANSISTOR DIGIKEY 1727-2924-1-ND https://www.digikey.de/product-detail/de/nexperia-usa-inc/BC847C,215/1727-2924-1-ND TRANS NPN 45V 0.1A SOT23 TRUE
40 2 TR1, TR2 PULSE_T1094NL PULSE_BH TRANSFORMER DIGIKEY 553-1449-ND https://www.digikey.de/product-detail/de/pulse-electronics-network/T1094NL/553-1449-ND TRANSFORMER TELECOM DUAL T1/E2 TRUE
41 1 X1 MINI-USB-SHIELD-UX60-MB-5ST UX60-MB-5ST CONNECTOR DIGIKEY H2961CT-ND https://www.digikey.de/product-detail/de/hirose-electric-co-ltd/UX60A-MB-5ST/H2961CT-ND/597540 CONN RCPT USB2.0 MINI B SMD R/A TRUE
42 1 X2 JACK2.5_SJ-2523 JACK2.5_SJ-2523 CONNECTOR DIGIKEY CP-2523SJCT-ND https://www.digikey.de/product-detail/de/cui-inc/SJ-2523-SMT-TR/CP-2523SJCT-ND/669702 CONN JACK STEREO 2.5MM SMD R/A TRUE

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T02
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T03
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T05
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T06
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T07
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M30

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@ -1,44 +0,0 @@
Generated by EAGLE CAM Processor 7.7.0
Drill Station Info File: /home/msw/repos/osmo-e1-xcvr/hardware/eagle/e1-tracer.dri
Date : 8/30/20 6:51 PM
Drills : generated
Device : Excellon drill station, coordinate format 3.3 mm
Parameter settings:
Tolerance Drill + : 2.50 %
Tolerance Drill - : 2.50 %
Rotate : no
Mirror : no
Optimize : yes
Auto fit : yes
OffsetX : 0inch
OffsetY : 0inch
Layers : Drills Holes
Drill File Info:
Data Mode : Absolute
Units : 1/1000 MM
Drills used:
Code Size used
T01 0.3000mm 146
T02 0.3048mm 7
T03 0.8890mm 16
T04 0.9000mm 4
T05 1.0000mm 2
T06 1.0160mm 8
T07 2.4000mm 4
T08 3.2000mm 4
T09 3.2512mm 2
Total number of drills: 193
Plotfiles:
/home/msw/repos/osmo-e1-xcvr/hardware/eagle/e1-tracer.drd

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

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@ -1,70 +0,0 @@
Generated by EAGLE CAM Processor 7.7.0
Photoplotter Info File: /space/home/laforge/projects/git/osmo-e1-xcvr/hardware/eagle/gerber/e1-tracer.gpi
Date : 30.08.20 17:46
Plotfile : /space/home/laforge/projects/git/osmo-e1-xcvr/hardware/eagle/gerber/e1-tracer.gtl
Apertures : generated:
Device : Gerber RS-274-X photoplotter, coordinate format 2.5 inch
Parameter settings:
Emulate Apertures : no
Tolerance Draw + : 0.00 %
Tolerance Draw - : 0.00 %
Tolerance Flash + : 0.00 %
Tolerance Flash - : 0.00 %
Rotate : no
Mirror : no
Optimize : yes
Auto fit : yes
OffsetX : 0inch
OffsetY : 0inch
Plotfile Info:
Coordinate Format : 2.5
Coordinate Units : Inch
Data Mode : Absolute
Zero Suppression : None
End Of Block : *
Apertures used:
Code Shape Size used
D10 draw 0.0000inch 16
D11 draw 0.0100inch 225
D12 draw 0.0110inch 79
D13 draw 0.0094inch 152
D14 draw 0.0080inch 59
D15 draw 0.0189inch 12
D16 draw 0.0118inch 21
D17 draw 0.0136inch 4
D18 round 0.0525inch 16
D19 draw 0.0142inch 12
D20 draw 0.0197inch 12
D21 round 0.0472inch 4
D22 draw 0.0125inch 32
D23 draw 0.0600inch 1
D24 draw 0.0081inch 93
D25 draw 0.0354inch 8
D26 draw 0.0156inch 4
D27 square 0.0740inch 1
D28 round 0.0740inch 7
D29 draw 0.0295inch 6
D30 draw 0.0106inch 2
D31 draw 0.0089inch 2
D32 draw 0.0161inch 3
D33 draw 0.0108inch 5
D34 draw 0.0020inch 318
D35 draw 0.0160inch 7295
D36 round 0.0238inch 146
D37 draw 0.0320inch 31
D38 draw 0.0240inch 69
D39 draw 0.0120inch 216
D40 draw 0.0157inch 38
D41 draw 0.0236inch 7
D42 round 0.0240inch 7
D43 round 0.2165inch 4

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Partlist
Exported from e1_xcvr.sch at 24 Dec 2011 16:01:15
EAGLE Version 6.0.0 Copyright (c) 1988-2011 CadSoft
Assembly variant:
Part Value Device Package Library Sheet
C1 100nF C-EUC0603 C0603 rcl 1
C2 100nF C-EUC0603 C0603 rcl 1
C3 100nF C-EUC0603 C0603 rcl 1
C4 100nF C-EUC0603 C0603 rcl 1
C5 C-EUC0603 C0603 rcl 1
C6 100nF C-EUC0603 C0603 rcl 1
C7 100nF C-EUC0603 C0603 rcl 1
C8 1nF C-EUC0603 C0603 rcl 1
C9 68uF C-EUC1206K C1206K rcl 1
C10 68uF (NC) C-EUC1206K C1206K rcl 1
D1 MBR0540T1 D-FILL-SOD123 SOD123 semicon-smd-ipc 1
D2 MBR0540T1 D-FILL-SOD123 SOD123 semicon-smd-ipc 1
D3 MBR0540T1 D-FILL-SOD123 SOD123 semicon-smd-ipc 1
D4 MBR0540T1 D-FILL-SOD123 SOD123 semicon-smd-ipc 1
D5 MBR0540T1 D-FILL-SOD123 SOD123 semicon-smd-ipc 1
D6 MBR0540T1 D-FILL-SOD123 SOD123 semicon-smd-ipc 1
D7 MBR0540T1 D-FILL-SOD123 SOD123 semicon-smd-ipc 1
D8 MBR0540T1 D-FILL-SOD123 SOD123 semicon-smd-ipc 1
J2 557560-1 557560-1 con-amp 1
JP1 SPI CONTROL PINHD-2X5 2X05 pinhead 1
JP2 TDM PINHD-2X5 2X05 pinhead 1
JP9 1544/2048 JP2E JP2 jumper 1
JP10 TCLK/MCLK JP1E JP1 jumper 1
L1 SM-1206 SM-1206 inductor-neosid 1
LED1 RED LEDCHIPLED_0805 CHIPLED_0805 led 1
LED2 GREEN LEDCHIPLED_0805 CHIPLED_0805 led 1
R1 3k 1% R-EU_R0603 R0603 rcl 1
R2 10k R-EU_R0603 R0603 rcl 1
R3 120 R-EU_R0603 R0603 rcl 1
R4 0 R-EU_R0603 R0603 rcl 1
R5 0 R-EU_R0603 R0603 rcl 1
R6 10k R-EU_R0603 R0603 rcl 1
R7 68 R-EU_R0603 R0603 rcl 1
SJ1 SJ SJ jumper 1
SJ2 SJ SJ jumper 1
T1 BC847C BC847C-NPN-SOT23-BEC SOT23-BEC transistor 1
TP1 TPPAD1-13 TPPAD1-13 P1-13 testpad 1
TP2 TPPAD1-13 TPPAD1-13 P1-13 testpad 1
TP3 TPPAD1-13 TPPAD1-13 P1-13 testpad 1
TP4 TPPAD1-13 TPPAD1-13 P1-13 testpad 1
U$1 IDT82V2081 IDT82V2081 TQFP44 laforge 1
U$2 PULSE_T1094NL PULSE_T1094NL PULSE_BH laforge 1
U$3 2.048 Mhz FOX_FXO-HC73 HC73 laforge 1
U$4 1.544 MHz FOX_FXO-HC73 HC73 laforge 1
U$5 MNR MNR MNR35 laforge 1
U$6 TPS736XX TPS736XX SOT223-6 laforge 1

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EAGLE AutoRouter Statistics:
Job : /home/eagle/eagle/e1_xcvr/e1_xcvr.brd
Start at : 01:37:52 (24 Dec 2011)
End at : 01:38:06 (24 Dec 2011)
Elapsed time : 00:00:14
Signals : 41 RoutingGrid: 5 mil Layers: 2
Connections : 113 predefined: 4 ( 0 Vias )
Router memory : 765336
Passname : Busses Route Optimize1 Optimize2 Optimize3 Optimize4
Time per pass : 00:00:01 00:00:02 00:00:03 00:00:03 00:00:02 00:00:03
Number of Ripups : 0 0 0 0 0 0
max. Level : 0 0 0 0 0 0
max. Total : 0 0 0 0 0 0
Routed : 7 109 109 109 109 109
Vias : 0 108 50 41 36 37
Resolution : 9.7 % 100.0 % 100.0 % 100.0 % 100.0 % 100.0 %
Final : 99.1% finished. Polygons may have fallen apart.

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Generated by EAGLE CAM Processor 7.7.0
Drill Station Info File: /space/home/laforge/projects/git/osmo-e1-xcvr/hardware/gerber/e1_xcvr.dri
Date : 20.12.19 23:55
Drills : generated
Device : Excellon drill station, coordinate format 2.5 inch
Parameter settings:
Tolerance Drill + : 0.00 %
Tolerance Drill - : 0.00 %
Rotate : no
Mirror : no
Optimize : yes
Auto fit : yes
OffsetX : 0inch
OffsetY : 0inch
Layers : Drills Holes
Drill File Info:
Data Mode : Absolute
Units : 1/100000 Inch
Drills used:
Code Size used
T01 0.0236inch 57
T02 0.0350inch 16
T03 0.0360inch 7
T04 0.0400inch 20
T05 0.0520inch 4
T06 0.1260inch 4
T07 0.1280inch 2
Total number of drills: 110
Plotfiles:
/space/home/laforge/projects/git/osmo-e1-xcvr/hardware/gerber/e1_xcvr.txt

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G75*
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%
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View File

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M02*

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@ -1,60 +0,0 @@
Generated by EAGLE CAM Processor 7.7.0
Photoplotter Info File: /space/home/laforge/projects/git/osmo-e1-xcvr/hardware/gerber/e1_xcvr.gpi
Date : 20.12.19 23:55
Plotfile : /space/home/laforge/projects/git/osmo-e1-xcvr/hardware/gerber/e1_xcvr.gtl
Apertures : generated:
Device : Gerber RS-274-X photoplotter, coordinate format 2.5 inch
Parameter settings:
Emulate Apertures : no
Tolerance Draw + : 0.00 %
Tolerance Draw - : 0.00 %
Tolerance Flash + : 0.00 %
Tolerance Flash - : 0.00 %
Rotate : no
Mirror : no
Optimize : yes
Auto fit : yes
OffsetX : 0inch
OffsetY : 0inch
Plotfile Info:
Coordinate Format : 2.5
Coordinate Units : Inch
Data Mode : Absolute
Zero Suppression : None
End Of Block : *
Apertures used:
Code Shape Size used
D10 draw 0.0000inch 6
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@ -1,129 +0,0 @@
%
M48
M72
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%
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M30

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@ -1,3 +0,0 @@
*.o
e1_test
e1_test_dieter

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@ -1,17 +0,0 @@
LIBS+=`pkg-config --libs libosmocore libosmogsm`
CFLAGS+=-Wall `pkg-config --cflags libosmocore libosmogsm`
all: e1_test e1_test_dieter
%.o: %.c
$(CC) $(CFLAGS) -o $@ -c $^
e1_test: osmo_e1f.o crc4itu.o e1_test.o
$(CC) $(LDFLAGS) -o $@ $^ $(LIBS)
e1_test_dieter: osmo_e1f.o crc4itu.o e1_test_dieter.o
$(CC) $(LDFLAGS) -o $@ $^ $(LIBS)
clean:
@rm -f *.o e1_test e1_test_dieter

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@ -1,56 +0,0 @@
/**
* \file
* Functions and types for CRC checks.
*
* Generated on Sat May 12 09:39:22 2018
* by pycrc v0.9.1, https://pycrc.org
* using the configuration:
* - Width = 4
* - Poly = 0x3
* - XorIn = 0x0
* - ReflectIn = False
* - XorOut = 0x0
* - ReflectOut = False
* - Algorithm = table-driven
*/
#include "crc4itu.h" /* include the header file generated with pycrc */
#include <stdlib.h>
#include <stdint.h>
/**
* Static table used for the table_driven implementation.
*/
static const crc_t crc_table[256] = {
0x00, 0x03, 0x06, 0x05, 0x0c, 0x0f, 0x0a, 0x09, 0x0b, 0x08, 0x0d, 0x0e, 0x07, 0x04, 0x01, 0x02,
0x05, 0x06, 0x03, 0x00, 0x09, 0x0a, 0x0f, 0x0c, 0x0e, 0x0d, 0x08, 0x0b, 0x02, 0x01, 0x04, 0x07,
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0x0f, 0x0c, 0x09, 0x0a, 0x03, 0x00, 0x05, 0x06, 0x04, 0x07, 0x02, 0x01, 0x08, 0x0b, 0x0e, 0x0d,
0x07, 0x04, 0x01, 0x02, 0x0b, 0x08, 0x0d, 0x0e, 0x0c, 0x0f, 0x0a, 0x09, 0x00, 0x03, 0x06, 0x05,
0x02, 0x01, 0x04, 0x07, 0x0e, 0x0d, 0x08, 0x0b, 0x09, 0x0a, 0x0f, 0x0c, 0x05, 0x06, 0x03, 0x00,
0x0d, 0x0e, 0x0b, 0x08, 0x01, 0x02, 0x07, 0x04, 0x06, 0x05, 0x00, 0x03, 0x0a, 0x09, 0x0c, 0x0f,
0x08, 0x0b, 0x0e, 0x0d, 0x04, 0x07, 0x02, 0x01, 0x03, 0x00, 0x05, 0x06, 0x0f, 0x0c, 0x09, 0x0a,
0x0e, 0x0d, 0x08, 0x0b, 0x02, 0x01, 0x04, 0x07, 0x05, 0x06, 0x03, 0x00, 0x09, 0x0a, 0x0f, 0x0c,
0x0b, 0x08, 0x0d, 0x0e, 0x07, 0x04, 0x01, 0x02, 0x00, 0x03, 0x06, 0x05, 0x0c, 0x0f, 0x0a, 0x09,
0x04, 0x07, 0x02, 0x01, 0x08, 0x0b, 0x0e, 0x0d, 0x0f, 0x0c, 0x09, 0x0a, 0x03, 0x00, 0x05, 0x06,
0x01, 0x02, 0x07, 0x04, 0x0d, 0x0e, 0x0b, 0x08, 0x0a, 0x09, 0x0c, 0x0f, 0x06, 0x05, 0x00, 0x03,
0x09, 0x0a, 0x0f, 0x0c, 0x05, 0x06, 0x03, 0x00, 0x02, 0x01, 0x04, 0x07, 0x0e, 0x0d, 0x08, 0x0b,
0x0c, 0x0f, 0x0a, 0x09, 0x00, 0x03, 0x06, 0x05, 0x07, 0x04, 0x01, 0x02, 0x0b, 0x08, 0x0d, 0x0e,
0x03, 0x00, 0x05, 0x06, 0x0f, 0x0c, 0x09, 0x0a, 0x08, 0x0b, 0x0e, 0x0d, 0x04, 0x07, 0x02, 0x01,
0x06, 0x05, 0x00, 0x03, 0x0a, 0x09, 0x0c, 0x0f, 0x0d, 0x0e, 0x0b, 0x08, 0x01, 0x02, 0x07, 0x04
};
crc_t crc4itu_update(crc_t crc, const void *data, size_t data_len)
{
const unsigned char *d = (const unsigned char *)data;
unsigned int tbl_idx;
while (data_len--) {
tbl_idx = (crc << 4) ^ *d;
crc = crc_table[tbl_idx] & 0xf;
d++;
}
return crc & 0xf;
}

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@ -1,106 +0,0 @@
/**
* \file
* Functions and types for CRC checks.
*
* Generated on Sat May 12 09:41:12 2018
* by pycrc v0.9.1, https://pycrc.org
* using the configuration:
* - Width = 4
* - Poly = 0x3
* - XorIn = 0x0
* - ReflectIn = False
* - XorOut = 0x0
* - ReflectOut = False
* - Algorithm = table-driven
*
* This file defines the functions crc4itu_init(), crc4itu_update() and crc_finalize().
*
* The crc4itu_init() function returns the inital \c crc value and must be called
* before the first call to crc4itu_update().
* Similarly, the crc_finalize() function must be called after the last call
* to crc4itu_update(), before the \c crc is being used.
* is being used.
*
* The crc4itu_update() function can be called any number of times (including zero
* times) in between the crc4itu_init() and crc_finalize() calls.
*
* This pseudo-code shows an example usage of the API:
* \code{.c}
* crc_t crc;
* unsigned char data[MAX_DATA_LEN];
* size_t data_len;
*
* crc = crc4itu_init();
* while ((data_len = read_data(data, MAX_DATA_LEN)) > 0) {
* crc = crc4itu_update(crc, data, data_len);
* }
* crc = crc_finalize(crc);
* \endcode
*/
#ifndef CRC4ITU_H
#define CRC4ITU_H
#include <stdlib.h>
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* The definition of the used algorithm.
*
* This is not used anywhere in the generated code, but it may be used by the
* application code to call algorithm-specific code, if desired.
*/
#define CRC_ALGO_TABLE_DRIVEN 1
/**
* The type of the CRC values.
*
* This type must be big enough to contain at least 4 bits.
*/
typedef uint_fast8_t crc_t;
/**
* Calculate the initial crc value.
*
* \return The initial crc value.
*/
static inline crc_t crc4itu_init(void)
{
return 0x0;
}
/**
* Update the crc value with new data.
*
* \param[in] crc The current crc value.
* \param[in] data Pointer to a buffer of \a data_len bytes.
* \param[in] data_len Number of bytes in the \a data buffer.
* \return The updated crc value.
*/
crc_t crc4itu_update(crc_t crc, const void *data, size_t data_len);
/**
* Calculate the final crc value.
*
* \param[in] crc The current crc value.
* \return The final crc value.
*/
static inline crc_t crc_finalize(crc_t crc)
{
return crc;
}
#ifdef __cplusplus
} /* closing brace for extern "C" */
#endif
#endif /* CRC4ITU_H */

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#include <stdint.h>
#include "idt82v2081.h"
#include "idt82v2081_regs.h"
/*! \brief Set or clear some (masked) bits inside a register
* \param[in] e4k reference to the tuner
* \param[in] reg number of the register
* \param[in] mask bit-mask of the value
* \param[in] val data value to be written to register
* \returns 0 on success, negative in case of error
*/
static int idt82_reg_set_bit_mask(struct idt82 *idt, uint8_t reg,
uint8_t mask, uint8_t val)
{
uint8_t tmp = idt82_reg_read(idt, reg);
if ((tmp & mask) == val)
return 0;
return idt82_reg_write(idt, reg, (tmp & ~mask) | (val & mask));
}
int idt82_termination(struct idt82 *idt, enum idt82_term term)
{
idt82_reg_set_bit_mask(IDT_REG_TERM, term | (term << IDT_TERM_T_SHIFT),
IDT_TERM_T_MASK | IDT_TERM_R_MASK);
switch (idt->mode) {
case IDT_MODE_E1:
if (term == IDT_TERM_INT_75)
puls = 0;
else
puls = 1;
scal = 0x21;
break;
case IDT_MODE_T1:
/* FIXME: different length! */
puls = 2;
scal = 0x36;
break;
case IDT_MODE_J1:
puls = 7;
scal = 0x36;
break;
}
idt82_reg_set_bit_mask(IDT_REG_TCF1, puls, IDT_TCF1_PULS_MASK);
idt82_reg_set_bit_mask(IDT_REG_TCF2, scal, IDT_TCF1_SCAL_MASK);
idt->term = term;
return 0;
}
int idt82_mode(struct idt82 *idt, enum idt82_mode mode)
{
switch (mode) {
case IDT_MODE_E1:
idt82_reg_set_bit_mask(idt, IDT_REG_GCF, IDT_GCF_T1E1_E1,
IDT_GCF_T1E1_MASK);
break;
case IDT_MODE_T1:
idt82_reg_set_bit_mask(idt, IDT_REG_GCF, IDT_GCF_T1E1_T1,
IDT_GCF_T1E1_MASK);
break;
}
idt->mode = mode;
}
int idt82_get_errcount(struct idt82 *idt)
{
uint16_t ret;
int rc;
rc = idt82_reg_read(idt, IDT_REG_CNT0)
if (rc < 0)
return ret;
ret = rc;
rc = idt82_reg_read(idt, IDT_REG_CNT1)
if (rc < 0)
return ret;
ret |= (rc << 8);
return ret;
}
/* return in dB, range is return value ... (value + 2) */
int idt82_get_line_att(struct idt82 *idt)
{
int rc;
rc = idt82_reg_read(idt, IDT_REG_STAT1);
if (rc < 0)
return rc;
return (rc & IDT_STAT1_ATT_MASK)*2;
}
int idt82_init(struct idt82 *idt)
{
idt82_reg_write(idt, IDT_REG_GCF, 0);
idt82_reg_write(idt, IDT_REG_JA, 0);
idt82_reg_write(idt, IDT_REG_TCF0, 0);
idt82_reg_write(idt, IDT_REG_TCF5, 0);
idt82_reg_write(idt, IDT_REG_RCF1, 0); /* short haul */
idt82_mode(idt, IDT_MODE_E1);
idt82_term(idt, IDT_TERM_INT_120);
return 0;
}

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#ifndef _IDT82_H
#define _IDT82_H
enum idt82_term {
IDT_TERM_INT_75 = 0
IDT_TERM_INT_120,
IDT_TERM_INT_100,
IDT_TERM_INT_110,
IDT_TERM_EXT,
};
enum idt82_mode {
IDT_MODE_E1 = 0,
IDT_MODE_T1,
IDT_MODE_J1,
};
struct idt82 {
enum idt82_mode mode;
enum idt82_term term;
void *priv;
uint8_t cs;
};
int idt82_termination(struct idt82 *idt, enum idt82_term term);
int idt82_mode(struct idt82 *idt, enum idt82_mode mode);
int idt82_get_errcount(struct idt82 *idt);
int idt82_get_line_att(struct idt82 *idt);
int idt82_init(struct idt82 *idt);
/* callbacks into transport */
int idt82_reg_write(struct idt82 *idt, uint8_t reg, uin8_t val);
int idt82_reg_read(struct idt82 *idt, uint8_t reg);
/* board specific initializers */
int idt82_at91_init(struct idt82 *idt, void *spi, unsigned int id,
uint8_t cs, uint32_t spi_mr, uint32_t csr);
#endif

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#include <stdint.h>
#include <spi/spi.h>
#include "idt82v2081.h"
/* Adaption layer between idt82 driver and at91lib SPI driver */
#define B_READ (1 << 5)
/* backend function for core idt82 driver */
int idt82_reg_read(struct idt82 *idt, uint8_t reg)
{
uint16_t res;
SPI_Write(idt->priv, idt->cs, (reg & 0x1F) | B_READ);
while (!SPI_IsFinished(idt->priv));
res = SPI_Read(idt->priv, idt->cs);
return res >> 8;
}
/* backend function for core idt82 driver */
int idt82_reg_write(struct idt82 *idt, uint8_t reg, uint8_t val)
{
SPI_Write(idt->priv, idt->cs, (reg & 0x1F) | B_READ | (val << 8));
return 0;
}
/* initialize the SPI interface to the IDT82 */
int idt82_at91_init(struct idt82 *idt, void *spi, unsigned int id,
uint8_t cs, uint32_t spi_mr, uint32_t csr)
{
idt->priv = spi;
SPI_Configure(spi, id, spi_mr);
SPI_ConfigureNCPS(spi, cs, csr);
SPI_Enable(spi);
}

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#ifndef _IDT82_REGS_H
#define _IDT82_REGS_H
/* Section 4.1 of Data Sheet */
enum idt82v2081_reg {
IDT_REG_ID, /* control */
IDT_REG_RST,
IDT_REG_GCF,
IDT_REG_TERM,
IDT_REG_JACF,
IDT_REG_TCF0, /* Tx path control */
IDT_REG_TCF1,
IDT_REG_TCF2,
IDT_REG_TCF3,
IDT_REG_TCF4,
IDT_REG_RCF0, /* Rx path control */
IDT_REG_RCF1,
IDT_REG_RCF2,
IDT_REG_MAINT0, /* Net Diag Ctrl */
IDT_REG_MAINT1,
IDT_REG_MAINT2,
IDT_REG_MAINT3,
IDT_REG_MAINT4,
IDT_REG_MAINT5,
IDT_REG_MAINT6,
IDT_REG_INTM0, /* Interrupt Control */
IDT_REG_INTM1,
IDT_REG_INTES,
IDT_REG_STAT0, /* Line Status */
IDT_REG_STAT1,
IDT_REG_INTS0, /* Interrupt Status */
IDT_REG_INTS1,
IDT_REG_CNT0, /* Counter */
IDT_REG_CNT1,
};
#define IDT_GCF_T1E1_E1 (0 << 2)
#define IDT_GCF_T1E1_T1 (1 << 2)
#define IDT_GCF_T1E1_MASK (1 << 2)
#define IDT_TERM_T_SHIFT 3
#define IDT_TERM_T_MASK (7 << IDT_TERM_T_SHIFT)
#define IDT_TERM_R_SHIFT 0
#define IDT_TERM_R_MASK (7 << IDT_TERM_R_SHIFT)
#define IDT_TCF1_PULS_MASK 0xF
#define IDT_TCF2_SCAL_MASK 0x3F
#define IDT_RCF2_MG_MASK 3
#define IDT_RCF2_UPDW_SHIFT 2
#define IDT_RCF2_UPDW_MASK (3 << IDT_TERM_INT_75)
#define IDT_RCF2_SLICE_SHIFT 4
#define IDT_RCF2_SLICE_MASK (3 << IDT_RCF2_SLICE_SHIFT)
#define IDT_INTM0_EQ (1 << 7) /* equalizer out of range */
#define IDT_INTM0_IBLBA (1 << 6) /* in-band LB act detect */
#define IDT_INTM0_IBLBD (1 << 5) /* in-band LB deact detect */
#define IDT_INTM0_PRBS (1 << 4) /* prbs sync signal detect */
#define IDT_INTM0_TCLK (1 << 3) /* tclk loss */
#define IDT_INTM0_DF (1 << 2) /* driver failure */
#define IDT_INTM0_AIS (1 << 1) /* Alarm Indication Signal */
#define IDT_INTM0_LOS (1 << 0) /* Loss Of Signal */
#define IDT_INTM1_DAC_OV (1 << 7) /* DAC arithmetic overflow */
#define IDT_INTM1_JA_OV (1 << 6) /* JA overflow */
#define IDT_INTM1_JA_UD (1 << 5) /* JA underflow */
#define IDT_INTM1_ERR (1 << 4) /* PRBS/QRBS logic error detect */
#define IDT_INTM1_EXZ (1 << 3) /* Receive excess zeros */
#define IDT_INTM1_CV (1 << 2) /* Receive error */
#define IDT_INTM1_TIMER (1 << 1) /* One second timer expiration */
#define IDT_INTM1_CNT (1 << 0) /* Counter overflow */
/* STAT0 == INTES == INTS0 == INTM0 */
/* INTS1 == INTM1 */
#define IDT_STAT1_RLP (1 << 5)
#define IDT_STAT1_ATT_MASK 0x1F
#endif /* _IDT82_REGS_H */

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#include <stdint.h>
#include <unistd.h>
#include <errno.h>
#include <stdio.h>
#include <string.h>
#include <osmocom/core/utils.h>
#include <osmocom/core/logging.h>
#include <osmocom/core/application.h>
#include <osmocom/gsm/gsm_utils.h>
#include "osmo_e1f.h"
static struct osmo_e1f_instance inst;
static struct log_info log_info = {};
/* pull data out of the transmitter and print hexdumps */
static void pull_and_print(struct osmo_e1f_instance *e1i)
{
uint8_t buf[32];
osmo_e1f_pull_tx_frame(e1i, buf);
printf("%s\n", osmo_hexdump(buf, sizeof(buf)));
}
static void data_cb(struct osmo_e1f_instance_ts *e1t, struct msgb *msg)
{
printf("Rx TS %u: %s\n", e1t->ts_nr, msgb_hexdump(msg));
msgb_free(msg);
}
static void notify_cb(struct osmo_e1f_instance *e1i, enum osmo_e1f_notify_event evt,
bool present, void *data)
{
printf("NOTIFY: %s %s\n", osmo_e1f_notify_event_name(evt), present ? "PRESENT" : "ABSENT");
}
/* feed some random data into the E1 instance */
static void tc_rx_random()
{
uint8_t buf[32];
int i;
for (i = 0; i < 200; i++) {
osmo_get_rand_id(buf, sizeof(buf));
osmo_e1f_rx_frame(&inst, buf);
}
}
static void tc_rx_align_basic()
{
uint8_t buf[32];
int i;
for (i = 0; i < 80; i++) {
memset(buf, 0xff, sizeof(buf));
switch (i %2) {
case 0:
buf[0] = 0x9B;
break;
case 1:
buf[0] = 0x40;
break;
}
osmo_e1f_rx_frame(&inst, buf);
}
}
static void tc_rx_align_mframe()
{
uint8_t buf[32];
int i;
for (i = 0; i < 80; i++) {
memset(buf, 0xff, sizeof(buf));
switch (i % 16) {
case 0:
case 2:
case 4:
case 6:
case 8:
case 10:
case 12:
case 14:
buf[0] = 0x9B;
break;
case 1:
case 3:
case 7:
case 13:
case 15:
buf[0] = 0x40;
break;
case 5:
case 9:
case 11:
buf[0] = 0xc0;
break;
}
osmo_e1f_rx_frame(&inst, buf);
}
}
static void tc_tx_idle()
{
int i;
for (i = 0; i < 20; i++) {
pull_and_print(&inst);
}
}
int main(int argc, char **argv)
{
int i;
osmo_init_logging2(NULL, &log_info);
osmo_e1f_init();
osmo_e1f_instance_init(&inst, "e1_test", &notify_cb, true, NULL);
for (i = 1; i < 32; i++) {
struct osmo_e1f_instance_ts *e1t = osmo_e1f_instance_ts(&inst, i);
osmo_e1f_ts_config(e1t, &data_cb, 40, true, OSMO_E1F_TS_RAW);
}
printf("\nRx Random...\n");
osmo_e1f_instance_reset(&inst);
tc_rx_random();
printf("\nAlign (Basic)...\n");
osmo_e1f_instance_reset(&inst);
tc_rx_align_basic();
printf("\nAlign (Mframe)...\n");
osmo_e1f_instance_reset(&inst);
tc_rx_align_mframe();
printf("\nTX Idle...\n");
osmo_e1f_instance_reset(&inst);
tc_tx_idle();
}

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#include <stdint.h>
#include <unistd.h>
#include <errno.h>
#include <stdio.h>
#include <string.h>
#include <fcntl.h>
#include <sys/stat.h>
#include <osmocom/core/utils.h>
#include <osmocom/core/logging.h>
#include <osmocom/core/application.h>
#include <osmocom/gsm/gsm_utils.h>
#include "osmo_e1f.h"
static struct osmo_e1f_instance inst;
static struct log_info log_info = {};
static void data_cb(struct osmo_e1f_instance_ts *e1t, struct msgb *msg)
{
printf("Rx TS %02u: %s\n", e1t->ts_nr, msgb_hexdump(msg));
msgb_free(msg);
}
static void notify_cb(struct osmo_e1f_instance *e1i, enum osmo_e1f_notify_event evt,
bool present, void *data)
{
fprintf(stdout, "NOTIFY: %s %s\n", osmo_e1f_notify_event_name(evt), present ? "PRESENT" : "ABSENT");
}
static void read_file(const char *fname)
{
int fd;
fd = open(fname, O_RDONLY);
if (fd < 0)
exit(23);
while (1) {
int rc;
uint8_t buf[32];
rc = read(fd, buf, sizeof(buf));
if (rc <= 0)
return;
if (rc < sizeof(buf))
exit(24);
//printf("FRAME: %s\n", osmo_hexdump(buf, sizeof(buf)));
osmo_e1f_rx_frame(&inst, buf);
}
}
int main(int argc, char **argv)
{
int i;
osmo_init_logging2(NULL, &log_info);
osmo_e1f_init();
osmo_e1f_instance_init(&inst, "e1_test", &notify_cb, true, NULL);
for (i = 1; i < 32; i++) {
struct osmo_e1f_instance_ts *e1t = osmo_e1f_instance_ts(&inst, i);
enum osmo_e1f_ts_mode mode;
bool enable;
switch (i) {
case 2:
mode = OSMO_E1F_TS_HDLC_CRC;
enable = true;
break;
case 5:
case 6:
case 7:
case 8:
default:
mode = OSMO_E1F_TS_RAW;
enable = false;
break;
}
osmo_e1f_ts_config(e1t, &data_cb, 64, enable, mode);
}
read_file("Insite_to_Racal_E1.bin");
}

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/* Osmocom Software Defined E1
*
* (C) 2018 by Harald Welte <laforge@gnumonks.org>
*
* Implements ITU-T Rec. G.704 Section 2.3
*/
#include <stdbool.h>
#include <stdint.h>
#include <unistd.h>
#include <errno.h>
#include <string.h>
#include <osmocom/core/msgb.h>
#include <osmocom/core/linuxlist.h>
#include <osmocom/core/logging.h>
#include <osmocom/core/fsm.h>
#include "crc4itu.h"
#include "osmo_e1f.h"
#define S(x) (1 << (x))
/* Frame Alignment Signal (BIT1 may be overwritten with CRC-4) */
#define G704_E1_FAS 0x1B
static inline bool is_correct_fas(uint8_t bt) {
if ((bt & 0x7F) == G704_E1_FAS)
return true;
else
return false;
}
/* are we in SMF II (true) or I (false) */
static inline bool is_smf_II(const struct osmo_e1f_tx_state *tx) {
if (tx->frame_nr >= 8)
return true;
return false;
}
static struct osmo_fsm e1_align_fsm;
static void align_fsm_reset(struct osmo_e1f_instance *e1i);
static void notify_user(struct osmo_e1f_instance *e1i, enum osmo_e1f_notify_event evt,
bool present, void *priv)
{
if (!e1i->notify_cb)
return;
e1i->notify_cb(e1i, evt, present, priv);
}
/*! Initialize a (caller-allocated) Osmocom E1 Instance
* \param[inout] e1i E1 Instance to be initialized
* \returns 0 on success, negative on error */
int osmo_e1f_instance_init(struct osmo_e1f_instance *e1i, const char *name, e1_notify_cb cb,
bool crc4_enabled, void *priv)
{
int i;
e1i->crc4_enabled = crc4_enabled;
e1i->notify_cb = cb;
e1i->tx.sa4_sa8 = 0x00;
e1i->priv = priv;
for (i = 1; i < ARRAY_SIZE(e1i->ts); i++) {
struct osmo_e1f_instance_ts *e1t = &e1i->ts[i];
e1t->ts_nr = i;
e1t->inst = e1i;
INIT_LLIST_HEAD(&e1t->tx.queue);
e1t->rx.granularity = 256;
}
e1i->rx.fi = osmo_fsm_inst_alloc(&e1_align_fsm, NULL, e1i, LOGL_DEBUG, name);
if (!e1i->rx.fi)
return -1;
osmo_e1f_instance_reset(e1i);
return 0;
}
/*! stop E1 timeslot; release any pending rx/tx buffers
* \param[in] e1t Timeslot which we are to stop, disable and release buffers */
void osmo_e1f_ts_reset(struct osmo_e1f_instance_ts *e1t)
{
e1t->tx.underruns = 0;
msgb_queue_free(&e1t->tx.queue);
e1t->rx.enabled = false;
msgb_free(e1t->rx.msg);
e1t->rx.msg = NULL;
osmo_isdnhdlc_rcv_init(&e1t->rx.hdlc, OSMO_HDLC_F_BITREVERSE);
//osmo_isdnhdlc_rcv_init(&e1t->rx.hdlc, 0);
osmo_isdnhdlc_out_init(&e1t->tx.hdlc, 0);
}
/*! stop E1 instance; stops all timeslots and releases any pending rx/tx buffers
* \param[in] e1t E1 instance which we are to stop */
void osmo_e1f_instance_reset(struct osmo_e1f_instance *e1i)
{
int i;
align_fsm_reset(e1i);
e1i->tx.remote_alarm = false;
e1i->tx.crc4_error = false;
e1i->tx.frame_nr = 0;
e1i->tx.crc4_last_smf = 0;
e1i->tx.crc4 = crc4itu_init();
e1i->rx.frame_nr = 0;
memset(&e1i->rx.ts0_history, 0, sizeof(e1i->rx.ts0_history));
e1i->rx.ts0_hist_len = 0;
e1i->rx.remote_alarm = false;
e1i->rx.remote_crc4_error = false;
e1i->rx.num_ts0_in_mframe_search = 0;
for (i = 1; i < ARRAY_SIZE(e1i->ts); i++) {
struct osmo_e1f_instance_ts *e1t = &e1i->ts[i];
osmo_e1f_ts_reset(e1t);
}
}
/*! obtain pointer to TS given by instance + timeslot number
* \param[in] e1i E1 intance on which we work
* \param[in] ts_nr E1 timeslot number (1..31)
* \returns pointer to timeslot; NULL on error */
struct osmo_e1f_instance_ts *osmo_e1f_instance_ts(struct osmo_e1f_instance *e1i, uint8_t ts_nr)
{
if (ts_nr == 0 || ts_nr >= ARRAY_SIZE(e1i->ts))
return NULL;
return &e1i->ts[ts_nr];
}
/*! configure an E1 timeslot
* \param[in] e1t Timeslot which we are to configure
* \param[in] granularity granularity (buffer size) to use on Rx
* \param[in] enable enable (true) or disalble (false) receiving on this TS
* \param[in] mode the mode for this timeslot (raw or hdlc)
* \return 0 on success; negative on error */
int osmo_e1f_ts_config(struct osmo_e1f_instance_ts *e1t, e1_data_cb cb, unsigned int granularity,
bool enable, enum osmo_e1f_ts_mode mode)
{
e1t->rx.data_cb = cb;
e1t->rx.enabled = enable;
e1t->rx.granularity = granularity;
e1t->mode = mode;
return 0;
}
const struct value_string osmo_e1f_notifv_evt_names[] = {
{ E1_NTFY_EVT_ALIGN_FRAME, "Aligned to Frame" },
{ E1_NTFY_EVT_ALIGN_CRC_MFRAME, "Aligned to CRC4-Multiframe" },
{ E1_NTFY_EVT_CRC_ERROR, "CRC Error detected (local)" },
{ E1_NTFY_EVT_REMOTE_CRC_ERROR, "CRC Error reported (remote)" },
{ E1_NTFY_EVT_REMOTE_ALARM, "Remote Alarm condition repoorted" },
{ 0, NULL }
};
/***********************************************************************
* Transmit Side
***********************************************************************/
/*! Enqueue a message buffer of to-be-transmitted data for a timeslot
* \param[in] e1i E1 instance for which to enqueue
* \param[in] ts_nr Timeslot number on which data is to be transmitted
* \param[in] msg Message buffer storing the to-be-transmitted data
* \returns 0 on success; negative in case of error.
*
* Ownership of \a msg is transferred from caller into this function, but only
* in case of successful execution (return 0)!
*/
void osmo_e1f_ts_enqueue(struct osmo_e1f_instance_ts *e1t, struct msgb *msg)
{
msgb_enqueue(&e1t->tx.queue, msg);
}
/* obtain a CRC4 bit for the current frame number */
static uint8_t e1_pull_crc4_bit(struct osmo_e1f_instance *e1i)
{
/* If CRC-4 is disabled, all CRC bits shall be '1' */
if (e1i->crc4_enabled == 0) {
return 0x01;
} else {
/* CRC is transmitted MSB first */
switch (e1i->tx.frame_nr % 8) {
case 0:
return (e1i->tx.crc4_last_smf >> 3) & 1;
case 2:
return (e1i->tx.crc4_last_smf >> 2) & 1;
case 4:
return (e1i->tx.crc4_last_smf >> 1) & 1;
case 6:
return (e1i->tx.crc4_last_smf >> 0) & 1;
default:
OSMO_ASSERT(0);
}
}
}
/* pull a single to-be-transmitted byte for TS0 */
static uint8_t e1_pull_ts0(struct osmo_e1f_instance *e1i)
{
uint8_t ret;
/* according to Table 5B/G.704 - CRC-4 multiframe structure */
if ((e1i->tx.frame_nr % 2) == 0) {
/* FAS */
ret = G704_E1_FAS | (e1_pull_crc4_bit(e1i) << 7);
} else {
switch (e1i->tx.frame_nr) {
case 1:
case 3:
case 7:
ret = 0x40;
break;
case 5:
case 9:
case 11:
ret = 0xC0;
break;
case 13:
case 15:
ret = 0x40;
if (e1i->tx.crc4_error)
ret |= 0x80;
break;
}
ret |= e1i->tx.sa4_sa8;
if (e1i->tx.remote_alarm)
ret |= 0x20;
}
/* re-set CRC4 at start of sub-multiframe */
if (e1i->tx.frame_nr == 0 || e1i->tx.frame_nr == 8) {
e1i->tx.crc4_last_smf = e1i->tx.crc4;
e1i->tx.crc4 = 0;
}
/* increment frame number modulo 16 */
e1i->tx.frame_nr = (e1i->tx.frame_nr + 1) % 16;
return ret;
}
/* pull a single to-be-transmitted byte for TS1..31 */
static uint8_t e1_pull_tsN(struct osmo_e1f_instance_ts *e1t)
{
struct msgb *msg = llist_first_entry_or_null(&e1t->tx.queue, struct msgb, list);
uint8_t *cur;
retry:
/* if there's no message to transmit */
if (!msg) {
e1t->tx.underruns++;
return 0xFF;
}
if (msgb_length(msg) <= 0) {
llist_del(&msg->list);
msgb_free(msg);
msg = llist_first_entry_or_null(&e1t->tx.queue, struct msgb, list);
goto retry;
}
cur = msgb_pull(msg, 1);
return *cur;
}
/* update the current in-progress CRC4 value with data from \a out_frame */
static void e1_tx_update_crc4(struct osmo_e1f_instance *e1i, const uint8_t *out_frame)
{
uint8_t ts0;
ts0 = out_frame[0];
/* mask off the C bits */
if (is_correct_fas(ts0))
ts0 &= 0x7F;
e1i->tx.crc4 = crc4itu_update(e1i->tx.crc4, &ts0, 1);
/* add the remaining bytes/bits */
e1i->tx.crc4 = crc4itu_update(e1i->tx.crc4, out_frame+1, ARRAY_SIZE(e1i->ts)-1);
}
/*! Pull one to-be-transmitted E1 frame (256bits) from the E1 instance
* \param e1i E1 instance for which the frame shall be generated
* \param[out] out_frame callee-allocated buffer to which function stores 32 bytes
* \returns 0 on success, negative on error */
int osmo_e1f_pull_tx_frame(struct osmo_e1f_instance *e1i, uint8_t *out_frame)
{
int i;
/* generate TS0 */
out_frame[0] = e1_pull_ts0(e1i);
/* generate TS1..31 */
for (i = 1; i < ARRAY_SIZE(e1i->ts); i++) {
struct osmo_e1f_instance_ts *e1t = &e1i->ts[i];
/* get next to-be-transmitted byte from the TS */
out_frame[i] = e1_pull_tsN(e1t);
}
/* update our CRC4 computation */
e1_tx_update_crc4(e1i, out_frame);
return 0;
}
/***********************************************************************
* Receiver Side
***********************************************************************/
/* According to Figure 2 / ITU-T G.706 */
enum e1_align_state {
/* Frame Alignment Search */
E1_AS_SEARCH_FRAME,
/* CRC multiframe alignment search */
E1_AS_SEARCH_CRC_MFRAME,
/* monitoring for incorrect frame alignment and error performance using CRC */
E1_AS_ALIGNED_CRC_MFRAME,
/* no CRC: just frame alignment loss check */
E1_AS_ALIGNED_BASIC,
};
enum e1_align_event {
/* received a TS0 octet */
E1_AE_RX_TS0,
E1_AE_RESET
};
static const struct value_string e1_align_evt_names[] = {
{ E1_AE_RX_TS0, "E1_AE_RX_TS0" },
{ E1_AE_RESET, "E1_AE_RESET" },
{ 0, NULL }
};
/* get a TS0 byte from the history. delta 0 == current, delte 1 == previous, ... */
static uint8_t get_ts0_hist(struct osmo_e1f_instance *e1i, uint8_t delta)
{
return e1i->rx.ts0_history[((e1i->rx.frame_nr + 16)-delta) % 16];
}
/* ITU-T G.706 Section 4.1.1 */
static bool frame_alignment_lost(struct osmo_e1f_instance *e1i)
{
if (e1i->rx.frame_nr % 2)
return false;
/* Frame alignment will be assumed to have been lost when three consecutive incorrect
* frame alignment signals have been received. */
if (!is_correct_fas(get_ts0_hist(e1i, 0)) &&
!is_correct_fas(get_ts0_hist(e1i, 2)) &&
!is_correct_fas(get_ts0_hist(e1i, 4)))
return true;
else
return false;
}
/* ITU-T G.706 Section 4.1.2 */
static bool frame_alignment_recovered(struct osmo_e1f_instance *e1i)
{
/* two consecutive FAS with one non-FAS interspersed */
if (is_correct_fas(get_ts0_hist(e1i, 0)) &&
!is_correct_fas(get_ts0_hist(e1i, 1)) &&
is_correct_fas(get_ts0_hist(e1i, 2)))
return true;
else
return false;
}
/* ITU-T G.706 Section 4.2 */
static bool crc_mframe_alignment_achieved(struct osmo_e1f_instance *e1i)
{
/* if current TS0 byte is FAS, we cannot detect alignment */
if (is_correct_fas(get_ts0_hist(e1i, 0)))
return false;
if ((get_ts0_hist(e1i, 0) >> 7) == 1 &&
(get_ts0_hist(e1i, 2) >> 7) == 1 &&
(get_ts0_hist(e1i, 4) >> 7) == 0 &&
(get_ts0_hist(e1i, 6) >> 7) == 1 &&
(get_ts0_hist(e1i, 8) >> 7) == 0 &&
(get_ts0_hist(e1i, 10) >> 7) == 0)
return true;
else
return false;
}
/* Get the CRC4 that was received from our Rx TS0 history */
static uint8_t crc4_from_ts0_hist(struct osmo_e1f_instance *e1i, bool smf2)
{
uint8_t crc = 0;
uint8_t offset = 0;
if (smf2)
offset = 8;
crc |= (e1i->rx.ts0_history[0+offset] >> 7) << 3;
crc |= (e1i->rx.ts0_history[2+offset] >> 7) << 2;
crc |= (e1i->rx.ts0_history[4+offset] >> 7) << 1;
crc |= (e1i->rx.ts0_history[6+offset] >> 7) << 0;
return crc;
}
/* update the current in-progress CRC4 value with data from \a rx_frame */
static void e1_rx_update_crc4(struct osmo_e1f_instance *e1i, const uint8_t *rx_frame)
{
uint8_t ts0;
ts0 = rx_frame[0];
/* mask off the C bits */
if (is_correct_fas(ts0))
ts0 &= 0x7F;
e1i->rx.crc4 = crc4itu_update(e1i->rx.crc4, &ts0, 1);
/* add the remaining bytes/bits */
e1i->rx.crc4 = crc4itu_update(e1i->rx.crc4, rx_frame+1, ARRAY_SIZE(e1i->ts)-1);
}
/* FSM State handler */
static void e1_align_search_frame(struct osmo_fsm_inst *fi, uint32_t event, void *data)
{
struct osmo_e1f_instance *e1i = (struct osmo_e1f_instance *) fi->priv;
if (frame_alignment_recovered(e1i)) {
/* if we detected the 2nd FAS, we must be in FN 2 (or at least FN%2=0 */
e1i->rx.frame_nr = 2;
notify_user(e1i, E1_NTFY_EVT_ALIGN_FRAME, true, NULL);
osmo_fsm_inst_state_chg(fi, E1_AS_SEARCH_CRC_MFRAME, 0, 0);
}
}
/* FSM State handler */
static void e1_align_search_crc_mframe(struct osmo_fsm_inst *fi, uint32_t event, void *data)
{
struct osmo_e1f_instance *e1i = (struct osmo_e1f_instance *) fi->priv;
if (crc_mframe_alignment_achieved(e1i)) {
/* if we detected the 6-bit CRC multiframe signal, we must be in FN 11 */
e1i->rx.frame_nr = 11;
/* FIXME: "at least two valid CRC multiframe alignment signals can be located within
* 8 ms, the time separating two CRC multiframe alignment signals being 2 ms or a
* multiple of 2 ms" */
notify_user(e1i, E1_NTFY_EVT_ALIGN_CRC_MFRAME, true, NULL);
osmo_fsm_inst_state_chg(fi, E1_AS_ALIGNED_CRC_MFRAME, 0, 0);
} else {
/* if no mframe alignment is established within 8ms (64 frames), fall back */
if (e1i->rx.num_ts0_in_mframe_search >= 64) {
e1i->rx.num_ts0_in_mframe_search = 0;
osmo_fsm_inst_state_chg(fi, E1_AS_SEARCH_FRAME, 0, 0);
}
e1i->rx.num_ts0_in_mframe_search++;
}
}
static void e1_aligned_common(struct osmo_e1f_instance *e1i)
{
uint8_t inb = get_ts0_hist(e1i, 0);
/* All non-FAS frames contain "A" bit in TS0 */
if (!is_correct_fas(inb & 0x7F)) {
bool old_alarm = e1i->rx.remote_alarm;
/* frame not containing the frame alignment signal */
if (inb & 0x20)
e1i->rx.remote_alarm = true;
else
e1i->rx.remote_alarm = false;
if (old_alarm != e1i->rx.remote_alarm)
notify_user(e1i, E1_NTFY_EVT_REMOTE_ALARM, e1i->rx.remote_alarm, NULL);
}
}
/* FSM State handler */
static void e1_aligned_crc_mframe(struct osmo_fsm_inst *fi, uint32_t event, void *data)
{
struct osmo_e1f_instance *e1i = (struct osmo_e1f_instance *) fi->priv;
if (frame_alignment_lost(e1i)) {
osmo_fsm_inst_state_chg(fi, E1_AS_SEARCH_FRAME, 0, 0);
return;
}
if (e1i->crc4_enabled) {
uint8_t crc_rx;
bool crc4_error;
/* check if we just received a complete CRC4 */
switch (e1i->rx.frame_nr) {
case 7:
case 15:
crc_rx = crc4_from_ts0_hist(e1i, e1i->rx.frame_nr == 15 ? true : false);
if (crc_rx != e1i->rx.crc4_last_smf)
crc4_error = true;
else
crc4_error = false;
if (crc4_error != e1i->tx.crc4_error) {
notify_user(e1i, E1_NTFY_EVT_CRC_ERROR, crc4_error, NULL);
e1i->tx.crc4_error = crc4_error;
}
/* rotate computed CRC4 one further */
e1i->rx.crc4_last_smf = e1i->rx.crc4;
e1i->rx.crc4 = crc4itu_init();
break;
default:
break;
}
/* check if the remote side reports any CRC errors */
switch (e1i->rx.frame_nr) {
case 13:
case 15:
crc4_error = false;
if ((get_ts0_hist(e1i, 0) >> 7) == 0)
crc4_error = true;
if (crc4_error != e1i->rx.remote_crc4_error) {
notify_user(e1i, E1_NTFY_EVT_REMOTE_CRC_ERROR, crc4_error, NULL);
e1i->rx.remote_crc4_error = crc4_error;
}
break;
}
}
e1_aligned_common(e1i);
}
/* FSM State handler */
static void e1_aligned_basic(struct osmo_fsm_inst *fi, uint32_t event, void *data)
{
struct osmo_e1f_instance *e1i = (struct osmo_e1f_instance *) fi->priv;
if (frame_alignment_lost(e1i)) {
osmo_fsm_inst_state_chg(fi, E1_AS_SEARCH_FRAME, 0, 0);
return;
}
e1_aligned_common(e1i);
}
static const struct osmo_fsm_state e1_align_states[] = {
[E1_AS_SEARCH_FRAME] = {
.name = "SEARCH_FRAME",
.in_event_mask = S(E1_AE_RX_TS0),
.out_state_mask = S(E1_AS_SEARCH_FRAME) |
S(E1_AS_SEARCH_CRC_MFRAME) |
S(E1_AS_ALIGNED_BASIC),
.action = e1_align_search_frame,
},
[E1_AS_SEARCH_CRC_MFRAME] = {
.name = "SEARCH_CRC_MFRAME",
.in_event_mask = S(E1_AE_RX_TS0),
.out_state_mask = S(E1_AS_SEARCH_FRAME) |
S(E1_AS_SEARCH_CRC_MFRAME) |
S(E1_AS_ALIGNED_CRC_MFRAME),
.action = e1_align_search_crc_mframe,
},
[E1_AS_ALIGNED_CRC_MFRAME] = {
.name = "ALIGNED_CRC_MFRAME",
.in_event_mask = S(E1_AE_RX_TS0),
.out_state_mask = S(E1_AS_SEARCH_FRAME) |
S(E1_AS_SEARCH_CRC_MFRAME) |
S(E1_AS_ALIGNED_CRC_MFRAME),
.action = e1_aligned_crc_mframe,
},
[E1_AS_ALIGNED_BASIC] = {
.name = "ALIGNED_BASIC",
.in_event_mask = S(E1_AE_RX_TS0),
.out_state_mask = S(E1_AS_SEARCH_FRAME),
.action = e1_aligned_basic,
},
};
static void e1_allstate(struct osmo_fsm_inst *fi, uint32_t event, void *data)
{
struct osmo_e1f_instance *e1i = (struct osmo_e1f_instance *) fi->priv;
switch (event) {
case E1_AE_RESET:
e1i->rx.num_ts0_in_mframe_search = 0;
osmo_fsm_inst_state_chg(fi, E1_AS_SEARCH_FRAME, 0, 0);
break;
}
}
static struct osmo_fsm e1_align_fsm = {
.name = "e1-align",
.states = e1_align_states,
.num_states = ARRAY_SIZE(e1_align_states),
.allstate_event_mask = S(E1_AE_RESET),
.allstate_action = e1_allstate,
.log_subsys = DLGLOBAL,
.event_names = e1_align_evt_names,
};
static void align_fsm_reset(struct osmo_e1f_instance *e1i)
{
osmo_fsm_inst_dispatch(e1i->rx.fi, E1_AE_RESET, NULL);
}
static void e1_rx_hist_add(struct osmo_e1f_instance *e1i, uint8_t inb)
{
e1i->rx.ts0_history[e1i->rx.frame_nr] = inb;
if (e1i->rx.ts0_hist_len < 16)
e1i->rx.ts0_hist_len++;
}
static void e1_rx_ts0(struct osmo_e1f_instance *e1i, uint8_t inb)
{
/* append just-received byte to the TS0 receive history buffer */
e1_rx_hist_add(e1i, inb);
/* notify the FSM that a new TS0 byte was received */
osmo_fsm_inst_dispatch(e1i->rx.fi, E1_AE_RX_TS0, NULL);
e1i->rx.frame_nr = (e1i->rx.frame_nr + 1) % 16;
}
static void e1_rx_tsN(struct osmo_e1f_instance_ts *e1t, uint8_t inb)
{
struct msgb *msg;
int count, rc;
if (!e1t->rx.enabled)
return;
if (!e1t->rx.msg)
e1t->rx.msg = msgb_alloc(e1t->rx.granularity, "E1 Rx");
msg = e1t->rx.msg;
OSMO_ASSERT(msg);
switch (e1t->mode) {
case OSMO_E1F_TS_RAW:
/* append byte at end of msgb */
msgb_put_u8(msg, inb);
/* flush msgb, if full */
if (msgb_tailroom(msg) <= 0) {
goto flush;
}
break;
case OSMO_E1F_TS_HDLC_CRC:
rc = osmo_isdnhdlc_decode(&e1t->rx.hdlc, &inb, 1, &count,
msgb_data(msg), msgb_tailroom(msg));
switch (rc) {
case -OSMO_HDLC_FRAMING_ERROR:
fprintf(stdout, "Framing Error\n");
break;
case -OSMO_HDLC_CRC_ERROR:
fprintf(stdout, "CRC Error\n");
break;
case -OSMO_HDLC_LENGTH_ERROR:
fprintf(stdout, "Length Error\n");
break;
case 0:
/* no output yet */
break;
default:
msgb_put(msg, rc);
goto flush;
}
break;
}
return;
flush:
if (!e1t->rx.data_cb)
msgb_free(msg);
else
e1t->rx.data_cb(e1t, msg);
e1t->rx.msg = NULL;
}
/*! Receive a single E1 frame of 32x8 (=256) bits
* \param e1i E1 instance for which the frame was received
* \param[in] in_frame caller-provided buffer of 32 octets
*
* The idea is that whoever calls us will already have done the bit-alignment,
* i.e. the first bit of TS0 of the frame will be octet-aligned and hence the
* entire 256bit buffer is provided as octet-aligned 32bytes in \a in_frame.
*/
int osmo_e1f_rx_frame(struct osmo_e1f_instance *e1i, const uint8_t *in_frame)
{
int i;
e1_rx_update_crc4(e1i, in_frame);
e1_rx_ts0(e1i, in_frame[0]);
for (i = 1; i < ARRAY_SIZE(e1i->ts); i++) {
struct osmo_e1f_instance_ts *e1t = &e1i->ts[i];
e1_rx_tsN(e1t, in_frame[i]);
}
return 0;
}
int osmo_e1f_init(void)
{
return osmo_fsm_register(&e1_align_fsm);
}

View File

@ -1,122 +0,0 @@
#pragma once
#include <stdint.h>
#include <stdbool.h>
#include <osmocom/core/msgb.h>
#include <osmocom/core/linuxlist.h>
#include <osmocom/core/fsm.h>
#include <osmocom/core/isdnhdlc.h>
struct osmo_e1f_tx_state {
bool remote_alarm;
bool crc4_error;
/* lower 5 bits: Sa4..Sa8 */
uint8_t sa4_sa8;
/* frame number 0..15 */
uint8_t frame_nr;
uint8_t crc4_last_smf;
uint8_t crc4;
};
struct osmo_e1f_rx_state {
uint8_t frame_nr;
/* history of rceived TS0 octets */
uint8_t ts0_history[16];
uint8_t ts0_hist_len;
/* was a remote alarm received? */
bool remote_alarm;
bool remote_crc4_error;
/* number of TS0 bytes received since entering CRC mframe search */
uint8_t num_ts0_in_mframe_search;
struct osmo_fsm_inst *fi;
/* computed CRC4 */
uint8_t crc4_last_smf;
uint8_t crc4;
};
enum osmo_e1f_notify_event {
E1_NTFY_EVT_ALIGN_FRAME,
E1_NTFY_EVT_ALIGN_CRC_MFRAME,
E1_NTFY_EVT_CRC_ERROR,
E1_NTFY_EVT_REMOTE_CRC_ERROR,
E1_NTFY_EVT_REMOTE_ALARM,
};
enum osmo_e1f_ts_mode {
OSMO_E1F_TS_RAW,
OSMO_E1F_TS_HDLC_CRC,
};
struct osmo_e1f_instance_ts;
struct osmo_e1f_instance;
typedef void (*e1_data_cb)(struct osmo_e1f_instance_ts *ts, struct msgb *msg);
typedef void (*e1_notify_cb)(struct osmo_e1f_instance *e1i, enum osmo_e1f_notify_event evt,
bool present, void *data);
struct osmo_e1f_instance_ts {
/* timeslot number */
uint8_t ts_nr;
/* mode in which we operate (RAW/HDLC) */
enum osmo_e1f_ts_mode mode;
/* back-pointer to e1 instance */
struct osmo_e1f_instance *inst;
struct {
/* optional HDLC encoder state */
struct osmo_isdnhdlc_vars hdlc;
/* queue of pending to-be-transmitted messages */
struct llist_head queue;
unsigned long underruns;
} tx;
struct {
/* optional HDLC decoder state */
struct osmo_isdnhdlc_vars hdlc;
bool enabled;
/* how many bytes to buffer before calling call-back */
unsigned int granularity;
/* current receive buffer */
struct msgb *msg;
e1_data_cb data_cb;
/* private data, relevant to user */
void *priv;
} rx;
};
struct osmo_e1f_instance {
/* list; currently not used yet */
struct llist_head list;
/* is CRC4 generation + parsing enabled? */
bool crc4_enabled;
/* notification call-back function */
e1_notify_cb notify_cb;
/* Rx + Tx related state */
struct osmo_e1f_tx_state tx;
struct osmo_e1f_rx_state rx;
/* our 32 timeslots (only 1..32 are used) */
struct osmo_e1f_instance_ts ts[32];
/* private data, relevant to user */
void *priv;
};
extern const struct value_string osmo_e1f_notifv_evt_names[];
static inline const char *osmo_e1f_notify_event_name(enum osmo_e1f_notify_event evt) {
return get_value_string(osmo_e1f_notifv_evt_names, evt);
}
int osmo_e1f_init(void);
struct osmo_e1f_instance_ts *osmo_e1f_instance_ts(struct osmo_e1f_instance *e1i, uint8_t ts_nr);
int osmo_e1f_instance_init(struct osmo_e1f_instance *e1i, const char *name, e1_notify_cb cb,
bool crc4_enabled, void *priv);
void osmo_e1f_instance_reset(struct osmo_e1f_instance *e1i);
int osmo_e1f_ts_config(struct osmo_e1f_instance_ts *e1t, e1_data_cb cb, unsigned int granularity,
bool enable, enum osmo_e1f_ts_mode mode);
void osmo_e1f_ts_reset(struct osmo_e1f_instance_ts *e1t);
void osmo_e1f_ts_enqueue(struct osmo_e1f_instance_ts *e1t, struct msgb *msg);
int osmo_e1f_pull_tx_frame(struct osmo_e1f_instance *e1i, uint8_t *out_frame);
int osmo_e1f_rx_frame(struct osmo_e1f_instance *e1i, const uint8_t *in_frame);

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#include <stdint.h>
#include <stdlib.h>
#include <unistd.h>
#include <string.h>
#include <stdio.h>
#include <fcntl.h>
#include <sys/types.h>
#include <sys/socket.h>
static int set_int_opt(int fd, int opt, int val)
{
return setsockopt(fd, SOL_SOCKET, opt, &val, sizeof(val));
}
static int get_int_opt(int fd, int opt)
{
int ret, rc;
socklen_t optlen = sizeof(ret);
rc = getsockopt(fd, SOL_SOCKET, opt, &ret, &optlen);
if (rc < 0)
return rc;
return ret;
}
static int set_nonblock(int fd)
{
int flags;
flags = fcntl(fd, F_GETFL);
if (flags < 0)
return flags;
flags |= O_NONBLOCK;
return fcntl(fd, F_SETFL, flags);
}
static int run_test_socketpair(int tx_buf)
{
int rc, sd[2];
uint8_t buf[1024*1024];
memset(buf, 0, sizeof(buf));
rc = socketpair(AF_UNIX, SOCK_STREAM, 0, sd);
if (rc < 0)
return rc;
/* set the lowest possible transmit socket buffer */
set_int_opt(sd[0], SO_SNDBUF, tx_buf);
set_nonblock(sd[0]);
rc = write(sd[0], buf, sizeof(buf));
printf("socketpair: tx_buf %7d: written %7d of %ld\n", tx_buf, rc, sizeof(buf));
close(sd[0]);
close(sd[1]);
return 0;
}
static int run_test_pipe(int tx_buf)
{
int rc, sd[2];
uint8_t buf[1024*1024];
memset(buf, 0, sizeof(buf));
rc = pipe(sd);
if (rc < 0)
return rc;
set_nonblock(sd[1]);
rc = write(sd[1], buf, sizeof(buf));
printf("pipe: tx_buf %7d: written %7d of %ld\n", tx_buf, rc, sizeof(buf));
close(sd[0]);
close(sd[1]);
return 0;
}
int main(int argc, char **argv)
{
int i;
for (i = 0; i < 20; i++) {
run_test_socketpair(1<<i);
}
run_test_pipe(0);
}