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osmo-e1-hardware
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Harald Welte 5ab1c6e919 gateware/README.md: Fix typo (CERL->CERN) 
Change-Id: Ic1d0cad46a37a00714fa9b0cec5aa98ec9805a47
 		2020-11-04 15:54:25 +01:00
..
build@f281c76d96 gateware/icE1usb: Add custom pre-pack optimizations to fix build 2020-10-09 13:40:16 +02:00
common gateware/common: Fix whitespace formatting in wb_epbuf 2020-10-28 00:43:13 +01:00
cores firmware/ice40-riscv: Update no2usb core and fixup for API changes 2020-10-29 13:17:11 +01:00
doc gateware: Initial import of all common parts 2020-09-14 10:56:49 +02:00
e1-tracer gateware: Small tweaks and add option to ignore timing failure 2020-10-09 13:26:39 +02:00
icE1usb gateware/icE1usb: Add custom pre-pack optimizations to fix build 2020-10-09 13:40:16 +02:00
icE1usb-proto gateware: Small tweaks and add option to ignore timing failure 2020-10-09 13:26:39 +02:00
README.md gateware/README.md: Fix typo (CERL->CERN) 2020-11-04 15:54:25 +01:00

README.md

E1 related gateware

This directory contains the iCE40 gateware for various boards hosted in this repository.

Licensing

Most of the cores/HDL in here is licensed under one of the CERN OHL 2.0 license. See the doc/ subdirectory for the full license texts and refer to each file header to know the license applicable to each file.

Some files have been imported from other projects with compatible licenses. Refer to each file header for the proper copyright and license information.

The repository also includes submodules which have their own licensing and copyright terms.