163 lines
3.1 KiB
Verilog
163 lines
3.1 KiB
Verilog
/*
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* dfu_helper.v
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*
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* vim: ts=4 sw=4
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*
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* Copyright (C) 2020 Sylvain Munaut <tnt@246tNt.com>
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* SPDX-License-Identifier: CERN-OHL-P-2.0
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*/
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`default_nettype none
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module dfu_helper #(
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parameter integer TIMER_WIDTH = 24,
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parameter integer BTN_MODE = 3, // [2] Use btn_tick, [1] Include IO buffer, [0] Invert (active-low)
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parameter integer DFU_MODE = 0 // 0 = For user app, 1 = For bootloader
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)(
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// External control
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input wire [1:0] boot_sel,
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input wire boot_now,
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// Button
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input wire btn_pad,
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input wire btn_tick,
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// Outputs
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output wire btn_val,
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output reg rst_req,
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// Clock
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input wire clk,
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input wire rst
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);
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// Signals
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// -------
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// Button
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wire btn_iob;
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wire btn_v;
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wire btn_r;
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wire btn_f;
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// Timer and arming logic
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reg armed;
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reg [TIMER_WIDTH-1:0] timer;
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(* keep="true" *) wire timer_act;
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// Boot logic
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reg [1:0] wb_sel;
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reg wb_req;
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reg wb_now;
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// Button logic
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// ------------
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// IOB
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generate
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if (BTN_MODE[1])
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SB_IO #(
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.PIN_TYPE(6'b000000), // Reg input, no output
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.PULLUP(1'b1),
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.IO_STANDARD("SB_LVCMOS")
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) btn_iob_I (
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.PACKAGE_PIN(btn_pad),
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.INPUT_CLK (clk),
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.D_IN_0 (btn_iob)
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);
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else
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assign btn_iob = btn_pad;
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endgenerate
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// Deglitch
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glitch_filter #(
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.L(BTN_MODE[2] ? 2 : 4),
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.RST_VAL(BTN_MODE[0]),
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.WITH_SYNCHRONIZER(1),
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.WITH_SAMP_COND(BTN_MODE[2])
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) btn_flt_I (
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.in (btn_iob ^ BTN_MODE[0]),
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.samp_cond(btn_tick),
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.val (btn_v),
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.rise (btn_r),
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.fall (btn_f),
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.clk (clk),
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`ifdef SIM
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.rst (rst)
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`else
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// Don't reset so we let the filter settle before
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// the rest of the logic engages
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.rst (1'b0)
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`endif
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);
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assign btn_val = btn_v;
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// Arming & Timer
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// --------------
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assign timer_act = btn_v ^ armed;
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always @(posedge clk or posedge rst)
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if (rst)
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armed <= 1'b0;
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else
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armed <= armed | timer[TIMER_WIDTH-2];
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always @(posedge clk or posedge rst)
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if (rst)
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timer <= 0;
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else
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timer <= timer_act ? { TIMER_WIDTH{1'b0} } : (timer + { { (TIMER_WIDTH-1){1'b0} }, ~timer[TIMER_WIDTH-1] });
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// Boot Logic
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// ----------
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// Decision
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always @(posedge clk or posedge rst)
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if (rst) begin
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wb_sel <= 2'b00;
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wb_req <= 1'b0;
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rst_req <= 1'b0;
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end else if (~wb_req) begin
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if (boot_now) begin
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// External boot request
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wb_sel <= boot_sel;
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wb_req <= 1'b1;
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rst_req <= 1'b0;
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end else begin
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if (DFU_MODE == 1) begin
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// We're in a DFU bootloader, any button press results in
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// boot to application
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wb_sel <= 2'b10;
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wb_req <= wb_now | (armed & btn_f);
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rst_req <= 1'b0;
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end else begin
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// We're in user application, short press resets the
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// logic, long press triggers DFU reboot
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wb_sel <= 2'b01;
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wb_req <= wb_now | (armed & btn_f & timer[TIMER_WIDTH-1]);
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rst_req <= rst_req | (armed & btn_f & ~timer[TIMER_WIDTH-1]);
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end
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end
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end
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// Ensure select bits are set before the boot pulse
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always @(posedge clk or posedge rst)
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if (rst)
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wb_now <= 1'b0;
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else
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wb_now <= wb_req;
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// IP core
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SB_WARMBOOT warmboot (
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.BOOT(wb_now),
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.S0(wb_sel[0]),
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.S1(wb_sel[1])
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);
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endmodule // dfu_helper
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