145 lines
1.9 KiB
ArmAsm
145 lines
1.9 KiB
ArmAsm
/*
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* boot.S
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*
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* SPI boot code
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*
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* Copyright (C) 2020 Sylvain Munaut <tnt@246tNt.com>
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* SPDX-License-Identifier: MIT
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*/
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#ifndef APP_FLASH_ADDR
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#define APP_FLASH_ADDR 0x00100000
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#endif
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#ifndef APP_SRAM_ADDR
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#define APP_SRAM_ADDR 0x00020000
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#endif
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#ifndef APP_SIZE
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#define APP_SIZE 0x00010000
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#endif
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.section .text.start
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.global _start
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_start:
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// SPI init
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jal spi_init
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// Read from flash to SRAM
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li a0, APP_SRAM_ADDR
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li a1, APP_SIZE
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li a2, APP_FLASH_ADDR
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jal spi_flash_read
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// Setup reboot code
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li t0, 0x0002006f
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sw t0, 0(zero)
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// Jump to main code
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j APP_SRAM_ADDR
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.equ SPI_BASE, 0x80000000
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.equ SPICR0, 4 * 0x08
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.equ SPICR1, 4 * 0x09
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.equ SPICR2, 4 * 0x0a
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.equ SPIBR, 4 * 0x0b
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.equ SPISR, 4 * 0x0c
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.equ SPITXDR, 4 * 0x0d
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.equ SPIRXDR, 4 * 0x0e
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.equ SPICSR, 4 * 0x0f
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spi_init:
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li a0, SPI_BASE
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li a1, 0xff
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sw a1, SPICR0(a0)
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li a1, 0x80
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sw a1, SPICR1(a0)
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li a1, 0xc0
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sw a1, SPICR2(a0)
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li a1, 0x03
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sw a1, SPIBR(a0)
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li a1, 0x0f
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sw a1, SPICSR(a0)
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ret
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// Params:
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// a0 - destination pointer
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// a1 - length (bytes)
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// a2 - flash offset
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//
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spi_flash_read:
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// Save params
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mv s0, a0
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mv s1, a1
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mv s2, ra
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// Setup CS
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li t0, SPI_BASE
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li t1, 0x0e
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sw t1, SPICSR(t0)
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// Send command
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li a0, 0x03
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jal _spi_do_one
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srli a0, a2, 16
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and a0, a0, 0xff
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jal _spi_do_one
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srli a0, a2, 8
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and a0, a0, 0xff
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jal _spi_do_one
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and a0, a2, 0xff
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jal _spi_do_one
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// Read loop
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_spi_loop:
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li a0, 0x00
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jal _spi_do_one
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sb a0, 0(s0)
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addi s0, s0, 1
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addi s1, s1, -1
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bne s1, zero, _spi_loop
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// Release CS
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li t0, SPI_BASE
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li t1, 0x0f
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sw t1, SPICSR(t0)
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// Done
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jr s2
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// Params: a0 - Data to TX
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// Returns: a0 - RX data
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// Clobbers t0, t1
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_spi_do_one:
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li t0, SPI_BASE
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li t1, 0x08
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// Write TX data
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sw a0, SPITXDR(t0)
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// Wait for RXRDY
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1:
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lw a0, SPISR(t0)
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and a0, a0, t1
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bne a0, t1, 1b
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// Read RX data
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lw a0, SPIRXDR(t0)
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// Done
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ret
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