111 lines
2.3 KiB
ArmAsm
111 lines
2.3 KiB
ArmAsm
/*
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* start.S
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*
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* Startup code taken from picosoc/picorv32 and adapted for use here
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*
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* Copyright (C) 2017 Clifford Wolf <clifford@clifford.at>
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* Copyright (C) 2019 Sylvain Munaut <tnt@246tNt.com>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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.section .text.start
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.global _start
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_start:
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// zero-initialize register file
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addi x1, zero, 0
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// x2 (sp) is initialized by reset
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addi x3, zero, 0
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addi x4, zero, 0
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addi x5, zero, 0
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addi x6, zero, 0
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addi x7, zero, 0
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addi x8, zero, 0
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addi x9, zero, 0
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addi x10, zero, 0
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addi x11, zero, 0
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addi x12, zero, 0
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addi x13, zero, 0
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addi x14, zero, 0
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addi x15, zero, 0
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addi x16, zero, 0
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addi x17, zero, 0
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addi x18, zero, 0
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addi x19, zero, 0
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addi x20, zero, 0
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addi x21, zero, 0
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addi x22, zero, 0
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addi x23, zero, 0
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addi x24, zero, 0
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addi x25, zero, 0
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addi x26, zero, 0
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addi x27, zero, 0
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addi x28, zero, 0
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addi x29, zero, 0
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addi x30, zero, 0
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addi x31, zero, 0
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#ifdef BOOT_DEBUG
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// Set UART divisor
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li a0, 0x81000000
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li a1, 28
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sw a1, 4(a0)
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// Output '1'
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li a1, 49
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sw a1, 0(a0)
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#endif
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// copy data section
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la a0, _sidata
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la a1, _sdata
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la a2, _edata
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bge a1, a2, end_init_data
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loop_init_data:
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lw a3, 0(a0)
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sw a3, 0(a1)
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addi a0, a0, 4
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addi a1, a1, 4
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blt a1, a2, loop_init_data
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end_init_data:
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#ifdef BOOT_DEBUG
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// Output '2'
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li a0, 0x81000000
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li a1, 50
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sw a1, 0(a0)
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#endif
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// zero-init bss section
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la a0, _sbss
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la a1, _ebss
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bge a0, a1, end_init_bss
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loop_init_bss:
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sw zero, 0(a0)
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addi a0, a0, 4
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blt a0, a1, loop_init_bss
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end_init_bss:
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#ifdef BOOT_DEBUG
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// Output '3'
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li a0, 0x81000000
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li a1, 51
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sw a1, 0(a0)
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#endif
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// call main
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call main
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loop:
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j loop
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