Commit Graph

12 Commits

Author SHA1 Message Date
Harald Welte 95478a23ef Makefile: libraries should be in LIBS, not LDFLAGS 2020-08-14 00:07:19 +02:00
Sylvain Munaut d373558370 src: Add .gitignore for the software
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2018-05-16 20:23:56 +02:00
Sylvain Munaut 2c3c2757a5 osmo_e1f: Fix Makefile to use pkg-config
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2018-05-16 20:22:44 +02:00
Harald Welte 24531cebef rename osmo_e1 to osmo_e1f ("f" for "framer") 2018-05-16 20:13:38 +02:00
Harald Welte 82fb9b7ec8 osmo_e1: fix make clean 2018-05-12 15:57:47 +02:00
Harald Welte cdbcff9b18 CRC4: use proper CRC4 table to avoid bit-reversal of each byte
In commit 9bd2c9ffe7 we fixed the CRC4
computation by bit-reversing every byte before using it in the CRC
table.  This is of course a waste of CPU cycles.  Let's just compute
the CRC4 table slightly different (thanks to Dietter):

The following commands using pycrc from pycrc.org were used:
./pycrc.py --width=4 --poly=0x3 --reflect-in=false --reflect-out=false --xor-out=0 --xor-in=0 --algorithm table-driven  --generate c -o crc4itu.c
./pycrc.py --width=4 --poly=0x3 --reflect-in=false --reflect-out=false --xor-out=0 --xor-in=0 --algorithm table-driven  --generate h -o crc4itu.h
2018-05-12 09:44:03 +02:00
Harald Welte ce18a04b27 add e1_test_dieter to deframe/decode dieters capture 2018-05-11 22:00:46 +02:00
Harald Welte 8a95fd5481 osmo_e1: Add HDLC framing/deframing 2018-05-11 22:00:18 +02:00
Harald Welte 37e2374545 osmo_e1: Silence the FSM logging 2018-05-11 21:21:01 +02:00
Harald Welte 9bd2c9ffe7 HACK to make CRC4 computation work
* reverse bit-order of every input byte when computing CRC4
* reverse bit-order of CRC4 value we receive in TS0 bits

I don't really understand why, but this makes the CRC check pass.
We probably need another table if we want to avoid this.
2018-05-11 20:48:31 +02:00
Harald Welte d3941c6a98 osmo_e1.c: Fix handling of TS2..31 (use 'i', not '1') 2018-05-11 16:47:59 +02:00
Harald Welte 0c756eb5ec WIP: Software for E1 mux/demux 2018-05-07 15:37:26 +02:00