gateware: no_rw_check fixes to cope with new yosys BRAM inferrence

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Change-Id: Ic27dc22112f6603982126d447689dbe2202039c4
changes/18/29918/1
Sylvain Munaut 2 months ago
parent 9b3f2c4a6b
commit c756644205
  1. 1
      gateware/common/rtl/soc_bram.v
  2. 2
      gateware/cores/no2misc

@ -21,6 +21,7 @@ module soc_bram #(
input wire clk
);
(* no_rw_check *)
reg [31:0] mem [0:(1<<AW)-1];
initial

@ -1 +1 @@
Subproject commit f9d1d47620ce81e9545287c585a5e8f0873b1661
Subproject commit 59350da954e78424117ed01c55b5c7a12e524397
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