gateware/firmware: Match rx/tx tick order in register with doc

The documentation always had the rRX tick in the LSB which
is consistent with having the RX units before TX.

They can be read as 16 bit value anyway so there isn't any
performance impact.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
This commit is contained in:
Sylvain Munaut 2020-09-15 21:57:52 +02:00
parent f5d7bf2480
commit c1d117b6de
4 changed files with 5 additions and 5 deletions

View File

@ -16,8 +16,8 @@ struct misc {
uint32_t warmboot;
uint32_t _rsvd0[3];;
struct {
uint16_t tx;
uint16_t rx;
uint16_t tx;
} e1_tick[2];
uint32_t _rsvd1;
uint32_t time;

View File

@ -18,8 +18,8 @@ struct misc {
uint32_t e1_led;
uint32_t _rsvd;
struct {
uint16_t tx;
uint16_t rx;
uint16_t tx;
} e1_tick[2];
uint32_t gps;
uint32_t time;

View File

@ -76,8 +76,8 @@ module misc (
wb_rdata <= 32'h00000000;
else
case (wb_addr[3:0])
4'h4: wb_rdata <= { cap_e1_rx[0], 16'h0000 };
4'h5: wb_rdata <= { cap_e1_rx[1], 16'h0000 };
4'h4: wb_rdata <= { 16'h000, cap_e1_rx[0] };
4'h5: wb_rdata <= { 16'h000, cap_e1_rx[1] };
4'h7: wb_rdata <= cnt_time;
default: wb_rdata <= 32'hxxxxxxxx;
endcase

View File

@ -102,7 +102,7 @@ module misc (
wb_rdata <= 32'h00000000;
else
case (wb_addr[3:0])
4'h4: wb_rdata <= { cap_e1_rx, cap_e1_tx };
4'h4: wb_rdata <= { cap_e1_tx, cap_e1_rx };
4'h7: wb_rdata <= cnt_time;
4'h8: wb_rdata <= { pdm_clk[0][12], 19'h00000, pdm_clk[0][11:0] };
4'h9: wb_rdata <= { pdm_clk[1][12], 19'h00000, pdm_clk[1][11:0] };