188 lines
5.7 KiB
C
Executable File
188 lines
5.7 KiB
C
Executable File
/* $Id$
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*
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* mISDN driver for Colognechip HFC-S mini Evaluation Card
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*
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* Authors : Martin Bachem, Joerg Ciesielski
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* Contact : info@colognechip.com
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#ifndef __HFCMINI_H__
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#define __HFCMINI_H__
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#include "channel.h"
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#include "hfcsmcc.h"
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#define BRIDGE_UNKWOWN 0
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#define BRIDGE_HFCPCI 1
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/* use HFC-S PCI as PCI Bridge */
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#define HFCBRIDGE BRIDGE_HFCPCI
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#define SPIN_LOCK_HFCSMINI_REGISTER
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#define DRIVER_NAME "HFCMINI"
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#define CHIP_ID_HFCSMINI CHIP_ID
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#define MAX_CHAN 4 /* D, B1, B2, PCM */
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/* flags in _u16 port mode */
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#define PORT_UNUSED 0x0000
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#define PORT_MODE_NT 0x0001
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#define PORT_MODE_TE 0x0002
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#define PORT_MODE_BUS_MASTER 0x0004
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#define PORT_MODE_UP 0x0008
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#define PORT_MODE_EXCH_POL 0x0010
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#define PORT_MODE_LOOP 0x0020
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#define NT_TIMER 0x8000
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/* NT / TE defines */
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#define NT_T1_COUNT 12 /* number of 8ms interrupts for G2 timeout */
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#define CLK_DLY_TE 0x0e /* CLKDEL in TE mode */
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#define CLK_DLY_NT 0x6c /* CLKDEL in NT mode */
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#define STA_ACTIVATE 0x60 /* start activation in A_SU_WR_STA */
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#define STA_DEACTIVATE 0x40 /* start deactivation in A_SU_WR_STA */
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#define LIF_MODE_NT 0x04 /* Line Interface NT mode */
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/* HFC-S mini Layer1 physical commands */
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#define HFC_L1_ACTIVATE_TE 0x01
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#define HFC_L1_FORCE_DEACTIVATE_TE 0x02
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#define HFC_L1_ACTIVATE_NT 0x03
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#define HFC_L1_DEACTIVATE_NT 0x04
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#define HFC_L1_TESTLOOP_B1 0x05
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#define HFC_L1_TESTLOOP_B2 0x06
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/* FIFO handling support values */
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#define FIFO_IRQ_OFF 0
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#define FIFO_IRQ_ON 1
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#define FIFO_DISABLE 0
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#define FIFO_ENABLE 1
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#define FIFO_MASK_TX 0x55
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#define FIFO_MASK_RX 0xAA
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#define HDLC_PAR_BCH 0 /* init value for all B-channel fifos */
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#define HDLC_PAR_DCH (M1_BIT_CNT*2) /* same for D- and E-channel */
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#define CON_HDLC_B_TRANS (M_HDLC_TRP | M1_TRP_IRQ*2) /* transparent mode B-channel 32 byte threshold */
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#define CON_HDLC_B_HDLC (M1_TRP_IRQ*2) /* HDLC mode b-channel */
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#define CON_HDLC_D_HDLC (M1_TRP_IRQ*2 | M_IFF) /* HDLC mode D-channel, 1 fill mode */
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#define CON_HDLC_B_LOOP (M1_TRP_IRQ*2 | M1_DATA_FLOW*6) /* B-channel loopback mode */
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#define HFCSMINI_RX_THRESHOLD 32
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#define HFCSMINI_TX_THRESHOLD 96
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#define DCH_RX_SIZE 267
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#define BCH_RX_SIZE 2051
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#define BCH_RX_SIZE_TRANS 64
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/* DEBUG flags, use combined value for module parameter debug=x */
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#define DEBUG_HFC_INIT 0x0001
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#define DEBUG_HFC_MODE 0x0002
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#define DEBUG_HFC_S0_STATES 0x0004
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#define DEBUG_HFC_IRQ 0x0008
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#define DEBUG_HFC_FIFO_ERR 0x0010
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#define DEBUG_HFC_DTRACE 0x2000
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#define DEBUG_HFC_BTRACE 0x4000 /* very(!) heavy messageslog load */
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#define DEBUG_HFC_FIFO 0x8000 /* very(!) heavy messageslog load */
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/* private driver_data */
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typedef struct {
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int chip_id;
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char *device_name;
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} hfcsmini_param;
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struct _hfcmini_hw;
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/**********************/
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/* hardware structure */
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/**********************/
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typedef struct _hfcmini_hw {
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struct list_head list;
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__u32 irq_cnt; /* count irqs */
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struct tasklet_struct tasklet; /* interrupt bottom half */
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spinlock_t mlock; /* mISDN mq lock */
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spinlock_t rlock; /* register access lock */
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int cardnum;
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__u8 param_idx; /* used to access module param arrays */
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__u8 testirq;
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int irq;
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int iobase;
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u_char *membase;
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u_char *hw_membase;
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struct pci_dev *pdev;
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hfcsmini_param driver_data;
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char card_name[60];
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int max_fifo; /* always 4 fifos per port */
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__u8 max_z; /* fifo depth -1 */
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channel_t chan[MAX_CHAN]; /* line interfaces */
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__u8 fifomask;
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/* HFC-S MINI regsister */
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reg_r_chip_id chip_id; /* Chip ID */
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reg_r_pcm_md0 pcm_md0; /* PCM config */
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reg_r_pcm_md1 pcm_md1; /* PCM config */
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reg_r_pcm_md2 pcm_md2; /* PCM config */
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reg_r_ti ti; /* timer interrupt configuration */
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reg_r_fifo_irqmsk fifo_irqmsk; /* FIFO interrupt mask */
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reg_r_fifo_irq fifo_irq; /* FIFO interrupt state */
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reg_r_misc_irqmsk misc_irqmsk; /* MISC interrupt mask */
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reg_r_misc_irq misc_irq; /* MISC interrupt state */
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reg_r_st_ctrl0 st_ctrl0;
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reg_r_st_ctrl2 st_ctrl2;
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int nt_timer;
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__u8 dpid; /* DChannel Protocoll ID */
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__u16 portmode; /* NT/TE */
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} hfcsmini_hw;
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/* function prototypes */
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int setup_channel(hfcsmini_hw * hw, __u8 channel, int protocol);
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void hfcsmini_write_fifo(hfcsmini_hw * hw, __u8 channel);
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void hfcsmini_read_fifo(hfcsmini_hw * hw, __u8 channel);
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void print_fc(hfcsmini_hw * hw, __u8 fifo);
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void setup_fifo(hfcsmini_hw * hw, int fifo, __u8 hdlcreg, __u8 con_reg, __u8 irq_enable, __u8 enable);
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void setup_s(hfcsmini_hw * hw, __u8 bc, __u8 enable);
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void disable_interrupts(hfcsmini_hw * hw);
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void enable_interrupts(hfcsmini_hw * hw);
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static void release_card(hfcsmini_hw * hw);
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#if HFCBRIDGE == BRIDGE_HFCPCI
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int init_pci_bridge(hfcsmini_hw * hw);
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#endif
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/* HFC-S MINI register access functions */
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static inline void hfcsmini_sel_reg(hfcsmini_hw * hw, __u8 reg_addr);
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static inline __u8 read_hfcsmini(hfcsmini_hw * hw, __u8 reg_addr);
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static inline __u8 read_hfcsmini_irq(hfcsmini_hw * hw, __u8 reg_addr);
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static inline __u8 read_hfcsmini_stable(hfcsmini_hw * hw, __u8 reg_addr);
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static inline void write_hfcsmini(hfcsmini_hw * hw, __u8 reg_addr, __u8 value);
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#endif /* __hfcsmini_H__ */
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