- common HW layer channel model for B and D channel
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@ -26,7 +26,6 @@
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#include <linux/timer.h>
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#include "channel.h"
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#include "bchannel.h"
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#include "xhfc24succ.h"
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#define DRIVER_NAME "XHFC"
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@ -105,8 +104,7 @@
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#define DEBUG_HFC_FIFO 0x8000 /* very(!) heavy messageslog load */
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#define USE_F0_COUNTER 1 /* akkumulate F0 counter diff every irq */
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#define TRANSP_PACKET_SIZE 0 /* minium tranparent packet size for transmittion to upper layer */
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/* private driver_data */
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@ -116,22 +114,14 @@ typedef struct {
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} xhfc_param;
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/* channel struct for each fifo */
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typedef struct {
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bchannel_t *bch;
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channel_t *dch;
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int rx_idx; /* for D-channel */
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__u8 *rx_buf; /* for D-channel */
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int port; /* index pointer to port struct */
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} xhfc_chan_t;
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/* port struct for each S/U port */
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typedef struct {
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int idx;
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__u8 dpid; /* DChannel Protocoll ID */
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__u16 mode; /* NT/TE + ST/U */
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int nt_timer;
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u_long l1_flags;
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struct timer_list t3_timer; /* timer 3 for activation/deactivation */
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struct timer_list t4_timer; /* timer 4 for activation/deactivation */
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@ -143,6 +133,14 @@ typedef struct {
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reg_a_su_ctrl3 su_ctrl3;
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} xhfc_port_t;
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/* channel struct for each fifo */
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typedef struct {
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channel_t ch;
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xhfc_port_t * port;
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} xhfc_chan_t;
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struct _xhfx_hw;
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/**********************/
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@ -175,8 +173,9 @@ typedef struct _xhfx_hw {
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int num_ports; /* number of S and U interfaces */
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int max_fifo; /* always 4 fifos per port */
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__u8 max_z; /* fifo depth -1 */
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xhfc_chan_t chan[MAX_CHAN]; /* line interfaces */
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xhfc_port_t port[MAX_PORT];
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xhfc_port_t port[MAX_PORT]; /* one for each Line intercace */
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xhfc_chan_t chan[MAX_CHAN]; /* one each D/B/PCM channel */
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__u32 irq_cnt; /* count irqs */
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__u32 f0_cnt; /* last F0 counter value */
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