XDI driver user mode interface
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MelwareDE
parent
359049dfba
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@ -62,5 +62,35 @@
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#define unlikely(__x__) (!!(__x__))
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#endif
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#ifndef MIN
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#define MIN(a,b) ((a)>(b) ? (b) : (a))
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#endif
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#ifndef MAX
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#define MAX(a,b) ((a)>(b) ? (a) : (b))
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#endif
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#define DIVAS_CONTAINING_RECORD(address, type, field) \
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((type *)((char*)(address) - (char*)(&((type *)0)->field)))
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#define DIVA_STREAMING_MAX_TRACE_IDENT_LENGTH 4
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void* diva_os_malloc (unsigned long flags, unsigned long size);
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void diva_os_free (unsigned long flags, void* ptr);
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void diva_runtime_error_message (const char* fmt, ...);
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void diva_runtime_log_message (const char* fmt, ...);
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void diva_runtime_trace_message (const char* fmt, ...);
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void diva_runtime_binary_message (const void* data, dword length);
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#define DBG_ERR(__x__) do { diva_runtime_error_message __x__; } while (0);
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#define DBG_LOG(__x__) do { diva_runtime_log_message __x__; } while (0);
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#define DBG_TRC(__x__) do { diva_runtime_trace_message __x__; } while (0);
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#define DBG_BLK(__x__) do { diva_runtime_binary_message __x__; } while (0);
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#define dbg_init(__a__, __b__, __c__) do { diva_runtime_log_message("%s %s %u", __a__, __b__, __c__); } while (0)
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#include <string.h>
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#endif
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@ -0,0 +1,311 @@
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/*
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*
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Copyright (c) Dialogic (R) 2009 - 2010
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*
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This source file is supplied for the use with
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Eicon Networks range of DIVA Server Adapters.
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*
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Dialogic (R) File Revision : 1.9
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*
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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*
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY OF ANY KIND WHATSOEVER INCLUDING ANY
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implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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See the GNU General Public License for more details.
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*
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#ifndef __DIVA_XDI_UM_CFG_MESSSGE_H__
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#define __DIVA_XDI_UM_CFG_MESSAGE_H__
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/*
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Definition of commands for user mode configuration
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utility to XDI device driver
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*/
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/*
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XDI WRITE command
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*/
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#define DIVA_XDI_IO_CMD_WRITE_MSG 0x3701
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/*
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XDI READ command
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*/
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#define DIVA_XDI_IO_CMD_READ_MSG 0x3702
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/*
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Definition of messages used to communicate between
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XDI device driver and user mode configuration utility
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*/
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/*
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As acknowledge one DWORD - card ordinal will be read from the card
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*/
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#define DIVA_XDI_UM_CMD_GET_CARD_ORDINAL 0
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/*
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no acknowledge will be generated, memory block will be written in the
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memory at given offset
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*/
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#define DIVA_XDI_UM_CMD_WRITE_SDRAM_BLOCK 1
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/*
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no acknowledge will be genatated, FPGA will be programmed
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*/
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#define DIVA_XDI_UM_CMD_WRITE_FPGA 2
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/*
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As acknowledge block of SDRAM will be read in the user buffer
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*/
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#define DIVA_XDI_UM_CMD_READ_SDRAM 3
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/*
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As acknowledge dword with serial number will be read in the user buffer
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*/
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#define DIVA_XDI_UM_CMD_GET_SERIAL_NR 4
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/*
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As acknowledge struct consisting from 9 dwords with PCI info.
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dword[0...7] = 8 PCI BARS
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dword[9] = IRQ
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*/
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#define DIVA_XDI_UM_CMD_GET_PCI_HW_CONFIG 5
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/*
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Reset of the board + activation of primary
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boot loader
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*/
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#define DIVA_XDI_UM_CMD_RESET_ADAPTER 6
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/*
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Called after code download to start adapter
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at specified address
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Start does set new set of features due to fact that we not know
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if protocol features have changed
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*/
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#define DIVA_XDI_UM_CMD_START_ADAPTER 7
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/*
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Stop adapter, called if user
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wishes to stop adapter without unload
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of the driver, to reload adapter with
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different protocol
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*/
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#define DIVA_XDI_UM_CMD_STOP_ADAPTER 8
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/*
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Get state of current adapter
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Acknowledge is one dword with following values:
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0 - adapter ready for download
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1 - adapter running
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2 - adapter dead
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3 - out of service, driver should be restarted or hardware problem
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*/
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#define DIVA_XDI_UM_CMD_GET_CARD_STATE 9
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/*
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Reads XLOG entry from the card
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*/
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#define DIVA_XDI_UM_CMD_READ_XLOG_ENTRY 10
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/*
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Set untranslated protocol code features
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*/
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#define DIVA_XDI_UM_CMD_SET_PROTOCOL_FEATURES 11
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/*
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Start adapter test procedure
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*/
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#define DIVA_XDI_UM_CMD_ADAPTER_TEST 12
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/*
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Alloc DMA descriptor
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*/
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#define DIVA_XDI_UM_CMD_ALLOC_DMA_DESCRIPTOR 14
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/*
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Get hardware information structure
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*/
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#define DIVA_XDI_UM_CMD_GET_HW_INFO_STRUCT 15
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/*
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Change XDI driver protocol code version
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*/
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#define DIVA_XDI_UM_CMD_SET_PROTOCOL_CODE_VERSION 17
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/*
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Init VIDI, read VIDI info from driver
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*/
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#define DIVA_XDI_UM_CMD_INIT_VIDI 18
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/*
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Select VIDI mode
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*/
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#define DIVA_XDI_UM_CMD_SET_VIDI_MODE 19
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typedef struct _diva_xdi_um_cfg_cmd_set_vidi_mode {
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dword vidi_mode;
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} diva_xdi_um_cfg_cmd_set_vidi_mode_t;
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typedef struct _diva_xdi_um_cfg_cmd_data_init_vidi {
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dword req_magic_lo;
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dword req_magic_hi;
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dword ind_magic_lo;
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dword ind_magic_hi;
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dword dma_segment_length;
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dword dma_req_buffer_length;
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dword dma_ind_buffer_length;
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dword dma_ind_remote_counter_offset;
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} diva_xdi_um_cfg_cmd_data_init_vidi_t;
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/*
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Get clock memory info
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*/
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#define DIVA_XDI_UM_CMD_GET_CLOCK_MEMORY_INFO 20
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/*
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Read PLX register
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*/
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#define DIVA_XDI_UM_CMD_READ_WRITE_PLX_REGISTER 21
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/*
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Create DMA descriptor
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*/
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#define DIVA_XDI_UM_CMD_CREATE_XDI_DESCRIPTORS 22
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/*
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Clock interrupt
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*/
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#define DIVA_XDI_UM_CMD_CLOCK_INTERRUPT_CONTROL 23
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/*
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Clock interrupt data
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*/
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#define DIVA_XDI_UM_CMD_CLOCK_INTERRUPT_DATA 24
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/*
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BAR Access
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*/
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#define DIVA_XDI_UM_CMD_BAR_ACCESS 25
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typedef struct _diva_xdi_um_cfg_cmd_get_clock_memory_info {
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dword bus_addr_lo;
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dword bus_addr_hi;
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dword length;
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} diva_xdi_um_cfg_cmd_get_clock_memory_info_t;
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typedef struct _diva_xdi_um_cfg_cmd_data_alloc_dma_descriptor {
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dword nr;
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dword low;
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dword high;
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} diva_xdi_um_cfg_cmd_data_alloc_dma_descriptor_t;
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typedef struct _diva_xdi_um_cfg_cmd_data_adapter_test {
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dword test_command;
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} diva_xdi_um_cfg_cmd_data_adapter_test_t;
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typedef struct _diva_xdi_um_cfg_cmd_data_set_features {
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dword features;
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} diva_xdi_um_cfg_cmd_data_set_features_t;
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typedef struct _diva_xdi_um_cfg_cmd_data_start {
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dword offset;
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dword features;
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} diva_xdi_um_cfg_cmd_data_start_t;
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typedef struct _diva_xdi_um_cfg_cmd_data_write_sdram {
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dword ram_number;
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dword offset;
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dword length;
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} diva_xdi_um_cfg_cmd_data_write_sdram_t;
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typedef struct _diva_xdi_um_cfg_cmd_data_write_fpga {
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dword fpga_number;
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dword image_length;
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} diva_xdi_um_cfg_cmd_data_write_fpga_t;
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typedef struct _diva_xdi_um_cfg_cmd_data_read_sdram {
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dword ram_number;
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dword offset;
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dword length;
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} diva_xdi_um_cfg_cmd_data_read_sdram_t;
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typedef struct _diva_xdi_um_cfg_cmd_data_set_protocol_code_version {
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dword version;
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} diva_xdi_um_cfg_cmd_data_set_protocol_code_version_t;
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typedef struct _diva_xdi_um_cfg_cmd_read_write_plx_register {
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byte write;
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byte offset;
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byte length;
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dword value;
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} diva_xdi_um_cfg_cmd_read_write_plx_register_t;
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typedef struct _diva_xdi_um_cfg_cmd_clock_interrupt_control {
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dword command;
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} diva_xdi_um_cfg_cmd_clock_interrupt_control_t;
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typedef struct _diva_xdi_um_cfg_cmd_get_clock_interrupt_data {
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dword state;
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dword clock;
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dword errors;
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} diva_xdi_um_cfg_cmd_get_clock_interrupt_data_t;
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#define DIVA_BAR_ACCESS_TYPE_READ 0x00
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#define DIVA_BAR_ACCESS_TYPE_WRITE 0x01
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#define DIVA_BAR_ACCESS_TYPE_SINGLE 0x02
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#define DIVA_BAR_ACCESS_TYPE_BYTE 0x04
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#define DIVA_BAR_ACCESS_TYPE_WORD 0x08
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#define DIVA_BAR_ACCESS_TYPE_DWORD 0x10
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#define DIVA_BAR_ACCESS_TYPE_WRITE_READ 0x20
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typedef struct _diva_xdi_um_bar_access_data {
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byte bar;
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byte access_type;
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word length;
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dword offset;
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dword data;
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} diva_xdi_um_bar_access_data_t;
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typedef union _diva_xdi_um_cfg_cmd_data {
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diva_xdi_um_cfg_cmd_data_write_sdram_t write_sdram;
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diva_xdi_um_cfg_cmd_data_write_fpga_t write_fpga;
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diva_xdi_um_cfg_cmd_data_read_sdram_t read_sdram;
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diva_xdi_um_cfg_cmd_data_start_t start;
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diva_xdi_um_cfg_cmd_data_set_features_t features;
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diva_xdi_um_cfg_cmd_data_adapter_test_t test;
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diva_xdi_um_cfg_cmd_data_alloc_dma_descriptor_t dma;
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diva_xdi_um_cfg_cmd_data_set_protocol_code_version_t protocol_code_version;
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diva_xdi_um_cfg_cmd_data_init_vidi_t vidi;
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diva_xdi_um_cfg_cmd_set_vidi_mode_t vidi_mode;
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diva_xdi_um_cfg_cmd_get_clock_memory_info_t clock_memory;
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diva_xdi_um_cfg_cmd_read_write_plx_register_t plx_register;
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diva_xdi_um_cfg_cmd_clock_interrupt_control_t clock_interrupt_control;
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diva_xdi_um_cfg_cmd_get_clock_interrupt_data_t clock_interrupt_data;
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diva_xdi_um_bar_access_data_t bar_access_data;
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} diva_xdi_um_cfg_cmd_data_t;
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typedef struct _diva_xdi_um_cfg_cmd {
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dword adapter; /* Adapter number 1...N */
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dword command;
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diva_xdi_um_cfg_cmd_data_t command_data;
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dword data_length; /* Plain binary data will follow */
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} diva_xdi_um_cfg_cmd_t;
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typedef struct _diva_xdi_io_cmd {
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unsigned int length;
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void * cmd;
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} diva_xdi_io_cmd;
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#endif
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