uboot-mt623x/board/freescale/mpc8610hpcd
Timur Tabi 9ff32d8ccf mpc86xx: set the DDR BATs after calculating true DDR size
After determining how much DDR is actually in the system, set DBAT0 and
IBAT0 accordingly.  This ensures that the CPU won't attempt to access
(via speculation) addresses outside of actual memory.

On 86xx systems, DBAT0 and IBAT0 (the BATs for DDR) are initialized to 2GB
and kept that way.  If the system has less than 2GB of memory (typical for
an MPC8610 HPCD), the CPU may attempt to access this memory during
speculation.  The zlib code is notorious for generating such memory reads,
and indeed on the MPC8610, uncompressing the Linux kernel causes a machine
check (without this patch).

Currently we are limited to power of two sized DDR since we only use a
single bat.  If a non-power of two size is used that is less than
CONFIG_MAX_MEM_MAPPED u-boot will crash.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-03-30 10:50:22 -05:00
..
Makefile FSL DDR: Convert MPC8610HPCD to new DDR code. 2008-08-27 02:06:03 +02:00
config.mk 86xx: Remove redudant PLATFORM_CPPFLAGS 2009-08-28 17:12:37 -05:00
ddr.c fsl-ddr: use the 1T timing as default configuration 2009-01-23 17:03:14 -06:00
law.c mpc8610hpcd: Fix PCI mapping concepts 2009-01-13 15:27:46 -06:00
mpc8610hpcd.c mpc86xx: set the DDR BATs after calculating true DDR size 2010-03-30 10:50:22 -05:00
mpc8610hpcd_diu.c 85xx/86xx: Replace in8/out8 with in_8/out_8 on FSL boards 2009-07-22 10:16:55 -05:00
u-boot.lds ppc: Enable full relocation to RAM 2009-10-03 10:15:45 +02:00