uboot-mt623x/cpu/mpc85xx
Haiying Wang 950264317e Change DDR tlb start entry to CONFIG param for 85xx
So that we can locate the DDR tlb start entry to the value other than 8. By
default, it is still 8.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2009-01-13 16:47:07 -06:00
..
Makefile mpc85xx: Add support for the MPC8536 2008-08-27 11:43:54 -05:00
commproc.c rename CFG_ macros to CONFIG_SYS 2008-10-18 21:54:03 +02:00
config.mk 85xx: Add -mno-spe to e500/85xx builds 2008-04-29 20:08:43 +02:00
cpu.c mpc8[56]xx: Put localbus clock in sysinfo and gd 2008-12-19 18:32:49 -06:00
cpu_init.c 85xx: init gd as early as possible 2008-12-04 03:15:43 -06:00
ddr-gen1.c rename CFG_ macros to CONFIG_SYS 2008-10-18 21:54:03 +02:00
ddr-gen2.c rename CFG_ macros to CONFIG_SYS 2008-10-18 21:54:03 +02:00
ddr-gen3.c 85xx: Fix the incorrect register used for DDR erratum1 2008-10-24 17:29:37 -05:00
ether_fcc.c rename CFG_ macros to CONFIG_SYS 2008-10-18 21:54:03 +02:00
fdt.c mpc8[56]xx: Put localbus clock in device tree 2008-12-19 18:20:20 -06:00
interrupts.c rename CFG_ macros to CONFIG_SYS 2008-10-18 21:54:03 +02:00
mp.c rename CFG_ macros to CONFIG_SYS 2008-10-18 21:54:03 +02:00
mp.h 85xx: Add cpu_mp_lmb_reserve helper to reserve boot page 2008-03-26 11:43:04 -05:00
mpc8536_serdes.c rename CFG_ macros to CONFIG_SYS 2008-10-18 21:54:03 +02:00
pci.c 85xx: Add PORDEVSR_PCI1 define 2008-12-04 03:15:43 -06:00
qe_io.c rename CFG_ macros to CONFIG_SYS 2008-10-18 21:54:03 +02:00
release.S Set IVPR to kenrel entry point in second core boot page 2008-12-19 18:32:41 -06:00
resetvec.S * Patches by Xianghua Xiao, 15 Oct 2003: 2003-10-15 23:53:47 +00:00
serial_scc.c rename CFG_ macros to CONFIG_SYS 2008-10-18 21:54:03 +02:00
speed.c mpc8[56]xx: Put localbus clock in sysinfo and gd 2008-12-19 18:32:49 -06:00
start.S 85xx: Fix the boot window issue 2008-12-19 18:32:48 -06:00
tlb.c Change DDR tlb start entry to CONFIG param for 85xx 2009-01-13 16:47:07 -06:00
traps.c rename CFG_ macros to CONFIG_SYS 2008-10-18 21:54:03 +02:00