Trent Piepho a5d212a263 mpc8xxx: LCRR[CLKDIV] is sometimes five bits ... On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits instead of four. In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It should be safe as the fifth bit was defined as reserved and set to 0. Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jon Loeliger <jdl@freescale.com>		2008-12-19 18:20:25 -06:00
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tqm8xx	Update U-Boot's build timestamp on every compile	2008-12-06 23:36:43 +01:00
tqm85xx	mpc8xxx: LCRR[CLKDIV] is sometimes five bits	2008-12-19 18:20:25 -06:00
tqm834x	rename CFG_ macros to CONFIG_SYS	2008-10-18 21:54:03 +02:00
tqm5200	rename CFG_ macros to CONFIG_SYS	2008-10-18 21:54:03 +02:00
tqm8260	TQM8260: use CFI flash driver instead of custom driver.	2008-11-02 16:24:16 +01:00
tqm8272	rename CFG_ macros to CONFIG_SYS	2008-10-18 21:54:03 +02:00