108 lines
2.9 KiB
C
108 lines
2.9 KiB
C
/*
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* (C) 2010 by Tieto <www.tieto.com>
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* Marcin Mielczarczyk <marcin.mielczarczyk@tieto.com>
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*
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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*/
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#include <common.h>
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#include <nand.h>
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#include <asm/io.h>
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#include <asm/arch-mtk/nfi.h>
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#include <asm/arch-mtk/system.h>
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static void mtk_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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{
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struct nand_chip *chip = mtd->priv;
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static int addr_bit = 0;
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static int address = 0;
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static int command = 0;
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if (ctrl == (NAND_CTRL_CHANGE | NAND_NCE)) {
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chip->IO_ADDR_R = (void *)MTK_NFI_DATARB;
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if (addr_bit) {
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/*
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while(!((readw(MTK_NFI_FIFOSTA) & 0xFF) == NFI_FIFOSTA_RD_EMPTY))
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readb(MTK_NFI_DATARB);*/
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writel(address, MTK_NFI_ADDRL);
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if (command == NAND_CMD_READID ||
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command == NAND_CMD_STATUS) {
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writeb(1, MTK_NFI_ADDRNOB);
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while(readl(MTK_NFI_PSTA) & NFI_PSTA_ADDR)
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;
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writel(NFI_OPCON_SRD, MTK_NFI_OPCON);
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} else {
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writeb(addr_bit >> 3, MTK_NFI_ADDRNOB);
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while(readl(MTK_NFI_PSTA) & NFI_PSTA_ADDR)
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;
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writel(NFI_OPCON_BRD, MTK_NFI_OPCON);
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}
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addr_bit = 0;
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}
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} else if ((ctrl & NAND_CLE) && (cmd != NAND_CMD_NONE)) {
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command = cmd;
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writel(cmd, MTK_NFI_CMD);
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while(readl(MTK_NFI_PSTA) & NFI_PSTA_CMD)
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;
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} else if (ctrl & NAND_ALE) {
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if (!addr_bit)
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address = cmd;
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else
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address |= cmd << addr_bit;
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addr_bit += 8;
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}
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}
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static int mtk_dev_ready(struct mtd_info *mtd)
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{
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return !(readl(MTK_NFI_PSTA) & NFI_PSTA_NAND_BUSY);
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}
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int board_nand_init(struct nand_chip *nand)
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{
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/* Power on NFI controller */
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writel(PDN_CON1_NFI, MTK_CONFG_PDN_CLR1);
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/* Configure for max wait times */
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writel(3 << NFI_ACCCON_RLT_SHIFT |
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3 << NFI_ACCCON_WST_SHIFT |
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3 << NFI_ACCCON_WH_SHIFT |
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3 << NFI_ACCCON_W2R_SHIFT |
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3 << NFI_ACCCON_C2R_SHIFT |
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7 << NFI_ACCCON_LCD2NAND_SHIFT,
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MTK_NFI_ACCCON);
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/* Flush and reset NFI FIFO */
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writel(NFI_OPCON_FIFO_FLUSH | NFI_OPCON_FIFO_RST, MTK_NFI_OPCON);
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while(readl(MTK_NFI_OPCON))
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;
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writel(NFI_PAGEFMT_PSIZE_2048 |
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NFI_PAGEFMT_ADRMODE_LARGE_8IO |
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NFI_PAGEFMT_ECCBLKSIZE_1024,
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MTK_NFI_PAGEFMT);
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writel(NFI_CON_SPARE_EN, MTK_NFI_CON);
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nand->cmd_ctrl = mtk_cmd_ctrl;
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nand->dev_ready = mtk_dev_ready;
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nand->ecc.mode = NAND_ECC_SOFT;
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return 0;
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}
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