91 lines
3.3 KiB
C
91 lines
3.3 KiB
C
/*
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* (C) 2010 by Tieto <www.tieto.com>
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* Marcin Mielczarczyk <marcin.mielczarczyk@tieto.com>
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*
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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*/
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#ifndef __MT62XX_SERIAL_H_
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#define __MT62XX_SERIAL_H_
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/* MT62XX UART register definitions */
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#define MTK_UART_DR 0x00 /* RX or TX buffer register */
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#define MTK_UART_IER 0x04 /* Interrupt enable register */
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#define MTK_UART_FCR 0x08 /* FIFO control register */
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#define MTK_UART_LCR 0x0C /* Line control register */
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#define MTK_UART_MCR 0x10 /* Modem control register */
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#define MTK_UART_LSR 0x14 /* Line status register */
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#define MTK_UART_MSR 0x14 /* Modem status register */
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#define MTK_UART_SCR 0x1C /* Scratch register */
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#define MTK_UART_AUTOBAUD_EN 0x20 /* Autobaud enable */
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#define MTK_UART_HIGHSPEED 0x24 /* High speed UART */
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#define MTK_UART_SAMPLE_COUNT 0x28
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#define MTK_UART_SAMPLE_POINT 0x2C
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#define MTK_UART_AUTOBAUD_REG 0x30
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#define MTK_UART_RATEFIX_AD 0x34 /* Rate fix address */
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#define MTK_UART_AUTOBAUD_SAMPLE 0x38
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#define MTK_UART_GUARD 0x3C /* Guard time added */
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#define MTK_UART_ESCAPE_DAT 0x40 /* Escape character */
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#define MTK_UART_ESCAPE_EN 0x44 /* Escape enable */
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#define MTK_UART_SLEEP_EN 0x48 /* Sleep enable */
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#define MTK_UART_VFIFO_EN 0x4C /* Virtual FIFO enable */
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#define MTK_UART_RXTRI_AD 0x50 /* RX trigger address */
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/* Registers available when LCR[7] = 1 (bit DLAB) */
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#define MTK_UART_DLL 0x00 /* Divisor latch (LS) */
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#define MTK_UART_DLM 0x04 /* Divisor latch (MS) */
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/* Registers available when LCR = 0xBF */
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#define MTK_UART_EFR 0x08 /* Enhanced feature register */
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#define MTK_UART_XON1 0x10
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#define MTK_UART_XON2 0x14
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#define MTK_UART_XOFF1 0x18
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#define MTK_UART_XOFF2 0x1C
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/* UART_FCR bit fields definitions */
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#define UART_FCR_FIFOE (1 << 0)
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#define UART_FCR_CLRR (1 << 1)
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#define UART_FCR_CLRT (1 << 2)
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#define UART_FCR_DMA1 (1 << 3)
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#define UART_FCR_TFTL0 (1 << 4)
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#define UART_FCR_TFTL1 (1 << 5)
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#define UART_FCR_RTFL0 (1 << 6)
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#define UART_FCR_RTFL1 (1 << 7)
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/* UART_LCR bit fields definitions */
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#define UART_LCR_WLS0 (1 << 0)
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#define UART_LCR_WLS1 (1 << 1)
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#define UART_LCR_STB (1 << 2)
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#define UART_LCR_PEN (1 << 3)
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#define UART_LCR_EPS (1 << 4)
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#define UART_LCR_SP (1 << 5)
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#define UART_LCR_SB (1 << 6)
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#define UART_LCR_DLAB (1 << 7)
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/* UART_LSR bit fields definitions */
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#define UART_LSR_DR (1 << 0)
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#define UART_LSR_OE (1 << 1)
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#define UART_LSR_PE (1 << 2)
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#define UART_LSR_FE (1 << 3)
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#define UART_LSR_BI (1 << 4)
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#define UART_LSR_THRE (1 << 5)
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#define UART_LSR_TEMT (1 << 6)
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#define UART_LSR_FIFOERR (1 << 7)
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#endif
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