153 lines
5.9 KiB
C
153 lines
5.9 KiB
C
/*
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* (C) 2010 by Tieto <www.tieto.com>
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* Marcin Mielczarczyk <marcin.mielczarczyk@tieto.com>
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*
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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*/
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#ifndef __MTK_NFI_H_
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#define __MTK_NFI_H_
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/* Nand Flash Interface register definitions */
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#define MTK_NFI_ACCCON (MTK_NFI_BASE + 0x00)
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#define MTK_NFI_PAGEFMT (MTK_NFI_BASE + 0x04)
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#define MTK_NFI_OPCON (MTK_NFI_BASE + 0x08)
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#define MTK_NFI_CMD (MTK_NFI_BASE + 0x10)
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#define MTK_NFI_ADDRNOB (MTK_NFI_BASE + 0x20)
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#define MTK_NFI_ADDRL (MTK_NFI_BASE + 0x24)
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#define MTK_NFI_ADDRM (MTK_NFI_BASE + 0x28)
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#define MTK_NFI_DATAW (MTK_NFI_BASE + 0x30)
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#define MTK_NFI_DATAWB (MTK_NFI_BASE + 0x34)
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#define MTK_NFI_DATAR (MTK_NFI_BASE + 0x38)
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#define MTK_NFI_DATARB (MTK_NFI_BASE + 0x3C)
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#define MTK_NFI_PSTA (MTK_NFI_BASE + 0x40)
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#define MTK_NFI_FIFOSTA (MTK_NFI_BASE + 0x44)
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#define MTK_NFI_CON (MTK_NFI_BASE + 0x60)
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#define MTK_NFI_INTR_EN (MTK_NFI_BASE + 0x68)
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#define MTK_NFI_PAGECNTR (MTK_NFI_BASE + 0x70)
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#define MTK_NFI_ADDRCNTR (MTK_NFI_BASE + 0x74)
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#define MTK_NFI_SYM0_ADDR (MTK_NFI_BASE + 0x80)
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#define MTK_NFI_SYM1_ADDR (MTK_NFI_BASE + 0x84)
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#define MTK_NFI_SYM2_ADDR (MTK_NFI_BASE + 0x88)
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#define MTK_NFI_SYM3_ADDR (MTK_NFI_BASE + 0x8C)
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#define MTK_NFI_SYM4_ADDR (MTK_NFI_BASE + 0x90)
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#define MTK_NFI_SYM5_ADDR (MTK_NFI_BASE + 0x94)
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#define MTK_NFI_SYM6_ADDR (MTK_NFI_BASE + 0x98)
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#define MTK_NFI_SYM7_ADDR (MTK_NFI_BASE + 0x9C)
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#define MTK_NFI_SYMS0_ADDR (MTK_NFI_BASE + 0xA0)
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#define MTK_NFI_SYMS1_ADDR (MTK_NFI_BASE + 0xA4)
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#define MTK_NFI_SYMS2_ADDR (MTK_NFI_BASE + 0xA8)
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#define MTK_NFI_SYMS3_ADDR (MTK_NFI_BASE + 0xAC)
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#define MTK_NFI_SYM0_DATA (MTK_NFI_BASE + 0xB0)
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#define MTK_NFI_SYM1_DATA (MTK_NFI_BASE + 0xB4)
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#define MTK_NFI_SYM2_DATA (MTK_NFI_BASE + 0xB8)
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#define MTK_NFI_SYM3_DATA (MTK_NFI_BASE + 0xBC)
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#define MTK_NFI_SYM4_DATA (MTK_NFI_BASE + 0xC0)
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#define MTK_NFI_SYM5_DATA (MTK_NFI_BASE + 0xC4)
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#define MTK_NFI_SYM6_DATA (MTK_NFI_BASE + 0xC8)
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#define MTK_NFI_SYM7_DATA (MTK_NFI_BASE + 0xCC)
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#define MTK_NFI_SYMS0_DATA (MTK_NFI_BASE + 0xD0)
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#define MTK_NFI_SYMS1_DATA (MTK_NFI_BASE + 0xD4)
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#define MTK_NFI_SYMS2_DATA (MTK_NFI_BASE + 0xD8)
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#define MTK_NFI_SYMS3_DATA (MTK_NFI_BASE + 0xDC)
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#define MTK_NFI_PAR_0P (MTK_NFI_BASE + 0xE0)
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#define MTK_NFI_PAR_0C (MTK_NFI_BASE + 0xE4)
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#define MTK_NFI_PAR_1P (MTK_NFI_BASE + 0xE8)
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#define MTK_NFI_PAR_1C (MTK_NFI_BASE + 0xEC)
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#define MTK_NFI_PAR_2P (MTK_NFI_BASE + 0xF0)
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#define MTK_NFI_PAR_2C (MTK_NFI_BASE + 0xF4)
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#define MTK_NFI_PAR_3P (MTK_NFI_BASE + 0xF8)
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#define MTK_NFI_PAR_3C (MTK_NFI_BASE + 0xFC)
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#define MTK_NFI_PAR_4P (MTK_NFI_BASE + 0x100)
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#define MTK_NFI_PAR_4C (MTK_NFI_BASE + 0x104)
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#define MTK_NFI_PAR_5P (MTK_NFI_BASE + 0x108)
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#define MTK_NFI_PAR_5C (MTK_NFI_BASE + 0x10C)
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#define MTK_NFI_PAR_6P (MTK_NFI_BASE + 0x110)
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#define MTK_NFI_PAR_6C (MTK_NFI_BASE + 0x114)
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#define MTK_NFI_PAR_7P (MTK_NFI_BASE + 0x118)
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#define MTK_NFI_PAR_7C (MTK_NFI_BASE + 0x11C)
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#define MTK_NFI_PARS_0P (MTK_NFI_BASE + 0x120)
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#define MTK_NFI_PARS_0C (MTK_NFI_BASE + 0x124)
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#define MTK_NFI_PARS_1P (MTK_NFI_BASE + 0x128)
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#define MTK_NFI_PARS_1C (MTK_NFI_BASE + 0x12C)
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#define MTK_NFI_PARS_2P (MTK_NFI_BASE + 0x130)
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#define MTK_NFI_PARS_2C (MTK_NFI_BASE + 0x134)
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#define MTK_NFI_PARS_3P (MTK_NFI_BASE + 0x138)
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#define MTK_NFI_PARS_3C (MTK_NFI_BASE + 0x13C)
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#define MTK_NFI_ERRDET (MTK_NFI_BASE + 0x140)
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#define MTK_NFI_PARERR (MTK_NFI_BASE + 0x144)
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#define MTK_NFI_SCON (MTK_NFI_BASE + 0x148)
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#define MTK_NFI_CSEL (MTK_NFI_BASE + 0x200)
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#define MTK_NFI_IOCON (MTK_NFI_BASE + 0x204)
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/* NFI_ACCCON bit fields definitions */
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#define NFI_ACCCON_RLT_SHIFT (0)
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#define NFI_ACCCON_WST_SHIFT (4)
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#define NFI_ACCCON_WH_SHIFT (8)
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#define NFI_ACCCON_W2R_SHIFT (12)
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#define NFI_ACCCON_C2R_SHIFT (16)
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#define NFI_ACCCON_LCD2NAND_SHIFT (28)
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/* NFI_PAGEFMT bit fields definitions */
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#define NFI_PAGEFMT_PSIZE_512 (0)
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#define NFI_PAGEFMT_PSIZE_2048 (1 << 0)
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#define NFI_PAGEFMT_ADRMODE_NORMAL (0 << 2)
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#define NFI_PAGEFMT_ADRMODE_LARGE_8IO (1 << 2)
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#define NFI_PAGEFMT_ADRMODE_LARGE_16IO (2 << 2)
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#define NFI_PAGEFMT_ECCBLKSIZE_128 (0 << 4)
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#define NFI_PAGEFMT_ECCBLKSIZE_256 (1 << 4)
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#define NFI_PAGEFMT_ECCBLKSIZE_512 (2 << 4)
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#define NFI_PAGEFMT_ECCBLKSIZE_1024 (3 << 4)
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#define NFI_PAGEFMT_B16EN (1 << 8)
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/* NFI_OPCON bit fields definitions */
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#define NFI_OPCON_BRD (1 << 0)
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#define NFI_OPCON_BWR (1 << 1)
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#define NFI_OPCON_SRD (1 << 8)
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#define NFI_OPCON_FIFO_FLUSH (1 << 10)
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#define NFI_OPCON_FIFO_RST (1 << 11)
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#define NFI_OPCON_NOB (1 << 12)
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/* NFI_PSTA bit fields definitions */
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#define NFI_PSTA_CMD (1 << 0)
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#define NFI_PSTA_ADDR (1 << 1)
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#define NFI_PSTA_DATAR (1 << 2)
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#define NFI_PSTA_DATAW (1 << 3)
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#define NFI_PSTA_BUSY (1 << 8)
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#define NFI_PSTA_NAND_BUSY (1 << 9)
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/* NFI_FIFOSTA bit fields definitions */
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#define NFI_FIFOSTA_RD_EMPTY (1 << 6)
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#define NFI_FIFOSTA_RD_FULL (1 << 7)
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#define NFI_FIFOSTA_WR_EMPTY (1 << 14)
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#define NFI_FIFOSTA_WR_FULL (1 << 15)
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/* NFI_CON bit fields definitions */
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#define NFI_CON_DMA_RD_EN (1 << 0)
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#define NFI_CON_DMA_WR_EN (1 << 1)
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#define NFI_CON_AUTOECC_DEC_EN (1 << 2)
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#define NFI_CON_AUTOECC_ENC_EN (1 << 3)
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#define NFI_CON_MULTI_PAGE_RD_EN (1 << 4)
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#define NFI_CON_SPARE_EN (1 << 5)
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#define NFI_CON_DMA_PAUSE_EN (1 << 6)
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#define NFI_CON_SPARE_ECC_EN (1 << 8)
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#define NFI_CON_MAIN_ECC_EN (1 << 9)
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#define NFI_CON_BYTE_RW (1 << 15)
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#endif
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