uboot-mt623x/board/freescale/mpc8610hpcd
Dave Liu b4983e16d1 fsl-ddr: use the 1T timing as default configuration
For light loaded system, we use the 1T timing to gain better
memory performance, but for some heavily loaded system,
you have to add the 2T timing options to board files.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2009-01-23 17:03:14 -06:00
..
Makefile FSL DDR: Convert MPC8610HPCD to new DDR code. 2008-08-27 02:06:03 +02:00
config.mk MPC8610HPCD: Drop -O2 from the build flags 2008-05-03 20:49:10 +02:00
ddr.c fsl-ddr: use the 1T timing as default configuration 2009-01-23 17:03:14 -06:00
law.c mpc8610hpcd: Fix PCI mapping concepts 2009-01-13 15:27:46 -06:00
mpc8610hpcd.c mpc8610hpcd: Fix PCI mapping concepts 2009-01-13 15:27:46 -06:00
mpc8610hpcd_diu.c rename CFG_ macros to CONFIG_SYS 2008-10-18 21:54:03 +02:00
u-boot.lds Align end of bss by 4 bytes 2008-11-18 23:13:16 +01:00