117 lines
3.3 KiB
C
117 lines
3.3 KiB
C
/*
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* Copyright (C) 2009 Jens Scharsig (js_at_ng@scharsoft.de)
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef AT91_MATRIX_H
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#define AT91_MATRIX_H
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#ifdef __ASSEMBLY__
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#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20)
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#define AT91_ASM_MATRIX_CSA0 (AT91_MATRIX_BASE + 0x11C)
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#elif defined(CONFIG_AT91SAM9261)
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#define AT91_ASM_MATRIX_CSA0 (AT91_MATRIX_BASE + 0x30)
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#elif defined(CONFIG_AT91SAM9263)
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#define AT91_ASM_MATRIX_CSA0 (AT91_MATRIX_BASE + 0x120)
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#elif defined(CONFIG_AT91SAM9G45)
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#define AT91_ASM_MATRIX_CSA0 (AT91_MATRIX_BASE + 0x128)
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#else
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#error AT91_ASM_MATRIX_CSA0 is not definied for current CPU
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#endif
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#define AT91_ASM_MATRIX_MCFG AT91_MATRIX_BASE
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#else
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#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20)
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#define AT91_MATRIX_MASTERS 6
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#define AT91_MATRIX_SLAVES 5
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#elif defined(CONFIG_AT91SAM9261)
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#define AT91_MATRIX_MASTERS 1
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#define AT91_MATRIX_SLAVES 5
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#elif defined(CONFIG_AT91SAM9263)
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#define AT91_MATRIX_MASTERS 9
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#define AT91_MATRIX_SLAVES 7
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#elif defined(CONFIG_AT91SAM9G45)
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#define AT91_MATRIX_MASTERS 11
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#define AT91_MATRIX_SLAVES 8
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#else
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#error CPU not supported. Please update at91_matrix.h
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#endif
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typedef struct at91_priority {
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u32 a;
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u32 b;
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} at91_priority_t;
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typedef struct at91_matrix {
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u32 mcfg[AT91_MATRIX_MASTERS];
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#if defined(CONFIG_AT91SAM9261)
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u32 scfg[AT91_MATRIX_SLAVES];
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u32 res61_1[3];
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u32 tcr;
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u32 res61_2[2];
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u32 csa;
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u32 pucr;
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u32 res61_3[114];
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#else
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u32 reserve1[16 - AT91_MATRIX_MASTERS];
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u32 scfg[AT91_MATRIX_SLAVES];
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u32 reserve2[16 - AT91_MATRIX_SLAVES];
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at91_priority_t pr[AT91_MATRIX_SLAVES];
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u32 reserve3[32 - (2 * AT91_MATRIX_SLAVES)];
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u32 mrcr; /* 0x100 Master Remap Control */
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u32 reserve4[3];
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#if defined(CONFIG_AT91SAM9G45)
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u32 ccr[52]; /* 0x110 - 0x1E0 Chip Configuration */
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u32 womr; /* 0x1E4 Write Protect Mode */
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u32 wpsr; /* 0x1E8 Write Protect Status */
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u32 resg45_1[10];
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#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20)
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u32 res60_1[3];
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u32 csa;
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u32 res60_2[56];
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#elif defined(CONFIG_AT91SAM9263)
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u32 res63_1;
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u32 tcmr;
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u32 res63_2[2];
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u32 csa[2];
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u32 res63_3[54];
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#else
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u32 reserve5[60];
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#endif
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#endif
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} at91_matrix_t;
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#endif /* __ASSEMBLY__ */
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#define AT91_MATRIX_CSA_DBPUC 0x00000100
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#define AT91_MATRIX_CSA_VDDIOMSEL_1_8V 0x00000000
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#define AT91_MATRIX_CSA_VDDIOMSEL_3_3V 0x00010000
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#define AT91_MATRIX_CSA_EBI_CS1A 0x00000002
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#define AT91_MATRIX_CSA_EBI_CS3A 0x00000008
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#define AT91_MATRIX_CSA_EBI_CS4A 0x00000010
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#define AT91_MATRIX_CSA_EBI_CS5A 0x00000020
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#define AT91_MATRIX_CSA_EBI1_CS2A 0x00000008
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#endif
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