142 lines
3.3 KiB
C
142 lines
3.3 KiB
C
/*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian.pop@leadtechdesign.com>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/at91_pit.h>
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#include <asm/arch/at91_pmc.h>
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#include <asm/arch/clk.h>
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#include <asm/arch/io.h>
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#include <div64.h>
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#if !defined(CONFIG_AT91FAMILY)
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# error You need to define CONFIG_AT91FAMILY in your board config!
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* We're using the AT91CAP9/SAM9 PITC in 32 bit mode, by
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* setting the 20 bit counter period to its maximum (0xfffff).
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* (See the relevant data sheets to understand that this really works)
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*
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* We do also mimic the typical powerpc way of incrementing
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* two 32 bit registers called tbl and tbu.
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*
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* Those registers increment at 1/16 the main clock rate.
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*/
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#define TIMER_LOAD_VAL 0xfffff
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static inline unsigned long long tick_to_time(unsigned long long tick)
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{
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tick *= CONFIG_SYS_HZ;
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do_div(tick, gd->timer_rate_hz);
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return tick;
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}
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static inline unsigned long long usec_to_tick(unsigned long long usec)
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{
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usec *= gd->timer_rate_hz;
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do_div(usec, 1000000);
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return usec;
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}
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/*
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* Use the PITC in full 32 bit incrementing mode
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*/
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int timer_init(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
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at91_pit_t *pit = (at91_pit_t *) AT91_PIT_BASE;
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/* Enable PITC Clock */
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writel(1 << AT91_ID_SYS, &pmc->pcer);
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/* Enable PITC */
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writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);
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gd->timer_rate_hz = gd->mck_rate_hz / 16;
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gd->tbu = gd->tbl = 0;
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return 0;
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}
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/*
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* Get the current 64 bit timer tick count
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*/
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unsigned long long get_ticks(void)
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{
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at91_pit_t *pit = (at91_pit_t *) AT91_PIT_BASE;
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ulong now = readl(&pit->piir);
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/* increment tbu if tbl has rolled over */
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if (now < gd->tbl)
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gd->tbu++;
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gd->tbl = now;
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return (((unsigned long long)gd->tbu) << 32) | gd->tbl;
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}
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void __udelay(unsigned long usec)
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{
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unsigned long long tmp;
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ulong tmo;
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tmo = usec_to_tick(usec);
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tmp = get_ticks() + tmo; /* get current timestamp */
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while (get_ticks() < tmp) /* loop till event */
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;
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}
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/*
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* reset_timer() and get_timer(base) are a pair of functions that are used by
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* some timeout/sleep mechanisms in u-boot.
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*
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* reset_timer() marks the current time as epoch and
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* get_timer(base) works relative to that epoch.
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*
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* The time is used in CONFIG_SYS_HZ units!
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*/
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void reset_timer(void)
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{
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gd->timer_reset_value = get_ticks();
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}
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ulong get_timer(ulong base)
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{
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return tick_to_time(get_ticks() - gd->timer_reset_value) - base;
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}
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/*
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* Return the number of timer ticks per second.
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*/
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ulong get_tbclk(void)
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{
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return gd->timer_rate_hz;
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}
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