141 lines
4.0 KiB
C
141 lines
4.0 KiB
C
/*
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* (C) Copyright 2007-2008
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <watchdog.h>
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#include <command.h>
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#include <asm/cache.h>
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#include <ppc4xx.h>
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#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
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#include <libfdt.h>
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#include <libfdt_env.h>
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#include <fdt_support.h>
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#include <asm/4xx_pcie.h>
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DECLARE_GLOBAL_DATA_PTR;
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void __ft_board_setup(void *blob, bd_t *bd)
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{
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u32 val[4];
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int rc;
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ft_cpu_setup(blob, bd);
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/* Fixup NOR mapping */
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val[0] = 0; /* chip select number */
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val[1] = 0; /* always 0 */
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val[2] = gd->bd->bi_flashstart;
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val[3] = gd->bd->bi_flashsize;
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if (fdt_path_offset(blob, "/plb/opb/ebc") >= 0) {
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rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
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val, sizeof(val), 1);
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} else {
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/*
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* Some 405 PPC's have EBC as direct PLB child in the dts
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*/
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rc = fdt_find_and_setprop(blob, "/plb/ebc", "ranges",
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val, sizeof(val), 1);
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}
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if (rc)
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printf("Unable to update property NOR mapping, err=%s\n",
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fdt_strerror(rc));
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}
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void ft_board_setup(void *blob, bd_t *bd) __attribute__((weak, alias("__ft_board_setup")));
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/*
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* Fixup all PCIe nodes by setting the device_type property
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* to "pci-endpoint" instead is "pci" for endpoint ports.
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* This property will get checked later by the Linux driver
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* to properly configure the PCIe port in Linux (again).
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*/
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void fdt_pcie_setup(void *blob)
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{
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const char *compat = "ibm,plb-pciex";
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const char *prop = "device_type";
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const char *prop_val = "pci-endpoint";
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const u32 *port;
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int no;
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int rc;
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/* Search first PCIe node */
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no = fdt_node_offset_by_compatible(blob, -1, compat);
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while (no != -FDT_ERR_NOTFOUND) {
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port = fdt_getprop(blob, no, "port", NULL);
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if (port == NULL) {
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printf("WARNING: could not find port property\n");
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} else {
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if (is_end_point(*port)) {
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rc = fdt_setprop(blob, no, prop, prop_val,
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strlen(prop_val) + 1);
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if (rc < 0)
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printf("WARNING: could not set %s for %s: %s.\n",
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prop, compat, fdt_strerror(rc));
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}
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}
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/* Jump to next PCIe node */
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no = fdt_node_offset_by_compatible(blob, no, compat);
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}
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}
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void ft_cpu_setup(void *blob, bd_t *bd)
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{
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sys_info_t sys_info;
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get_sys_info(&sys_info);
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do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, "timebase-frequency",
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bd->bi_intfreq, 1);
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do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, "clock-frequency",
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bd->bi_intfreq, 1);
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do_fixup_by_path_u32(blob, "/plb", "clock-frequency", sys_info.freqPLB, 1);
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do_fixup_by_path_u32(blob, "/plb/opb", "clock-frequency", sys_info.freqOPB, 1);
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if (fdt_path_offset(blob, "/plb/opb/ebc") >= 0)
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do_fixup_by_path_u32(blob, "/plb/opb/ebc", "clock-frequency",
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sys_info.freqEBC, 1);
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else
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do_fixup_by_path_u32(blob, "/plb/ebc", "clock-frequency",
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sys_info.freqEBC, 1);
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fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
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/*
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* Setup all baudrates for the UARTs
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*/
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do_fixup_by_compat_u32(blob, "ns16550", "clock-frequency", gd->uart_clk, 1);
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/*
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* Fixup all ethernet nodes
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* Note: aliases in the dts are required for this
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*/
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fdt_fixup_ethernet(blob, bd);
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/*
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* Fixup all available PCIe nodes by setting the device_type property
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*/
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fdt_pcie_setup(blob);
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}
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#endif /* CONFIG_OF_LIBFDT && CONFIG_OF_BOARD_SETUP */
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