54 lines
1.5 KiB
C
54 lines
1.5 KiB
C
/*
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* A collection of structures, addresses, and values associated with
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* the Motorola DUET ADS board. Values common to all FADS family boards
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* are in board/fads/fads.h
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*
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* Copyright (C) 2003 Arabella Software Ltd.
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* Yuli Barcohen <yuli@arabellasw.com>
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* Board type */
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#define CONFIG_DUET_ADS 1 /* Duet (MPC87x/88x) ADS */
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#define CONFIG_FADS 1 /* We are FADS compatible (more or less) */
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#define CONFIG_MPC885 1 /* MPC885 CPU (Duet family) */
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#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
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#undef CONFIG_8xx_CONS_SMC2
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#undef CONFIG_8xx_CONS_NONE
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#define CONFIG_BAUDRATE 38400
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#define CFG_8XX_FACT 5 /* Multiply by 5 */
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#define CFG_8XX_XIN 10000000 /* 10 MHz in */
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#define CONFIG_SDRAM_50MHZ 1
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/*-----------------------------------------------------------------------
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* PLPRCR - PLL, Low-Power, and Reset Control Register 14-22
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*-----------------------------------------------------------------------
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* set the PLL, the low-power modes and the reset control
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*/
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#define CFG_PLPRCR ((CFG_8XX_FACT << PLPRCR_MFI_SHIFT) | PLPRCR_TEXPS)
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#include "fads.h"
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#define CFG_PHYDEV_ADDR (BCSR_ADDR + 0x20000)
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#define CFG_OR5_PRELIM 0xFFFF8110 /* 64Kbyte address space */
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#define CFG_BR5_PRELIM (CFG_PHYDEV_ADDR | BR_PS_8 | BR_V)
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#define BCSR5 (CFG_PHYDEV_ADDR + 0x300)
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#define BCSR5_MII2_EN 0x40
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#define BCSR5_MII2_RST 0x20
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#define BCSR5_T1_RST 0x10
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#define BCSR5_ATM155_RST 0x08
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#define BCSR5_ATM25_RST 0x04
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#define BCSR5_MII1_EN 0x02
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#define BCSR5_MII1_RST 0x01
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#endif /* __CONFIG_H */
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