197 lines
5.4 KiB
C
197 lines
5.4 KiB
C
/*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian.pop@leadtechdesign.com>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/arch/at91_common.h>
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#include <asm/arch/at91_pmc.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/io.h>
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void at91_serial0_hw_init(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
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at91_set_a_periph(AT91_PIO_PORTB, 4, 1); /* TXD0 */
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at91_set_a_periph(AT91_PIO_PORTB, 5, 0); /* RXD0 */
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writel(1 << AT91SAM9260_ID_US0, &pmc->pcer);
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}
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void at91_serial1_hw_init(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
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at91_set_a_periph(AT91_PIO_PORTB, 6, 1); /* TXD1 */
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at91_set_a_periph(AT91_PIO_PORTB, 7, 0); /* RXD1 */
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writel(1 << AT91SAM9260_ID_US1, &pmc->pcer);
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}
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void at91_serial2_hw_init(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
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at91_set_a_periph(AT91_PIO_PORTB, 8, 1); /* TXD2 */
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at91_set_a_periph(AT91_PIO_PORTB, 9, 0); /* RXD2 */
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writel(1 << AT91SAM9260_ID_US2, &pmc->pcer);
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}
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void at91_serial3_hw_init(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
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at91_set_a_periph(AT91_PIO_PORTB, 14, 0); /* DRXD */
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at91_set_a_periph(AT91_PIO_PORTB, 15, 1); /* DTXD */
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writel(1 << AT91_ID_SYS, &pmc->pcer);
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}
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void at91_serial_hw_init(void)
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{
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#ifdef CONFIG_USART0
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at91_serial0_hw_init();
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#endif
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#ifdef CONFIG_USART1
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at91_serial1_hw_init();
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#endif
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#ifdef CONFIG_USART2
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at91_serial2_hw_init();
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#endif
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#ifdef CONFIG_USART3 /* DBGU */
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at91_serial3_hw_init();
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#endif
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}
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#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
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void at91_spi0_hw_init(unsigned long cs_mask)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
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at91_set_a_periph(AT91_PIO_PORTA, 0, 0); /* SPI0_MISO */
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at91_set_a_periph(AT91_PIO_PORTA, 1, 0); /* SPI0_MOSI */
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at91_set_a_periph(AT91_PIO_PORTA, 2, 0); /* SPI0_SPCK */
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/* Enable clock */
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writel(1 << AT91SAM9260_ID_SPI0, &pmc->pcer);
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if (cs_mask & (1 << 0)) {
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at91_set_a_periph(AT91_PIO_PORTA, 3, 1);
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}
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if (cs_mask & (1 << 1)) {
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at91_set_b_periph(AT91_PIO_PORTC, 11, 1);
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}
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if (cs_mask & (1 << 2)) {
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at91_set_b_periph(AT91_PIO_PORTC, 16, 1);
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}
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if (cs_mask & (1 << 3)) {
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at91_set_b_periph(AT91_PIO_PORTC, 17, 1);
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}
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if (cs_mask & (1 << 4)) {
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at91_set_pio_output(AT91_PIO_PORTA, 3, 1);
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}
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if (cs_mask & (1 << 5)) {
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at91_set_pio_output(AT91_PIO_PORTC, 11, 1);
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}
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if (cs_mask & (1 << 6)) {
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at91_set_pio_output(AT91_PIO_PORTC, 16, 1);
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}
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if (cs_mask & (1 << 7)) {
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at91_set_pio_output(AT91_PIO_PORTC, 17, 1);
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}
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}
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void at91_spi1_hw_init(unsigned long cs_mask)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
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at91_set_a_periph(AT91_PIO_PORTB, 0, 0); /* SPI1_MISO */
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at91_set_a_periph(AT91_PIO_PORTB, 1, 0); /* SPI1_MOSI */
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at91_set_a_periph(AT91_PIO_PORTB, 2, 0); /* SPI1_SPCK */
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/* Enable clock */
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writel(1 << AT91SAM9260_ID_SPI1, &pmc->pcer);
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if (cs_mask & (1 << 0)) {
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at91_set_a_periph(AT91_PIO_PORTB, 3, 1);
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}
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if (cs_mask & (1 << 1)) {
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at91_set_b_periph(AT91_PIO_PORTC, 5, 1);
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}
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if (cs_mask & (1 << 2)) {
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at91_set_b_periph(AT91_PIO_PORTC, 4, 1);
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}
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if (cs_mask & (1 << 3)) {
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at91_set_pio_output(AT91_PIO_PORTC, 3, 1);
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}
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if (cs_mask & (1 << 4)) {
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at91_set_pio_output(AT91_PIO_PORTB, 3, 1);
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}
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if (cs_mask & (1 << 5)) {
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at91_set_pio_output(AT91_PIO_PORTC, 5, 1);
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}
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if (cs_mask & (1 << 6)) {
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at91_set_pio_output(AT91_PIO_PORTC, 4, 1);
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}
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if (cs_mask & (1 << 7)) {
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at91_set_pio_output(AT91_PIO_PORTC, 3, 1);
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}
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}
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#endif
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#ifdef CONFIG_MACB
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void at91_macb_hw_init(void)
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{
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at91_set_a_periph(AT91_PIO_PORTA, 19, 0); /* ETXCK_EREFCK */
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at91_set_a_periph(AT91_PIO_PORTA, 17, 0); /* ERXDV */
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at91_set_a_periph(AT91_PIO_PORTA, 14, 0); /* ERX0 */
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at91_set_a_periph(AT91_PIO_PORTA, 15, 0); /* ERX1 */
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at91_set_a_periph(AT91_PIO_PORTA, 18, 0); /* ERXER */
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at91_set_a_periph(AT91_PIO_PORTA, 16, 0); /* ETXEN */
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at91_set_a_periph(AT91_PIO_PORTA, 12, 0); /* ETX0 */
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at91_set_a_periph(AT91_PIO_PORTA, 13, 0); /* ETX1 */
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at91_set_a_periph(AT91_PIO_PORTA, 21, 0); /* EMDIO */
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at91_set_a_periph(AT91_PIO_PORTA, 20, 0); /* EMDC */
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#ifndef CONFIG_RMII
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at91_set_b_periph(AT91_PIO_PORTA, 28, 0); /* ECRS */
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at91_set_b_periph(AT91_PIO_PORTA, 29, 0); /* ECOL */
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at91_set_b_periph(AT91_PIO_PORTA, 25, 0); /* ERX2 */
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at91_set_b_periph(AT91_PIO_PORTA, 26, 0); /* ERX3 */
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at91_set_b_periph(AT91_PIO_PORTA, 27, 0); /* ERXCK */
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#if defined(CONFIG_AT91SAM9260EK) || defined(CONFIG_AFEB9260)
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/*
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* use PA10, PA11 for ETX2, ETX3.
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* PA23 and PA24 are for TWI EEPROM
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*/
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at91_set_b_periph(AT91_PIO_PORTA, 10, 0); /* ETX2 */
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at91_set_b_periph(AT91_PIO_PORTA, 11, 0); /* ETX3 */
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#else
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at91_set_b_periph(AT91_PIO_PORTA, 23, 0); /* ETX2 */
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at91_set_b_periph(AT91_PIO_PORTA, 24, 0); /* ETX3 */
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#endif
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at91_set_b_periph(AT91_PIO_PORTA, 22, 0); /* ETXER */
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#endif
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}
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#endif
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