291 lines
6.4 KiB
C
291 lines
6.4 KiB
C
/*
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* i2c driver for Freescale mx31
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*
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* (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#if defined(CONFIG_HARD_I2C)
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#if defined(CONFIG_MX31)
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#include <asm/arch/mx31.h>
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#include <asm/arch/mx31-regs.h>
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#else
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/clock.h>
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#endif
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#define IADR 0x00
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#define IFDR 0x04
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#define I2CR 0x08
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#define I2SR 0x0c
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#define I2DR 0x10
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#define I2CR_IEN (1 << 7)
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#define I2CR_IIEN (1 << 6)
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#define I2CR_MSTA (1 << 5)
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#define I2CR_MTX (1 << 4)
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#define I2CR_TX_NO_AK (1 << 3)
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#define I2CR_RSTA (1 << 2)
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#define I2SR_ICF (1 << 7)
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#define I2SR_IBB (1 << 5)
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#define I2SR_IIF (1 << 1)
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#define I2SR_RX_NO_AK (1 << 0)
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#if defined(CONFIG_SYS_I2C_MX31_PORT1)
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#define I2C_BASE 0x43f80000
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#define I2C_CLK_OFFSET 26
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#elif defined (CONFIG_SYS_I2C_MX31_PORT2)
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#define I2C_BASE 0x43f98000
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#define I2C_CLK_OFFSET 28
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#elif defined (CONFIG_SYS_I2C_MX31_PORT3)
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#define I2C_BASE 0x43f84000
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#define I2C_CLK_OFFSET 30
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#elif defined(CONFIG_SYS_I2C_MX53_PORT1)
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#define I2C_BASE I2C1_BASE_ADDR
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#elif defined(CONFIG_SYS_I2C_MX53_PORT2)
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#define I2C_BASE I2C2_BASE_ADDR
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#elif defined(CONFIG_SYS_I2C_MX35_PORT1)
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#define I2C_BASE I2C_BASE_ADDR
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#else
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#error "define CONFIG_SYS_I2C_MX<Processor>_PORTx to use the mx I2C driver"
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#endif
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#define I2C_MAX_TIMEOUT 10000
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#define I2C_MAX_RETRIES 3
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static u16 div[] = { 30, 32, 36, 42, 48, 52, 60, 72, 80, 88, 104, 128, 144,
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160, 192, 240, 288, 320, 384, 480, 576, 640, 768, 960,
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1152, 1280, 1536, 1920, 2304, 2560, 3072, 3840};
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static inline void i2c_reset(void)
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{
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writew(0, I2C_BASE + I2CR); /* Reset module */
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writew(0, I2C_BASE + I2SR);
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writew(I2CR_IEN, I2C_BASE + I2CR);
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}
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void i2c_init(int speed, int unused)
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{
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int freq;
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int i;
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#if defined(CONFIG_MX31)
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struct clock_control_regs *sc_regs =
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(struct clock_control_regs *)CCM_BASE;
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freq = mx31_get_ipg_clk();
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/* start the required I2C clock */
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writel(readl(&sc_regs->cgr0) | (3 << I2C_CLK_OFFSET),
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&sc_regs->cgr0);
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#else
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freq = mxc_get_clock(MXC_IPG_PERCLK);
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#endif
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for (i = 0; i < 0x1f; i++)
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if (freq / div[i] <= speed)
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break;
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debug("%s: speed: %d\n", __func__, speed);
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writew(i, I2C_BASE + IFDR);
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i2c_reset();
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}
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static int wait_idle(void)
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{
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int timeout = I2C_MAX_TIMEOUT;
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while ((readw(I2C_BASE + I2SR) & I2SR_IBB) && --timeout) {
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writew(0, I2C_BASE + I2SR);
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udelay(1);
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}
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return timeout ? timeout : (!(readw(I2C_BASE + I2SR) & I2SR_IBB));
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}
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static int wait_busy(void)
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{
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int timeout = I2C_MAX_TIMEOUT;
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while (!(readw(I2C_BASE + I2SR) & I2SR_IBB) && --timeout)
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udelay(1);
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writew(0, I2C_BASE + I2SR); /* clear interrupt */
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return timeout;
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}
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static int wait_complete(void)
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{
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int timeout = I2C_MAX_TIMEOUT;
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while ((!(readw(I2C_BASE + I2SR) & I2SR_ICF)) && (--timeout)) {
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writew(0, I2C_BASE + I2SR);
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udelay(1);
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}
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udelay(200);
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writew(0, I2C_BASE + I2SR); /* clear interrupt */
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return timeout;
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}
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static int tx_byte(u8 byte)
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{
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writew(byte, I2C_BASE + I2DR);
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if (!wait_complete() || readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK)
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return -1;
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return 0;
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}
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static int rx_byte(int last)
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{
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if (!wait_complete())
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return -1;
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if (last)
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writew(I2CR_IEN, I2C_BASE + I2CR);
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return readw(I2C_BASE + I2DR);
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}
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int i2c_probe(uchar chip)
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{
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int ret;
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writew(0, I2C_BASE + I2CR); /* Reset module */
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writew(I2CR_IEN, I2C_BASE + I2CR);
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writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX, I2C_BASE + I2CR);
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ret = tx_byte(chip << 1);
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writew(I2CR_IEN | I2CR_MTX, I2C_BASE + I2CR);
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return ret;
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}
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static int i2c_addr(uchar chip, uint addr, int alen)
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{
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int i, retry = 0;
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for (retry = 0; retry < 3; retry++) {
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if (wait_idle())
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break;
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i2c_reset();
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for (i = 0; i < I2C_MAX_TIMEOUT; i++)
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udelay(1);
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}
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if (retry >= I2C_MAX_RETRIES) {
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debug("%s:bus is busy(%x)\n",
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__func__, readw(I2C_BASE + I2SR));
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return -1;
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}
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writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX, I2C_BASE + I2CR);
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if (!wait_busy()) {
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debug("%s:trigger start fail(%x)\n",
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__func__, readw(I2C_BASE + I2SR));
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return -1;
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}
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if (tx_byte(chip << 1) || (readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK)) {
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debug("%s:chip address cycle fail(%x)\n",
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__func__, readw(I2C_BASE + I2SR));
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return -1;
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}
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while (alen--)
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if (tx_byte((addr >> (alen * 8)) & 0xff) ||
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(readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK)) {
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debug("%s:device address cycle fail(%x)\n",
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__func__, readw(I2C_BASE + I2SR));
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return -1;
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}
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return 0;
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}
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int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
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{
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int timeout = I2C_MAX_TIMEOUT;
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int ret;
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debug("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",
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__func__, chip, addr, alen, len);
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if (i2c_addr(chip, addr, alen)) {
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printf("i2c_addr failed\n");
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return -1;
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}
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writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX | I2CR_RSTA, I2C_BASE + I2CR);
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if (tx_byte(chip << 1 | 1))
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return -1;
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writew(I2CR_IEN | I2CR_MSTA |
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((len == 1) ? I2CR_TX_NO_AK : 0),
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I2C_BASE + I2CR);
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ret = readw(I2C_BASE + I2DR);
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while (len--) {
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ret = rx_byte(len == 0);
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if (ret < 0)
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return -1;
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*buf++ = ret;
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if (len <= 1)
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writew(I2CR_IEN | I2CR_MSTA |
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I2CR_TX_NO_AK,
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I2C_BASE + I2CR);
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}
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writew(I2CR_IEN, I2C_BASE + I2CR);
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while (readw(I2C_BASE + I2SR) & I2SR_IBB && --timeout)
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udelay(1);
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return 0;
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}
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int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
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{
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int timeout = I2C_MAX_TIMEOUT;
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debug("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",
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__func__, chip, addr, alen, len);
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if (i2c_addr(chip, addr, alen))
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return -1;
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while (len--)
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if (tx_byte(*buf++))
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return -1;
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writew(I2CR_IEN, I2C_BASE + I2CR);
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while (readw(I2C_BASE + I2SR) & I2SR_IBB && --timeout)
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udelay(1);
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return 0;
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}
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#endif /* CONFIG_HARD_I2C */
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