102 lines
4.2 KiB
C
102 lines
4.2 KiB
C
/*
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* (C) 2010 by Tieto <www.tieto.com>
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* Krzysztof Antonowicz <krzysztof.antonowicz@tieto.com>
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*
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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*/
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#ifndef __PWM_H
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#define __PWM_H
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/* PWM registry addresses. */
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#define PWM_ENABLE (MTK_PWM_BASE + 0x0000)
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#define PWM_PWM4_DELAY (MTK_PWM_BASE + 0x0004)
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#define PWM_PWM5_DELAY (MTK_PWM_BASE + 0x0008)
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#define PWM_PWM6_DELAY (MTK_PWM_BASE + 0x000C)
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#define PWM_PWM1_CON (MTK_PWM_BASE + 0x0010)
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#define PWM_PWM1_HDURATION (MTK_PWM_BASE + 0x0014)
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#define PWM_PWM1_LDURATION (MTK_PWM_BASE + 0x0018)
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#define PWM_PWM1_GDURATION (MTK_PWM_BASE + 0x001C)
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#define PWM_PWM1_BUF0_BASE_ADDR (MTK_PWM_BASE + 0x0020)
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#define PWM_PWM1_BUF0_SIZE (MTK_PWM_BASE + 0x0024)
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#define PWM_PWM1_BUF1_BASE_ADDR (MTK_PWM_BASE + 0x0028)
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#define PWM_PWM1_BUF1_SIZE (MTK_PWM_BASE + 0x002C)
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#define PWM_PWM1_SEND_DATA0 (MTK_PWM_BASE + 0x0030)
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#define PWM_PWM1_SEND_DATA1 (MTK_PWM_BASE + 0x0034)
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#define PWM_PWM1_WAVE_NUM (MTK_PWM_BASE + 0x0038)
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#define PWM_PWM1_DATA_WIDTH (MTK_PWM_BASE + 0x003C)
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#define PWM_PWM1_THRESH (MTK_PWM_BASE + 0x0040)
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#define PWM_PWM1_SEND_WAVENUM (MTK_PWM_BASE + 0x0044)
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#define PWM_PWM1_VALID (MTK_PWM_BASE + 0x0048)
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#define PWM_PWM2_CON (MTK_PWM_BASE + 0x0050)
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#define PWM_PWM2_HDURATION (MTK_PWM_BASE + 0x0054)
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#define PWM_PWM2_LDURATION (MTK_PWM_BASE + 0x0058)
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#define PWM_PWM2_GDURATION (MTK_PWM_BASE + 0x005C)
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#define PWM_PWM2_BUF0_BASE_ADDR (MTK_PWM_BASE + 0x0060)
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#define PWM_PWM2_BUF0_SIZE (MTK_PWM_BASE + 0x0064)
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#define PWM_PWM2_BUF1_BASE_ADDR (MTK_PWM_BASE + 0x0068)
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#define PWM_PWM2_BUF1_SIZE (MTK_PWM_BASE + 0x006C)
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#define PWM_PWM2_SEND_DATA0 (MTK_PWM_BASE + 0x0070)
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#define PWM_PWM2_SEND_DATA1 (MTK_PWM_BASE + 0x0074)
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#define PWM_PWM2_WAVE_NUM (MTK_PWM_BASE + 0x0078)
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#define PWM_PWM2_DATA_WIDTH (MTK_PWM_BASE + 0x007C)
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#define PWM_PWM2_THRESH (MTK_PWM_BASE + 0x0080)
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#define PWM_PWM2_SEND_WAVENUM (MTK_PWM_BASE + 0x0084)
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#define PWM_PWM2_VALID (MTK_PWM_BASE + 0x0088)
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#define PWM_PWM4_CON (MTK_PWM_BASE + 0x00D0)
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#define PWM_PWM4_HDURATION (MTK_PWM_BASE + 0x00D4)
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#define PWM_PWM4_LDURATION (MTK_PWM_BASE + 0x00D8)
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#define PWM_PWM4_GDURATION (MTK_PWM_BASE + 0x00DC)
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#define PWM_PWM4_BUF0_BASE_ADDR (MTK_PWM_BASE + 0x00E0)
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#define PWM_PWM4_BUF0_SIZE (MTK_PWM_BASE + 0x00E4)
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#define PWM_PWM4_BUF1_BASE_ADDR (MTK_PWM_BASE + 0x00E8)
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#define PWM_PWM4_BUF1_SIZE (MTK_PWM_BASE + 0x00EC)
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#define PWM_PWM4_SEND_DATA0 (MTK_PWM_BASE + 0x00F0)
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#define PWM_PWM4_SEND_DATA1 (MTK_PWM_BASE + 0x00F4)
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#define PWM_PWM4_WAVE_NUM (MTK_PWM_BASE + 0x00F8)
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#define PWM_PWM4_SEND_WAVENUM (MTK_PWM_BASE + 0x00FC)
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#define PWM_PWM4_VALID (MTK_PWM_BASE + 0x0100)
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#define PWM_INT_ENABLE (MTK_PWM_BASE + 0x0190)
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#define PWM_INT_STATUS (MTK_PWM_BASE + 0x0194)
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#define PWM_INT_ACK (MTK_PWM_BASE + 0x0198)
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/* Bit field definitions for PWM_ENABLE register. */
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#define PWM_ENABLE_PWM1_EN (1 << 0)
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#define PWM_ENABLE_PWM2_EN (1 << 1)
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#define PWM_ENABLE_PWM3_EN (1 << 2)
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#define PWM_ENABLE_PWM4_EN (1 << 3)
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#define PWM_ENABLE_PWM5_EN (1 << 4)
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#define PWM_ENABLE_PWM6_EN (1 << 5)
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#define PWM_ENABLE_PWM_SEQ_MODE (1 << 6)
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#define PWM_ENABLE_PWM_DELAY_FIX_CLK (1 << 7)
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/* Bit field definitions for PWM_PWM1_CON register. */
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#define PWM_CON_CLKDIV_MASK 7
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#define PWM_CON_CLKSEL (1 << 3)
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#define PWM_CON_FIX_CLK_MODE (1 << 4)
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#define PWM_CON_SRC_SEL (1 << 5)
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#define PWM_CON_MODE (1 << 6)
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#define PWM_CON_IDLE_VALUE (1 << 7)
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#define PWM_CON_GUARD_VALUE (1 << 8)
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#define PWM_CON_STOP_BITPOS 9
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#define PWM_CON_STOP_BITPOS_MASK (0x3F << PWM_PWM1_CON_STOP_BITPOS)
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#define PWM_CON_OLD_PWM_MODE (1 << 15)
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#endif /* __PWM_H */
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