210 lines
7.7 KiB
C
210 lines
7.7 KiB
C
/*
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* (C) 2010 by Tieto <www.tieto.com>
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* Krzysztof Antonowicz <krzysztof.antonowicz@tieto.com>
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*
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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*/
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#ifndef __MTK_LCD_H
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#define __MTK_LCD_H
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/* LCD controller registry definitions. */
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#define LCD_STA (MTK_LCD_BASE + 0x0000)
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#define LCD_INTEN (MTK_LCD_BASE + 0x0004)
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#define LCD_INTSTA (MTK_LCD_BASE + 0x0008)
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#define LCD_START (MTK_LCD_BASE + 0x000c)
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#define LCD_RSTB (MTK_LCD_BASE + 0x0010)
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#define LCD_SCNF (MTK_LCD_BASE + 0x0014)
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#define LCD_PCNF0 (MTK_LCD_BASE + 0x0018)
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#define LCD_PCNF1 (MTK_LCD_BASE + 0x001c)
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#define LCD_PCNF2 (MTK_LCD_BASE + 0x0020)
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#define LCD_TECON (MTK_LCD_BASE + 0x0024)
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#define LCD_MWINSIZE (MTK_LCD_BASE + 0x0040)
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#define LCD_WROI_W2MOFS (MTK_LCD_BASE + 0x0044)
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#define LCD_WROI_W2MCON (MTK_LCD_BASE + 0x0048)
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#define LCD_WROI_W2MADD (MTK_LCD_BASE + 0x004c)
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#define LCD_WROICON (MTK_LCD_BASE + 0x0050)
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#define LCD_WROIOFS (MTK_LCD_BASE + 0x0054)
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#define LCD_WROICADD (MTK_LCD_BASE + 0x0058)
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#define LCD_WROIDADD (MTK_LCD_BASE + 0x005c)
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#define LCD_WROISIZE (MTK_LCD_BASE + 0x0060)
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#define LCD_WROI_HWREF (MTK_LCD_BASE + 0x0064)
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#define LCD_WROI_DC (MTK_LCD_BASE + 0x0068)
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#define LCD_WROI_BGCLR (MTK_LCD_BASE + 0x006C)
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#define LCD_L0WINCON (MTK_LCD_BASE + 0x0070)
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#define LCD_L0WINSKEY (MTK_LCD_BASE + 0x0074)
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#define LCD_L0WINOFS (MTK_LCD_BASE + 0x0078)
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#define LCD_L0WINADD (MTK_LCD_BASE + 0x007c)
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#define LCD_L0WINSIZE (MTK_LCD_BASE + 0x0080)
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#define LCD_L1WINCON (MTK_LCD_BASE + 0x0090)
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#define LCD_L1WINSKEY (MTK_LCD_BASE + 0x0094)
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#define LCD_L1WINOFS (MTK_LCD_BASE + 0x0098)
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#define LCD_L1WINADD (MTK_LCD_BASE + 0x009c)
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#define LCD_L1WINSIZE (MTK_LCD_BASE + 0x00a0)
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#define LCD_L2WINCON (MTK_LCD_BASE + 0x00b0)
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#define LCD_L2WINSKEY (MTK_LCD_BASE + 0x00b4)
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#define LCD_L2WINOFS (MTK_LCD_BASE + 0x00b8)
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#define LCD_L2WINADD (MTK_LCD_BASE + 0x00bc)
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#define LCD_L2WINSIZE (MTK_LCD_BASE + 0x00c0)
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#define LCD_L3WINCON (MTK_LCD_BASE + 0x00d0)
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#define LCD_L3WINSKEY (MTK_LCD_BASE + 0x00d4)
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#define LCD_L3WINOFS (MTK_LCD_BASE + 0x00d8)
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#define LCD_L3WINADD (MTK_LCD_BASE + 0x00dc)
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#define LCD_L3WINSIZE (MTK_LCD_BASE + 0x00e0)
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#define LCD_L4WINCON (MTK_LCD_BASE + 0x00f0)
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#define LCD_L4WINSKEY (MTK_LCD_BASE + 0x00f4)
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#define LCD_L4WINOFS (MTK_LCD_BASE + 0x00f8)
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#define LCD_L4WINADD (MTK_LCD_BASE + 0x00fc)
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#define LCD_L4WINSIZE (MTK_LCD_BASE + 0x0100)
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#define LCD_L5WINCON (MTK_LCD_BASE + 0x0110)
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#define LCD_L5WINSKEY (MTK_LCD_BASE + 0x0114)
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#define LCD_L5WINOFS (MTK_LCD_BASE + 0x0118)
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#define LCD_L5WINADD (MTK_LCD_BASE + 0x011c)
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#define LCD_L5WINSIZE (MTK_LCD_BASE + 0x0120)
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#define LCD_PDAT0 (MTK_LCD_BASE + 0x4000)
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#define LCD_PCMD0 (MTK_LCD_BASE + 0x4100)
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#define LCD_PDAT1 (MTK_LCD_BASE + 0x5000)
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#define LCD_PCMD1 (MTK_LCD_BASE + 0x5100)
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#define LCD_PDAT2 (MTK_LCD_BASE + 0x6000)
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#define LCD_PCMD2 (MTK_LCD_BASE + 0x6100)
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#define LCD_SDAT1 (MTK_LCD_BASE + 0x8000)
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#define LCD_SCMD1 (MTK_LCD_BASE + 0x8100)
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#define LCD_SDAT0 (MTK_LCD_BASE + 0x9000)
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#define LCD_SCMD0 (MTK_LCD_BASE + 0x9100)
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#define LCD_GAMMA (MTK_LCD_BASE + 0xc000)
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#define LCD_PAL (MTK_LCD_BASE + 0xc400)
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#define LCD_COMD0 (MTK_LCD_BASE + 0xc800)
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#define LCD_COMD1 (MTK_LCD_BASE + 0xc880)
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/* Bit field definitions for LCD_START register. */
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#define LCD_START_START (1 << 15)
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/* Bit field definitions for LCD_PCNF0. */
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#define LCD_PCNF0_RLT 0
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#define LCD_PCNF0_WST 8
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#define LCD_PCNF0_26M (1 << 14)
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#define LCD_PCNF0_52M (1 << 15)
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#define LCD_PCNF0_DW 16
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#define LCD_PCNF0_GAMMA_ID_B 18
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#define LCD_PCNF0_GAMMA_ID_G 20
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#define LCD_PCNF0_GAMMA_ID_R 22
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#define LCD_PCNF0_C2RS 24
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#define LCD_PCNF0_C2WH 28
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#define LCD_PCNF0_C2WS 30
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/* Definition of LCD_PCNF0 field values. */
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#define LCD_PCNF0_DW_8BIT 0
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#define LCD_PCNF0_DW_9BIT 1
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#define LCD_PCNF0_DW_16BIT 2
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#define LCD_PCNF0_DW_18BIT 3
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#define LCD_PCNF0_GAMMA_ID_X_TABLE_0 0
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#define LCD_PCNF0_GAMMA_ID_X_TABLE_1 1
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#define LCD_PCNF0_GAMMA_ID_X_TABLE_2 2
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#define LCD_PCNF0_GAMMA_ID_X_NO_TABLE 3
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/* Bit field definitions for LCD_TECON register. */
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#define LCD_TECON_TE_EN (1 << 0)
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#define LCD_TECON_TE_EDGE_SEL (1 << 1)
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/* Definition of LCD_MWINSIZE field values. */
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#define LCD_MWINSIZE_ROW 16
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/* Bit field definitions for LCD_RSTB register. */
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#define LCD_RSTB_RSTB (1 << 0)
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/* Bit field definitions for W2MCON register. */
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#define LCD_WROI_W2MCON_W2LCM (1 << 0)
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#define LCD_WROI_W2MCON_W2M_FORMAT 1
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#define LCD_WROI_W2MCON_DISCON (1 << 3)
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#define LCD_WROI_W2MCON_ADDINC_DISABLE (1 << 4)
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#define LCD_WROI_W2MCON_DC_OUT_EN (1 << 5)
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#define LCD_WROI_W2MCON_OUTPUT_ALPHA 8
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/* Definition of LCD_WROI_W2MCON field values. */
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#define LCD_WROI_W2MCON_W2M_FORMAT_RGB565 0
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#define LCD_WROI_W2MCON_W2M_FORMAT_RGB888 1
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#define LCD_WROI_W2MCON_W2M_FORMAT_RGB8888 2
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/* Bit field definitions for LCD_WROICON register. */
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#define LCD_WROICON_COMMAND 8
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#define LCD_WROICON_COM_SEL (1 << 13)
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#define LCD_WROICON_W2M (1 << 14)
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#define LCD_WROICON_ENC (1 << 15)
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#define LCD_WROICON_PERIOD 16
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#define LCD_WROICON_EN5 (1 << 26)
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#define LCD_WROICON_EN4 (1 << 27)
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#define LCD_WROICON_EN3 (1 << 28)
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#define LCD_WROICON_EN2 (1 << 29)
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#define LCD_WROICON_EN1 (1 << 30)
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#define LCD_WROICON_EN0 (1 << 31)
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/* Bit field definitions for LCD_WROI_W2MOFS register. */
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#define LCD_WROI_W2MOFS_Y_OFFSET 16
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/* Bit field definitions for LCD_WROI_BGCLR register. */
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#define LCD_WROI_BGCLR_BLUE 0
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#define LCD_WROI_BGCLR_GREEN 8
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#define LCD_WROI_BGCLR_RED 16
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/* Bit field definitions for LCD_WROI_HWREF register. */
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#define LCD_WROI_HWREF_HWREF (1 << 0)
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#define LCD_WROI_HWREF_HWEN (1 << 7)
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#define LCD_WROI_HWREF_SEL 16
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#define LCD_WROI_HWREF_EN5 (1 << 26)
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#define LCD_WROI_HWREF_EN4 (1 << 27)
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#define LCD_WROI_HWREF_EN3 (1 << 28)
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#define LCD_WROI_HWREF_EN2 (1 << 29)
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#define LCD_WROI_HWREF_EN1 (1 << 30)
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#define LCD_WROI_HWREF_EN0 (1 << 31)
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/* Definition of LCD_WROI_HWREF field values. */
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#define LCD_WROI_HWREF_SEL_IRT1 0
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#define LCD_WROI_HWREF_SEL_IBW1 1
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#define LCD_WROI_HWREF_SEL_IRT2 2
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#define LCD_WROI_HWREF_SEL_IBW2 3
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/* Bit field definitions for LCD_L0WINCON register. */
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#define LCD_L0WINCON_OPA_EN (1 << 8)
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#define LCD_L0WINCON_CLRDPT 9
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#define LCD_L0WINCON_ROTATE 11
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#define LCD_L0WINCON_KEYEN (1 << 14)
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#define LCD_L0WINCON_SRC (1 << 15)
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#define LCD_L0WINCON_SWP (1 << 16)
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#define LCD_L0WINCON_READ_CACHE_DIS (1 << 20)
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/* Definition of LCD_WROI_HWREF field values. */
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#define LCD_L0WINCON_CLRDPT_8BPP 0
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#define LCD_L0WINCON_CLRDPT_RGB565 1
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#define LCD_L0WINCON_CLRDPT_ARGB8888 2
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#define LCD_L0WINCON_CLRDPT_RGB888 3
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/* Bit field definitions for LCD_L0WINSIZE register. */
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#define LCD_L0WINSIZE_COLUMN 0
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#define LCD_L0WINSIZE_ROW 16
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/* Bit field definitions for LCD_WROISIZE register. */
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#define LCD_WROISIZE_COLUMN 0
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#define LCD_WROISIZE_ROW 16
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/* Bit field definitions for LCD_WROIOFS register. */
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#define LCD_WROIFS_X_OFFSET 0
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#define LCD_WROIFS_Y_OFFSET 16
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#endif /* __MTK_LCD_H */
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