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3 Commits

Author SHA1 Message Date
york 9490ff4864 powerpc/8xxx: Enable DDR3 RDIMM support 
Enabled registered DIMMs using data from SPD. RDIMMs have registers
which need to be configured before using. The register configuration
words are stored in SPD byte 60~116 (JEDEC standard No.21-C). Software
should read those RCWs and put into DDR controller before initialization.

Signed-off-by: York Sun <yorksun@freescale.com>
 2010-07-26 13:16:10 -05:00
Dave Liu c360ceac02 fsl-ddr: add the DDR3 SPD infrastructure 
- support mirrored DIMMs, not support register DIMMs
- test passed on P2020DS board with MT9JSF12872AY-1G1D1
- test passed on MPC8569MDS board with MT8JSF12864HY-1G1D1

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Travis Wheatley <travis.wheatley@freescale.com>
 2009-03-30 13:33:50 -05:00
James Yang 0f2cbe3f5e Add proper SPD definitions for DDR1/2/3 
Also adds helper functions for DDR1/2 to verify the checksum.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
 2008-08-27 02:05:53 +02:00