Commit Graph

9355 Commits

Author SHA1 Message Date
Mike Frysinger 76d82187c6 Blackfin: tweak embedded LDR env config option
Use the common config option for extracting the environment for embedding
into LDR files and clarify the LDR-specific option.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-17 09:17:26 -05:00
Wolfgang Denk 2ff6922280 Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-01-12 23:47:03 +01:00
Wolfgang Denk f8b365ceb6 Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2010-01-12 23:42:32 +01:00
Wolfgang Denk c76b64666e Merge branch 'master' of git://git.denx.de/u-boot-usb 2010-01-12 23:39:08 +01:00
Wolfgang Denk 02c631e6ee Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx 2010-01-12 23:30:40 +01:00
Bryan Wu 321790f61b usb: musb: add virtual root hub control support
For MUSB devices that do not support multipoint (hubs), we have to emulate
a root hub so that we can support core operations like resetting ports.

Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-01-12 20:11:27 +01:00
Chris Zhang 559e2c87e4 Adds EHCI definitions to sequoia board configuration file.
Adds required definitions for EHCI support in sequoia configuration file.
But still keeps the OHCI as default driver.

Signed-off-by: Chris Zhang <chris@seamicro.com>
2010-01-09 10:27:21 +01:00
Chris Zhang 5f82887fee Add ppc440epx USB ehci support.
Currently ppc440epx uses OHCI for USB full-speed support. This change adds
support for EHCI.

Signed-off-by: Chris Zhang <chris@seamicro.com>
2010-01-09 10:27:15 +01:00
Chris Zhang b416191a14 Fix EHCI port reset.
In USB ehci driver, the port reset is not terminated. EHCI spec says "A host
 controller must terminate the reset and stabilize the state of the port within
 2 milliseconds". Without termination, a port stays at reset state. This is
 observed on ppc4xx(sequoia) boards.

Signed-off-by: Chris Zhang <chris@seamicro.com>
2010-01-09 10:25:43 +01:00
Sanjeev Premi b301be0599 omap3: fix compile warning
This patch fixes this warning during compile:

omap3.c: In function 'musb_platform_init':
omap3.c:126: warning: label 'end' defined but not used

Problem reported by: Dirk Behme[dirk.behme@googlemail.com]

Signed-off-by: Sanjeev Premi <premi@ti.com>
2010-01-09 10:25:09 +01:00
Bryan Wu e608f221c1 usb: musb: add support for Blackfin MUSB
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2010-01-09 10:25:09 +01:00
Bryan Wu bc72a919e0 usb: musb: change rxcsr register from write to read/modify/write
The RX Control/Status register has bits that we want to preserve, so don't
just write out a single bit.  Preserve the others bits in the process.

The original code posted to the u-boot list had this behavior, but looks
like it was lost somewhere along the way to merging.

Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2010-01-09 10:25:09 +01:00
Bryan Wu 8868fd443b usb: musb: make multipoint optional
The multipoint handling under MUSB is optional, and some parts (like the
Blackfin processor) do not implement support for it.

Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2010-01-09 10:25:08 +01:00
Bryan Wu df402ba381 usb: musb: make fifo support configurable
The dynamic FIFO handling under MUSB is optional, and some parts (like
the Blackfin processor) do not implement support for it.

Due to this, the FIFO reading/writing steps need special handling, so
mark the common versions weak so drivers can override.

Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2010-01-09 10:25:08 +01:00
Mike Frysinger dc2cd05c91 usb: musb: make sure the register layout is packed
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2010-01-09 10:25:08 +01:00
Ajay Kumar Gupta 7b4292883b DA830: Add usb config
Adding USB configuration. Default is set for USB MSC host.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Swaminathan S <swami.iyer@ti.com>
2010-01-09 10:25:07 +01:00
Ajay Kumar Gupta 7359273d94 DA8xx: Add MUSB host support
Tested USB host functionality on DA830 EVM.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Swaminathan S <swami.iyer@ti.com>
2010-01-09 10:25:07 +01:00
Ajay Kumar Gupta 0b232310b2 DA8xx: Add GPIO register definitions
Added DA8xx GPIO base addresses in gpio_defs.h and pointers
to different BANKs which can be used to program GPIOs.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Swaminathan S <swami.iyer@ti.com>
2010-01-09 10:25:07 +01:00
Ajay Kumar Gupta 82a821f89b DA830: Add pinmux for USB0_DRVVBUS
USB0_DRVVBUS pinmux configuration is required for USB functinality
in uboot.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Swaminathan S <swami.iyer@ti.com>
2010-01-09 10:25:06 +01:00
Heiko Schocher a3f5da1bee mpc83xx: add support configure bus parking
Add support to configure bus parking mode and master in bus arbitration
configuration (ACR). Add this for the kmeter1 port:

Configure bus arbiter with recommended values from Freescale
to improve bus latency/throughput for application with
intensive QuiccEngine activity.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-01-07 18:39:42 -06:00
Reinhard Arlt a0daa2e06f mpc83xx: vme8349: Fix power up reset sequence for tsi148
Remove PCI reset, if there is a monarch PMC module.

Signed-off-by: Reinhard Arlt <reinhard.arlt@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>

convert clrbits_be32 + setbits_be32 to clrsetbits_be32, use out_be32 to set gcr.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-01-07 18:36:30 -06:00
Reinhard Arlt 1dee9be683 mpc83xx: Add support for MPC8349 esd caddy2
The caddy2 is a variant of the already supported vme8349. So we just
add the differences to this board port. To better support those two
boards we switched from fixed SDRAM configuration to usage of
spd_sdram(). This is done by providing a board specific SPD EEPROM
routine with different values for both boards.

Signed-off-by: Reinhard Arlt <reinhard.arlt@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>

changed to use mkconfig -t option instead, plus misc codingstyle fixes.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-01-07 18:34:31 -06:00
Stefan Roese 7693640acd mpc83xx: spd_sdram.c: Disable memory controller before initializing
The memory controller could already be enabled, when spd_sdram() is
called. This could be the case for example, when the SDRAM is initialized
by the JTAG debugger.

The "sync" after the register access via the accessor function is
still needed, because the macro uses the sync before the real write
is done. So until not all accesses are converted to using accessor
functions, this sync still needs to be made "manually" here.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd.eu>
Acked-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-01-07 18:34:30 -06:00
Anton Vorontsov 2e95004deb mpc83xx: Add NAND boot support for MPC8315E-RDB boards
The core support for NAND booting is there already, so this patch
is pretty straightforward.

There is one trick though: top level Makefile expects nand_spl to
be in nand_spl/board/$(BOARDDIR), but we can fully reuse the code
from mpc8313erdb boards, and so to not duplicate the code we just
symlink nand_spl/board/freescale/mpc8315erdb to mpc8313erdb.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>

o silence make during ln echo
o update documentation
o and avoid:

$ ./MAKEALL MPC8315ERDB_NAND
Configuring for MPC8315ERDB board...
sdram.o: In function `fixed_sdram':
/home/r1aaha/git/u-boot/nand_spl/board/freescale/mpc8313erdb/sdram.c:72: undefined reference to `udelay'

by renaming udelay -> __udelay in the spirit of commit
3eb90bad65 "Generic udelay() with watchdog
support".

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-01-07 18:33:52 -06:00
Sanjeev Premi b821cead7d onenand: Fix compile errors due to FlexOneNAND
This patch fixes the compile error while trying to
compile for omap3evm.

env_onenand.c: In function 'env_relocate_spec':
env_onenand.c:70: error: 'CONFIG_ENV_ADDR_FLEX' undeclared
 (first use in this function)
env_onenand.c:70: error: (Each undeclared identifier is re
ported only once
env_onenand.c:70: error: for each function it appears in.)
env_onenand.c: In function 'saveenv':
env_onenand.c:106: error: 'CONFIG_ENV_ADDR_FLEX' undeclare
d (first use in this function)
env_onenand.c:107: error: 'CONFIG_ENV_SIZE_FLEX' undeclare
d (first use in this function)

Signed-off-by: Sanjeev Premi <premi@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
2010-01-06 16:28:00 -06:00
Nick Thompson 20da6f4d93 Davinci: davinci_nand.c performance enhancments
Introduces various optimisations that approximately triple the
read data rate from NAND when run on da830evm.

Most of these optimisations depend on the endianess of the machine
and most of them are very similar to optimisations already present
in the Linux Kernel.

Signed-off-by: Nick Thompson <nick.thompson@ge.com>
2010-01-06 16:11:16 -06:00
Tom Rix 06f95959bc ARM Update mach-types
Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
And built with

repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
commit c9f937e4a3f4ebf9924ec21d80632e5eb61d949c

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2010-01-06 09:36:24 -06:00
Becky Bruce 8b0ab30494 ppc/p4080: Add Corenet Platform Cache (CPC) registers
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:52:00 -06:00
Dave Liu 3e731aaba3 fsl-ddr: setup ODT_RD_CFG & ODT_WR_CFG when we interleave
In chip-select interleaving case, we also need set the ODT_RD_CFG
and ODT_WR_CFG in cs1_config register.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:50:07 -06:00
Dave Liu 1aa3d08a02 fsl-ddr: add override for the Rtt_Wr
Different boards may require different settings of Dynamic ODT (Rtt_Wr).
We provide a means to allow the board specific code to provide its own
value of Rtt_Wr.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:27 -06:00
Dave Liu bdc9f7b5ea fsl-ddr: add the override for write leveling
add the override for write leveling sampling and
start time according to specific board.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:10 -06:00
Dave Liu 0a71c92c7e fsl-ddr: Fix power-down timing settings
1. TIMING_CFG_0[ACT_PD_EXIT] was set to 6 clocks, but
   It should be set to tXP parameter, tXP=max(3CK, 7.5ns)
2. TIMING_CFG_0[PRE_PD_EXIT] was set to 6 clocks, but
   It should be set to tXP (if MR0[A12]=1) else to tXPDLL parameter
   We are setting the mode register MR0[A12]='1'

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:10 -06:00
Anton Vorontsov c4ca10f1db mpc85xx: Add 4-bits eSDHC support for MPC8569E-MDS boards
Thanks to "Errata to MPC8569E PowerQUICC III Integrated Host Processor
Family Reference Manual, Rev. 0" document, which describes all eSDHC
pins, we can add 4-bits eSDHC support for MPC8569E-MDS boards.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:10 -06:00
Kumar Gala bc20f9a952 ppc/p4080: Fix reporting of PME & FM clock frequencies
We incorrectly had the sense of PME_CLK_SEL, FM1_CLK_SEL, FM2_CLK_SEL
backwards so we report the wrong frequency.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:10 -06:00
Li Yang de3cbd78c9 fsl_law: add SRIO2 target id and law_size_bits() macro
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:09 -06:00
Kumar Gala abc76eb6a6 ppc/85xx: Map boot page guarded for MP boot
We already map the page cache-inhibited.  There is no reason we
shouldn't also be marking it guarded to prevent speculative accesses.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:09 -06:00
Kumar Gala effe4973f2 ppc: Added macro to test for specific SVR revision
Various SoC errata are specific to a given revision of silicon. This
patch gives us a simple macro to use when doing such tests.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:09 -06:00
Dave Liu f5ecc6e027 p4080: add readback to bootpage translation window
We need to add the readback to bootpage translation LAW
to make it effect.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:09 -06:00
Kumar Gala 5fb6ea3ad3 ppc/85xx: Make flash TLB entry determined at runtime on FSL boards
Rather than hard coding which TLB entry the FLASH is mapped with we can
use find_tlb_idx to determine the entry.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:08 -06:00
Kumar Gala 783852e467 ppc/85xx: Remove CONFIG_SYS_DDR_TLB_START
Now that we dynamically determine TLB CAM entries to use we dont need
CONFIG_SYS_DDR_TLB_START anymore.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:08 -06:00
Kumar Gala 355f4f85e9 ppc/85xx: Make SPD DDR TLB setup code use dynamic entry allocation
Now that we track which TLB CAM entries are used we can allocate
entries on the fly.  Change the SPD DDR TLB setup code to assume
we use at most 8 TLBs (or the number free, which ever is fewer).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:08 -06:00
Kumar Gala 94e9411b9d ppc/85xx: Add tracking of TLB CAM usage
We need to track which TLB CAM entries are used to allow us to
"dynamically" allocate entries later in the code.  For example the SPD
DDR code today hard codes which TLB entries it uses.  We can now make
that pick entries that are free.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:08 -06:00
Kumar Gala ee53650dad ppc/8xxx: Remove is_fsl_pci_agent
All users of is_fsl_pci_agent have been converted to fsl_is_pci_agent
that uses the standard PCI programming model to determine host vs
agent/end-point.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:07 -06:00
Kumar Gala 7cb8f79b44 ppc/85xx: Move to using fsl_setup_hose on TQM 85xx
We can use fsl_setup_hose to determine if we are a agent/end-point or
a host.  Rather than using some SoC specific register we can just look
at the PCI cfg space of the host controller to determine this.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:07 -06:00
Kumar Gala 9263e829f0 ppc/85xx: Move to using fsl_setup_hose on P2020 DS
We can use fsl_setup_hose to determine if we are a agent/end-point or
a host.  Rather than using some SoC specific register we can just look
at the PCI cfg space of the host controller to determine this.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:07 -06:00
Kumar Gala 1e21ba8f6d ppc/85xx: Move to using fsl_setup_hose on P1/P2 RDB
We can use fsl_setup_hose to determine if we are a agent/end-point or
a host.  Rather than using some SoC specific register we can just look
at the PCI cfg space of the host controller to determine this.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:07 -06:00
Kumar Gala 42c01b9d1f ppc/85xx: Move to using fsl_setup_hose on MPC8572 DS
We can use fsl_setup_hose to determine if we are a agent/end-point or
a host.  Rather than using some SoC specific register we can just look
at the PCI cfg space of the host controller to determine this.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:06 -06:00
Kumar Gala 5e3d7050cf ppc/86xx: Clean up MPC8610 HPCD PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:06 -06:00
Kumar Gala 7b626880b4 ppc/85xx: Clean up MPC8548 CDS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:06 -06:00
Kumar Gala feadd5d53b ppc/85xx: Clean up ATUM8548 PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:06 -06:00