Merge branch 'next' of git://git.denx.de/u-boot-arm into next
This commit is contained in:
Wolfgang Denk
commit
fb69abf269
|
|
@ -549,6 +549,7 @@ Rowel Atienza <rowel@diwalabs.com>
|
|||
|
||||
Stefano Babic <sbabic@denx.de>
|
||||
|
||||
ea20 davinci
|
||||
polaris xscale
|
||||
trizepsiv xscale
|
||||
mx51evk i.MX51
|
||||
|
|
@ -853,6 +854,11 @@ Alex Z
|
|||
lart SA1100
|
||||
dnp1110 SA1110
|
||||
|
||||
Syed Mohammed Khasim <sm.khasim@gmail.com>
|
||||
Sughosh Ganu <urwithsughosh@gmail.com>
|
||||
|
||||
hawkboard ARM926EJS (OMAP-L138)
|
||||
|
||||
-------------------------------------------------------------------------
|
||||
|
||||
Unknown / orphaned boards:
|
||||
|
|
|
|||
|
|
@ -45,10 +45,25 @@ struct pinmux_resource {
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|||
.n_pins = ARRAY_SIZE(item) \
|
||||
}
|
||||
|
||||
#define HAWKBOARD_KICK0_UNLOCK 0x83e70b13
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||||
#define HAWKBOARD_KICK1_UNLOCK 0x95a4f1e0
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||||
|
||||
struct lpsc_resource {
|
||||
const int lpsc_no;
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||||
};
|
||||
|
||||
int dvevm_read_mac_address(uint8_t *buf);
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||||
void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr);
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||||
int davinci_configure_pin_mux(const struct pinmux_config *pins, int n_pins);
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||||
int davinci_configure_pin_mux_items(const struct pinmux_resource *item,
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||||
int n_items);
|
||||
#if defined(CONFIG_DRIVER_TI_EMAC) && defined(CONFIG_MACH_DAVINCI_DA850_EVM)
|
||||
void davinci_emac_mii_mode_sel(int mode_sel);
|
||||
#endif
|
||||
#if defined(CONFIG_SOC_DA8XX)
|
||||
void irq_init(void);
|
||||
int da8xx_configure_lpsc_items(const struct lpsc_resource *item,
|
||||
const int n_items);
|
||||
#endif
|
||||
|
||||
#endif /* __MISC_H */
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||||
|
|
@ -133,7 +133,8 @@ typedef volatile unsigned int * dv_reg_p;
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|||
#define DAVINCI_PSC1_BASE 0x01e27000
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||||
#define DAVINCI_SPI0_BASE 0x01c41000
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#define DAVINCI_USB_OTG_BASE 0x01e00000
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||||
#define DAVINCI_SPI1_BASE 0x01e12000
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||||
#define DAVINCI_SPI1_BASE (cpu_is_da830() ? \
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||||
0x01e12000 : 0x01f0e000)
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||||
#define DAVINCI_GPIO_BASE 0x01e26000
|
||||
#define DAVINCI_EMAC_CNTRL_REGS_BASE 0x01e23000
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||||
#define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE 0x01e22000
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||||
|
|
@ -149,7 +150,12 @@ typedef volatile unsigned int * dv_reg_p;
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|||
#define DAVINCI_DDR_EMIF_DATA_BASE 0xc0000000
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#define DAVINCI_INTC_BASE 0xfffee000
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||||
#define DAVINCI_BOOTCFG_BASE 0x01c14000
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||||
#define JTAG_ID_REG (DAVINCI_BOOTCFG_BASE + 0x18)
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||||
|
||||
#define GPIO_BANK2_REG_DIR_ADDR (DAVINCI_GPIO_BASE + 0x38)
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#define GPIO_BANK2_REG_OPDATA_ADDR (DAVINCI_GPIO_BASE + 0x3c)
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||||
#define GPIO_BANK2_REG_SET_ADDR (DAVINCI_GPIO_BASE + 0x40)
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||||
#define GPIO_BANK2_REG_CLR_ADDR (DAVINCI_GPIO_BASE + 0x44)
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||||
#endif /* CONFIG_SOC_DA8XX */
|
||||
|
||||
/* Power and Sleep Controller (PSC) Domains */
|
||||
|
|
@ -363,6 +369,9 @@ struct davinci_pllc_regs {
|
|||
#define davinci_pllc_regs ((struct davinci_pllc_regs *)DAVINCI_PLL_CNTRL0_BASE)
|
||||
#define DAVINCI_PLLC_DIV_MASK 0x1f
|
||||
|
||||
#define ASYNC3 get_async3_src()
|
||||
#define PLL1_SYSCLK2 ((1 << 16) | 0x2)
|
||||
#define DAVINCI_SPI1_CLKID (cpu_is_da830() ? 2 : ASYNC3)
|
||||
/* Clock IDs */
|
||||
enum davinci_clk_ids {
|
||||
DAVINCI_SPI0_CLKID = 2,
|
||||
|
|
@ -379,7 +388,10 @@ int clk_get(enum davinci_clk_ids id);
|
|||
/* Boot config */
|
||||
struct davinci_syscfg_regs {
|
||||
dv_reg revid;
|
||||
dv_reg rsvd[71];
|
||||
dv_reg rsvd[13];
|
||||
dv_reg kick0;
|
||||
dv_reg kick1;
|
||||
dv_reg rsvd1[56];
|
||||
dv_reg pinmux[20];
|
||||
dv_reg suspsrc;
|
||||
dv_reg chipsig;
|
||||
|
|
@ -442,6 +454,27 @@ struct davinci_uart_ctrl_regs {
|
|||
#define DAVINCI_UART_PWREMU_MGMT_URRST (1 << 13)
|
||||
#define DAVINCI_UART_PWREMU_MGMT_UTRST (1 << 14)
|
||||
|
||||
static inline int cpu_is_da830(void)
|
||||
{
|
||||
unsigned int jtag_id = REG(JTAG_ID_REG);
|
||||
unsigned short part_no = (jtag_id >> 12) & 0xffff;
|
||||
|
||||
return ((part_no == 0xb7df) ? 1 : 0);
|
||||
}
|
||||
static inline int cpu_is_da850(void)
|
||||
{
|
||||
unsigned int jtag_id = REG(JTAG_ID_REG);
|
||||
unsigned short part_no = (jtag_id >> 12) & 0xffff;
|
||||
|
||||
return ((part_no == 0xb7d1) ? 1 : 0);
|
||||
}
|
||||
|
||||
static inline int get_async3_src(void)
|
||||
{
|
||||
return (REG(&davinci_syscfg_regs->cfgchip3) & 0x10) ?
|
||||
PLL1_SYSCLK2 : 2;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_SOC_DA8XX */
|
||||
|
||||
#endif /* __ASM_ARCH_HARDWARE_H */
|
||||
|
|
|
|||
|
|
@ -29,7 +29,7 @@ endif
|
|||
|
||||
LIB = $(obj)lib$(VENDOR).o
|
||||
|
||||
COBJS := misc.o
|
||||
COBJS := misc.o davinci_pinmux.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS))
|
||||
|
|
|
|||
|
|
@ -0,0 +1,105 @@
|
|||
/*
|
||||
* DaVinci pinmux functions.
|
||||
*
|
||||
* Copyright (C) 2009 Nick Thompson, GE Fanuc Ltd, <nick.thompson@gefanuc.com>
|
||||
* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
|
||||
* Copyright (C) 2008 Lyrtech <www.lyrtech.com>
|
||||
* Copyright (C) 2004 Texas Instruments.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/davinci_misc.h>
|
||||
|
||||
/*
|
||||
* Change the setting of a pin multiplexer field.
|
||||
*
|
||||
* Takes an array of pinmux settings similar to:
|
||||
*
|
||||
* struct pinmux_config uart_pins[] = {
|
||||
* { &davinci_syscfg_regs->pinmux[8], 2, 7 },
|
||||
* { &davinci_syscfg_regs->pinmux[9], 2, 0 }
|
||||
* };
|
||||
*
|
||||
* Stepping through the array, each pinmux[n] register has the given value
|
||||
* set in the pin mux field specified.
|
||||
*
|
||||
* The number of pins in the array must be passed (ARRAY_SIZE can provide
|
||||
* this value conveniently).
|
||||
*
|
||||
* Returns 0 if all field numbers and values are in the correct range,
|
||||
* else returns -1.
|
||||
*/
|
||||
int davinci_configure_pin_mux(const struct pinmux_config *pins,
|
||||
const int n_pins)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* check for invalid pinmux values */
|
||||
for (i = 0; i < n_pins; i++) {
|
||||
if (pins[i].field >= PIN_MUX_NUM_FIELDS ||
|
||||
(pins[i].value & ~PIN_MUX_FIELD_MASK) != 0)
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* configure the pinmuxes */
|
||||
for (i = 0; i < n_pins; i++) {
|
||||
const int offset = pins[i].field * PIN_MUX_FIELD_SIZE;
|
||||
const unsigned int value = pins[i].value << offset;
|
||||
const unsigned int mask = PIN_MUX_FIELD_MASK << offset;
|
||||
const dv_reg *mux = pins[i].mux;
|
||||
|
||||
writel(value | (readl(mux) & (~mask)), mux);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Configure multiple pinmux resources.
|
||||
*
|
||||
* Takes an pinmux_resource array of pinmux_config and pin counts:
|
||||
*
|
||||
* const struct pinmux_resource pinmuxes[] = {
|
||||
* PINMUX_ITEM(uart_pins),
|
||||
* PINMUX_ITEM(i2c_pins),
|
||||
* };
|
||||
*
|
||||
* The number of items in the array must be passed (ARRAY_SIZE can provide
|
||||
* this value conveniently).
|
||||
*
|
||||
* Each item entry is configured in the defined order. If configuration
|
||||
* of any item fails, -1 is returned and none of the following items are
|
||||
* configured. On success, 0 is returned.
|
||||
*/
|
||||
int davinci_configure_pin_mux_items(const struct pinmux_resource *item,
|
||||
const int n_items)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < n_items; i++) {
|
||||
if (davinci_configure_pin_mux(item[i].pins,
|
||||
item[i].n_pins) != 0)
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -29,10 +29,11 @@
|
|||
#include <net.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/io.h>
|
||||
#include "misc.h"
|
||||
#include <asm/arch/davinci_misc.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#ifndef CONFIG_PRELOADER
|
||||
int dram_init(void)
|
||||
{
|
||||
/* dram_init must store complete ramsize in gd->ram_size */
|
||||
|
|
@ -47,6 +48,7 @@ void dram_init_banksize(void)
|
|||
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
|
||||
gd->bd->bi_dram[0].size = gd->ram_size;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DRIVER_TI_EMAC
|
||||
|
||||
|
|
@ -75,6 +77,22 @@ err:
|
|||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Set the mii mode as MII or RMII
|
||||
*/
|
||||
#if defined(CONFIG_DRIVER_TI_EMAC)
|
||||
void davinci_emac_mii_mode_sel(int mode_sel)
|
||||
{
|
||||
int val;
|
||||
|
||||
val = readl(&davinci_syscfg_regs->cfgchip3);
|
||||
if (mode_sel == 0)
|
||||
val &= ~(1 << 8);
|
||||
else
|
||||
val |= (1 << 8);
|
||||
writel(val, &davinci_syscfg_regs->cfgchip3);
|
||||
}
|
||||
#endif
|
||||
/*
|
||||
* If there is no MAC address in the environment, then it will be initialized
|
||||
* (silently) from the value in the EEPROM.
|
||||
|
|
@ -94,79 +112,38 @@ void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr)
|
|||
}
|
||||
}
|
||||
|
||||
#endif /* DAVINCI_EMAC */
|
||||
#endif /* CONFIG_DRIVER_TI_EMAC */
|
||||
|
||||
/*
|
||||
* Change the setting of a pin multiplexer field.
|
||||
*
|
||||
* Takes an array of pinmux settings similar to:
|
||||
*
|
||||
* struct pinmux_config uart_pins[] = {
|
||||
* { &davinci_syscfg_regs->pinmux[8], 2, 7 },
|
||||
* { &davinci_syscfg_regs->pinmux[9], 2, 0 }
|
||||
* };
|
||||
*
|
||||
* Stepping through the array, each pinmux[n] register has the given value
|
||||
* set in the pin mux field specified.
|
||||
*
|
||||
* The number of pins in the array must be passed (ARRAY_SIZE can provide
|
||||
* this value conveniently).
|
||||
*
|
||||
* Returns 0 if all field numbers and values are in the correct range,
|
||||
* else returns -1.
|
||||
*/
|
||||
int davinci_configure_pin_mux(const struct pinmux_config *pins,
|
||||
const int n_pins)
|
||||
#if defined(CONFIG_SOC_DA8XX)
|
||||
#ifndef CONFIG_USE_IRQ
|
||||
void irq_init(void)
|
||||
{
|
||||
int i;
|
||||
/*
|
||||
* Mask all IRQs by clearing the global enable and setting
|
||||
* the enable clear for all the 90 interrupts.
|
||||
*/
|
||||
|
||||
/* check for invalid pinmux values */
|
||||
for (i = 0; i < n_pins; i++) {
|
||||
if (pins[i].field >= PIN_MUX_NUM_FIELDS ||
|
||||
(pins[i].value & ~PIN_MUX_FIELD_MASK) != 0)
|
||||
return -1;
|
||||
}
|
||||
writel(0, &davinci_aintc_regs->ger);
|
||||
|
||||
/* configure the pinmuxes */
|
||||
for (i = 0; i < n_pins; i++) {
|
||||
const int offset = pins[i].field * PIN_MUX_FIELD_SIZE;
|
||||
const unsigned int value = pins[i].value << offset;
|
||||
const unsigned int mask = PIN_MUX_FIELD_MASK << offset;
|
||||
const dv_reg *mux = pins[i].mux;
|
||||
writel(0, &davinci_aintc_regs->hier);
|
||||
|
||||
writel(value | (readl(mux) & (~mask)), mux);
|
||||
}
|
||||
|
||||
return 0;
|
||||
writel(0xffffffff, &davinci_aintc_regs->ecr1);
|
||||
writel(0xffffffff, &davinci_aintc_regs->ecr2);
|
||||
writel(0xffffffff, &davinci_aintc_regs->ecr3);
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Configure multiple pinmux resources.
|
||||
*
|
||||
* Takes an pinmux_resource array of pinmux_config and pin counts:
|
||||
*
|
||||
* const struct pinmux_resource pinmuxes[] = {
|
||||
* PINMUX_ITEM(uart_pins),
|
||||
* PINMUX_ITEM(i2c_pins),
|
||||
* };
|
||||
*
|
||||
* The number of items in the array must be passed (ARRAY_SIZE can provide
|
||||
* this value conveniently).
|
||||
*
|
||||
* Each item entry is configured in the defined order. If configuration
|
||||
* of any item fails, -1 is returned and none of the following items are
|
||||
* configured. On success, 0 is returned.
|
||||
* Enable PSC for various peripherals.
|
||||
*/
|
||||
int davinci_configure_pin_mux_items(const struct pinmux_resource *item,
|
||||
int da8xx_configure_lpsc_items(const struct lpsc_resource *item,
|
||||
const int n_items)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < n_items; i++) {
|
||||
if (davinci_configure_pin_mux(item[i].pins,
|
||||
item[i].n_pins) != 0)
|
||||
return -1;
|
||||
}
|
||||
for (i = 0; i < n_items; i++)
|
||||
lpsc_on(item[i].lpsc_no);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -27,9 +27,9 @@ include $(TOPDIR)/config.mk
|
|||
|
||||
LIB = $(obj)lib$(BOARD).o
|
||||
|
||||
COBJS-y += common.o
|
||||
COBJS-$(CONFIG_MACH_DAVINCI_DA830_EVM) += da830evm.o
|
||||
COBJS-$(CONFIG_MACH_DAVINCI_DA850_EVM) += da850evm.o
|
||||
COBJS-$(CONFIG_MACH_DAVINCI_HAWK) += hawkboard.o
|
||||
|
||||
COBJS := $(COBJS-y)
|
||||
|
||||
|
|
|
|||
|
|
@ -1,55 +0,0 @@
|
|||
/*
|
||||
* Miscellaneous DA8XX functions.
|
||||
*
|
||||
* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include "common.h"
|
||||
|
||||
#ifndef CONFIG_USE_IRQ
|
||||
void irq_init(void)
|
||||
{
|
||||
/*
|
||||
* Mask all IRQs by clearing the global enable and setting
|
||||
* the enable clear for all the 90 interrupts.
|
||||
*/
|
||||
|
||||
writel(0, &davinci_aintc_regs->ger);
|
||||
|
||||
writel(0, &davinci_aintc_regs->hier);
|
||||
|
||||
writel(0xffffffff, &davinci_aintc_regs->ecr1);
|
||||
writel(0xffffffff, &davinci_aintc_regs->ecr2);
|
||||
writel(0xffffffff, &davinci_aintc_regs->ecr3);
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Enable PSC for various peripherals.
|
||||
*/
|
||||
int da8xx_configure_lpsc_items(const struct lpsc_resource *item,
|
||||
const int n_items)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < n_items; i++)
|
||||
lpsc_on(item[i].lpsc_no);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -1,30 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#ifndef __COMMON_H
|
||||
#define __COMMON_H
|
||||
|
||||
struct lpsc_resource {
|
||||
const int lpsc_no;
|
||||
};
|
||||
|
||||
void irq_init(void);
|
||||
int da8xx_configure_lpsc_items(const struct lpsc_resource *item,
|
||||
int n_items);
|
||||
|
||||
#endif /* __COMMON_H */
|
||||
|
|
@ -40,8 +40,7 @@
|
|||
#include <asm/arch/emif_defs.h>
|
||||
#include <asm/arch/emac_defs.h>
|
||||
#include <asm/io.h>
|
||||
#include "../common/misc.h"
|
||||
#include "common.h"
|
||||
#include <asm/arch/davinci_misc.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
|
|
|
|||
|
|
@ -29,8 +29,7 @@
|
|||
#include <asm/arch/emif_defs.h>
|
||||
#include <asm/arch/emac_defs.h>
|
||||
#include <asm/io.h>
|
||||
#include "../common/misc.h"
|
||||
#include "common.h"
|
||||
#include <asm/arch/davinci_misc.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
|
|
@ -54,6 +53,15 @@ static const struct pinmux_config uart_pins[] = {
|
|||
|
||||
#ifdef CONFIG_DRIVER_TI_EMAC
|
||||
static const struct pinmux_config emac_pins[] = {
|
||||
#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
|
||||
{ pinmux(14), 8, 2 },
|
||||
{ pinmux(14), 8, 3 },
|
||||
{ pinmux(14), 8, 4 },
|
||||
{ pinmux(14), 8, 5 },
|
||||
{ pinmux(14), 8, 6 },
|
||||
{ pinmux(14), 8, 7 },
|
||||
{ pinmux(15), 8, 1 },
|
||||
#else /* ! CONFIG_DRIVER_TI_EMAC_USE_RMII */
|
||||
{ pinmux(2), 8, 1 },
|
||||
{ pinmux(2), 8, 2 },
|
||||
{ pinmux(2), 8, 3 },
|
||||
|
|
@ -69,10 +77,10 @@ static const struct pinmux_config emac_pins[] = {
|
|||
{ pinmux(3), 8, 5 },
|
||||
{ pinmux(3), 8, 6 },
|
||||
{ pinmux(3), 8, 7 },
|
||||
#endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
|
||||
{ pinmux(4), 8, 0 },
|
||||
{ pinmux(4), 8, 1 }
|
||||
};
|
||||
#endif /* CONFIG_DRIVER_TI_EMAC */
|
||||
|
||||
/* I2C pin muxer settings */
|
||||
static const struct pinmux_config i2c_pins[] = {
|
||||
|
|
@ -99,6 +107,13 @@ const struct pinmux_config nand_pins[] = {
|
|||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
|
||||
#define HAS_RMII 1
|
||||
#else
|
||||
#define HAS_RMII 0
|
||||
#endif
|
||||
#endif /* CONFIG_DRIVER_TI_EMAC */
|
||||
|
||||
static const struct pinmux_resource pinmuxes[] = {
|
||||
#ifdef CONFIG_SPI_FLASH
|
||||
PINMUX_ITEM(spi1_pins),
|
||||
|
|
@ -203,9 +218,8 @@ int board_init(void)
|
|||
#ifdef CONFIG_DRIVER_TI_EMAC
|
||||
if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
|
||||
return 1;
|
||||
/* set cfgchip3 to select MII */
|
||||
writel(readl(&davinci_syscfg_regs->cfgchip3) & ~(1 << 8),
|
||||
&davinci_syscfg_regs->cfgchip3);
|
||||
|
||||
davinci_emac_mii_mode_sel(HAS_RMII);
|
||||
#endif /* CONFIG_DRIVER_TI_EMAC */
|
||||
|
||||
/* enable the console UART */
|
||||
|
|
@ -218,11 +232,100 @@ int board_init(void)
|
|||
|
||||
#ifdef CONFIG_DRIVER_TI_EMAC
|
||||
|
||||
#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
|
||||
/**
|
||||
* rmii_hw_init
|
||||
*
|
||||
* DA850/OMAP-L138 EVM can interface to a daughter card for
|
||||
* additional features. This card has an I2C GPIO Expander TCA6416
|
||||
* to select the required functions like camera, RMII Ethernet,
|
||||
* character LCD, video.
|
||||
*
|
||||
* Initialization of the expander involves configuring the
|
||||
* polarity and direction of the ports. P07-P05 are used here.
|
||||
* These ports are connected to a Mux chip which enables only one
|
||||
* functionality at a time.
|
||||
*
|
||||
* For RMII phy to respond, the MII MDIO clock has to be disabled
|
||||
* since both the PHY devices have address as zero. The MII MDIO
|
||||
* clock is controlled via GPIO2[6].
|
||||
*
|
||||
* This code is valid for Beta version of the hardware
|
||||
*/
|
||||
int rmii_hw_init(void)
|
||||
{
|
||||
const struct pinmux_config gpio_pins[] = {
|
||||
{ pinmux(6), 8, 1 }
|
||||
};
|
||||
u_int8_t buf[2];
|
||||
unsigned int temp;
|
||||
int ret;
|
||||
|
||||
/* PinMux for GPIO */
|
||||
if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0)
|
||||
return 1;
|
||||
|
||||
/* I2C Exapnder configuration */
|
||||
/* Set polarity to non-inverted */
|
||||
buf[0] = 0x0;
|
||||
buf[1] = 0x0;
|
||||
ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 4, 1, buf, 2);
|
||||
if (ret) {
|
||||
printf("\nExpander @ 0x%02x write FAILED!!!\n",
|
||||
CONFIG_SYS_I2C_EXPANDER_ADDR);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Configure P07-P05 as outputs */
|
||||
buf[0] = 0x1f;
|
||||
buf[1] = 0xff;
|
||||
ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 6, 1, buf, 2);
|
||||
if (ret) {
|
||||
printf("\nExpander @ 0x%02x write FAILED!!!\n",
|
||||
CONFIG_SYS_I2C_EXPANDER_ADDR);
|
||||
}
|
||||
|
||||
/* For Ethernet RMII selection
|
||||
* P07(SelA)=0
|
||||
* P06(SelB)=1
|
||||
* P05(SelC)=1
|
||||
*/
|
||||
if (i2c_read(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
|
||||
printf("\nExpander @ 0x%02x read FAILED!!!\n",
|
||||
CONFIG_SYS_I2C_EXPANDER_ADDR);
|
||||
}
|
||||
|
||||
buf[0] &= 0x1f;
|
||||
buf[0] |= (0 << 7) | (1 << 6) | (1 << 5);
|
||||
if (i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
|
||||
printf("\nExpander @ 0x%02x write FAILED!!!\n",
|
||||
CONFIG_SYS_I2C_EXPANDER_ADDR);
|
||||
}
|
||||
|
||||
/* Set the output as high */
|
||||
temp = REG(GPIO_BANK2_REG_SET_ADDR);
|
||||
temp |= (0x01 << 6);
|
||||
REG(GPIO_BANK2_REG_SET_ADDR) = temp;
|
||||
|
||||
/* Set the GPIO direction as output */
|
||||
temp = REG(GPIO_BANK2_REG_DIR_ADDR);
|
||||
temp &= ~(0x01 << 6);
|
||||
REG(GPIO_BANK2_REG_DIR_ADDR) = temp;
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
|
||||
|
||||
/*
|
||||
* Initializes on-board ethernet controllers.
|
||||
*/
|
||||
int board_eth_init(bd_t *bis)
|
||||
{
|
||||
#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
|
||||
/* Select RMII fucntion through the expander */
|
||||
if (rmii_hw_init())
|
||||
printf("RMII hardware init failed!!!\n");
|
||||
#endif
|
||||
if (!davinci_emac_initialize()) {
|
||||
printf("Error: Ethernet init failed!\n");
|
||||
return -1;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,68 @@
|
|||
/*
|
||||
* Modified for Hawkboard - Syed Mohammed Khasim <khasim@beagleboard.org>
|
||||
*
|
||||
* Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar@ti.com>
|
||||
* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
|
||||
* Copyright (C) 2004 Texas Instruments.
|
||||
*
|
||||
* ----------------------------------------------------------------------------
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/errno.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/davinci_misc.h>
|
||||
#include <ns16550.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
int board_init(void)
|
||||
{
|
||||
/* arch number of the board */
|
||||
gd->bd->bi_arch_number = MACH_TYPE_OMAPL138_HAWKBOARD;
|
||||
|
||||
/* address of boot parameters */
|
||||
gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_early_init_f(void)
|
||||
{
|
||||
/*
|
||||
* Kick Registers need to be set to allow access to Pin Mux registers
|
||||
*/
|
||||
writel(HAWKBOARD_KICK0_UNLOCK, &davinci_syscfg_regs->kick0);
|
||||
writel(HAWKBOARD_KICK1_UNLOCK, &davinci_syscfg_regs->kick1);
|
||||
|
||||
/* set cfgchip3 to select mii */
|
||||
writel(readl(&davinci_syscfg_regs->cfgchip3) &
|
||||
~(1 << 8), &davinci_syscfg_regs->cfgchip3);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int misc_init_r(void)
|
||||
{
|
||||
char buf[32];
|
||||
|
||||
printf("ARM Clock : %s MHz\n",
|
||||
strmhz(buf, clk_get(DAVINCI_ARM_CLKID)));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,157 @@
|
|||
/*
|
||||
* Modified for Hawkboard - Syed Mohammed Khasim <khasim@beagleboard.org>
|
||||
*
|
||||
* Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar@ti.com>
|
||||
* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
|
||||
* Copyright (C) 2004 Texas Instruments.
|
||||
*
|
||||
* ----------------------------------------------------------------------------
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/errno.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/davinci_misc.h>
|
||||
#include <ns16550.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
|
||||
|
||||
static const struct pinmux_config mii_pins[] = {
|
||||
{ pinmux(2), 8, 1 },
|
||||
{ pinmux(2), 8, 2 },
|
||||
{ pinmux(2), 8, 3 },
|
||||
{ pinmux(2), 8, 4 },
|
||||
{ pinmux(2), 8, 5 },
|
||||
{ pinmux(2), 8, 6 },
|
||||
{ pinmux(2), 8, 7 }
|
||||
};
|
||||
|
||||
static const struct pinmux_config mdio_pins[] = {
|
||||
{ pinmux(4), 8, 0 },
|
||||
{ pinmux(4), 8, 1 }
|
||||
};
|
||||
|
||||
static const struct pinmux_config nand_pins[] = {
|
||||
{ pinmux(7), 1, 1 },
|
||||
{ pinmux(7), 1, 2 },
|
||||
{ pinmux(7), 1, 4 },
|
||||
{ pinmux(7), 1, 5 },
|
||||
{ pinmux(9), 1, 0 },
|
||||
{ pinmux(9), 1, 1 },
|
||||
{ pinmux(9), 1, 2 },
|
||||
{ pinmux(9), 1, 3 },
|
||||
{ pinmux(9), 1, 4 },
|
||||
{ pinmux(9), 1, 5 },
|
||||
{ pinmux(9), 1, 6 },
|
||||
{ pinmux(9), 1, 7 },
|
||||
{ pinmux(12), 1, 5 },
|
||||
{ pinmux(12), 1, 6 }
|
||||
};
|
||||
|
||||
static const struct pinmux_config uart2_pins[] = {
|
||||
{ pinmux(0), 4, 6 },
|
||||
{ pinmux(0), 4, 7 },
|
||||
{ pinmux(4), 2, 4 },
|
||||
{ pinmux(4), 2, 5 }
|
||||
};
|
||||
|
||||
static const struct pinmux_config i2c_pins[] = {
|
||||
{ pinmux(4), 2, 4 },
|
||||
{ pinmux(4), 2, 5 }
|
||||
};
|
||||
|
||||
static const struct pinmux_resource pinmuxes[] = {
|
||||
PINMUX_ITEM(mii_pins),
|
||||
PINMUX_ITEM(mdio_pins),
|
||||
PINMUX_ITEM(i2c_pins),
|
||||
PINMUX_ITEM(nand_pins),
|
||||
PINMUX_ITEM(uart2_pins),
|
||||
};
|
||||
|
||||
static const struct lpsc_resource lpsc[] = {
|
||||
{ DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
|
||||
{ DAVINCI_LPSC_SPI1 }, /* Serial Flash */
|
||||
{ DAVINCI_LPSC_EMAC }, /* image download */
|
||||
{ DAVINCI_LPSC_UART2 }, /* console */
|
||||
{ DAVINCI_LPSC_GPIO },
|
||||
};
|
||||
|
||||
void board_init_f(ulong bootflag)
|
||||
{
|
||||
/*
|
||||
* Kick Registers need to be set to allow access to Pin Mux registers
|
||||
*/
|
||||
writel(HAWKBOARD_KICK0_UNLOCK, &davinci_syscfg_regs->kick0);
|
||||
writel(HAWKBOARD_KICK1_UNLOCK, &davinci_syscfg_regs->kick1);
|
||||
|
||||
/* setup the SUSPSRC for ARM to control emulation suspend */
|
||||
writel(readl(&davinci_syscfg_regs->suspsrc) &
|
||||
~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
|
||||
DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
|
||||
DAVINCI_SYSCFG_SUSPSRC_UART2), &davinci_syscfg_regs->suspsrc);
|
||||
|
||||
/* Power on required peripherals
|
||||
* ARM does not have acess by default to PSC0 and PSC1
|
||||
* assuming here that the DSP bootloader has set the IOPU
|
||||
* such that PSC access is available to ARM
|
||||
*/
|
||||
da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc));
|
||||
|
||||
/* configure pinmux settings */
|
||||
davinci_configure_pin_mux_items(pinmuxes,
|
||||
ARRAY_SIZE(pinmuxes));
|
||||
|
||||
writel(readl(&davinci_uart2_ctrl_regs->pwremu_mgmt) |
|
||||
(DAVINCI_UART_PWREMU_MGMT_FREE) |
|
||||
(DAVINCI_UART_PWREMU_MGMT_URRST) |
|
||||
(DAVINCI_UART_PWREMU_MGMT_UTRST),
|
||||
&davinci_uart2_ctrl_regs->pwremu_mgmt);
|
||||
|
||||
NS16550_init((NS16550_t)(DAVINCI_UART2_BASE),
|
||||
CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE);
|
||||
|
||||
puts("Nand boot...\n");
|
||||
|
||||
nand_boot();
|
||||
}
|
||||
|
||||
void puts(const char *str)
|
||||
{
|
||||
while (*str)
|
||||
putc(*str++);
|
||||
}
|
||||
|
||||
void putc(char c)
|
||||
{
|
||||
if (gd->flags & GD_FLG_SILENT)
|
||||
return;
|
||||
|
||||
if (c == '\n')
|
||||
NS16550_putc((NS16550_t)(DAVINCI_UART2_BASE), '\r');
|
||||
|
||||
NS16550_putc((NS16550_t)(DAVINCI_UART2_BASE), c);
|
||||
}
|
||||
|
||||
void hang(void)
|
||||
{
|
||||
puts("### ERROR ### Please RESET the board ###\n");
|
||||
for (;;)
|
||||
;
|
||||
}
|
||||
|
|
@ -22,7 +22,7 @@
|
|||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/emif_defs.h>
|
||||
#include <asm/arch/nand_defs.h>
|
||||
#include "../common/misc.h"
|
||||
#include <asm/arch/davinci_misc.h>
|
||||
#include <net.h>
|
||||
#include <netdev.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -22,7 +22,7 @@
|
|||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/gpio_defs.h>
|
||||
#include <asm/arch/nand_defs.h>
|
||||
#include "../common/misc.h"
|
||||
#include <asm/arch/davinci_misc.h>
|
||||
#include <net.h>
|
||||
#include <netdev.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@
|
|||
#include <asm/arch/nand_defs.h>
|
||||
#include <asm/arch/gpio_defs.h>
|
||||
#include <netdev.h>
|
||||
#include "../common/misc.h"
|
||||
#include <asm/arch/davinci_misc.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
|
|
|
|||
|
|
@ -27,7 +27,7 @@
|
|||
#include <common.h>
|
||||
#include <i2c.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include "../common/misc.h"
|
||||
#include <asm/arch/davinci_misc.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,53 @@
|
|||
#
|
||||
# (C) Copyright 2000, 2001, 2002
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(BOARD).a
|
||||
|
||||
COBJS-y += ea20.o
|
||||
|
||||
COBJS := $(COBJS-y)
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS))
|
||||
SOBJS := $(addprefix $(obj),$(SOBJS))
|
||||
|
||||
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
|
||||
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
|
||||
|
||||
clean:
|
||||
rm -f $(SOBJS) $(OBJS)
|
||||
|
||||
distclean: clean
|
||||
rm -f $(LIB) core *.bak *~ .depend
|
||||
|
||||
#########################################################################
|
||||
# This is for $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
|
@ -0,0 +1,196 @@
|
|||
/*
|
||||
* (C) Copyright 2010
|
||||
* Stefano Babic, DENX Software Engineering, sbabic@denx.de
|
||||
*
|
||||
* Based on da850evm.c, original Copyrights follow:
|
||||
*
|
||||
* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* Based on da830evm.c. Original Copyrights follow:
|
||||
*
|
||||
* Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
|
||||
* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <i2c.h>
|
||||
#include <net.h>
|
||||
#include <netdev.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/emif_defs.h>
|
||||
#include <asm/arch/emac_defs.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/davinci_misc.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
|
||||
|
||||
/* SPI0 pin muxer settings */
|
||||
static const struct pinmux_config spi1_pins[] = {
|
||||
{ pinmux(5), 1, 1 },
|
||||
{ pinmux(5), 1, 2 },
|
||||
{ pinmux(5), 1, 4 },
|
||||
{ pinmux(5), 1, 5 }
|
||||
};
|
||||
|
||||
/* UART pin muxer settings */
|
||||
static const struct pinmux_config uart_pins[] = {
|
||||
{ pinmux(0), 4, 6 },
|
||||
{ pinmux(0), 4, 7 },
|
||||
{ pinmux(4), 2, 4 },
|
||||
{ pinmux(4), 2, 5 }
|
||||
};
|
||||
|
||||
#ifdef CONFIG_DRIVER_TI_EMAC
|
||||
#define HAS_RMII 1
|
||||
static const struct pinmux_config emac_pins[] = {
|
||||
{ pinmux(14), 8, 2 },
|
||||
{ pinmux(14), 8, 3 },
|
||||
{ pinmux(14), 8, 4 },
|
||||
{ pinmux(14), 8, 5 },
|
||||
{ pinmux(14), 8, 6 },
|
||||
{ pinmux(14), 8, 7 },
|
||||
{ pinmux(15), 8, 1 },
|
||||
{ pinmux(4), 8, 0 },
|
||||
{ pinmux(4), 8, 1 }
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_NAND_DAVINCI
|
||||
const struct pinmux_config nand_pins[] = {
|
||||
{ pinmux(7), 1, 1 },
|
||||
{ pinmux(7), 1, 2 },
|
||||
{ pinmux(7), 1, 4 },
|
||||
{ pinmux(7), 1, 5 },
|
||||
{ pinmux(9), 1, 0 },
|
||||
{ pinmux(9), 1, 1 },
|
||||
{ pinmux(9), 1, 2 },
|
||||
{ pinmux(9), 1, 3 },
|
||||
{ pinmux(9), 1, 4 },
|
||||
{ pinmux(9), 1, 5 },
|
||||
{ pinmux(9), 1, 6 },
|
||||
{ pinmux(9), 1, 7 },
|
||||
{ pinmux(12), 1, 5 },
|
||||
{ pinmux(12), 1, 6 }
|
||||
};
|
||||
#endif
|
||||
|
||||
static const struct pinmux_resource pinmuxes[] = {
|
||||
#ifdef CONFIG_SPI_FLASH
|
||||
PINMUX_ITEM(spi1_pins),
|
||||
#endif
|
||||
PINMUX_ITEM(uart_pins),
|
||||
#ifdef CONFIG_NAND_DAVINCI
|
||||
PINMUX_ITEM(nand_pins),
|
||||
#endif
|
||||
};
|
||||
|
||||
static const struct lpsc_resource lpsc[] = {
|
||||
{ DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
|
||||
{ DAVINCI_LPSC_SPI1 }, /* Serial Flash */
|
||||
{ DAVINCI_LPSC_EMAC }, /* image download */
|
||||
{ DAVINCI_LPSC_UART2 }, /* console */
|
||||
{ DAVINCI_LPSC_GPIO },
|
||||
};
|
||||
|
||||
int board_init(void)
|
||||
{
|
||||
#ifndef CONFIG_USE_IRQ
|
||||
irq_init();
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef CONFIG_NAND_DAVINCI
|
||||
/*
|
||||
* NAND CS setup - cycle counts based on da850evm NAND timings in the
|
||||
* Linux kernel @ 25MHz EMIFA
|
||||
*/
|
||||
writel((DAVINCI_ABCR_WSETUP(0) |
|
||||
DAVINCI_ABCR_WSTROBE(0) |
|
||||
DAVINCI_ABCR_WHOLD(0) |
|
||||
DAVINCI_ABCR_RSETUP(0) |
|
||||
DAVINCI_ABCR_RSTROBE(1) |
|
||||
DAVINCI_ABCR_RHOLD(0) |
|
||||
DAVINCI_ABCR_TA(0) |
|
||||
DAVINCI_ABCR_ASIZE_8BIT),
|
||||
&davinci_emif_regs->ab2cr); /* CS3 */
|
||||
#endif
|
||||
|
||||
/* arch number of the board */
|
||||
gd->bd->bi_arch_number = MACH_TYPE_EA20;
|
||||
|
||||
/* address of boot parameters */
|
||||
gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
|
||||
|
||||
/*
|
||||
* Power on required peripherals
|
||||
* ARM does not have access by default to PSC0 and PSC1
|
||||
* assuming here that the DSP bootloader has set the IOPU
|
||||
* such that PSC access is available to ARM
|
||||
*/
|
||||
if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
|
||||
return 1;
|
||||
|
||||
/* setup the SUSPSRC for ARM to control emulation suspend */
|
||||
writel(readl(&davinci_syscfg_regs->suspsrc) &
|
||||
~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
|
||||
DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
|
||||
DAVINCI_SYSCFG_SUSPSRC_UART2),
|
||||
&davinci_syscfg_regs->suspsrc);
|
||||
|
||||
/* configure pinmux settings */
|
||||
if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
|
||||
return 1;
|
||||
|
||||
#ifdef CONFIG_DRIVER_TI_EMAC
|
||||
if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
|
||||
return 1;
|
||||
|
||||
davinci_emac_mii_mode_sel(HAS_RMII);
|
||||
#endif /* CONFIG_DRIVER_TI_EMAC */
|
||||
|
||||
/* enable the console UART */
|
||||
writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
|
||||
DAVINCI_UART_PWREMU_MGMT_UTRST),
|
||||
&davinci_uart2_ctrl_regs->pwremu_mgmt);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_DRIVER_TI_EMAC
|
||||
|
||||
/*
|
||||
* Initializes on-board ethernet controllers.
|
||||
*/
|
||||
int board_eth_init(bd_t *bis)
|
||||
{
|
||||
if (!davinci_emac_initialize()) {
|
||||
printf("Error: Ethernet init failed!\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
/*
|
||||
* This board has a RMII PHY. However, the MDC line on the SOM
|
||||
* must not be disabled (there is no MII PHY on the
|
||||
* baseboard) via the GPIO2[6], because this pin
|
||||
* disables at the same time the SPI flash.
|
||||
*/
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif /* CONFIG_DRIVER_TI_EMAC */
|
||||
|
|
@ -27,7 +27,7 @@
|
|||
#include <common.h>
|
||||
#include <i2c.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include "../common/misc.h"
|
||||
#include <asm/arch/davinci_misc.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
|
|
|
|||
|
|
@ -30,7 +30,7 @@
|
|||
#include <common.h>
|
||||
#include <i2c.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include "../common/misc.h"
|
||||
#include <asm/arch/davinci_misc.h>
|
||||
|
||||
#define DAVINCI_A3CR (0x01E00014) /* EMIF-A CS3 config register. */
|
||||
#define DAVINCI_A3CR_VAL (0x3FFFFFFD) /* EMIF-A CS3 value for FPGA. */
|
||||
|
|
|
|||
|
|
@ -28,7 +28,7 @@
|
|||
#include <nand.h>
|
||||
#include <asm/arch/nand_defs.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include "../common/misc.h"
|
||||
#include <asm/arch/davinci_misc.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,37 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
|
||||
*
|
||||
* (C) Copyright 2008
|
||||
* Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
|
||||
void board_init_f(unsigned long bootflag)
|
||||
{
|
||||
relocate_code(CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL,
|
||||
CONFIG_SYS_TEXT_BASE);
|
||||
}
|
||||
|
|
@ -76,6 +76,10 @@ pm9261 arm arm926ejs - ronetix
|
|||
pm9263 arm arm926ejs - ronetix at91
|
||||
da830evm arm arm926ejs da8xxevm davinci davinci
|
||||
da850evm arm arm926ejs da8xxevm davinci davinci
|
||||
hawkboard arm arm926ejs da8xxevm davinci davinci
|
||||
hawkboard_nand arm arm926ejs da8xxevm davinci davinci hawkboard:NAND_U_BOOT
|
||||
hawkboard_uart arm arm926ejs da8xxevm davinci davinci hawkboard:UART_U_BOOT
|
||||
ea20 arm arm926ejs ea20 davinci davinci
|
||||
davinci_dm355evm arm arm926ejs dm355evm davinci davinci
|
||||
davinci_dm355leopard arm arm926ejs dm355leopard davinci davinci
|
||||
davinci_dm365evm arm arm926ejs dm365evm davinci davinci
|
||||
|
|
|
|||
|
|
@ -0,0 +1,93 @@
|
|||
Summary
|
||||
=======
|
||||
The README is for the boot procedure used for TI's OMAP-L138 based
|
||||
hawkboard. The hawkboard comes with a 128MiB Nand flash and a 128MiB
|
||||
DDR SDRAM along with a host of other controllers.
|
||||
|
||||
The hawkboard is booted in three stages. The initial bootloader which
|
||||
executes upon reset is the Rom Boot Loader(RBL) which sits in the
|
||||
internal ROM of the omap. The RBL initialises the memory and the nand
|
||||
controller, and copies the image stored at a predefined location(block
|
||||
1) of the nand flash. The image loaded by the RBL to the memory is the
|
||||
AIS signed nand_spl image. This, in turns copies the u-boot binary
|
||||
from the nand flash to the memory and jumps to the u-boot entry point.
|
||||
|
||||
AIS is an image format defined by TI for the images that are to be
|
||||
loaded to memory by the RBL. The image is divided into a series of
|
||||
sections and the image's entry point is specified. Each section comes
|
||||
with meta data like the target address the section is to be copied to
|
||||
and the size of the section, which is used by the RBL to load the
|
||||
image. At the end of the image the RBL jumps to the image entry
|
||||
point.
|
||||
|
||||
The secondary stage bootloader(nand_spl) which is loaded by the RBL
|
||||
then loads the u-boot from a predefined location in the nand to the
|
||||
memory and jumps to the u-boot entry point.
|
||||
|
||||
The reason a secondary stage bootloader is used is because the ECC
|
||||
layout expected by the RBL is not the same as that used by
|
||||
u-boot/linux. This also implies that for flashing the nand_spl image,
|
||||
we need to use the u-boot which uses the ECC layout expected by the
|
||||
RBL[1]. Booting u-boot over UART(UART boot) is explained here[2].
|
||||
|
||||
|
||||
Compilation
|
||||
===========
|
||||
Three images might be needed
|
||||
|
||||
* nand_spl - This is the secondary bootloader which boots the u-boot
|
||||
binary.
|
||||
|
||||
hawkboard_nand_config
|
||||
|
||||
The nand_spl ELF gets generated under nand_spl/u-boot-spl. This
|
||||
needs to be processed with the AISGen tool for generating the AIS
|
||||
signed image to be flashed. Steps for generating the AIS image are
|
||||
explained here[3].
|
||||
|
||||
* u-boot binary - This is the image flashed to the nand and copied to
|
||||
the memory by the nand_spl.
|
||||
|
||||
hawkboard_config
|
||||
|
||||
* u-boot for uart boot - This is same as the u-boot binary generated
|
||||
above, with the sole difference of the CONFIG_SYS_TEXT_BASE being
|
||||
0xc1080000, as expected by the RBL.
|
||||
|
||||
hawkboard_uart_config
|
||||
|
||||
|
||||
Flashing the images to Nand
|
||||
===========================
|
||||
The nand_spl AIS image needs to be flashed to the block 1 of the
|
||||
Nand flash, as that is the location the RBL expects the image[4]. For
|
||||
flashing the nand_spl, boot over the u-boot specified in [1], and
|
||||
flash the image
|
||||
|
||||
=> tftpboot 0xc0700000 <nand_spl_ais.bin>
|
||||
=> nand erase 0x20000 0x20000
|
||||
=> nand write.e 0xc0700000 0x20000 <nand_spl_size>
|
||||
|
||||
The u-boot binary is flashed at location 0xe0000(block 6) of the nand
|
||||
flash. The nand_spl loader expects the u-boot at this location. For
|
||||
flashing the u-boot binary
|
||||
|
||||
=> tftpboot 0xc0700000 u-boot.bin
|
||||
=> nand erase 0xe0000 0x40000
|
||||
=> nand write.e 0xc0700000 0xe0000 <u-boot-size>
|
||||
|
||||
|
||||
Links
|
||||
=====
|
||||
|
||||
[1]
|
||||
http://code.google.com/p/hawkboard/downloads/detail?name=u-boot_uart_ais_v1.bin
|
||||
|
||||
[2]
|
||||
http://elinux.org/Hawkboard#Booting_u-boot_over_UART
|
||||
|
||||
[3]
|
||||
http://elinux.org/Hawkboard#Signing_u-boot_for_UART_boot
|
||||
|
||||
[4]
|
||||
http://processors.wiki.ti.com/index.php/RBL_UBL_and_host_program#RBL_booting_from_NAND_and_ECC.2FBad_blocks
|
||||
|
|
@ -243,8 +243,35 @@ static int gen_get_link_speed(int phy_addr)
|
|||
{
|
||||
u_int16_t tmp;
|
||||
|
||||
if (davinci_eth_phy_read(phy_addr, MII_STATUS_REG, &tmp) && (tmp & 0x04))
|
||||
if (davinci_eth_phy_read(phy_addr, MII_STATUS_REG, &tmp) &&
|
||||
(tmp & 0x04)) {
|
||||
#if defined(CONFIG_DRIVER_TI_EMAC_USE_RMII) && \
|
||||
defined(CONFIG_MACH_DAVINCI_DA850_EVM)
|
||||
davinci_eth_phy_read(phy_addr, PHY_ANLPAR, &tmp);
|
||||
|
||||
/* Speed doesn't matter, there is no setting for it in EMAC. */
|
||||
if (tmp & (PHY_ANLPAR_TXFD | PHY_ANLPAR_10FD)) {
|
||||
/* set EMAC for Full Duplex */
|
||||
writel(EMAC_MACCONTROL_MIIEN_ENABLE |
|
||||
EMAC_MACCONTROL_FULLDUPLEX_ENABLE,
|
||||
&adap_emac->MACCONTROL);
|
||||
} else {
|
||||
/*set EMAC for Half Duplex */
|
||||
writel(EMAC_MACCONTROL_MIIEN_ENABLE,
|
||||
&adap_emac->MACCONTROL);
|
||||
}
|
||||
|
||||
if (tmp & (PHY_ANLPAR_TXFD | PHY_ANLPAR_TX))
|
||||
writel(readl(&adap_emac->MACCONTROL) |
|
||||
EMAC_MACCONTROL_RMIISPEED_100,
|
||||
&adap_emac->MACCONTROL);
|
||||
else
|
||||
writel(readl(&adap_emac->MACCONTROL) &
|
||||
~EMAC_MACCONTROL_RMIISPEED_100,
|
||||
&adap_emac->MACCONTROL);
|
||||
#endif
|
||||
return(1);
|
||||
}
|
||||
|
||||
return(0);
|
||||
}
|
||||
|
|
@ -326,6 +353,12 @@ static int davinci_eth_open(struct eth_device *dev, bd_t *bis)
|
|||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_DRIVER_TI_EMAC_USE_RMII) && \
|
||||
defined(CONFIG_MACH_DAVINCI_DA850_EVM)
|
||||
adap_ewrap->c0rxen = adap_ewrap->c1rxen = adap_ewrap->c2rxen = 0;
|
||||
adap_ewrap->c0txen = adap_ewrap->c1txen = adap_ewrap->c2txen = 0;
|
||||
adap_ewrap->c0miscen = adap_ewrap->c1miscen = adap_ewrap->c2miscen = 0;
|
||||
#endif
|
||||
rx_desc = emac_rx_desc;
|
||||
|
||||
writel(1, &adap_emac->TXCONTROL);
|
||||
|
|
@ -480,6 +513,12 @@ static void davinci_eth_close(struct eth_device *dev)
|
|||
writel(0, &adap_ewrap->EWCTL);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_DRIVER_TI_EMAC_USE_RMII) && \
|
||||
defined(CONFIG_MACH_DAVINCI_DA850_EVM)
|
||||
adap_ewrap->c0rxen = adap_ewrap->c1rxen = adap_ewrap->c2rxen = 0;
|
||||
adap_ewrap->c0txen = adap_ewrap->c1txen = adap_ewrap->c2txen = 0;
|
||||
adap_ewrap->c0miscen = adap_ewrap->c1miscen = adap_ewrap->c2miscen = 0;
|
||||
#endif
|
||||
debug_emac("- emac_close\n");
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -27,6 +27,7 @@
|
|||
* Board
|
||||
*/
|
||||
#define CONFIG_DRIVER_TI_EMAC
|
||||
#define CONFIG_USE_SPIFLASH
|
||||
|
||||
/*
|
||||
* SoC Configuration
|
||||
|
|
@ -71,6 +72,15 @@
|
|||
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
|
||||
|
||||
#define CONFIG_SPI
|
||||
#define CONFIG_SPI_FLASH
|
||||
#define CONFIG_SPI_FLASH_STMICRO
|
||||
#define CONFIG_DAVINCI_SPI
|
||||
#define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE
|
||||
#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID)
|
||||
#define CONFIG_SF_DEFAULT_SPEED 30000000
|
||||
#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
|
||||
|
||||
/*
|
||||
* I2C Configuration
|
||||
*/
|
||||
|
|
@ -78,6 +88,7 @@
|
|||
#define CONFIG_DRIVER_DAVINCI_I2C
|
||||
#define CONFIG_SYS_I2C_SPEED 25000
|
||||
#define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
|
||||
#define CONFIG_SYS_I2C_EXPANDER_ADDR 0x20
|
||||
|
||||
/*
|
||||
* Flash & Environment
|
||||
|
|
@ -115,6 +126,16 @@
|
|||
#define CONFIG_NET_MULTI
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USE_SPIFLASH
|
||||
#undef CONFIG_ENV_IS_IN_FLASH
|
||||
#undef CONFIG_ENV_IS_IN_NAND
|
||||
#define CONFIG_ENV_IS_IN_SPI_FLASH
|
||||
#define CONFIG_ENV_SIZE (64 << 10)
|
||||
#define CONFIG_ENV_OFFSET (256 << 10)
|
||||
#define CONFIG_ENV_SECT_SIZE (64 << 10)
|
||||
#define CONFIG_SYS_NO_FLASH
|
||||
#endif
|
||||
|
||||
/*
|
||||
* U-Boot general configuration
|
||||
*/
|
||||
|
|
@ -179,6 +200,14 @@
|
|||
#define CONFIG_CMD_UBIFS
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USE_SPIFLASH
|
||||
#undef CONFIG_CMD_IMLS
|
||||
#undef CONFIG_CMD_FLASH
|
||||
#define CONFIG_CMD_SPI
|
||||
#define CONFIG_CMD_SF
|
||||
#define CONFIG_CMD_SAVEENV
|
||||
#endif
|
||||
|
||||
#if !defined(CONFIG_USE_NAND) && \
|
||||
!defined(CONFIG_USE_NOR) && \
|
||||
!defined(CONFIG_USE_SPIFLASH)
|
||||
|
|
|
|||
|
|
@ -0,0 +1,192 @@
|
|||
/*
|
||||
* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* Based on davinci_dvevm.h. Original Copyrights follow:
|
||||
*
|
||||
* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
/*
|
||||
* Board
|
||||
*/
|
||||
#define CONFIG_DRIVER_TI_EMAC
|
||||
#define CONFIG_USE_SPIFLASH
|
||||
#define CONFIG_DRIVER_TI_EMAC_USE_RMII
|
||||
|
||||
/*
|
||||
* SoC Configuration
|
||||
*/
|
||||
#define CONFIG_MACH_DAVINCI_DA850_EVM
|
||||
#define CONFIG_ARM926EJS /* arm926ejs CPU core */
|
||||
#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */
|
||||
#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
|
||||
#define CONFIG_SYS_OSCIN_FREQ 24000000
|
||||
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
|
||||
#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
#define CONFIG_SKIP_LOWLEVEL_INIT
|
||||
#define CONFIG_SYS_TEXT_BASE 0xc1080000
|
||||
|
||||
/*
|
||||
* Memory Info
|
||||
*/
|
||||
#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */
|
||||
#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
|
||||
#define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */
|
||||
#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
|
||||
|
||||
/* memtest start addr */
|
||||
#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000)
|
||||
|
||||
/* memtest will be run on 16MB */
|
||||
#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024)
|
||||
|
||||
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
|
||||
#define CONFIG_STACKSIZE (256*1024) /* regular stack */
|
||||
|
||||
/*
|
||||
* Serial Driver info
|
||||
*/
|
||||
#define CONFIG_SYS_NS16550
|
||||
#define CONFIG_SYS_NS16550_SERIAL
|
||||
#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */
|
||||
#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */
|
||||
#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
|
||||
#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
|
||||
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
|
||||
|
||||
#define CONFIG_SPI
|
||||
#define CONFIG_SPI_FLASH
|
||||
#define CONFIG_SPI_FLASH_STMICRO
|
||||
#define CONFIG_DAVINCI_SPI
|
||||
#define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE
|
||||
#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID)
|
||||
#define CONFIG_SF_DEFAULT_SPEED 30000000
|
||||
#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
|
||||
|
||||
/*
|
||||
* Network & Ethernet Configuration
|
||||
*/
|
||||
#ifdef CONFIG_DRIVER_TI_EMAC
|
||||
#define CONFIG_EMAC_MDIO_PHY_NUM 0
|
||||
#define CONFIG_MII
|
||||
#define CONFIG_BOOTP_DEFAULT
|
||||
#define CONFIG_BOOTP_DNS
|
||||
#define CONFIG_BOOTP_DNS2
|
||||
#define CONFIG_BOOTP_SEND_HOSTNAME
|
||||
#define CONFIG_NET_RETRY_COUNT 10
|
||||
#define CONFIG_NET_MULTI
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USE_SPIFLASH
|
||||
#undef CONFIG_ENV_IS_IN_FLASH
|
||||
#undef CONFIG_ENV_IS_IN_NAND
|
||||
#define CONFIG_ENV_IS_IN_SPI_FLASH
|
||||
#define CONFIG_ENV_SIZE (8 << 10)
|
||||
#define CONFIG_ENV_OFFSET (256 << 10)
|
||||
#define CONFIG_ENV_SECT_SIZE (64 << 10)
|
||||
#define CONFIG_SYS_NO_FLASH
|
||||
#endif
|
||||
|
||||
/*
|
||||
* U-Boot general configuration
|
||||
*/
|
||||
#define CONFIG_BOOTFILE "uImage" /* Boot file name */
|
||||
#define CONFIG_SYS_PROMPT "ea20 > " /* Command Prompt */
|
||||
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
|
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
|
||||
#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
|
||||
#define CONFIG_VERSION_VARIABLE
|
||||
#define CONFIG_AUTO_COMPLETE
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
||||
#define CONFIG_CMDLINE_EDITING
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
#define CONFIG_CRC32_VERIFY
|
||||
#define CONFIG_MX_CYCLIC
|
||||
|
||||
/*
|
||||
* Linux Information
|
||||
*/
|
||||
#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
|
||||
#define CONFIG_CMDLINE_TAG
|
||||
#define CONFIG_SETUP_MEMORY_TAGS
|
||||
#define CONFIG_BOOTDELAY 3
|
||||
|
||||
/*
|
||||
* U-Boot commands
|
||||
*/
|
||||
#include <config_cmd_default.h>
|
||||
#define CONFIG_CMD_ENV
|
||||
#define CONFIG_CMD_ASKENV
|
||||
#define CONFIG_CMD_DHCP
|
||||
#define CONFIG_CMD_DIAG
|
||||
#define CONFIG_CMD_MII
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_SAVES
|
||||
#define CONFIG_CMD_MEMORY
|
||||
|
||||
#ifndef CONFIG_DRIVER_TI_EMAC
|
||||
#undef CONFIG_CMD_NET
|
||||
#undef CONFIG_CMD_DHCP
|
||||
#undef CONFIG_CMD_MII
|
||||
#undef CONFIG_CMD_PING
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USE_NAND
|
||||
#undef CONFIG_CMD_FLASH
|
||||
#undef CONFIG_CMD_IMLS
|
||||
#define CONFIG_CMD_NAND
|
||||
|
||||
#define CONFIG_CMD_MTDPARTS
|
||||
#define CONFIG_MTD_DEVICE
|
||||
#define CONFIG_MTD_PARTITIONS
|
||||
#define CONFIG_LZO
|
||||
#define CONFIG_RBTREE
|
||||
#define CONFIG_CMD_UBI
|
||||
#define CONFIG_CMD_UBIFS
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USE_SPIFLASH
|
||||
#undef CONFIG_CMD_IMLS
|
||||
#undef CONFIG_CMD_FLASH
|
||||
#define CONFIG_CMD_SPI
|
||||
#define CONFIG_CMD_SF
|
||||
#define CONFIG_CMD_SAVEENV
|
||||
#endif
|
||||
|
||||
#if !defined(CONFIG_USE_NAND) && \
|
||||
!defined(CONFIG_USE_NOR) && \
|
||||
!defined(CONFIG_USE_SPIFLASH)
|
||||
#define CONFIG_ENV_IS_NOWHERE
|
||||
#define CONFIG_SYS_NO_FLASH
|
||||
#define CONFIG_ENV_SIZE (16 << 10)
|
||||
#undef CONFIG_CMD_IMLS
|
||||
#undef CONFIG_CMD_ENV
|
||||
#endif
|
||||
|
||||
/* additions for new relocation code, must added to all boards */
|
||||
#define CONFIG_SYS_SDRAM_BASE 0xc0000000
|
||||
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
|
||||
GENERATED_GBL_DATA_SIZE)
|
||||
#endif /* __CONFIG_H */
|
||||
|
|
@ -0,0 +1,206 @@
|
|||
/*
|
||||
* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* Based on davinci_dvevm.h. Original Copyrights follow:
|
||||
*
|
||||
* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
/*
|
||||
* Board
|
||||
*/
|
||||
#define CONFIG_SYS_USE_NAND 1
|
||||
|
||||
/*
|
||||
* SoC Configuration
|
||||
*/
|
||||
#define CONFIG_MACH_DAVINCI_HAWK
|
||||
#define CONFIG_ARM926EJS /* arm926ejs CPU core */
|
||||
#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */
|
||||
#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
|
||||
#define CONFIG_SYS_OSCIN_FREQ 24000000
|
||||
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
|
||||
#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
#define CONFIG_SKIP_LOWLEVEL_INIT
|
||||
#define CONFIG_BOARD_EARLY_INIT_F
|
||||
|
||||
#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_UART_U_BOOT)
|
||||
#define CONFIG_SYS_TEXT_BASE 0xc1080000
|
||||
#else
|
||||
#define CONFIG_SYS_TEXT_BASE 0xc1180000
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Memory Info
|
||||
*/
|
||||
#define CONFIG_SYS_MALLOC_LEN (1*1024*1024) /* malloc() len */
|
||||
#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE
|
||||
#define PHYS_SDRAM_1_SIZE (128 << 20) /* SDRAM size 128MB */
|
||||
#define CONFIG_SYS_SDRAM_BASE 0xc0000000
|
||||
#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20)
|
||||
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 -\
|
||||
GENERATED_GBL_DATA_SIZE)
|
||||
|
||||
/* memtest start addr */
|
||||
#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1)
|
||||
|
||||
/* memtest will be run on 16MB */
|
||||
#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024)
|
||||
|
||||
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
|
||||
#define CONFIG_STACKSIZE (256*1024) /* regular stack */
|
||||
|
||||
/*
|
||||
* Serial Driver info
|
||||
*/
|
||||
#define CONFIG_SYS_NS16550
|
||||
#define CONFIG_SYS_NS16550_SERIAL
|
||||
#define CONFIG_SYS_NS16550_REG_SIZE -4
|
||||
#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE
|
||||
#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
|
||||
#define CONFIG_CONS_INDEX 1
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
|
||||
|
||||
/*
|
||||
* Network & Ethernet Configuration
|
||||
*/
|
||||
#define CONFIG_EMAC_MDIO_PHY_NUM 0x7
|
||||
#if !defined(CONFIG_NAND_SPL)
|
||||
#define CONFIG_DRIVER_TI_EMAC
|
||||
#endif
|
||||
#define CONFIG_MII
|
||||
#define CONFIG_BOOTP_DEFAULT
|
||||
#define CONFIG_BOOTP_DNS
|
||||
#define CONFIG_BOOTP_DNS2
|
||||
#define CONFIG_BOOTP_SEND_HOSTNAME
|
||||
#define CONFIG_NET_RETRY_COUNT 10
|
||||
#define CONFIG_NET_MULTI
|
||||
|
||||
/*
|
||||
* Nand Flash
|
||||
*/
|
||||
#ifdef CONFIG_SYS_USE_NAND
|
||||
#define CONFIG_SYS_NO_FLASH
|
||||
#define CONFIG_ENV_IS_IN_NAND
|
||||
#define CONFIG_ENV_SIZE (128 << 10)
|
||||
#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
|
||||
#define CONFIG_CLE_MASK 0x10
|
||||
#define CONFIG_ALE_MASK 0x8
|
||||
#define CONFIG_SYS_NAND_USE_FLASH_BBT
|
||||
#define CONFIG_NAND_DAVINCI
|
||||
#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
|
||||
#define CFG_DAVINCI_STD_NAND_LAYOUT
|
||||
#define CONFIG_SYS_NAND_CS 3
|
||||
#define CONFIG_SYS_NAND_PAGE_2K
|
||||
#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
|
||||
/* Max number of NAND devices */
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE_LIST { 0x62000000, }
|
||||
#define NAND_MAX_CHIPS 1
|
||||
/* Block 0--not used by bootcode */
|
||||
#define CONFIG_ENV_OFFSET 0x0
|
||||
|
||||
#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10)
|
||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10)
|
||||
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0xe0000
|
||||
#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000
|
||||
#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1180000
|
||||
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
|
||||
#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \
|
||||
CONFIG_SYS_NAND_U_BOOT_SIZE - \
|
||||
CONFIG_SYS_MALLOC_LEN - \
|
||||
GENERATED_GBL_DATA_SIZE)
|
||||
#define CONFIG_SYS_NAND_ECCPOS { \
|
||||
24, 25, 26, 27, 28, \
|
||||
29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \
|
||||
39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \
|
||||
49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \
|
||||
59, 60, 61, 62, 63 }
|
||||
#define CONFIG_SYS_NAND_PAGE_COUNT 64
|
||||
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
|
||||
#define CONFIG_SYS_NAND_ECCSIZE 512
|
||||
#define CONFIG_SYS_NAND_ECCBYTES 10
|
||||
#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
|
||||
CONFIG_SYS_NAND_ECCSIZE)
|
||||
#define CONFIG_SYS_NAND_OOBSIZE 64
|
||||
#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
|
||||
CONFIG_SYS_NAND_ECCSTEPS)
|
||||
#endif /* CONFIG_SYS_USE_NAND */
|
||||
|
||||
/*
|
||||
* U-Boot general configuration
|
||||
*/
|
||||
#define CONFIG_MISC_INIT_R
|
||||
#define CONFIG_BOOTFILE "uImage" /* Boot file name */
|
||||
#define CONFIG_SYS_PROMPT "hawkboard > " /* Command Prompt */
|
||||
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
|
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
|
||||
#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
|
||||
#define CONFIG_VERSION_VARIABLE
|
||||
#define CONFIG_AUTO_COMPLETE
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
||||
#define CONFIG_CMDLINE_EDITING
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
#define CONFIG_CRC32_VERIFY
|
||||
#define CONFIG_MX_CYCLIC
|
||||
|
||||
/*
|
||||
* Linux Information
|
||||
*/
|
||||
#define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100)
|
||||
#define CONFIG_CMDLINE_TAG
|
||||
#define CONFIG_SETUP_MEMORY_TAGS
|
||||
#define CONFIG_BOOTARGS \
|
||||
"mem=128M console=ttyS2,115200n8 root=/dev/ram0 rw initrd=0xc1180000,"\
|
||||
"4M ip=static"
|
||||
#define CONFIG_BOOTDELAY 3
|
||||
|
||||
/*
|
||||
* U-Boot commands
|
||||
*/
|
||||
#include <config_cmd_default.h>
|
||||
#define CONFIG_CMD_ENV
|
||||
#define CONFIG_CMD_ASKENV
|
||||
#define CONFIG_CMD_DHCP
|
||||
#define CONFIG_CMD_DIAG
|
||||
#define CONFIG_CMD_MII
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_SAVES
|
||||
#define CONFIG_CMD_MEMORY
|
||||
|
||||
#ifdef CONFIG_SYS_USE_NAND
|
||||
#undef CONFIG_CMD_FLASH
|
||||
#undef CONFIG_CMD_IMLS
|
||||
#define CONFIG_CMD_NAND
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_DRIVER_TI_EMAC
|
||||
#undef CONFIG_CMD_NET
|
||||
#undef CONFIG_CMD_DHCP
|
||||
#undef CONFIG_CMD_MII
|
||||
#undef CONFIG_CMD_PING
|
||||
#endif
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
|
@ -0,0 +1,141 @@
|
|||
#
|
||||
# (C) Copyright 2006-2007
|
||||
# Stefan Roese, DENX Software Engineering, sr@denx.de.
|
||||
#
|
||||
# (C) Copyright 2008
|
||||
# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
CONFIG_NAND_SPL = y
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
|
||||
LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS)
|
||||
AFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL
|
||||
CFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL
|
||||
|
||||
SOBJS = start.o _udivsi3.o _divsi3.o
|
||||
COBJS = cpu.o davinci_nand.o ns16550.o div0.o davinci_pinmux.o psc.o \
|
||||
misc.o hawkboard_nand_spl.o nand_boot.o
|
||||
|
||||
SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
__OBJS := $(SOBJS) $(COBJS)
|
||||
LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
|
||||
|
||||
nandobj := $(OBJTREE)/nand_spl/
|
||||
|
||||
ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin \
|
||||
$(nandobj)u-boot-spl-16k.bin
|
||||
|
||||
all: $(ALL)
|
||||
|
||||
$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
|
||||
$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
|
||||
|
||||
$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
|
||||
$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
|
||||
|
||||
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
|
||||
cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
|
||||
-Map $(nandobj)u-boot-spl.map \
|
||||
-o $(nandobj)u-boot-spl
|
||||
|
||||
$(nandobj)u-boot.lds: $(LDSCRIPT)
|
||||
$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
|
||||
|
||||
# create symbolic links for common files
|
||||
|
||||
# from board directory
|
||||
$(obj)davinci_pinmux.c:
|
||||
@rm -f $@
|
||||
@ln -s $(TOPDIR)/board/davinci/common/davinci_pinmux.c $@
|
||||
|
||||
# from drivers/mtd/nand directory
|
||||
$(obj)davinci_nand.c:
|
||||
@rm -f $@
|
||||
@ln -s $(TOPDIR)/drivers/mtd/nand/davinci_nand.c $@
|
||||
|
||||
# from nand_spl directory
|
||||
$(obj)nand_boot.c:
|
||||
@rm -f $@
|
||||
@ln -s $(TOPDIR)/nand_spl/nand_boot.c $@
|
||||
|
||||
# from drivers/serial directory
|
||||
$(obj)ns16550.c:
|
||||
@rm -f $@
|
||||
@ln -sf $(TOPDIR)/drivers/serial/ns16550.c $@
|
||||
|
||||
# from cpu directory
|
||||
$(obj)start.S:
|
||||
@rm -f $@
|
||||
ln -s $(TOPDIR)/arch/arm/cpu/arm926ejs/start.S $@
|
||||
|
||||
# from lib directory
|
||||
$(obj)_udivsi3.S:
|
||||
@rm -f $@
|
||||
ln -s $(TOPDIR)/arch/arm/lib/_udivsi3.S $@
|
||||
|
||||
# from lib directory
|
||||
$(obj)_divsi3.S:
|
||||
@rm -f $@
|
||||
ln -s $(TOPDIR)/arch/arm/lib/_divsi3.S $@
|
||||
|
||||
# from lib directory
|
||||
$(obj)div0.c:
|
||||
@rm -f $@
|
||||
ln -s $(TOPDIR)/arch/arm/lib/div0.c $@
|
||||
|
||||
# from SoC directory
|
||||
$(obj)cpu.c:
|
||||
@rm -f $@
|
||||
@ln -s $(TOPDIR)/arch/arm/cpu/arm926ejs/davinci/cpu.c $@
|
||||
|
||||
# from board directory
|
||||
$(obj)hawkboard_nand_spl.c:
|
||||
@rm -f $@
|
||||
ln -s $(TOPDIR)/board/davinci/da8xxevm/hawkboard_nand_spl.c $@
|
||||
|
||||
# from board directory
|
||||
$(obj)misc.c:
|
||||
@rm -f $@
|
||||
ln -s $(TOPDIR)/board/davinci/common/misc.c $@
|
||||
|
||||
$(obj)psc.c:
|
||||
@rm -f $@
|
||||
ln -s $(TOPDIR)/arch/arm/cpu/arm926ejs/davinci/psc.c $@
|
||||
|
||||
|
||||
#########################################################################
|
||||
|
||||
$(obj)%.o: $(obj)%.S
|
||||
$(CC) $(AFLAGS) -c -o $@ $<
|
||||
|
||||
$(obj)%.o: $(obj)%.c
|
||||
$(CC) $(CFLAGS) -c -o $@ $<
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
|
@ -0,0 +1,75 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
*
|
||||
* (C) Copyright 2008
|
||||
* Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(_start)
|
||||
SECTIONS
|
||||
{
|
||||
. = 0xc1080000;
|
||||
|
||||
. = ALIGN(4);
|
||||
.text :
|
||||
{
|
||||
start.o (.text)
|
||||
cpu.o (.text)
|
||||
nand_boot.o (.text)
|
||||
|
||||
*(.text)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
.rodata : { *(.rodata) }
|
||||
|
||||
. = ALIGN(4);
|
||||
.data : {
|
||||
*(.data)
|
||||
__datarel_start = .;
|
||||
*(.data.rel)
|
||||
__datarelrolocal_start = .;
|
||||
*(.data.rel.ro.local)
|
||||
__datarellocal_start = .;
|
||||
*(.data.rel.local)
|
||||
__datarelro_start = .;
|
||||
*(.data.rel.ro)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
__rel_dyn_start = .;
|
||||
__rel_dyn_end = .;
|
||||
__dynsym_start = .;
|
||||
|
||||
__got_start = .;
|
||||
. = ALIGN(4);
|
||||
.got : { *(.got) }
|
||||
|
||||
__got_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__bss_start = .;
|
||||
.bss : { *(.bss) }
|
||||
_end = .;
|
||||
}
|
||||
|
|
@ -35,7 +35,7 @@ AFLAGS += -DCONFIG_NAND_SPL
|
|||
CFLAGS += -DCONFIG_NAND_SPL
|
||||
|
||||
SOBJS = start.o cpu_init.o lowlevel_init.o
|
||||
COBJS = nand_boot.o nand_ecc.o s3c64xx.o
|
||||
COBJS = nand_boot.o nand_ecc.o s3c64xx.o smdk6400_nand_spl.o
|
||||
|
||||
SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
|
|
@ -93,6 +93,10 @@ $(obj)s3c64xx.c:
|
|||
@rm -f $@
|
||||
@ln -s $(TOPDIR)/drivers/mtd/nand/s3c64xx.c $@
|
||||
|
||||
$(obj)smdk6400_nand_spl.c:
|
||||
@rm -f $@
|
||||
@ln -s $(TOPDIR)/board/samsung/smdk6400/smdk6400_nand_spl.c $@
|
||||
|
||||
#########################################################################
|
||||
|
||||
$(obj)%.o: $(obj)%.S
|
||||
|
|
|
|||
|
|
@ -221,14 +221,6 @@ static int nand_load(struct mtd_info *mtd, unsigned int offs,
|
|||
return 0;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_ARM)
|
||||
void board_init_f (ulong bootflag)
|
||||
{
|
||||
relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL,
|
||||
CONFIG_SYS_TEXT_BASE);
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The main entry for NAND booting. It's necessary that SDRAM is already
|
||||
* configured and available since this code loads the main U-Boot image
|
||||
|
|
@ -244,6 +236,7 @@ void nand_boot(void)
|
|||
/*
|
||||
* Init board specific nand support
|
||||
*/
|
||||
nand_chip.select_chip = NULL;
|
||||
nand_info.priv = &nand_chip;
|
||||
nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE;
|
||||
nand_chip.dev_ready = NULL; /* preset to NULL */
|
||||
|
|
|
|||
Loading…
Reference in New Issue