CM1.QP1: Support for the Schindler CM1.QP1 board.

Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
This commit is contained in:
Bartlomiej Sieka 2007-07-11 20:11:07 +02:00
parent e80955f07d
commit fa1df30892
11 changed files with 1487 additions and 13 deletions

12
MAKEALL
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@ -35,12 +35,12 @@ LIST_5xx=" \
#########################################################################
LIST_5xxx=" \
BC3450 cpci5200 EVAL5200 fo300 \
icecube_5100 icecube_5200 lite5200b mcc200 \
mecp5200 motionpro o2dnt pf5200 \
PM520 TB5200 Total5100 Total5200 \
Total5200_Rev2 TQM5200 TQM5200_B TQM5200S \
v38b \
BC3450 cm1_qp1 cpci5200 EVAL5200 \
fo300 icecube_5100 icecube_5200 lite5200b \
mcc200 mecp5200 motionpro o2dnt \
pf5200 PM520 TB5200 Total5100 \
Total5200 Total5200_Rev2 TQM5200 TQM5200_B \
TQM5200S v38b \
"
#########################################################################

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@ -529,6 +529,14 @@ PM520_ROMBOOT_DDR_config: unconfig
smmaco4_config: unconfig
@$(MKCONFIG) -a smmaco4 ppc mpc5xxx tqm5200
cm1_qp1_config: unconfig
@ >include/config.h
@[ -z "$(findstring cm1_qp1,$@)" ] || \
{ echo "... with 64 MByte SDRAM" ; \
echo "... with 32 MByte Flash" ; \
}
@./mkconfig -a cm1_qp1 ppc mpc5xxx cm1_qp1
spieval_config: unconfig
@$(MKCONFIG) -a spieval ppc mpc5xxx tqm5200

50
board/cm1_qp1/Makefile Normal file
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@ -0,0 +1,50 @@
#
# (C) Copyright 2003-2007
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS := $(BOARD).o cmd_cm1_qp1.o fwupdate.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

222
board/cm1_qp1/cm1_qp1.c Normal file
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@ -0,0 +1,222 @@
/*
* (C) Copyright 2003-2007
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* (C) Copyright 2004
* Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
*
* (C) Copyright 2004-2005
* Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <mpc5xxx.h>
#include <pci.h>
#include <asm/processor.h>
#include <i2c.h>
#ifdef CONFIG_OF_FLAT_TREE
#include <ft_build.h>
#endif /* CONFIG_OF_FLAT_TREE */
#include "fwupdate.h"
#ifndef CFG_RAMBOOT
/*
* Helper function to initialize SDRAM controller.
*/
static void sdram_start(int hi_addr)
{
long hi_addr_bit = hi_addr ? 0x01000000 : 0;
/* unlock mode register */
*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 |
hi_addr_bit;
/* precharge all banks */
*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 |
hi_addr_bit;
/* auto refresh */
*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 |
hi_addr_bit;
/* auto refresh, second time */
*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 |
hi_addr_bit;
/* set mode register */
*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
/* normal operation */
*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
}
#endif /* CFG_RAMBOOT */
/*
* Initalize SDRAM - configure SDRAM controller, detect memory size.
*/
long int initdram(int board_type)
{
ulong dramsize = 0;
#ifndef CFG_RAMBOOT
ulong test1, test2;
/* configure SDRAM start/end for detection */
*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */
/* setup config registers */
*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
sdram_start(0);
test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
sdram_start(1);
test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
if (test1 > test2) {
sdram_start(0);
dramsize = test1;
} else
dramsize = test2;
/* memory smaller than 1MB is impossible */
if (dramsize < (1 << 20))
dramsize = 0;
/* set SDRAM CS0 size according to the amount of RAM found */
if (dramsize > 0) {
*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 +
__builtin_ffs(dramsize >> 20) - 1;
} else
*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
#else /* CFG_RAMBOOT */
/* retrieve size of memory connected to SDRAM CS0 */
dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
if (dramsize >= 0x13)
dramsize = (1 << (dramsize - 0x13)) << 20;
else
dramsize = 0;
#endif /* CFG_RAMBOOT */
/*
* On MPC5200B we need to set the special configuration delay in the
* DDR controller. Refer to chapter 8.7.5 SDelay--MBAR + 0x0190 of
* the MPC5200B User's Manual.
*/
*(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04;
__asm__ volatile ("sync");
return dramsize;
}
int checkboard(void)
{
puts("Board: CM1.QP1\n");
return 0;
}
int board_early_init_r(void)
{
/*
* Now, when we are in RAM, enable flash write access for detection
* process. Note that CS_BOOT cannot be cleared when executing in
* flash.
*/
*(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
return 0;
}
#ifdef CONFIG_POST
int post_hotkeys_pressed(void)
{
return 0;
}
#endif /* CONFIG_POST */
#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
void post_word_store(ulong a)
{
vu_long *save_addr = (vu_long *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE);
*save_addr = a;
}
ulong post_word_load(void)
{
vu_long *save_addr = (vu_long *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE);
return *save_addr;
}
#endif /* CONFIG_POST || CONFIG_LOGBUFFER */
#ifdef CONFIG_MISC_INIT_R
int misc_init_r(void)
{
#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
uchar buf[6];
char str[18];
/* Read ethaddr from EEPROM */
if (i2c_read(CFG_I2C_EEPROM, CONFIG_MAC_OFFSET, 2, buf, 6) == 0) {
sprintf(str, "%02X:%02X:%02X:%02X:%02X:%02X",
buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
/* Check if MAC addr is owned by Schindler */
if (strstr(str, "00:06:C3") != str) {
printf(LOG_PREFIX "Warning - Illegal MAC address (%s)"
" in EEPROM.\n", str);
printf(LOG_PREFIX "Using MAC from environment\n");
} else {
printf(LOG_PREFIX "Using MAC (%s) from I2C EEPROM\n",
str);
setenv("ethaddr", str);
}
} else {
printf(LOG_PREFIX "Warning - Unable to read MAC from I2C"
" device at address %02X:%04X\n", CFG_I2C_EEPROM,
CONFIG_MAC_OFFSET);
printf(LOG_PREFIX "Using MAC from environment\n");
}
return 0;
#endif /* defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) */
}
#endif /* CONFIG_MISC_INIT_R */
#ifdef CONFIG_LAST_STAGE_INIT
int last_stage_init(void)
{
#ifdef CONFIG_USB_STORAGE
cm1_fwupdate();
#endif /* CONFIG_USB_STORAGE */
return 0;
}
#endif /* CONFIG_LAST_STAGE_INIT */
#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
void ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);
}
#endif /* defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) */

446
board/cm1_qp1/cmd_cm1_qp1.c Normal file
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@ -0,0 +1,446 @@
/*
* (C) Copyright 2007 Markus Kappeler <markus.kappeler@objectxp.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <command.h>
#include <i2c.h>
#include <usb.h>
#if (CONFIG_COMMANDS & CFG_CMD_BSP)
int do_i2c(char *argv[])
{
unsigned char temp, temp1;
printf("Starting I2C Test\n"
"Please set Jumper:\nI2C SDA 2-3\nI2C SCL 2-3\n\n"
"Please press any key to start\n\n");
getc();
temp = 0xf0; /* set io 0-4 as output */
i2c_write(CFG_I2C_IO, 3, 1, (uchar *)&temp, 1);
printf("Press I2C4-7. LED I2C0-3 should have the same state\n\n"
"Press any key to stop\n\n");
while (!tstc()) {
i2c_read(CFG_I2C_IO, 0, 1, (uchar *)&temp, 1);
temp1 = (temp >> 4) & 0x03;
temp1 |= (temp >> 3) & 0x08; /* S302 -> LED303 */
temp1 |= (temp >> 5) & 0x04; /* S303 -> LED302 */
temp = temp1;
i2c_write(CFG_I2C_IO, 1, 1, (uchar *)&temp, 1);
}
getc();
return 0;
}
int do_usbtest(char *argv[])
{
int i;
static int usb_stor_curr_dev = -1; /* current device */
printf("Starting USB Test\n"
"Please insert USB Memmory Stick\n\n"
"Please press any key to start\n\n");
getc();
usb_stop();
printf("(Re)start USB...\n");
i = usb_init();
#ifdef CONFIG_USB_STORAGE
/* try to recognize storage devices immediately */
if (i >= 0)
usb_stor_curr_dev = usb_stor_scan(1);
#endif /* CONFIG_USB_STORAGE */
if (usb_stor_curr_dev >= 0)
printf("Found USB Storage Dev continue with Test...\n");
else {
printf("No USB Storage Device detected.. Stop Test\n");
return 1;
}
usb_stor_info();
printf("stopping USB..\n");
usb_stop();
return 0;
}
int do_led(char *argv[])
{
int i = 0;
struct mpc5xxx_gpt_0_7 *gpt = (struct mpc5xxx_gpt_0_7 *)MPC5XXX_GPT;
printf("Starting LED Test\n"
"Please set Switch S500 all off\n\n"
"Please press any key to start\n\n");
getc();
/* configure timer 2-3 for simple GPIO output High */
gpt->gpt2.emsr |= 0x00000034;
gpt->gpt3.emsr |= 0x00000034;
(*(vu_long *)MPC5XXX_WU_GPIO_ENABLE) |= 0x80000000;
(*(vu_long *)MPC5XXX_WU_GPIO_DIR) |= 0x80000000;
printf("Please press any key to stop\n\n");
while (!tstc()) {
if (i == 1) {
(*(vu_long *)MPC5XXX_WU_GPIO_DATA_O) |= 0x80000000;
gpt->gpt2.emsr &= ~0x00000010;
gpt->gpt3.emsr &= ~0x00000010;
} else if (i == 2) {
(*(vu_long *)MPC5XXX_WU_GPIO_DATA_O) &= ~0x80000000;
gpt->gpt2.emsr &= ~0x00000010;
gpt->gpt3.emsr |= 0x00000010;
} else if (i >= 3) {
(*(vu_long *)MPC5XXX_WU_GPIO_DATA_O) &= ~0x80000000;
gpt->gpt3.emsr &= ~0x00000010;
gpt->gpt2.emsr |= 0x00000010;
i = 0;
}
i++;
udelay(200000);
}
getc();
(*(vu_long *)MPC5XXX_WU_GPIO_DATA_O) |= 0x80000000;
gpt->gpt2.emsr |= 0x00000010;
gpt->gpt3.emsr |= 0x00000010;
return 0;
}
int do_rs232(char *argv[])
{
int error_status = 0;
struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
struct mpc5xxx_psc *psc1 = (struct mpc5xxx_psc *)MPC5XXX_PSC1;
/* Configure PSC 2-3-6 as GPIO */
gpio->port_config &= 0xFF0FF80F;
switch (simple_strtoul(argv[2], NULL, 10)) {
case 1:
/* check RTS <-> CTS loop */
/* set rts to 0 */
printf("Uart 1 test: RX TX tested by using U-Boot\n"
"Please connect RTS with CTS on Uart1 plug\n\n"
"Press any key to start\n\n");
getc();
psc1->op1 |= 0x01;
/* wait some time before requesting status */
udelay(10);
/* check status at cts */
if ((psc1->ip & 0x01) != 0) {
error_status = 3;
printf("%s: failure at rs232_1, cts status is %d "
"(should be 0)\n",
__FUNCTION__, (psc1->ip & 0x01));
}
/* set rts to 1 */
psc1->op0 |= 0x01;
/* wait some time before requesting status */
udelay(10);
/* check status at cts */
if ((psc1->ip & 0x01) != 1) {
error_status = 3;
printf("%s: failure at rs232_1, cts status is %d "
"(should be 1)\n",
__FUNCTION__, (psc1->ip & 0x01));
}
break;
case 2:
/* set PSC2_0, PSC2_2 as output and PSC2_1, PSC2_3 as input */
printf("Uart 2 test: Please use RS232 Loopback plug on UART2\n"
"\nPress any key to start\n\n");
getc();
gpio->simple_gpioe &= ~(0x000000F0);
gpio->simple_gpioe |= 0x000000F0;
gpio->simple_ddr &= ~(0x000000F0);
gpio->simple_ddr |= 0x00000050;
/* check TXD <-> RXD loop */
/* set TXD to 1 */
gpio->simple_dvo |= (1 << 4);
/* wait some time before requesting status */
udelay(10);
if ((gpio->simple_ival & 0x00000020) != 0x00000020) {
error_status = 2;
printf("%s: failure at rs232_2, rxd status is %d "
"(should be 1)\n", __FUNCTION__,
(gpio->simple_ival & 0x00000020) >> 5);
}
/* set TXD to 0 */
gpio->simple_dvo &= ~(1 << 4);
/* wait some time before requesting status */
udelay(10);
if ((gpio->simple_ival & 0x00000020) != 0x00000000) {
error_status = 2;
printf("%s: failure at rs232_2, rxd status is %d "
"(should be 0)\n", __FUNCTION__,
(gpio->simple_ival & 0x00000020) >> 5);
}
/* check RTS <-> CTS loop */
/* set RTS to 1 */
gpio->simple_dvo |= (1 << 6);
/* wait some time before requesting status */
udelay(10);
if ((gpio->simple_ival & 0x00000080) != 0x00000080) {
error_status = 3;
printf("%s: failure at rs232_2, cts status is %d "
"(should be 1)\n", __FUNCTION__,
(gpio->simple_ival & 0x00000080) >> 7);
}
/* set RTS to 0 */
gpio->simple_dvo &= ~(1 << 6);
/* wait some time before requesting status */
udelay(10);
if ((gpio->simple_ival & 0x00000080) != 0x00000000) {
error_status = 3;
printf("%s: failure at rs232_2, cts status is %d "
"(should be 0)\n", __FUNCTION__,
(gpio->simple_ival & 0x00000080) >> 7);
}
break;
case 3:
/* set PSC3_0, PSC3_2 as output and PSC3_1, PSC3_3 as input */
printf("Uart 3 test: Please use RS232 Loopback plug on UART2\n"
"\nPress any key to start\n\n");
getc();
gpio->simple_gpioe &= ~(0x00000F00);
gpio->simple_gpioe |= 0x00000F00;
gpio->simple_ddr &= ~(0x00000F00);
gpio->simple_ddr |= 0x00000500;
/* check TXD <-> RXD loop */
/* set TXD to 1 */
gpio->simple_dvo |= (1 << 8);
/* wait some time before requesting status */
udelay(10);
if ((gpio->simple_ival & 0x00000200) != 0x00000200) {
error_status = 2;
printf("%s: failure at rs232_3, rxd status is %d "
"(should be 1)\n", __FUNCTION__,
(gpio->simple_ival & 0x00000200) >> 9);
}
/* set TXD to 0 */
gpio->simple_dvo &= ~(1 << 8);
/* wait some time before requesting status */
udelay(10);
if ((gpio->simple_ival & 0x00000200) != 0x00000000) {
error_status = 2;
printf("%s: failure at rs232_3, rxd status is %d "
"(should be 0)\n", __FUNCTION__,
(gpio->simple_ival & 0x00000200) >> 9);
}
/* check RTS <-> CTS loop */
/* set RTS to 1 */
gpio->simple_dvo |= (1 << 10);
/* wait some time before requesting status */
udelay(10);
if ((gpio->simple_ival & 0x00000800) != 0x00000800) {
error_status = 3;
printf("%s: failure at rs232_3, cts status is %d "
"(should be 1)\n", __FUNCTION__,
(gpio->simple_ival & 0x00000800) >> 11);
}
/* set RTS to 0 */
gpio->simple_dvo &= ~(1 << 10);
/* wait some time before requesting status */
udelay(10);
if ((gpio->simple_ival & 0x00000800) != 0x00000000) {
error_status = 3;
printf("%s: failure at rs232_3, cts status is %d "
"(should be 0)\n", __FUNCTION__,
(gpio->simple_ival & 0x00000800) >> 11);
}
break;
case 4:
/* set PSC6_2, PSC6_3 as output and PSC6_0, PSC6_1 as input */
printf("Uart 4 test: Please use RS232 Loopback plug on UART2\n"
"\nPress any key to start\n\n");
getc();
gpio->simple_gpioe &= ~(0xF0000000);
gpio->simple_gpioe |= 0x30000000;
gpio->simple_ddr &= ~(0xf0000000);
gpio->simple_ddr |= 0x30000000;
(*(vu_long *)MPC5XXX_WU_GPIO_ENABLE) |= 0x30000000;
(*(vu_long *)MPC5XXX_WU_GPIO_DIR) &= ~(0x30000000);
/* check TXD <-> RXD loop */
/* set TXD to 1 */
gpio->simple_dvo |= (1 << 28);
/* wait some time before requesting status */
udelay(10);
if (((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) & 0x10000000) !=
0x10000000) {
error_status = 2;
printf("%s: failure at rs232_4, rxd status is %d "
"(should be 1)\n", __FUNCTION__,
((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) &
0x10000000) >> 28);
}
/* set TXD to 0 */
gpio->simple_dvo &= ~(1 << 28);
/* wait some time before requesting status */
udelay(10);
if (((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) & 0x10000000) !=
0x00000000) {
error_status = 2;
printf("%s: failure at rs232_4, rxd status is %d "
"(should be 0)\n", __FUNCTION__,
((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) &
0x10000000) >> 28);
}
/* check RTS <-> CTS loop */
/* set RTS to 1 */
gpio->simple_dvo |= (1 << 29);
/* wait some time before requesting status */
udelay(10);
if (((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) & 0x20000000) !=
0x20000000) {
error_status = 3;
printf("%s: failure at rs232_4, cts status is %d "
"(should be 1)\n", __FUNCTION__,
((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) &
0x20000000) >> 29);
}
/* set RTS to 0 */
gpio->simple_dvo &= ~(1 << 29);
/* wait some time before requesting status */
udelay(10);
if (((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) & 0x20000000) !=
0x00000000) {
error_status = 3;
printf("%s: failure at rs232_4, cts status is %d "
"(should be 0)\n", __FUNCTION__,
((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) &
0x20000000) >> 29);
}
break;
default:
printf("%s: invalid rs232 number %s\n", __FUNCTION__, argv[2]);
error_status = 1;
break;
}
gpio->port_config |= (CFG_GPS_PORT_CONFIG & 0xFF0FF80F);
return error_status;
}
int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
int rcode = -1;
switch (argc) {
case 2:
if (strncmp(argv[1], "i2c", 3) == 0)
rcode = do_i2c(argv);
else if (strncmp(argv[1], "led", 3) == 0)
rcode = do_led(argv);
else if (strncmp(argv[1], "usb", 3) == 0)
rcode = do_usbtest(argv);
break;
case 3:
if (strncmp(argv[1], "rs232", 3) == 0)
rcode = do_rs232(argv);
break;
}
switch (rcode) {
case -1:
printf("Usage:\n"
"fkt { i2c | led | usb }\n"
"fkt rs232 number\n");
rcode = 1;
break;
case 0:
printf("Test passed\n");
break;
default:
printf("Test failed with code: %d\n", rcode);
}
return rcode;
}
U_BOOT_CMD(
fkt, 4, 1, cmd_fkt,
"fkt - Function test routines\n",
"i2c\n"
" - Test I2C communication\n"
"fkt led\n"
" - Test LEDs\n"
"fkt rs232 number\n"
" - Test RS232 (loopback plug(s) for RS232 required)\n"
"fkt usb\n"
" - Test USB communication\n"
);
#endif /* CFG_CMD_BSP */

26
board/cm1_qp1/config.mk Normal file
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@ -0,0 +1,26 @@
#
# (C) Copyright 2007
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
TEXT_BASE = 0xfc000000
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board

187
board/cm1_qp1/fwupdate.c Normal file
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@ -0,0 +1,187 @@
/*
* (C) Copyright 2007 Schindler Lift Inc.
* (C) Copyright 2007 Semihalf
*
* Author: Michel Marti <mma@objectxp.com>
* Adapted for U-Boot 1.2 by Piotr Kruszynski <ppk@semihalf.com>:
* - code clean-up
* - bugfix for overwriting bootargs by user
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <command.h>
#include <malloc.h>
#include <image.h>
#include <usb.h>
#include <fat.h>
#include "fwupdate.h"
extern int do_bootm(cmd_tbl_t *, int, int, char *[]);
extern long do_fat_read(const char *, void *, unsigned long, int);
extern int do_fat_fsload(cmd_tbl_t *, int, int, char *[]);
static int load_rescue_image(ulong);
void cm1_fwupdate(void)
{
cmd_tbl_t *bcmd;
char *rsargs;
char *tmp = NULL;
char ka[16];
char *argv[3] = { "bootm", ka, NULL };
/* Check if rescue system is disabled... */
if (getenv("norescue")) {
printf(LOG_PREFIX "Rescue System disabled.\n");
return;
}
/* Check if we have a USB storage device and load image */
if (load_rescue_image(LOAD_ADDR))
return;
bcmd = find_cmd("bootm");
if (!bcmd)
return;
sprintf(ka, "%lx", LOAD_ADDR);
/* prepare our bootargs */
rsargs = getenv("rs-args");
if (!rsargs)
rsargs = RS_BOOTARGS;
else {
tmp = malloc(strlen(rsargs+1));
if (!tmp) {
printf(LOG_PREFIX "Memory allocation failed\n");
return;
}
strcpy(tmp, rsargs);
rsargs = tmp;
}
setenv("bootargs", rsargs);
if (rsargs == tmp)
free(rsargs);
printf(LOG_PREFIX "Starting update system (bootargs=%s)...\n", rsargs);
do_bootm(bcmd, 0, 2, argv);
}
static int load_rescue_image(ulong addr)
{
disk_partition_t info;
int devno;
int partno;
int i;
char fwdir[64];
char nxri[128];
char *tmp;
char dev[7];
char addr_str[16];
char *argv[6] = { "fatload", "usb", dev, addr_str, nxri, NULL };
block_dev_desc_t *stor_dev = NULL;
cmd_tbl_t *bcmd;
/* Get name of firmware directory */
tmp = getenv("fw-dir");
/* Copy it into fwdir */
strncpy(fwdir, tmp ? tmp : FW_DIR, sizeof(fwdir));
fwdir[sizeof(fwdir) - 1] = 0; /* Terminate string */
printf(LOG_PREFIX "Checking for firmware image directory '%s' on USB"
" storage...\n", fwdir);
usb_stop();
if (usb_init() != 0)
return 1;
/* Check for storage device */
if (usb_stor_scan(1) != 0) {
usb_stop();
return 1;
}
/* Detect storage device */
for (devno = 0; devno < USB_MAX_STOR_DEV; devno++) {
stor_dev = usb_stor_get_dev(devno);
if (stor_dev->type != DEV_TYPE_UNKNOWN)
break;
}
if (!stor_dev || stor_dev->type == DEV_TYPE_UNKNOWN) {
printf(LOG_PREFIX "No valid storage device found...\n");
usb_stop();
return 1;
}
/* Detect partition */
for (partno = -1, i = 0; i < 6; i++) {
if (get_partition_info(stor_dev, i, &info) == 0) {
if (fat_register_device(stor_dev, i) == 0) {
/* Check if rescue image is present */
FW_DEBUG("Looking for firmware directory '%s'"
" on partition %d\n", fwdir, i);
if (do_fat_read(fwdir, NULL, 0, LS_NO) == -1) {
FW_DEBUG("No NX rescue image on "
"partition %d.\n", i);
} else {
partno = i;
FW_DEBUG("Partition %d contains "
"firmware directory\n", partno);
break;
}
}
}
}
if (partno == -1) {
printf(LOG_PREFIX "Error: No valid (FAT) partition detected\n");
usb_stop();
return 1;
}
/* Load the rescue image */
bcmd = find_cmd("fatload");
if (!bcmd) {
printf(LOG_PREFIX "Error - 'fatload' command not present.\n");
usb_stop();
return 1;
}
tmp = getenv("nx-rescue-image");
sprintf(nxri, "%s/%s", fwdir, tmp ? tmp : RESCUE_IMAGE);
sprintf(dev, "%d:%d", devno, partno);
sprintf(addr_str, "%lx", addr);
FW_DEBUG("fat_fsload device='%s', addr='%s', file: %s\n",
dev, addr_str, nxri);
if (do_fat_fsload(bcmd, 0, 5, argv) != 0) {
usb_stop();
return 1;
}
/* Stop USB */
usb_stop();
return 0;
}

47
board/cm1_qp1/fwupdate.h Normal file
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@ -0,0 +1,47 @@
/*
* (C) Copyright 2007 Schindler Lift Inc.
*
* Author: Michel Marti <mma@objectxp.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __FW_UPDATE_H
#define __FW_UPDATE_H
/* Default prefix for output messages */
#define LOG_PREFIX "CM1: "
/* Extra debug macro */
#ifdef CONFIG_FWUPDATE_DEBUG
#define FW_DEBUG(fmt...) printf(LOG_PREFIX fmt)
#else
#define FW_DEBUG(fmt...)
#endif
/* Name of the directory holding firmware images */
#define FW_DIR "nx-fw"
#define RESCUE_IMAGE "nxrs.img"
#define LOAD_ADDR 0x400000
#define RS_BOOTARGS "ramdisk=8192K"
/* Main function for fwupdate */
void cm1_fwupdate(void);
#endif /* __FW_UPDATE_H */

123
board/cm1_qp1/u-boot.lds Normal file
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@ -0,0 +1,123 @@
/*
* (C) Copyright 2003-2007
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
cpu/mpc5xxx/start.o (.text)
*(.text)
*(.fixup)
*(.got1)
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
*(.eh_frame)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x0FFF) & 0xFFFFF000;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
__fixup_entries = (. - _FIXUP_TABLE_) >> 2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(4096);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(4096);
__init_end = .;
__bss_start = .;
.bss :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
}
_end = . ;
PROVIDE (end = .);
}

View File

@ -889,13 +889,20 @@ int mpc5xxx_fec_initialize(bd_t * bis)
fec->eth = (ethernet_regs *)MPC5XXX_FEC;
fec->tbdBase = (FEC_TBD *)FEC_BD_BASE;
fec->rbdBase = (FEC_RBD *)(FEC_BD_BASE + FEC_TBD_NUM * sizeof(FEC_TBD));
#if defined(CONFIG_CANMB) || defined(CONFIG_HMI1001) || \
defined(CONFIG_ICECUBE) || defined(CONFIG_INKA4X0) || \
defined(CONFIG_JUPITER) || defined(CONFIG_MCC200) || \
defined(CONFIG_MOTIONPRO)|| defined(CONFIG_O2DNT) || \
defined(CONFIG_PM520) || defined(CONFIG_TOP5200) || \
defined(CONFIG_TQM5200) || defined(CONFIG_UC101) || \
defined(CONFIG_V38B)
#if defined(CONFIG_CANMB) || \
defined(CONFIG_CM1_QP1) || \
defined(CONFIG_HMI1001) || \
defined(CONFIG_ICECUBE) || \
defined(CONFIG_INKA4X0) || \
defined(CONFIG_JUPITER) || \
defined(CONFIG_MCC200) || \
defined(CONFIG_MOTIONPRO) || \
defined(CONFIG_O2DNT) || \
defined(CONFIG_PM520) || \
defined(CONFIG_TOP5200) || \
defined(CONFIG_TQM5200) || \
defined(CONFIG_UC101) || \
defined(CONFIG_V38B)
# ifndef CONFIG_FEC_10MBIT
fec->xcv_type = MII100;
# else

358
include/configs/cm1_qp1.h Normal file
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@ -0,0 +1,358 @@
/*
* (C) Copyright 2003-2007
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __CONFIG_H
#define __CONFIG_H
/*
* High Level Configuration Options
*/
#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
#define CONFIG_CM1_QP1 1 /* ... on CM1.QP1 module */
/*
* Supported commands
*/
#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
CFG_CMD_ASKENV | \
CFG_CMD_DATE | \
CFG_CMD_DHCP | \
CFG_CMD_ECHO | \
CFG_CMD_I2C | \
CFG_CMD_FLASH | \
CFG_CMD_MII | \
CFG_CMD_NFS | \
CFG_CMD_PING | \
CFG_CMD_DIAG | \
CFG_CMD_REGINFO | \
CFG_CMD_SNTP | \
CFG_CMD_BSP | \
CFG_CMD_USB | \
CFG_CMD_FAT | \
CFG_CMD_JFFS2)
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
/*
* Serial console configuration
*/
#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
#define CONFIG_BAUDRATE 57600 /* ... at 57600 bps */
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
/*
* Ethernet configuration
*/
#define CONFIG_MPC5xxx_FEC 1
#define CONFIG_PHY_ADDR 0x00
#define CONFIG_ENV_OVERWRITE 1 /* allow overwriting of ethaddr */
/* use misc_init_r() to read ethaddr from I2C EEPROM (see CFG_I2C_EEPROM) */
#define CONFIG_MISC_INIT_R 1
#define CONFIG_MAC_OFFSET 0x35 /* MAC address offset in I2C EEPROM */
/*
* POST support
*/
#define CONFIG_POST (CFG_POST_MEMORY | CFG_POST_CPU | CFG_POST_I2C)
#define MPC5XXX_SRAM_POST_SIZE (MPC5XXX_SRAM_SIZE - 4)
/* List of I2C addresses to be verified by POST */
#define I2C_ADDR_LIST { CFG_I2C_SLAVE, CFG_I2C_IO, CFG_I2C_EEPROM }
/* display image timestamps */
#define CONFIG_TIMESTAMP 1
/*
* Autobooting
*/
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_PREBOOT "echo;" \
"echo Type \"run net_nfs_fdt\" to mount root filesystem over NFS;" \
"echo"
#undef CONFIG_BOOTARGS
/*
* Default environment settings
*/
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"hostname=cm1_qp1\0" \
"netmask=255.255.0.0\0" \
"ipaddr=192.168.160.33\0" \
"serverip=192.168.1.1\0" \
"gatewayip=192.168.1.1\0" \
"console=ttyPSC0\0" \
"u-boot_addr=100000\0" \
"kernel_addr=200000\0" \
"kernel_addr_flash=fc0c0000\0" \
"fdt_addr=400000\0" \
"fdt_addr_flash=fc0a0000\0" \
"ramdisk_addr=500000\0" \
"rootpath=/opt/eldk-4.1/ppc_6xx\0" \
"u-boot=/tftpboot/cm1_qp1/u-boot.bin\0" \
"bootfile=/tftpboot/cm1_qp1/uImage\0" \
"fdt_file=/tftpboot/cm1_qp1/cm1_qp1.dtb\0" \
"load=tftp ${u-boot_addr} ${u-boot}\0" \
"update=prot off fc000000 fc05ffff; era fc000000 fc05ffff; " \
"cp.b ${u-boot_addr} fc000000 ${filesize}; " \
"prot on fc000000 fc05ffff\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
"nfsroot=${serverip}:${rootpath}\0" \
"flashargs=setenv bootargs root=/dev/mtdblock5 rw\0" \
"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
"addinit=setenv bootargs ${bootargs} init=/linuxrc\0" \
"addcons=setenv bootargs ${bootargs} " \
"console=${console},${baudrate}\0" \
"addip=setenv bootargs ${bootargs} " \
"ip=${ipaddr}:${serverip}:${gatewayip}:" \
"${netmask}:${hostname}:${netdev}:off panic=1\0" \
"flash_flash=run flashargs addinit addip addcons;" \
"bootm ${kernel_addr_flash} - ${fdt_addr_flash}\0" \
"net_nfs_fdt=tftp ${kernel_addr} ${bootfile_fdt}; " \
"tftp ${fdt_addr} ${fdt_file}; run nfsargs addip " \
"addcons; bootm ${kernel_addr} - ${fdt_addr}\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_flash"
/*
* Low level configuration
*/
/*
* Clock configuration
*/
#define CFG_MPC5XXX_CLKIN 33000000 /* SYS_XTAL_IN = 33MHz */
#define CFG_IPBCLK_EQUALS_XLBCLK 1 /* IPB = 133MHz */
/*
* Memory map
*/
#define CFG_MBAR 0xF0000000
#define CFG_SDRAM_BASE 0x00000000
#define CFG_DEFAULT_MBAR 0x80000000
#define CFG_LOWBOOT 1
/* Use ON-Chip SRAM until RAM will be available */
#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
#ifdef CONFIG_POST
/* preserve space for the post_word at end of on-chip SRAM */
#define CFG_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
#else
#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
#endif
#define CFG_GBL_DATA_SIZE 128 /* size in bytes for initial data */
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
#define CFG_MONITOR_BASE TEXT_BASE
#define CFG_MONITOR_LEN (384 << 10) /* 384 kB for Monitor */
#define CFG_MALLOC_LEN (256 << 10) /* 256 kB for malloc() */
#define CFG_BOOTMAPSZ (8 << 20) /* initial mem map for Linux */
#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
#define CFG_RAMBOOT 1
#endif
/*
* Chip selects configuration
*/
/* Boot Chipselect */
#define CFG_BOOTCS_START CFG_FLASH_BASE
#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
#define CFG_BOOTCS_CFG 0x00087D31 /* for pci_clk = 33 MHz */
/* use board_early_init_r to enable flash write in CS_BOOT */
#define CONFIG_BOARD_EARLY_INIT_R
/* Flash memory addressing */
#define CFG_CS0_START CFG_FLASH_BASE
#define CFG_CS0_SIZE CFG_FLASH_SIZE
/* No burst, dead cycle = 1 for CS0 (Flash) */
#define CFG_CS_BURST 0x00000000
#define CFG_CS_DEADCYCLE 0x00000001
/*
* SDRAM configuration
* settings for k4s561632E-xx75, assuming XLB = 132 MHz
*/
#define SDRAM_MODE 0x00CD0000 /* CASL 3, burst length 8 */
#define SDRAM_CONTROL 0x514F0000
#define SDRAM_CONFIG1 0xE2333900
#define SDRAM_CONFIG2 0x8EE70000
/*
* Flash configuration
*/
#define CFG_FLASH_CFI 1
#define CFG_FLASH_CFI_DRIVER 1
#define CFG_FLASH_BASE TEXT_BASE
/* we need these despite using CFI */
#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks */
#define CFG_MAX_FLASH_SECT 256 /* max num of sectors on one chip */
#define CFG_FLASH_SIZE 0x02000000 /* 32 MiB */
/*
* MTD configuration
*/
#define CONFIG_JFFS2_CMDLINE 1
#define MTDIDS_DEFAULT "nor0=cm1qp1-0"
#define MTDPARTS_DEFAULT "mtdparts=cm1qp1-0:" \
"384k(uboot),128k(env)," \
"128k(redund_env),128k(dtb)," \
"2m(kernel),27904k(rootfs)," \
"-(config)"
/*
* I2C configuration
*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
#define CFG_I2C_MODULE 2 /* Select I2C module #2 */
#define CFG_I2C_SPEED 40000 /* 40 kHz */
#define CFG_I2C_SLAVE 0x0
#define CFG_I2C_IO 0x38 /* PCA9554AD I2C I/O port address */
#define CFG_I2C_EEPROM 0x53 /* I2C EEPROM device address */
/*
* RTC configuration
*/
#define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
/*
* USB configuration
*/
#define CONFIG_USB_OHCI 1
#define CONFIG_USB_STORAGE 1
#define CONFIG_USB_CLOCK 0x0001BBBB
#define CONFIG_USB_CONFIG 0x00001000
/* Partitions (for USB) */
#define CONFIG_MAC_PARTITION 1
#define CONFIG_DOS_PARTITION 1
#define CONFIG_ISO_PARTITION 1
/*
* Invoke our last_stage_init function - needed by fwupdate
*/
#define CONFIG_LAST_STAGE_INIT 1
/*
* Environment settings
*/
#define CFG_ENV_IS_IN_FLASH 1
#define CFG_ENV_SIZE 0x10000
#define CFG_ENV_SECT_SIZE 0x20000
#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN)
/* Configuration of redundant environment */
#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
/*
* Pin multiplexing configuration
*/
/*
* CS1/GPIO_WKUP_6: GPIO (default)
* ALTs: CAN1 on I2C1, CAN2 on TIMER0/1
* IRDA/PSC6: UART
* Ether: Ethernet 100Mbit with MD
* PCI_DIS: PCI controller disabled
* USB: USB
* PSC3: SPI with UART3
* PSC2: UART
* PSC1: UART
*/
#define CFG_GPS_PORT_CONFIG 0x10559C44
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP 1 /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
#define CFG_ALT_MEMTEST 1
#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
#define CFG_MEMTEST_END 0x03f00000 /* 1 .. 63 MiB in SDRAM */
#define CONFIG_LOOPW 1
#define CFG_LOAD_ADDR 0x100000 /* default load address */
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
/*
* Various low-level settings
*/
#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
#define CFG_HID0_FINAL HID0_ICE
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CFG_XLB_PIPELINING 1 /* enable transaction pipeling */
/*
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
/*
* Flat Device Tree support
*/
#define CONFIG_OF_FLAT_TREE 1
#define CONFIG_OF_BOARD_SETUP 1
#define OF_FLAT_TREE_MAX_SIZE 8192 /* max size of the flat tree (8K) */
#define OF_CPU "PowerPC,5200@0"
#define OF_SOC "soc5200@f0000000"
#define OF_TBCLK (bd->bi_busfreq / 4)
#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
#endif /* __CONFIG_H */