Support passing of OF flat trees to the kernel.
Patch by Pantelis Antoniou, 04 Sep 2005
This commit is contained in:
Wolfgang Denk
parent
3df5bea0b0
commit
f57f70aab9
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@ -2,6 +2,9 @@
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Changes for U-Boot 1.1.4:
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======================================================================
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* Support passing of OF flat trees to the kernel.
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Patch by Pantelis Antoniou, 04 Sep 2005
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* Cleanup
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* Add support for NetSilicon NS7520 processor.
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3
Makefile
3
Makefile
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@ -1598,6 +1598,9 @@ lubbock_config : unconfig
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logodl_config : unconfig
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@./mkconfig $(@:_config=) arm pxa logodl
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pxa255_idp_config: unconfig
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@./mkconfig $(@:_config=) arm pxa pxa255_idp
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wepep250_config : unconfig
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@./mkconfig $(@:_config=) arm pxa wepep250
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14
README
14
README
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@ -399,6 +399,20 @@ The following options need to be configured:
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expect it to be in bytes, others in MB.
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Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
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CONFIG_OF_FLAT_TREE
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New kernel versions are expecting firmware settings to be
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passed using flat open firmware trees.
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The environment variable "disable_of", when set, disables this
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functionality.
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CONFIG_OF_FLAT_TREE_MAX_SIZE
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The maximum size of the constructed OF tree.
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OF_CPU - The proper name of the cpus node.
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OF_TBCLK - The timebase frequency.
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- Serial Ports:
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CFG_PL010_SERIAL
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@ -90,17 +90,17 @@ long int initdram (int board_type)
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long mear1;
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long emear1;
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size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
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size = get_ram_size (CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
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new_bank0_end = size - 1;
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mear1 = mpc824x_mpc107_getreg(MEAR1);
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emear1 = mpc824x_mpc107_getreg(EMEAR1);
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mear1 = mpc824x_mpc107_getreg (MEAR1);
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emear1 = mpc824x_mpc107_getreg (EMEAR1);
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mear1 = (mear1 & 0xFFFFFF00) |
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((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
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emear1 = (emear1 & 0xFFFFFF00) |
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((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
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mpc824x_mpc107_setreg(MEAR1, mear1);
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mpc824x_mpc107_setreg(EMEAR1, emear1);
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mpc824x_mpc107_setreg (MEAR1, mear1);
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mpc824x_mpc107_setreg (EMEAR1, emear1);
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return (size);
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}
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@ -113,11 +113,11 @@ static struct pci_config_table pci_barcohydra_config_table[] = {
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{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
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pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
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PCI_ENET0_MEMADDR,
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PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
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PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER } },
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{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
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pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
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PCI_ENET1_MEMADDR,
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PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
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PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER } },
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{ }
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};
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#endif
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@ -128,68 +128,66 @@ struct pci_controller hose = {
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#endif
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};
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void pci_init_board(void)
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void pci_init_board (void)
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{
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pci_mpc824x_init(&hose);
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pci_mpc824x_init (&hose);
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}
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int write_flash(char *addr, char value)
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int write_flash (char *addr, char value)
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{
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char *adr = (char *)0xFF800000;
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int cnt = 0;
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char status,oldstatus;
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*(adr+0x55) = 0xAA;
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udelay(1);
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*(adr+0xAA) = 0x55;
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udelay(1);
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*(adr+0x55) = 0xA0;
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udelay(1);
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*(adr+0x55) = 0xAA; udelay (1);
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*(adr+0xAA) = 0x55; udelay (1);
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*(adr+0x55) = 0xA0; udelay (1);
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*addr = value;
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status = *addr;
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do{
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do {
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oldstatus = status;
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status = *addr;
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if ((oldstatus & 0x40) == (status & 0x40)){
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if ((oldstatus & 0x40) == (status & 0x40)) {
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return 4;
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}
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cnt++;
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if (cnt > 10000){
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if (cnt > 10000) {
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return 2;
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}
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}while( (status & 0x20) == 0 );
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} while ( (status & 0x20) == 0 );
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oldstatus = *addr;
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status = *addr;
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if ((oldstatus & 0x40) == (status & 0x40)) return 0;
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else {
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if ((oldstatus & 0x40) == (status & 0x40)) {
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return 0;
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} else {
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*(adr+0x55) = 0xF0;
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return 1;
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}
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}
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unsigned update_flash(unsigned char* buf){
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switch((*buf) & 0x3){
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case TRY_WORKING:
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printf("found 3 and converted it to 2\n");
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write_flash(buf, (*buf) & 0xFE);
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*((unsigned char *)0xFF800000) = 0xF0;
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udelay(100);
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printf("buf [%#010x] %#010x\n",buf,(*buf));
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case BOOT_WORKING :
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return BOOT_WORKING;
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unsigned update_flash (unsigned char *buf)
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{
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switch ((*buf) & 0x3) {
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case TRY_WORKING:
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printf ("found 3 and converted it to 2\n");
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write_flash (buf, (*buf) & 0xFE);
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*((unsigned char *)0xFF800000) = 0xF0;
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udelay (100);
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printf ("buf [%#010x] %#010x\n", buf, (*buf));
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/* XXX - fall through??? */
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case BOOT_WORKING :
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return BOOT_WORKING;
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}
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return BOOT_DEFAULT;
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}
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unsigned scan_flash(void)
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unsigned scan_flash (void)
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{
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char section[] = "kernel";
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ulong sp;
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int cfgFileLen = (CFG_FLASH_ERASE_SECTOR_LENGTH >> 1);
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int sectionPtr = 0;
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int foundItem = 0; /* 0: None, 1: section found, 2: "=" found */
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@ -198,57 +196,54 @@ unsigned scan_flash(void)
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buf = (unsigned char*)(CFG_FLASH_RANGE_BASE + CFG_FLASH_RANGE_SIZE \
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- CFG_FLASH_ERASE_SECTOR_LENGTH);
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for(bufPtr = 0; bufPtr < cfgFileLen; ++bufPtr){
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for (bufPtr = 0; bufPtr < cfgFileLen; ++bufPtr) {
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if ((buf[bufPtr]==0xFF) && (*(int*)(buf+bufPtr)==0xFFFFFFFF)) {
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return BOOT_DEFAULT;
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}
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switch(foundItem)
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{
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/* This is the scanning loop, we try to find a particular
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* quoted value
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*/
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case 0:
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if((section[sectionPtr] == 0)){
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++foundItem;
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}
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else if(buf[bufPtr] == section[sectionPtr]){
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++sectionPtr;
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}
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else {
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sectionPtr = 0;
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}
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break;
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case 1:
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/* This is the scanning loop, we try to find a particular
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* quoted value
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*/
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switch (foundItem) {
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case 0:
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if ((section[sectionPtr] == 0)) {
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++foundItem;
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break;
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case 2:
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++foundItem;
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break;
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case 3:
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default:
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return update_flash(buf[bufPtr - 1]);
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} else if (buf[bufPtr] == section[sectionPtr]) {
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++sectionPtr;
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} else {
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sectionPtr = 0;
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}
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break;
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case 1:
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++foundItem;
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break;
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case 2:
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++foundItem;
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break;
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case 3:
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default:
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return update_flash (&buf[bufPtr - 1]);
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}
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}
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printf("Failed to read %s\n",section);
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printf ("Failed to read %s\n",section);
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return BOOT_DEFAULT;
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}
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TSBootInfo* find_boot_info(void)
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TSBootInfo* find_boot_info (void)
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{
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unsigned bootimage = scan_flash();
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TSBootInfo* info = (TSBootInfo*)malloc(sizeof(TSBootInfo));
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unsigned bootimage = scan_flash ();
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TSBootInfo* info = (TSBootInfo*)malloc (sizeof(TSBootInfo));
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switch(bootimage){
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case TRY_WORKING:
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info->address = CFG_WORKING_KERNEL_ADDRESS;
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break;
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case BOOT_WORKING :
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info->address = CFG_WORKING_KERNEL_ADDRESS;
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break;
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case BOOT_DEFAULT:
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default:
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info->address= CFG_DEFAULT_KERNEL_ADDRESS;
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switch (bootimage) {
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case TRY_WORKING:
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info->address = CFG_WORKING_KERNEL_ADDRESS;
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break;
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case BOOT_WORKING :
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info->address = CFG_WORKING_KERNEL_ADDRESS;
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break;
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case BOOT_DEFAULT:
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default:
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info->address= CFG_DEFAULT_KERNEL_ADDRESS;
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}
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info->size = *((unsigned int *)(info->address ));
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@ -256,43 +251,44 @@ TSBootInfo* find_boot_info(void)
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return info;
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}
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void barcobcd_boot(void)
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void barcobcd_boot (void)
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{
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TSBootInfo* start;
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char *bootm_args[2];
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char *buf;
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int cnt;
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extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
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buf = (char *)(0x00800000);
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/* make certain there are enough chars to print the command line here!
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*/
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bootm_args[0]=(char *)malloc(16*sizeof(char));
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bootm_args[1]=(char *)malloc(16*sizeof(char));
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bootm_args[0] = (char *)malloc (16*sizeof(char));
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bootm_args[1] = (char *)malloc (16*sizeof(char));
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start = find_boot_info();
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start = find_boot_info ();
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printf("Booting kernel at address %#10x with size %#10x\n",
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printf ("Booting kernel at address %#10x with size %#10x\n",
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start->address, start->size);
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/* give length of the kernel image to bootm */
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sprintf(bootm_args[0],"%x",start->size);
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sprintf (bootm_args[0],"%x",start->size);
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/* give address of the kernel image to bootm */
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sprintf(bootm_args[1],"%x",buf);
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sprintf (bootm_args[1],"%x",buf);
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printf("flash address: %#10x\n",start->address+8);
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printf("buf address: %#10x\n",buf);
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printf ("flash address: %#10x\n",start->address+8);
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printf ("buf address: %#10x\n",buf);
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/* aha, we reserve 8 bytes here... */
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for (cnt = 0; cnt < start->size ; cnt++){
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for (cnt = 0; cnt < start->size ; cnt++) {
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buf[cnt] = ((char *)start->address)[cnt+8];
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}
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/* initialise RAM memory */
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*((unsigned int *)0xFEC00000) = 0x00141A98;
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do_bootm(NULL,0,2,bootm_args);
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do_bootm (NULL,0,2,bootm_args);
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}
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int barcobcd_boot_image(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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int barcobcd_boot_image (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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#if 0
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if (argc > 1) {
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@ -300,7 +296,7 @@ int barcobcd_boot_image(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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return 1;
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}
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#endif
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barcobcd_boot();
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barcobcd_boot ();
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return 0;
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}
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@ -308,19 +304,19 @@ int barcobcd_boot_image(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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/* Currently, boot_working and boot_default are the same command. This is
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* left in here to see what we'll do in the future */
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U_BOOT_CMD(
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U_BOOT_CMD (
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try_working, 1, 1, barcobcd_boot_image,
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" try_working - check flash value and boot the appropriate image\n",
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"\n"
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);
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U_BOOT_CMD(
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U_BOOT_CMD (
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boot_working, 1, 1, barcobcd_boot_image,
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" boot_working - check flash value and boot the appropriate image\n",
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"\n"
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);
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U_BOOT_CMD(
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U_BOOT_CMD (
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boot_default, 1, 1, barcobcd_boot_image,
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" boot_default - check flash value and boot the appropriate image\n",
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"\n"
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@ -328,13 +324,40 @@ U_BOOT_CMD(
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/*
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* We are not using serial communication, so just provide empty functions
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*/
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int serial_init(void){return 0;}
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void serial_setbrg(void){}
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void serial_putc(const char c){}
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void serial_puts(const char *c){}
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void serial_addr(unsigned int i){}
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int serial_getc(void){return 0;}
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int serial_tstc(void){return 0;}
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int serial_init (void)
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{
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return 0;
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}
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void serial_setbrg (void)
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{
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return;
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}
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void serial_putc (const char c)
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{
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return;
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}
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void serial_puts (const char *c)
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{
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return;
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}
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void serial_addr (unsigned int i)
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{
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return;
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}
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int serial_getc (void)
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{
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return 0;
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}
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int serial_tstc (void)
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{
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return 0;
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}
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unsigned long post_word_load(void){return 0l;};
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void post_word_store(unsigned long val){}
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unsigned long post_word_load (void)
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{
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return 0l;
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}
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void post_word_store (unsigned long val)
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{
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return;
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}
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|
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@ -46,7 +46,7 @@ COBJS = main.o ACEX1K.o altera.o bedbug.o circbuf.o \
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env_nand.o env_dataflash.o env_flash.o env_eeprom.o \
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env_nvram.o env_nowhere.o \
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exports.o \
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flash.o fpga.o \
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flash.o fpga.o ft_build.o \
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hush.o kgdb.o lcd.o lists.o lynxkdi.o \
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memsize.o miiphybb.o miiphyutil.o \
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s_record.o serial.o soft_i2c.o soft_spi.o spartan2.o spartan3.o \
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|
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@ -34,6 +34,10 @@
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#include <environment.h>
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#include <asm/byteorder.h>
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#ifdef CONFIG_OF_FLAT_TREE
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#include <ft_build.h>
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#endif
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/*cmd_boot.c*/
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extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
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@ -489,6 +493,11 @@ fixup_silent_linux ()
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}
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#endif /* CONFIG_SILENT_CONSOLE */
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#ifdef CONFIG_OF_FLAT_TREE
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extern const unsigned char oftree_dtb[];
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extern const unsigned int oftree_dtb_len;
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#endif
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|
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#ifdef CONFIG_PPC
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static void
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do_bootm_linux (cmd_tbl_t *cmdtp, int flag,
|
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|
|
@ -511,6 +520,9 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag,
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bd_t *kbd;
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void (*kernel)(bd_t *, ulong, ulong, ulong, ulong);
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image_header_t *hdr = &header;
|
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#ifdef CONFIG_OF_FLAT_TREE
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char *of_flat_tree;
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#endif
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|
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if ((s = getenv ("initrd_high")) != NULL) {
|
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/* a value of "no" or a similar string will act like 0,
|
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|
|
@ -776,15 +788,26 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag,
|
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initrd_end = 0;
|
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}
|
||||
|
||||
#ifdef CONFIG_OF_FLAT_TREE
|
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if (initrd_start == 0)
|
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of_flat_tree = (char *)(((ulong)kbd - OF_FLAT_TREE_MAX_SIZE -
|
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sizeof(bd_t)) & ~0xF);
|
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else
|
||||
of_flat_tree = (char *)((initrd_start - OF_FLAT_TREE_MAX_SIZE -
|
||||
sizeof(bd_t)) & ~0xF);
|
||||
#endif
|
||||
|
||||
debug ("## Transferring control to Linux (at address %08lx) ...\n",
|
||||
(ulong)kernel);
|
||||
|
||||
SHOW_BOOT_PROGRESS (15);
|
||||
|
||||
#ifndef CONFIG_OF_FLAT_TREE
|
||||
|
||||
#if defined(CFG_INIT_RAM_LOCK) && !defined(CONFIG_E500)
|
||||
unlock_ram_in_cache();
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Linux Kernel Parameters:
|
||||
* r3: ptr to board info data
|
||||
|
|
@ -794,6 +817,25 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag,
|
|||
* r7: End of command line string
|
||||
*/
|
||||
(*kernel) (kbd, initrd_start, initrd_end, cmd_start, cmd_end);
|
||||
|
||||
#else
|
||||
ft_setup(of_flat_tree, OF_FLAT_TREE_MAX_SIZE, kbd);
|
||||
/* ft_dump_blob(of_flat_tree); */
|
||||
|
||||
#if defined(CFG_INIT_RAM_LOCK) && !defined(CONFIG_E500)
|
||||
unlock_ram_in_cache();
|
||||
#endif
|
||||
/*
|
||||
* Linux Kernel Parameters:
|
||||
* r3: ptr to OF flat tree, followed by the board info data
|
||||
* r4: initrd_start or 0 if no initrd
|
||||
* r5: initrd_end - unused if r4 is 0
|
||||
* r6: Start of command line string
|
||||
* r7: End of command line string
|
||||
*/
|
||||
(*kernel) ((bd_t *)of_flat_tree, initrd_start, initrd_end, cmd_start, cmd_end);
|
||||
|
||||
#endif
|
||||
}
|
||||
#endif /* CONFIG_PPC */
|
||||
|
||||
|
|
|
|||
|
|
@ -318,11 +318,20 @@ int
|
|||
do_iopset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
||||
{
|
||||
uint rcode = 0;
|
||||
iopin_t iopin;
|
||||
static uint port = 0;
|
||||
static uint pin = 0;
|
||||
static uint value = 0;
|
||||
static enum { DIR, PAR, SOR, ODR, DAT, INT } cmd = DAT;
|
||||
iopin_t iopin;
|
||||
static enum {
|
||||
DIR,
|
||||
PAR,
|
||||
SOR,
|
||||
ODR,
|
||||
DAT,
|
||||
#if defined(CONFIG_8xx)
|
||||
INT
|
||||
#endif
|
||||
} cmd = DAT;
|
||||
|
||||
if (argc != 5) {
|
||||
puts ("iopset PORT PIN CMD VALUE\n");
|
||||
|
|
|
|||
|
|
@ -184,7 +184,7 @@ int eth_init (bd_t * bd)
|
|||
|
||||
/* Init Ehternet buffers */
|
||||
for (i = 0; i < RBF_FRAMEMAX; i++) {
|
||||
rbfdt[i].addr = rbf_framebuf[i];
|
||||
rbfdt[i].addr = (unsigned long)rbf_framebuf[i];
|
||||
rbfdt[i].size = 0;
|
||||
}
|
||||
rbfdt[RBF_FRAMEMAX - 1].addr |= RBF_WRAP;
|
||||
|
|
|
|||
|
|
@ -24,19 +24,19 @@
|
|||
|
||||
#undef DEBUG
|
||||
|
||||
#define CONFIG_405 1 /* This is a PPC405 CPU */
|
||||
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
|
||||
#define CONFIG_405 1 /* This is a PPC405 CPU */
|
||||
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
|
||||
|
||||
#define CONFIG_AP1000 1 /* ...on an AP1000 board */
|
||||
#define CONFIG_AP1000 1 /* ...on an AP1000 board */
|
||||
|
||||
#define CONFIG_PCI 1
|
||||
#define CONFIG_PCI 1
|
||||
|
||||
#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
|
||||
#define CFG_PROMPT "0> "
|
||||
#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
|
||||
#define CFG_PROMPT "0> "
|
||||
#define CFG_PROMPT_HUSH_PS2 "> "
|
||||
|
||||
#define CONFIG_COMMAND_EDIT 1
|
||||
#define CONFIG_COMMAND_HISTORY 1
|
||||
#define CONFIG_COMMAND_EDIT 1
|
||||
#define CONFIG_COMMAND_HISTORY 1
|
||||
#define CONFIG_COMPLETE_ADDRESSES 1
|
||||
|
||||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
|
|
@ -50,10 +50,10 @@
|
|||
#endif
|
||||
#endif
|
||||
|
||||
#define CONFIG_BAUDRATE 57600
|
||||
#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
|
||||
#define CONFIG_BAUDRATE 57600
|
||||
#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
|
||||
|
||||
#define CONFIG_BOOTCOMMAND "" /* autoboot command */
|
||||
#define CONFIG_BOOTCOMMAND "" /* autoboot command */
|
||||
|
||||
/* Size (bytes) of interrupt driven serial port buffer.
|
||||
* Set to 0 to use polling instead of interrupts.
|
||||
|
|
@ -61,48 +61,47 @@
|
|||
*/
|
||||
#undef CONFIG_SERIAL_SOFTWARE_FIFO
|
||||
|
||||
#define CONFIG_BOOTARGS "console=ttyS0,57600"
|
||||
#define CONFIG_BOOTARGS "console=ttyS0,57600"
|
||||
|
||||
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
|
||||
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
|
||||
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
|
||||
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
|
||||
|
||||
#define CONFIG_COMMANDS ( (CONFIG_CMD_DFL & \
|
||||
(~CFG_CMD_RTC) & ~(CFG_CMD_I2C)) | \
|
||||
CFG_CMD_IRQ | \
|
||||
CFG_CMD_PCI | \
|
||||
CFG_CMD_DHCP | \
|
||||
CFG_CMD_ASKENV | \
|
||||
CFG_CMD_ELF | \
|
||||
CFG_CMD_PING | \
|
||||
CFG_CMD_MVENV \
|
||||
#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
|
||||
CFG_CMD_ASKENV | \
|
||||
CFG_CMD_DHCP | \
|
||||
CFG_CMD_ELF | \
|
||||
CFG_CMD_IRQ | \
|
||||
CFG_CMD_MVENV | \
|
||||
CFG_CMD_PCI | \
|
||||
CFG_CMD_PING \
|
||||
)
|
||||
|
||||
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
|
||||
#include <cmd_confdefs.h>
|
||||
|
||||
#undef CONFIG_WATCHDOG /* watchdog disabled */
|
||||
#undef CONFIG_WATCHDOG /* watchdog disabled */
|
||||
|
||||
#define CONFIG_SYS_CLK_FREQ 30000000
|
||||
#define CONFIG_SYS_CLK_FREQ 30000000
|
||||
|
||||
#define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */
|
||||
#define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */
|
||||
|
||||
/*
|
||||
* Miscellaneous configurable options
|
||||
*/
|
||||
#define CFG_LONGHELP /* undef to save memory */
|
||||
#define CFG_LONGHELP /* undef to save memory */
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
|
||||
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
|
||||
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
|
||||
#else
|
||||
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
#endif
|
||||
/* usually: (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) */
|
||||
#define CFG_PBSIZE (CFG_CBSIZE+4+16) /* Print Buffer Size */
|
||||
#define CFG_MAXARGS 16 /* max number of command args */
|
||||
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
|
||||
#define CFG_PBSIZE (CFG_CBSIZE+4+16) /* Print Buffer Size */
|
||||
#define CFG_MAXARGS 16 /* max number of command args */
|
||||
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
|
||||
|
||||
#define CFG_ALT_MEMTEST 1
|
||||
#define CFG_MEMTEST_START 0x00400000 /* memtest works on */
|
||||
#define CFG_MEMTEST_END 0x01000000 /* 4 ... 16 MB in DRAM */
|
||||
#define CFG_ALT_MEMTEST 1
|
||||
#define CFG_MEMTEST_START 0x00400000 /* memtest works on */
|
||||
#define CFG_MEMTEST_END 0x01000000 /* 4 ... 16 MB in DRAM */
|
||||
|
||||
/*
|
||||
* If CFG_EXT_SERIAL_CLOCK, then the UART divisor is 1.
|
||||
|
|
@ -113,84 +112,84 @@
|
|||
* If CFG_405_UART_ERRATA_59 and 200MHz CPU clock,
|
||||
* set Linux BASE_BAUD to 403200.
|
||||
*/
|
||||
#undef CFG_EXT_SERIAL_CLOCK /* external serial clock */
|
||||
#undef CFG_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
|
||||
#undef CFG_EXT_SERIAL_CLOCK /* external serial clock */
|
||||
#undef CFG_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
|
||||
|
||||
#define CFG_NS16550_CLK 40000000
|
||||
#define CFG_DUART_CHAN 0
|
||||
#define CFG_NS16550_COM1 (0x4C000000 + 0x1000)
|
||||
#define CFG_NS16550_COM2 (0x4C800000 + 0x1000)
|
||||
#define CFG_NS16550_REG_SIZE 4
|
||||
#define CFG_NS16550 1
|
||||
#define CFG_INIT_CHAN1 1
|
||||
#define CFG_INIT_CHAN2 0
|
||||
#define CFG_NS16550_CLK 40000000
|
||||
#define CFG_DUART_CHAN 0
|
||||
#define CFG_NS16550_COM1 (0x4C000000 + 0x1000)
|
||||
#define CFG_NS16550_COM2 (0x4C800000 + 0x1000)
|
||||
#define CFG_NS16550_REG_SIZE 4
|
||||
#define CFG_NS16550 1
|
||||
#define CFG_INIT_CHAN1 1
|
||||
#define CFG_INIT_CHAN2 0
|
||||
|
||||
/* The following table includes the supported baudrates */
|
||||
#define CFG_BAUDRATE_TABLE \
|
||||
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
|
||||
|
||||
#define CFG_LOAD_ADDR 0x00100000 /* default load address */
|
||||
#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
|
||||
#define CFG_LOAD_ADDR 0x00200000 /* default load address */
|
||||
#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
|
||||
|
||||
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
|
||||
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Start addresses for the final memory configuration
|
||||
* (Set up by the startup code)
|
||||
* Please note that CFG_SDRAM_BASE _must_ start at 0
|
||||
*/
|
||||
#define CFG_SDRAM_BASE 0x00000000
|
||||
#define CFG_FLASH_BASE 0x20000000
|
||||
#define CFG_MONITOR_BASE TEXT_BASE
|
||||
#define CFG_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
|
||||
#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
|
||||
#define CFG_SDRAM_BASE 0x00000000
|
||||
#define CFG_FLASH_BASE 0x20000000
|
||||
#define CFG_MONITOR_BASE TEXT_BASE
|
||||
#define CFG_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
|
||||
#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
|
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data
|
||||
* have to be in the first 8 MB of memory, since this is
|
||||
* the maximum mapped by the Linux kernel during initialization.
|
||||
*/
|
||||
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
|
||||
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
|
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH organization
|
||||
*/
|
||||
#define CFG_FLASH_CFI 1
|
||||
#define CFG_PROGFLASH_BASE CFG_FLASH_BASE
|
||||
#define CFG_CONFFLASH_BASE 0x24000000
|
||||
#define CFG_FLASH_CFI 1
|
||||
#define CFG_PROGFLASH_BASE CFG_FLASH_BASE
|
||||
#define CFG_CONFFLASH_BASE 0x24000000
|
||||
|
||||
#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
|
||||
#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
|
||||
|
||||
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
|
||||
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
|
||||
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
|
||||
|
||||
#define CFG_FLASH_PROTECTION 1 /* use hardware protection */
|
||||
#define CFG_FLASH_PROTECTION 1 /* use hardware protection */
|
||||
|
||||
/* BEG ENVIRONNEMENT FLASH */
|
||||
#ifdef CFG_ENV_IS_IN_FLASH
|
||||
#define CFG_ENV_OFFSET 0x00040000 /* Offset of Environment Sector */
|
||||
#define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
|
||||
#define CFG_ENV_SECT_SIZE 0x20000 /* see README - env sector total size */
|
||||
#define CFG_ENV_OFFSET 0x00040000 /* Offset of Environment Sector */
|
||||
#define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
|
||||
#define CFG_ENV_SECT_SIZE 0x20000 /* see README - env sector total size */
|
||||
#endif
|
||||
/* END ENVIRONNEMENT FLASH */
|
||||
/*-----------------------------------------------------------------------
|
||||
* NVRAM organization
|
||||
*/
|
||||
#define CFG_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */
|
||||
#define CFG_NVRAM_SIZE 0x1ff8 /* NVRAM size */
|
||||
#define CFG_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */
|
||||
#define CFG_NVRAM_SIZE 0x1ff8 /* NVRAM size */
|
||||
|
||||
#ifdef CFG_ENV_IS_IN_NVRAM
|
||||
#define CFG_ENV_SIZE 0x1000 /* Size of Environment vars */
|
||||
#define CFG_ENV_SIZE 0x1000 /* Size of Environment vars */
|
||||
#define CFG_ENV_ADDR \
|
||||
(CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-CFG_ENV_SIZE) /* Env */
|
||||
#endif
|
||||
/*-----------------------------------------------------------------------
|
||||
* Cache Configuration
|
||||
*/
|
||||
#define CFG_DCACHE_SIZE 16384
|
||||
#define CFG_CACHELINE_SIZE 32
|
||||
#define CFG_DCACHE_SIZE 16384
|
||||
#define CFG_CACHELINE_SIZE 32
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
|
||||
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
|
||||
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
|
@ -199,11 +198,11 @@
|
|||
* BR0/1 and OR0/1 (FLASH)
|
||||
*/
|
||||
|
||||
#define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */
|
||||
#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
|
||||
#define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */
|
||||
#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
|
||||
|
||||
/* Configuration Port location */
|
||||
#define CONFIG_PORT_ADDR 0xF0000500
|
||||
#define CONFIG_PORT_ADDR 0xF0000500
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Definitions for initial stack pointer and data area (in DPRAM)
|
||||
|
|
@ -211,8 +210,8 @@
|
|||
|
||||
#define CFG_INIT_RAM_ADDR 0x400000 /* inside of SDRAM */
|
||||
#define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */
|
||||
#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
|
||||
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
|
||||
#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
|
||||
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
|
||||
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
|
|
@ -226,25 +225,25 @@
|
|||
*
|
||||
* Boot Flags
|
||||
*/
|
||||
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
|
||||
#define BOOTFLAG_WARM 0x02 /* Software reboot */
|
||||
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
|
||||
#define BOOTFLAG_WARM 0x02 /* Software reboot */
|
||||
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
|
||||
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
|
||||
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
|
||||
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
|
||||
#endif
|
||||
|
||||
/* JFFS2 stuff */
|
||||
|
||||
#define CFG_JFFS2_FIRST_BANK 0
|
||||
#define CFG_JFFS2_NUM_BANKS 1
|
||||
#define CFG_JFFS2_FIRST_SECTOR 1
|
||||
#define CFG_JFFS2_FIRST_BANK 0
|
||||
#define CFG_JFFS2_NUM_BANKS 1
|
||||
#define CFG_JFFS2_FIRST_SECTOR 1
|
||||
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_E1000
|
||||
|
||||
#define CFG_ETH_DEV_FN 0x0800
|
||||
#define CFG_ETH_IOBASE 0x31000000
|
||||
#define CFG_ETH_MEMBASE 0x32000000
|
||||
#define CFG_ETH_DEV_FN 0x0800
|
||||
#define CFG_ETH_IOBASE 0x31000000
|
||||
#define CFG_ETH_MEMBASE 0x32000000
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
|
|
|||
|
|
@ -99,19 +99,17 @@
|
|||
#define SCL 0x1000 /* PA 3 */
|
||||
#define SDA 0x2000 /* PA 2 */
|
||||
|
||||
#define PAR immr->im_ioport.iop_papar
|
||||
#define DIR immr->im_ioport.iop_padir
|
||||
#define DAT immr->im_ioport.iop_padat
|
||||
|
||||
#define I2C_INIT {PAR &= ~(SCL | SDA); DIR |= SCL;}
|
||||
#define I2C_ACTIVE (DIR |= SDA)
|
||||
#define I2C_TRISTATE (DIR &= ~SDA)
|
||||
#define I2C_READ ((DAT & SDA) != 0)
|
||||
#define I2C_SDA(bit) if (bit) DAT |= SDA; \
|
||||
else DAT &= ~SDA
|
||||
#define I2C_SCL(bit) if (bit) DAT |= SCL; \
|
||||
else DAT &= ~SCL
|
||||
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
|
||||
#define __I2C_DIR immr->im_ioport.iop_padir
|
||||
#define __I2C_DAT immr->im_ioport.iop_padat
|
||||
#define __I2C_PAR immr->im_ioport.iop_papar
|
||||
#define I2C_INIT { __I2C_PAR &= ~(SDA|SCL); \
|
||||
__I2C_DIR |= (SDA|SCL); }
|
||||
#define I2C_READ ((__I2C_DAT & SDA) ? 1 : 0)
|
||||
#define I2C_SDA(x) { if (x) __I2C_DAT |= SDA; else __I2C_DAT &= ~SDA; }
|
||||
#define I2C_SCL(x) { if (x) __I2C_DAT |= SCL; else __I2C_DAT &= ~SCL; }
|
||||
#define I2C_DELAY { udelay(5); }
|
||||
#define I2C_ACTIVE { __I2C_DIR |= SDA; }
|
||||
#define I2C_TRISTATE { __I2C_DIR &= ~SDA; }
|
||||
|
||||
#define CONFIG_RTC_PCF8563
|
||||
#define CFG_I2C_RTC_ADDR 0x51
|
||||
|
|
|
|||
|
|
@ -235,7 +235,7 @@
|
|||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_PCI_PNP /* do pci plug-and-play */
|
||||
|
||||
#define CONFIG_EEPRO100
|
||||
/* #define CONFIG_EEPRO100 XXX - FIXME: conflicts when CONFIG_MII is enabled */
|
||||
#define CONFIG_E1000
|
||||
#undef CONFIG_TULIP
|
||||
|
||||
|
|
|
|||
|
|
@ -181,17 +181,20 @@
|
|||
#if defined (CONFIG_SOFT_I2C)
|
||||
#define SDA 0x00010
|
||||
#define SCL 0x00020
|
||||
#define DIR immr->im_cpm.cp_pbdir
|
||||
#define DAT immr->im_cpm.cp_pbdat
|
||||
#define PAR immr->im_cpm.cp_pbpar
|
||||
#define ODR immr->im_cpm.cp_pbodr
|
||||
#define I2C_INIT {PAR&=~(SDA|SCL);ODR&=~(SDA|SCL);DAT|=(SDA|SCL);DIR|=(SDA|SCL);}
|
||||
#define I2C_READ ((DAT&SDA)?1:0)
|
||||
#define I2C_SDA(x) {if(x)DAT|=SDA;else DAT&=~SDA;}
|
||||
#define I2C_SCL(x) {if(x)DAT|=SCL;else DAT&=~SCL;}
|
||||
#define I2C_DELAY {udelay(5);}
|
||||
#define I2C_ACTIVE {DIR|=SDA;}
|
||||
#define I2C_TRISTATE {DIR&=~SDA;}
|
||||
#define __I2C_DIR immr->im_cpm.cp_pbdir
|
||||
#define __I2C_DAT immr->im_cpm.cp_pbdat
|
||||
#define __I2C_PAR immr->im_cpm.cp_pbpar
|
||||
#define __I2C_ODR immr->im_cpm.cp_pbodr
|
||||
#define I2C_INIT { __I2C_PAR &= ~(SDA|SCL); \
|
||||
__I2C_ODR &= ~(SDA|SCL); \
|
||||
__I2C_DAT |= (SDA|SCL); \
|
||||
__I2C_DIR|=(SDA|SCL); }
|
||||
#define I2C_READ ((__I2C_DAT & SDA) ? 1 : 0)
|
||||
#define I2C_SDA(x) { if (x) __I2C_DAT |= SDA; else __I2C_DAT &= ~SDA; }
|
||||
#define I2C_SCL(x) { if (x) __I2C_DAT |= SCL; else __I2C_DAT &= ~SCL; }
|
||||
#define I2C_DELAY { udelay(5); }
|
||||
#define I2C_ACTIVE { __I2C_DIR |= SDA; }
|
||||
#define I2C_TRISTATE { __I2C_DIR &= ~SDA; }
|
||||
#endif
|
||||
|
||||
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
|
||||
|
|
|
|||
|
|
@ -83,7 +83,7 @@
|
|||
#define CONFIG_PCI_IO_SIZE 0x01000000
|
||||
|
||||
#define CONFIG_NET_MULTI 1
|
||||
#define CONFIG_EEPRO100 1
|
||||
/* #define CONFIG_EEPRO100 XXX - FIXME: conflicts when CONFIG_MII is enabled */
|
||||
#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
|
||||
#define CONFIG_NS8382X 1
|
||||
#endif /* CONFIG_STK52XX */
|
||||
|
|
|
|||
|
|
@ -283,7 +283,7 @@
|
|||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_PCI_PNP /* do pci plug-and-play */
|
||||
|
||||
#define CONFIG_EEPRO100
|
||||
/* #define CONFIG_EEPRO100 XXX - FIXME: conflicts when CONFIG_MII is enabled */
|
||||
#undef CONFIG_TULIP
|
||||
|
||||
#if !defined(CONFIG_PCI_PNP)
|
||||
|
|
|
|||
|
|
@ -162,7 +162,7 @@
|
|||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
#define CFG_ENV_OFFSET 0x000047A4 /* Offset of Environment Sector */
|
||||
#define CFG_ENV_SIZE 0x00002000 /* Total Size of Environment Sector */
|
||||
#define ENV_CRC 0x8BF6F24B
|
||||
/* #define ENV_CRC 0x8BF6F24B XXX - FIXME: gets defined automatically */
|
||||
|
||||
#define CFG_MALLOC_LEN (512 << 10) /* Reserve 512 kB for malloc() */
|
||||
|
||||
|
|
|
|||
|
|
@ -69,7 +69,7 @@
|
|||
#define CFG_XLB_PIPELINING 1
|
||||
|
||||
#define CONFIG_NET_MULTI 1
|
||||
#define CONFIG_EEPRO100 1
|
||||
/* #define CONFIG_EEPRO100 XXX - FIXME: conflicts when CONFIG_MII is enabled */
|
||||
#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
|
||||
#define CONFIG_NS8382X 1
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue