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ppc4xx: Change tsr/tcr macros to upper case 

Remove uneccessary functions to access the TCR/TSR registers as well.

Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Stefan Roese 2010-10-04 11:09:40 +02:00
parent 11c8dd36ed
commit f472069fb7
3 changed files with 5 additions and 21 deletions
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8
arch/powerpc/cpu/ppc4xx/cpu_init.c
View File

@ -342,7 +342,7 @@ cpu_init_f (void)
#endif
#if defined(CONFIG_WATCHDOG)
val = mfspr(tcr);
val = mfspr(SPRN_TCR);
#if defined(CONFIG_440EP) || defined(CONFIG_440GR)
val |= 0xb8000000; /* generate system reset after 1.34 seconds */
#elif defined(CONFIG_440EPX)
@ -354,11 +354,11 @@ cpu_init_f (void)
val &= ~0x30000000; /* clear WRC bits */
val |= CONFIG_SYS_4xx_RESET_TYPE << 28; /* set board specific WRC type */
#endif
mtspr(tcr, val);
mtspr(SPRN_TCR, val);
val = mfspr(tsr);
val = mfspr(SPRN_TSR);
val |= 0x80000000; /* enable watchdog timer */
mtspr(tsr, val);
mtspr(SPRN_TSR, val);
reset_4xx_watchdog();
#endif /* CONFIG_WATCHDOG */

7
arch/powerpc/cpu/ppc4xx/interrupts.c
View File

@ -67,13 +67,6 @@ static __inline__ void set_pit(unsigned long val)
asm volatile("mtpit %0" : : "r" (val));
}
static __inline__ void set_tcr(unsigned long val)
{
asm volatile("mttcr %0" : : "r" (val));
}
static __inline__ void set_evpr(unsigned long val)
{
asm volatile("mtevpr %0" : : "r" (val));

11
arch/powerpc/cpu/ppc4xx/traps.c
View File

@ -46,15 +46,6 @@ extern unsigned long search_exception_table(unsigned long);
*/
#define END_OF_MEM (gd->bd->bi_memstart + gd->bd->bi_memsize)
static __inline__ void set_tsr(unsigned long val)
{
#if defined(CONFIG_440)
asm volatile("mtspr 0x150, %0" : : "r" (val));
#else
asm volatile("mttsr %0" : : "r" (val));
#endif
}
static __inline__ unsigned long get_esr(void)
{
unsigned long val;
@ -364,7 +355,7 @@ DecrementerPITException(struct pt_regs *regs)
/*
* Reset PIT interrupt
*/
set_tsr(0x08000000);
mtspr(SPRN_TSR, 0x08000000);
/*
* Call timer_interrupt routine in interrupts.c